java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/array-examples/standard_strcpy_original_false-valid-deref.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-acfac67 [2018-01-28 23:40:16,381 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-28 23:40:16,382 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-28 23:40:16,395 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-28 23:40:16,395 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-28 23:40:16,395 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-28 23:40:16,396 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-28 23:40:16,397 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-28 23:40:16,438 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-28 23:40:16,439 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-28 23:40:16,439 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-28 23:40:16,440 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-28 23:40:16,440 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-28 23:40:16,442 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-28 23:40:16,443 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-28 23:40:16,445 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-28 23:40:16,447 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-28 23:40:16,449 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-28 23:40:16,451 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-28 23:40:16,452 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-28 23:40:16,454 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-28 23:40:16,458 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-28 23:40:16,459 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-28 23:40:16,459 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-28 23:40:16,467 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-28 23:40:16,467 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-28 23:40:16,468 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-28 23:40:16,468 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-28 23:40:16,468 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-28 23:40:16,469 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-28 23:40:16,469 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-28 23:40:16,469 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-28 23:40:16,469 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-28 23:40:16,470 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-28 23:40:16,470 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-28 23:40:16,470 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-28 23:40:16,470 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-28 23:40:16,470 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-28 23:40:16,470 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-28 23:40:16,471 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-28 23:40:16,471 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-28 23:40:16,471 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-28 23:40:16,471 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-28 23:40:16,471 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-28 23:40:16,471 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-28 23:40:16,471 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-28 23:40:16,471 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-28 23:40:16,472 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 23:40:16,472 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-28 23:40:16,472 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-28 23:40:16,472 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-28 23:40:16,472 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-28 23:40:16,473 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-28 23:40:16,473 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-28 23:40:16,473 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-28 23:40:16,473 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-28 23:40:16,474 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-28 23:40:16,474 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-28 23:40:16,506 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-28 23:40:16,517 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-28 23:40:16,520 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-28 23:40:16,522 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-28 23:40:16,522 INFO L276 PluginConnector]: CDTParser initialized [2018-01-28 23:40:16,523 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/standard_strcpy_original_false-valid-deref.i [2018-01-28 23:40:16,636 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-28 23:40:16,641 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-01-28 23:40:16,642 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-28 23:40:16,642 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-28 23:40:16,647 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-28 23:40:16,648 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 11:40:16" (1/1) ... [2018-01-28 23:40:16,651 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@534e693d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:40:16, skipping insertion in model container [2018-01-28 23:40:16,651 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 11:40:16" (1/1) ... [2018-01-28 23:40:16,664 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 23:40:16,677 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-28 23:40:16,786 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 23:40:16,799 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-28 23:40:16,803 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:40:16 WrapperNode [2018-01-28 23:40:16,804 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-28 23:40:16,804 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-28 23:40:16,805 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-28 23:40:16,805 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-28 23:40:16,815 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:40:16" (1/1) ... [2018-01-28 23:40:16,815 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:40:16" (1/1) ... [2018-01-28 23:40:16,822 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:40:16" (1/1) ... [2018-01-28 23:40:16,822 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:40:16" (1/1) ... [2018-01-28 23:40:16,824 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:40:16" (1/1) ... [2018-01-28 23:40:16,827 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:40:16" (1/1) ... [2018-01-28 23:40:16,828 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:40:16" (1/1) ... [2018-01-28 23:40:16,829 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-28 23:40:16,830 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-28 23:40:16,830 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-28 23:40:16,830 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-28 23:40:16,831 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:40:16" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-28 23:40:16,874 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-28 23:40:16,875 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-28 23:40:16,875 INFO L136 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-01-28 23:40:16,875 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-28 23:40:16,875 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-01-28 23:40:16,875 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-01-28 23:40:16,875 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-28 23:40:16,875 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-28 23:40:16,875 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-28 23:40:17,009 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-28 23:40:17,010 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 11:40:17 BoogieIcfgContainer [2018-01-28 23:40:17,010 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-28 23:40:17,010 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2018-01-28 23:40:17,010 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2018-01-28 23:40:17,011 INFO L276 PluginConnector]: IcfgTransformer initialized [2018-01-28 23:40:17,014 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 11:40:17" (1/1) ... [2018-01-28 23:40:17,018 WARN L213 ansformationObserver]: HeapSeparator: input icfg has no '#valid' array -- returning unchanged Icfg! [2018-01-28 23:40:17,027 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 28.01 11:40:17 BasicIcfg [2018-01-28 23:40:17,027 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2018-01-28 23:40:17,028 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-28 23:40:17,028 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-28 23:40:17,030 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-28 23:40:17,031 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.01 11:40:16" (1/4) ... [2018-01-28 23:40:17,032 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@130e1ca4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 11:40:17, skipping insertion in model container [2018-01-28 23:40:17,032 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:40:16" (2/4) ... [2018-01-28 23:40:17,032 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@130e1ca4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 11:40:17, skipping insertion in model container [2018-01-28 23:40:17,032 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 11:40:17" (3/4) ... [2018-01-28 23:40:17,033 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@130e1ca4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.01 11:40:17, skipping insertion in model container [2018-01-28 23:40:17,033 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 28.01 11:40:17" (4/4) ... [2018-01-28 23:40:17,034 INFO L107 eAbstractionObserver]: Analyzing ICFG standard_strcpy_original_false-valid-deref.ileft_unchanged_by_heapseparator [2018-01-28 23:40:17,041 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-28 23:40:17,048 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 6 error locations. [2018-01-28 23:40:17,089 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-28 23:40:17,089 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-28 23:40:17,089 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-28 23:40:17,089 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-28 23:40:17,089 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-28 23:40:17,089 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-28 23:40:17,090 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-28 23:40:17,090 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-28 23:40:17,090 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-28 23:40:17,103 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states. [2018-01-28 23:40:17,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-01-28 23:40:17,108 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:17,109 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:17,109 INFO L371 AbstractCegarLoop]: === Iteration 1 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:17,114 INFO L82 PathProgramCache]: Analyzing trace with hash -720476758, now seen corresponding path program 1 times [2018-01-28 23:40:17,117 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:17,117 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:17,172 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:17,172 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:40:17,173 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:17,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:17,204 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:17,281 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:17,283 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-28 23:40:17,284 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-28 23:40:17,285 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-28 23:40:17,295 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-28 23:40:17,296 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 23:40:17,298 INFO L87 Difference]: Start difference. First operand 38 states. Second operand 3 states. [2018-01-28 23:40:17,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:17,388 INFO L93 Difference]: Finished difference Result 80 states and 96 transitions. [2018-01-28 23:40:17,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-28 23:40:17,390 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2018-01-28 23:40:17,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:17,400 INFO L225 Difference]: With dead ends: 80 [2018-01-28 23:40:17,401 INFO L226 Difference]: Without dead ends: 47 [2018-01-28 23:40:17,404 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-28 23:40:17,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-28 23:40:17,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 42. [2018-01-28 23:40:17,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-28 23:40:17,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 44 transitions. [2018-01-28 23:40:17,498 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 44 transitions. Word has length 9 [2018-01-28 23:40:17,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:17,498 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 44 transitions. [2018-01-28 23:40:17,498 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-28 23:40:17,498 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 44 transitions. [2018-01-28 23:40:17,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-01-28 23:40:17,499 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:17,499 INFO L330 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:17,499 INFO L371 AbstractCegarLoop]: === Iteration 2 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:17,499 INFO L82 PathProgramCache]: Analyzing trace with hash 121937228, now seen corresponding path program 1 times [2018-01-28 23:40:17,499 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:17,499 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:17,500 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:17,501 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:40:17,501 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:17,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:17,515 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:17,588 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:17,589 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:17,589 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:17,597 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:40:17,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:17,610 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:17,629 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:17,652 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:17,652 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2018-01-28 23:40:17,653 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-28 23:40:17,653 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-28 23:40:17,653 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 23:40:17,653 INFO L87 Difference]: Start difference. First operand 42 states and 44 transitions. Second operand 4 states. [2018-01-28 23:40:17,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:17,782 INFO L93 Difference]: Finished difference Result 68 states and 73 transitions. [2018-01-28 23:40:17,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-28 23:40:17,785 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-01-28 23:40:17,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:17,786 INFO L225 Difference]: With dead ends: 68 [2018-01-28 23:40:17,786 INFO L226 Difference]: Without dead ends: 62 [2018-01-28 23:40:17,787 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 15 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-28 23:40:17,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-01-28 23:40:17,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 56. [2018-01-28 23:40:17,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-28 23:40:17,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 60 transitions. [2018-01-28 23:40:17,795 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 60 transitions. Word has length 16 [2018-01-28 23:40:17,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:17,795 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 60 transitions. [2018-01-28 23:40:17,795 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-28 23:40:17,795 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 60 transitions. [2018-01-28 23:40:17,797 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-28 23:40:17,797 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:17,797 INFO L330 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:17,797 INFO L371 AbstractCegarLoop]: === Iteration 3 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:17,797 INFO L82 PathProgramCache]: Analyzing trace with hash 695266154, now seen corresponding path program 2 times [2018-01-28 23:40:17,797 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:17,797 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:17,798 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:17,798 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:40:17,798 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:17,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:17,805 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:17,864 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:17,864 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:17,864 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:17,877 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 23:40:17,883 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:17,888 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:17,890 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:17,894 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:17,906 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:17,939 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:17,939 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-01-28 23:40:17,940 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-28 23:40:17,940 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-28 23:40:17,940 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 23:40:17,940 INFO L87 Difference]: Start difference. First operand 56 states and 60 transitions. Second operand 5 states. [2018-01-28 23:40:18,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:18,202 INFO L93 Difference]: Finished difference Result 83 states and 90 transitions. [2018-01-28 23:40:18,203 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-28 23:40:18,203 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2018-01-28 23:40:18,203 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:18,205 INFO L225 Difference]: With dead ends: 83 [2018-01-28 23:40:18,205 INFO L226 Difference]: Without dead ends: 77 [2018-01-28 23:40:18,205 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 22 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-28 23:40:18,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2018-01-28 23:40:18,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 70. [2018-01-28 23:40:18,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-01-28 23:40:18,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 76 transitions. [2018-01-28 23:40:18,213 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 76 transitions. Word has length 23 [2018-01-28 23:40:18,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:18,213 INFO L432 AbstractCegarLoop]: Abstraction has 70 states and 76 transitions. [2018-01-28 23:40:18,213 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-28 23:40:18,214 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 76 transitions. [2018-01-28 23:40:18,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-28 23:40:18,214 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:18,215 INFO L330 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:18,215 INFO L371 AbstractCegarLoop]: === Iteration 4 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:18,215 INFO L82 PathProgramCache]: Analyzing trace with hash 1171529612, now seen corresponding path program 3 times [2018-01-28 23:40:18,215 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:18,215 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:18,216 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:18,216 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:18,216 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:18,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:18,224 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:18,287 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:18,288 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:18,288 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:18,297 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-28 23:40:18,300 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:18,302 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:18,303 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:18,304 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:18,304 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:18,306 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:18,317 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:18,336 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:18,336 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-01-28 23:40:18,337 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-28 23:40:18,337 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-28 23:40:18,337 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 23:40:18,337 INFO L87 Difference]: Start difference. First operand 70 states and 76 transitions. Second operand 6 states. [2018-01-28 23:40:18,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:18,491 INFO L93 Difference]: Finished difference Result 98 states and 107 transitions. [2018-01-28 23:40:18,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-28 23:40:18,491 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-01-28 23:40:18,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:18,492 INFO L225 Difference]: With dead ends: 98 [2018-01-28 23:40:18,492 INFO L226 Difference]: Without dead ends: 92 [2018-01-28 23:40:18,493 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-28 23:40:18,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2018-01-28 23:40:18,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 84. [2018-01-28 23:40:18,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-01-28 23:40:18,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 92 transitions. [2018-01-28 23:40:18,501 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 92 transitions. Word has length 30 [2018-01-28 23:40:18,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:18,501 INFO L432 AbstractCegarLoop]: Abstraction has 84 states and 92 transitions. [2018-01-28 23:40:18,501 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-28 23:40:18,501 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 92 transitions. [2018-01-28 23:40:18,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-28 23:40:18,502 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:18,502 INFO L330 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:18,503 INFO L371 AbstractCegarLoop]: === Iteration 5 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:18,503 INFO L82 PathProgramCache]: Analyzing trace with hash -1927913174, now seen corresponding path program 4 times [2018-01-28 23:40:18,503 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:18,503 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:18,504 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:18,504 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:18,504 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:18,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:18,512 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:18,621 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:18,622 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:18,622 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:18,628 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-28 23:40:18,637 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:18,639 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:18,650 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:18,681 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:18,681 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-01-28 23:40:18,682 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-28 23:40:18,682 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-28 23:40:18,682 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-28 23:40:18,682 INFO L87 Difference]: Start difference. First operand 84 states and 92 transitions. Second operand 7 states. [2018-01-28 23:40:18,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:18,840 INFO L93 Difference]: Finished difference Result 113 states and 124 transitions. [2018-01-28 23:40:18,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-28 23:40:18,841 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 37 [2018-01-28 23:40:18,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:18,842 INFO L225 Difference]: With dead ends: 113 [2018-01-28 23:40:18,842 INFO L226 Difference]: Without dead ends: 107 [2018-01-28 23:40:18,843 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 36 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-28 23:40:18,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-01-28 23:40:18,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 98. [2018-01-28 23:40:18,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-01-28 23:40:18,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 108 transitions. [2018-01-28 23:40:18,853 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 108 transitions. Word has length 37 [2018-01-28 23:40:18,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:18,854 INFO L432 AbstractCegarLoop]: Abstraction has 98 states and 108 transitions. [2018-01-28 23:40:18,854 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-28 23:40:18,854 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 108 transitions. [2018-01-28 23:40:18,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-28 23:40:18,855 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:18,856 INFO L330 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:18,856 INFO L371 AbstractCegarLoop]: === Iteration 6 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:18,856 INFO L82 PathProgramCache]: Analyzing trace with hash 1089647052, now seen corresponding path program 5 times [2018-01-28 23:40:18,856 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:18,856 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:18,857 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:18,857 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:18,857 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:18,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:18,867 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:18,993 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 0 proven. 80 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:18,994 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:18,994 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:19,004 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-28 23:40:19,009 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:19,011 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:19,013 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:19,015 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:19,017 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:19,020 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:19,020 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:19,023 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:19,037 INFO L134 CoverageAnalysis]: Checked inductivity of 80 backedges. 0 proven. 80 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:19,056 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:19,056 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2018-01-28 23:40:19,056 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-28 23:40:19,057 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-28 23:40:19,057 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-28 23:40:19,057 INFO L87 Difference]: Start difference. First operand 98 states and 108 transitions. Second operand 8 states. [2018-01-28 23:40:19,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:19,311 INFO L93 Difference]: Finished difference Result 128 states and 141 transitions. [2018-01-28 23:40:19,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-28 23:40:19,311 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-01-28 23:40:19,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:19,313 INFO L225 Difference]: With dead ends: 128 [2018-01-28 23:40:19,313 INFO L226 Difference]: Without dead ends: 122 [2018-01-28 23:40:19,314 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-28 23:40:19,314 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-01-28 23:40:19,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 112. [2018-01-28 23:40:19,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-01-28 23:40:19,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 124 transitions. [2018-01-28 23:40:19,326 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 124 transitions. Word has length 44 [2018-01-28 23:40:19,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:19,326 INFO L432 AbstractCegarLoop]: Abstraction has 112 states and 124 transitions. [2018-01-28 23:40:19,326 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-28 23:40:19,327 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 124 transitions. [2018-01-28 23:40:19,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-28 23:40:19,328 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:19,328 INFO L330 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:19,329 INFO L371 AbstractCegarLoop]: === Iteration 7 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:19,329 INFO L82 PathProgramCache]: Analyzing trace with hash -669333782, now seen corresponding path program 6 times [2018-01-28 23:40:19,329 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:19,329 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:19,330 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:19,330 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:19,330 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:19,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:19,340 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:19,460 INFO L134 CoverageAnalysis]: Checked inductivity of 117 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:19,461 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:19,461 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:19,469 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-28 23:40:19,473 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:19,474 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:19,475 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:19,476 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:19,478 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:19,480 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:19,481 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:19,482 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:19,485 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:19,500 INFO L134 CoverageAnalysis]: Checked inductivity of 117 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:19,533 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:19,533 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2018-01-28 23:40:19,533 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-28 23:40:19,534 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-28 23:40:19,534 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-01-28 23:40:19,534 INFO L87 Difference]: Start difference. First operand 112 states and 124 transitions. Second operand 9 states. [2018-01-28 23:40:19,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:19,728 INFO L93 Difference]: Finished difference Result 143 states and 158 transitions. [2018-01-28 23:40:19,728 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-28 23:40:19,728 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 51 [2018-01-28 23:40:19,728 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:19,729 INFO L225 Difference]: With dead ends: 143 [2018-01-28 23:40:19,729 INFO L226 Difference]: Without dead ends: 137 [2018-01-28 23:40:19,730 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 50 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-01-28 23:40:19,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-01-28 23:40:19,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 126. [2018-01-28 23:40:19,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-01-28 23:40:19,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 140 transitions. [2018-01-28 23:40:19,738 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 140 transitions. Word has length 51 [2018-01-28 23:40:19,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:19,739 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 140 transitions. [2018-01-28 23:40:19,739 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-28 23:40:19,739 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 140 transitions. [2018-01-28 23:40:19,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-01-28 23:40:19,740 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:19,740 INFO L330 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:19,740 INFO L371 AbstractCegarLoop]: === Iteration 8 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:19,741 INFO L82 PathProgramCache]: Analyzing trace with hash 151278604, now seen corresponding path program 7 times [2018-01-28 23:40:19,741 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:19,741 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:19,741 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:19,741 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:19,742 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:19,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:19,752 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:19,956 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 0 proven. 161 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:19,956 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:19,957 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:19,968 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:40:19,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:19,982 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:19,999 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 0 proven. 161 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:20,021 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:20,022 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 9 [2018-01-28 23:40:20,022 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-28 23:40:20,022 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-28 23:40:20,022 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-28 23:40:20,022 INFO L87 Difference]: Start difference. First operand 126 states and 140 transitions. Second operand 10 states. [2018-01-28 23:40:20,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:20,326 INFO L93 Difference]: Finished difference Result 158 states and 175 transitions. [2018-01-28 23:40:20,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-28 23:40:20,326 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 58 [2018-01-28 23:40:20,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:20,328 INFO L225 Difference]: With dead ends: 158 [2018-01-28 23:40:20,328 INFO L226 Difference]: Without dead ends: 152 [2018-01-28 23:40:20,329 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 57 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-28 23:40:20,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-01-28 23:40:20,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 140. [2018-01-28 23:40:20,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-01-28 23:40:20,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 156 transitions. [2018-01-28 23:40:20,342 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 156 transitions. Word has length 58 [2018-01-28 23:40:20,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:20,343 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 156 transitions. [2018-01-28 23:40:20,343 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-28 23:40:20,343 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 156 transitions. [2018-01-28 23:40:20,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-01-28 23:40:20,345 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:20,345 INFO L330 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:20,345 INFO L371 AbstractCegarLoop]: === Iteration 9 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:20,345 INFO L82 PathProgramCache]: Analyzing trace with hash -2120606550, now seen corresponding path program 8 times [2018-01-28 23:40:20,345 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:20,346 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:20,346 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:20,346 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:40:20,347 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:20,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:20,356 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:20,482 INFO L134 CoverageAnalysis]: Checked inductivity of 212 backedges. 0 proven. 212 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:20,482 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:20,483 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:20,488 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 23:40:20,492 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:20,497 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:20,497 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:20,501 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:20,523 INFO L134 CoverageAnalysis]: Checked inductivity of 212 backedges. 0 proven. 212 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:20,544 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:20,545 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 10 [2018-01-28 23:40:20,545 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-28 23:40:20,545 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-28 23:40:20,546 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-28 23:40:20,546 INFO L87 Difference]: Start difference. First operand 140 states and 156 transitions. Second operand 11 states. [2018-01-28 23:40:21,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:21,024 INFO L93 Difference]: Finished difference Result 173 states and 192 transitions. [2018-01-28 23:40:21,025 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-28 23:40:21,025 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 65 [2018-01-28 23:40:21,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:21,027 INFO L225 Difference]: With dead ends: 173 [2018-01-28 23:40:21,027 INFO L226 Difference]: Without dead ends: 167 [2018-01-28 23:40:21,027 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 64 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-28 23:40:21,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-01-28 23:40:21,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 154. [2018-01-28 23:40:21,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-01-28 23:40:21,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 172 transitions. [2018-01-28 23:40:21,039 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 172 transitions. Word has length 65 [2018-01-28 23:40:21,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:21,039 INFO L432 AbstractCegarLoop]: Abstraction has 154 states and 172 transitions. [2018-01-28 23:40:21,040 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-28 23:40:21,040 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 172 transitions. [2018-01-28 23:40:21,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-01-28 23:40:21,041 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:21,041 INFO L330 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:21,041 INFO L371 AbstractCegarLoop]: === Iteration 10 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:21,042 INFO L82 PathProgramCache]: Analyzing trace with hash 795674188, now seen corresponding path program 9 times [2018-01-28 23:40:21,042 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:21,042 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:21,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:21,043 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:21,043 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:21,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:21,052 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:21,249 INFO L134 CoverageAnalysis]: Checked inductivity of 270 backedges. 0 proven. 270 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:21,250 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:21,250 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:21,260 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-28 23:40:21,266 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:21,269 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:21,271 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:21,273 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:21,274 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:21,276 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:21,279 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:21,281 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:21,283 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:21,286 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:21,287 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:21,289 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:21,323 INFO L134 CoverageAnalysis]: Checked inductivity of 270 backedges. 0 proven. 270 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:21,348 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:21,348 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-01-28 23:40:21,348 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-28 23:40:21,349 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-28 23:40:21,349 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-01-28 23:40:21,349 INFO L87 Difference]: Start difference. First operand 154 states and 172 transitions. Second operand 12 states. [2018-01-28 23:40:21,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:21,726 INFO L93 Difference]: Finished difference Result 188 states and 209 transitions. [2018-01-28 23:40:21,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-28 23:40:21,726 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 72 [2018-01-28 23:40:21,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:21,727 INFO L225 Difference]: With dead ends: 188 [2018-01-28 23:40:21,727 INFO L226 Difference]: Without dead ends: 182 [2018-01-28 23:40:21,727 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 71 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-01-28 23:40:21,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-01-28 23:40:21,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 168. [2018-01-28 23:40:21,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-01-28 23:40:21,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 188 transitions. [2018-01-28 23:40:21,735 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 188 transitions. Word has length 72 [2018-01-28 23:40:21,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:21,735 INFO L432 AbstractCegarLoop]: Abstraction has 168 states and 188 transitions. [2018-01-28 23:40:21,735 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-28 23:40:21,735 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 188 transitions. [2018-01-28 23:40:21,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-01-28 23:40:21,736 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:21,736 INFO L330 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:21,736 INFO L371 AbstractCegarLoop]: === Iteration 11 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:21,736 INFO L82 PathProgramCache]: Analyzing trace with hash 1605395050, now seen corresponding path program 10 times [2018-01-28 23:40:21,737 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:21,737 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:21,737 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:21,737 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:21,737 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:21,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:21,746 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:21,865 INFO L134 CoverageAnalysis]: Checked inductivity of 335 backedges. 0 proven. 335 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:21,866 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:21,866 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:21,873 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-28 23:40:21,884 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:21,887 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:21,906 INFO L134 CoverageAnalysis]: Checked inductivity of 335 backedges. 0 proven. 335 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:21,926 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:21,926 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 12 [2018-01-28 23:40:21,926 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-28 23:40:21,927 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-28 23:40:21,927 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-01-28 23:40:21,927 INFO L87 Difference]: Start difference. First operand 168 states and 188 transitions. Second operand 13 states. [2018-01-28 23:40:22,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:22,325 INFO L93 Difference]: Finished difference Result 203 states and 226 transitions. [2018-01-28 23:40:22,325 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-28 23:40:22,325 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 79 [2018-01-28 23:40:22,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:22,326 INFO L225 Difference]: With dead ends: 203 [2018-01-28 23:40:22,326 INFO L226 Difference]: Without dead ends: 197 [2018-01-28 23:40:22,327 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 78 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-01-28 23:40:22,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-01-28 23:40:22,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 182. [2018-01-28 23:40:22,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-28 23:40:22,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 204 transitions. [2018-01-28 23:40:22,334 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 204 transitions. Word has length 79 [2018-01-28 23:40:22,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:22,334 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 204 transitions. [2018-01-28 23:40:22,334 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-28 23:40:22,334 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 204 transitions. [2018-01-28 23:40:22,335 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-01-28 23:40:22,335 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:22,336 INFO L330 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:22,336 INFO L371 AbstractCegarLoop]: === Iteration 12 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:22,336 INFO L82 PathProgramCache]: Analyzing trace with hash 110151820, now seen corresponding path program 11 times [2018-01-28 23:40:22,336 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:22,336 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:22,337 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:22,337 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:22,337 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:22,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:22,344 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:22,493 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 0 proven. 407 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:22,493 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:22,493 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:22,502 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-28 23:40:22,507 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:22,509 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:22,511 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:22,512 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:22,514 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:22,516 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:22,518 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:22,521 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:22,524 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:22,527 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:22,530 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:22,535 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:22,535 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:22,539 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:22,570 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 0 proven. 407 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:22,605 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:22,605 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 13 [2018-01-28 23:40:22,605 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-28 23:40:22,606 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-28 23:40:22,606 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=157, Unknown=0, NotChecked=0, Total=182 [2018-01-28 23:40:22,606 INFO L87 Difference]: Start difference. First operand 182 states and 204 transitions. Second operand 14 states. [2018-01-28 23:40:23,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:23,157 INFO L93 Difference]: Finished difference Result 218 states and 243 transitions. [2018-01-28 23:40:23,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-28 23:40:23,158 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 86 [2018-01-28 23:40:23,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:23,159 INFO L225 Difference]: With dead ends: 218 [2018-01-28 23:40:23,159 INFO L226 Difference]: Without dead ends: 212 [2018-01-28 23:40:23,159 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 85 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=157, Unknown=0, NotChecked=0, Total=182 [2018-01-28 23:40:23,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2018-01-28 23:40:23,166 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 196. [2018-01-28 23:40:23,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2018-01-28 23:40:23,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 220 transitions. [2018-01-28 23:40:23,168 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 220 transitions. Word has length 86 [2018-01-28 23:40:23,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:23,169 INFO L432 AbstractCegarLoop]: Abstraction has 196 states and 220 transitions. [2018-01-28 23:40:23,169 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-28 23:40:23,169 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 220 transitions. [2018-01-28 23:40:23,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-01-28 23:40:23,170 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:23,171 INFO L330 BasicCegarLoop]: trace histogram [13, 12, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:23,171 INFO L371 AbstractCegarLoop]: === Iteration 13 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:23,171 INFO L82 PathProgramCache]: Analyzing trace with hash 1736022058, now seen corresponding path program 12 times [2018-01-28 23:40:23,171 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:23,171 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:23,172 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:23,172 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:23,172 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:23,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:23,180 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:23,367 INFO L134 CoverageAnalysis]: Checked inductivity of 486 backedges. 0 proven. 486 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:23,368 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:23,368 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:23,372 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-28 23:40:23,377 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:23,381 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:23,382 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:23,383 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:23,384 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:23,385 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:23,386 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:23,387 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:23,388 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:23,389 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:23,391 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:23,392 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:23,395 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:23,396 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:23,398 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:23,423 INFO L134 CoverageAnalysis]: Checked inductivity of 486 backedges. 0 proven. 486 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:23,444 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:23,444 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 14 [2018-01-28 23:40:23,444 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-28 23:40:23,444 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-28 23:40:23,445 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-01-28 23:40:23,445 INFO L87 Difference]: Start difference. First operand 196 states and 220 transitions. Second operand 15 states. [2018-01-28 23:40:23,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:23,933 INFO L93 Difference]: Finished difference Result 233 states and 260 transitions. [2018-01-28 23:40:23,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-28 23:40:23,933 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 93 [2018-01-28 23:40:23,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:23,935 INFO L225 Difference]: With dead ends: 233 [2018-01-28 23:40:23,935 INFO L226 Difference]: Without dead ends: 227 [2018-01-28 23:40:23,935 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 92 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-01-28 23:40:23,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2018-01-28 23:40:23,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 210. [2018-01-28 23:40:23,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2018-01-28 23:40:23,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 236 transitions. [2018-01-28 23:40:23,947 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 236 transitions. Word has length 93 [2018-01-28 23:40:23,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:23,947 INFO L432 AbstractCegarLoop]: Abstraction has 210 states and 236 transitions. [2018-01-28 23:40:23,948 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-28 23:40:23,948 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 236 transitions. [2018-01-28 23:40:23,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-01-28 23:40:23,949 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:23,949 INFO L330 BasicCegarLoop]: trace histogram [14, 13, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:23,950 INFO L371 AbstractCegarLoop]: === Iteration 14 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:23,950 INFO L82 PathProgramCache]: Analyzing trace with hash -506225972, now seen corresponding path program 13 times [2018-01-28 23:40:23,950 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:23,950 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:23,951 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:23,951 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:23,951 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:23,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:23,961 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:24,189 INFO L134 CoverageAnalysis]: Checked inductivity of 572 backedges. 0 proven. 572 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:24,189 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:24,189 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:24,196 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:40:24,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:24,208 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:24,228 INFO L134 CoverageAnalysis]: Checked inductivity of 572 backedges. 0 proven. 572 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:24,247 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:24,248 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 15 [2018-01-28 23:40:24,248 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-28 23:40:24,248 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-28 23:40:24,248 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=211, Unknown=0, NotChecked=0, Total=240 [2018-01-28 23:40:24,248 INFO L87 Difference]: Start difference. First operand 210 states and 236 transitions. Second operand 16 states. [2018-01-28 23:40:24,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:24,792 INFO L93 Difference]: Finished difference Result 248 states and 277 transitions. [2018-01-28 23:40:24,792 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-28 23:40:24,792 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 100 [2018-01-28 23:40:24,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:24,794 INFO L225 Difference]: With dead ends: 248 [2018-01-28 23:40:24,794 INFO L226 Difference]: Without dead ends: 242 [2018-01-28 23:40:24,795 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 99 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=211, Unknown=0, NotChecked=0, Total=240 [2018-01-28 23:40:24,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-01-28 23:40:24,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 224. [2018-01-28 23:40:24,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states. [2018-01-28 23:40:24,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 252 transitions. [2018-01-28 23:40:24,803 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 252 transitions. Word has length 100 [2018-01-28 23:40:24,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:24,803 INFO L432 AbstractCegarLoop]: Abstraction has 224 states and 252 transitions. [2018-01-28 23:40:24,803 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-28 23:40:24,803 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 252 transitions. [2018-01-28 23:40:24,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-01-28 23:40:24,804 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:24,804 INFO L330 BasicCegarLoop]: trace histogram [15, 14, 14, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:24,804 INFO L371 AbstractCegarLoop]: === Iteration 15 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:24,805 INFO L82 PathProgramCache]: Analyzing trace with hash 1829879274, now seen corresponding path program 14 times [2018-01-28 23:40:24,805 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:24,805 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:24,805 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:24,805 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:40:24,805 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:24,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:24,813 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:24,995 INFO L134 CoverageAnalysis]: Checked inductivity of 665 backedges. 0 proven. 665 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:24,996 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:24,996 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:25,001 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 23:40:25,004 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:25,010 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:25,012 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:25,014 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:25,043 INFO L134 CoverageAnalysis]: Checked inductivity of 665 backedges. 0 proven. 665 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:25,075 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:25,076 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 16 [2018-01-28 23:40:25,076 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-28 23:40:25,076 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-28 23:40:25,076 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=241, Unknown=0, NotChecked=0, Total=272 [2018-01-28 23:40:25,076 INFO L87 Difference]: Start difference. First operand 224 states and 252 transitions. Second operand 17 states. [2018-01-28 23:40:25,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:25,682 INFO L93 Difference]: Finished difference Result 263 states and 294 transitions. [2018-01-28 23:40:25,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-28 23:40:25,682 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 107 [2018-01-28 23:40:25,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:25,683 INFO L225 Difference]: With dead ends: 263 [2018-01-28 23:40:25,683 INFO L226 Difference]: Without dead ends: 257 [2018-01-28 23:40:25,684 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 106 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=241, Unknown=0, NotChecked=0, Total=272 [2018-01-28 23:40:25,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2018-01-28 23:40:25,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 238. [2018-01-28 23:40:25,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 238 states. [2018-01-28 23:40:25,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238 states to 238 states and 268 transitions. [2018-01-28 23:40:25,692 INFO L78 Accepts]: Start accepts. Automaton has 238 states and 268 transitions. Word has length 107 [2018-01-28 23:40:25,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:25,692 INFO L432 AbstractCegarLoop]: Abstraction has 238 states and 268 transitions. [2018-01-28 23:40:25,692 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-28 23:40:25,693 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states and 268 transitions. [2018-01-28 23:40:25,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-01-28 23:40:25,694 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:25,694 INFO L330 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:25,694 INFO L371 AbstractCegarLoop]: === Iteration 16 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:25,694 INFO L82 PathProgramCache]: Analyzing trace with hash 1436122380, now seen corresponding path program 15 times [2018-01-28 23:40:25,694 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:25,694 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:25,695 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:25,695 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:25,695 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:25,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:25,705 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:25,919 INFO L134 CoverageAnalysis]: Checked inductivity of 765 backedges. 0 proven. 765 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:25,919 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:25,920 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:25,926 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-28 23:40:25,930 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:25,931 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:25,932 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:25,933 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:25,935 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:25,936 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:25,938 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:25,939 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:25,941 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:25,943 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:25,946 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:25,948 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:25,951 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:25,953 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:25,955 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:25,958 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:25,959 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:25,962 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:25,995 INFO L134 CoverageAnalysis]: Checked inductivity of 765 backedges. 0 proven. 765 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:26,016 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:26,016 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 17 [2018-01-28 23:40:26,016 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-28 23:40:26,016 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-28 23:40:26,017 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=273, Unknown=0, NotChecked=0, Total=306 [2018-01-28 23:40:26,017 INFO L87 Difference]: Start difference. First operand 238 states and 268 transitions. Second operand 18 states. [2018-01-28 23:40:26,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:26,766 INFO L93 Difference]: Finished difference Result 278 states and 311 transitions. [2018-01-28 23:40:26,783 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-28 23:40:26,784 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 114 [2018-01-28 23:40:26,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:26,786 INFO L225 Difference]: With dead ends: 278 [2018-01-28 23:40:26,786 INFO L226 Difference]: Without dead ends: 272 [2018-01-28 23:40:26,787 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 113 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=273, Unknown=0, NotChecked=0, Total=306 [2018-01-28 23:40:26,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 272 states. [2018-01-28 23:40:26,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 272 to 252. [2018-01-28 23:40:26,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 252 states. [2018-01-28 23:40:26,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 252 states and 284 transitions. [2018-01-28 23:40:26,800 INFO L78 Accepts]: Start accepts. Automaton has 252 states and 284 transitions. Word has length 114 [2018-01-28 23:40:26,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:26,801 INFO L432 AbstractCegarLoop]: Abstraction has 252 states and 284 transitions. [2018-01-28 23:40:26,801 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-28 23:40:26,801 INFO L276 IsEmpty]: Start isEmpty. Operand 252 states and 284 transitions. [2018-01-28 23:40:26,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-01-28 23:40:26,802 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:26,803 INFO L330 BasicCegarLoop]: trace histogram [17, 16, 16, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:26,803 INFO L371 AbstractCegarLoop]: === Iteration 17 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:26,803 INFO L82 PathProgramCache]: Analyzing trace with hash -476785750, now seen corresponding path program 16 times [2018-01-28 23:40:26,803 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:26,803 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:26,804 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:26,804 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:26,804 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:26,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:26,814 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:27,059 INFO L134 CoverageAnalysis]: Checked inductivity of 872 backedges. 0 proven. 872 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:27,060 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:27,060 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:27,065 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-28 23:40:27,082 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:27,085 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:27,109 INFO L134 CoverageAnalysis]: Checked inductivity of 872 backedges. 0 proven. 872 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:27,129 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:27,129 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 18 [2018-01-28 23:40:27,129 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-28 23:40:27,129 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-28 23:40:27,129 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=307, Unknown=0, NotChecked=0, Total=342 [2018-01-28 23:40:27,129 INFO L87 Difference]: Start difference. First operand 252 states and 284 transitions. Second operand 19 states. [2018-01-28 23:40:27,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:27,911 INFO L93 Difference]: Finished difference Result 293 states and 328 transitions. [2018-01-28 23:40:27,911 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-28 23:40:27,911 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 121 [2018-01-28 23:40:27,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:27,913 INFO L225 Difference]: With dead ends: 293 [2018-01-28 23:40:27,913 INFO L226 Difference]: Without dead ends: 287 [2018-01-28 23:40:27,914 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 120 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=307, Unknown=0, NotChecked=0, Total=342 [2018-01-28 23:40:27,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 287 states. [2018-01-28 23:40:27,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 287 to 266. [2018-01-28 23:40:27,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 266 states. [2018-01-28 23:40:27,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 266 states to 266 states and 300 transitions. [2018-01-28 23:40:27,926 INFO L78 Accepts]: Start accepts. Automaton has 266 states and 300 transitions. Word has length 121 [2018-01-28 23:40:27,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:27,927 INFO L432 AbstractCegarLoop]: Abstraction has 266 states and 300 transitions. [2018-01-28 23:40:27,927 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-28 23:40:27,927 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 300 transitions. [2018-01-28 23:40:27,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-01-28 23:40:27,928 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:27,928 INFO L330 BasicCegarLoop]: trace histogram [18, 17, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:27,929 INFO L371 AbstractCegarLoop]: === Iteration 18 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:27,929 INFO L82 PathProgramCache]: Analyzing trace with hash 2001104716, now seen corresponding path program 17 times [2018-01-28 23:40:27,929 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:27,929 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:27,930 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:27,930 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:27,930 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:27,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:27,940 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:28,234 INFO L134 CoverageAnalysis]: Checked inductivity of 986 backedges. 0 proven. 986 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:28,234 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:28,234 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:28,239 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-28 23:40:28,244 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,245 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,256 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,260 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,261 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,266 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,268 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,272 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,276 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,281 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,284 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,287 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,291 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,295 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,300 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,305 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,311 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,318 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:28,319 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:28,327 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:28,353 INFO L134 CoverageAnalysis]: Checked inductivity of 986 backedges. 0 proven. 986 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:28,373 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:28,373 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 19 [2018-01-28 23:40:28,374 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-28 23:40:28,374 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-28 23:40:28,374 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=343, Unknown=0, NotChecked=0, Total=380 [2018-01-28 23:40:28,374 INFO L87 Difference]: Start difference. First operand 266 states and 300 transitions. Second operand 20 states. [2018-01-28 23:40:29,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:29,255 INFO L93 Difference]: Finished difference Result 308 states and 345 transitions. [2018-01-28 23:40:29,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-28 23:40:29,255 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 128 [2018-01-28 23:40:29,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:29,256 INFO L225 Difference]: With dead ends: 308 [2018-01-28 23:40:29,256 INFO L226 Difference]: Without dead ends: 302 [2018-01-28 23:40:29,257 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 127 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=37, Invalid=343, Unknown=0, NotChecked=0, Total=380 [2018-01-28 23:40:29,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 302 states. [2018-01-28 23:40:29,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 302 to 280. [2018-01-28 23:40:29,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 280 states. [2018-01-28 23:40:29,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 280 states to 280 states and 316 transitions. [2018-01-28 23:40:29,265 INFO L78 Accepts]: Start accepts. Automaton has 280 states and 316 transitions. Word has length 128 [2018-01-28 23:40:29,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:29,265 INFO L432 AbstractCegarLoop]: Abstraction has 280 states and 316 transitions. [2018-01-28 23:40:29,265 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-28 23:40:29,265 INFO L276 IsEmpty]: Start isEmpty. Operand 280 states and 316 transitions. [2018-01-28 23:40:29,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2018-01-28 23:40:29,266 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:29,266 INFO L330 BasicCegarLoop]: trace histogram [19, 18, 18, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:29,266 INFO L371 AbstractCegarLoop]: === Iteration 19 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:29,267 INFO L82 PathProgramCache]: Analyzing trace with hash -1658922646, now seen corresponding path program 18 times [2018-01-28 23:40:29,267 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:29,267 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:29,267 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:29,267 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:29,268 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:29,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:29,274 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:29,586 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 0 proven. 1107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:29,586 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:29,586 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:29,591 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-28 23:40:29,595 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,597 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,598 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,599 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,600 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,601 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,602 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,603 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,604 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,605 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,607 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,608 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,610 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,612 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,615 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,617 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,619 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,622 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,624 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:29,625 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:29,628 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:29,660 INFO L134 CoverageAnalysis]: Checked inductivity of 1107 backedges. 0 proven. 1107 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:29,680 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:29,681 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 20 [2018-01-28 23:40:29,681 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-28 23:40:29,681 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-28 23:40:29,681 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=381, Unknown=0, NotChecked=0, Total=420 [2018-01-28 23:40:29,681 INFO L87 Difference]: Start difference. First operand 280 states and 316 transitions. Second operand 21 states. [2018-01-28 23:40:30,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:30,960 INFO L93 Difference]: Finished difference Result 323 states and 362 transitions. [2018-01-28 23:40:30,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-28 23:40:30,961 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 135 [2018-01-28 23:40:30,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:30,962 INFO L225 Difference]: With dead ends: 323 [2018-01-28 23:40:30,962 INFO L226 Difference]: Without dead ends: 317 [2018-01-28 23:40:30,962 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 134 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=39, Invalid=381, Unknown=0, NotChecked=0, Total=420 [2018-01-28 23:40:30,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2018-01-28 23:40:30,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 294. [2018-01-28 23:40:30,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2018-01-28 23:40:30,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 332 transitions. [2018-01-28 23:40:30,973 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 332 transitions. Word has length 135 [2018-01-28 23:40:30,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:30,974 INFO L432 AbstractCegarLoop]: Abstraction has 294 states and 332 transitions. [2018-01-28 23:40:30,974 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-28 23:40:30,974 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 332 transitions. [2018-01-28 23:40:30,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-01-28 23:40:30,975 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:30,976 INFO L330 BasicCegarLoop]: trace histogram [20, 19, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:30,976 INFO L371 AbstractCegarLoop]: === Iteration 20 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:30,976 INFO L82 PathProgramCache]: Analyzing trace with hash 490631564, now seen corresponding path program 19 times [2018-01-28 23:40:30,976 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:30,976 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:30,977 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:30,977 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:30,977 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:30,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:30,987 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:31,315 INFO L134 CoverageAnalysis]: Checked inductivity of 1235 backedges. 0 proven. 1235 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:31,315 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:31,315 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:31,320 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:40:31,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:31,335 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:31,367 INFO L134 CoverageAnalysis]: Checked inductivity of 1235 backedges. 0 proven. 1235 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:31,388 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:31,388 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 21 [2018-01-28 23:40:31,389 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-28 23:40:31,389 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-28 23:40:31,389 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=421, Unknown=0, NotChecked=0, Total=462 [2018-01-28 23:40:31,389 INFO L87 Difference]: Start difference. First operand 294 states and 332 transitions. Second operand 22 states. [2018-01-28 23:40:32,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:32,424 INFO L93 Difference]: Finished difference Result 338 states and 379 transitions. [2018-01-28 23:40:32,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-28 23:40:32,425 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 142 [2018-01-28 23:40:32,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:32,426 INFO L225 Difference]: With dead ends: 338 [2018-01-28 23:40:32,426 INFO L226 Difference]: Without dead ends: 332 [2018-01-28 23:40:32,426 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 141 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=41, Invalid=421, Unknown=0, NotChecked=0, Total=462 [2018-01-28 23:40:32,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 332 states. [2018-01-28 23:40:32,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 332 to 308. [2018-01-28 23:40:32,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 308 states. [2018-01-28 23:40:32,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 348 transitions. [2018-01-28 23:40:32,434 INFO L78 Accepts]: Start accepts. Automaton has 308 states and 348 transitions. Word has length 142 [2018-01-28 23:40:32,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:32,434 INFO L432 AbstractCegarLoop]: Abstraction has 308 states and 348 transitions. [2018-01-28 23:40:32,434 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-28 23:40:32,434 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 348 transitions. [2018-01-28 23:40:32,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2018-01-28 23:40:32,435 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:32,435 INFO L330 BasicCegarLoop]: trace histogram [21, 20, 20, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:32,435 INFO L371 AbstractCegarLoop]: === Iteration 21 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:32,436 INFO L82 PathProgramCache]: Analyzing trace with hash -1966354646, now seen corresponding path program 20 times [2018-01-28 23:40:32,436 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:32,436 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:32,436 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:32,436 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:40:32,436 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:32,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:32,446 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:32,843 INFO L134 CoverageAnalysis]: Checked inductivity of 1370 backedges. 0 proven. 1370 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:32,843 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:32,843 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:32,848 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 23:40:32,852 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:32,862 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:32,863 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:32,866 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:32,917 INFO L134 CoverageAnalysis]: Checked inductivity of 1370 backedges. 0 proven. 1370 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:32,936 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:32,936 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 22 [2018-01-28 23:40:32,937 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-28 23:40:32,937 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-28 23:40:32,937 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=463, Unknown=0, NotChecked=0, Total=506 [2018-01-28 23:40:32,937 INFO L87 Difference]: Start difference. First operand 308 states and 348 transitions. Second operand 23 states. [2018-01-28 23:40:34,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:34,171 INFO L93 Difference]: Finished difference Result 353 states and 396 transitions. [2018-01-28 23:40:34,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-28 23:40:34,172 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 149 [2018-01-28 23:40:34,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:34,173 INFO L225 Difference]: With dead ends: 353 [2018-01-28 23:40:34,173 INFO L226 Difference]: Without dead ends: 347 [2018-01-28 23:40:34,173 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 148 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=43, Invalid=463, Unknown=0, NotChecked=0, Total=506 [2018-01-28 23:40:34,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2018-01-28 23:40:34,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 322. [2018-01-28 23:40:34,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 322 states. [2018-01-28 23:40:34,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 322 states to 322 states and 364 transitions. [2018-01-28 23:40:34,183 INFO L78 Accepts]: Start accepts. Automaton has 322 states and 364 transitions. Word has length 149 [2018-01-28 23:40:34,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:34,183 INFO L432 AbstractCegarLoop]: Abstraction has 322 states and 364 transitions. [2018-01-28 23:40:34,184 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-28 23:40:34,184 INFO L276 IsEmpty]: Start isEmpty. Operand 322 states and 364 transitions. [2018-01-28 23:40:34,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2018-01-28 23:40:34,185 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:34,186 INFO L330 BasicCegarLoop]: trace histogram [22, 21, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:34,186 INFO L371 AbstractCegarLoop]: === Iteration 22 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:34,186 INFO L82 PathProgramCache]: Analyzing trace with hash 518357964, now seen corresponding path program 21 times [2018-01-28 23:40:34,186 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:34,186 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:34,187 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:34,187 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:34,187 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:34,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:34,198 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:34,848 INFO L134 CoverageAnalysis]: Checked inductivity of 1512 backedges. 0 proven. 1512 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:34,848 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:34,848 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:34,853 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-28 23:40:34,858 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,860 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,861 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,862 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,863 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,865 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,867 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,868 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,870 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,871 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,873 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,875 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,878 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,881 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,884 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,886 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,890 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,894 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,898 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,903 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,908 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,914 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:34,915 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:34,919 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:34,975 INFO L134 CoverageAnalysis]: Checked inductivity of 1512 backedges. 0 proven. 1512 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:34,995 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:34,995 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 23 [2018-01-28 23:40:34,996 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-28 23:40:34,996 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-28 23:40:34,996 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=507, Unknown=0, NotChecked=0, Total=552 [2018-01-28 23:40:34,996 INFO L87 Difference]: Start difference. First operand 322 states and 364 transitions. Second operand 24 states. [2018-01-28 23:40:36,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:36,270 INFO L93 Difference]: Finished difference Result 368 states and 413 transitions. [2018-01-28 23:40:36,271 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-28 23:40:36,271 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 156 [2018-01-28 23:40:36,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:36,272 INFO L225 Difference]: With dead ends: 368 [2018-01-28 23:40:36,272 INFO L226 Difference]: Without dead ends: 362 [2018-01-28 23:40:36,273 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 178 GetRequests, 155 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=45, Invalid=507, Unknown=0, NotChecked=0, Total=552 [2018-01-28 23:40:36,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 362 states. [2018-01-28 23:40:36,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 362 to 336. [2018-01-28 23:40:36,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 336 states. [2018-01-28 23:40:36,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 336 states to 336 states and 380 transitions. [2018-01-28 23:40:36,284 INFO L78 Accepts]: Start accepts. Automaton has 336 states and 380 transitions. Word has length 156 [2018-01-28 23:40:36,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:36,284 INFO L432 AbstractCegarLoop]: Abstraction has 336 states and 380 transitions. [2018-01-28 23:40:36,285 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-28 23:40:36,285 INFO L276 IsEmpty]: Start isEmpty. Operand 336 states and 380 transitions. [2018-01-28 23:40:36,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2018-01-28 23:40:36,286 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:36,286 INFO L330 BasicCegarLoop]: trace histogram [23, 22, 22, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:36,287 INFO L371 AbstractCegarLoop]: === Iteration 23 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:36,287 INFO L82 PathProgramCache]: Analyzing trace with hash 2092414186, now seen corresponding path program 22 times [2018-01-28 23:40:36,287 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:36,287 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:36,288 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:36,288 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:36,288 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:36,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:36,298 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:36,690 INFO L134 CoverageAnalysis]: Checked inductivity of 1661 backedges. 0 proven. 1661 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:36,690 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:36,690 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:36,695 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-28 23:40:36,722 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:36,725 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:36,769 INFO L134 CoverageAnalysis]: Checked inductivity of 1661 backedges. 0 proven. 1661 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:36,802 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:36,802 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 24 [2018-01-28 23:40:36,803 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-28 23:40:36,803 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-28 23:40:36,803 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=553, Unknown=0, NotChecked=0, Total=600 [2018-01-28 23:40:36,803 INFO L87 Difference]: Start difference. First operand 336 states and 380 transitions. Second operand 25 states. [2018-01-28 23:40:38,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:38,225 INFO L93 Difference]: Finished difference Result 383 states and 430 transitions. [2018-01-28 23:40:38,225 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-28 23:40:38,225 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 163 [2018-01-28 23:40:38,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:38,226 INFO L225 Difference]: With dead ends: 383 [2018-01-28 23:40:38,226 INFO L226 Difference]: Without dead ends: 377 [2018-01-28 23:40:38,227 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 162 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=47, Invalid=553, Unknown=0, NotChecked=0, Total=600 [2018-01-28 23:40:38,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 377 states. [2018-01-28 23:40:38,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 377 to 350. [2018-01-28 23:40:38,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 350 states. [2018-01-28 23:40:38,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 350 states to 350 states and 396 transitions. [2018-01-28 23:40:38,237 INFO L78 Accepts]: Start accepts. Automaton has 350 states and 396 transitions. Word has length 163 [2018-01-28 23:40:38,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:38,238 INFO L432 AbstractCegarLoop]: Abstraction has 350 states and 396 transitions. [2018-01-28 23:40:38,238 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-28 23:40:38,238 INFO L276 IsEmpty]: Start isEmpty. Operand 350 states and 396 transitions. [2018-01-28 23:40:38,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2018-01-28 23:40:38,239 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:38,239 INFO L330 BasicCegarLoop]: trace histogram [24, 23, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:38,239 INFO L371 AbstractCegarLoop]: === Iteration 24 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:38,239 INFO L82 PathProgramCache]: Analyzing trace with hash -1801476596, now seen corresponding path program 23 times [2018-01-28 23:40:38,239 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:38,239 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:38,240 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:38,240 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:38,240 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:38,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:38,247 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:39,168 INFO L134 CoverageAnalysis]: Checked inductivity of 1817 backedges. 0 proven. 1817 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:39,169 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:39,169 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:39,174 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-28 23:40:39,179 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,181 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,182 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,183 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,184 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,186 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,187 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,189 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,191 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,194 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,197 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,200 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,203 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,208 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,213 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,218 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,224 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,229 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,237 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,244 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,250 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,257 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,265 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,274 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:39,275 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:39,278 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:39,341 INFO L134 CoverageAnalysis]: Checked inductivity of 1817 backedges. 0 proven. 1817 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:39,362 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:39,362 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 25 [2018-01-28 23:40:39,362 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-28 23:40:39,363 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-28 23:40:39,363 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=601, Unknown=0, NotChecked=0, Total=650 [2018-01-28 23:40:39,363 INFO L87 Difference]: Start difference. First operand 350 states and 396 transitions. Second operand 26 states. [2018-01-28 23:40:40,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:40,902 INFO L93 Difference]: Finished difference Result 398 states and 447 transitions. [2018-01-28 23:40:40,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-28 23:40:40,902 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 170 [2018-01-28 23:40:40,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:40,903 INFO L225 Difference]: With dead ends: 398 [2018-01-28 23:40:40,904 INFO L226 Difference]: Without dead ends: 392 [2018-01-28 23:40:40,904 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 169 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=49, Invalid=601, Unknown=0, NotChecked=0, Total=650 [2018-01-28 23:40:40,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2018-01-28 23:40:40,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 364. [2018-01-28 23:40:40,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 364 states. [2018-01-28 23:40:40,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 412 transitions. [2018-01-28 23:40:40,912 INFO L78 Accepts]: Start accepts. Automaton has 364 states and 412 transitions. Word has length 170 [2018-01-28 23:40:40,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:40,913 INFO L432 AbstractCegarLoop]: Abstraction has 364 states and 412 transitions. [2018-01-28 23:40:40,913 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-28 23:40:40,913 INFO L276 IsEmpty]: Start isEmpty. Operand 364 states and 412 transitions. [2018-01-28 23:40:40,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2018-01-28 23:40:40,914 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:40,914 INFO L330 BasicCegarLoop]: trace histogram [25, 24, 24, 24, 24, 24, 24, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:40,914 INFO L371 AbstractCegarLoop]: === Iteration 25 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:40,915 INFO L82 PathProgramCache]: Analyzing trace with hash -503412054, now seen corresponding path program 24 times [2018-01-28 23:40:40,915 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:40,915 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:40,915 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:40,916 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:40,916 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:40,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:40,924 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:41,589 INFO L134 CoverageAnalysis]: Checked inductivity of 1980 backedges. 0 proven. 1980 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:41,589 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:41,589 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:41,594 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-28 23:40:41,599 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,601 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,602 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,603 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,604 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,605 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,606 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,607 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,608 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,609 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,611 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,612 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,614 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,616 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,618 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,620 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,622 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,624 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,627 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,629 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,632 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,635 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,639 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,642 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,647 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:41,648 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:41,651 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:41,717 INFO L134 CoverageAnalysis]: Checked inductivity of 1980 backedges. 0 proven. 1980 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:41,738 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:41,739 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 26 [2018-01-28 23:40:41,739 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-28 23:40:41,739 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-28 23:40:41,739 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=651, Unknown=0, NotChecked=0, Total=702 [2018-01-28 23:40:41,740 INFO L87 Difference]: Start difference. First operand 364 states and 412 transitions. Second operand 27 states. [2018-01-28 23:40:43,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:43,448 INFO L93 Difference]: Finished difference Result 413 states and 464 transitions. [2018-01-28 23:40:43,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-28 23:40:43,449 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 177 [2018-01-28 23:40:43,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:43,450 INFO L225 Difference]: With dead ends: 413 [2018-01-28 23:40:43,450 INFO L226 Difference]: Without dead ends: 407 [2018-01-28 23:40:43,451 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 176 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=51, Invalid=651, Unknown=0, NotChecked=0, Total=702 [2018-01-28 23:40:43,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 407 states. [2018-01-28 23:40:43,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 407 to 378. [2018-01-28 23:40:43,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 378 states. [2018-01-28 23:40:43,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 378 states to 378 states and 428 transitions. [2018-01-28 23:40:43,463 INFO L78 Accepts]: Start accepts. Automaton has 378 states and 428 transitions. Word has length 177 [2018-01-28 23:40:43,464 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:43,464 INFO L432 AbstractCegarLoop]: Abstraction has 378 states and 428 transitions. [2018-01-28 23:40:43,464 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-28 23:40:43,464 INFO L276 IsEmpty]: Start isEmpty. Operand 378 states and 428 transitions. [2018-01-28 23:40:43,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2018-01-28 23:40:43,466 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:43,466 INFO L330 BasicCegarLoop]: trace histogram [26, 25, 25, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:43,466 INFO L371 AbstractCegarLoop]: === Iteration 26 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:43,466 INFO L82 PathProgramCache]: Analyzing trace with hash 399562828, now seen corresponding path program 25 times [2018-01-28 23:40:43,466 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:43,467 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:43,467 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:43,467 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:43,468 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:43,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:43,478 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:43,933 INFO L134 CoverageAnalysis]: Checked inductivity of 2150 backedges. 0 proven. 2150 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:43,934 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:43,934 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:43,939 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:40:43,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:43,958 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:44,003 INFO L134 CoverageAnalysis]: Checked inductivity of 2150 backedges. 0 proven. 2150 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:44,023 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:44,023 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27] total 27 [2018-01-28 23:40:44,024 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-28 23:40:44,024 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-28 23:40:44,024 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=703, Unknown=0, NotChecked=0, Total=756 [2018-01-28 23:40:44,024 INFO L87 Difference]: Start difference. First operand 378 states and 428 transitions. Second operand 28 states. [2018-01-28 23:40:45,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:45,770 INFO L93 Difference]: Finished difference Result 428 states and 481 transitions. [2018-01-28 23:40:45,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-28 23:40:45,770 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 184 [2018-01-28 23:40:45,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:45,772 INFO L225 Difference]: With dead ends: 428 [2018-01-28 23:40:45,772 INFO L226 Difference]: Without dead ends: 422 [2018-01-28 23:40:45,773 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 210 GetRequests, 183 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=53, Invalid=703, Unknown=0, NotChecked=0, Total=756 [2018-01-28 23:40:45,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 422 states. [2018-01-28 23:40:45,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 422 to 392. [2018-01-28 23:40:45,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 392 states. [2018-01-28 23:40:45,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 444 transitions. [2018-01-28 23:40:45,782 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 444 transitions. Word has length 184 [2018-01-28 23:40:45,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:45,783 INFO L432 AbstractCegarLoop]: Abstraction has 392 states and 444 transitions. [2018-01-28 23:40:45,783 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-28 23:40:45,783 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 444 transitions. [2018-01-28 23:40:45,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 192 [2018-01-28 23:40:45,784 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:45,784 INFO L330 BasicCegarLoop]: trace histogram [27, 26, 26, 26, 26, 26, 26, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:45,784 INFO L371 AbstractCegarLoop]: === Iteration 27 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:45,784 INFO L82 PathProgramCache]: Analyzing trace with hash -2000924566, now seen corresponding path program 26 times [2018-01-28 23:40:45,784 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:45,785 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:45,785 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:45,785 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:40:45,785 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:45,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:45,792 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:46,306 INFO L134 CoverageAnalysis]: Checked inductivity of 2327 backedges. 0 proven. 2327 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:46,306 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:46,306 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:46,311 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 23:40:46,318 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:46,336 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:46,338 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:46,343 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:46,401 INFO L134 CoverageAnalysis]: Checked inductivity of 2327 backedges. 0 proven. 2327 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:46,421 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:46,422 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28] total 28 [2018-01-28 23:40:46,422 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-28 23:40:46,422 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-28 23:40:46,422 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=757, Unknown=0, NotChecked=0, Total=812 [2018-01-28 23:40:46,422 INFO L87 Difference]: Start difference. First operand 392 states and 444 transitions. Second operand 29 states. [2018-01-28 23:40:48,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:48,385 INFO L93 Difference]: Finished difference Result 443 states and 498 transitions. [2018-01-28 23:40:48,429 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-28 23:40:48,429 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 191 [2018-01-28 23:40:48,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:48,431 INFO L225 Difference]: With dead ends: 443 [2018-01-28 23:40:48,431 INFO L226 Difference]: Without dead ends: 437 [2018-01-28 23:40:48,432 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 218 GetRequests, 190 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=55, Invalid=757, Unknown=0, NotChecked=0, Total=812 [2018-01-28 23:40:48,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 437 states. [2018-01-28 23:40:48,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 437 to 406. [2018-01-28 23:40:48,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 406 states. [2018-01-28 23:40:48,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 406 states to 406 states and 460 transitions. [2018-01-28 23:40:48,445 INFO L78 Accepts]: Start accepts. Automaton has 406 states and 460 transitions. Word has length 191 [2018-01-28 23:40:48,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:48,446 INFO L432 AbstractCegarLoop]: Abstraction has 406 states and 460 transitions. [2018-01-28 23:40:48,446 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-28 23:40:48,446 INFO L276 IsEmpty]: Start isEmpty. Operand 406 states and 460 transitions. [2018-01-28 23:40:48,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2018-01-28 23:40:48,448 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:48,448 INFO L330 BasicCegarLoop]: trace histogram [28, 27, 27, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:48,449 INFO L371 AbstractCegarLoop]: === Iteration 28 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:48,449 INFO L82 PathProgramCache]: Analyzing trace with hash 48044684, now seen corresponding path program 27 times [2018-01-28 23:40:48,449 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:48,449 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:48,450 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:48,450 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:48,450 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:48,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:48,461 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:49,145 INFO L134 CoverageAnalysis]: Checked inductivity of 2511 backedges. 0 proven. 2511 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:49,145 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:49,146 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:49,150 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-28 23:40:49,155 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,157 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,157 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,159 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,160 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,161 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,162 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,164 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,165 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,167 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,169 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,171 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,173 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,176 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,178 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,181 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,184 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,188 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,192 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,196 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,201 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,205 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,211 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,217 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,224 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,231 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,239 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,248 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:40:49,250 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:49,254 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:49,332 INFO L134 CoverageAnalysis]: Checked inductivity of 2511 backedges. 0 proven. 2511 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:49,353 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:49,353 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29] total 29 [2018-01-28 23:40:49,353 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-28 23:40:49,354 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-28 23:40:49,354 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=813, Unknown=0, NotChecked=0, Total=870 [2018-01-28 23:40:49,354 INFO L87 Difference]: Start difference. First operand 406 states and 460 transitions. Second operand 30 states. [2018-01-28 23:40:51,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:51,363 INFO L93 Difference]: Finished difference Result 458 states and 515 transitions. [2018-01-28 23:40:51,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-28 23:40:51,363 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 198 [2018-01-28 23:40:51,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:51,365 INFO L225 Difference]: With dead ends: 458 [2018-01-28 23:40:51,366 INFO L226 Difference]: Without dead ends: 452 [2018-01-28 23:40:51,366 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 197 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=57, Invalid=813, Unknown=0, NotChecked=0, Total=870 [2018-01-28 23:40:51,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 452 states. [2018-01-28 23:40:51,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 452 to 420. [2018-01-28 23:40:51,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 420 states. [2018-01-28 23:40:51,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 420 states to 420 states and 476 transitions. [2018-01-28 23:40:51,381 INFO L78 Accepts]: Start accepts. Automaton has 420 states and 476 transitions. Word has length 198 [2018-01-28 23:40:51,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:51,382 INFO L432 AbstractCegarLoop]: Abstraction has 420 states and 476 transitions. [2018-01-28 23:40:51,382 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-28 23:40:51,382 INFO L276 IsEmpty]: Start isEmpty. Operand 420 states and 476 transitions. [2018-01-28 23:40:51,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2018-01-28 23:40:51,384 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:51,384 INFO L330 BasicCegarLoop]: trace histogram [29, 28, 28, 28, 28, 28, 28, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:51,384 INFO L371 AbstractCegarLoop]: === Iteration 29 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:51,385 INFO L82 PathProgramCache]: Analyzing trace with hash 1577911850, now seen corresponding path program 28 times [2018-01-28 23:40:51,385 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:51,385 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:51,385 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:51,386 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:51,386 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:51,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:51,396 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:52,085 INFO L134 CoverageAnalysis]: Checked inductivity of 2702 backedges. 0 proven. 2702 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:52,085 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:52,085 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:52,091 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-28 23:40:52,128 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:52,132 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:52,199 INFO L134 CoverageAnalysis]: Checked inductivity of 2702 backedges. 0 proven. 2702 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:52,220 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:52,220 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30] total 30 [2018-01-28 23:40:52,221 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-28 23:40:52,221 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-28 23:40:52,221 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=871, Unknown=0, NotChecked=0, Total=930 [2018-01-28 23:40:52,221 INFO L87 Difference]: Start difference. First operand 420 states and 476 transitions. Second operand 31 states. [2018-01-28 23:40:54,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:54,322 INFO L93 Difference]: Finished difference Result 473 states and 532 transitions. [2018-01-28 23:40:54,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-28 23:40:54,322 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 205 [2018-01-28 23:40:54,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:54,324 INFO L225 Difference]: With dead ends: 473 [2018-01-28 23:40:54,324 INFO L226 Difference]: Without dead ends: 467 [2018-01-28 23:40:54,325 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 234 GetRequests, 204 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=59, Invalid=871, Unknown=0, NotChecked=0, Total=930 [2018-01-28 23:40:54,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 467 states. [2018-01-28 23:40:54,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 467 to 434. [2018-01-28 23:40:54,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 434 states. [2018-01-28 23:40:54,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 434 states to 434 states and 492 transitions. [2018-01-28 23:40:54,334 INFO L78 Accepts]: Start accepts. Automaton has 434 states and 492 transitions. Word has length 205 [2018-01-28 23:40:54,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:54,335 INFO L432 AbstractCegarLoop]: Abstraction has 434 states and 492 transitions. [2018-01-28 23:40:54,335 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-28 23:40:54,335 INFO L276 IsEmpty]: Start isEmpty. Operand 434 states and 492 transitions. [2018-01-28 23:40:54,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2018-01-28 23:40:54,336 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:54,336 INFO L330 BasicCegarLoop]: trace histogram [30, 29, 29, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:54,336 INFO L371 AbstractCegarLoop]: === Iteration 30 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:54,336 INFO L82 PathProgramCache]: Analyzing trace with hash -1322750772, now seen corresponding path program 29 times [2018-01-28 23:40:54,336 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:54,336 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:54,337 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:54,337 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:54,337 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:54,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:54,344 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:55,036 INFO L134 CoverageAnalysis]: Checked inductivity of 2900 backedges. 0 proven. 2900 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:55,037 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:55,037 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:55,042 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-28 23:40:55,046 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,047 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,048 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,049 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,050 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,051 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,052 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,054 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,055 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,057 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,059 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,061 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,064 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,067 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,070 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,074 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,078 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,082 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,086 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,091 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,097 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,103 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,110 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,118 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,127 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,137 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,147 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,159 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,172 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,186 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:40:55,187 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:55,191 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:55,254 INFO L134 CoverageAnalysis]: Checked inductivity of 2900 backedges. 0 proven. 2900 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:55,275 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:55,275 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31] total 31 [2018-01-28 23:40:55,275 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-28 23:40:55,276 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-28 23:40:55,276 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=931, Unknown=0, NotChecked=0, Total=992 [2018-01-28 23:40:55,276 INFO L87 Difference]: Start difference. First operand 434 states and 492 transitions. Second operand 32 states. [2018-01-28 23:40:57,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:40:57,477 INFO L93 Difference]: Finished difference Result 488 states and 549 transitions. [2018-01-28 23:40:57,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-28 23:40:57,477 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 212 [2018-01-28 23:40:57,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:40:57,478 INFO L225 Difference]: With dead ends: 488 [2018-01-28 23:40:57,479 INFO L226 Difference]: Without dead ends: 482 [2018-01-28 23:40:57,479 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 242 GetRequests, 211 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=61, Invalid=931, Unknown=0, NotChecked=0, Total=992 [2018-01-28 23:40:57,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 482 states. [2018-01-28 23:40:57,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 482 to 448. [2018-01-28 23:40:57,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 448 states. [2018-01-28 23:40:57,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 448 states to 448 states and 508 transitions. [2018-01-28 23:40:57,491 INFO L78 Accepts]: Start accepts. Automaton has 448 states and 508 transitions. Word has length 212 [2018-01-28 23:40:57,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:40:57,491 INFO L432 AbstractCegarLoop]: Abstraction has 448 states and 508 transitions. [2018-01-28 23:40:57,491 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-28 23:40:57,491 INFO L276 IsEmpty]: Start isEmpty. Operand 448 states and 508 transitions. [2018-01-28 23:40:57,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 220 [2018-01-28 23:40:57,493 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:40:57,494 INFO L330 BasicCegarLoop]: trace histogram [31, 30, 30, 30, 30, 30, 30, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:40:57,494 INFO L371 AbstractCegarLoop]: === Iteration 31 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:40:57,494 INFO L82 PathProgramCache]: Analyzing trace with hash 772582378, now seen corresponding path program 30 times [2018-01-28 23:40:57,494 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:40:57,494 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:40:57,495 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:57,495 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:40:57,495 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:40:57,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:40:57,505 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:40:58,394 INFO L134 CoverageAnalysis]: Checked inductivity of 3105 backedges. 0 proven. 3105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:58,394 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:40:58,394 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:40:58,399 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-28 23:40:58,403 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,404 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,405 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,406 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,407 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,409 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,410 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,411 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,413 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,415 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,416 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,418 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,419 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,421 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,422 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,424 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,426 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,428 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,430 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,433 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,436 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,438 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,441 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,445 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,448 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,452 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,456 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,464 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,477 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,483 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,489 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:40:58,490 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:40:58,495 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:40:58,589 INFO L134 CoverageAnalysis]: Checked inductivity of 3105 backedges. 0 proven. 3105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:40:58,620 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:40:58,620 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 32 [2018-01-28 23:40:58,620 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-28 23:40:58,620 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-28 23:40:58,621 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=993, Unknown=0, NotChecked=0, Total=1056 [2018-01-28 23:40:58,621 INFO L87 Difference]: Start difference. First operand 448 states and 508 transitions. Second operand 33 states. [2018-01-28 23:41:01,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:41:01,189 INFO L93 Difference]: Finished difference Result 503 states and 566 transitions. [2018-01-28 23:41:01,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-28 23:41:01,189 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 219 [2018-01-28 23:41:01,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:41:01,191 INFO L225 Difference]: With dead ends: 503 [2018-01-28 23:41:01,191 INFO L226 Difference]: Without dead ends: 497 [2018-01-28 23:41:01,192 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 250 GetRequests, 218 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=63, Invalid=993, Unknown=0, NotChecked=0, Total=1056 [2018-01-28 23:41:01,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 497 states. [2018-01-28 23:41:01,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 497 to 462. [2018-01-28 23:41:01,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 462 states. [2018-01-28 23:41:01,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 462 states to 462 states and 524 transitions. [2018-01-28 23:41:01,202 INFO L78 Accepts]: Start accepts. Automaton has 462 states and 524 transitions. Word has length 219 [2018-01-28 23:41:01,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:41:01,203 INFO L432 AbstractCegarLoop]: Abstraction has 462 states and 524 transitions. [2018-01-28 23:41:01,203 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-28 23:41:01,203 INFO L276 IsEmpty]: Start isEmpty. Operand 462 states and 524 transitions. [2018-01-28 23:41:01,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2018-01-28 23:41:01,212 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:41:01,212 INFO L330 BasicCegarLoop]: trace histogram [32, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:41:01,212 INFO L371 AbstractCegarLoop]: === Iteration 32 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:41:01,213 INFO L82 PathProgramCache]: Analyzing trace with hash -1089024244, now seen corresponding path program 31 times [2018-01-28 23:41:01,213 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:41:01,213 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:41:01,214 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:01,214 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:41:01,214 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:01,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:41:01,224 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:41:01,886 INFO L134 CoverageAnalysis]: Checked inductivity of 3317 backedges. 0 proven. 3317 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:01,886 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:41:01,886 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:41:01,891 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:41:01,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:41:01,912 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:41:01,979 INFO L134 CoverageAnalysis]: Checked inductivity of 3317 backedges. 0 proven. 3317 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:01,999 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:41:01,999 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33] total 33 [2018-01-28 23:41:01,999 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-28 23:41:02,000 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-28 23:41:02,000 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=1057, Unknown=0, NotChecked=0, Total=1122 [2018-01-28 23:41:02,000 INFO L87 Difference]: Start difference. First operand 462 states and 524 transitions. Second operand 34 states. [2018-01-28 23:41:04,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:41:04,496 INFO L93 Difference]: Finished difference Result 518 states and 583 transitions. [2018-01-28 23:41:04,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-28 23:41:04,496 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 226 [2018-01-28 23:41:04,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:41:04,498 INFO L225 Difference]: With dead ends: 518 [2018-01-28 23:41:04,498 INFO L226 Difference]: Without dead ends: 512 [2018-01-28 23:41:04,498 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 258 GetRequests, 225 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=65, Invalid=1057, Unknown=0, NotChecked=0, Total=1122 [2018-01-28 23:41:04,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 512 states. [2018-01-28 23:41:04,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 512 to 476. [2018-01-28 23:41:04,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 476 states. [2018-01-28 23:41:04,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 476 states to 476 states and 540 transitions. [2018-01-28 23:41:04,510 INFO L78 Accepts]: Start accepts. Automaton has 476 states and 540 transitions. Word has length 226 [2018-01-28 23:41:04,510 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:41:04,510 INFO L432 AbstractCegarLoop]: Abstraction has 476 states and 540 transitions. [2018-01-28 23:41:04,510 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-28 23:41:04,511 INFO L276 IsEmpty]: Start isEmpty. Operand 476 states and 540 transitions. [2018-01-28 23:41:04,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 234 [2018-01-28 23:41:04,512 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:41:04,513 INFO L330 BasicCegarLoop]: trace histogram [33, 32, 32, 32, 32, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:41:04,513 INFO L371 AbstractCegarLoop]: === Iteration 33 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:41:04,513 INFO L82 PathProgramCache]: Analyzing trace with hash 1675051434, now seen corresponding path program 32 times [2018-01-28 23:41:04,513 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:41:04,513 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:41:04,514 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:04,514 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:41:04,514 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:04,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:41:04,526 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:41:05,250 INFO L134 CoverageAnalysis]: Checked inductivity of 3536 backedges. 0 proven. 3536 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:05,250 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:41:05,251 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:41:05,260 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 23:41:05,265 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:05,279 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:05,281 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:41:05,284 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:41:05,355 INFO L134 CoverageAnalysis]: Checked inductivity of 3536 backedges. 0 proven. 3536 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:05,388 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:41:05,388 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34] total 34 [2018-01-28 23:41:05,388 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-28 23:41:05,389 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-28 23:41:05,389 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=1123, Unknown=0, NotChecked=0, Total=1190 [2018-01-28 23:41:05,389 INFO L87 Difference]: Start difference. First operand 476 states and 540 transitions. Second operand 35 states. [2018-01-28 23:41:08,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:41:08,061 INFO L93 Difference]: Finished difference Result 533 states and 600 transitions. [2018-01-28 23:41:08,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-28 23:41:08,061 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 233 [2018-01-28 23:41:08,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:41:08,063 INFO L225 Difference]: With dead ends: 533 [2018-01-28 23:41:08,063 INFO L226 Difference]: Without dead ends: 527 [2018-01-28 23:41:08,063 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 266 GetRequests, 232 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=67, Invalid=1123, Unknown=0, NotChecked=0, Total=1190 [2018-01-28 23:41:08,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 527 states. [2018-01-28 23:41:08,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 527 to 490. [2018-01-28 23:41:08,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 490 states. [2018-01-28 23:41:08,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 490 states to 490 states and 556 transitions. [2018-01-28 23:41:08,075 INFO L78 Accepts]: Start accepts. Automaton has 490 states and 556 transitions. Word has length 233 [2018-01-28 23:41:08,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:41:08,075 INFO L432 AbstractCegarLoop]: Abstraction has 490 states and 556 transitions. [2018-01-28 23:41:08,075 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-28 23:41:08,076 INFO L276 IsEmpty]: Start isEmpty. Operand 490 states and 556 transitions. [2018-01-28 23:41:08,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 241 [2018-01-28 23:41:08,078 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:41:08,078 INFO L330 BasicCegarLoop]: trace histogram [34, 33, 33, 33, 33, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:41:08,078 INFO L371 AbstractCegarLoop]: === Iteration 34 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:41:08,078 INFO L82 PathProgramCache]: Analyzing trace with hash 1242317132, now seen corresponding path program 33 times [2018-01-28 23:41:08,078 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:41:08,078 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:41:08,079 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:08,079 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:41:08,079 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:08,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:41:08,090 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:41:08,751 INFO L134 CoverageAnalysis]: Checked inductivity of 3762 backedges. 0 proven. 3762 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:08,751 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:41:08,751 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:41:08,756 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-28 23:41:08,761 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,762 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,763 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,763 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,764 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,766 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,767 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,768 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,769 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,771 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,773 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,775 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,778 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,780 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,782 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,785 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,788 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,791 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,795 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,799 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,803 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,807 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,812 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,817 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,823 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,829 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,837 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,845 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,857 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,866 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,877 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,889 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,902 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,915 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:08,917 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:41:08,920 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:41:08,988 INFO L134 CoverageAnalysis]: Checked inductivity of 3762 backedges. 0 proven. 3762 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:09,008 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:41:09,008 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35] total 35 [2018-01-28 23:41:09,009 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-28 23:41:09,009 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-28 23:41:09,009 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=1191, Unknown=0, NotChecked=0, Total=1260 [2018-01-28 23:41:09,009 INFO L87 Difference]: Start difference. First operand 490 states and 556 transitions. Second operand 36 states. [2018-01-28 23:41:11,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:41:11,809 INFO L93 Difference]: Finished difference Result 548 states and 617 transitions. [2018-01-28 23:41:11,809 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-28 23:41:11,810 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 240 [2018-01-28 23:41:11,810 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:41:11,811 INFO L225 Difference]: With dead ends: 548 [2018-01-28 23:41:11,811 INFO L226 Difference]: Without dead ends: 542 [2018-01-28 23:41:11,812 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 274 GetRequests, 239 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=69, Invalid=1191, Unknown=0, NotChecked=0, Total=1260 [2018-01-28 23:41:11,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 542 states. [2018-01-28 23:41:11,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 542 to 504. [2018-01-28 23:41:11,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 504 states. [2018-01-28 23:41:11,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 504 states to 504 states and 572 transitions. [2018-01-28 23:41:11,820 INFO L78 Accepts]: Start accepts. Automaton has 504 states and 572 transitions. Word has length 240 [2018-01-28 23:41:11,820 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:41:11,820 INFO L432 AbstractCegarLoop]: Abstraction has 504 states and 572 transitions. [2018-01-28 23:41:11,820 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-28 23:41:11,820 INFO L276 IsEmpty]: Start isEmpty. Operand 504 states and 572 transitions. [2018-01-28 23:41:11,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 248 [2018-01-28 23:41:11,822 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:41:11,822 INFO L330 BasicCegarLoop]: trace histogram [35, 34, 34, 34, 34, 34, 34, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:41:11,822 INFO L371 AbstractCegarLoop]: === Iteration 35 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:41:11,823 INFO L82 PathProgramCache]: Analyzing trace with hash -913782934, now seen corresponding path program 34 times [2018-01-28 23:41:11,823 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:41:11,823 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:41:11,823 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:11,824 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:41:11,824 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:11,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:41:11,833 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:41:12,533 INFO L134 CoverageAnalysis]: Checked inductivity of 3995 backedges. 0 proven. 3995 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:12,533 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:41:12,533 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:41:12,538 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-28 23:41:12,604 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:41:12,608 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:41:12,684 INFO L134 CoverageAnalysis]: Checked inductivity of 3995 backedges. 0 proven. 3995 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:12,705 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:41:12,706 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36] total 36 [2018-01-28 23:41:12,706 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-28 23:41:12,706 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-28 23:41:12,706 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=71, Invalid=1261, Unknown=0, NotChecked=0, Total=1332 [2018-01-28 23:41:12,706 INFO L87 Difference]: Start difference. First operand 504 states and 572 transitions. Second operand 37 states. [2018-01-28 23:41:16,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:41:16,447 INFO L93 Difference]: Finished difference Result 563 states and 634 transitions. [2018-01-28 23:41:16,447 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-28 23:41:16,447 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 247 [2018-01-28 23:41:16,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:41:16,449 INFO L225 Difference]: With dead ends: 563 [2018-01-28 23:41:16,449 INFO L226 Difference]: Without dead ends: 557 [2018-01-28 23:41:16,450 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 282 GetRequests, 246 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=71, Invalid=1261, Unknown=0, NotChecked=0, Total=1332 [2018-01-28 23:41:16,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 557 states. [2018-01-28 23:41:16,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 557 to 518. [2018-01-28 23:41:16,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 518 states. [2018-01-28 23:41:16,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 518 states to 518 states and 588 transitions. [2018-01-28 23:41:16,458 INFO L78 Accepts]: Start accepts. Automaton has 518 states and 588 transitions. Word has length 247 [2018-01-28 23:41:16,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:41:16,459 INFO L432 AbstractCegarLoop]: Abstraction has 518 states and 588 transitions. [2018-01-28 23:41:16,459 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-28 23:41:16,459 INFO L276 IsEmpty]: Start isEmpty. Operand 518 states and 588 transitions. [2018-01-28 23:41:16,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 255 [2018-01-28 23:41:16,460 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:41:16,460 INFO L330 BasicCegarLoop]: trace histogram [36, 35, 35, 35, 35, 35, 35, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:41:16,460 INFO L371 AbstractCegarLoop]: === Iteration 36 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:41:16,460 INFO L82 PathProgramCache]: Analyzing trace with hash 812434316, now seen corresponding path program 35 times [2018-01-28 23:41:16,460 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:41:16,460 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:41:16,461 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:16,461 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:41:16,461 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:16,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:41:16,468 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:41:17,201 INFO L134 CoverageAnalysis]: Checked inductivity of 4235 backedges. 0 proven. 4235 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:17,201 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:41:17,202 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:41:17,209 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-28 23:41:17,214 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,216 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,217 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,218 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,219 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,221 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,223 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,225 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,227 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,229 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,232 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,236 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,240 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,244 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,248 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,262 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,266 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,271 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,275 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,281 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,287 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,294 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,301 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,309 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,317 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,327 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,338 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,350 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,362 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,376 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,391 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,408 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,426 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,445 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,467 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,490 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:17,492 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:41:17,497 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:41:17,654 INFO L134 CoverageAnalysis]: Checked inductivity of 4235 backedges. 0 proven. 4235 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:17,676 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:41:17,676 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37] total 37 [2018-01-28 23:41:17,676 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-28 23:41:17,676 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-28 23:41:17,677 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=1333, Unknown=0, NotChecked=0, Total=1406 [2018-01-28 23:41:17,677 INFO L87 Difference]: Start difference. First operand 518 states and 588 transitions. Second operand 38 states. [2018-01-28 23:41:20,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:41:20,790 INFO L93 Difference]: Finished difference Result 578 states and 651 transitions. [2018-01-28 23:41:20,790 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-28 23:41:20,790 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 254 [2018-01-28 23:41:20,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:41:20,792 INFO L225 Difference]: With dead ends: 578 [2018-01-28 23:41:20,792 INFO L226 Difference]: Without dead ends: 572 [2018-01-28 23:41:20,792 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 290 GetRequests, 253 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=73, Invalid=1333, Unknown=0, NotChecked=0, Total=1406 [2018-01-28 23:41:20,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 572 states. [2018-01-28 23:41:20,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 572 to 532. [2018-01-28 23:41:20,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 532 states. [2018-01-28 23:41:20,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 532 states to 532 states and 604 transitions. [2018-01-28 23:41:20,801 INFO L78 Accepts]: Start accepts. Automaton has 532 states and 604 transitions. Word has length 254 [2018-01-28 23:41:20,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:41:20,801 INFO L432 AbstractCegarLoop]: Abstraction has 532 states and 604 transitions. [2018-01-28 23:41:20,801 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-28 23:41:20,801 INFO L276 IsEmpty]: Start isEmpty. Operand 532 states and 604 transitions. [2018-01-28 23:41:20,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 262 [2018-01-28 23:41:20,802 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:41:20,802 INFO L330 BasicCegarLoop]: trace histogram [37, 36, 36, 36, 36, 36, 36, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:41:20,802 INFO L371 AbstractCegarLoop]: === Iteration 37 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:41:20,803 INFO L82 PathProgramCache]: Analyzing trace with hash 1211972906, now seen corresponding path program 36 times [2018-01-28 23:41:20,803 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:41:20,803 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:41:20,803 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:20,803 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:41:20,803 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:20,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:41:20,811 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:41:21,632 INFO L134 CoverageAnalysis]: Checked inductivity of 4482 backedges. 0 proven. 4482 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:21,633 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:41:21,651 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:41:21,657 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-28 23:41:21,663 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,672 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,686 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,700 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,714 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,728 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,742 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,754 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,756 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,758 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,760 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,762 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,764 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,766 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,768 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,770 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,773 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,776 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,780 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,783 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,787 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,791 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,796 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,801 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,805 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,809 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,813 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,817 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,822 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,826 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,831 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,836 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,842 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,849 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,857 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,866 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,875 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:21,877 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:41:21,880 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:41:21,960 INFO L134 CoverageAnalysis]: Checked inductivity of 4482 backedges. 0 proven. 4482 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:21,981 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:41:21,981 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38] total 38 [2018-01-28 23:41:21,982 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-28 23:41:21,982 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-28 23:41:21,982 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=1407, Unknown=0, NotChecked=0, Total=1482 [2018-01-28 23:41:21,983 INFO L87 Difference]: Start difference. First operand 532 states and 604 transitions. Second operand 39 states. [2018-01-28 23:41:25,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:41:25,278 INFO L93 Difference]: Finished difference Result 593 states and 668 transitions. [2018-01-28 23:41:25,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-28 23:41:25,279 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 261 [2018-01-28 23:41:25,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:41:25,280 INFO L225 Difference]: With dead ends: 593 [2018-01-28 23:41:25,281 INFO L226 Difference]: Without dead ends: 587 [2018-01-28 23:41:25,281 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 298 GetRequests, 260 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=75, Invalid=1407, Unknown=0, NotChecked=0, Total=1482 [2018-01-28 23:41:25,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 587 states. [2018-01-28 23:41:25,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 587 to 546. [2018-01-28 23:41:25,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 546 states. [2018-01-28 23:41:25,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 546 states to 546 states and 620 transitions. [2018-01-28 23:41:25,290 INFO L78 Accepts]: Start accepts. Automaton has 546 states and 620 transitions. Word has length 261 [2018-01-28 23:41:25,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:41:25,290 INFO L432 AbstractCegarLoop]: Abstraction has 546 states and 620 transitions. [2018-01-28 23:41:25,290 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-28 23:41:25,290 INFO L276 IsEmpty]: Start isEmpty. Operand 546 states and 620 transitions. [2018-01-28 23:41:25,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 269 [2018-01-28 23:41:25,292 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:41:25,292 INFO L330 BasicCegarLoop]: trace histogram [38, 37, 37, 37, 37, 37, 37, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:41:25,292 INFO L371 AbstractCegarLoop]: === Iteration 38 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:41:25,292 INFO L82 PathProgramCache]: Analyzing trace with hash 1369200076, now seen corresponding path program 37 times [2018-01-28 23:41:25,292 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:41:25,293 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:41:25,293 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:25,293 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:41:25,293 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:25,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:41:25,302 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:41:26,065 INFO L134 CoverageAnalysis]: Checked inductivity of 4736 backedges. 0 proven. 4736 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:26,065 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:41:26,065 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:41:26,070 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:41:26,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:41:26,109 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:41:26,221 INFO L134 CoverageAnalysis]: Checked inductivity of 4736 backedges. 0 proven. 4736 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:26,254 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:41:26,254 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39] total 39 [2018-01-28 23:41:26,255 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-28 23:41:26,255 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-28 23:41:26,255 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=1483, Unknown=0, NotChecked=0, Total=1560 [2018-01-28 23:41:26,255 INFO L87 Difference]: Start difference. First operand 546 states and 620 transitions. Second operand 40 states. [2018-01-28 23:41:29,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:41:29,763 INFO L93 Difference]: Finished difference Result 608 states and 685 transitions. [2018-01-28 23:41:29,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-28 23:41:29,764 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 268 [2018-01-28 23:41:29,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:41:29,766 INFO L225 Difference]: With dead ends: 608 [2018-01-28 23:41:29,766 INFO L226 Difference]: Without dead ends: 602 [2018-01-28 23:41:29,766 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 306 GetRequests, 267 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=77, Invalid=1483, Unknown=0, NotChecked=0, Total=1560 [2018-01-28 23:41:29,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 602 states. [2018-01-28 23:41:29,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 602 to 560. [2018-01-28 23:41:29,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 560 states. [2018-01-28 23:41:29,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 560 states to 560 states and 636 transitions. [2018-01-28 23:41:29,775 INFO L78 Accepts]: Start accepts. Automaton has 560 states and 636 transitions. Word has length 268 [2018-01-28 23:41:29,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:41:29,776 INFO L432 AbstractCegarLoop]: Abstraction has 560 states and 636 transitions. [2018-01-28 23:41:29,776 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-28 23:41:29,776 INFO L276 IsEmpty]: Start isEmpty. Operand 560 states and 636 transitions. [2018-01-28 23:41:29,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 276 [2018-01-28 23:41:29,777 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:41:29,777 INFO L330 BasicCegarLoop]: trace histogram [39, 38, 38, 38, 38, 38, 38, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:41:29,777 INFO L371 AbstractCegarLoop]: === Iteration 39 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:41:29,777 INFO L82 PathProgramCache]: Analyzing trace with hash -1475304726, now seen corresponding path program 38 times [2018-01-28 23:41:29,777 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:41:29,777 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:41:29,778 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:29,778 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:41:29,778 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:29,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:41:29,786 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:41:30,640 INFO L134 CoverageAnalysis]: Checked inductivity of 4997 backedges. 0 proven. 4997 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:30,640 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:41:30,640 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:41:30,645 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 23:41:30,652 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:30,671 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:30,675 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:41:30,679 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:41:30,840 INFO L134 CoverageAnalysis]: Checked inductivity of 4997 backedges. 0 proven. 4997 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:30,859 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:41:30,860 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40] total 40 [2018-01-28 23:41:30,860 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-28 23:41:30,860 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-28 23:41:30,860 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=79, Invalid=1561, Unknown=0, NotChecked=0, Total=1640 [2018-01-28 23:41:30,860 INFO L87 Difference]: Start difference. First operand 560 states and 636 transitions. Second operand 41 states. [2018-01-28 23:41:34,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:41:34,502 INFO L93 Difference]: Finished difference Result 623 states and 702 transitions. [2018-01-28 23:41:34,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-28 23:41:34,502 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 275 [2018-01-28 23:41:34,503 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:41:34,505 INFO L225 Difference]: With dead ends: 623 [2018-01-28 23:41:34,505 INFO L226 Difference]: Without dead ends: 617 [2018-01-28 23:41:34,506 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 314 GetRequests, 274 SyntacticMatches, 1 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=79, Invalid=1561, Unknown=0, NotChecked=0, Total=1640 [2018-01-28 23:41:34,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 617 states. [2018-01-28 23:41:34,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 617 to 574. [2018-01-28 23:41:34,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 574 states. [2018-01-28 23:41:34,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 574 states to 574 states and 652 transitions. [2018-01-28 23:41:34,520 INFO L78 Accepts]: Start accepts. Automaton has 574 states and 652 transitions. Word has length 275 [2018-01-28 23:41:34,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:41:34,521 INFO L432 AbstractCegarLoop]: Abstraction has 574 states and 652 transitions. [2018-01-28 23:41:34,521 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-28 23:41:34,521 INFO L276 IsEmpty]: Start isEmpty. Operand 574 states and 652 transitions. [2018-01-28 23:41:34,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 283 [2018-01-28 23:41:34,523 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:41:34,523 INFO L330 BasicCegarLoop]: trace histogram [40, 39, 39, 39, 39, 39, 39, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:41:34,523 INFO L371 AbstractCegarLoop]: === Iteration 40 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:41:34,523 INFO L82 PathProgramCache]: Analyzing trace with hash -838928372, now seen corresponding path program 39 times [2018-01-28 23:41:34,523 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:41:34,524 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:41:34,524 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:34,524 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:41:34,524 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:34,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:41:34,534 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:41:35,423 INFO L134 CoverageAnalysis]: Checked inductivity of 5265 backedges. 0 proven. 5265 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:35,423 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:41:35,452 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:41:35,457 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-28 23:41:35,462 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,462 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,463 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,464 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,465 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,466 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,467 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,468 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,470 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,471 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,473 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,475 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,477 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,479 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,481 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,484 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,486 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,489 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,493 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,497 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,502 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,506 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,510 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,516 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,522 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,529 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,536 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,545 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,553 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,562 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,572 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,584 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,596 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,609 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,625 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,640 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,656 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,674 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,694 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,715 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:41:35,718 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:41:35,721 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:41:35,813 INFO L134 CoverageAnalysis]: Checked inductivity of 5265 backedges. 0 proven. 5265 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:35,834 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:41:35,834 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41] total 41 [2018-01-28 23:41:35,835 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-28 23:41:35,835 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-28 23:41:35,835 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=1641, Unknown=0, NotChecked=0, Total=1722 [2018-01-28 23:41:35,835 INFO L87 Difference]: Start difference. First operand 574 states and 652 transitions. Second operand 42 states. [2018-01-28 23:41:39,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:41:39,818 INFO L93 Difference]: Finished difference Result 638 states and 719 transitions. [2018-01-28 23:41:39,818 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-01-28 23:41:39,818 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 282 [2018-01-28 23:41:39,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:41:39,820 INFO L225 Difference]: With dead ends: 638 [2018-01-28 23:41:39,820 INFO L226 Difference]: Without dead ends: 632 [2018-01-28 23:41:39,821 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 322 GetRequests, 281 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=81, Invalid=1641, Unknown=0, NotChecked=0, Total=1722 [2018-01-28 23:41:39,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 632 states. [2018-01-28 23:41:39,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 632 to 588. [2018-01-28 23:41:39,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 588 states. [2018-01-28 23:41:39,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 588 states to 588 states and 668 transitions. [2018-01-28 23:41:39,831 INFO L78 Accepts]: Start accepts. Automaton has 588 states and 668 transitions. Word has length 282 [2018-01-28 23:41:39,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:41:39,832 INFO L432 AbstractCegarLoop]: Abstraction has 588 states and 668 transitions. [2018-01-28 23:41:39,832 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-28 23:41:39,832 INFO L276 IsEmpty]: Start isEmpty. Operand 588 states and 668 transitions. [2018-01-28 23:41:39,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 290 [2018-01-28 23:41:39,833 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:41:39,833 INFO L330 BasicCegarLoop]: trace histogram [41, 40, 40, 40, 40, 40, 40, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:41:39,833 INFO L371 AbstractCegarLoop]: === Iteration 41 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:41:39,833 INFO L82 PathProgramCache]: Analyzing trace with hash 1344207018, now seen corresponding path program 40 times [2018-01-28 23:41:39,833 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:41:39,833 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:41:39,834 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:39,834 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:41:39,834 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:39,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:41:39,842 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:41:41,166 INFO L134 CoverageAnalysis]: Checked inductivity of 5540 backedges. 0 proven. 5540 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:41,166 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:41:41,166 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:41:41,173 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-28 23:41:41,241 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:41:41,245 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:41:41,336 INFO L134 CoverageAnalysis]: Checked inductivity of 5540 backedges. 0 proven. 5540 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:41,357 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:41:41,357 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42] total 42 [2018-01-28 23:41:41,357 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-01-28 23:41:41,358 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-01-28 23:41:41,358 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=1723, Unknown=0, NotChecked=0, Total=1806 [2018-01-28 23:41:41,358 INFO L87 Difference]: Start difference. First operand 588 states and 668 transitions. Second operand 43 states. [2018-01-28 23:41:45,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:41:45,369 INFO L93 Difference]: Finished difference Result 653 states and 736 transitions. [2018-01-28 23:41:45,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-01-28 23:41:45,369 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 289 [2018-01-28 23:41:45,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:41:45,371 INFO L225 Difference]: With dead ends: 653 [2018-01-28 23:41:45,371 INFO L226 Difference]: Without dead ends: 647 [2018-01-28 23:41:45,372 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 330 GetRequests, 288 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=83, Invalid=1723, Unknown=0, NotChecked=0, Total=1806 [2018-01-28 23:41:45,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 647 states. [2018-01-28 23:41:45,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 647 to 602. [2018-01-28 23:41:45,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 602 states. [2018-01-28 23:41:45,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 602 states to 602 states and 684 transitions. [2018-01-28 23:41:45,381 INFO L78 Accepts]: Start accepts. Automaton has 602 states and 684 transitions. Word has length 289 [2018-01-28 23:41:45,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:41:45,381 INFO L432 AbstractCegarLoop]: Abstraction has 602 states and 684 transitions. [2018-01-28 23:41:45,381 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-01-28 23:41:45,381 INFO L276 IsEmpty]: Start isEmpty. Operand 602 states and 684 transitions. [2018-01-28 23:41:45,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 297 [2018-01-28 23:41:45,383 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:41:45,383 INFO L330 BasicCegarLoop]: trace histogram [42, 41, 41, 41, 41, 41, 41, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:41:45,383 INFO L371 AbstractCegarLoop]: === Iteration 42 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:41:45,383 INFO L82 PathProgramCache]: Analyzing trace with hash 1190701644, now seen corresponding path program 41 times [2018-01-28 23:41:45,383 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:41:45,383 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:41:45,384 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:45,384 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:41:45,384 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:45,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:41:45,391 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:41:46,351 INFO L134 CoverageAnalysis]: Checked inductivity of 5822 backedges. 0 proven. 5822 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:46,351 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:41:46,386 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:41:46,391 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-28 23:41:46,396 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,397 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,398 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,399 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,400 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,401 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,402 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,404 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,405 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,407 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,409 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,411 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,413 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,416 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,419 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,422 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,426 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,430 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,434 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,439 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,445 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,451 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,458 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,466 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,475 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,485 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,495 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,507 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,520 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,534 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,549 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,566 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,584 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,604 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,627 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,650 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,676 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,704 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,734 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,766 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,801 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,837 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:41:46,840 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:41:46,844 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:41:46,948 INFO L134 CoverageAnalysis]: Checked inductivity of 5822 backedges. 0 proven. 5822 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:46,968 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:41:46,969 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 43] total 43 [2018-01-28 23:41:46,969 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-28 23:41:46,969 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-28 23:41:46,970 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=1807, Unknown=0, NotChecked=0, Total=1892 [2018-01-28 23:41:46,970 INFO L87 Difference]: Start difference. First operand 602 states and 684 transitions. Second operand 44 states. [2018-01-28 23:41:51,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:41:51,213 INFO L93 Difference]: Finished difference Result 668 states and 753 transitions. [2018-01-28 23:41:51,213 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-01-28 23:41:51,213 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 296 [2018-01-28 23:41:51,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:41:51,215 INFO L225 Difference]: With dead ends: 668 [2018-01-28 23:41:51,215 INFO L226 Difference]: Without dead ends: 662 [2018-01-28 23:41:51,216 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 338 GetRequests, 295 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=85, Invalid=1807, Unknown=0, NotChecked=0, Total=1892 [2018-01-28 23:41:51,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 662 states. [2018-01-28 23:41:51,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 662 to 616. [2018-01-28 23:41:51,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 616 states. [2018-01-28 23:41:51,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 616 states to 616 states and 700 transitions. [2018-01-28 23:41:51,225 INFO L78 Accepts]: Start accepts. Automaton has 616 states and 700 transitions. Word has length 296 [2018-01-28 23:41:51,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:41:51,225 INFO L432 AbstractCegarLoop]: Abstraction has 616 states and 700 transitions. [2018-01-28 23:41:51,225 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-28 23:41:51,225 INFO L276 IsEmpty]: Start isEmpty. Operand 616 states and 700 transitions. [2018-01-28 23:41:51,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 304 [2018-01-28 23:41:51,226 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:41:51,227 INFO L330 BasicCegarLoop]: trace histogram [43, 42, 42, 42, 42, 42, 42, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:41:51,227 INFO L371 AbstractCegarLoop]: === Iteration 43 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:41:51,227 INFO L82 PathProgramCache]: Analyzing trace with hash 109330026, now seen corresponding path program 42 times [2018-01-28 23:41:51,227 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:41:51,227 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:41:51,228 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:51,228 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:41:51,228 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:51,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:41:51,236 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:41:52,213 INFO L134 CoverageAnalysis]: Checked inductivity of 6111 backedges. 0 proven. 6111 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:52,213 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:41:52,213 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:41:52,218 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-28 23:41:52,224 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,228 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,229 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,236 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,237 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,238 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,239 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,241 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,243 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,244 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,246 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,248 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,251 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,252 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,255 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,257 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,260 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,263 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,266 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,268 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,271 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,274 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,277 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,280 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,283 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,287 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,291 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,295 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,299 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,304 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,309 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,314 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,319 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,325 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,332 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,339 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,346 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,354 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,362 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,370 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,380 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,394 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,410 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-28 23:41:52,411 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:41:52,415 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:41:52,521 INFO L134 CoverageAnalysis]: Checked inductivity of 6111 backedges. 0 proven. 6111 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:52,542 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:41:52,542 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44] total 44 [2018-01-28 23:41:52,542 INFO L409 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-01-28 23:41:52,542 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-01-28 23:41:52,543 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=1893, Unknown=0, NotChecked=0, Total=1980 [2018-01-28 23:41:52,543 INFO L87 Difference]: Start difference. First operand 616 states and 700 transitions. Second operand 45 states. [2018-01-28 23:41:56,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:41:56,957 INFO L93 Difference]: Finished difference Result 683 states and 770 transitions. [2018-01-28 23:41:56,957 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-01-28 23:41:56,957 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 303 [2018-01-28 23:41:56,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:41:56,959 INFO L225 Difference]: With dead ends: 683 [2018-01-28 23:41:56,959 INFO L226 Difference]: Without dead ends: 677 [2018-01-28 23:41:56,960 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 346 GetRequests, 302 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=87, Invalid=1893, Unknown=0, NotChecked=0, Total=1980 [2018-01-28 23:41:56,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 677 states. [2018-01-28 23:41:56,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 677 to 630. [2018-01-28 23:41:56,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 630 states. [2018-01-28 23:41:56,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 630 states to 630 states and 716 transitions. [2018-01-28 23:41:56,970 INFO L78 Accepts]: Start accepts. Automaton has 630 states and 716 transitions. Word has length 303 [2018-01-28 23:41:56,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:41:56,970 INFO L432 AbstractCegarLoop]: Abstraction has 630 states and 716 transitions. [2018-01-28 23:41:56,970 INFO L433 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-01-28 23:41:56,971 INFO L276 IsEmpty]: Start isEmpty. Operand 630 states and 716 transitions. [2018-01-28 23:41:56,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 311 [2018-01-28 23:41:56,972 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:41:56,972 INFO L330 BasicCegarLoop]: trace histogram [44, 43, 43, 43, 43, 43, 43, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:41:56,972 INFO L371 AbstractCegarLoop]: === Iteration 44 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:41:56,972 INFO L82 PathProgramCache]: Analyzing trace with hash 518876300, now seen corresponding path program 43 times [2018-01-28 23:41:56,972 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:41:56,972 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:41:56,973 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:56,973 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:41:56,973 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:41:56,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:41:56,981 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:41:57,995 INFO L134 CoverageAnalysis]: Checked inductivity of 6407 backedges. 0 proven. 6407 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:57,996 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:41:57,996 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:41:58,000 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:41:58,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:41:58,029 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:41:58,133 INFO L134 CoverageAnalysis]: Checked inductivity of 6407 backedges. 0 proven. 6407 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:41:58,153 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:41:58,153 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45] total 45 [2018-01-28 23:41:58,153 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-01-28 23:41:58,153 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-01-28 23:41:58,154 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=1981, Unknown=0, NotChecked=0, Total=2070 [2018-01-28 23:41:58,154 INFO L87 Difference]: Start difference. First operand 630 states and 716 transitions. Second operand 46 states. [2018-01-28 23:42:02,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:42:02,766 INFO L93 Difference]: Finished difference Result 698 states and 787 transitions. [2018-01-28 23:42:02,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-01-28 23:42:02,766 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 310 [2018-01-28 23:42:02,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:42:02,768 INFO L225 Difference]: With dead ends: 698 [2018-01-28 23:42:02,768 INFO L226 Difference]: Without dead ends: 692 [2018-01-28 23:42:02,769 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 354 GetRequests, 309 SyntacticMatches, 1 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=89, Invalid=1981, Unknown=0, NotChecked=0, Total=2070 [2018-01-28 23:42:02,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 692 states. [2018-01-28 23:42:02,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 692 to 644. [2018-01-28 23:42:02,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 644 states. [2018-01-28 23:42:02,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 644 states to 644 states and 732 transitions. [2018-01-28 23:42:02,778 INFO L78 Accepts]: Start accepts. Automaton has 644 states and 732 transitions. Word has length 310 [2018-01-28 23:42:02,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:42:02,778 INFO L432 AbstractCegarLoop]: Abstraction has 644 states and 732 transitions. [2018-01-28 23:42:02,778 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-01-28 23:42:02,778 INFO L276 IsEmpty]: Start isEmpty. Operand 644 states and 732 transitions. [2018-01-28 23:42:02,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 318 [2018-01-28 23:42:02,780 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:42:02,780 INFO L330 BasicCegarLoop]: trace histogram [45, 44, 44, 44, 44, 44, 44, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:42:02,780 INFO L371 AbstractCegarLoop]: === Iteration 45 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:42:02,780 INFO L82 PathProgramCache]: Analyzing trace with hash -1336118230, now seen corresponding path program 44 times [2018-01-28 23:42:02,780 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:42:02,780 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:42:02,780 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:42:02,781 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-28 23:42:02,781 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:42:02,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:42:02,788 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:42:03,867 INFO L134 CoverageAnalysis]: Checked inductivity of 6710 backedges. 0 proven. 6710 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:42:03,886 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:42:03,886 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:42:03,892 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-28 23:42:03,897 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:42:03,914 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-28 23:42:03,917 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:42:03,920 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:42:04,036 INFO L134 CoverageAnalysis]: Checked inductivity of 6710 backedges. 0 proven. 6710 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:42:04,055 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:42:04,055 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46] total 46 [2018-01-28 23:42:04,056 INFO L409 AbstractCegarLoop]: Interpolant automaton has 47 states [2018-01-28 23:42:04,056 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2018-01-28 23:42:04,056 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=2071, Unknown=0, NotChecked=0, Total=2162 [2018-01-28 23:42:04,056 INFO L87 Difference]: Start difference. First operand 644 states and 732 transitions. Second operand 47 states. [2018-01-28 23:42:08,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:42:08,870 INFO L93 Difference]: Finished difference Result 713 states and 804 transitions. [2018-01-28 23:42:08,887 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-01-28 23:42:08,887 INFO L78 Accepts]: Start accepts. Automaton has 47 states. Word has length 317 [2018-01-28 23:42:08,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:42:08,889 INFO L225 Difference]: With dead ends: 713 [2018-01-28 23:42:08,889 INFO L226 Difference]: Without dead ends: 707 [2018-01-28 23:42:08,889 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 362 GetRequests, 316 SyntacticMatches, 1 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=91, Invalid=2071, Unknown=0, NotChecked=0, Total=2162 [2018-01-28 23:42:08,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 707 states. [2018-01-28 23:42:08,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 707 to 658. [2018-01-28 23:42:08,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 658 states. [2018-01-28 23:42:08,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 658 states to 658 states and 748 transitions. [2018-01-28 23:42:08,899 INFO L78 Accepts]: Start accepts. Automaton has 658 states and 748 transitions. Word has length 317 [2018-01-28 23:42:08,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:42:08,900 INFO L432 AbstractCegarLoop]: Abstraction has 658 states and 748 transitions. [2018-01-28 23:42:08,900 INFO L433 AbstractCegarLoop]: Interpolant automaton has 47 states. [2018-01-28 23:42:08,900 INFO L276 IsEmpty]: Start isEmpty. Operand 658 states and 748 transitions. [2018-01-28 23:42:08,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 325 [2018-01-28 23:42:08,901 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:42:08,901 INFO L330 BasicCegarLoop]: trace histogram [46, 45, 45, 45, 45, 45, 45, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:42:08,901 INFO L371 AbstractCegarLoop]: === Iteration 46 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:42:08,901 INFO L82 PathProgramCache]: Analyzing trace with hash -1186906420, now seen corresponding path program 45 times [2018-01-28 23:42:08,902 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:42:08,902 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:42:08,902 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:42:08,902 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:42:08,902 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:42:08,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:42:08,911 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-28 23:42:10,020 INFO L134 CoverageAnalysis]: Checked inductivity of 7020 backedges. 0 proven. 7020 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:42:10,020 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-28 23:42:10,020 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-28 23:42:10,027 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-28 23:42:10,033 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,034 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,035 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,036 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,036 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,037 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,039 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,040 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,041 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,043 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,045 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,047 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,049 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,051 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,053 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,056 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,058 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,061 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,065 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,069 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,073 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,077 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,082 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,087 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,093 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,099 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,106 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,114 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,122 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,131 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,141 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,152 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,165 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,178 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,193 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,208 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,223 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,241 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,260 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,281 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,303 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,327 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,351 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,379 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,408 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,439 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-28 23:42:10,442 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-28 23:42:10,446 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-28 23:42:10,564 INFO L134 CoverageAnalysis]: Checked inductivity of 7020 backedges. 0 proven. 7020 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-28 23:42:10,584 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-28 23:42:10,584 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47] total 47 [2018-01-28 23:42:10,585 INFO L409 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-01-28 23:42:10,585 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-01-28 23:42:10,585 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=2163, Unknown=0, NotChecked=0, Total=2256 [2018-01-28 23:42:10,585 INFO L87 Difference]: Start difference. First operand 658 states and 748 transitions. Second operand 48 states. [2018-01-28 23:42:15,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-28 23:42:15,602 INFO L93 Difference]: Finished difference Result 728 states and 821 transitions. [2018-01-28 23:42:15,602 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-01-28 23:42:15,602 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 324 [2018-01-28 23:42:15,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-28 23:42:15,604 INFO L225 Difference]: With dead ends: 728 [2018-01-28 23:42:15,604 INFO L226 Difference]: Without dead ends: 722 [2018-01-28 23:42:15,604 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 370 GetRequests, 323 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=93, Invalid=2163, Unknown=0, NotChecked=0, Total=2256 [2018-01-28 23:42:15,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 722 states. [2018-01-28 23:42:15,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 722 to 672. [2018-01-28 23:42:15,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 672 states. [2018-01-28 23:42:15,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 672 states to 672 states and 764 transitions. [2018-01-28 23:42:15,614 INFO L78 Accepts]: Start accepts. Automaton has 672 states and 764 transitions. Word has length 324 [2018-01-28 23:42:15,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-28 23:42:15,615 INFO L432 AbstractCegarLoop]: Abstraction has 672 states and 764 transitions. [2018-01-28 23:42:15,615 INFO L433 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-01-28 23:42:15,615 INFO L276 IsEmpty]: Start isEmpty. Operand 672 states and 764 transitions. [2018-01-28 23:42:15,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 332 [2018-01-28 23:42:15,616 INFO L322 BasicCegarLoop]: Found error trace [2018-01-28 23:42:15,616 INFO L330 BasicCegarLoop]: trace histogram [47, 46, 46, 46, 46, 46, 46, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-28 23:42:15,616 INFO L371 AbstractCegarLoop]: === Iteration 47 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-28 23:42:15,616 INFO L82 PathProgramCache]: Analyzing trace with hash 298031594, now seen corresponding path program 46 times [2018-01-28 23:42:15,617 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-28 23:42:15,617 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-28 23:42:15,617 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:42:15,617 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-28 23:42:15,617 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-28 23:42:15,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-28 23:42:15,626 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. Received shutdown request... [2018-01-28 23:42:15,979 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-28 23:42:15,983 WARN L185 ceAbstractionStarter]: Timeout [2018-01-28 23:42:15,983 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.01 11:42:15 BasicIcfg [2018-01-28 23:42:15,983 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-28 23:42:15,984 INFO L168 Benchmark]: Toolchain (without parser) took 119347.68 ms. Allocated memory was 304.6 MB in the beginning and 790.1 MB in the end (delta: 485.5 MB). Free memory was 265.6 MB in the beginning and 507.2 MB in the end (delta: -241.5 MB). Peak memory consumption was 244.0 MB. Max. memory is 5.3 GB. [2018-01-28 23:42:15,985 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 304.6 MB. Free memory is still 270.6 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-28 23:42:15,985 INFO L168 Benchmark]: CACSL2BoogieTranslator took 162.39 ms. Allocated memory is still 304.6 MB. Free memory was 264.7 MB in the beginning and 257.5 MB in the end (delta: 7.2 MB). Peak memory consumption was 7.2 MB. Max. memory is 5.3 GB. [2018-01-28 23:42:15,985 INFO L168 Benchmark]: Boogie Preprocessor took 24.82 ms. Allocated memory is still 304.6 MB. Free memory was 257.5 MB in the beginning and 255.5 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-28 23:42:15,985 INFO L168 Benchmark]: RCFGBuilder took 180.58 ms. Allocated memory is still 304.6 MB. Free memory was 255.5 MB in the beginning and 243.7 MB in the end (delta: 11.8 MB). Peak memory consumption was 11.8 MB. Max. memory is 5.3 GB. [2018-01-28 23:42:15,986 INFO L168 Benchmark]: IcfgTransformer took 17.01 ms. Allocated memory is still 304.6 MB. Free memory was 243.7 MB in the beginning and 241.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-28 23:42:15,986 INFO L168 Benchmark]: TraceAbstraction took 118955.25 ms. Allocated memory was 304.6 MB in the beginning and 790.1 MB in the end (delta: 485.5 MB). Free memory was 241.7 MB in the beginning and 507.2 MB in the end (delta: -265.4 MB). Peak memory consumption was 220.1 MB. Max. memory is 5.3 GB. [2018-01-28 23:42:15,987 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 304.6 MB. Free memory is still 270.6 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 162.39 ms. Allocated memory is still 304.6 MB. Free memory was 264.7 MB in the beginning and 257.5 MB in the end (delta: 7.2 MB). Peak memory consumption was 7.2 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 24.82 ms. Allocated memory is still 304.6 MB. Free memory was 257.5 MB in the beginning and 255.5 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 180.58 ms. Allocated memory is still 304.6 MB. Free memory was 255.5 MB in the beginning and 243.7 MB in the end (delta: 11.8 MB). Peak memory consumption was 11.8 MB. Max. memory is 5.3 GB. * IcfgTransformer took 17.01 ms. Allocated memory is still 304.6 MB. Free memory was 243.7 MB in the beginning and 241.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * TraceAbstraction took 118955.25 ms. Allocated memory was 304.6 MB in the beginning and 790.1 MB in the end (delta: 485.5 MB). Free memory was 241.7 MB in the beginning and 507.2 MB in the end (delta: -265.4 MB). Peak memory consumption was 220.1 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 7]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 7). Cancelled while BasicCegarLoop was analyzing trace of length 332 with TraceHistMax 47, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 5. - TimeoutResultAtElement [Line: 8]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 8). Cancelled while BasicCegarLoop was analyzing trace of length 332 with TraceHistMax 47, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 5. - TimeoutResultAtElement [Line: 13]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 13). Cancelled while BasicCegarLoop was analyzing trace of length 332 with TraceHistMax 47, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 5. - TimeoutResultAtElement [Line: 13]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 13). Cancelled while BasicCegarLoop was analyzing trace of length 332 with TraceHistMax 47, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 5. - TimeoutResultAtElement [Line: 12]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 12). Cancelled while BasicCegarLoop was analyzing trace of length 332 with TraceHistMax 47, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 5. - TimeoutResultAtElement [Line: 8]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 8). Cancelled while BasicCegarLoop was analyzing trace of length 332 with TraceHistMax 47, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 5. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 38 locations, 6 error locations. TIMEOUT Result, 118.9s OverallTime, 47 OverallIterations, 47 TraceHistogramMax, 86.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 12678 SDtfs, 6719 SDslu, 303774 SDs, 0 SdLazy, 273545 SolverSat, 2392 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 68.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 8732 GetRequests, 7606 SyntacticMatches, 45 SemanticMatches, 1081 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 16.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=672occurred in iteration=46, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 46 MinimizatonAttempts, 1265 StatesRemovedByMinimization, 46 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 3.4s SatisfiabilityAnalysisTime, 24.7s InterpolantComputationTime, 15309 NumberOfCodeBlocks, 15309 NumberOfCodeBlocksAsserted, 627 NumberOfCheckSat, 15218 ConstructedInterpolants, 0 QuantifiedInterpolants, 22652770 SizeOfPredicates, 0 NumberOfNonLiveVariables, 9000 ConjunctsInSsa, 2205 ConjunctsInUnsatCore, 91 InterpolantComputations, 1 PerfectInterpolantSequences, 0/216660 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_original_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-Benchmark-0-2018-01-28_23-42-15-994.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_original_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-28_23-42-15-994.csv Completed graceful shutdown