java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/array-memsafety/subseq-alloca_true-valid-memsafety_true-termination.i
--------------------------------------------------------------------------------
This is Ultimate 0.1.23-acfac67
[2018-01-28 23:37:07,955 INFO L170 SettingsManager]: Resetting all preferences to default values...
[2018-01-28 23:37:07,956 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values
[2018-01-28 23:37:07,971 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring...
[2018-01-28 23:37:07,971 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values
[2018-01-28 23:37:07,972 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values
[2018-01-28 23:37:07,973 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values
[2018-01-28 23:37:07,974 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values
[2018-01-28 23:37:07,976 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values
[2018-01-28 23:37:07,976 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values
[2018-01-28 23:37:07,977 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring...
[2018-01-28 23:37:07,977 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values
[2018-01-28 23:37:07,978 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values
[2018-01-28 23:37:07,979 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values
[2018-01-28 23:37:07,979 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values
[2018-01-28 23:37:07,982 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values
[2018-01-28 23:37:07,984 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values
[2018-01-28 23:37:07,986 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values
[2018-01-28 23:37:07,988 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values
[2018-01-28 23:37:07,989 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values
[2018-01-28 23:37:07,992 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring...
[2018-01-28 23:37:07,992 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring...
[2018-01-28 23:37:07,992 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values
[2018-01-28 23:37:07,993 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values
[2018-01-28 23:37:07,994 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values
[2018-01-28 23:37:07,995 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring...
[2018-01-28 23:37:07,996 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values
[2018-01-28 23:37:07,996 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring...
[2018-01-28 23:37:07,997 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring...
[2018-01-28 23:37:07,997 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values
[2018-01-28 23:37:07,997 INFO L181 SettingsManager]: Finished resetting all preferences to default values...
[2018-01-28 23:37:07,998 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf
[2018-01-28 23:37:08,007 INFO L110 SettingsManager]: Loading preferences was successful
[2018-01-28 23:37:08,008 INFO L112 SettingsManager]: Preferences different from defaults after loading the file:
[2018-01-28 23:37:08,009 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults:
[2018-01-28 23:37:08,009 INFO L133 SettingsManager]: * to procedures, called more than once=true
[2018-01-28 23:37:08,009 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults:
[2018-01-28 23:37:08,009 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain
[2018-01-28 23:37:08,009 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true
[2018-01-28 23:37:08,010 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2018-01-28 23:37:08,010 INFO L133 SettingsManager]: * sizeof long=4
[2018-01-28 23:37:08,010 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false
[2018-01-28 23:37:08,011 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true
[2018-01-28 23:37:08,011 INFO L133 SettingsManager]: * sizeof POINTER=4
[2018-01-28 23:37:08,011 INFO L133 SettingsManager]: * Check division by zero=IGNORE
[2018-01-28 23:37:08,011 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true
[2018-01-28 23:37:08,011 INFO L133 SettingsManager]: * Bitprecise bitfields=true
[2018-01-28 23:37:08,012 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true
[2018-01-28 23:37:08,012 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE
[2018-01-28 23:37:08,012 INFO L133 SettingsManager]: * sizeof long double=12
[2018-01-28 23:37:08,012 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2018-01-28 23:37:08,012 INFO L133 SettingsManager]: * Size of a code block=SingleStatement
[2018-01-28 23:37:08,013 INFO L133 SettingsManager]: * To the following directory=./dump/
[2018-01-28 23:37:08,013 INFO L133 SettingsManager]: * Add additional assume for each assert=false
[2018-01-28 23:37:08,013 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode
[2018-01-28 23:37:08,013 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2018-01-28 23:37:08,013 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2018-01-28 23:37:08,014 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK
[2018-01-28 23:37:08,014 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP
[2018-01-28 23:37:08,014 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles
[2018-01-28 23:37:08,014 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL
[2018-01-28 23:37:08,014 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode
[2018-01-28 23:37:08,015 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in
[2018-01-28 23:37:08,015 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true
[2018-01-28 23:37:08,016 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults:
[2018-01-28 23:37:08,016 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR
[2018-01-28 23:37:08,051 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp
[2018-01-28 23:37:08,064 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized
[2018-01-28 23:37:08,068 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected.
[2018-01-28 23:37:08,069 INFO L271 PluginConnector]: Initializing CDTParser...
[2018-01-28 23:37:08,070 INFO L276 PluginConnector]: CDTParser initialized
[2018-01-28 23:37:08,071 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-memsafety/subseq-alloca_true-valid-memsafety_true-termination.i
[2018-01-28 23:37:08,266 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2018-01-28 23:37:08,273 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements.
[2018-01-28 23:37:08,274 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2018-01-28 23:37:08,274 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator...
[2018-01-28 23:37:08,280 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized
[2018-01-28 23:37:08,281 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 11:37:08" (1/1) ...
[2018-01-28 23:37:08,283 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@51fea89f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:37:08, skipping insertion in model container
[2018-01-28 23:37:08,283 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.01 11:37:08" (1/1) ...
[2018-01-28 23:37:08,302 INFO L153 Dispatcher]: Using SV-COMP mode
[2018-01-28 23:37:08,343 INFO L153 Dispatcher]: Using SV-COMP mode
[2018-01-28 23:37:08,468 INFO L450 PostProcessor]: Settings: Checked method=main
[2018-01-28 23:37:08,485 INFO L450 PostProcessor]: Settings: Checked method=main
[2018-01-28 23:37:08,491 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:37:08 WrapperNode
[2018-01-28 23:37:08,491 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2018-01-28 23:37:08,492 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2018-01-28 23:37:08,492 INFO L271 PluginConnector]: Initializing Boogie Preprocessor...
[2018-01-28 23:37:08,492 INFO L276 PluginConnector]: Boogie Preprocessor initialized
[2018-01-28 23:37:08,505 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:37:08" (1/1) ...
[2018-01-28 23:37:08,505 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:37:08" (1/1) ...
[2018-01-28 23:37:08,518 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:37:08" (1/1) ...
[2018-01-28 23:37:08,518 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:37:08" (1/1) ...
[2018-01-28 23:37:08,522 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:37:08" (1/1) ...
[2018-01-28 23:37:08,525 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:37:08" (1/1) ...
[2018-01-28 23:37:08,526 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:37:08" (1/1) ...
[2018-01-28 23:37:08,528 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2018-01-28 23:37:08,528 INFO L113 PluginConnector]: ------------------------RCFGBuilder----------------------------
[2018-01-28 23:37:08,528 INFO L271 PluginConnector]: Initializing RCFGBuilder...
[2018-01-28 23:37:08,528 INFO L276 PluginConnector]: RCFGBuilder initialized
[2018-01-28 23:37:08,529 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:37:08" (1/1) ...
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2018-01-28 23:37:08,575 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init
[2018-01-28 23:37:08,575 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2018-01-28 23:37:08,575 INFO L136 BoogieDeclarations]: Found implementation of procedure subseq
[2018-01-28 23:37:08,575 INFO L136 BoogieDeclarations]: Found implementation of procedure main
[2018-01-28 23:37:08,575 INFO L128 BoogieDeclarations]: Found specification of procedure write~int
[2018-01-28 23:37:08,576 INFO L128 BoogieDeclarations]: Found specification of procedure read~int
[2018-01-28 23:37:08,576 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free
[2018-01-28 23:37:08,576 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc
[2018-01-28 23:37:08,576 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc
[2018-01-28 23:37:08,576 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int
[2018-01-28 23:37:08,576 INFO L128 BoogieDeclarations]: Found specification of procedure subseq
[2018-01-28 23:37:08,576 INFO L128 BoogieDeclarations]: Found specification of procedure main
[2018-01-28 23:37:08,576 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init
[2018-01-28 23:37:08,576 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2018-01-28 23:37:08,835 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2018-01-28 23:37:08,835 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 11:37:08 BoogieIcfgContainer
[2018-01-28 23:37:08,835 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2018-01-28 23:37:08,836 INFO L113 PluginConnector]: ------------------------IcfgTransformer----------------------------
[2018-01-28 23:37:08,836 INFO L271 PluginConnector]: Initializing IcfgTransformer...
[2018-01-28 23:37:08,837 INFO L276 PluginConnector]: IcfgTransformer initialized
[2018-01-28 23:37:08,840 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 11:37:08" (1/1) ...
[2018-01-28 23:37:08,847 INFO L103 apSepIcfgTransformer]: HeapSepIcfgTransformer: Starting heap partitioning
[2018-01-28 23:37:08,847 INFO L104 apSepIcfgTransformer]: To be partitioned heap arrays found [#memory_int]
[2018-01-28 23:37:08,847 INFO L150 apSepIcfgTransformer]: starting freeze-var-style preprocessing
[2018-01-28 23:37:08,924 INFO L218 apSepIcfgTransformer]: finished preprocessing for the equality analysis
[2018-01-28 23:37:08,974 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2)
[2018-01-28 23:37:56,244 INFO L311 AbstractInterpreter]: Visited 96 different actions 954 times. Merged at 65 different actions 568 times. Never widened. Found 68 fixpoints after 7 different actions. Largest state had 42 variables.
[2018-01-28 23:37:56,247 INFO L226 apSepIcfgTransformer]: finished equality analysis
[2018-01-28 23:37:56,260 INFO L244 HeapSepPreAnalysis]: Number of read from array group [#memory_int] : 7
[2018-01-28 23:37:56,260 INFO L238 apSepIcfgTransformer]: Finished pre analysis before partitioning
[2018-01-28 23:37:56,260 INFO L239 apSepIcfgTransformer]: array groups: Set:
[#memory_int]
[2018-01-28 23:37:56,260 INFO L241 apSepIcfgTransformer]: select infos: Set:
((select |v_#memory_int_11| v_main_~nondetString2~5.base_2), at (SUMMARY for call write~int(0, ~nondetString2~5.base, ~nondetString2~5.offset + (~length2~5 - 1) * 1, 1); srcloc: L564'))
((select (select |v_#memory_int_4| v_subseq_~pt~2.base_5) v_subseq_~pt~2.offset_4), at (SUMMARY for call #t~mem4 := read~int(~pt~2.base, ~pt~2.offset, 1); srcloc: L545'))
((select (select |v_#memory_int_2| v_subseq_~pt~2.base_2) v_subseq_~pt~2.offset_2), at (SUMMARY for call #t~mem1 := read~int(~pt~2.base, ~pt~2.offset, 1); srcloc: L544'''))
((select |v_#memory_int_9| v_main_~nondetString1~5.base_2), at (SUMMARY for call write~int(0, ~nondetString1~5.base, ~nondetString1~5.offset + (~length1~5 - 1) * 1, 1); srcloc: L564))
((select (select |v_#memory_int_1| v_subseq_~ps~2.base_2) v_subseq_~ps~2.offset_2), at (SUMMARY for call #t~mem0 := read~int(~ps~2.base, ~ps~2.offset, 1); srcloc: L544))
((select (select |v_#memory_int_5| v_subseq_~pt~2.base_10) v_subseq_~pt~2.offset_8), at (SUMMARY for call #t~mem7 := read~int(~pt~2.base, ~pt~2.offset, 1); srcloc: L544'''''''''''''''))
((select (select |v_#memory_int_3| v_subseq_~ps~2.base_5) v_subseq_~ps~2.offset_4), at (SUMMARY for call #t~mem3 := read~int(~ps~2.base, ~ps~2.offset, 1); srcloc: L545))
[2018-01-28 23:37:56,280 INFO L544 PartitionManager]: partitioning result:
[2018-01-28 23:37:56,281 INFO L549 PartitionManager]: location blocks for array group [#memory_int]
[2018-01-28 23:37:56,281 INFO L558 PartitionManager]: at dimension 0
[2018-01-28 23:37:56,281 INFO L559 PartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 1
[2018-01-28 23:37:56,281 INFO L560 PartitionManager]: # location blocks :1
[2018-01-28 23:37:56,281 INFO L558 PartitionManager]: at dimension 1
[2018-01-28 23:37:56,281 INFO L559 PartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 1
[2018-01-28 23:37:56,281 INFO L560 PartitionManager]: # location blocks :1
[2018-01-28 23:37:56,282 INFO L86 ransitionTransformer]: executing heap partitioning transformation
[2018-01-28 23:37:56,297 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 28.01 11:37:56 BasicIcfg
[2018-01-28 23:37:56,297 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer----------------------------
[2018-01-28 23:37:56,298 INFO L113 PluginConnector]: ------------------------TraceAbstraction----------------------------
[2018-01-28 23:37:56,298 INFO L271 PluginConnector]: Initializing TraceAbstraction...
[2018-01-28 23:37:56,352 INFO L276 PluginConnector]: TraceAbstraction initialized
[2018-01-28 23:37:56,353 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.01 11:37:08" (1/4) ...
[2018-01-28 23:37:56,353 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1d54bac9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 11:37:56, skipping insertion in model container
[2018-01-28 23:37:56,354 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.01 11:37:08" (2/4) ...
[2018-01-28 23:37:56,354 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1d54bac9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.01 11:37:56, skipping insertion in model container
[2018-01-28 23:37:56,354 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.01 11:37:08" (3/4) ...
[2018-01-28 23:37:56,354 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1d54bac9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.01 11:37:56, skipping insertion in model container
[2018-01-28 23:37:56,355 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 28.01 11:37:56" (4/4) ...
[2018-01-28 23:37:56,356 INFO L107 eAbstractionObserver]: Analyzing ICFG HeapSeparatedIcfg
[2018-01-28 23:37:56,366 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2018-01-28 23:37:56,373 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 15 error locations.
[2018-01-28 23:37:56,408 INFO L322 AbstractCegarLoop]: Interprodecural is true
[2018-01-28 23:37:56,408 INFO L323 AbstractCegarLoop]: Hoare is true
[2018-01-28 23:37:56,409 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP
[2018-01-28 23:37:56,409 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK
[2018-01-28 23:37:56,409 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2018-01-28 23:37:56,409 INFO L327 AbstractCegarLoop]: Difference is false
[2018-01-28 23:37:56,409 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA
[2018-01-28 23:37:56,409 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce========
[2018-01-28 23:37:56,410 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure
[2018-01-28 23:37:56,423 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states.
[2018-01-28 23:37:56,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16
[2018-01-28 23:37:56,428 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:37:56,429 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:37:56,429 INFO L371 AbstractCegarLoop]: === Iteration 1 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr9RequiresViolation, subseqErr3RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:37:56,432 INFO L82 PathProgramCache]: Analyzing trace with hash 721071450, now seen corresponding path program 1 times
[2018-01-28 23:37:56,434 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:37:56,434 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:37:56,474 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:56,474 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:37:56,474 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:56,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:37:56,532 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:37:56,635 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:37:56,637 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:37:56,637 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2018-01-28 23:37:56,638 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states
[2018-01-28 23:37:56,646 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2018-01-28 23:37:56,646 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2018-01-28 23:37:56,648 INFO L87 Difference]: Start difference. First operand 87 states. Second operand 4 states.
[2018-01-28 23:37:56,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:37:56,790 INFO L93 Difference]: Finished difference Result 109 states and 118 transitions.
[2018-01-28 23:37:56,790 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2018-01-28 23:37:56,792 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15
[2018-01-28 23:37:56,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:37:56,804 INFO L225 Difference]: With dead ends: 109
[2018-01-28 23:37:56,804 INFO L226 Difference]: Without dead ends: 83
[2018-01-28 23:37:56,808 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2018-01-28 23:37:56,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states.
[2018-01-28 23:37:56,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83.
[2018-01-28 23:37:56,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states.
[2018-01-28 23:37:56,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 90 transitions.
[2018-01-28 23:37:56,850 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 90 transitions. Word has length 15
[2018-01-28 23:37:56,850 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:37:56,850 INFO L432 AbstractCegarLoop]: Abstraction has 83 states and 90 transitions.
[2018-01-28 23:37:56,851 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states.
[2018-01-28 23:37:56,851 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 90 transitions.
[2018-01-28 23:37:56,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16
[2018-01-28 23:37:56,851 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:37:56,852 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:37:56,852 INFO L371 AbstractCegarLoop]: === Iteration 2 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr9RequiresViolation, subseqErr3RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:37:56,852 INFO L82 PathProgramCache]: Analyzing trace with hash 721071452, now seen corresponding path program 1 times
[2018-01-28 23:37:56,852 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:37:56,852 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:37:56,853 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:56,854 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:37:56,854 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:56,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:37:56,869 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:37:56,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:37:56,986 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:37:56,986 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-01-28 23:37:56,988 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-01-28 23:37:56,988 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-01-28 23:37:56,988 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30
[2018-01-28 23:37:56,989 INFO L87 Difference]: Start difference. First operand 83 states and 90 transitions. Second operand 6 states.
[2018-01-28 23:37:57,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:37:57,053 INFO L93 Difference]: Finished difference Result 83 states and 90 transitions.
[2018-01-28 23:37:57,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-01-28 23:37:57,055 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 15
[2018-01-28 23:37:57,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:37:57,057 INFO L225 Difference]: With dead ends: 83
[2018-01-28 23:37:57,057 INFO L226 Difference]: Without dead ends: 82
[2018-01-28 23:37:57,058 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=23, Unknown=0, NotChecked=0, Total=42
[2018-01-28 23:37:57,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states.
[2018-01-28 23:37:57,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 82.
[2018-01-28 23:37:57,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states.
[2018-01-28 23:37:57,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 89 transitions.
[2018-01-28 23:37:57,066 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 89 transitions. Word has length 15
[2018-01-28 23:37:57,066 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:37:57,066 INFO L432 AbstractCegarLoop]: Abstraction has 82 states and 89 transitions.
[2018-01-28 23:37:57,066 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-01-28 23:37:57,066 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 89 transitions.
[2018-01-28 23:37:57,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17
[2018-01-28 23:37:57,067 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:37:57,067 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:37:57,067 INFO L371 AbstractCegarLoop]: === Iteration 3 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr9RequiresViolation, subseqErr3RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:37:57,067 INFO L82 PathProgramCache]: Analyzing trace with hash 878378849, now seen corresponding path program 1 times
[2018-01-28 23:37:57,067 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:37:57,068 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:37:57,069 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:57,069 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:37:57,069 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:57,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:37:57,080 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:37:57,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:37:57,102 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:37:57,102 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2018-01-28 23:37:57,102 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states
[2018-01-28 23:37:57,103 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2018-01-28 23:37:57,103 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2018-01-28 23:37:57,103 INFO L87 Difference]: Start difference. First operand 82 states and 89 transitions. Second operand 4 states.
[2018-01-28 23:37:57,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:37:57,167 INFO L93 Difference]: Finished difference Result 82 states and 89 transitions.
[2018-01-28 23:37:57,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2018-01-28 23:37:57,168 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16
[2018-01-28 23:37:57,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:37:57,169 INFO L225 Difference]: With dead ends: 82
[2018-01-28 23:37:57,169 INFO L226 Difference]: Without dead ends: 81
[2018-01-28 23:37:57,170 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2018-01-28 23:37:57,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states.
[2018-01-28 23:37:57,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 81.
[2018-01-28 23:37:57,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states.
[2018-01-28 23:37:57,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 88 transitions.
[2018-01-28 23:37:57,177 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 88 transitions. Word has length 16
[2018-01-28 23:37:57,178 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:37:57,178 INFO L432 AbstractCegarLoop]: Abstraction has 81 states and 88 transitions.
[2018-01-28 23:37:57,181 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states.
[2018-01-28 23:37:57,181 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 88 transitions.
[2018-01-28 23:37:57,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17
[2018-01-28 23:37:57,182 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:37:57,182 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:37:57,182 INFO L371 AbstractCegarLoop]: === Iteration 4 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr9RequiresViolation, subseqErr3RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:37:57,183 INFO L82 PathProgramCache]: Analyzing trace with hash 878378851, now seen corresponding path program 1 times
[2018-01-28 23:37:57,183 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:37:57,183 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:37:57,184 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:57,184 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:37:57,184 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:57,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:37:57,195 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:37:57,254 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:37:57,254 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:37:57,255 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2018-01-28 23:37:57,255 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states
[2018-01-28 23:37:57,255 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2018-01-28 23:37:57,255 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2018-01-28 23:37:57,256 INFO L87 Difference]: Start difference. First operand 81 states and 88 transitions. Second operand 5 states.
[2018-01-28 23:37:57,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:37:57,308 INFO L93 Difference]: Finished difference Result 81 states and 88 transitions.
[2018-01-28 23:37:57,308 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-01-28 23:37:57,308 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16
[2018-01-28 23:37:57,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:37:57,309 INFO L225 Difference]: With dead ends: 81
[2018-01-28 23:37:57,310 INFO L226 Difference]: Without dead ends: 80
[2018-01-28 23:37:57,310 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30
[2018-01-28 23:37:57,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states.
[2018-01-28 23:37:57,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 80.
[2018-01-28 23:37:57,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states.
[2018-01-28 23:37:57,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 87 transitions.
[2018-01-28 23:37:57,317 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 87 transitions. Word has length 16
[2018-01-28 23:37:57,318 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:37:57,318 INFO L432 AbstractCegarLoop]: Abstraction has 80 states and 87 transitions.
[2018-01-28 23:37:57,318 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states.
[2018-01-28 23:37:57,318 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 87 transitions.
[2018-01-28 23:37:57,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24
[2018-01-28 23:37:57,319 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:37:57,319 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:37:57,319 INFO L371 AbstractCegarLoop]: === Iteration 5 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr9RequiresViolation, subseqErr3RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:37:57,319 INFO L82 PathProgramCache]: Analyzing trace with hash 1680232304, now seen corresponding path program 1 times
[2018-01-28 23:37:57,319 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:37:57,320 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:37:57,321 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:57,321 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:37:57,321 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:57,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:37:57,332 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:37:57,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:37:57,387 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:37:57,387 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-01-28 23:37:57,388 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-01-28 23:37:57,388 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-01-28 23:37:57,388 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-01-28 23:37:57,388 INFO L87 Difference]: Start difference. First operand 80 states and 87 transitions. Second operand 6 states.
[2018-01-28 23:37:57,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:37:57,470 INFO L93 Difference]: Finished difference Result 87 states and 94 transitions.
[2018-01-28 23:37:57,471 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-01-28 23:37:57,471 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23
[2018-01-28 23:37:57,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:37:57,472 INFO L225 Difference]: With dead ends: 87
[2018-01-28 23:37:57,472 INFO L226 Difference]: Without dead ends: 85
[2018-01-28 23:37:57,473 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56
[2018-01-28 23:37:57,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states.
[2018-01-28 23:37:57,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 84.
[2018-01-28 23:37:57,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states.
[2018-01-28 23:37:57,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 92 transitions.
[2018-01-28 23:37:57,480 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 92 transitions. Word has length 23
[2018-01-28 23:37:57,481 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:37:57,481 INFO L432 AbstractCegarLoop]: Abstraction has 84 states and 92 transitions.
[2018-01-28 23:37:57,481 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-01-28 23:37:57,481 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 92 transitions.
[2018-01-28 23:37:57,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24
[2018-01-28 23:37:57,482 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:37:57,482 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:37:57,482 INFO L371 AbstractCegarLoop]: === Iteration 6 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr9RequiresViolation, subseqErr3RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:37:57,482 INFO L82 PathProgramCache]: Analyzing trace with hash 1680232306, now seen corresponding path program 1 times
[2018-01-28 23:37:57,482 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:37:57,482 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:37:57,483 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:57,483 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:37:57,483 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:57,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:37:57,495 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:37:57,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:37:57,592 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:37:57,593 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8
[2018-01-28 23:37:57,593 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states
[2018-01-28 23:37:57,593 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2018-01-28 23:37:57,593 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72
[2018-01-28 23:37:57,593 INFO L87 Difference]: Start difference. First operand 84 states and 92 transitions. Second operand 9 states.
[2018-01-28 23:37:57,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:37:57,793 INFO L93 Difference]: Finished difference Result 125 states and 137 transitions.
[2018-01-28 23:37:57,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states.
[2018-01-28 23:37:57,794 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 23
[2018-01-28 23:37:57,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:37:57,797 INFO L225 Difference]: With dead ends: 125
[2018-01-28 23:37:57,797 INFO L226 Difference]: Without dead ends: 123
[2018-01-28 23:37:57,797 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=137, Unknown=0, NotChecked=0, Total=182
[2018-01-28 23:37:57,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states.
[2018-01-28 23:37:57,805 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 102.
[2018-01-28 23:37:57,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states.
[2018-01-28 23:37:57,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 117 transitions.
[2018-01-28 23:37:57,807 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 117 transitions. Word has length 23
[2018-01-28 23:37:57,807 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:37:57,807 INFO L432 AbstractCegarLoop]: Abstraction has 102 states and 117 transitions.
[2018-01-28 23:37:57,807 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states.
[2018-01-28 23:37:57,807 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 117 transitions.
[2018-01-28 23:37:57,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26
[2018-01-28 23:37:57,808 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:37:57,808 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:37:57,808 INFO L371 AbstractCegarLoop]: === Iteration 7 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr9RequiresViolation, subseqErr3RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:37:57,809 INFO L82 PathProgramCache]: Analyzing trace with hash -1909331498, now seen corresponding path program 1 times
[2018-01-28 23:37:57,809 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:37:57,809 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:37:57,810 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:57,810 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:37:57,810 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:57,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:37:57,822 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:37:57,915 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:37:57,916 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:37:57,916 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-01-28 23:37:57,916 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-01-28 23:37:57,916 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-01-28 23:37:57,916 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-01-28 23:37:57,917 INFO L87 Difference]: Start difference. First operand 102 states and 117 transitions. Second operand 6 states.
[2018-01-28 23:37:58,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:37:58,057 INFO L93 Difference]: Finished difference Result 102 states and 117 transitions.
[2018-01-28 23:37:58,058 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states.
[2018-01-28 23:37:58,058 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25
[2018-01-28 23:37:58,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:37:58,058 INFO L225 Difference]: With dead ends: 102
[2018-01-28 23:37:58,059 INFO L226 Difference]: Without dead ends: 86
[2018-01-28 23:37:58,059 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56
[2018-01-28 23:37:58,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states.
[2018-01-28 23:37:58,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 86.
[2018-01-28 23:37:58,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states.
[2018-01-28 23:37:58,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 99 transitions.
[2018-01-28 23:37:58,064 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 99 transitions. Word has length 25
[2018-01-28 23:37:58,064 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:37:58,064 INFO L432 AbstractCegarLoop]: Abstraction has 86 states and 99 transitions.
[2018-01-28 23:37:58,064 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-01-28 23:37:58,064 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 99 transitions.
[2018-01-28 23:37:58,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27
[2018-01-28 23:37:58,065 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:37:58,065 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:37:58,065 INFO L371 AbstractCegarLoop]: === Iteration 8 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr9RequiresViolation, subseqErr3RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:37:58,065 INFO L82 PathProgramCache]: Analyzing trace with hash -2042842077, now seen corresponding path program 1 times
[2018-01-28 23:37:58,065 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:37:58,065 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:37:58,066 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:58,066 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:37:58,066 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:58,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:37:58,075 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:37:58,108 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:37:58,108 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:37:58,108 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-01-28 23:37:58,108 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-01-28 23:37:58,109 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-01-28 23:37:58,109 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-01-28 23:37:58,109 INFO L87 Difference]: Start difference. First operand 86 states and 99 transitions. Second operand 6 states.
[2018-01-28 23:37:58,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:37:58,161 INFO L93 Difference]: Finished difference Result 114 states and 131 transitions.
[2018-01-28 23:37:58,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-01-28 23:37:58,161 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26
[2018-01-28 23:37:58,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:37:58,162 INFO L225 Difference]: With dead ends: 114
[2018-01-28 23:37:58,162 INFO L226 Difference]: Without dead ends: 111
[2018-01-28 23:37:58,163 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56
[2018-01-28 23:37:58,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states.
[2018-01-28 23:37:58,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 107.
[2018-01-28 23:37:58,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states.
[2018-01-28 23:37:58,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 127 transitions.
[2018-01-28 23:37:58,171 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 127 transitions. Word has length 26
[2018-01-28 23:37:58,171 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:37:58,171 INFO L432 AbstractCegarLoop]: Abstraction has 107 states and 127 transitions.
[2018-01-28 23:37:58,171 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-01-28 23:37:58,172 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 127 transitions.
[2018-01-28 23:37:58,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27
[2018-01-28 23:37:58,172 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:37:58,172 INFO L330 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:37:58,173 INFO L371 AbstractCegarLoop]: === Iteration 9 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr9RequiresViolation, subseqErr3RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:37:58,173 INFO L82 PathProgramCache]: Analyzing trace with hash -2042842075, now seen corresponding path program 1 times
[2018-01-28 23:37:58,173 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:37:58,173 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:37:58,174 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:58,174 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:37:58,174 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:58,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:37:58,185 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:37:58,282 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:37:58,282 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:37:58,282 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8
[2018-01-28 23:37:58,282 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states
[2018-01-28 23:37:58,282 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants.
[2018-01-28 23:37:58,282 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72
[2018-01-28 23:37:58,283 INFO L87 Difference]: Start difference. First operand 107 states and 127 transitions. Second operand 9 states.
[2018-01-28 23:37:58,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:37:58,377 INFO L93 Difference]: Finished difference Result 133 states and 153 transitions.
[2018-01-28 23:37:58,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states.
[2018-01-28 23:37:58,378 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 26
[2018-01-28 23:37:58,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:37:58,378 INFO L225 Difference]: With dead ends: 133
[2018-01-28 23:37:58,379 INFO L226 Difference]: Without dead ends: 126
[2018-01-28 23:37:58,379 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132
[2018-01-28 23:37:58,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states.
[2018-01-28 23:37:58,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 114.
[2018-01-28 23:37:58,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states.
[2018-01-28 23:37:58,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 133 transitions.
[2018-01-28 23:37:58,387 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 133 transitions. Word has length 26
[2018-01-28 23:37:58,387 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:37:58,388 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 133 transitions.
[2018-01-28 23:37:58,388 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states.
[2018-01-28 23:37:58,388 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 133 transitions.
[2018-01-28 23:37:58,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43
[2018-01-28 23:37:58,389 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:37:58,389 INFO L330 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:37:58,390 INFO L371 AbstractCegarLoop]: === Iteration 10 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr9RequiresViolation, subseqErr3RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:37:58,390 INFO L82 PathProgramCache]: Analyzing trace with hash 1621804739, now seen corresponding path program 1 times
[2018-01-28 23:37:58,390 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:37:58,390 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:37:58,391 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:58,391 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:37:58,391 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:58,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:37:58,400 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:37:58,439 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-28 23:37:58,439 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:37:58,439 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2018-01-28 23:37:58,440 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states
[2018-01-28 23:37:58,440 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2018-01-28 23:37:58,440 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2018-01-28 23:37:58,440 INFO L87 Difference]: Start difference. First operand 114 states and 133 transitions. Second operand 3 states.
[2018-01-28 23:37:58,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:37:58,461 INFO L93 Difference]: Finished difference Result 184 states and 214 transitions.
[2018-01-28 23:37:58,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states.
[2018-01-28 23:37:58,461 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 42
[2018-01-28 23:37:58,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:37:58,462 INFO L225 Difference]: With dead ends: 184
[2018-01-28 23:37:58,463 INFO L226 Difference]: Without dead ends: 103
[2018-01-28 23:37:58,464 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2018-01-28 23:37:58,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states.
[2018-01-28 23:37:58,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 102.
[2018-01-28 23:37:58,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states.
[2018-01-28 23:37:58,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 114 transitions.
[2018-01-28 23:37:58,469 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 114 transitions. Word has length 42
[2018-01-28 23:37:58,469 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:37:58,469 INFO L432 AbstractCegarLoop]: Abstraction has 102 states and 114 transitions.
[2018-01-28 23:37:58,469 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states.
[2018-01-28 23:37:58,469 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 114 transitions.
[2018-01-28 23:37:58,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45
[2018-01-28 23:37:58,471 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:37:58,471 INFO L330 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:37:58,471 INFO L371 AbstractCegarLoop]: === Iteration 11 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr9RequiresViolation, subseqErr3RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:37:58,471 INFO L82 PathProgramCache]: Analyzing trace with hash 1427331863, now seen corresponding path program 1 times
[2018-01-28 23:37:58,471 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:37:58,472 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:37:58,472 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:58,473 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:37:58,473 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:58,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-28 23:37:58,484 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-28 23:37:58,530 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked.
[2018-01-28 23:37:58,531 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-28 23:37:58,531 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2018-01-28 23:37:58,531 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states
[2018-01-28 23:37:58,531 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2018-01-28 23:37:58,532 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2018-01-28 23:37:58,532 INFO L87 Difference]: Start difference. First operand 102 states and 114 transitions. Second operand 7 states.
[2018-01-28 23:37:58,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-28 23:37:58,589 INFO L93 Difference]: Finished difference Result 102 states and 114 transitions.
[2018-01-28 23:37:58,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states.
[2018-01-28 23:37:58,589 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 44
[2018-01-28 23:37:58,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-28 23:37:58,590 INFO L225 Difference]: With dead ends: 102
[2018-01-28 23:37:58,590 INFO L226 Difference]: Without dead ends: 101
[2018-01-28 23:37:58,590 INFO L533 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90
[2018-01-28 23:37:58,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states.
[2018-01-28 23:37:58,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 96.
[2018-01-28 23:37:58,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states.
[2018-01-28 23:37:58,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 107 transitions.
[2018-01-28 23:37:58,594 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 107 transitions. Word has length 44
[2018-01-28 23:37:58,594 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-28 23:37:58,594 INFO L432 AbstractCegarLoop]: Abstraction has 96 states and 107 transitions.
[2018-01-28 23:37:58,594 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states.
[2018-01-28 23:37:58,595 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 107 transitions.
[2018-01-28 23:37:58,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45
[2018-01-28 23:37:58,595 INFO L322 BasicCegarLoop]: Found error trace
[2018-01-28 23:37:58,595 INFO L330 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-28 23:37:58,596 INFO L371 AbstractCegarLoop]: === Iteration 12 === [subseqErr8RequiresViolation, subseqErr4RequiresViolation, subseqErr2RequiresViolation, subseqErr9RequiresViolation, subseqErr3RequiresViolation, subseqErr7RequiresViolation, subseqErr5RequiresViolation, subseqErr1RequiresViolation, subseqErr0RequiresViolation, subseqErr6RequiresViolation, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr0RequiresViolation, mainErr4EnsuresViolation]===
[2018-01-28 23:37:58,596 INFO L82 PathProgramCache]: Analyzing trace with hash 1427331865, now seen corresponding path program 1 times
[2018-01-28 23:37:58,596 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-28 23:37:58,596 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-28 23:37:58,596 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:58,597 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-28 23:37:58,597 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-28 23:37:58,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2018-01-28 23:37:58,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat
[2018-01-28 23:37:58,653 INFO L389 BasicCegarLoop]: Counterexample might be feasible
[2018-01-28 23:37:58,656 INFO L84 mationBacktranslator]: Skipped ATE [385] [385] ULTIMATE.startENTRY-->L1: Formula: true InVars {} OutVars{#NULL.offset=|v_#NULL.offset_2|, #NULL.base=|v_#NULL.base_2|, #valid=|v_#valid_13|} AuxVars[] AssignedVars[#valid, #NULL.offset, #NULL.base]
[2018-01-28 23:37:58,657 INFO L84 mationBacktranslator]: Skipped ATE [391] [391] L1-->mainENTRY: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[]
[2018-01-28 23:37:58,657 INFO L84 mationBacktranslator]: Skipped ATE [397] [397] mainENTRY-->L554: Formula: (and (<= 0 (+ |v_main_#t~nondet8_1| 2147483648)) (<= |v_main_#t~nondet8_1| 2147483647)) InVars {main_#t~nondet8=|v_main_#t~nondet8_1|} OutVars{main_#t~nondet8=|v_main_#t~nondet8_1|} AuxVars[] AssignedVars[]
[2018-01-28 23:37:58,657 INFO L84 mationBacktranslator]: Skipped ATE [401] [401] L554-->L554': Formula: (= v_main_~length1~5_1 |v_main_#t~nondet8_2|) InVars {main_#t~nondet8=|v_main_#t~nondet8_2|} OutVars{main_#t~nondet8=|v_main_#t~nondet8_2|, main_~length1~5=v_main_~length1~5_1} AuxVars[] AssignedVars[main_~length1~5]
[2018-01-28 23:37:58,657 INFO L84 mationBacktranslator]: Skipped ATE [405] [405] L554'-->L555: Formula: true InVars {} OutVars{main_#t~nondet8=|v_main_#t~nondet8_3|} AuxVars[] AssignedVars[main_#t~nondet8]
[2018-01-28 23:37:58,657 INFO L84 mationBacktranslator]: Skipped ATE [407] [407] L555-->L555': Formula: (and (<= |v_main_#t~nondet9_1| 2147483647) (<= 0 (+ |v_main_#t~nondet9_1| 2147483648))) InVars {main_#t~nondet9=|v_main_#t~nondet9_1|} OutVars{main_#t~nondet9=|v_main_#t~nondet9_1|} AuxVars[] AssignedVars[]
[2018-01-28 23:37:58,657 INFO L84 mationBacktranslator]: Skipped ATE [409] [409] L555'-->L555'': Formula: (= v_main_~length2~5_1 |v_main_#t~nondet9_2|) InVars {main_#t~nondet9=|v_main_#t~nondet9_2|} OutVars{main_#t~nondet9=|v_main_#t~nondet9_2|, main_~length2~5=v_main_~length2~5_1} AuxVars[] AssignedVars[main_~length2~5]
[2018-01-28 23:37:58,657 INFO L84 mationBacktranslator]: Skipped ATE [411] [411] L555''-->L556: Formula: true InVars {} OutVars{main_#t~nondet9=|v_main_#t~nondet9_3|} AuxVars[] AssignedVars[main_#t~nondet9]
[2018-01-28 23:37:58,658 INFO L84 mationBacktranslator]: Skipped ATE [415] [415] L556-->L556'': Formula: (not (< v_main_~length1~5_4 1)) InVars {main_~length1~5=v_main_~length1~5_4} OutVars{main_~length1~5=v_main_~length1~5_4} AuxVars[] AssignedVars[]
[2018-01-28 23:37:58,658 INFO L84 mationBacktranslator]: Skipped ATE [421] [421] L556''-->L559': Formula: (not (< v_main_~length2~5_4 1)) InVars {main_~length2~5=v_main_~length2~5_4} OutVars{main_~length2~5=v_main_~length2~5_4} AuxVars[] AssignedVars[]
[2018-01-28 23:37:58,658 INFO L84 mationBacktranslator]: Skipped ATE [425] [425] L559'-->L562: Formula: (and (= |v_#valid_17| (store |v_#valid_18| |v_main_#t~malloc10.base_1| 1)) (not (= 0 |v_main_#t~malloc10.base_1|)) (= |v_main_#t~malloc10.offset_1| 0) (= (store |v_#length_14| |v_main_#t~malloc10.base_1| v_main_~length1~5_5) |v_#length_13|) (= (select |v_#valid_18| |v_main_#t~malloc10.base_1|) 0)) InVars {#length=|v_#length_14|, #valid=|v_#valid_18|, main_~length1~5=v_main_~length1~5_5} OutVars{#length=|v_#length_13|, main_#t~malloc10.offset=|v_main_#t~malloc10.offset_1|, main_#t~malloc10.base=|v_main_#t~malloc10.base_1|, #valid=|v_#valid_17|, main_~length1~5=v_main_~length1~5_5} AuxVars[] AssignedVars[#valid, #length, main_#t~malloc10.offset, main_#t~malloc10.base]
[2018-01-28 23:37:58,658 INFO L84 mationBacktranslator]: Skipped ATE [427] [427] L562-->L563: Formula: (and (= v_main_~nondetString1~5.base_1 |v_main_#t~malloc10.base_2|) (= v_main_~nondetString1~5.offset_1 |v_main_#t~malloc10.offset_2|)) InVars {main_#t~malloc10.base=|v_main_#t~malloc10.base_2|, main_#t~malloc10.offset=|v_main_#t~malloc10.offset_2|} OutVars{main_~nondetString1~5.offset=v_main_~nondetString1~5.offset_1, main_#t~malloc10.offset=|v_main_#t~malloc10.offset_2|, main_#t~malloc10.base=|v_main_#t~malloc10.base_2|, main_~nondetString1~5.base=v_main_~nondetString1~5.base_1} AuxVars[] AssignedVars[main_~nondetString1~5.base, main_~nondetString1~5.offset]
[2018-01-28 23:37:58,658 INFO L84 mationBacktranslator]: Skipped ATE [429] [429] L563-->L563': Formula: (and (= |v_#valid_19| (store |v_#valid_20| |v_main_#t~malloc11.base_1| 1)) (= |v_main_#t~malloc11.offset_1| 0) (= |v_#length_15| (store |v_#length_16| |v_main_#t~malloc11.base_1| v_main_~length2~5_5)) (not (= |v_main_#t~malloc11.base_1| 0)) (= 0 (select |v_#valid_20| |v_main_#t~malloc11.base_1|))) InVars {#length=|v_#length_16|, main_~length2~5=v_main_~length2~5_5, #valid=|v_#valid_20|} OutVars{#length=|v_#length_15|, main_#t~malloc11.offset=|v_main_#t~malloc11.offset_1|, main_#t~malloc11.base=|v_main_#t~malloc11.base_1|, main_~length2~5=v_main_~length2~5_5, #valid=|v_#valid_19|} AuxVars[] AssignedVars[#valid, #length, main_#t~malloc11.offset, main_#t~malloc11.base]
[2018-01-28 23:37:58,658 INFO L84 mationBacktranslator]: Skipped ATE [431] [431] L563'-->L564: Formula: (and (= v_main_~nondetString2~5.offset_1 |v_main_#t~malloc11.offset_2|) (= v_main_~nondetString2~5.base_1 |v_main_#t~malloc11.base_2|)) InVars {main_#t~malloc11.base=|v_main_#t~malloc11.base_2|, main_#t~malloc11.offset=|v_main_#t~malloc11.offset_2|} OutVars{main_~nondetString2~5.offset=v_main_~nondetString2~5.offset_1, main_#t~malloc11.offset=|v_main_#t~malloc11.offset_2|, main_#t~malloc11.base=|v_main_#t~malloc11.base_2|, main_~nondetString2~5.base=v_main_~nondetString2~5.base_1} AuxVars[] AssignedVars[main_~nondetString2~5.offset, main_~nondetString2~5.base]
[2018-01-28 23:37:58,659 INFO L84 mationBacktranslator]: Skipped ATE [433] [433] L564-->L564': Formula: (let ((.cse0 (+ v_main_~nondetString1~5.offset_2 v_main_~length1~5_6))) (and (<= 1 .cse0) (= |v_#memory_int_part_locs_0_locs_0_1| |v_#memory_int_part_locs_0_locs_0_2|) (= 1 (select |v_#valid_21| v_main_~nondetString1~5.base_2)) (<= .cse0 (select |v_#length_17| v_main_~nondetString1~5.base_2)))) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_2|, main_~nondetString1~5.base=v_main_~nondetString1~5.base_2, main_~length1~5=v_main_~length1~5_6, #valid=|v_#valid_21|, main_~nondetString1~5.offset=v_main_~nondetString1~5.offset_2, #length=|v_#length_17|} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_1|, main_~nondetString1~5.base=v_main_~nondetString1~5.base_2, main_~length1~5=v_main_~length1~5_6, #valid=|v_#valid_21|, #memory_int=|v_#memory_int_8|, main_~nondetString1~5.offset=v_main_~nondetString1~5.offset_2, #length=|v_#length_17|} AuxVars[] AssignedVars[#memory_int_part_locs_0_locs_0, #memory_int]
[2018-01-28 23:37:58,659 INFO L84 mationBacktranslator]: Skipped ATE [439] [439] L564'-->L565: Formula: (let ((.cse0 (+ v_main_~nondetString2~5.offset_2 v_main_~length2~5_6))) (and (<= .cse0 (select |v_#length_19| v_main_~nondetString2~5.base_2)) (= 1 (select |v_#valid_23| v_main_~nondetString2~5.base_2)) (= |v_#memory_int_part_locs_0_locs_0_3| |v_#memory_int_part_locs_0_locs_0_4|) (<= 1 .cse0))) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_3|, main_~length2~5=v_main_~length2~5_6, #valid=|v_#valid_23|, main_~nondetString2~5.offset=v_main_~nondetString2~5.offset_2, #length=|v_#length_19|, main_~nondetString2~5.base=v_main_~nondetString2~5.base_2} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_4|, main_~length2~5=v_main_~length2~5_6, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_10|, main_~nondetString2~5.offset=v_main_~nondetString2~5.offset_2, #length=|v_#length_19|, main_~nondetString2~5.base=v_main_~nondetString2~5.base_2} AuxVars[] AssignedVars[#memory_int_part_locs_0_locs_0, #memory_int]
[2018-01-28 23:37:58,659 INFO L84 mationBacktranslator]: Skipped ATE [447] [447] L565-->subseqENTRY: Formula: (and (= |v_subseq_#in~s.baseInParam_1| v_main_~nondetString1~5.base_6) (= |v_subseq_#in~t.baseInParam_1| v_main_~nondetString2~5.base_6) (= |v_subseq_#in~t.offsetInParam_1| v_main_~nondetString2~5.offset_5) (= |v_subseq_#in~s.offsetInParam_1| v_main_~nondetString1~5.offset_5)) InVars {main_~nondetString1~5.offset=v_main_~nondetString1~5.offset_5, main_~nondetString2~5.offset=v_main_~nondetString2~5.offset_5, main_~nondetString1~5.base=v_main_~nondetString1~5.base_6, main_~nondetString2~5.base=v_main_~nondetString2~5.base_6} OutVars{subseq_#in~s.offset=|v_subseq_#in~s.offsetInParam_1|, subseq_#in~t.base=|v_subseq_#in~t.baseInParam_1|, subseq_#in~t.offset=|v_subseq_#in~t.offsetInParam_1|, subseq_#in~s.base=|v_subseq_#in~s.baseInParam_1|} AuxVars[] AssignedVars[subseq_#in~s.offset, subseq_#in~s.base, subseq_#in~t.base, subseq_#in~t.offset]
[2018-01-28 23:37:58,659 INFO L84 mationBacktranslator]: Skipped ATE [451] [451] subseqENTRY-->L540: Formula: (and (= v_subseq_~s.offset_1 |v_subseq_#in~s.offset_1|) (= v_subseq_~s.base_1 |v_subseq_#in~s.base_1|)) InVars {subseq_#in~s.offset=|v_subseq_#in~s.offset_1|, subseq_#in~s.base=|v_subseq_#in~s.base_1|} OutVars{subseq_#in~s.offset=|v_subseq_#in~s.offset_1|, subseq_~s.offset=v_subseq_~s.offset_1, subseq_~s.base=v_subseq_~s.base_1, subseq_#in~s.base=|v_subseq_#in~s.base_1|} AuxVars[] AssignedVars[subseq_~s.offset, subseq_~s.base]
[2018-01-28 23:37:58,659 INFO L84 mationBacktranslator]: Skipped ATE [455] [455] L540-->L542: Formula: (and (= v_subseq_~t.offset_1 |v_subseq_#in~t.offset_1|) (= v_subseq_~t.base_1 |v_subseq_#in~t.base_1|)) InVars {subseq_#in~t.offset=|v_subseq_#in~t.offset_1|, subseq_#in~t.base=|v_subseq_#in~t.base_1|} OutVars{subseq_~t.base=v_subseq_~t.base_1, subseq_#in~t.offset=|v_subseq_#in~t.offset_1|, subseq_#in~t.base=|v_subseq_#in~t.base_1|, subseq_~t.offset=v_subseq_~t.offset_1} AuxVars[] AssignedVars[subseq_~t.offset, subseq_~t.base]
[2018-01-28 23:37:58,660 INFO L84 mationBacktranslator]: Skipped ATE [459] [459] L542-->L543: Formula: (and (= v_subseq_~ps~2.base_1 v_subseq_~s.base_2) (= v_subseq_~ps~2.offset_1 v_subseq_~s.offset_2)) InVars {subseq_~s.offset=v_subseq_~s.offset_2, subseq_~s.base=v_subseq_~s.base_2} OutVars{subseq_~s.offset=v_subseq_~s.offset_2, subseq_~s.base=v_subseq_~s.base_2, subseq_~ps~2.base=v_subseq_~ps~2.base_1, subseq_~ps~2.offset=v_subseq_~ps~2.offset_1} AuxVars[] AssignedVars[subseq_~ps~2.base, subseq_~ps~2.offset]
[2018-01-28 23:37:58,660 INFO L84 mationBacktranslator]: Skipped ATE [463] [463] L543-->L544'''''''''''''': Formula: (and (= v_subseq_~pt~2.base_1 v_subseq_~t.base_2) (= v_subseq_~pt~2.offset_1 v_subseq_~t.offset_2)) InVars {subseq_~t.base=v_subseq_~t.base_2, subseq_~t.offset=v_subseq_~t.offset_2} OutVars{subseq_~pt~2.offset=v_subseq_~pt~2.offset_1, subseq_~t.base=v_subseq_~t.base_2, subseq_~pt~2.base=v_subseq_~pt~2.base_1, subseq_~t.offset=v_subseq_~t.offset_2} AuxVars[] AssignedVars[subseq_~pt~2.base, subseq_~pt~2.offset]
[2018-01-28 23:37:58,660 INFO L84 mationBacktranslator]: Skipped ATE [467] [467] L544''''''''''''''-->L544: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[]
[2018-01-28 23:37:58,660 INFO L84 mationBacktranslator]: Skipped ATE [473] [473] L544-->L544': Formula: (and (<= (+ v_subseq_~ps~2.offset_2 1) (select |v_#length_1| v_subseq_~ps~2.base_2)) (= (select (select |v_#memory_int_part_locs_0_locs_0_5| v_subseq_~ps~2.base_2) v_subseq_~ps~2.offset_2) |v_subseq_#t~mem0_1|) (= 1 (select |v_#valid_3| v_subseq_~ps~2.base_2)) (<= 0 v_subseq_~ps~2.offset_2)) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_5|, #length=|v_#length_1|, subseq_~ps~2.base=v_subseq_~ps~2.base_2, subseq_~ps~2.offset=v_subseq_~ps~2.offset_2, #valid=|v_#valid_3|} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_5|, subseq_#t~mem0=|v_subseq_#t~mem0_1|, #valid=|v_#valid_3|, #length=|v_#length_1|, subseq_~ps~2.base=v_subseq_~ps~2.base_2, subseq_~ps~2.offset=v_subseq_~ps~2.offset_2} AuxVars[] AssignedVars[subseq_#t~mem0]
[2018-01-28 23:37:58,660 INFO L84 mationBacktranslator]: Skipped ATE [487] [487] L544'-->L544'': Formula: (let ((.cse0 (= 0 |v_subseq_#t~mem0_2|))) (or (and .cse0 (not |v_subseq_#t~short2_1|)) (and |v_subseq_#t~short2_1| (not .cse0)))) InVars {subseq_#t~mem0=|v_subseq_#t~mem0_2|} OutVars{subseq_#t~short2=|v_subseq_#t~short2_1|, subseq_#t~mem0=|v_subseq_#t~mem0_2|} AuxVars[] AssignedVars[subseq_#t~short2]
[2018-01-28 23:37:58,660 INFO L84 mationBacktranslator]: Skipped ATE [497] [497] L544''-->L544''': Formula: |v_subseq_#t~short2_2| InVars {subseq_#t~short2=|v_subseq_#t~short2_2|} OutVars{subseq_#t~short2=|v_subseq_#t~short2_2|} AuxVars[] AssignedVars[]
[2018-01-28 23:37:58,660 INFO L84 mationBacktranslator]: Skipped ATE [505] [505] L544'''-->L544'''': Formula: (and (= (select |v_#valid_5| v_subseq_~pt~2.base_2) 1) (<= 0 v_subseq_~pt~2.offset_2) (<= (+ v_subseq_~pt~2.offset_2 1) (select |v_#length_3| v_subseq_~pt~2.base_2)) (= (select (select |v_#memory_int_part_locs_0_locs_0_7| v_subseq_~pt~2.base_2) v_subseq_~pt~2.offset_2) |v_subseq_#t~mem1_1|)) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_7|, subseq_~pt~2.offset=v_subseq_~pt~2.offset_2, #length=|v_#length_3|, subseq_~pt~2.base=v_subseq_~pt~2.base_2, #valid=|v_#valid_5|} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_7|, subseq_#t~mem1=|v_subseq_#t~mem1_1|, subseq_~pt~2.base=v_subseq_~pt~2.base_2, #valid=|v_#valid_5|, subseq_~pt~2.offset=v_subseq_~pt~2.offset_2, #length=|v_#length_3|} AuxVars[] AssignedVars[subseq_#t~mem1]
[2018-01-28 23:37:58,661 INFO L84 mationBacktranslator]: Skipped ATE [519] [519] L544''''-->L544'''''': Formula: (let ((.cse0 (= 0 |v_subseq_#t~mem1_2|))) (or (and .cse0 (not |v_subseq_#t~short2_3|)) (and (not .cse0) |v_subseq_#t~short2_3|))) InVars {subseq_#t~mem1=|v_subseq_#t~mem1_2|} OutVars{subseq_#t~short2=|v_subseq_#t~short2_3|, subseq_#t~mem1=|v_subseq_#t~mem1_2|} AuxVars[] AssignedVars[subseq_#t~short2]
[2018-01-28 23:37:58,661 INFO L84 mationBacktranslator]: Skipped ATE [513] [513] L544''''''-->L544''''''''''': Formula: |v_subseq_#t~short2_7| InVars {subseq_#t~short2=|v_subseq_#t~short2_7|} OutVars{subseq_#t~short2=|v_subseq_#t~short2_7|} AuxVars[] AssignedVars[]
[2018-01-28 23:37:58,661 INFO L84 mationBacktranslator]: Skipped ATE [523] [523] L544'''''''''''-->L544'''''''''''': Formula: true InVars {} OutVars{subseq_#t~mem0=|v_subseq_#t~mem0_4|} AuxVars[] AssignedVars[subseq_#t~mem0]
[2018-01-28 23:37:58,661 INFO L84 mationBacktranslator]: Skipped ATE [529] [529] L544''''''''''''-->L544''''''''''''': Formula: true InVars {} OutVars{subseq_#t~mem1=|v_subseq_#t~mem1_4|} AuxVars[] AssignedVars[subseq_#t~mem1]
[2018-01-28 23:37:58,661 INFO L84 mationBacktranslator]: Skipped ATE [533] [533] L544'''''''''''''-->L545: Formula: true InVars {} OutVars{subseq_#t~short2=|v_subseq_#t~short2_8|} AuxVars[] AssignedVars[subseq_#t~short2]
[2018-01-28 23:37:58,661 INFO L84 mationBacktranslator]: Skipped ATE [535] [535] L545-->L545': Formula: (and (= 1 (select |v_#valid_7| v_subseq_~ps~2.base_5)) (<= 0 v_subseq_~ps~2.offset_4) (= |v_subseq_#t~mem3_1| (select (select |v_#memory_int_part_locs_0_locs_0_8| v_subseq_~ps~2.base_5) v_subseq_~ps~2.offset_4)) (<= (+ v_subseq_~ps~2.offset_4 1) (select |v_#length_5| v_subseq_~ps~2.base_5))) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_8|, #length=|v_#length_5|, subseq_~ps~2.base=v_subseq_~ps~2.base_5, subseq_~ps~2.offset=v_subseq_~ps~2.offset_4, #valid=|v_#valid_7|} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_8|, subseq_#t~mem3=|v_subseq_#t~mem3_1|, #valid=|v_#valid_7|, #length=|v_#length_5|, subseq_~ps~2.base=v_subseq_~ps~2.base_5, subseq_~ps~2.offset=v_subseq_~ps~2.offset_4} AuxVars[] AssignedVars[subseq_#t~mem3]
[2018-01-28 23:37:58,662 INFO L84 mationBacktranslator]: Skipped ATE [541] [541] L545'-->L545'': Formula: (and (= (select |v_#valid_9| v_subseq_~pt~2.base_5) 1) (<= 0 v_subseq_~pt~2.offset_4) (<= (+ v_subseq_~pt~2.offset_4 1) (select |v_#length_7| v_subseq_~pt~2.base_5)) (= |v_subseq_#t~mem4_1| (select (select |v_#memory_int_part_locs_0_locs_0_9| v_subseq_~pt~2.base_5) v_subseq_~pt~2.offset_4))) InVars {#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_9|, subseq_~pt~2.offset=v_subseq_~pt~2.offset_4, #length=|v_#length_7|, subseq_~pt~2.base=v_subseq_~pt~2.base_5, #valid=|v_#valid_9|} OutVars{#memory_int_part_locs_0_locs_0=|v_#memory_int_part_locs_0_locs_0_9|, subseq_~pt~2.base=v_subseq_~pt~2.base_5, subseq_#t~mem4=|v_subseq_#t~mem4_1|, #valid=|v_#valid_9|, subseq_~pt~2.offset=v_subseq_~pt~2.offset_4, #length=|v_#length_7|} AuxVars[] AssignedVars[subseq_#t~mem4]
[2018-01-28 23:37:58,662 INFO L84 mationBacktranslator]: Skipped ATE [547] [547] L545''-->L545''': Formula: (= |v_subseq_#t~mem4_2| |v_subseq_#t~mem3_2|) InVars {subseq_#t~mem4=|v_subseq_#t~mem4_2|, subseq_#t~mem3=|v_subseq_#t~mem3_2|} OutVars{subseq_#t~mem4=|v_subseq_#t~mem4_2|, subseq_#t~mem3=|v_subseq_#t~mem3_2|} AuxVars[] AssignedVars[]
[2018-01-28 23:37:58,662 INFO L84 mationBacktranslator]: Skipped ATE [551] [551] L545'''-->L545'''': Formula: true InVars {} OutVars{subseq_#t~mem3=|v_subseq_#t~mem3_3|} AuxVars[] AssignedVars[subseq_#t~mem3]
[2018-01-28 23:37:58,662 INFO L84 mationBacktranslator]: Skipped ATE [555] [555] L545''''-->L546: Formula: true InVars {} OutVars{subseq_#t~mem4=|v_subseq_#t~mem4_3|} AuxVars[] AssignedVars[subseq_#t~mem4]
[2018-01-28 23:37:58,662 INFO L84 mationBacktranslator]: Skipped ATE [559] [559] L546-->L546': Formula: (and (= |v_subseq_#t~post5.offset_1| v_subseq_~ps~2.offset_6) (= |v_subseq_#t~post5.base_1| v_subseq_~ps~2.base_8)) InVars {subseq_~ps~2.offset=v_subseq_~ps~2.offset_6, subseq_~ps~2.base=v_subseq_~ps~2.base_8} OutVars{subseq_~ps~2.base=v_subseq_~ps~2.base_8, subseq_#t~post5.offset=|v_subseq_#t~post5.offset_1|, subseq_~ps~2.offset=v_subseq_~ps~2.offset_6, subseq_#t~post5.base=|v_subseq_#t~post5.base_1|} AuxVars[] AssignedVars[subseq_#t~post5.offset, subseq_#t~post5.base]
[2018-01-28 23:37:58,662 INFO L84 mationBacktranslator]: Skipped ATE [563] [563] L546'-->L546'': Formula: (and (= v_subseq_~ps~2.base_9 |v_subseq_#t~post5.base_2|) (= v_subseq_~ps~2.offset_7 (+ |v_subseq_#t~post5.offset_2| 1))) InVars {subseq_#t~post5.offset=|v_subseq_#t~post5.offset_2|, subseq_#t~post5.base=|v_subseq_#t~post5.base_2|} OutVars{subseq_~ps~2.base=v_subseq_~ps~2.base_9, subseq_#t~post5.offset=|v_subseq_#t~post5.offset_2|, subseq_~ps~2.offset=v_subseq_~ps~2.offset_7, subseq_#t~post5.base=|v_subseq_#t~post5.base_2|} AuxVars[] AssignedVars[subseq_~ps~2.base, subseq_~ps~2.offset]
[2018-01-28 23:37:58,663 INFO L84 mationBacktranslator]: Skipped ATE [567] [567] L546''-->L545'''''''': Formula: true InVars {} OutVars{subseq_#t~post5.offset=|v_subseq_#t~post5.offset_3|, subseq_#t~post5.base=|v_subseq_#t~post5.base_3|} AuxVars[] AssignedVars[subseq_#t~post5.offset, subseq_#t~post5.base]
[2018-01-28 23:37:58,663 INFO L84 mationBacktranslator]: Skipped ATE [561] [561] L545''''''''-->L548: Formula: (and (= |v_subseq_#t~post6.base_1| v_subseq_~pt~2.base_8) (= |v_subseq_#t~post6.offset_1| v_subseq_~pt~2.offset_6)) InVars {subseq_~pt~2.offset=v_subseq_~pt~2.offset_6, subseq_~pt~2.base=v_subseq_~pt~2.base_8} OutVars{subseq_~pt~2.offset=v_subseq_~pt~2.offset_6, subseq_~pt~2.base=v_subseq_~pt~2.base_8, subseq_#t~post6.base=|v_subseq_#t~post6.base_1|, subseq_#t~post6.offset=|v_subseq_#t~post6.offset_1|} AuxVars[] AssignedVars[subseq_#t~post6.base, subseq_#t~post6.offset]
[2018-01-28 23:37:58,663 INFO L84 mationBacktranslator]: Skipped ATE [565] [565] L548-->L548': Formula: (and (= v_subseq_~pt~2.offset_7 (+ |v_subseq_#t~post6.offset_2| 1)) (= v_subseq_~pt~2.base_9 |v_subseq_#t~post6.base_2|)) InVars {subseq_#t~post6.base=|v_subseq_#t~post6.base_2|, subseq_#t~post6.offset=|v_subseq_#t~post6.offset_2|} OutVars{subseq_~pt~2.offset=v_subseq_~pt~2.offset_7, subseq_~pt~2.base=v_subseq_~pt~2.base_9, subseq_#t~post6.base=|v_subseq_#t~post6.base_2|, subseq_#t~post6.offset=|v_subseq_#t~post6.offset_2|} AuxVars[] AssignedVars[subseq_~pt~2.base, subseq_~pt~2.offset]
[2018-01-28 23:37:58,663 INFO L84 mationBacktranslator]: Skipped ATE [569] [569] L548'-->L544'''''''''''''': Formula: true InVars {} OutVars{subseq_#t~post6.base=|v_subseq_#t~post6.base_3|, subseq_#t~post6.offset=|v_subseq_#t~post6.offset_3|} AuxVars[] AssignedVars[subseq_#t~post6.base, subseq_#t~post6.offset]
[2018-01-28 23:37:58,663 INFO L84 mationBacktranslator]: Skipped ATE [467] [467] L544''''''''''''''-->L544: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[]
[2018-01-28 23:37:58,663 INFO L84 mationBacktranslator]: Skipped ATE [477] [477] L544-->subseqErr1RequiresViolation: Formula: (or (not (<= 0 v_subseq_~ps~2.offset_3)) (not (<= (+ v_subseq_~ps~2.offset_3 1) (select |v_#length_2| v_subseq_~ps~2.base_4)))) InVars {#length=|v_#length_2|, subseq_~ps~2.base=v_subseq_~ps~2.base_4, subseq_~ps~2.offset=v_subseq_~ps~2.offset_3} OutVars{#length=|v_#length_2|, subseq_~ps~2.base=v_subseq_~ps~2.base_4, subseq_~ps~2.offset=v_subseq_~ps~2.offset_3} AuxVars[] AssignedVars[]
[2018-01-28 23:37:58,669 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.01 11:37:58 BasicIcfg
[2018-01-28 23:37:58,670 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction----------------------------
[2018-01-28 23:37:58,670 INFO L168 Benchmark]: Toolchain (without parser) took 50403.69 ms. Allocated memory was 299.9 MB in the beginning and 2.3 GB in the end (delta: 2.0 GB). Free memory was 259.9 MB in the beginning and 1.9 GB in the end (delta: -1.7 GB). Peak memory consumption was 301.9 MB. Max. memory is 5.3 GB.
[2018-01-28 23:37:58,671 INFO L168 Benchmark]: CDTParser took 0.25 ms. Allocated memory is still 299.9 MB. Free memory is still 265.9 MB. There was no memory consumed. Max. memory is 5.3 GB.
[2018-01-28 23:37:58,672 INFO L168 Benchmark]: CACSL2BoogieTranslator took 217.18 ms. Allocated memory is still 299.9 MB. Free memory was 258.9 MB in the beginning and 248.7 MB in the end (delta: 10.2 MB). Peak memory consumption was 10.2 MB. Max. memory is 5.3 GB.
[2018-01-28 23:37:58,672 INFO L168 Benchmark]: Boogie Preprocessor took 36.16 ms. Allocated memory is still 299.9 MB. Free memory was 248.7 MB in the beginning and 246.7 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 5.3 GB.
[2018-01-28 23:37:58,672 INFO L168 Benchmark]: RCFGBuilder took 307.40 ms. Allocated memory is still 299.9 MB. Free memory was 246.7 MB in the beginning and 225.1 MB in the end (delta: 21.6 MB). Peak memory consumption was 21.6 MB. Max. memory is 5.3 GB.
[2018-01-28 23:37:58,673 INFO L168 Benchmark]: IcfgTransformer took 47461.36 ms. Allocated memory was 299.9 MB in the beginning and 2.2 GB in the end (delta: 1.9 GB). Free memory was 225.1 MB in the beginning and 190.7 MB in the end (delta: 34.4 MB). Peak memory consumption was 1.9 GB. Max. memory is 5.3 GB.
[2018-01-28 23:37:58,673 INFO L168 Benchmark]: TraceAbstraction took 2371.93 ms. Allocated memory was 2.2 GB in the beginning and 2.3 GB in the end (delta: 111.1 MB). Free memory was 190.7 MB in the beginning and 1.9 GB in the end (delta: -1.7 GB). There was no memory consumed. Max. memory is 5.3 GB.
[2018-01-28 23:37:58,675 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] #######################
--- Results ---
* Results from de.uni_freiburg.informatik.ultimate.core:
- StatisticsResult: Toolchain Benchmarks
Benchmark results are:
* CDTParser took 0.25 ms. Allocated memory is still 299.9 MB. Free memory is still 265.9 MB. There was no memory consumed. Max. memory is 5.3 GB.
* CACSL2BoogieTranslator took 217.18 ms. Allocated memory is still 299.9 MB. Free memory was 258.9 MB in the beginning and 248.7 MB in the end (delta: 10.2 MB). Peak memory consumption was 10.2 MB. Max. memory is 5.3 GB.
* Boogie Preprocessor took 36.16 ms. Allocated memory is still 299.9 MB. Free memory was 248.7 MB in the beginning and 246.7 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 5.3 GB.
* RCFGBuilder took 307.40 ms. Allocated memory is still 299.9 MB. Free memory was 246.7 MB in the beginning and 225.1 MB in the end (delta: 21.6 MB). Peak memory consumption was 21.6 MB. Max. memory is 5.3 GB.
* IcfgTransformer took 47461.36 ms. Allocated memory was 299.9 MB in the beginning and 2.2 GB in the end (delta: 1.9 GB). Free memory was 225.1 MB in the beginning and 190.7 MB in the end (delta: 34.4 MB). Peak memory consumption was 1.9 GB. Max. memory is 5.3 GB.
* TraceAbstraction took 2371.93 ms. Allocated memory was 2.2 GB in the beginning and 2.3 GB in the end (delta: 111.1 MB). Free memory was 190.7 MB in the beginning and 1.9 GB in the end (delta: -1.7 GB). There was no memory consumed. Max. memory is 5.3 GB.
* Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2:
- StatisticsResult: ArrayEqualityDomainStatistics
#Locations : 79
LocStat_MAX_WEQGRAPH_SIZE : 5
LocStat_MAX_SIZEOF_WEQEDGELABEL : 3
LocStat_NO_SUPPORTING_EQUALITIES : 1526
LocStat_NO_SUPPORTING_DISEQUALITIES : 560
LocStat_NO_DISJUNCTIONS : -158
LocStat_MAX_NO_DISJUNCTIONS : -1
#Transitions : 105
TransStat_MAX_WEQGRAPH_SIZE : 2
TransStat_MAX_SIZEOF_WEQEDGELABEL : 1
TransStat_NO_SUPPORTING_EQUALITIES : 127
TransStat_NO_SUPPORTING_DISEQUALITIES : 16
TransStat_NO_DISJUNCTIONS : 113
TransStat_MAX_NO_DISJUNCTIONS : 2
- StatisticsResult: EqConstraintFactoryStatistics
CONJOIN_DISJUNCTIVE(MILLISECONDS) : 2.003977
RENAME_VARIABLES(MILLISECONDS) : 0.143707
UNFREEZE(MILLISECONDS) : 0.000000
CONJOIN(MILLISECONDS) : 0.964859
PROJECTAWAY(MILLISECONDS) : 0.020227
ADD_WEAK_EQUALITY(MILLISECONDS) : 0.063859
DISJOIN(MILLISECONDS) : 0.273283
RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.160294
ADD_EQUALITY(MILLISECONDS) : 0.010441
DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000
ADD_DISEQUALITY(MILLISECONDS) : 0.010644
#CONJOIN_DISJUNCTIVE : 1407
#RENAME_VARIABLES : 3290
#UNFREEZE : 0
#CONJOIN : 2143
#PROJECTAWAY : 2012
#ADD_WEAK_EQUALITY : 11
#DISJOIN : 344
#RENAME_VARIABLES_DISJUNCTIVE : 3174
#ADD_EQUALITY : 129
#DISJOIN_DISJUNCTIVE : 0
#ADD_DISEQUALITY : 14
* Results from de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation:
- StatisticsResult: HeapSeparatorStatistics
COUNT_ARRAY_WRITES_for_[#memory_int]_at_dim_0 : 1
COUNT_BLOCKS_for_[#memory_int]_at_dim_0 : 1
COUNT_ARRAY_WRITES_for_[#memory_int]_at_dim_1 : 1
COUNT_BLOCKS_for_[#memory_int]_at_dim_1 : 1
COUNT_ARRAY_READS for [#memory_int] : 7
* Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
- CounterExampleResult [Line: 1]: pointer dereference may fail
pointer dereference may fail
We found a FailurePath:
- StatisticsResult: Ultimate Automizer benchmark data
CFG has 4 procedures, 87 locations, 15 error locations. UNSAFE Result, 2.2s OverallTime, 12 OverallIterations, 2 TraceHistogramMax, 1.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 762 SDtfs, 995 SDslu, 1339 SDs, 0 SdLazy, 734 SolverSat, 47 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 80 GetRequests, 15 SyntacticMatches, 1 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=114occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.0s AutomataMinimizationTime, 11 MinimizatonAttempts, 44 StatesRemovedByMinimization, 6 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 315 NumberOfCodeBlocks, 315 NumberOfCodeBlocksAsserted, 12 NumberOfCheckSat, 260 ConstructedInterpolants, 0 QuantifiedInterpolants, 25779 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 11 InterpolantComputations, 11 PerfectInterpolantSequences, 4/4 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available
RESULT: Ultimate proved your program to be incorrect!
Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/subseq-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-Benchmark-0-2018-01-28_23-37-58-686.csv
Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/subseq-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-VPDomainBenchmark-0-2018-01-28_23-37-58-686.csv
Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/subseq-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-BenchmarkWithCounters-0-2018-01-28_23-37-58-686.csv
Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/subseq-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-HeapSeparatorBenchmark-0-2018-01-28_23-37-58-686.csv
Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/subseq-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-28_23-37-58-686.csv
Received shutdown request...