java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memset2_false-valid-deref-write.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 03:18:01,465 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 03:18:01,467 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 03:18:01,482 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 03:18:01,482 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 03:18:01,483 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 03:18:01,484 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 03:18:01,485 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 03:18:01,486 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 03:18:01,487 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 03:18:01,488 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 03:18:01,489 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 03:18:01,490 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 03:18:01,491 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 03:18:01,492 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 03:18:01,495 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 03:18:01,497 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 03:18:01,499 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 03:18:01,500 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 03:18:01,502 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 03:18:01,504 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-21 03:18:01,505 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-21 03:18:01,505 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-21 03:18:01,506 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-21 03:18:01,507 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-21 03:18:01,508 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-21 03:18:01,508 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-21 03:18:01,509 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-21 03:18:01,509 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-21 03:18:01,510 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 03:18:01,510 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 03:18:01,510 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf [2018-01-21 03:18:01,521 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 03:18:01,521 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 03:18:01,522 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 03:18:01,522 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 03:18:01,523 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 03:18:01,523 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-21 03:18:01,523 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 03:18:01,523 INFO L133 SettingsManager]: * Precise comparison operator=true [2018-01-21 03:18:01,523 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 03:18:01,524 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 03:18:01,524 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 03:18:01,525 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 03:18:01,525 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 03:18:01,525 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 03:18:01,525 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 03:18:01,525 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 03:18:01,526 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 03:18:01,526 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 03:18:01,526 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 03:18:01,526 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 03:18:01,526 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 03:18:01,527 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 03:18:01,527 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 03:18:01,527 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 03:18:01,527 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 03:18:01,528 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 03:18:01,528 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 03:18:01,528 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 03:18:01,528 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 03:18:01,528 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 03:18:01,529 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 03:18:01,529 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 03:18:01,529 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 03:18:01,529 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 03:18:01,529 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 03:18:01,529 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 03:18:01,530 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 03:18:01,530 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 03:18:01,531 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 03:18:01,531 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 03:18:01,567 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 03:18:01,580 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 03:18:01,584 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 03:18:01,586 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 03:18:01,586 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 03:18:01,587 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memset2_false-valid-deref-write.c [2018-01-21 03:18:01,714 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 03:18:01,719 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 03:18:01,720 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 03:18:01,720 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 03:18:01,726 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 03:18:01,728 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 03:18:01" (1/1) ... [2018-01-21 03:18:01,730 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@8d55d51 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:18:01, skipping insertion in model container [2018-01-21 03:18:01,731 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 03:18:01" (1/1) ... [2018-01-21 03:18:01,746 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 03:18:01,761 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 03:18:01,861 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 03:18:01,876 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 03:18:01,881 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:18:01 WrapperNode [2018-01-21 03:18:01,881 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 03:18:01,881 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 03:18:01,882 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 03:18:01,882 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 03:18:01,892 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:18:01" (1/1) ... [2018-01-21 03:18:01,893 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:18:01" (1/1) ... [2018-01-21 03:18:01,900 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:18:01" (1/1) ... [2018-01-21 03:18:01,900 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:18:01" (1/1) ... [2018-01-21 03:18:01,902 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:18:01" (1/1) ... [2018-01-21 03:18:01,906 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:18:01" (1/1) ... [2018-01-21 03:18:01,907 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:18:01" (1/1) ... [2018-01-21 03:18:01,909 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 03:18:01,910 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 03:18:01,910 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 03:18:01,910 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 03:18:01,911 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:18:01" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 03:18:01,960 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 03:18:01,961 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 03:18:01,961 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 03:18:01,961 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 03:18:01,961 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 03:18:01,961 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 03:18:01,961 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 03:18:01,961 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 03:18:01,961 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 03:18:01,962 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 03:18:01,962 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 03:18:01,962 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 03:18:02,076 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 03:18:02,076 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 03:18:02 BoogieIcfgContainer [2018-01-21 03:18:02,076 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 03:18:02,077 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 03:18:02,077 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 03:18:02,079 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 03:18:02,079 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 03:18:01" (1/3) ... [2018-01-21 03:18:02,080 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@87a776 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 03:18:02, skipping insertion in model container [2018-01-21 03:18:02,080 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 03:18:01" (2/3) ... [2018-01-21 03:18:02,081 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@87a776 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 03:18:02, skipping insertion in model container [2018-01-21 03:18:02,081 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 03:18:02" (3/3) ... [2018-01-21 03:18:02,083 INFO L105 eAbstractionObserver]: Analyzing ICFG memset2_false-valid-deref-write.c [2018-01-21 03:18:02,091 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 03:18:02,097 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 03:18:02,142 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 03:18:02,143 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 03:18:02,143 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 03:18:02,143 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 03:18:02,143 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 03:18:02,143 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 03:18:02,143 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 03:18:02,144 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 03:18:02,144 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 03:18:02,161 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 03:18:02,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 03:18:02,165 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:02,166 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 03:18:02,166 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 03:18:02,170 INFO L82 PathProgramCache]: Analyzing trace with hash 50935, now seen corresponding path program 1 times [2018-01-21 03:18:02,171 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:02,226 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:02,226 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:02,227 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:02,227 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:02,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 03:18:02,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 03:18:02,285 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 03:18:02,291 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 03:18:02,297 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 03:18:02,297 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 03:18:02,298 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 03:18:02,298 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 03:18:02,298 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 03:18:02,298 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 03:18:02,298 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 03:18:02,298 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 03:18:02,298 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 03:18:02,300 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 03:18:02,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-21 03:18:02,301 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:02,301 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:02,301 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:02,302 INFO L82 PathProgramCache]: Analyzing trace with hash 457189328, now seen corresponding path program 1 times [2018-01-21 03:18:02,302 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:02,303 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:02,303 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:02,303 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:02,303 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:02,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:02,337 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:02,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:02,416 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 03:18:02,416 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 03:18:02,416 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 03:18:02,418 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 03:18:02,433 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 03:18:02,433 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 03:18:02,436 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 4 states. [2018-01-21 03:18:02,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:02,520 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 03:18:02,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 03:18:02,522 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-21 03:18:02,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:02,530 INFO L225 Difference]: With dead ends: 33 [2018-01-21 03:18:02,530 INFO L226 Difference]: Without dead ends: 19 [2018-01-21 03:18:02,592 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 03:18:02,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-01-21 03:18:02,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-01-21 03:18:02,621 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-01-21 03:18:02,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-01-21 03:18:02,623 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-01-21 03:18:02,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:02,623 INFO L432 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-01-21 03:18:02,623 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 03:18:02,623 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-01-21 03:18:02,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 03:18:02,624 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:02,624 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:02,624 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:02,624 INFO L82 PathProgramCache]: Analyzing trace with hash -114007861, now seen corresponding path program 1 times [2018-01-21 03:18:02,624 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:02,625 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:02,625 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:02,625 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:02,625 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:02,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:02,639 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:02,688 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:02,688 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:02,688 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:02,689 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 19 with the following transitions: [2018-01-21 03:18:02,692 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [17], [18], [19], [20], [22], [23], [24], [25], [26], [27] [2018-01-21 03:18:02,737 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 03:18:02,738 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 03:18:03,444 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 03:18:03,446 INFO L268 AbstractInterpreter]: Visited 18 different actions 22 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 03:18:03,469 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 03:18:03,469 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:03,469 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:03,481 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:03,481 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:18:03,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:03,509 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:03,537 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:03,537 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:03,810 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:03,833 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:03,833 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:03,840 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:03,840 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:18:03,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:03,879 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:03,884 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:03,884 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:03,935 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:03,937 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:03,937 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-21 03:18:03,937 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:03,938 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-21 03:18:03,938 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-21 03:18:03,939 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-21 03:18:03,939 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 6 states. [2018-01-21 03:18:03,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:03,961 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-01-21 03:18:03,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 03:18:03,961 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-01-21 03:18:03,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:03,962 INFO L225 Difference]: With dead ends: 29 [2018-01-21 03:18:03,963 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 03:18:03,964 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-21 03:18:03,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 03:18:03,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 03:18:03,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 03:18:03,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 03:18:03,968 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 03:18:03,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:03,968 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 03:18:03,968 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-21 03:18:03,968 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 03:18:03,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 03:18:03,969 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:03,969 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:03,969 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:03,970 INFO L82 PathProgramCache]: Analyzing trace with hash -641251536, now seen corresponding path program 2 times [2018-01-21 03:18:03,970 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:03,971 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:03,971 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:03,971 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:03,971 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:03,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:03,984 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:04,023 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:04,023 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:04,023 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:04,024 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:04,024 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:04,024 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:04,024 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:04,029 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:18:04,029 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:04,046 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:04,050 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:04,051 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:04,053 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:04,069 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:04,070 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:04,199 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:04,233 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:04,233 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:04,237 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:18:04,237 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:04,251 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:04,259 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:04,265 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:04,269 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:04,273 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:04,274 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:04,333 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:04,339 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:04,339 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-21 03:18:04,340 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:04,340 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-21 03:18:04,340 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-21 03:18:04,341 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-21 03:18:04,341 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 7 states. [2018-01-21 03:18:04,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:04,393 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 03:18:04,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 03:18:04,396 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-21 03:18:04,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:04,397 INFO L225 Difference]: With dead ends: 30 [2018-01-21 03:18:04,397 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 03:18:04,398 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 69 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-21 03:18:04,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 03:18:04,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 03:18:04,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 03:18:04,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 03:18:04,402 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 03:18:04,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:04,403 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 03:18:04,404 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-21 03:18:04,405 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 03:18:04,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 03:18:04,405 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:04,405 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:04,406 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:04,406 INFO L82 PathProgramCache]: Analyzing trace with hash 194063723, now seen corresponding path program 3 times [2018-01-21 03:18:04,406 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:04,407 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:04,407 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:04,407 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:04,408 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:04,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:04,421 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:04,470 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:04,471 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:04,471 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:04,471 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:04,471 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:04,471 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:04,471 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:04,483 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:18:04,483 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:18:04,493 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:04,495 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:04,496 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:04,497 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:04,498 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:04,512 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:04,512 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:04,646 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:04,667 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:04,667 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:04,670 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:18:04,670 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:18:04,681 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:04,687 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:04,695 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:04,700 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:04,703 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:04,706 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:04,707 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:04,762 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:04,764 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:04,764 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-21 03:18:04,764 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:04,764 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 03:18:04,764 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 03:18:04,765 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-21 03:18:04,765 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 8 states. [2018-01-21 03:18:04,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:04,802 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 03:18:04,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 03:18:04,803 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 20 [2018-01-21 03:18:04,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:04,803 INFO L225 Difference]: With dead ends: 31 [2018-01-21 03:18:04,804 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 03:18:04,804 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-21 03:18:04,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 03:18:04,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 03:18:04,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 03:18:04,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 03:18:04,808 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 03:18:04,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:04,808 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 03:18:04,808 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 03:18:04,808 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 03:18:04,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 03:18:04,809 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:04,809 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:04,809 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:04,810 INFO L82 PathProgramCache]: Analyzing trace with hash 319032976, now seen corresponding path program 4 times [2018-01-21 03:18:04,810 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:04,811 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:04,811 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:04,811 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:04,811 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:04,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:04,822 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:04,859 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:04,860 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:04,860 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:04,860 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:04,860 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:04,860 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:04,860 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:04,866 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:18:04,866 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:18:04,875 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:04,877 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:04,893 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:04,894 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:04,993 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:05,013 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:05,013 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:05,016 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:18:05,016 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:18:05,037 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:05,041 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:05,045 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:05,045 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:05,094 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:05,096 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:05,096 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-21 03:18:05,096 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:05,096 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-21 03:18:05,097 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-21 03:18:05,097 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-21 03:18:05,097 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 9 states. [2018-01-21 03:18:05,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:05,124 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 03:18:05,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 03:18:05,124 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-01-21 03:18:05,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:05,125 INFO L225 Difference]: With dead ends: 32 [2018-01-21 03:18:05,125 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 03:18:05,125 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 75 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-21 03:18:05,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 03:18:05,127 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 03:18:05,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 03:18:05,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 03:18:05,128 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 03:18:05,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:05,128 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 03:18:05,128 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-21 03:18:05,128 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 03:18:05,128 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 03:18:05,129 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:05,129 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:05,129 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:05,129 INFO L82 PathProgramCache]: Analyzing trace with hash -101887477, now seen corresponding path program 5 times [2018-01-21 03:18:05,129 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:05,130 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:05,130 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:05,130 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:05,130 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:05,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:05,140 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:05,230 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:05,231 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:05,231 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:05,231 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:05,231 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:05,231 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:05,231 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:05,242 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:18:05,242 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:05,247 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:05,250 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:05,251 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:05,255 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:05,256 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:05,258 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:05,266 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:05,266 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:05,391 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:05,413 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:05,413 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:05,416 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:18:05,416 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:05,420 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:05,422 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:05,425 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:05,435 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:05,442 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:05,445 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:05,449 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:05,449 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:05,497 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:05,498 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:05,498 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-21 03:18:05,498 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:05,499 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 03:18:05,499 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 03:18:05,499 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-21 03:18:05,499 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 10 states. [2018-01-21 03:18:05,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:05,517 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 03:18:05,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 03:18:05,518 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 22 [2018-01-21 03:18:05,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:05,518 INFO L225 Difference]: With dead ends: 33 [2018-01-21 03:18:05,518 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 03:18:05,519 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-21 03:18:05,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 03:18:05,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 03:18:05,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 03:18:05,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 03:18:05,522 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 03:18:05,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:05,522 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 03:18:05,522 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 03:18:05,522 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 03:18:05,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 03:18:05,523 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:05,523 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:05,523 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:05,523 INFO L82 PathProgramCache]: Analyzing trace with hash -265519632, now seen corresponding path program 6 times [2018-01-21 03:18:05,523 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:05,524 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:05,524 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:05,524 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:05,524 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:05,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:05,535 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:05,603 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:05,604 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:05,604 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:05,604 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:05,604 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:05,604 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:05,604 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:05,609 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:18:05,609 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:18:05,616 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:05,618 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:05,619 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:05,620 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:05,620 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:05,622 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:05,630 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:05,631 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:05,800 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:05,834 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:05,834 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:05,837 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:18:05,838 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:18:05,848 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:05,855 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:05,864 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:05,872 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:05,878 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:05,882 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:05,888 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:05,889 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:05,965 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:05,970 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:05,970 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-21 03:18:05,970 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:05,971 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-21 03:18:05,971 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-21 03:18:05,971 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-21 03:18:05,971 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 11 states. [2018-01-21 03:18:06,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:06,023 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 03:18:06,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 03:18:06,023 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 23 [2018-01-21 03:18:06,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:06,024 INFO L225 Difference]: With dead ends: 34 [2018-01-21 03:18:06,024 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 03:18:06,025 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-21 03:18:06,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 03:18:06,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 03:18:06,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 03:18:06,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 03:18:06,028 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 03:18:06,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:06,029 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 03:18:06,029 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-21 03:18:06,029 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 03:18:06,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 03:18:06,029 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:06,030 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:06,030 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:06,030 INFO L82 PathProgramCache]: Analyzing trace with hash -1043149141, now seen corresponding path program 7 times [2018-01-21 03:18:06,030 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:06,031 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:06,031 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:06,031 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:06,031 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:06,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:06,041 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:06,154 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:06,155 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:06,155 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:06,155 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:06,155 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:06,155 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:06,155 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:06,163 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:06,163 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:18:06,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:06,174 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:06,194 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:06,195 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:06,430 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:06,464 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:06,464 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:06,469 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:06,470 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:18:06,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:06,492 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:06,497 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:06,497 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:06,650 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:06,652 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:06,652 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-21 03:18:06,652 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:06,653 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 03:18:06,653 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 03:18:06,653 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-21 03:18:06,654 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 12 states. [2018-01-21 03:18:06,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:06,681 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 03:18:06,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 03:18:06,682 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 24 [2018-01-21 03:18:06,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:06,682 INFO L225 Difference]: With dead ends: 35 [2018-01-21 03:18:06,682 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 03:18:06,683 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-21 03:18:06,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 03:18:06,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 03:18:06,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 03:18:06,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 03:18:06,686 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 03:18:06,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:06,686 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 03:18:06,686 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 03:18:06,686 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 03:18:06,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 03:18:06,687 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:06,687 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:06,687 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:06,688 INFO L82 PathProgramCache]: Analyzing trace with hash 620139856, now seen corresponding path program 8 times [2018-01-21 03:18:06,688 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:06,688 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:06,688 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:06,689 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:06,689 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:06,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:06,699 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:06,781 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:06,781 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:06,782 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:06,782 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:06,782 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:06,782 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:06,782 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:06,793 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:18:06,793 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:06,801 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:06,805 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:06,808 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:06,810 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:06,823 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:06,824 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:07,020 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:07,041 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:07,041 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:07,044 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:18:07,044 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:07,053 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:07,062 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:07,069 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:07,072 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:07,076 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:07,077 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:07,163 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:07,165 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:07,165 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-21 03:18:07,165 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:07,166 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-21 03:18:07,166 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-21 03:18:07,166 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=233, Invalid=273, Unknown=0, NotChecked=0, Total=506 [2018-01-21 03:18:07,167 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 13 states. [2018-01-21 03:18:07,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:07,220 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 03:18:07,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 03:18:07,220 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 25 [2018-01-21 03:18:07,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:07,221 INFO L225 Difference]: With dead ends: 36 [2018-01-21 03:18:07,221 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 03:18:07,221 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 87 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=247, Invalid=305, Unknown=0, NotChecked=0, Total=552 [2018-01-21 03:18:07,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 03:18:07,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 03:18:07,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 03:18:07,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 03:18:07,226 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 03:18:07,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:07,226 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 03:18:07,226 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-21 03:18:07,226 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 03:18:07,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 03:18:07,227 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:07,227 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:07,228 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:07,228 INFO L82 PathProgramCache]: Analyzing trace with hash 642491211, now seen corresponding path program 9 times [2018-01-21 03:18:07,228 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:07,229 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:07,229 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:07,229 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:07,229 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:07,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:07,240 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:07,352 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:07,352 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:07,352 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:07,352 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:07,352 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:07,352 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:07,352 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:07,358 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:18:07,359 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:18:07,369 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:07,372 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:07,374 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:07,378 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:07,380 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:07,384 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:07,386 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:07,388 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:07,420 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:07,420 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:07,667 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:07,688 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:07,688 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:07,693 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:18:07,693 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:18:07,703 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:07,710 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:07,718 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:07,726 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:07,736 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:07,745 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:07,752 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:07,755 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:07,759 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:07,760 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:07,843 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:07,845 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:07,845 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-21 03:18:07,845 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:07,846 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 03:18:07,846 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 03:18:07,846 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=278, Invalid=322, Unknown=0, NotChecked=0, Total=600 [2018-01-21 03:18:07,846 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 14 states. [2018-01-21 03:18:07,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:07,908 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 03:18:07,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 03:18:07,910 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 26 [2018-01-21 03:18:07,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:07,911 INFO L225 Difference]: With dead ends: 37 [2018-01-21 03:18:07,911 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 03:18:07,912 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=293, Invalid=357, Unknown=0, NotChecked=0, Total=650 [2018-01-21 03:18:07,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 03:18:07,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 03:18:07,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 03:18:07,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 03:18:07,916 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 03:18:07,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:07,916 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 03:18:07,916 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 03:18:07,916 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 03:18:07,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 03:18:07,917 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:07,917 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:07,917 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:07,918 INFO L82 PathProgramCache]: Analyzing trace with hash 1335383216, now seen corresponding path program 10 times [2018-01-21 03:18:07,918 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:07,918 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:07,919 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:07,919 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:07,919 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:07,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:07,929 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:08,056 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:08,056 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:08,056 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:08,056 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:08,056 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:08,056 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:08,057 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:08,067 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:18:08,067 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:18:08,078 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:08,080 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:08,091 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:08,091 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:08,403 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:08,425 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:08,425 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:08,430 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:18:08,430 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:18:08,469 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:08,474 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:08,480 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:08,480 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:08,584 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:08,585 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:08,585 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-21 03:18:08,585 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:08,586 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-21 03:18:08,586 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-21 03:18:08,586 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=327, Invalid=375, Unknown=0, NotChecked=0, Total=702 [2018-01-21 03:18:08,587 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 15 states. [2018-01-21 03:18:08,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:08,641 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 03:18:08,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 03:18:08,641 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 27 [2018-01-21 03:18:08,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:08,642 INFO L225 Difference]: With dead ends: 38 [2018-01-21 03:18:08,642 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 03:18:08,643 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 93 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=343, Invalid=413, Unknown=0, NotChecked=0, Total=756 [2018-01-21 03:18:08,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 03:18:08,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 03:18:08,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 03:18:08,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 03:18:08,647 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 03:18:08,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:08,647 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 03:18:08,647 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-21 03:18:08,647 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 03:18:08,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 03:18:08,648 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:08,648 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:08,648 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:08,649 INFO L82 PathProgramCache]: Analyzing trace with hash 1340198891, now seen corresponding path program 11 times [2018-01-21 03:18:08,649 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:08,649 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:08,649 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:08,649 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:08,650 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:08,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:08,658 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:08,756 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:08,756 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:08,756 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:08,756 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:08,757 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:08,757 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:08,757 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:08,763 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:18:08,763 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:08,767 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:08,768 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:08,769 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:08,770 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:08,771 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:08,772 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:08,777 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:08,778 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:08,780 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:08,791 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:08,791 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:09,127 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:09,148 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:09,148 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:09,151 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:18:09,151 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:09,155 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:09,157 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:09,162 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:09,168 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:09,174 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:09,181 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:09,195 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:09,203 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:09,207 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:09,211 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:09,212 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:09,334 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:09,336 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:09,336 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-21 03:18:09,337 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:09,337 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 03:18:09,337 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 03:18:09,338 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=380, Invalid=432, Unknown=0, NotChecked=0, Total=812 [2018-01-21 03:18:09,338 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 16 states. [2018-01-21 03:18:09,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:09,386 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 03:18:09,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 03:18:09,387 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 28 [2018-01-21 03:18:09,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:09,388 INFO L225 Difference]: With dead ends: 39 [2018-01-21 03:18:09,388 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 03:18:09,388 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=397, Invalid=473, Unknown=0, NotChecked=0, Total=870 [2018-01-21 03:18:09,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 03:18:09,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 03:18:09,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 03:18:09,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 03:18:09,394 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 03:18:09,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:09,394 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 03:18:09,394 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 03:18:09,394 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 03:18:09,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 03:18:09,395 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:09,395 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:09,395 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:09,396 INFO L82 PathProgramCache]: Analyzing trace with hash 1489484816, now seen corresponding path program 12 times [2018-01-21 03:18:09,396 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:09,397 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:09,397 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:09,397 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:09,397 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:09,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:09,407 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:09,640 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:09,641 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:09,641 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:09,641 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:09,641 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:09,641 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:09,641 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:09,651 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:18:09,651 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:18:09,662 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:09,665 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:09,674 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:09,678 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:09,679 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:09,680 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:09,681 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:09,682 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:09,683 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:09,692 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:09,692 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:10,087 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:10,108 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:10,108 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:10,112 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:18:10,112 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:18:10,123 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:10,130 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:10,139 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:10,148 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:10,157 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:10,167 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:10,177 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:10,184 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:10,188 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:10,193 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:10,193 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:10,303 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:10,305 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:10,305 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-21 03:18:10,305 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:10,305 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-21 03:18:10,306 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-21 03:18:10,306 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=437, Invalid=493, Unknown=0, NotChecked=0, Total=930 [2018-01-21 03:18:10,306 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 17 states. [2018-01-21 03:18:10,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:10,342 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 03:18:10,342 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 03:18:10,342 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 29 [2018-01-21 03:18:10,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:10,343 INFO L225 Difference]: With dead ends: 40 [2018-01-21 03:18:10,343 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 03:18:10,344 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 99 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=455, Invalid=537, Unknown=0, NotChecked=0, Total=992 [2018-01-21 03:18:10,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 03:18:10,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 03:18:10,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 03:18:10,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 03:18:10,348 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 03:18:10,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:10,348 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 03:18:10,348 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-21 03:18:10,348 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 03:18:10,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 03:18:10,349 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:10,349 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:10,349 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:10,349 INFO L82 PathProgramCache]: Analyzing trace with hash 1822381195, now seen corresponding path program 13 times [2018-01-21 03:18:10,349 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:10,350 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:10,350 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:10,350 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:10,350 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:10,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:10,358 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:10,487 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:10,488 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:10,488 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:10,488 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:10,488 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:10,488 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:10,488 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:10,493 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:10,493 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:18:10,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:10,505 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:10,515 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:10,515 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:10,941 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:10,961 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:10,961 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:10,965 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:10,965 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:18:10,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:10,989 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:10,993 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:10,993 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:11,108 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:11,109 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:11,110 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-21 03:18:11,110 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:11,110 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 03:18:11,110 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 03:18:11,110 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=498, Invalid=558, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 03:18:11,111 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 18 states. [2018-01-21 03:18:11,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:11,146 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 03:18:11,148 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 03:18:11,148 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 30 [2018-01-21 03:18:11,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:11,149 INFO L225 Difference]: With dead ends: 41 [2018-01-21 03:18:11,149 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 03:18:11,149 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=517, Invalid=605, Unknown=0, NotChecked=0, Total=1122 [2018-01-21 03:18:11,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 03:18:11,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 03:18:11,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 03:18:11,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 03:18:11,152 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 03:18:11,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:11,152 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 03:18:11,152 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 03:18:11,152 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 03:18:11,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 03:18:11,153 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:11,153 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:11,153 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:11,153 INFO L82 PathProgramCache]: Analyzing trace with hash -742732944, now seen corresponding path program 14 times [2018-01-21 03:18:11,154 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:11,154 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:11,155 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:11,155 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:11,155 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:11,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:11,163 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:11,310 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:11,310 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:11,310 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:11,310 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:11,310 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:11,310 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:11,310 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:11,321 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:18:11,321 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:11,330 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:11,347 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:11,356 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:11,358 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:11,381 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:11,381 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:11,939 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:11,974 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:11,974 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:11,978 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:18:11,978 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:11,992 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:12,007 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:12,021 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:12,026 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:12,034 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:12,034 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:12,193 WARN L143 SmtUtils]: Spent 157ms on a formula simplification that was a NOOP. DAG size: 50 [2018-01-21 03:18:12,320 WARN L143 SmtUtils]: Spent 126ms on a formula simplification that was a NOOP. DAG size: 50 [2018-01-21 03:18:12,392 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:12,394 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:12,395 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-21 03:18:12,395 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:12,395 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-21 03:18:12,395 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-21 03:18:12,396 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=563, Invalid=627, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 03:18:12,396 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 19 states. [2018-01-21 03:18:12,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:12,508 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 03:18:12,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 03:18:12,509 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 31 [2018-01-21 03:18:12,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:12,510 INFO L225 Difference]: With dead ends: 42 [2018-01-21 03:18:12,510 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 03:18:12,511 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 105 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=583, Invalid=677, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 03:18:12,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 03:18:12,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 03:18:12,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 03:18:12,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 03:18:12,517 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 03:18:12,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:12,518 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 03:18:12,518 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-21 03:18:12,518 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 03:18:12,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 03:18:12,518 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:12,519 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:12,519 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:12,519 INFO L82 PathProgramCache]: Analyzing trace with hash 1343107371, now seen corresponding path program 15 times [2018-01-21 03:18:12,519 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:12,520 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:12,520 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:12,520 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:12,520 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:12,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:12,528 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:13,289 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:13,290 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:13,290 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:13,290 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:13,290 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:13,290 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:13,290 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-01-21 03:18:13,303 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:18:13,303 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:13,313 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:13,331 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:13,332 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:13,343 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:13,348 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:13,353 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:13,356 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:13,358 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:13,371 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:13,375 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:13,377 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:13,389 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:13,389 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:14,643 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:14,664 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:14,664 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:14,667 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:18:14,667 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:18:14,678 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:14,685 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:14,693 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:14,709 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:14,718 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:14,728 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:14,738 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:14,749 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:14,762 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:14,770 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:14,773 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:14,778 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:14,778 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:14,915 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:14,916 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:14,916 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-21 03:18:14,916 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:14,917 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 03:18:14,917 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 03:18:14,917 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=632, Invalid=700, Unknown=0, NotChecked=0, Total=1332 [2018-01-21 03:18:14,917 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 20 states. [2018-01-21 03:18:14,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:14,949 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 03:18:14,951 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 03:18:14,951 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-01-21 03:18:14,951 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:14,952 INFO L225 Difference]: With dead ends: 43 [2018-01-21 03:18:14,952 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 03:18:14,953 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=653, Invalid=753, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 03:18:14,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 03:18:14,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 03:18:14,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 03:18:14,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 03:18:14,956 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 03:18:14,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:14,956 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 03:18:14,956 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 03:18:14,956 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 03:18:14,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 03:18:14,957 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:14,957 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:14,957 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:14,957 INFO L82 PathProgramCache]: Analyzing trace with hash 1579647696, now seen corresponding path program 16 times [2018-01-21 03:18:14,957 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:14,958 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:14,958 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:14,958 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:14,958 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:14,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:14,966 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:15,186 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:15,187 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:15,187 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:15,187 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:15,187 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:15,187 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:15,187 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:15,199 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:18:15,199 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:18:15,212 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:15,214 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:15,226 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:15,226 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:15,878 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:15,898 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:15,898 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:15,901 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:18:15,901 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:18:15,930 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:15,933 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:15,940 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:15,940 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:16,067 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:16,068 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:16,068 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-21 03:18:16,068 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:16,068 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-21 03:18:16,068 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-21 03:18:16,069 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=705, Invalid=777, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 03:18:16,069 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 21 states. [2018-01-21 03:18:16,096 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:16,096 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 03:18:16,096 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 03:18:16,096 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 33 [2018-01-21 03:18:16,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:16,097 INFO L225 Difference]: With dead ends: 44 [2018-01-21 03:18:16,097 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 03:18:16,098 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 111 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=727, Invalid=833, Unknown=0, NotChecked=0, Total=1560 [2018-01-21 03:18:16,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 03:18:16,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 03:18:16,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 03:18:16,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 03:18:16,101 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 03:18:16,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:16,102 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 03:18:16,102 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-21 03:18:16,102 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 03:18:16,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 03:18:16,102 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:16,103 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:16,103 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:16,103 INFO L82 PathProgramCache]: Analyzing trace with hash 322463179, now seen corresponding path program 17 times [2018-01-21 03:18:16,103 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:16,104 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:16,104 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:16,104 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:16,104 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:16,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:16,111 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:16,246 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:16,246 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:16,246 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:16,246 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:16,247 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:16,247 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:16,247 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:16,251 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:18:16,251 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:16,255 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,256 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,257 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,258 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,258 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,259 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,260 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,261 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,262 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,265 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,266 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:16,268 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:16,275 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:16,275 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:16,764 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:16,783 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:16,783 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:16,786 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:18:16,786 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:16,790 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,792 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,795 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,799 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,803 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,807 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,812 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,817 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,823 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,834 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:16,843 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:16,846 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:16,851 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:16,851 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:17,084 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:17,085 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:17,085 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-21 03:18:17,085 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:17,085 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 03:18:17,086 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 03:18:17,086 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=782, Invalid=858, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 03:18:17,086 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 22 states. [2018-01-21 03:18:17,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:17,120 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 03:18:17,120 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 03:18:17,120 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 34 [2018-01-21 03:18:17,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:17,121 INFO L225 Difference]: With dead ends: 45 [2018-01-21 03:18:17,121 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 03:18:17,122 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=805, Invalid=917, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 03:18:17,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 03:18:17,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 03:18:17,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 03:18:17,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 03:18:17,126 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 03:18:17,126 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:17,126 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 03:18:17,126 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 03:18:17,126 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 03:18:17,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 03:18:17,127 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:17,127 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:17,127 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:17,127 INFO L82 PathProgramCache]: Analyzing trace with hash 4448816, now seen corresponding path program 18 times [2018-01-21 03:18:17,127 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:17,128 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:17,128 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:17,128 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:17,128 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:17,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:17,137 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:17,481 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:17,481 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:17,481 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:17,481 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:17,481 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:17,481 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:17,482 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:17,489 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:18:17,489 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:18:17,502 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:17,510 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:17,512 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:17,513 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:17,514 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:17,515 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:17,516 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:17,517 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:17,518 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:17,520 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:17,520 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:17,522 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:17,530 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:17,530 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:17,688 WARN L143 SmtUtils]: Spent 157ms on a formula simplification that was a NOOP. DAG size: 62 [2018-01-21 03:18:17,811 WARN L143 SmtUtils]: Spent 122ms on a formula simplification that was a NOOP. DAG size: 62 [2018-01-21 03:18:18,369 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:18,390 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:18,390 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:18,393 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:18:18,393 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:18:18,403 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:18,410 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:18,418 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:18,426 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:18,435 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:18,445 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:18,455 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:18,465 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:18,477 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:18,489 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:18,498 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:18,502 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:18,507 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:18,508 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:18,670 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:18,671 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:18,671 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-21 03:18:18,671 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:18,671 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-21 03:18:18,671 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-21 03:18:18,672 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=863, Invalid=943, Unknown=0, NotChecked=0, Total=1806 [2018-01-21 03:18:18,672 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 23 states. [2018-01-21 03:18:18,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:18,708 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 03:18:18,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 03:18:18,708 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 35 [2018-01-21 03:18:18,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:18,708 INFO L225 Difference]: With dead ends: 46 [2018-01-21 03:18:18,708 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 03:18:18,709 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 117 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=887, Invalid=1005, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 03:18:18,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 03:18:18,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 03:18:18,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 03:18:18,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 03:18:18,713 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 03:18:18,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:18,713 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 03:18:18,713 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-21 03:18:18,713 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 03:18:18,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 03:18:18,714 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:18,714 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:18,714 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:18,714 INFO L82 PathProgramCache]: Analyzing trace with hash -1264061845, now seen corresponding path program 19 times [2018-01-21 03:18:18,714 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:18,714 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:18,715 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:18,715 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:18,715 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:18,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:18,722 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:18,930 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:18,930 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:18,930 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:18,930 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:18,930 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:18,930 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:18,931 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:18,937 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:18,937 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:18:18,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:18,965 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:19,001 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:19,001 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:19,840 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:19,860 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:19,860 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:19,864 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:19,864 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:18:19,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:19,893 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:19,898 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:19,899 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:20,071 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:20,072 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:20,073 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-21 03:18:20,073 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:20,073 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 03:18:20,073 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 03:18:20,074 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=948, Invalid=1032, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 03:18:20,074 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 24 states. [2018-01-21 03:18:20,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:20,133 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 03:18:20,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 03:18:20,134 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 36 [2018-01-21 03:18:20,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:20,134 INFO L225 Difference]: With dead ends: 47 [2018-01-21 03:18:20,134 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 03:18:20,135 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=973, Invalid=1097, Unknown=0, NotChecked=0, Total=2070 [2018-01-21 03:18:20,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 03:18:20,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 03:18:20,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 03:18:20,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 03:18:20,138 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 03:18:20,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:20,138 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 03:18:20,138 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 03:18:20,138 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 03:18:20,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 03:18:20,138 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:20,138 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:20,138 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:20,139 INFO L82 PathProgramCache]: Analyzing trace with hash -1933186672, now seen corresponding path program 20 times [2018-01-21 03:18:20,139 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:20,139 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:20,139 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:20,139 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:20,139 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:20,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:20,146 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:20,350 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:20,350 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:20,350 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:20,350 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:20,350 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:20,350 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:20,351 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:20,355 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:18:20,356 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:20,363 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:20,370 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:20,373 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:20,375 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:20,396 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:20,396 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:21,200 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:21,220 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:21,221 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:21,224 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:18:21,224 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:21,236 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:21,249 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:21,260 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:21,264 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:21,274 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:21,275 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:21,506 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:21,508 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:21,508 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-21 03:18:21,508 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:21,509 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-21 03:18:21,509 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-21 03:18:21,509 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1037, Invalid=1125, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 03:18:21,510 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 25 states. [2018-01-21 03:18:21,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:21,546 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 03:18:21,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 03:18:21,546 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 37 [2018-01-21 03:18:21,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:21,547 INFO L225 Difference]: With dead ends: 48 [2018-01-21 03:18:21,547 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 03:18:21,548 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 123 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1063, Invalid=1193, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 03:18:21,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 03:18:21,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 03:18:21,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 03:18:21,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 03:18:21,551 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 03:18:21,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:21,552 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 03:18:21,552 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-21 03:18:21,552 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 03:18:21,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 03:18:21,552 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:21,553 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:21,553 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:21,553 INFO L82 PathProgramCache]: Analyzing trace with hash -1201219829, now seen corresponding path program 21 times [2018-01-21 03:18:21,553 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:21,554 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:21,554 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:21,554 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:21,554 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:21,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:21,563 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:21,777 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:21,777 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:21,777 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:21,777 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:21,777 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:21,778 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:21,778 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:21,784 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:18:21,784 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:18:21,792 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:21,794 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:21,795 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:21,797 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:21,798 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:21,799 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:21,801 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:21,802 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:21,803 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:21,804 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:21,806 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:21,807 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:21,814 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:21,816 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:21,825 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:21,825 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:22,643 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:22,664 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:22,664 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:22,667 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:18:22,668 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:18:22,676 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:22,683 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:22,692 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:22,704 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:22,718 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:22,730 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:22,745 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:22,761 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:22,779 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:22,798 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:22,814 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:22,826 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:22,836 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:22,840 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:22,846 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:22,846 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:23,056 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:23,057 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:23,057 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-21 03:18:23,057 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:23,057 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 03:18:23,058 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 03:18:23,058 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1127, Invalid=1225, Unknown=0, NotChecked=0, Total=2352 [2018-01-21 03:18:23,058 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 26 states. [2018-01-21 03:18:23,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:23,167 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 03:18:23,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 03:18:23,167 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 38 [2018-01-21 03:18:23,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:23,168 INFO L225 Difference]: With dead ends: 49 [2018-01-21 03:18:23,168 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 03:18:23,169 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 126 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1154, Invalid=1296, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 03:18:23,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 03:18:23,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 03:18:23,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 03:18:23,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 03:18:23,188 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 03:18:23,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:23,189 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 03:18:23,189 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 03:18:23,189 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 03:18:23,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 03:18:23,190 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:23,190 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:23,190 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:23,190 INFO L82 PathProgramCache]: Analyzing trace with hash 14915824, now seen corresponding path program 22 times [2018-01-21 03:18:23,190 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:23,191 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:23,191 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:23,191 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:23,191 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:23,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:23,200 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:23,515 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:23,516 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:23,516 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:23,516 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:23,516 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:23,516 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:23,516 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:23,521 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:18:23,521 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:18:23,535 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:23,536 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:23,545 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:23,545 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:24,554 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:24,574 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:24,574 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:24,578 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:18:24,578 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:18:24,613 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:24,617 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:24,625 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:24,626 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:24,815 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:24,816 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:24,816 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-21 03:18:24,816 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:24,816 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-21 03:18:24,817 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-21 03:18:24,817 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1217, Invalid=1333, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 03:18:24,818 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 27 states. [2018-01-21 03:18:24,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:24,866 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 03:18:24,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 03:18:24,866 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 39 [2018-01-21 03:18:24,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:24,867 INFO L225 Difference]: With dead ends: 50 [2018-01-21 03:18:24,867 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 03:18:24,868 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 129 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 223 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1245, Invalid=1407, Unknown=0, NotChecked=0, Total=2652 [2018-01-21 03:18:24,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 03:18:24,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 03:18:24,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 03:18:24,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 03:18:24,871 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 03:18:24,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:24,871 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 03:18:24,872 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-21 03:18:24,872 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 03:18:24,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 03:18:24,872 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:24,872 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:24,872 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:24,872 INFO L82 PathProgramCache]: Analyzing trace with hash -939584597, now seen corresponding path program 23 times [2018-01-21 03:18:24,872 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:24,873 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:24,873 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:24,873 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:24,873 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:24,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:24,880 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:25,124 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:25,125 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:25,125 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:25,125 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:25,125 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:25,125 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:25,125 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:25,130 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:18:25,130 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:25,134 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:25,135 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:25,136 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:25,137 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:25,138 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:25,139 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:25,140 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:25,140 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:25,141 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:25,142 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:25,143 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:25,144 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:25,147 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:25,148 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:25,150 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:25,159 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:25,159 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:26,058 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:26,078 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:26,078 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:26,081 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:18:26,081 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:26,086 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:26,088 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:26,092 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:26,096 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:26,102 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:26,109 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:26,117 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:26,125 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:26,132 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:26,141 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:26,150 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:26,162 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:26,180 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:26,195 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:26,200 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:26,208 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:26,208 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:26,457 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:26,458 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:26,459 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-21 03:18:26,459 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:26,459 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 03:18:26,459 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 03:18:26,460 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1307, Invalid=1449, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 03:18:26,460 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 28 states. [2018-01-21 03:18:26,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:26,508 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 03:18:26,508 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 03:18:26,508 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 40 [2018-01-21 03:18:26,508 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:26,508 INFO L225 Difference]: With dead ends: 51 [2018-01-21 03:18:26,508 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 03:18:26,509 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 279 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1336, Invalid=1526, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 03:18:26,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 03:18:26,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 03:18:26,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 03:18:26,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 03:18:26,511 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 03:18:26,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:26,512 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 03:18:26,512 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 03:18:26,512 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 03:18:26,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 03:18:26,512 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:26,512 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:26,512 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:26,512 INFO L82 PathProgramCache]: Analyzing trace with hash -464326576, now seen corresponding path program 24 times [2018-01-21 03:18:26,512 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:26,513 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:26,513 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:26,513 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:26,513 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:26,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:26,521 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:26,902 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:26,903 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:26,903 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:26,903 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:26,903 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:26,903 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:26,903 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:26,909 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:18:26,909 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:18:26,917 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:26,919 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:26,920 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:26,921 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:26,922 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:26,924 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:26,925 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:26,926 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:26,927 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:26,929 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:26,930 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:26,931 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:26,933 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:26,933 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:26,935 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:26,948 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:26,948 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:28,127 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:28,163 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:28,163 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:28,168 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:18:28,168 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:18:28,182 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:28,193 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:28,205 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:28,218 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:28,231 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:28,245 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:28,260 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:28,276 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:28,292 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:28,309 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:28,326 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:28,345 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:28,357 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:28,367 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:28,371 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:28,380 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:28,380 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:28,639 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:28,641 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:28,641 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-21 03:18:28,641 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:28,642 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-21 03:18:28,642 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-21 03:18:28,643 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1397, Invalid=1573, Unknown=0, NotChecked=0, Total=2970 [2018-01-21 03:18:28,643 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 29 states. [2018-01-21 03:18:28,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:28,704 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 03:18:28,704 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 03:18:28,704 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 41 [2018-01-21 03:18:28,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:28,704 INFO L225 Difference]: With dead ends: 52 [2018-01-21 03:18:28,704 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 03:18:28,705 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 135 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 339 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=1427, Invalid=1653, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 03:18:28,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 03:18:28,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 03:18:28,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 03:18:28,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 03:18:28,708 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 03:18:28,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:28,708 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 03:18:28,709 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-21 03:18:28,709 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 03:18:28,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 03:18:28,709 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:28,709 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:28,710 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:28,710 INFO L82 PathProgramCache]: Analyzing trace with hash 1383770187, now seen corresponding path program 25 times [2018-01-21 03:18:28,710 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:28,711 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:28,711 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:28,711 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:28,711 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:28,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:28,719 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:29,003 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:29,004 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:29,004 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:29,004 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:29,004 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:29,004 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:29,004 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:29,010 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:29,011 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:18:29,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:29,027 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:29,046 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:29,046 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:30,081 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:30,101 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:30,101 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:30,104 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:30,104 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:18:30,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:30,140 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:30,148 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:30,148 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:30,254 WARN L143 SmtUtils]: Spent 104ms on a formula simplification that was a NOOP. DAG size: 83 [2018-01-21 03:18:30,435 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:30,436 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:30,436 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 57 [2018-01-21 03:18:30,436 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:30,436 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 03:18:30,437 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 03:18:30,437 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1487, Invalid=1705, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 03:18:30,438 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 30 states. [2018-01-21 03:18:30,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:30,480 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 03:18:30,480 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 03:18:30,480 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 42 [2018-01-21 03:18:30,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:30,481 INFO L225 Difference]: With dead ends: 53 [2018-01-21 03:18:30,481 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 03:18:30,482 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 403 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1518, Invalid=1788, Unknown=0, NotChecked=0, Total=3306 [2018-01-21 03:18:30,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 03:18:30,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 03:18:30,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 03:18:30,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 03:18:30,484 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 03:18:30,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:30,485 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 03:18:30,485 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 03:18:30,485 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 03:18:30,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 03:18:30,485 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:30,485 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:30,485 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:30,485 INFO L82 PathProgramCache]: Analyzing trace with hash -1454772304, now seen corresponding path program 26 times [2018-01-21 03:18:30,485 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:30,486 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:30,486 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:30,486 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:30,486 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:30,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:30,494 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:31,119 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:31,119 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:31,120 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:31,120 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:31,120 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:31,120 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:31,120 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:31,126 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:18:31,126 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:31,134 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:31,141 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:31,142 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:31,144 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:31,162 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:31,163 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:32,223 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:32,243 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:32,244 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:32,247 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:18:32,247 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:32,257 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:32,272 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:32,284 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:32,288 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:32,294 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:32,294 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:32,569 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:32,570 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:32,570 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 59 [2018-01-21 03:18:32,570 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:32,570 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-21 03:18:32,571 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-21 03:18:32,571 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1577, Invalid=1845, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 03:18:32,571 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 31 states. [2018-01-21 03:18:32,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:32,609 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 03:18:32,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 03:18:32,609 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 43 [2018-01-21 03:18:32,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:32,610 INFO L225 Difference]: With dead ends: 54 [2018-01-21 03:18:32,610 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 03:18:32,610 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 141 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 471 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=1609, Invalid=1931, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 03:18:32,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 03:18:32,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 03:18:32,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 03:18:32,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 03:18:32,613 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 03:18:32,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:32,614 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 03:18:32,614 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-21 03:18:32,614 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 03:18:32,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 03:18:32,614 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:32,614 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:32,614 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:32,615 INFO L82 PathProgramCache]: Analyzing trace with hash 744723691, now seen corresponding path program 27 times [2018-01-21 03:18:32,615 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:32,615 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:32,615 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:32,615 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:32,615 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:32,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:32,623 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:33,108 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:33,108 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:33,108 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:33,109 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:33,109 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:33,109 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:33,109 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:33,116 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:18:33,116 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:18:33,123 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:33,125 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:33,127 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:33,128 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:33,129 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:33,130 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:33,131 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:33,132 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:33,134 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:33,135 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:33,136 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:33,137 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:33,139 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:33,140 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:33,141 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:33,142 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:33,144 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:33,153 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:33,153 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:34,290 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:34,312 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:34,313 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:34,317 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:18:34,317 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:18:34,327 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:34,334 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:34,342 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:34,350 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:34,359 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:34,368 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:34,378 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:34,388 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:34,399 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:34,410 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:34,422 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:34,433 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:34,446 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:34,459 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:34,472 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:34,482 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:34,486 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:34,494 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:34,495 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:34,749 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:34,750 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:34,750 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 61 [2018-01-21 03:18:34,751 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:34,751 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 03:18:34,751 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 03:18:34,751 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1667, Invalid=1993, Unknown=0, NotChecked=0, Total=3660 [2018-01-21 03:18:34,751 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 32 states. [2018-01-21 03:18:34,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:34,798 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 03:18:34,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 03:18:34,798 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 44 [2018-01-21 03:18:34,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:34,799 INFO L225 Difference]: With dead ends: 55 [2018-01-21 03:18:34,799 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 03:18:34,800 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 144 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 543 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=1700, Invalid=2082, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 03:18:34,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 03:18:34,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 03:18:34,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 03:18:34,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 03:18:34,803 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 03:18:34,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:34,804 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 03:18:34,804 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 03:18:34,804 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 03:18:34,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 03:18:34,804 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:34,805 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:34,805 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:34,805 INFO L82 PathProgramCache]: Analyzing trace with hash 209622800, now seen corresponding path program 28 times [2018-01-21 03:18:34,805 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:34,806 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:34,806 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:34,806 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:34,806 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:34,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:34,816 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:35,135 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:35,136 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:35,136 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:35,136 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:35,136 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:35,136 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:35,136 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:35,142 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:18:35,142 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:18:35,157 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:35,158 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:35,168 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:35,169 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:36,323 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:36,344 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:36,344 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:36,349 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:18:36,349 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:18:36,390 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:36,394 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:36,401 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:36,401 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:36,700 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:36,701 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:36,701 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 63 [2018-01-21 03:18:36,701 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:36,702 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-21 03:18:36,702 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-21 03:18:36,702 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1757, Invalid=2149, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 03:18:36,702 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 33 states. [2018-01-21 03:18:36,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:36,769 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 03:18:36,769 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 03:18:36,769 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 45 [2018-01-21 03:18:36,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:36,770 INFO L225 Difference]: With dead ends: 56 [2018-01-21 03:18:36,770 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 03:18:36,770 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 147 SyntacticMatches, 2 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 619 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1791, Invalid=2241, Unknown=0, NotChecked=0, Total=4032 [2018-01-21 03:18:36,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 03:18:36,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 03:18:36,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 03:18:36,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 03:18:36,772 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 03:18:36,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:36,772 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 03:18:36,772 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-21 03:18:36,772 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 03:18:36,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 03:18:36,773 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:36,773 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:36,773 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:36,773 INFO L82 PathProgramCache]: Analyzing trace with hash 801364363, now seen corresponding path program 29 times [2018-01-21 03:18:36,773 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:36,774 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:36,774 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:36,774 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:36,774 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:36,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:36,782 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:37,112 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:37,112 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:37,112 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:37,113 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:37,113 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:37,113 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:37,113 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:37,124 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:18:37,125 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:37,129 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:37,130 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:37,131 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:37,132 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:37,133 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:37,134 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:37,135 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:37,136 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:37,137 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:37,138 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:37,140 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:37,141 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:37,143 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:37,144 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:37,145 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:37,150 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:37,152 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:37,155 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:37,173 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:37,173 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:38,364 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:38,400 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:38,400 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:38,403 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:18:38,403 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:38,410 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:38,412 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:38,418 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:38,424 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:38,430 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:38,437 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:38,445 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:38,454 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:38,463 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:38,473 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:38,484 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:38,495 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:38,508 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:38,521 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:38,534 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:38,557 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:38,575 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:38,580 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:38,599 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:38,599 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:38,710 WARN L143 SmtUtils]: Spent 109ms on a formula simplification that was a NOOP. DAG size: 95 [2018-01-21 03:18:38,813 WARN L143 SmtUtils]: Spent 102ms on a formula simplification that was a NOOP. DAG size: 95 [2018-01-21 03:18:38,984 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:38,985 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:38,985 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 65 [2018-01-21 03:18:38,985 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:38,985 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 03:18:38,986 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 03:18:38,986 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1847, Invalid=2313, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 03:18:38,986 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 34 states. [2018-01-21 03:18:39,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:39,051 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 03:18:39,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 03:18:39,054 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 46 [2018-01-21 03:18:39,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:39,055 INFO L225 Difference]: With dead ends: 57 [2018-01-21 03:18:39,055 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 03:18:39,056 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 150 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 699 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=1882, Invalid=2408, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 03:18:39,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 03:18:39,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 03:18:39,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 03:18:39,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 03:18:39,058 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 03:18:39,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:39,059 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 03:18:39,059 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 03:18:39,059 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 03:18:39,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 03:18:39,059 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:39,060 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:39,060 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:39,060 INFO L82 PathProgramCache]: Analyzing trace with hash 1965483632, now seen corresponding path program 30 times [2018-01-21 03:18:39,060 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:39,060 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:39,061 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:39,061 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:39,061 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:39,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:39,079 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:39,622 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:39,622 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:39,622 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:39,622 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:39,623 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:39,623 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:39,623 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:39,627 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:18:39,628 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:18:39,634 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:39,636 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:39,637 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:39,638 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:39,639 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:39,640 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:39,642 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:39,643 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:39,644 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:39,645 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:39,646 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:39,647 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:39,648 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:39,649 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:39,651 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:39,652 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:39,653 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:39,654 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:39,664 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:39,664 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:40,829 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:40,852 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:40,852 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:40,855 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:18:40,855 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:18:40,865 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:40,873 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:40,881 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:40,891 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:40,903 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:40,914 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:40,926 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:40,938 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:40,952 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:40,966 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:40,981 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:40,996 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:41,012 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:41,028 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:41,045 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:41,065 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:41,078 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:41,082 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:41,089 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:41,089 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:41,362 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:41,363 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:41,363 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 67 [2018-01-21 03:18:41,363 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:41,364 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-21 03:18:41,364 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-21 03:18:41,364 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1937, Invalid=2485, Unknown=0, NotChecked=0, Total=4422 [2018-01-21 03:18:41,364 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 35 states. [2018-01-21 03:18:41,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:41,405 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 03:18:41,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 03:18:41,406 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 47 [2018-01-21 03:18:41,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:41,406 INFO L225 Difference]: With dead ends: 58 [2018-01-21 03:18:41,406 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 03:18:41,407 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 153 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 783 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=1973, Invalid=2583, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 03:18:41,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 03:18:41,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 03:18:41,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 03:18:41,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 03:18:41,409 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 03:18:41,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:41,409 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 03:18:41,409 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-21 03:18:41,409 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 03:18:41,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 03:18:41,410 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:41,410 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:41,410 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:41,410 INFO L82 PathProgramCache]: Analyzing trace with hash -601524693, now seen corresponding path program 31 times [2018-01-21 03:18:41,410 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:41,411 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:41,411 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:41,411 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:41,411 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:41,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:41,421 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:41,812 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:41,812 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:41,812 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:41,813 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:41,813 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:41,813 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:41,813 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:41,818 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:41,818 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:18:41,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:41,834 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:41,884 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:41,884 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:42,150 WARN L143 SmtUtils]: Spent 265ms on a formula simplification that was a NOOP. DAG size: 101 [2018-01-21 03:18:43,375 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:43,395 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:43,395 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:43,398 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:43,398 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 03:18:43,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:43,432 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:43,440 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:43,440 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:43,715 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:43,716 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:43,717 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 69 [2018-01-21 03:18:43,717 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:43,717 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 03:18:43,717 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 03:18:43,717 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2027, Invalid=2665, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 03:18:43,717 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 36 states. [2018-01-21 03:18:43,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:43,769 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 03:18:43,769 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 03:18:43,770 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 48 [2018-01-21 03:18:43,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:43,770 INFO L225 Difference]: With dead ends: 59 [2018-01-21 03:18:43,770 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 03:18:43,771 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 156 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 871 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2064, Invalid=2766, Unknown=0, NotChecked=0, Total=4830 [2018-01-21 03:18:43,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 03:18:43,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 03:18:43,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 03:18:43,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 03:18:43,773 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 03:18:43,773 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:43,774 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 03:18:43,774 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 03:18:43,774 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 03:18:43,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 03:18:43,774 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:43,774 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:43,774 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:43,775 INFO L82 PathProgramCache]: Analyzing trace with hash 1425595856, now seen corresponding path program 32 times [2018-01-21 03:18:43,775 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:43,775 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:43,775 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 03:18:43,775 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:43,775 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:43,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:43,782 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:44,383 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:44,383 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:44,384 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:44,384 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:44,384 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:44,384 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:44,384 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:44,391 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:18:44,391 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:44,400 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:44,408 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:44,410 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:44,412 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:44,425 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:44,426 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:44,551 WARN L143 SmtUtils]: Spent 124ms on a formula simplification that was a NOOP. DAG size: 104 [2018-01-21 03:18:45,875 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:45,906 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:45,906 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:45,909 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 03:18:45,909 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:45,919 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:45,935 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:45,953 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:45,959 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:45,969 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:45,970 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:46,138 WARN L143 SmtUtils]: Spent 167ms on a formula simplification that was a NOOP. DAG size: 104 [2018-01-21 03:18:46,372 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:46,373 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:46,373 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 71 [2018-01-21 03:18:46,373 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:46,374 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-21 03:18:46,374 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-21 03:18:46,374 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2117, Invalid=2853, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 03:18:46,374 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 37 states. [2018-01-21 03:18:46,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:46,461 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 03:18:46,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 03:18:46,461 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 49 [2018-01-21 03:18:46,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:46,461 INFO L225 Difference]: With dead ends: 60 [2018-01-21 03:18:46,461 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 03:18:46,462 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 159 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 963 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2155, Invalid=2957, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 03:18:46,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 03:18:46,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 03:18:46,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 03:18:46,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 03:18:46,465 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 03:18:46,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:46,465 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 03:18:46,465 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-21 03:18:46,465 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 03:18:46,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 03:18:46,466 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:46,466 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:46,466 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:46,466 INFO L82 PathProgramCache]: Analyzing trace with hash -158176565, now seen corresponding path program 33 times [2018-01-21 03:18:46,466 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:46,467 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:46,467 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:46,467 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:46,467 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:46,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:46,474 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:46,889 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:46,889 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:46,889 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:46,889 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:46,889 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:46,889 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:46,889 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:46,894 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:18:46,894 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:18:46,901 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,903 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,904 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,905 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,906 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,907 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,908 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,909 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,911 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,912 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,913 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,914 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,915 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,917 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,918 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,919 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,921 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,922 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:46,922 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:46,924 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:46,935 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:46,935 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:48,228 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:48,249 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:48,249 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:48,251 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 03:18:48,252 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 03:18:48,261 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,267 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,275 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,284 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,292 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,301 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,310 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,320 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,330 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,341 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,352 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,363 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,375 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,388 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,401 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,415 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,429 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,443 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 03:18:48,455 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:48,459 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:48,470 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:48,470 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:48,823 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:48,826 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:48,826 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 73 [2018-01-21 03:18:48,826 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:48,827 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 03:18:48,827 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 03:18:48,827 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2207, Invalid=3049, Unknown=0, NotChecked=0, Total=5256 [2018-01-21 03:18:48,827 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 38 states. [2018-01-21 03:18:48,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:48,887 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 03:18:48,887 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 03:18:48,887 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 50 [2018-01-21 03:18:48,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:48,887 INFO L225 Difference]: With dead ends: 61 [2018-01-21 03:18:48,887 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 03:18:48,888 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 162 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1059 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2246, Invalid=3156, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 03:18:48,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 03:18:48,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 03:18:48,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 03:18:48,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 03:18:48,891 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 03:18:48,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:48,891 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 03:18:48,891 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 03:18:48,891 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 03:18:48,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 03:18:48,892 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:48,892 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:48,892 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:48,892 INFO L82 PathProgramCache]: Analyzing trace with hash -2010481360, now seen corresponding path program 34 times [2018-01-21 03:18:48,892 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:48,893 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:48,893 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:48,893 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:48,893 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:48,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:48,900 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:49,599 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:49,599 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:49,599 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:49,599 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:49,599 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:49,599 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:49,600 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:49,604 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:18:49,604 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:18:49,621 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:49,622 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:49,632 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:49,633 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:50,959 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:50,979 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:50,979 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:50,983 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 03:18:50,983 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 03:18:51,026 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:51,030 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:51,037 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:51,037 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:51,334 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:51,335 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:51,335 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 75 [2018-01-21 03:18:51,335 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:51,335 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-21 03:18:51,336 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-21 03:18:51,336 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2297, Invalid=3253, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 03:18:51,336 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 39 states. [2018-01-21 03:18:51,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:51,428 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 03:18:51,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 03:18:51,428 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 51 [2018-01-21 03:18:51,428 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:51,429 INFO L225 Difference]: With dead ends: 62 [2018-01-21 03:18:51,429 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 03:18:51,429 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 165 SyntacticMatches, 2 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1159 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2337, Invalid=3363, Unknown=0, NotChecked=0, Total=5700 [2018-01-21 03:18:51,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 03:18:51,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 03:18:51,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 03:18:51,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 03:18:51,433 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 03:18:51,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:51,433 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 03:18:51,433 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-21 03:18:51,433 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 03:18:51,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 03:18:51,434 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:51,434 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:51,434 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:51,434 INFO L82 PathProgramCache]: Analyzing trace with hash 697612139, now seen corresponding path program 35 times [2018-01-21 03:18:51,434 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:51,435 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:51,435 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:51,435 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:51,435 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:51,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:51,451 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:51,987 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:51,987 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:51,987 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:51,987 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:51,987 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:51,987 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:51,987 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:51,992 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:18:51,992 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:51,996 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:51,997 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:51,998 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:51,999 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:52,000 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:52,001 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:52,002 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:52,002 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:52,003 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:52,004 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:52,005 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:52,006 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:52,007 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:52,008 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:52,009 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:52,010 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:52,011 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:52,012 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:52,016 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:52,017 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:52,019 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:52,030 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:52,030 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:53,440 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:53,460 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:53,460 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:53,462 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 03:18:53,463 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 03:18:53,467 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,469 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,472 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,476 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,480 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,485 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,490 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,495 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,501 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,508 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,515 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,522 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,530 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,538 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,547 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,556 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,565 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,575 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,590 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 03:18:53,602 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:53,606 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:53,613 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:53,613 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:53,935 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:53,936 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 03:18:53,936 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 77 [2018-01-21 03:18:53,936 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 03:18:53,936 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 03:18:53,936 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 03:18:53,937 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2387, Invalid=3465, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 03:18:53,937 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 40 states. [2018-01-21 03:18:53,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 03:18:53,979 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-21 03:18:53,979 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-21 03:18:53,979 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 52 [2018-01-21 03:18:53,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 03:18:53,980 INFO L225 Difference]: With dead ends: 63 [2018-01-21 03:18:53,980 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 03:18:53,980 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 246 GetRequests, 168 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1263 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2428, Invalid=3578, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 03:18:53,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 03:18:53,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 03:18:53,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 03:18:53,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-21 03:18:53,983 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-21 03:18:53,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 03:18:53,983 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-21 03:18:53,983 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 03:18:53,983 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-21 03:18:53,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 03:18:53,983 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 03:18:53,983 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 03:18:53,983 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 03:18:53,984 INFO L82 PathProgramCache]: Analyzing trace with hash -1250835312, now seen corresponding path program 36 times [2018-01-21 03:18:53,984 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 03:18:53,984 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:53,984 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 03:18:53,984 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 03:18:53,984 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 03:18:53,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 03:18:56,211 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 03:18:56,787 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:56,787 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:56,787 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 03:18:56,787 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 03:18:56,787 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 03:18:56,787 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:56,787 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 03:18:56,792 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:18:56,792 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:18:56,798 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,800 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,801 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,802 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,803 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,804 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,805 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,806 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,807 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,808 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,809 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,811 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,812 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,813 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,814 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,815 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,817 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,818 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,819 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:56,820 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:56,821 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:56,831 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:56,832 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 03:18:58,268 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 03:18:58,288 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 03:18:58,288 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 03:18:58,291 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 03:18:58,291 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 03:18:58,302 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,309 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,317 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,326 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,335 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,344 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,354 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,364 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,374 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,385 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,396 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,408 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,421 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command Received shutdown request... [2018-01-21 03:18:58,441 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,455 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,470 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,486 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,502 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,518 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 03:18:58,531 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 03:18:58,536 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 03:18:58,537 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-21 03:18:58,537 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 03:18:58,539 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 03:18:58,539 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 03:18:58,539 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 03:18:58,539 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 03:18:58,539 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 03:18:58,539 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 03:18:58,540 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 03:18:58,540 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 03:18:58,540 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 03:18:58,540 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 03:18:58,540 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 03:18:58,541 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 03:18:58 BoogieIcfgContainer [2018-01-21 03:18:58,541 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 03:18:58,542 INFO L168 Benchmark]: Toolchain (without parser) took 56827.32 ms. Allocated memory was 308.3 MB in the beginning and 839.4 MB in the end (delta: 531.1 MB). Free memory was 267.4 MB in the beginning and 420.8 MB in the end (delta: -153.4 MB). Peak memory consumption was 377.7 MB. Max. memory is 5.3 GB. [2018-01-21 03:18:58,543 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 308.3 MB. Free memory is still 272.4 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 03:18:58,543 INFO L168 Benchmark]: CACSL2BoogieTranslator took 161.31 ms. Allocated memory is still 308.3 MB. Free memory was 267.4 MB in the beginning and 259.3 MB in the end (delta: 8.1 MB). Peak memory consumption was 8.1 MB. Max. memory is 5.3 GB. [2018-01-21 03:18:58,543 INFO L168 Benchmark]: Boogie Preprocessor took 27.67 ms. Allocated memory is still 308.3 MB. Free memory was 259.3 MB in the beginning and 257.3 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-21 03:18:58,543 INFO L168 Benchmark]: RCFGBuilder took 166.98 ms. Allocated memory is still 308.3 MB. Free memory was 257.3 MB in the beginning and 245.3 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. [2018-01-21 03:18:58,544 INFO L168 Benchmark]: TraceAbstraction took 56464.11 ms. Allocated memory was 308.3 MB in the beginning and 839.4 MB in the end (delta: 531.1 MB). Free memory was 245.3 MB in the beginning and 420.8 MB in the end (delta: -175.5 MB). Peak memory consumption was 355.6 MB. Max. memory is 5.3 GB. [2018-01-21 03:18:58,545 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 308.3 MB. Free memory is still 272.4 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 161.31 ms. Allocated memory is still 308.3 MB. Free memory was 267.4 MB in the beginning and 259.3 MB in the end (delta: 8.1 MB). Peak memory consumption was 8.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 27.67 ms. Allocated memory is still 308.3 MB. Free memory was 259.3 MB in the beginning and 257.3 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 166.98 ms. Allocated memory is still 308.3 MB. Free memory was 257.3 MB in the beginning and 245.3 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. * TraceAbstraction took 56464.11 ms. Allocated memory was 308.3 MB in the beginning and 839.4 MB in the end (delta: 531.1 MB). Free memory was 245.3 MB in the beginning and 420.8 MB in the end (delta: -175.5 MB). Peak memory consumption was 355.6 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 17 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 102 LocStat_NO_SUPPORTING_DISEQUALITIES : 23 LocStat_NO_DISJUNCTIONS : -34 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 24 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 33 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 24 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.189800 RENAME_VARIABLES(MILLISECONDS) : 0.093276 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.141481 PROJECTAWAY(MILLISECONDS) : 0.110966 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.217806 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.125311 ADD_EQUALITY(MILLISECONDS) : 0.028668 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.013320 #CONJOIN_DISJUNCTIVE : 32 #RENAME_VARIABLES : 62 #UNFREEZE : 0 #CONJOIN : 62 #PROJECTAWAY : 64 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 62 #ADD_EQUALITY : 33 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 54 with TraceHistMax 36, while TraceCheckSpWp was constructing forward predicates, while XnfDer was eliminating 1 quantified variables from 2 xjuncts. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 56.2s OverallTime, 37 OverallIterations, 36 TraceHistogramMax, 2.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 579 SDtfs, 72 SDslu, 9261 SDs, 0 SdLazy, 1438 SolverSat, 44 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 5640 GetRequests, 4097 SyntacticMatches, 70 SemanticMatches, 1473 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11164 ImplicationChecksByTransitivity, 28.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=54occurred in iteration=36, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.7s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 36 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 3.2s SatisfiabilityAnalysisTime, 43.6s InterpolantComputationTime, 3692 NumberOfCodeBlocks, 3692 NumberOfCodeBlocksAsserted, 460 NumberOfCheckSat, 5966 ConstructedInterpolants, 0 QuantifiedInterpolants, 815502 SizeOfPredicates, 70 NumberOfNonLiveVariables, 8050 ConjunctsInSsa, 1470 ConjunctsInUnsatCore, 176 InterpolantComputations, 1 PerfectInterpolantSequences, 0/38850 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 20]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 20). Cancelled while IsEmpty was searching accepting run (input had 21 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_03-18-58-553.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_03-18-58-553.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_03-18-58-553.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_03-18-58-553.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_03-18-58-553.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_03-18-58-553.csv Completed graceful shutdown