java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero2_true-valid-memsafety_true-termination.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 06:08:35,004 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 06:08:35,006 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 06:08:35,021 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 06:08:35,022 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 06:08:35,023 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 06:08:35,024 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 06:08:35,025 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 06:08:35,026 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 06:08:35,027 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 06:08:35,027 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 06:08:35,028 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 06:08:35,028 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 06:08:35,029 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 06:08:35,030 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 06:08:35,033 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 06:08:35,035 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 06:08:35,037 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 06:08:35,038 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 06:08:35,040 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 06:08:35,042 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-21 06:08:35,048 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 06:08:35,048 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 06:08:35,049 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf [2018-01-21 06:08:35,059 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 06:08:35,059 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 06:08:35,060 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 06:08:35,060 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 06:08:35,061 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 06:08:35,061 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-21 06:08:35,061 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 06:08:35,061 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 06:08:35,062 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 06:08:35,062 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 06:08:35,062 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 06:08:35,062 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 06:08:35,063 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 06:08:35,063 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 06:08:35,063 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 06:08:35,063 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 06:08:35,063 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 06:08:35,064 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 06:08:35,064 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 06:08:35,064 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 06:08:35,064 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 06:08:35,064 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 06:08:35,064 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 06:08:35,065 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 06:08:35,065 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 06:08:35,065 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 06:08:35,065 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 06:08:35,065 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 06:08:35,066 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 06:08:35,066 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 06:08:35,066 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 06:08:35,066 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 06:08:35,066 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 06:08:35,067 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 06:08:35,067 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 06:08:35,067 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 06:08:35,067 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 06:08:35,068 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 06:08:35,068 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 06:08:35,103 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 06:08:35,117 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 06:08:35,122 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 06:08:35,123 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 06:08:35,124 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 06:08:35,125 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero2_true-valid-memsafety_true-termination.c [2018-01-21 06:08:35,254 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 06:08:35,259 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 06:08:35,260 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 06:08:35,260 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 06:08:35,266 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 06:08:35,267 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 06:08:35" (1/1) ... [2018-01-21 06:08:35,270 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@47d05f2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:08:35, skipping insertion in model container [2018-01-21 06:08:35,270 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 06:08:35" (1/1) ... [2018-01-21 06:08:35,288 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 06:08:35,308 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 06:08:35,423 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 06:08:35,436 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 06:08:35,443 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:08:35 WrapperNode [2018-01-21 06:08:35,444 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 06:08:35,444 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 06:08:35,444 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 06:08:35,444 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 06:08:35,456 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:08:35" (1/1) ... [2018-01-21 06:08:35,456 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:08:35" (1/1) ... [2018-01-21 06:08:35,464 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:08:35" (1/1) ... [2018-01-21 06:08:35,465 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:08:35" (1/1) ... [2018-01-21 06:08:35,467 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:08:35" (1/1) ... [2018-01-21 06:08:35,469 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:08:35" (1/1) ... [2018-01-21 06:08:35,470 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:08:35" (1/1) ... [2018-01-21 06:08:35,471 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 06:08:35,472 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 06:08:35,472 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 06:08:35,472 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 06:08:35,473 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:08:35" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 06:08:35,521 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 06:08:35,521 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 06:08:35,521 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 06:08:35,521 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 06:08:35,521 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 06:08:35,521 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 06:08:35,522 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 06:08:35,522 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 06:08:35,522 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 06:08:35,522 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 06:08:35,522 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 06:08:35,522 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 06:08:35,636 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 06:08:35,637 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 06:08:35 BoogieIcfgContainer [2018-01-21 06:08:35,637 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 06:08:35,638 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 06:08:35,638 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 06:08:35,640 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 06:08:35,640 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 06:08:35" (1/3) ... [2018-01-21 06:08:35,641 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@145e9556 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 06:08:35, skipping insertion in model container [2018-01-21 06:08:35,641 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 06:08:35" (2/3) ... [2018-01-21 06:08:35,642 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@145e9556 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 06:08:35, skipping insertion in model container [2018-01-21 06:08:35,642 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 06:08:35" (3/3) ... [2018-01-21 06:08:35,644 INFO L105 eAbstractionObserver]: Analyzing ICFG memsetNonZero2_true-valid-memsafety_true-termination.c [2018-01-21 06:08:35,652 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 06:08:35,658 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 06:08:35,702 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 06:08:35,702 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 06:08:35,702 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 06:08:35,702 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 06:08:35,703 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 06:08:35,703 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 06:08:35,703 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 06:08:35,703 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 06:08:35,704 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 06:08:35,718 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 06:08:35,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 06:08:35,723 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:35,724 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 06:08:35,724 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 06:08:35,728 INFO L82 PathProgramCache]: Analyzing trace with hash 50935, now seen corresponding path program 1 times [2018-01-21 06:08:35,731 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:35,772 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:35,773 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:35,773 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:35,773 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:35,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 06:08:35,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 06:08:35,835 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 06:08:35,841 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 06:08:35,847 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 06:08:35,847 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 06:08:35,847 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 06:08:35,847 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 06:08:35,847 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 06:08:35,847 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 06:08:35,848 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 06:08:35,848 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 06:08:35,848 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 06:08:35,849 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 06:08:35,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-21 06:08:35,849 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:35,849 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:35,850 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:35,850 INFO L82 PathProgramCache]: Analyzing trace with hash 457189328, now seen corresponding path program 1 times [2018-01-21 06:08:35,850 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:35,851 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:35,851 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:35,851 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:35,851 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:35,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:35,881 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:35,977 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:35,979 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 06:08:35,979 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 06:08:35,980 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 06:08:35,982 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 06:08:35,996 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 06:08:35,997 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 06:08:35,999 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 4 states. [2018-01-21 06:08:36,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:36,048 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 06:08:36,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 06:08:36,050 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-21 06:08:36,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:36,061 INFO L225 Difference]: With dead ends: 33 [2018-01-21 06:08:36,061 INFO L226 Difference]: Without dead ends: 19 [2018-01-21 06:08:36,126 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 06:08:36,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-01-21 06:08:36,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-01-21 06:08:36,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-01-21 06:08:36,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-01-21 06:08:36,159 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-01-21 06:08:36,159 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:36,159 INFO L432 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-01-21 06:08:36,159 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 06:08:36,159 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-01-21 06:08:36,160 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 06:08:36,160 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:36,160 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:36,160 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:36,160 INFO L82 PathProgramCache]: Analyzing trace with hash -114007861, now seen corresponding path program 1 times [2018-01-21 06:08:36,160 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:36,161 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:36,161 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:36,161 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:36,162 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:36,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:36,177 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:36,247 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:36,247 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:36,247 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:36,248 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 19 with the following transitions: [2018-01-21 06:08:36,251 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [17], [18], [19], [20], [22], [23], [24], [25], [26], [27] [2018-01-21 06:08:36,294 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 06:08:36,295 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 06:08:37,088 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 06:08:37,090 INFO L268 AbstractInterpreter]: Visited 18 different actions 22 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 06:08:37,099 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 06:08:37,099 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:37,099 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:37,112 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:37,112 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:08:37,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:37,146 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:37,251 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:37,252 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:37,366 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:37,389 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:37,389 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:37,398 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:37,399 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:08:37,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:37,433 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:37,438 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:37,439 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:37,527 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:37,528 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:37,528 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 11 [2018-01-21 06:08:37,528 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:37,529 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 06:08:37,530 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 06:08:37,530 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-21 06:08:37,530 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 8 states. [2018-01-21 06:08:37,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:37,571 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-01-21 06:08:37,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 06:08:37,571 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 18 [2018-01-21 06:08:37,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:37,572 INFO L225 Difference]: With dead ends: 29 [2018-01-21 06:08:37,572 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 06:08:37,573 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 64 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2018-01-21 06:08:37,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 06:08:37,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 06:08:37,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 06:08:37,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 06:08:37,576 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 06:08:37,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:37,577 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 06:08:37,577 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 06:08:37,577 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 06:08:37,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 06:08:37,578 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:37,578 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:37,578 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:37,578 INFO L82 PathProgramCache]: Analyzing trace with hash -641251536, now seen corresponding path program 2 times [2018-01-21 06:08:37,579 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:37,580 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:37,580 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:37,580 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:37,580 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:37,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:37,597 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:37,708 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:37,708 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:37,708 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:37,708 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:37,709 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:37,709 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:37,709 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:37,716 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:08:37,716 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:37,738 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:37,742 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:37,743 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:37,745 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:37,787 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:37,787 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:37,917 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:37,942 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:37,943 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:37,949 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:08:37,949 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:37,967 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:37,978 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:37,986 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:37,991 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:37,997 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:37,997 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:38,074 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:38,076 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:38,077 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 14 [2018-01-21 06:08:38,077 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:38,077 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 06:08:38,078 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 06:08:38,078 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=113, Unknown=0, NotChecked=0, Total=182 [2018-01-21 06:08:38,078 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 10 states. [2018-01-21 06:08:38,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:38,104 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 06:08:38,105 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 06:08:38,105 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 19 [2018-01-21 06:08:38,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:38,105 INFO L225 Difference]: With dead ends: 30 [2018-01-21 06:08:38,106 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 06:08:38,106 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=80, Invalid=130, Unknown=0, NotChecked=0, Total=210 [2018-01-21 06:08:38,106 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 06:08:38,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 06:08:38,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 06:08:38,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 06:08:38,110 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 06:08:38,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:38,110 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 06:08:38,110 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 06:08:38,110 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 06:08:38,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 06:08:38,111 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:38,111 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:38,111 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:38,112 INFO L82 PathProgramCache]: Analyzing trace with hash 194063723, now seen corresponding path program 3 times [2018-01-21 06:08:38,112 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:38,113 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:38,113 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:38,113 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:38,113 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:38,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:38,127 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:38,194 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:38,195 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:38,195 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:38,195 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:38,195 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:38,195 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:38,196 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:38,210 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:08:38,210 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:08:38,219 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:38,221 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:38,222 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:38,225 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:38,227 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:38,254 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:38,255 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:38,363 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:38,384 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:38,384 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:38,387 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:08:38,387 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:08:38,400 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:38,407 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:38,415 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:38,421 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:38,425 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:38,429 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:38,429 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:38,484 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:38,485 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:38,485 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 17 [2018-01-21 06:08:38,485 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:38,486 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 06:08:38,486 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 06:08:38,486 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=170, Unknown=0, NotChecked=0, Total=272 [2018-01-21 06:08:38,486 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 12 states. [2018-01-21 06:08:38,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:38,507 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 06:08:38,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 06:08:38,507 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 20 [2018-01-21 06:08:38,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:38,508 INFO L225 Difference]: With dead ends: 31 [2018-01-21 06:08:38,508 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 06:08:38,508 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 68 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=115, Invalid=191, Unknown=0, NotChecked=0, Total=306 [2018-01-21 06:08:38,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 06:08:38,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 06:08:38,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 06:08:38,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 06:08:38,511 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 06:08:38,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:38,512 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 06:08:38,512 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 06:08:38,512 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 06:08:38,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 06:08:38,512 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:38,512 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:38,512 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:38,512 INFO L82 PathProgramCache]: Analyzing trace with hash 319032976, now seen corresponding path program 4 times [2018-01-21 06:08:38,513 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:38,513 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:38,513 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:38,513 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:38,514 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:38,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:38,524 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:38,579 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:38,580 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:38,580 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:38,580 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:38,580 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:38,580 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:38,580 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:38,588 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:08:38,589 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:08:38,601 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:38,603 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:38,639 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:38,639 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:38,767 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:38,787 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:38,788 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:38,791 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:08:38,791 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:08:38,816 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:38,820 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:38,826 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:38,826 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:38,935 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:38,936 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:38,936 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 20 [2018-01-21 06:08:38,936 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:38,937 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 06:08:38,937 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 06:08:38,937 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=239, Unknown=0, NotChecked=0, Total=380 [2018-01-21 06:08:38,937 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 14 states. [2018-01-21 06:08:39,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:39,022 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 06:08:39,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 06:08:39,022 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 21 [2018-01-21 06:08:39,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:39,023 INFO L225 Difference]: With dead ends: 32 [2018-01-21 06:08:39,023 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 06:08:39,024 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 70 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=156, Invalid=264, Unknown=0, NotChecked=0, Total=420 [2018-01-21 06:08:39,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 06:08:39,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 06:08:39,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 06:08:39,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 06:08:39,028 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 06:08:39,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:39,028 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 06:08:39,029 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 06:08:39,029 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 06:08:39,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 06:08:39,029 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:39,030 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:39,030 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:39,030 INFO L82 PathProgramCache]: Analyzing trace with hash -101887477, now seen corresponding path program 5 times [2018-01-21 06:08:39,030 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:39,031 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:39,031 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:39,031 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:39,031 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:39,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:39,045 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:39,102 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:39,102 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:39,103 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:39,103 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:39,103 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:39,103 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:39,103 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:39,108 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:08:39,108 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:39,112 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:39,113 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:39,114 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:39,119 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:39,120 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:39,121 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:39,164 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:39,164 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:39,371 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:39,392 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:39,392 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:39,395 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:08:39,396 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:39,400 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:39,402 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:39,406 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:39,415 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:39,422 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:39,425 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:39,431 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:39,431 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:39,484 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:39,485 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:39,485 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 23 [2018-01-21 06:08:39,486 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:39,486 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 06:08:39,486 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 06:08:39,487 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=320, Unknown=0, NotChecked=0, Total=506 [2018-01-21 06:08:39,487 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 16 states. [2018-01-21 06:08:39,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:39,518 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 06:08:39,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 06:08:39,519 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 22 [2018-01-21 06:08:39,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:39,519 INFO L225 Difference]: With dead ends: 33 [2018-01-21 06:08:39,519 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 06:08:39,520 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 173 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=203, Invalid=349, Unknown=0, NotChecked=0, Total=552 [2018-01-21 06:08:39,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 06:08:39,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 06:08:39,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 06:08:39,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 06:08:39,523 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 06:08:39,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:39,523 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 06:08:39,523 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 06:08:39,523 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 06:08:39,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 06:08:39,523 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:39,524 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:39,524 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:39,524 INFO L82 PathProgramCache]: Analyzing trace with hash -265519632, now seen corresponding path program 6 times [2018-01-21 06:08:39,524 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:39,524 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:39,525 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:39,525 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:39,525 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:39,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:39,536 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:39,617 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:39,617 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:39,617 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:39,617 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:39,618 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:39,618 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:39,618 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:39,624 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:08:39,624 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:08:39,631 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:39,633 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:39,634 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:39,635 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:39,636 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:39,637 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:39,683 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:39,683 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:39,827 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:39,848 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:39,848 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:39,851 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:08:39,851 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:08:39,859 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:39,866 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:39,874 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:39,882 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:39,887 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:39,891 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:39,896 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:39,897 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:39,975 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:39,977 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:39,977 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 26 [2018-01-21 06:08:39,978 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:39,978 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 06:08:39,978 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 06:08:39,979 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=237, Invalid=413, Unknown=0, NotChecked=0, Total=650 [2018-01-21 06:08:39,979 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 18 states. [2018-01-21 06:08:40,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:40,020 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 06:08:40,021 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 06:08:40,021 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 23 [2018-01-21 06:08:40,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:40,022 INFO L225 Difference]: With dead ends: 34 [2018-01-21 06:08:40,022 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 06:08:40,022 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 74 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=256, Invalid=446, Unknown=0, NotChecked=0, Total=702 [2018-01-21 06:08:40,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 06:08:40,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 06:08:40,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 06:08:40,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 06:08:40,026 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 06:08:40,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:40,026 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 06:08:40,026 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 06:08:40,026 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 06:08:40,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 06:08:40,026 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:40,027 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:40,027 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:40,027 INFO L82 PathProgramCache]: Analyzing trace with hash -1043149141, now seen corresponding path program 7 times [2018-01-21 06:08:40,027 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:40,027 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:40,028 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:40,028 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:40,028 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:40,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:40,038 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:40,147 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:40,148 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:40,148 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:40,148 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:40,148 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:40,148 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:40,148 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:40,154 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:40,154 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:08:40,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:40,166 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:40,212 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:40,213 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:40,407 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:40,428 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:40,428 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:40,432 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:40,432 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:08:40,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:40,452 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:40,457 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:40,457 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:40,524 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:40,525 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:40,526 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 29 [2018-01-21 06:08:40,526 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:40,527 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 06:08:40,527 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 06:08:40,528 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=294, Invalid=518, Unknown=0, NotChecked=0, Total=812 [2018-01-21 06:08:40,528 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 20 states. [2018-01-21 06:08:40,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:40,591 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 06:08:40,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 06:08:40,591 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 24 [2018-01-21 06:08:40,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:40,592 INFO L225 Difference]: With dead ends: 35 [2018-01-21 06:08:40,592 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 06:08:40,593 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 299 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=315, Invalid=555, Unknown=0, NotChecked=0, Total=870 [2018-01-21 06:08:40,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 06:08:40,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 06:08:40,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 06:08:40,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 06:08:40,597 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 06:08:40,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:40,597 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 06:08:40,597 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 06:08:40,597 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 06:08:40,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 06:08:40,598 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:40,598 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:40,598 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:40,598 INFO L82 PathProgramCache]: Analyzing trace with hash 620139856, now seen corresponding path program 8 times [2018-01-21 06:08:40,598 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:40,599 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:40,599 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:40,599 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:40,600 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:40,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:40,612 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:40,719 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:40,719 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:40,719 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:40,719 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:40,719 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:40,719 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:40,719 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:40,724 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:08:40,725 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:40,732 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:40,735 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:40,735 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:40,737 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:40,795 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:40,796 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:41,012 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:41,032 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:41,032 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:41,035 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:08:41,035 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:41,044 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:41,053 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:41,060 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:41,063 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:41,067 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:41,067 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:41,155 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:41,157 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:41,157 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 32 [2018-01-21 06:08:41,157 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:41,158 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 06:08:41,158 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 06:08:41,158 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=357, Invalid=635, Unknown=0, NotChecked=0, Total=992 [2018-01-21 06:08:41,158 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 22 states. [2018-01-21 06:08:41,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:41,189 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 06:08:41,190 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 06:08:41,190 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 25 [2018-01-21 06:08:41,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:41,190 INFO L225 Difference]: With dead ends: 36 [2018-01-21 06:08:41,190 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 06:08:41,191 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 374 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=380, Invalid=676, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 06:08:41,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 06:08:41,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 06:08:41,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 06:08:41,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 06:08:41,194 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 06:08:41,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:41,194 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 06:08:41,194 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 06:08:41,194 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 06:08:41,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 06:08:41,194 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:41,195 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:41,195 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:41,195 INFO L82 PathProgramCache]: Analyzing trace with hash 642491211, now seen corresponding path program 9 times [2018-01-21 06:08:41,195 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:41,195 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:41,196 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:41,196 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:41,196 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:41,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:41,204 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:41,346 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:41,346 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:41,346 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:41,346 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:41,346 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:41,346 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:41,346 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:41,351 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:08:41,352 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:08:41,359 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:41,361 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:41,362 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:41,363 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:41,365 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:41,366 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:41,367 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:41,368 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:41,437 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:41,438 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:41,662 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:41,682 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:41,682 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:41,685 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:08:41,685 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:08:41,694 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:41,701 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:41,708 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:41,717 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:41,725 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:41,734 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:41,740 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:41,743 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:41,747 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:41,747 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:41,833 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:41,834 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:41,868 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 35 [2018-01-21 06:08:41,869 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:41,869 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 06:08:41,869 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 06:08:41,870 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=426, Invalid=764, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 06:08:41,870 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 24 states. [2018-01-21 06:08:41,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:41,902 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 06:08:41,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 06:08:41,902 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 26 [2018-01-21 06:08:41,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:41,903 INFO L225 Difference]: With dead ends: 37 [2018-01-21 06:08:41,903 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 06:08:41,904 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 80 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 457 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=451, Invalid=809, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 06:08:41,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 06:08:41,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 06:08:41,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 06:08:41,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 06:08:41,907 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 06:08:41,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:41,907 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 06:08:41,907 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 06:08:41,908 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 06:08:41,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 06:08:41,908 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:41,908 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:41,908 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:41,909 INFO L82 PathProgramCache]: Analyzing trace with hash 1335383216, now seen corresponding path program 10 times [2018-01-21 06:08:41,909 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:41,909 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:41,909 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:41,909 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:41,909 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:41,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:41,919 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:42,019 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:42,019 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:42,019 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:42,019 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:42,019 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:42,019 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:42,019 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:42,027 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:08:42,027 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:08:42,038 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:42,040 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:42,107 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:42,107 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:42,340 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:42,360 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:42,360 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:42,363 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:08:42,363 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:08:42,387 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:42,389 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:42,394 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:42,394 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:42,472 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:42,473 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:42,473 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 38 [2018-01-21 06:08:42,474 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:42,474 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 06:08:42,474 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 06:08:42,474 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=501, Invalid=905, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 06:08:42,475 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 26 states. [2018-01-21 06:08:42,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:42,500 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 06:08:42,500 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 06:08:42,500 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 27 [2018-01-21 06:08:42,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:42,501 INFO L225 Difference]: With dead ends: 38 [2018-01-21 06:08:42,501 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 06:08:42,502 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 82 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 548 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=528, Invalid=954, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 06:08:42,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 06:08:42,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 06:08:42,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 06:08:42,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 06:08:42,505 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 06:08:42,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:42,506 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 06:08:42,506 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 06:08:42,506 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 06:08:42,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 06:08:42,507 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:42,507 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:42,507 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:42,507 INFO L82 PathProgramCache]: Analyzing trace with hash 1340198891, now seen corresponding path program 11 times [2018-01-21 06:08:42,507 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:42,508 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:42,508 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:42,508 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:42,508 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:42,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:42,517 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:42,653 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:42,653 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:42,653 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:42,653 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:42,653 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:42,653 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:42,654 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:42,659 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:08:42,659 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:42,662 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:42,663 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:42,664 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:42,665 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:42,666 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:42,666 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:42,675 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:42,676 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:42,677 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:42,752 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:42,752 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:43,023 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:43,043 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:43,043 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:43,046 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:08:43,046 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:43,050 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:43,051 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:43,054 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:43,058 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:43,062 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:43,066 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:43,076 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:43,083 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:43,086 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:43,091 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:43,091 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:43,200 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:43,201 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:43,201 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 41 [2018-01-21 06:08:43,201 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:43,202 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 06:08:43,202 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 06:08:43,202 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=582, Invalid=1058, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 06:08:43,202 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 28 states. [2018-01-21 06:08:43,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:43,249 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 06:08:43,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 06:08:43,250 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 28 [2018-01-21 06:08:43,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:43,251 INFO L225 Difference]: With dead ends: 39 [2018-01-21 06:08:43,251 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 06:08:43,251 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 647 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=611, Invalid=1111, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 06:08:43,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 06:08:43,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 06:08:43,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 06:08:43,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 06:08:43,255 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 06:08:43,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:43,255 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 06:08:43,255 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 06:08:43,255 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 06:08:43,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 06:08:43,256 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:43,256 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:43,257 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:43,257 INFO L82 PathProgramCache]: Analyzing trace with hash 1489484816, now seen corresponding path program 12 times [2018-01-21 06:08:43,257 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:43,258 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:43,258 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:43,258 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:43,258 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:43,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:43,266 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:43,639 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:43,639 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:43,639 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:43,639 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:43,639 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:43,639 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:43,639 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:43,644 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:08:43,644 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:08:43,651 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:43,652 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:43,653 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:43,654 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:43,655 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:43,656 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:43,658 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:43,658 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:43,659 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:43,745 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:43,745 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:44,136 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:44,157 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:44,157 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:44,160 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:08:44,160 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:08:44,171 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:44,181 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:44,189 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:44,202 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:44,215 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:44,225 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:44,235 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:44,243 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:44,247 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:44,251 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:44,252 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:44,408 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:44,409 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:44,410 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 44 [2018-01-21 06:08:44,410 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:44,410 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 06:08:44,410 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 06:08:44,411 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=669, Invalid=1223, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 06:08:44,411 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 30 states. [2018-01-21 06:08:44,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:44,452 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 06:08:44,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 06:08:44,453 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 29 [2018-01-21 06:08:44,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:44,454 INFO L225 Difference]: With dead ends: 40 [2018-01-21 06:08:44,454 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 06:08:44,455 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 86 SyntacticMatches, 2 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 754 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=700, Invalid=1280, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 06:08:44,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 06:08:44,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 06:08:44,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 06:08:44,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 06:08:44,459 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 06:08:44,459 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:44,459 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 06:08:44,459 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 06:08:44,459 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 06:08:44,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 06:08:44,460 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:44,460 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:44,460 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:44,460 INFO L82 PathProgramCache]: Analyzing trace with hash 1822381195, now seen corresponding path program 13 times [2018-01-21 06:08:44,460 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:44,461 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:44,461 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:44,461 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:44,462 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:44,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:44,471 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:44,662 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:44,662 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:44,662 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:44,663 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:44,663 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:44,663 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:44,663 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:44,671 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:44,671 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:08:44,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:44,683 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:44,839 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:44,839 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:45,537 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:45,557 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:45,557 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:45,560 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:45,560 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:08:45,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:45,584 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:45,590 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:45,590 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:45,684 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:45,685 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:45,685 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 47 [2018-01-21 06:08:45,685 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:45,686 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 06:08:45,686 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 06:08:45,686 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=762, Invalid=1400, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 06:08:45,686 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 32 states. [2018-01-21 06:08:45,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:45,721 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 06:08:45,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 06:08:45,722 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 30 [2018-01-21 06:08:45,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:45,722 INFO L225 Difference]: With dead ends: 41 [2018-01-21 06:08:45,722 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 06:08:45,723 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 88 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 869 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=795, Invalid=1461, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 06:08:45,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 06:08:45,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 06:08:45,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 06:08:45,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 06:08:45,725 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 06:08:45,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:45,726 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 06:08:45,726 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 06:08:45,726 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 06:08:45,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 06:08:45,726 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:45,726 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:45,726 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:45,726 INFO L82 PathProgramCache]: Analyzing trace with hash -742732944, now seen corresponding path program 14 times [2018-01-21 06:08:45,727 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:45,727 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:45,727 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:45,727 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:45,727 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:45,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:45,734 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:45,988 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:45,988 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:45,988 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:45,988 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:45,988 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:45,989 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:45,989 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:46,002 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:08:46,002 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:46,011 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:46,017 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:46,018 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:46,020 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:46,379 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:46,379 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:46,796 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:46,817 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:46,817 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:46,820 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:08:46,820 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:46,829 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:46,839 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:46,847 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:46,860 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:46,867 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:46,867 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:46,988 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:46,989 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:46,989 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 50 [2018-01-21 06:08:46,990 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:46,990 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 06:08:46,990 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 06:08:46,991 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=1589, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 06:08:46,991 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 34 states. [2018-01-21 06:08:47,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:47,073 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 06:08:47,074 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 06:08:47,074 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 31 [2018-01-21 06:08:47,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:47,075 INFO L225 Difference]: With dead ends: 42 [2018-01-21 06:08:47,075 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 06:08:47,076 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 992 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=896, Invalid=1654, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 06:08:47,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 06:08:47,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 06:08:47,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 06:08:47,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 06:08:47,080 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 06:08:47,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:47,080 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 06:08:47,080 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 06:08:47,081 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 06:08:47,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 06:08:47,081 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:47,081 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:47,081 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:47,082 INFO L82 PathProgramCache]: Analyzing trace with hash 1343107371, now seen corresponding path program 15 times [2018-01-21 06:08:47,082 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:47,082 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:47,082 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:47,083 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:47,083 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:47,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:47,089 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:47,281 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:47,281 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:47,282 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:47,282 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:47,282 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:47,282 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:47,282 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:47,291 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:08:47,291 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:08:47,298 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:47,300 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:47,301 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:47,303 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:47,304 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:47,305 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:47,307 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:47,308 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:47,309 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:47,310 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:47,311 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:47,478 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:47,478 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:48,106 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:48,139 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:48,139 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:48,142 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:08:48,142 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:08:48,154 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:48,162 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:48,170 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:48,178 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:48,186 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:48,195 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:48,205 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:48,214 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:48,224 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:48,232 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:48,235 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:48,240 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:48,240 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:48,359 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:48,360 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:48,360 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 53 [2018-01-21 06:08:48,360 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:48,361 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 06:08:48,361 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 06:08:48,362 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=966, Invalid=1790, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 06:08:48,362 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 36 states. [2018-01-21 06:08:48,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:48,402 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 06:08:48,403 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 06:08:48,403 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 32 [2018-01-21 06:08:48,403 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:48,403 INFO L225 Difference]: With dead ends: 43 [2018-01-21 06:08:48,403 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 06:08:48,404 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 92 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1123 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1003, Invalid=1859, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 06:08:48,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 06:08:48,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 06:08:48,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 06:08:48,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 06:08:48,406 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 06:08:48,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:48,407 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 06:08:48,407 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 06:08:48,407 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 06:08:48,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 06:08:48,407 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:48,407 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:48,407 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:48,407 INFO L82 PathProgramCache]: Analyzing trace with hash 1579647696, now seen corresponding path program 16 times [2018-01-21 06:08:48,408 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:48,408 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:48,408 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:48,408 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:48,408 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:48,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:48,417 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:48,662 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:48,662 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:48,662 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:48,662 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:48,662 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:48,663 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:48,663 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:48,668 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:08:48,668 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:08:48,680 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:48,681 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:48,804 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:48,804 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:49,255 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:49,275 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:49,275 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:49,278 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:08:49,278 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:08:49,308 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:49,311 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:49,315 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:49,315 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:49,447 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:49,450 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:49,450 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 56 [2018-01-21 06:08:49,450 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:49,451 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 06:08:49,451 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 06:08:49,452 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1077, Invalid=2003, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 06:08:49,452 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 38 states. [2018-01-21 06:08:49,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:49,518 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 06:08:49,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 06:08:49,519 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 33 [2018-01-21 06:08:49,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:49,519 INFO L225 Difference]: With dead ends: 44 [2018-01-21 06:08:49,519 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 06:08:49,520 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 94 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1262 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1116, Invalid=2076, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 06:08:49,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 06:08:49,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 06:08:49,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 06:08:49,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 06:08:49,524 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 06:08:49,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:49,524 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 06:08:49,524 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 06:08:49,524 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 06:08:49,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 06:08:49,525 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:49,525 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:49,525 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:49,525 INFO L82 PathProgramCache]: Analyzing trace with hash 322463179, now seen corresponding path program 17 times [2018-01-21 06:08:49,526 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:49,526 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:49,526 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:49,526 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:49,527 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:49,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:49,536 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:49,712 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:49,712 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:49,712 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:49,712 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:49,712 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:49,712 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:49,712 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:49,717 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:08:49,717 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:49,721 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:49,722 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:49,722 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:49,723 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:49,724 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:49,725 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:49,725 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:49,726 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:49,727 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:49,731 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:49,732 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:49,733 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:49,871 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:49,871 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:50,426 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:50,446 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:50,446 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:50,449 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:08:50,449 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:50,453 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:50,455 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:50,458 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:50,462 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:50,466 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:50,471 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:50,476 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:50,481 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:50,487 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:50,498 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:50,507 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:50,510 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:50,516 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:50,516 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:50,663 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:50,664 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:50,664 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 59 [2018-01-21 06:08:50,664 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:50,665 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 06:08:50,665 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 06:08:50,665 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1194, Invalid=2228, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 06:08:50,666 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 40 states. [2018-01-21 06:08:50,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:50,709 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 06:08:50,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 06:08:50,710 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 34 [2018-01-21 06:08:50,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:50,710 INFO L225 Difference]: With dead ends: 45 [2018-01-21 06:08:50,710 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 06:08:50,711 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1409 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1235, Invalid=2305, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 06:08:50,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 06:08:50,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 06:08:50,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 06:08:50,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 06:08:50,713 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 06:08:50,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:50,714 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 06:08:50,714 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 06:08:50,714 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 06:08:50,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 06:08:50,714 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:50,714 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:50,714 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:50,715 INFO L82 PathProgramCache]: Analyzing trace with hash 4448816, now seen corresponding path program 18 times [2018-01-21 06:08:50,715 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:50,715 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:50,715 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:50,716 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:50,716 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:50,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:50,725 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:50,919 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:50,920 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:50,920 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:50,920 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:50,920 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:50,920 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:50,920 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:50,925 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:08:50,925 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:08:50,932 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:50,934 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:50,935 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:50,936 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:50,937 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:50,938 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:50,939 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:50,940 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:50,941 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:50,942 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:50,942 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:50,944 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:51,087 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:51,087 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:51,635 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:51,654 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:51,655 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:51,657 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:08:51,658 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:08:51,667 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:51,673 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:51,681 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:51,689 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:51,698 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:51,706 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:51,716 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:51,725 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:51,736 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:51,746 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:51,754 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:51,757 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:51,762 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:51,762 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:51,913 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:51,914 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:51,914 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 62 [2018-01-21 06:08:51,914 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:51,914 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 06:08:51,915 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 06:08:51,915 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1317, Invalid=2465, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 06:08:51,916 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 42 states. [2018-01-21 06:08:51,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:51,956 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 06:08:51,956 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 06:08:51,956 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 35 [2018-01-21 06:08:51,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:51,956 INFO L225 Difference]: With dead ends: 46 [2018-01-21 06:08:51,957 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 06:08:51,957 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 98 SyntacticMatches, 2 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1564 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1360, Invalid=2546, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 06:08:51,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 06:08:51,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 06:08:51,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 06:08:51,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 06:08:51,960 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 06:08:51,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:51,960 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 06:08:51,960 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 06:08:51,961 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 06:08:51,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 06:08:51,961 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:51,961 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:51,961 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:51,961 INFO L82 PathProgramCache]: Analyzing trace with hash -1264061845, now seen corresponding path program 19 times [2018-01-21 06:08:51,961 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:51,962 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:51,962 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:51,962 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:51,962 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:51,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:51,971 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:52,212 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:52,213 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:52,213 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:52,213 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:52,213 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:52,213 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:52,213 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:52,218 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:52,218 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:08:52,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:52,231 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:52,388 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:52,388 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:52,974 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:52,993 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:52,993 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:52,996 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:52,996 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:08:53,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:53,022 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:53,027 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:53,027 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:53,164 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:53,165 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:53,165 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 65 [2018-01-21 06:08:53,165 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:53,165 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-21 06:08:53,166 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-21 06:08:53,166 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1446, Invalid=2714, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 06:08:53,167 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 44 states. [2018-01-21 06:08:53,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:53,214 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 06:08:53,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 06:08:53,215 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 36 [2018-01-21 06:08:53,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:53,215 INFO L225 Difference]: With dead ends: 47 [2018-01-21 06:08:53,215 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 06:08:53,216 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1727 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1491, Invalid=2799, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 06:08:53,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 06:08:53,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 06:08:53,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 06:08:53,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 06:08:53,218 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 06:08:53,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:53,219 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 06:08:53,219 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-21 06:08:53,219 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 06:08:53,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 06:08:53,220 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:53,220 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:53,220 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:53,220 INFO L82 PathProgramCache]: Analyzing trace with hash -1933186672, now seen corresponding path program 20 times [2018-01-21 06:08:53,220 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:53,220 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:53,221 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:08:53,221 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:53,221 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:53,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:53,227 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:53,436 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:53,436 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:53,436 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:53,436 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:53,436 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:53,436 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:53,436 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:53,445 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:08:53,445 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:53,454 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:53,462 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:53,464 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:53,466 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:53,648 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:53,648 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:54,281 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:54,301 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:54,301 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:54,304 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:08:54,305 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:54,313 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:54,324 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:54,335 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:54,338 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:54,343 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:54,343 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:54,496 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:54,497 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:54,497 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 68 [2018-01-21 06:08:54,497 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:54,497 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-01-21 06:08:54,497 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-01-21 06:08:54,498 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1583, Invalid=2973, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 06:08:54,498 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 46 states. [2018-01-21 06:08:54,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:54,537 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 06:08:54,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 06:08:54,537 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 37 [2018-01-21 06:08:54,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:54,538 INFO L225 Difference]: With dead ends: 48 [2018-01-21 06:08:54,538 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 06:08:54,538 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1916 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1630, Invalid=3062, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 06:08:54,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 06:08:54,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 06:08:54,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 06:08:54,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 06:08:54,541 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 06:08:54,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:54,541 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 06:08:54,541 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-01-21 06:08:54,542 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 06:08:54,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 06:08:54,542 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:54,542 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:54,542 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:54,542 INFO L82 PathProgramCache]: Analyzing trace with hash -1201219829, now seen corresponding path program 21 times [2018-01-21 06:08:54,542 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:54,543 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:54,543 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:54,543 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:54,543 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:54,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:54,551 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:54,804 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:54,804 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:54,804 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:54,804 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:54,805 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:54,805 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:54,805 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:54,810 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:08:54,810 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:08:54,816 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:54,817 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:54,818 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:54,819 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:54,820 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:54,821 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:54,822 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:54,823 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:54,824 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:54,825 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:54,826 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:54,827 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:54,827 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:54,829 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:55,015 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:55,015 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:55,679 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:55,698 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:55,699 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:55,702 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:08:55,702 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:08:55,711 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:55,718 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:55,725 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:55,733 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:55,742 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:55,750 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:55,760 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:55,770 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:55,780 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:55,791 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:55,802 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:55,813 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:08:55,821 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:55,824 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:55,829 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:55,829 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:55,995 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:55,996 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:55,996 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 71 [2018-01-21 06:08:55,996 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:55,996 INFO L409 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-01-21 06:08:55,997 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-01-21 06:08:55,997 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1726, Invalid=3244, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 06:08:55,998 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 48 states. [2018-01-21 06:08:56,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:56,056 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 06:08:56,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 06:08:56,056 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 38 [2018-01-21 06:08:56,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:56,056 INFO L225 Difference]: With dead ends: 49 [2018-01-21 06:08:56,056 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 06:08:56,057 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 104 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2136 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1775, Invalid=3337, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 06:08:56,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 06:08:56,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 06:08:56,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 06:08:56,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 06:08:56,060 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 06:08:56,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:56,061 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 06:08:56,061 INFO L433 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-01-21 06:08:56,061 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 06:08:56,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 06:08:56,061 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:56,061 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:56,061 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:56,061 INFO L82 PathProgramCache]: Analyzing trace with hash 14915824, now seen corresponding path program 22 times [2018-01-21 06:08:56,061 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:56,062 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:56,062 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:56,062 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:56,062 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:56,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:56,069 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:56,308 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:56,309 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:56,309 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:56,309 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:56,309 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:56,309 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:56,309 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:56,314 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:08:56,314 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:08:56,325 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:56,327 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:56,528 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:56,528 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:57,276 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:57,296 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:57,296 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:57,299 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:08:57,299 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:08:57,332 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:57,335 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:57,340 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:57,340 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:57,508 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:57,509 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:57,509 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 74 [2018-01-21 06:08:57,509 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:57,509 INFO L409 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-01-21 06:08:57,510 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-01-21 06:08:57,510 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1875, Invalid=3527, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 06:08:57,510 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 50 states. [2018-01-21 06:08:57,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:57,590 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 06:08:57,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 06:08:57,591 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 39 [2018-01-21 06:08:57,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:57,591 INFO L225 Difference]: With dead ends: 50 [2018-01-21 06:08:57,592 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 06:08:57,592 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 106 SyntacticMatches, 2 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2368 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1926, Invalid=3624, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 06:08:57,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 06:08:57,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 06:08:57,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 06:08:57,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 06:08:57,596 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 06:08:57,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:57,597 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 06:08:57,597 INFO L433 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-01-21 06:08:57,597 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 06:08:57,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 06:08:57,598 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:57,598 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:57,598 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:57,598 INFO L82 PathProgramCache]: Analyzing trace with hash -939584597, now seen corresponding path program 23 times [2018-01-21 06:08:57,598 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:57,599 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:57,599 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:57,599 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:57,599 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:57,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:57,608 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:57,852 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:57,852 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:57,852 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:57,852 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:57,852 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:57,852 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:57,853 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:57,857 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:08:57,857 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:57,861 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:57,862 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:57,863 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:57,863 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:57,864 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:57,865 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:57,866 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:57,866 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:57,867 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:57,868 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:57,869 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:57,870 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:57,874 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:57,875 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:57,876 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:58,085 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:58,086 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:58,839 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:58,859 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:58,859 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:08:58,862 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:08:58,862 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:08:58,866 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:58,868 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:58,871 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:58,877 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:58,882 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:58,887 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:58,891 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:58,896 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:58,901 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:58,907 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:58,913 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:58,920 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:58,931 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:08:58,941 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:58,944 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:58,950 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:58,950 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:08:59,129 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:59,130 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:08:59,130 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 77 [2018-01-21 06:08:59,131 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:08:59,131 INFO L409 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-01-21 06:08:59,131 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-01-21 06:08:59,132 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2030, Invalid=3822, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 06:08:59,132 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 52 states. [2018-01-21 06:08:59,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:08:59,228 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 06:08:59,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 06:08:59,229 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 40 [2018-01-21 06:08:59,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:08:59,229 INFO L225 Difference]: With dead ends: 51 [2018-01-21 06:08:59,229 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 06:08:59,230 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2612 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=2083, Invalid=3923, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 06:08:59,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 06:08:59,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 06:08:59,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 06:08:59,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 06:08:59,232 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 06:08:59,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:08:59,232 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 06:08:59,232 INFO L433 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-01-21 06:08:59,233 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 06:08:59,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 06:08:59,233 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:08:59,233 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:08:59,233 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:08:59,233 INFO L82 PathProgramCache]: Analyzing trace with hash -464326576, now seen corresponding path program 24 times [2018-01-21 06:08:59,234 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:08:59,234 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:59,234 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:08:59,234 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:08:59,234 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:08:59,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:08:59,241 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:08:59,514 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:59,515 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:59,515 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:08:59,515 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:08:59,515 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:08:59,515 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:08:59,515 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:08:59,520 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:08:59,520 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:08:59,526 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:59,528 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:59,529 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:59,530 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:59,531 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:59,531 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:59,532 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:59,534 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:59,535 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:59,536 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:59,537 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:59,538 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:59,539 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:08:59,539 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:08:59,541 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:08:59,766 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:08:59,766 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:00,560 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:00,579 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:00,579 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:00,582 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:09:00,582 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:09:00,591 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:00,597 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:00,605 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:00,613 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:00,622 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:00,630 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:00,640 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:00,649 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:00,659 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:00,670 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:00,681 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:00,693 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:00,705 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:00,714 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:00,718 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:00,723 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:00,723 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:00,929 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:00,930 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:00,930 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 80 [2018-01-21 06:09:00,930 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:00,931 INFO L409 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-01-21 06:09:00,931 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-01-21 06:09:00,931 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2191, Invalid=4129, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 06:09:00,932 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 54 states. [2018-01-21 06:09:01,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:01,025 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 06:09:01,026 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 06:09:01,026 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 41 [2018-01-21 06:09:01,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:01,026 INFO L225 Difference]: With dead ends: 52 [2018-01-21 06:09:01,027 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 06:09:01,027 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 110 SyntacticMatches, 2 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2868 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=2246, Invalid=4234, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 06:09:01,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 06:09:01,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 06:09:01,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 06:09:01,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 06:09:01,031 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 06:09:01,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:01,031 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 06:09:01,031 INFO L433 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-01-21 06:09:01,031 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 06:09:01,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 06:09:01,032 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:01,032 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:01,032 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:01,032 INFO L82 PathProgramCache]: Analyzing trace with hash 1383770187, now seen corresponding path program 25 times [2018-01-21 06:09:01,032 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:01,033 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:01,033 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:01,033 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:01,033 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:01,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:01,044 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:01,383 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:01,384 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:01,384 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:01,384 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:01,384 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:01,384 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:01,384 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:01,389 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:01,389 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:09:01,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:01,402 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:01,638 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:01,638 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:02,462 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:02,482 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:02,482 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:02,485 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:02,485 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:09:02,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:02,513 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:02,519 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:02,519 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:02,725 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:02,726 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:02,726 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 83 [2018-01-21 06:09:02,726 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:02,726 INFO L409 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-01-21 06:09:02,727 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-01-21 06:09:02,727 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2358, Invalid=4448, Unknown=0, NotChecked=0, Total=6806 [2018-01-21 06:09:02,727 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 56 states. [2018-01-21 06:09:02,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:02,803 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 06:09:02,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 06:09:02,804 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 42 [2018-01-21 06:09:02,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:02,804 INFO L225 Difference]: With dead ends: 53 [2018-01-21 06:09:02,804 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 06:09:02,805 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 112 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3136 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=2415, Invalid=4557, Unknown=0, NotChecked=0, Total=6972 [2018-01-21 06:09:02,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 06:09:02,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 06:09:02,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 06:09:02,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 06:09:02,807 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 06:09:02,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:02,807 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 06:09:02,807 INFO L433 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-01-21 06:09:02,807 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 06:09:02,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 06:09:02,807 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:02,808 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:02,808 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:02,808 INFO L82 PathProgramCache]: Analyzing trace with hash -1454772304, now seen corresponding path program 26 times [2018-01-21 06:09:02,808 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:02,808 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:02,808 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:02,808 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:02,809 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:02,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:02,818 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:03,143 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:03,144 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:03,144 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:03,144 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:03,144 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:03,144 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:03,144 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:03,150 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:09:03,150 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:03,157 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:03,162 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:03,164 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:03,165 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:03,419 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:03,419 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:04,291 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:04,311 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:04,311 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:04,314 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:09:04,314 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:04,323 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:04,336 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:04,348 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:04,352 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:04,357 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:04,358 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:04,574 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:04,576 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:04,576 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 86 [2018-01-21 06:09:04,576 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:04,576 INFO L409 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-01-21 06:09:04,576 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-01-21 06:09:04,577 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2531, Invalid=4779, Unknown=0, NotChecked=0, Total=7310 [2018-01-21 06:09:04,577 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 58 states. [2018-01-21 06:09:04,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:04,662 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 06:09:04,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 06:09:04,662 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 43 [2018-01-21 06:09:04,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:04,663 INFO L225 Difference]: With dead ends: 54 [2018-01-21 06:09:04,663 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 06:09:04,663 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3416 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2590, Invalid=4892, Unknown=0, NotChecked=0, Total=7482 [2018-01-21 06:09:04,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 06:09:04,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 06:09:04,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 06:09:04,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 06:09:04,665 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 06:09:04,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:04,666 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 06:09:04,666 INFO L433 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-01-21 06:09:04,666 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 06:09:04,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 06:09:04,666 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:04,666 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:04,666 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:04,666 INFO L82 PathProgramCache]: Analyzing trace with hash 744723691, now seen corresponding path program 27 times [2018-01-21 06:09:04,667 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:04,667 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:04,667 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:04,667 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:04,667 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:04,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:04,675 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:05,011 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:05,011 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:05,011 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:05,012 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:05,012 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:05,012 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:05,012 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:05,016 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:09:05,017 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:09:05,023 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:05,024 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:05,025 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:05,026 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:05,027 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:05,028 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:05,029 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:05,030 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:05,031 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:05,032 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:05,033 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:05,034 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:05,036 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:05,037 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:05,038 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:05,038 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:05,040 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:05,316 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:05,317 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:06,224 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:06,244 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:06,244 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:06,247 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:09:06,247 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:09:06,258 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:06,266 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:06,274 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:06,282 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:06,291 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:06,300 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:06,310 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:06,320 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:06,330 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:06,341 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:06,352 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:06,364 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:06,376 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:06,388 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:06,401 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:06,410 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:06,414 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:06,420 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:06,420 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:06,638 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:06,639 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:06,639 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 89 [2018-01-21 06:09:06,639 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:06,639 INFO L409 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-01-21 06:09:06,639 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-01-21 06:09:06,640 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2710, Invalid=5122, Unknown=0, NotChecked=0, Total=7832 [2018-01-21 06:09:06,645 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 60 states. [2018-01-21 06:09:06,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:06,704 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 06:09:06,704 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 06:09:06,704 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 44 [2018-01-21 06:09:06,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:06,705 INFO L225 Difference]: With dead ends: 55 [2018-01-21 06:09:06,705 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 06:09:06,705 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 116 SyntacticMatches, 2 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3708 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2771, Invalid=5239, Unknown=0, NotChecked=0, Total=8010 [2018-01-21 06:09:06,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 06:09:06,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 06:09:06,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 06:09:06,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 06:09:06,707 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 06:09:06,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:06,708 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 06:09:06,708 INFO L433 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-01-21 06:09:06,708 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 06:09:06,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 06:09:06,709 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:06,709 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:06,709 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:06,709 INFO L82 PathProgramCache]: Analyzing trace with hash 209622800, now seen corresponding path program 28 times [2018-01-21 06:09:06,709 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:06,710 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:06,710 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:06,710 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:06,710 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:06,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:06,721 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:07,110 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:07,110 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:07,110 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:07,110 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:07,110 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:07,110 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:07,111 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:07,118 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:09:07,118 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:09:07,132 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:07,134 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:07,426 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:07,427 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:08,390 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:08,410 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:08,410 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:08,413 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:09:08,414 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:09:08,452 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:08,456 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:08,462 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:08,462 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:08,686 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:08,687 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:08,688 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 92 [2018-01-21 06:09:08,688 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:08,688 INFO L409 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-01-21 06:09:08,688 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-01-21 06:09:08,689 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2895, Invalid=5477, Unknown=0, NotChecked=0, Total=8372 [2018-01-21 06:09:08,689 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 62 states. [2018-01-21 06:09:08,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:08,750 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 06:09:08,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 06:09:08,751 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 45 [2018-01-21 06:09:08,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:08,751 INFO L225 Difference]: With dead ends: 56 [2018-01-21 06:09:08,751 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 06:09:08,752 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 118 SyntacticMatches, 2 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4012 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2958, Invalid=5598, Unknown=0, NotChecked=0, Total=8556 [2018-01-21 06:09:08,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 06:09:08,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 06:09:08,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 06:09:08,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 06:09:08,754 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 06:09:08,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:08,754 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 06:09:08,754 INFO L433 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-01-21 06:09:08,754 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 06:09:08,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 06:09:08,754 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:08,754 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:08,754 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:08,755 INFO L82 PathProgramCache]: Analyzing trace with hash 801364363, now seen corresponding path program 29 times [2018-01-21 06:09:08,755 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:08,755 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:08,755 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:08,755 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:08,755 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:08,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:08,763 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:09,258 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:09,259 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:09,259 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:09,259 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:09,259 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:09,259 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:09,259 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:09,266 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:09:09,266 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:09,270 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:09,274 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:09,275 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:09,276 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:09,277 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:09,278 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:09,279 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:09,280 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:09,281 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:09,283 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:09,284 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:09,285 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:09,286 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:09,287 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:09,289 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:09,293 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:09,295 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:09,297 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:09,617 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:09,617 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:10,627 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:10,647 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:10,647 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:10,650 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:09:10,650 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:10,656 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:10,658 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:10,663 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:10,669 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:10,675 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:10,682 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:10,688 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:10,694 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:10,700 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:10,706 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:10,713 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:10,721 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:10,729 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:10,737 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:10,746 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:10,760 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:10,772 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:10,776 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:10,782 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:10,783 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:11,063 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:11,064 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:11,064 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 95 [2018-01-21 06:09:11,064 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:11,064 INFO L409 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-01-21 06:09:11,065 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-01-21 06:09:11,065 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3086, Invalid=5844, Unknown=0, NotChecked=0, Total=8930 [2018-01-21 06:09:11,065 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 64 states. [2018-01-21 06:09:11,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:11,136 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 06:09:11,137 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 06:09:11,137 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 46 [2018-01-21 06:09:11,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:11,137 INFO L225 Difference]: With dead ends: 57 [2018-01-21 06:09:11,137 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 06:09:11,138 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4328 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=3151, Invalid=5969, Unknown=0, NotChecked=0, Total=9120 [2018-01-21 06:09:11,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 06:09:11,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 06:09:11,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 06:09:11,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 06:09:11,141 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 06:09:11,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:11,141 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 06:09:11,141 INFO L433 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-01-21 06:09:11,141 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 06:09:11,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 06:09:11,142 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:11,142 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:11,142 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:11,142 INFO L82 PathProgramCache]: Analyzing trace with hash 1965483632, now seen corresponding path program 30 times [2018-01-21 06:09:11,142 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:11,143 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:11,143 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:11,143 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:11,143 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:11,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:11,151 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:11,534 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:11,534 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:11,534 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:11,534 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:11,534 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:11,534 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:11,535 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:11,539 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:09:11,539 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:09:11,546 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:11,548 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:11,549 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:11,549 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:11,550 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:11,551 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:11,552 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:11,553 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:11,554 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:11,555 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:11,557 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:11,558 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:11,559 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:11,560 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:11,561 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:11,562 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:11,563 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:11,564 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:11,950 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:11,950 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:12,991 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:13,010 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:13,010 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:13,013 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:09:13,013 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:09:13,022 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:13,028 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:13,036 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:13,045 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:13,053 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:13,062 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:13,072 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:13,082 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:13,092 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:13,103 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:13,114 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:13,125 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:13,137 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:13,150 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:13,162 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:13,176 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:13,186 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:13,190 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:13,196 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:13,196 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:13,466 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:13,467 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:13,467 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 98 [2018-01-21 06:09:13,467 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:13,467 INFO L409 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-01-21 06:09:13,467 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-01-21 06:09:13,468 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3283, Invalid=6223, Unknown=0, NotChecked=0, Total=9506 [2018-01-21 06:09:13,468 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 66 states. [2018-01-21 06:09:13,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:13,524 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 06:09:13,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 06:09:13,525 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 47 [2018-01-21 06:09:13,525 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:13,525 INFO L225 Difference]: With dead ends: 58 [2018-01-21 06:09:13,525 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 06:09:13,526 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 122 SyntacticMatches, 2 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4656 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=3350, Invalid=6352, Unknown=0, NotChecked=0, Total=9702 [2018-01-21 06:09:13,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 06:09:13,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 06:09:13,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 06:09:13,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 06:09:13,528 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 06:09:13,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:13,528 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 06:09:13,528 INFO L433 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-01-21 06:09:13,528 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 06:09:13,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 06:09:13,528 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:13,529 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:13,529 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:13,529 INFO L82 PathProgramCache]: Analyzing trace with hash -601524693, now seen corresponding path program 31 times [2018-01-21 06:09:13,529 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:13,529 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:13,529 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:13,530 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:13,530 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:13,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:13,537 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:13,930 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:13,931 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:13,931 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:13,931 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:13,931 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:13,931 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:13,931 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:13,936 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:13,936 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:09:13,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:13,952 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:14,463 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:14,463 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:15,599 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:15,619 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:15,619 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:15,622 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:15,623 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 06:09:15,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:15,657 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:15,664 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:15,664 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:15,925 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:15,926 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:15,927 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 101 [2018-01-21 06:09:15,927 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:15,927 INFO L409 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-01-21 06:09:15,927 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-01-21 06:09:15,928 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3486, Invalid=6614, Unknown=0, NotChecked=0, Total=10100 [2018-01-21 06:09:15,928 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 68 states. [2018-01-21 06:09:16,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:16,010 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 06:09:16,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 06:09:16,010 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 48 [2018-01-21 06:09:16,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:16,011 INFO L225 Difference]: With dead ends: 59 [2018-01-21 06:09:16,011 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 06:09:16,011 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 124 SyntacticMatches, 2 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4996 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=3555, Invalid=6747, Unknown=0, NotChecked=0, Total=10302 [2018-01-21 06:09:16,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 06:09:16,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 06:09:16,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 06:09:16,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 06:09:16,013 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 06:09:16,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:16,014 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 06:09:16,014 INFO L433 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-01-21 06:09:16,014 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 06:09:16,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 06:09:16,014 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:16,014 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:16,014 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:16,015 INFO L82 PathProgramCache]: Analyzing trace with hash 1425595856, now seen corresponding path program 32 times [2018-01-21 06:09:16,015 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:16,015 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:16,016 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 06:09:16,016 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:16,016 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:16,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:16,029 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:16,468 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:16,468 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:16,468 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:16,468 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:16,468 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:16,469 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:16,469 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:16,474 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:09:16,474 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:16,480 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:16,486 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:16,488 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:16,489 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:16,849 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:16,849 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:18,007 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:18,027 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:18,027 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:18,030 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 06:09:18,030 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:18,040 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:18,054 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:18,068 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:18,071 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:18,078 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:18,078 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:18,352 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:18,353 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:18,353 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 104 [2018-01-21 06:09:18,353 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:18,354 INFO L409 AbstractCegarLoop]: Interpolant automaton has 70 states [2018-01-21 06:09:18,354 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2018-01-21 06:09:18,355 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3695, Invalid=7017, Unknown=0, NotChecked=0, Total=10712 [2018-01-21 06:09:18,355 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 70 states. [2018-01-21 06:09:18,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:18,487 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 06:09:18,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 06:09:18,488 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 49 [2018-01-21 06:09:18,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:18,488 INFO L225 Difference]: With dead ends: 60 [2018-01-21 06:09:18,488 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 06:09:18,489 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 126 SyntacticMatches, 2 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5348 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=3766, Invalid=7154, Unknown=0, NotChecked=0, Total=10920 [2018-01-21 06:09:18,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 06:09:18,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 06:09:18,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 06:09:18,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 06:09:18,492 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 06:09:18,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:18,492 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 06:09:18,492 INFO L433 AbstractCegarLoop]: Interpolant automaton has 70 states. [2018-01-21 06:09:18,492 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 06:09:18,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 06:09:18,493 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:18,493 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:18,493 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:18,493 INFO L82 PathProgramCache]: Analyzing trace with hash -158176565, now seen corresponding path program 33 times [2018-01-21 06:09:18,493 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:18,494 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:18,494 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:18,494 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:18,494 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:18,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:18,503 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:19,011 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:19,011 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:19,011 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:19,011 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:19,011 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:19,012 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:19,012 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:19,017 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:09:19,017 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:09:19,024 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,025 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,026 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,027 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,028 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,029 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,030 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,031 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,032 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,033 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,034 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,035 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,037 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,038 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,039 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,040 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,041 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,042 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:19,043 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:19,044 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:19,429 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:19,429 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:20,637 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:20,656 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:20,656 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:20,659 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 06:09:20,659 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 06:09:20,669 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,675 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,682 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,690 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,698 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,707 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,717 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,726 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,736 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,747 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,758 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,769 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,781 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,794 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,806 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,819 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,833 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,847 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 06:09:20,858 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:20,861 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:20,868 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:20,868 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:21,147 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:21,148 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:21,148 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 107 [2018-01-21 06:09:21,148 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:21,148 INFO L409 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-01-21 06:09:21,149 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-01-21 06:09:21,149 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3910, Invalid=7432, Unknown=0, NotChecked=0, Total=11342 [2018-01-21 06:09:21,149 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 72 states. [2018-01-21 06:09:21,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:21,222 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 06:09:21,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 06:09:21,222 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 50 [2018-01-21 06:09:21,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:21,223 INFO L225 Difference]: With dead ends: 61 [2018-01-21 06:09:21,223 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 06:09:21,223 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 128 SyntacticMatches, 2 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5712 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=3983, Invalid=7573, Unknown=0, NotChecked=0, Total=11556 [2018-01-21 06:09:21,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 06:09:21,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 06:09:21,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 06:09:21,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 06:09:21,226 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 06:09:21,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:21,226 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 06:09:21,226 INFO L433 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-01-21 06:09:21,226 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 06:09:21,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 06:09:21,226 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:21,226 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:21,227 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:21,227 INFO L82 PathProgramCache]: Analyzing trace with hash -2010481360, now seen corresponding path program 34 times [2018-01-21 06:09:21,227 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:21,227 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:21,227 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:21,227 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:21,227 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:21,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:21,236 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:21,785 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:21,785 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:21,785 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:21,786 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:21,786 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:21,786 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:21,786 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:21,791 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:09:21,791 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:09:21,805 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:21,807 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:22,214 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:22,214 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:23,477 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:23,497 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:23,497 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:23,500 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 06:09:23,500 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 06:09:23,542 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:23,546 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:23,553 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:23,553 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:23,848 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:23,850 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:23,850 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 110 [2018-01-21 06:09:23,850 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:23,850 INFO L409 AbstractCegarLoop]: Interpolant automaton has 74 states [2018-01-21 06:09:23,850 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2018-01-21 06:09:23,851 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4131, Invalid=7859, Unknown=0, NotChecked=0, Total=11990 [2018-01-21 06:09:23,851 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 74 states. [2018-01-21 06:09:23,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:23,965 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 06:09:23,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 06:09:23,965 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 51 [2018-01-21 06:09:23,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:23,966 INFO L225 Difference]: With dead ends: 62 [2018-01-21 06:09:23,966 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 06:09:23,966 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 130 SyntacticMatches, 2 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6088 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=4206, Invalid=8004, Unknown=0, NotChecked=0, Total=12210 [2018-01-21 06:09:23,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 06:09:23,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 06:09:23,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 06:09:23,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 06:09:23,969 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 06:09:23,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:23,969 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 06:09:23,969 INFO L433 AbstractCegarLoop]: Interpolant automaton has 74 states. [2018-01-21 06:09:23,969 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 06:09:23,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 06:09:23,969 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:23,969 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:23,969 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:23,970 INFO L82 PathProgramCache]: Analyzing trace with hash 697612139, now seen corresponding path program 35 times [2018-01-21 06:09:23,970 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:23,970 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:23,970 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:23,970 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:23,971 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:23,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:23,980 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:24,579 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:24,579 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:24,580 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:24,580 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:24,580 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:24,580 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:24,580 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:24,586 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:09:24,586 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:24,591 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,592 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,595 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,596 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,597 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,598 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,599 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,600 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,601 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,602 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,603 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,604 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,605 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,606 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,607 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,608 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,609 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,610 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,614 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:24,615 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:24,617 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:25,087 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:25,087 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:26,394 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:26,414 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:26,414 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:26,416 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 06:09:26,416 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 06:09:26,421 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,423 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,426 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,430 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,434 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,438 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,443 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,448 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,453 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,459 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,466 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,472 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,480 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,488 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,497 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,505 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,514 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,524 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,539 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 06:09:26,551 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:26,555 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:26,563 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:26,563 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:26,868 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:26,869 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:26,869 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 113 [2018-01-21 06:09:26,869 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:26,870 INFO L409 AbstractCegarLoop]: Interpolant automaton has 76 states [2018-01-21 06:09:26,870 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2018-01-21 06:09:26,871 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4358, Invalid=8298, Unknown=0, NotChecked=0, Total=12656 [2018-01-21 06:09:26,871 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 76 states. [2018-01-21 06:09:26,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:26,946 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-21 06:09:26,947 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-21 06:09:26,947 INFO L78 Accepts]: Start accepts. Automaton has 76 states. Word has length 52 [2018-01-21 06:09:26,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:26,948 INFO L225 Difference]: With dead ends: 63 [2018-01-21 06:09:26,948 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 06:09:26,949 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 246 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6476 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=4435, Invalid=8447, Unknown=0, NotChecked=0, Total=12882 [2018-01-21 06:09:26,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 06:09:26,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 06:09:26,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 06:09:26,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-21 06:09:26,951 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-21 06:09:26,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:26,952 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-21 06:09:26,952 INFO L433 AbstractCegarLoop]: Interpolant automaton has 76 states. [2018-01-21 06:09:26,952 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-21 06:09:26,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 06:09:26,952 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:26,952 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:26,952 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:26,952 INFO L82 PathProgramCache]: Analyzing trace with hash -1250835312, now seen corresponding path program 36 times [2018-01-21 06:09:26,953 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:26,953 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:26,953 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:26,953 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:26,954 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:26,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:26,962 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 06:09:27,502 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:27,503 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:27,503 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 06:09:27,503 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 06:09:27,503 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 06:09:27,503 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:27,503 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 06:09:27,508 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:09:27,508 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:09:27,515 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,517 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,518 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,519 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,520 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,521 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,522 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,523 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,524 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,525 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,526 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,527 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,528 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,530 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,531 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,532 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,533 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,535 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,536 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:27,536 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:27,538 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:27,985 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:27,985 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:29,355 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:29,374 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 06:09:29,374 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 06:09:29,377 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 06:09:29,377 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 06:09:29,394 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,405 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,417 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,430 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,444 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,459 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,474 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,491 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,508 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,525 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,544 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,563 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,575 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,588 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,602 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,617 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,631 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,646 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,660 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 06:09:29,673 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 06:09:29,676 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 06:09:29,683 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:29,683 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 06:09:29,989 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 06:09:29,990 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 06:09:29,991 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 116 [2018-01-21 06:09:29,991 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 06:09:29,991 INFO L409 AbstractCegarLoop]: Interpolant automaton has 78 states [2018-01-21 06:09:29,991 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2018-01-21 06:09:29,992 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4591, Invalid=8749, Unknown=0, NotChecked=0, Total=13340 [2018-01-21 06:09:29,992 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 78 states. [2018-01-21 06:09:30,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 06:09:30,066 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-21 06:09:30,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-21 06:09:30,066 INFO L78 Accepts]: Start accepts. Automaton has 78 states. Word has length 53 [2018-01-21 06:09:30,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 06:09:30,067 INFO L225 Difference]: With dead ends: 64 [2018-01-21 06:09:30,067 INFO L226 Difference]: Without dead ends: 55 [2018-01-21 06:09:30,067 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 115 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6876 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=4670, Invalid=8902, Unknown=0, NotChecked=0, Total=13572 [2018-01-21 06:09:30,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-21 06:09:30,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-21 06:09:30,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-21 06:09:30,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-21 06:09:30,071 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-21 06:09:30,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 06:09:30,071 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-21 06:09:30,071 INFO L433 AbstractCegarLoop]: Interpolant automaton has 78 states. [2018-01-21 06:09:30,071 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-21 06:09:30,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-21 06:09:30,072 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 06:09:30,072 INFO L322 BasicCegarLoop]: trace histogram [37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 06:09:30,072 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 06:09:30,072 INFO L82 PathProgramCache]: Analyzing trace with hash -1523164149, now seen corresponding path program 37 times [2018-01-21 06:09:30,072 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 06:09:30,073 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:30,073 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 06:09:30,073 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 06:09:30,073 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 06:09:30,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 06:09:30,084 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. Received shutdown request... [2018-01-21 06:09:30,174 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 06:09:30,176 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 06:09:30,177 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 06:09:30,177 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 06:09:30,177 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 06:09:30,177 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 06:09:30,177 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 06:09:30,177 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 06:09:30,177 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 06:09:30,177 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 06:09:30,178 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 06:09:30,178 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 06:09:30,179 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 06:09:30 BoogieIcfgContainer [2018-01-21 06:09:30,179 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 06:09:30,180 INFO L168 Benchmark]: Toolchain (without parser) took 54925.43 ms. Allocated memory was 308.3 MB in the beginning and 819.5 MB in the end (delta: 511.2 MB). Free memory was 267.6 MB in the beginning and 517.4 MB in the end (delta: -249.8 MB). Peak memory consumption was 261.4 MB. Max. memory is 5.3 GB. [2018-01-21 06:09:30,180 INFO L168 Benchmark]: CDTParser took 0.26 ms. Allocated memory is still 308.3 MB. Free memory is still 272.6 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 06:09:30,181 INFO L168 Benchmark]: CACSL2BoogieTranslator took 183.63 ms. Allocated memory is still 308.3 MB. Free memory was 266.6 MB in the beginning and 259.4 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. [2018-01-21 06:09:30,181 INFO L168 Benchmark]: Boogie Preprocessor took 27.38 ms. Allocated memory is still 308.3 MB. Free memory was 259.4 MB in the beginning and 257.5 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-21 06:09:30,181 INFO L168 Benchmark]: RCFGBuilder took 165.26 ms. Allocated memory is still 308.3 MB. Free memory was 257.5 MB in the beginning and 245.9 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. [2018-01-21 06:09:30,182 INFO L168 Benchmark]: TraceAbstraction took 54541.21 ms. Allocated memory was 308.3 MB in the beginning and 819.5 MB in the end (delta: 511.2 MB). Free memory was 245.9 MB in the beginning and 517.4 MB in the end (delta: -271.5 MB). Peak memory consumption was 239.6 MB. Max. memory is 5.3 GB. [2018-01-21 06:09:30,183 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.26 ms. Allocated memory is still 308.3 MB. Free memory is still 272.6 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 183.63 ms. Allocated memory is still 308.3 MB. Free memory was 266.6 MB in the beginning and 259.4 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 27.38 ms. Allocated memory is still 308.3 MB. Free memory was 259.4 MB in the beginning and 257.5 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 165.26 ms. Allocated memory is still 308.3 MB. Free memory was 257.5 MB in the beginning and 245.9 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 54541.21 ms. Allocated memory was 308.3 MB in the beginning and 819.5 MB in the end (delta: 511.2 MB). Free memory was 245.9 MB in the beginning and 517.4 MB in the end (delta: -271.5 MB). Peak memory consumption was 239.6 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 17 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 102 LocStat_NO_SUPPORTING_DISEQUALITIES : 23 LocStat_NO_DISJUNCTIONS : -34 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 24 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 33 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 24 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.147975 RENAME_VARIABLES(MILLISECONDS) : 0.061729 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.111250 PROJECTAWAY(MILLISECONDS) : 0.053080 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.238752 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.086822 ADD_EQUALITY(MILLISECONDS) : 0.042922 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.010509 #CONJOIN_DISJUNCTIVE : 32 #RENAME_VARIABLES : 62 #UNFREEZE : 0 #CONJOIN : 62 #PROJECTAWAY : 64 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 62 #ADD_EQUALITY : 33 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 55 with TraceHistMax 37, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateComparison was comparing new predicate (quantifier-free) to 8 known predicates. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 54.3s OverallTime, 38 OverallIterations, 37 TraceHistogramMax, 2.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 595 SDtfs, 117 SDslu, 12907 SDs, 0 SdLazy, 2847 SolverSat, 135 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 5891 GetRequests, 3566 SyntacticMatches, 72 SemanticMatches, 2253 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 83344 ImplicationChecksByTransitivity, 33.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=55occurred in iteration=37, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.8s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 37 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 3.1s SatisfiabilityAnalysisTime, 46.0s InterpolantComputationTime, 3851 NumberOfCodeBlocks, 3851 NumberOfCodeBlocksAsserted, 499 NumberOfCheckSat, 6226 ConstructedInterpolants, 0 QuantifiedInterpolants, 1009008 SizeOfPredicates, 72 NumberOfNonLiveVariables, 8388 ConjunctsInSsa, 1548 ConjunctsInUnsatCore, 181 InterpolantComputations, 1 PerfectInterpolantSequences, 0/42180 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 20]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 20). Cancelled while IsEmpty was searching accepting run (input had 21 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_06-09-30-192.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_06-09-30-192.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_06-09-30-192.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_06-09-30-192.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_06-09-30-192.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_precise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_06-09-30-192.csv Completed graceful shutdown