java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero3_false-valid-deref-write.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 10:31:34,150 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 10:31:34,152 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 10:31:34,167 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 10:31:34,167 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 10:31:34,168 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 10:31:34,169 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 10:31:34,171 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 10:31:34,173 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 10:31:34,173 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 10:31:34,174 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 10:31:34,174 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 10:31:34,175 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 10:31:34,176 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 10:31:34,177 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 10:31:34,180 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 10:31:34,182 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 10:31:34,184 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 10:31:34,186 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 10:31:34,187 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 10:31:34,189 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-21 10:31:34,195 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 10:31:34,195 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 10:31:34,196 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf [2018-01-21 10:31:34,205 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 10:31:34,205 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 10:31:34,206 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 10:31:34,206 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 10:31:34,207 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 10:31:34,207 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 10:31:34,207 INFO L133 SettingsManager]: * Precise comparison operator=true [2018-01-21 10:31:34,207 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 10:31:34,208 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 10:31:34,208 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 10:31:34,208 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 10:31:34,209 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 10:31:34,209 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 10:31:34,209 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 10:31:34,209 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 10:31:34,209 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 10:31:34,209 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 10:31:34,210 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 10:31:34,210 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 10:31:34,210 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 10:31:34,210 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 10:31:34,211 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 10:31:34,211 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 10:31:34,211 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 10:31:34,211 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 10:31:34,211 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 10:31:34,212 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 10:31:34,212 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 10:31:34,212 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 10:31:34,212 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 10:31:34,212 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 10:31:34,213 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 10:31:34,213 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 10:31:34,213 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 10:31:34,213 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 10:31:34,213 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 10:31:34,214 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 10:31:34,215 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 10:31:34,215 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 10:31:34,251 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 10:31:34,264 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 10:31:34,268 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 10:31:34,269 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 10:31:34,270 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 10:31:34,271 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero3_false-valid-deref-write.c [2018-01-21 10:31:34,396 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 10:31:34,401 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 10:31:34,402 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 10:31:34,402 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 10:31:34,408 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 10:31:34,409 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 10:31:34" (1/1) ... [2018-01-21 10:31:34,413 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@31c08721 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:34, skipping insertion in model container [2018-01-21 10:31:34,413 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 10:31:34" (1/1) ... [2018-01-21 10:31:34,431 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 10:31:34,450 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 10:31:34,558 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 10:31:34,573 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 10:31:34,579 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:34 WrapperNode [2018-01-21 10:31:34,579 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 10:31:34,580 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 10:31:34,580 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 10:31:34,580 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 10:31:34,597 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:34" (1/1) ... [2018-01-21 10:31:34,598 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:34" (1/1) ... [2018-01-21 10:31:34,607 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:34" (1/1) ... [2018-01-21 10:31:34,607 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:34" (1/1) ... [2018-01-21 10:31:34,609 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:34" (1/1) ... [2018-01-21 10:31:34,611 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:34" (1/1) ... [2018-01-21 10:31:34,612 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:34" (1/1) ... [2018-01-21 10:31:34,613 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 10:31:34,613 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 10:31:34,614 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 10:31:34,614 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 10:31:34,615 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:34" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 10:31:34,668 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 10:31:34,668 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 10:31:34,668 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 10:31:34,668 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 10:31:34,668 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 10:31:34,669 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 10:31:34,669 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 10:31:34,669 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 10:31:34,669 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 10:31:34,669 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 10:31:34,669 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 10:31:34,669 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 10:31:34,802 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 10:31:34,802 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 10:31:34 BoogieIcfgContainer [2018-01-21 10:31:34,803 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 10:31:34,803 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 10:31:34,804 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 10:31:34,806 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 10:31:34,806 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 10:31:34" (1/3) ... [2018-01-21 10:31:34,808 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@78cf0040 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 10:31:34, skipping insertion in model container [2018-01-21 10:31:34,808 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:34" (2/3) ... [2018-01-21 10:31:34,808 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@78cf0040 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 10:31:34, skipping insertion in model container [2018-01-21 10:31:34,809 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 10:31:34" (3/3) ... [2018-01-21 10:31:34,811 INFO L105 eAbstractionObserver]: Analyzing ICFG memsetNonZero3_false-valid-deref-write.c [2018-01-21 10:31:34,820 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 10:31:34,828 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 10:31:34,877 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 10:31:34,878 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 10:31:34,878 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 10:31:34,878 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 10:31:34,878 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 10:31:34,878 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 10:31:34,878 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 10:31:34,878 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 10:31:34,879 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 10:31:34,899 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-21 10:31:34,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 10:31:34,905 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:34,906 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 10:31:34,906 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 10:31:34,910 INFO L82 PathProgramCache]: Analyzing trace with hash 51896, now seen corresponding path program 1 times [2018-01-21 10:31:34,912 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:34,953 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:34,953 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:34,953 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:34,954 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:34,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 10:31:34,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 10:31:35,012 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 10:31:35,019 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 10:31:35,025 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 10:31:35,025 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 10:31:35,025 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 10:31:35,025 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 10:31:35,025 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 10:31:35,025 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 10:31:35,025 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 10:31:35,026 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 10:31:35,026 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 10:31:35,027 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-21 10:31:35,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 10:31:35,028 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:35,028 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:35,029 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:35,029 INFO L82 PathProgramCache]: Analyzing trace with hash 126067280, now seen corresponding path program 1 times [2018-01-21 10:31:35,029 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:35,030 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:35,031 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:35,031 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:35,031 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:35,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:35,066 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:35,141 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:35,143 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 10:31:35,143 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 10:31:35,144 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 10:31:35,146 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 10:31:35,162 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 10:31:35,163 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 10:31:35,166 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 4 states. [2018-01-21 10:31:35,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:35,216 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 10:31:35,217 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 10:31:35,218 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2018-01-21 10:31:35,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:35,229 INFO L225 Difference]: With dead ends: 34 [2018-01-21 10:31:35,229 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 10:31:35,299 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 10:31:35,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 10:31:35,328 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 10:31:35,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 10:31:35,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 10:31:35,331 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 10:31:35,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:35,331 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 10:31:35,331 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 10:31:35,331 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 10:31:35,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 10:31:35,332 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:35,332 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:35,332 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:35,332 INFO L82 PathProgramCache]: Analyzing trace with hash 763300235, now seen corresponding path program 1 times [2018-01-21 10:31:35,332 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:35,333 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:35,333 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:35,334 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:35,334 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:35,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:35,345 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:35,407 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:35,407 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:35,407 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:35,409 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 20 with the following transitions: [2018-01-21 10:31:35,411 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [16], [18], [19], [20], [21], [23], [24], [25], [26], [27], [28] [2018-01-21 10:31:35,456 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 10:31:35,457 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 10:31:35,752 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 10:31:35,754 INFO L268 AbstractInterpreter]: Visited 19 different actions 23 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 10:31:35,767 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 10:31:35,768 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:35,768 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:35,784 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:35,784 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:35,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:35,813 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:35,839 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:35,840 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:36,042 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,064 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:36,064 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:36,068 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:36,068 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:36,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:36,095 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:36,099 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,100 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:36,218 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,219 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:36,219 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-21 10:31:36,219 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:36,220 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-21 10:31:36,221 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-21 10:31:36,221 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-21 10:31:36,222 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 6 states. [2018-01-21 10:31:36,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:36,282 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 10:31:36,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 10:31:36,282 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-21 10:31:36,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:36,284 INFO L225 Difference]: With dead ends: 30 [2018-01-21 10:31:36,284 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 10:31:36,285 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 70 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-21 10:31:36,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 10:31:36,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 10:31:36,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 10:31:36,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 10:31:36,290 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 10:31:36,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:36,290 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 10:31:36,290 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-21 10:31:36,290 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 10:31:36,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 10:31:36,291 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:36,291 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:36,291 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:36,292 INFO L82 PathProgramCache]: Analyzing trace with hash -957314640, now seen corresponding path program 2 times [2018-01-21 10:31:36,292 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:36,293 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:36,293 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:36,293 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:36,293 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:36,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:36,308 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:36,399 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,399 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:36,400 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:36,400 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:36,400 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:36,400 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:36,400 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:36,413 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:36,413 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:36,427 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:36,439 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:36,452 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:36,454 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:36,507 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,507 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:36,607 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,628 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:36,628 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:36,631 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:36,631 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:36,650 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:36,661 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:36,667 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:36,670 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:36,674 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,675 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:36,773 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,775 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:36,776 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-21 10:31:36,776 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:36,776 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-21 10:31:36,777 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-21 10:31:36,777 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-21 10:31:36,777 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 7 states. [2018-01-21 10:31:36,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:36,824 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 10:31:36,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 10:31:36,825 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 20 [2018-01-21 10:31:36,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:36,825 INFO L225 Difference]: With dead ends: 31 [2018-01-21 10:31:36,826 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 10:31:36,826 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 73 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-21 10:31:36,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 10:31:36,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 10:31:36,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 10:31:36,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 10:31:36,829 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 10:31:36,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:36,829 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 10:31:36,830 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-21 10:31:36,830 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 10:31:36,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 10:31:36,830 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:36,830 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:36,830 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:36,831 INFO L82 PathProgramCache]: Analyzing trace with hash 1538199083, now seen corresponding path program 3 times [2018-01-21 10:31:36,831 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:36,832 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:36,832 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:36,832 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:36,832 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:36,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:36,842 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:36,895 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,895 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:36,895 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:36,896 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:36,896 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:36,896 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:36,896 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:36,909 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:36,909 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:36,925 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:36,928 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:36,929 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:36,929 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:36,931 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:36,951 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,951 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:37,072 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,092 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:37,092 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:37,095 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:37,096 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:37,111 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:37,118 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:37,126 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:37,131 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:37,135 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:37,140 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,140 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:37,208 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,210 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:37,210 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-21 10:31:37,210 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:37,211 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 10:31:37,211 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 10:31:37,211 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-21 10:31:37,211 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 8 states. [2018-01-21 10:31:37,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:37,237 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 10:31:37,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 10:31:37,238 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-01-21 10:31:37,238 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:37,238 INFO L225 Difference]: With dead ends: 32 [2018-01-21 10:31:37,238 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 10:31:37,239 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-21 10:31:37,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 10:31:37,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 10:31:37,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 10:31:37,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 10:31:37,243 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 10:31:37,243 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:37,243 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 10:31:37,243 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 10:31:37,243 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 10:31:37,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 10:31:37,244 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:37,244 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:37,244 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:37,245 INFO L82 PathProgramCache]: Analyzing trace with hash 1589713168, now seen corresponding path program 4 times [2018-01-21 10:31:37,245 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:37,246 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:37,246 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:37,246 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:37,246 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:37,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:37,258 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:37,306 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,306 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:37,307 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:37,307 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:37,307 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:37,307 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:37,307 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:37,312 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:37,312 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:37,322 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:37,324 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:37,331 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,331 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:37,426 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,446 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:37,446 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:37,449 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:37,449 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:37,472 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:37,475 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:37,479 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,479 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:37,544 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,546 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:37,546 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-21 10:31:37,547 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:37,547 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-21 10:31:37,547 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-21 10:31:37,548 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-21 10:31:37,548 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 9 states. [2018-01-21 10:31:37,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:37,598 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 10:31:37,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 10:31:37,599 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 22 [2018-01-21 10:31:37,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:37,599 INFO L225 Difference]: With dead ends: 33 [2018-01-21 10:31:37,599 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 10:31:37,600 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 79 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-21 10:31:37,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 10:31:37,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 10:31:37,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 10:31:37,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 10:31:37,602 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 10:31:37,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:37,603 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 10:31:37,603 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-21 10:31:37,603 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 10:31:37,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 10:31:37,603 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:37,603 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:37,604 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:37,604 INFO L82 PathProgramCache]: Analyzing trace with hash -1108317493, now seen corresponding path program 5 times [2018-01-21 10:31:37,604 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:37,604 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:37,605 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:37,605 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:37,605 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:37,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:37,616 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:37,667 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,667 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:37,667 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:37,667 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:37,667 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:37,667 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:37,667 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:37,673 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:31:37,674 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:37,680 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,681 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,682 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,688 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,689 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:37,691 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:37,714 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,714 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:37,854 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,874 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:37,874 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:37,878 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:31:37,878 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:37,882 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,884 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,889 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,899 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,906 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:37,908 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:37,912 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,913 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:37,965 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,967 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:37,967 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-21 10:31:37,967 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:37,968 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 10:31:37,968 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 10:31:37,968 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-21 10:31:37,968 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 10 states. [2018-01-21 10:31:38,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:38,015 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 10:31:38,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 10:31:38,015 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 23 [2018-01-21 10:31:38,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:38,016 INFO L225 Difference]: With dead ends: 34 [2018-01-21 10:31:38,016 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 10:31:38,017 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 82 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-21 10:31:38,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 10:31:38,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 10:31:38,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 10:31:38,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 10:31:38,021 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 10:31:38,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:38,022 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 10:31:38,022 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 10:31:38,022 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 10:31:38,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 10:31:38,023 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:38,023 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:38,023 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:38,023 INFO L82 PathProgramCache]: Analyzing trace with hash 1152077936, now seen corresponding path program 6 times [2018-01-21 10:31:38,023 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:38,024 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:38,024 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:38,025 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:38,025 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:38,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:38,036 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:38,102 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:38,102 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:38,102 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:38,102 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:38,102 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:38,102 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:38,102 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:38,107 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:31:38,107 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:31:38,114 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,116 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,117 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,118 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,118 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:38,120 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:38,129 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:38,129 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:38,285 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:38,305 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:38,306 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:38,309 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:31:38,309 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:31:38,320 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,327 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,335 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,344 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,350 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:38,354 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:38,360 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:38,360 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:38,708 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:38,709 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:38,709 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-21 10:31:38,709 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:38,710 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-21 10:31:38,710 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-21 10:31:38,710 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-21 10:31:38,711 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 11 states. [2018-01-21 10:31:38,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:38,728 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 10:31:38,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 10:31:38,729 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 24 [2018-01-21 10:31:38,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:38,729 INFO L225 Difference]: With dead ends: 35 [2018-01-21 10:31:38,729 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 10:31:38,730 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 85 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-21 10:31:38,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 10:31:38,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 10:31:38,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 10:31:38,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 10:31:38,732 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 10:31:38,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:38,733 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 10:31:38,733 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-21 10:31:38,733 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 10:31:38,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 10:31:38,733 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:38,733 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:38,734 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:38,734 INFO L82 PathProgramCache]: Analyzing trace with hash -1790107797, now seen corresponding path program 7 times [2018-01-21 10:31:38,734 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:38,734 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:38,734 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:38,735 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:38,735 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:38,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:38,744 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:38,819 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:38,819 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:38,819 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:38,819 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:38,819 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:38,819 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:38,819 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:38,828 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:38,829 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:38,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:38,844 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:38,859 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:38,859 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:39,050 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:39,071 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:39,071 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:39,075 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:39,075 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:39,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:39,095 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:39,101 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:39,101 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:39,159 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:39,160 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:39,160 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-21 10:31:39,161 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:39,161 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 10:31:39,161 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 10:31:39,161 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-21 10:31:39,161 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 12 states. [2018-01-21 10:31:39,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:39,187 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 10:31:39,187 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 10:31:39,187 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 25 [2018-01-21 10:31:39,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:39,188 INFO L225 Difference]: With dead ends: 36 [2018-01-21 10:31:39,188 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 10:31:39,189 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 88 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-21 10:31:39,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 10:31:39,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 10:31:39,191 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 10:31:39,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 10:31:39,191 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 10:31:39,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:39,191 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 10:31:39,191 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 10:31:39,191 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 10:31:39,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 10:31:39,192 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:39,192 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:39,192 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:39,192 INFO L82 PathProgramCache]: Analyzing trace with hash 1491414992, now seen corresponding path program 8 times [2018-01-21 10:31:39,192 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:39,193 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:39,193 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:39,193 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:39,193 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:39,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:39,201 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:39,267 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:39,267 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:39,268 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:39,268 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:39,268 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:39,268 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:39,268 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:39,280 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:39,281 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:39,288 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:39,291 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:39,292 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:39,294 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:39,304 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:39,304 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:39,494 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:39,515 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:39,515 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:39,518 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:39,518 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:39,529 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:39,538 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:39,545 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:39,548 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:39,553 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:39,553 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:39,634 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:39,636 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:39,636 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-21 10:31:39,636 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:39,637 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-21 10:31:39,637 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-21 10:31:39,638 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=233, Invalid=273, Unknown=0, NotChecked=0, Total=506 [2018-01-21 10:31:39,638 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 13 states. [2018-01-21 10:31:39,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:39,695 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 10:31:39,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 10:31:39,696 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 26 [2018-01-21 10:31:39,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:39,696 INFO L225 Difference]: With dead ends: 37 [2018-01-21 10:31:39,697 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 10:31:39,697 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 91 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=247, Invalid=305, Unknown=0, NotChecked=0, Total=552 [2018-01-21 10:31:39,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 10:31:39,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 10:31:39,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 10:31:39,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 10:31:39,701 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 10:31:39,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:39,702 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 10:31:39,702 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-21 10:31:39,702 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 10:31:39,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 10:31:39,702 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:39,703 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:39,703 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:39,703 INFO L82 PathProgramCache]: Analyzing trace with hash 139406347, now seen corresponding path program 9 times [2018-01-21 10:31:39,703 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:39,704 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:39,704 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:39,704 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:39,704 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:39,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:39,713 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:39,796 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:39,796 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:39,796 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:39,796 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:39,796 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:39,796 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:39,796 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:39,801 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:39,802 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:39,810 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:39,811 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:39,813 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:39,814 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:39,815 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:39,816 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:39,816 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:39,818 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:39,826 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:39,827 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:40,091 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:40,112 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:40,112 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:40,115 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:40,115 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:40,125 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:40,132 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:40,140 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:40,149 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:40,157 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:40,167 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:40,173 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:40,176 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:40,180 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:40,180 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:40,261 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:40,262 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:40,262 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-21 10:31:40,262 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:40,262 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 10:31:40,262 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 10:31:40,263 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=278, Invalid=322, Unknown=0, NotChecked=0, Total=600 [2018-01-21 10:31:40,263 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 14 states. [2018-01-21 10:31:40,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:40,287 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 10:31:40,287 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 10:31:40,287 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 27 [2018-01-21 10:31:40,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:40,288 INFO L225 Difference]: With dead ends: 38 [2018-01-21 10:31:40,288 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 10:31:40,288 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 94 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=293, Invalid=357, Unknown=0, NotChecked=0, Total=650 [2018-01-21 10:31:40,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 10:31:40,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 10:31:40,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 10:31:40,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 10:31:40,291 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 10:31:40,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:40,292 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 10:31:40,292 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 10:31:40,292 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 10:31:40,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 10:31:40,293 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:40,293 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:40,293 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:40,293 INFO L82 PathProgramCache]: Analyzing trace with hash 1176811312, now seen corresponding path program 10 times [2018-01-21 10:31:40,293 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:40,294 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:40,294 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:40,294 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:40,294 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:40,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:40,303 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:40,407 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:40,407 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:40,407 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:40,407 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:40,407 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:40,407 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:40,407 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:40,412 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:40,413 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:40,424 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:40,426 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:40,440 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:40,440 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:40,689 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:40,709 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:40,709 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:40,712 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:40,712 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:40,737 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:40,740 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:40,746 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:40,746 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:40,836 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:40,837 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:40,838 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-21 10:31:40,838 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:40,838 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-21 10:31:40,838 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-21 10:31:40,838 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=327, Invalid=375, Unknown=0, NotChecked=0, Total=702 [2018-01-21 10:31:40,839 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 15 states. [2018-01-21 10:31:40,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:40,866 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 10:31:40,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 10:31:40,866 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 28 [2018-01-21 10:31:40,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:40,867 INFO L225 Difference]: With dead ends: 39 [2018-01-21 10:31:40,867 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 10:31:40,867 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 97 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=343, Invalid=413, Unknown=0, NotChecked=0, Total=756 [2018-01-21 10:31:40,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 10:31:40,869 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 10:31:40,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 10:31:40,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 10:31:40,870 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 10:31:40,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:40,870 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 10:31:40,870 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-21 10:31:40,870 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 10:31:40,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 10:31:40,871 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:40,871 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:40,871 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:40,871 INFO L82 PathProgramCache]: Analyzing trace with hash -1023373141, now seen corresponding path program 11 times [2018-01-21 10:31:40,871 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:40,871 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:40,872 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:40,872 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:40,872 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:40,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:40,879 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:40,954 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:40,954 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:40,954 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:40,954 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:40,954 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:40,954 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:40,954 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:40,959 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:31:40,960 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:40,963 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:40,964 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:40,965 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:40,966 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:40,967 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:40,967 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:40,971 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:40,972 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:40,973 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:40,981 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:40,981 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:41,238 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:41,259 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:41,259 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:41,261 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:31:41,262 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:41,266 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:41,267 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:41,270 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:41,274 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:41,278 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:41,282 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:41,293 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:41,301 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:41,304 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:41,310 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:41,310 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:41,423 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:41,424 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:41,425 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-21 10:31:41,425 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:41,425 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 10:31:41,426 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 10:31:41,426 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=380, Invalid=432, Unknown=0, NotChecked=0, Total=812 [2018-01-21 10:31:41,426 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 16 states. [2018-01-21 10:31:41,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:41,466 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 10:31:41,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 10:31:41,502 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 29 [2018-01-21 10:31:41,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:41,502 INFO L225 Difference]: With dead ends: 40 [2018-01-21 10:31:41,503 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 10:31:41,503 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=397, Invalid=473, Unknown=0, NotChecked=0, Total=870 [2018-01-21 10:31:41,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 10:31:41,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 10:31:41,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 10:31:41,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 10:31:41,507 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 10:31:41,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:41,507 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 10:31:41,507 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 10:31:41,508 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 10:31:41,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 10:31:41,508 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:41,509 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:41,509 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:41,509 INFO L82 PathProgramCache]: Analyzing trace with hash -509614448, now seen corresponding path program 12 times [2018-01-21 10:31:41,509 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:41,510 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:41,510 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:41,510 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:41,510 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:41,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:41,519 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:41,621 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:41,621 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:41,621 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:41,621 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:41,621 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:41,621 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:41,622 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:41,626 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:31:41,627 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:31:41,634 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:41,636 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:41,637 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:41,639 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:41,640 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:41,641 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:41,643 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:41,643 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:41,645 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:41,655 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:41,655 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:41,957 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:41,978 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:41,978 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:41,981 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:31:41,981 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:31:41,991 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:41,998 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:42,006 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:42,015 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:42,024 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:42,035 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:42,045 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:42,052 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:42,056 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:42,060 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:42,060 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:42,148 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:42,150 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:42,150 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-21 10:31:42,150 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:42,150 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-21 10:31:42,151 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-21 10:31:42,151 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=437, Invalid=493, Unknown=0, NotChecked=0, Total=930 [2018-01-21 10:31:42,151 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 17 states. [2018-01-21 10:31:42,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:42,187 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 10:31:42,187 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 10:31:42,187 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 30 [2018-01-21 10:31:42,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:42,188 INFO L225 Difference]: With dead ends: 41 [2018-01-21 10:31:42,188 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 10:31:42,188 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 103 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=455, Invalid=537, Unknown=0, NotChecked=0, Total=992 [2018-01-21 10:31:42,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 10:31:42,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 10:31:42,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 10:31:42,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 10:31:42,191 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 10:31:42,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:42,191 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 10:31:42,191 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-21 10:31:42,191 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 10:31:42,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 10:31:42,192 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:42,192 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:42,192 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:42,192 INFO L82 PathProgramCache]: Analyzing trace with hash -1762964149, now seen corresponding path program 13 times [2018-01-21 10:31:42,192 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:42,192 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:42,193 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:42,193 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:42,193 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:42,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:42,200 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:42,303 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:42,303 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:42,303 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:42,303 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:42,303 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:42,303 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:42,303 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:42,308 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:42,308 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:42,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:42,319 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:42,328 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:42,328 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:42,696 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:42,721 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:42,721 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:42,724 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:42,724 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:42,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:42,748 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:42,754 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:42,754 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:42,891 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:42,892 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:42,892 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-21 10:31:42,892 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:42,892 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 10:31:42,893 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 10:31:42,893 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=498, Invalid=558, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 10:31:42,893 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 18 states. [2018-01-21 10:31:42,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:42,937 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 10:31:42,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 10:31:42,937 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 31 [2018-01-21 10:31:42,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:42,938 INFO L225 Difference]: With dead ends: 42 [2018-01-21 10:31:42,938 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 10:31:42,939 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 106 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=517, Invalid=605, Unknown=0, NotChecked=0, Total=1122 [2018-01-21 10:31:42,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 10:31:42,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 10:31:42,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 10:31:42,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 10:31:42,942 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 10:31:42,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:42,943 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 10:31:42,943 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 10:31:42,943 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 10:31:42,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 10:31:42,944 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:42,944 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:42,944 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:42,944 INFO L82 PathProgramCache]: Analyzing trace with hash -1962099216, now seen corresponding path program 14 times [2018-01-21 10:31:42,944 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:42,945 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:42,945 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:42,945 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:42,945 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:42,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:42,951 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:43,069 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:43,069 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:43,069 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:43,069 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:43,070 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:43,070 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:43,070 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-01-21 10:31:43,087 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:43,087 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:43,096 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,106 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,111 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:43,113 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:43,136 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:43,136 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:43,509 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:43,529 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:43,529 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:43,533 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:43,533 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:43,544 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,559 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,573 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:43,577 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:43,582 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:43,582 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:43,717 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:43,718 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:43,718 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-21 10:31:43,719 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:43,719 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-21 10:31:43,719 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-21 10:31:43,719 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=563, Invalid=627, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 10:31:43,719 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 19 states. [2018-01-21 10:31:43,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:43,878 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 10:31:43,878 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 10:31:43,878 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 32 [2018-01-21 10:31:43,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:43,878 INFO L225 Difference]: With dead ends: 43 [2018-01-21 10:31:43,878 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 10:31:43,879 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 109 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=583, Invalid=677, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 10:31:43,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 10:31:43,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 10:31:43,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 10:31:43,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 10:31:43,883 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 10:31:43,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:43,883 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 10:31:43,883 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-21 10:31:43,884 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 10:31:43,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 10:31:43,884 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:43,884 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:43,884 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:43,885 INFO L82 PathProgramCache]: Analyzing trace with hash 454648299, now seen corresponding path program 15 times [2018-01-21 10:31:43,885 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:43,885 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:43,886 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:43,886 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:43,886 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:43,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:43,894 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:44,542 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:44,542 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:44,542 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:44,542 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:44,543 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:44,543 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:44,543 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:44,553 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:44,554 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:44,562 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:44,570 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:44,582 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:44,586 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:44,589 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:44,591 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:44,592 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:44,593 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:44,595 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:44,595 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:44,596 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:44,616 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:44,616 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:45,259 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:45,280 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:45,280 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:45,283 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:45,283 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:45,294 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:45,301 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:45,309 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:45,318 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:45,327 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:45,337 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:45,348 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:45,358 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:45,369 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:45,377 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:45,381 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:45,385 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:45,385 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:45,503 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:45,504 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:45,504 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-21 10:31:45,504 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:45,505 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 10:31:45,505 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 10:31:45,505 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=632, Invalid=700, Unknown=0, NotChecked=0, Total=1332 [2018-01-21 10:31:45,506 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 20 states. [2018-01-21 10:31:45,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:45,534 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 10:31:45,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 10:31:45,535 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 33 [2018-01-21 10:31:45,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:45,535 INFO L225 Difference]: With dead ends: 44 [2018-01-21 10:31:45,535 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 10:31:45,536 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 112 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=653, Invalid=753, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 10:31:45,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 10:31:45,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 10:31:45,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 10:31:45,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 10:31:45,540 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 10:31:45,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:45,541 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 10:31:45,541 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 10:31:45,541 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 10:31:45,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 10:31:45,542 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:45,542 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:45,542 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:45,542 INFO L82 PathProgramCache]: Analyzing trace with hash -1935590064, now seen corresponding path program 16 times [2018-01-21 10:31:45,542 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:45,543 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:45,543 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:45,543 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:45,544 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:45,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:45,552 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:45,760 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:45,760 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:45,760 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:45,760 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:45,760 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:45,760 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:45,760 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:45,769 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:45,769 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:45,790 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:45,792 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:45,806 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:45,806 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:46,314 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:46,335 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:46,335 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:46,339 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:46,339 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:46,372 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:46,376 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:46,382 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:46,382 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:46,504 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:46,505 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:46,506 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-21 10:31:46,506 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:46,506 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-21 10:31:46,506 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-21 10:31:46,506 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=705, Invalid=777, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 10:31:46,507 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 21 states. [2018-01-21 10:31:46,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:46,548 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 10:31:46,548 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 10:31:46,549 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 34 [2018-01-21 10:31:46,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:46,549 INFO L225 Difference]: With dead ends: 45 [2018-01-21 10:31:46,549 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 10:31:46,550 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 115 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=727, Invalid=833, Unknown=0, NotChecked=0, Total=1560 [2018-01-21 10:31:46,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 10:31:46,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 10:31:46,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 10:31:46,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 10:31:46,554 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 10:31:46,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:46,554 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 10:31:46,554 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-21 10:31:46,555 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 10:31:46,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 10:31:46,555 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:46,556 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:46,556 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:46,556 INFO L82 PathProgramCache]: Analyzing trace with hash 1276432011, now seen corresponding path program 17 times [2018-01-21 10:31:46,556 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:46,557 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:46,557 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:46,557 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:46,557 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:46,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:46,566 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:46,723 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:46,724 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:46,724 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:46,724 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:46,724 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:46,724 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:46,724 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:46,732 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:31:46,732 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:46,736 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:46,737 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:46,737 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:46,738 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:46,739 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:46,740 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:46,740 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:46,741 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:46,742 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:46,746 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:46,747 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:46,748 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:46,756 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:46,756 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:47,233 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:47,253 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:47,253 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:47,256 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:31:47,256 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:47,260 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:47,261 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:47,264 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:47,268 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:47,272 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:47,276 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:47,280 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:47,285 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:47,291 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:47,302 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:47,310 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:47,313 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:47,318 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:47,318 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:47,530 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:47,531 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:47,532 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-21 10:31:47,532 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:47,532 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 10:31:47,532 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 10:31:47,532 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=782, Invalid=858, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 10:31:47,533 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 22 states. [2018-01-21 10:31:47,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:47,558 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 10:31:47,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 10:31:47,558 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 35 [2018-01-21 10:31:47,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:47,558 INFO L225 Difference]: With dead ends: 46 [2018-01-21 10:31:47,558 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 10:31:47,559 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 118 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=805, Invalid=917, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 10:31:47,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 10:31:47,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 10:31:47,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 10:31:47,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 10:31:47,562 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 10:31:47,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:47,562 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 10:31:47,562 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 10:31:47,562 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 10:31:47,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 10:31:47,563 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:47,563 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:47,563 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:47,563 INFO L82 PathProgramCache]: Analyzing trace with hash 2064868528, now seen corresponding path program 18 times [2018-01-21 10:31:47,563 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:47,564 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:47,564 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:47,564 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:47,564 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:47,571 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:47,572 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:47,819 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:47,820 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:47,820 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:47,820 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:47,820 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:47,820 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:47,820 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:47,825 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:31:47,825 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:31:47,836 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:47,838 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:47,840 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:47,842 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:47,843 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:47,845 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:47,847 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:47,849 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:47,851 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:47,852 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:47,853 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:47,855 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:47,867 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:47,867 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:48,405 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:48,425 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:48,425 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:48,428 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:31:48,428 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:31:48,437 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:48,444 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:48,451 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:48,459 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:48,468 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:48,476 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:48,486 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:48,495 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:48,506 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:48,516 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:48,524 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:48,527 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:48,532 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:48,533 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:48,666 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:48,667 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:48,667 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-21 10:31:48,667 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:48,667 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-21 10:31:48,668 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-21 10:31:48,668 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=863, Invalid=943, Unknown=0, NotChecked=0, Total=1806 [2018-01-21 10:31:48,668 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 23 states. [2018-01-21 10:31:48,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:48,699 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 10:31:48,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 10:31:48,699 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 36 [2018-01-21 10:31:48,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:48,700 INFO L225 Difference]: With dead ends: 47 [2018-01-21 10:31:48,700 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 10:31:48,701 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 121 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=887, Invalid=1005, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 10:31:48,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 10:31:48,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 10:31:48,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 10:31:48,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 10:31:48,704 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 10:31:48,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:48,704 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 10:31:48,704 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-21 10:31:48,705 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 10:31:48,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 10:31:48,705 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:48,705 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:48,705 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:48,706 INFO L82 PathProgramCache]: Analyzing trace with hash 736596779, now seen corresponding path program 19 times [2018-01-21 10:31:48,706 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:48,706 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:48,707 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:48,707 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:48,707 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:48,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:48,713 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:48,877 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:48,877 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:48,877 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:48,877 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:48,877 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:48,877 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:48,877 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:48,882 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:48,882 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:48,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:48,895 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:48,903 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:48,903 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:49,471 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:49,491 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:49,491 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:49,494 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:49,494 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:49,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:49,521 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:49,526 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:49,526 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:49,669 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:49,670 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:49,670 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-21 10:31:49,670 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:49,670 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 10:31:49,670 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 10:31:49,671 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=948, Invalid=1032, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 10:31:49,671 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 24 states. [2018-01-21 10:31:49,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:49,706 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 10:31:49,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 10:31:49,707 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 37 [2018-01-21 10:31:49,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:49,707 INFO L225 Difference]: With dead ends: 48 [2018-01-21 10:31:49,707 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 10:31:49,708 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 124 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=973, Invalid=1097, Unknown=0, NotChecked=0, Total=2070 [2018-01-21 10:31:49,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 10:31:49,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 10:31:49,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 10:31:49,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 10:31:49,711 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 10:31:49,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:49,711 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 10:31:49,711 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 10:31:49,711 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 10:31:49,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 10:31:49,712 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:49,712 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:49,712 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:49,712 INFO L82 PathProgramCache]: Analyzing trace with hash -1785121776, now seen corresponding path program 20 times [2018-01-21 10:31:49,712 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:49,712 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:49,713 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:49,713 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:49,713 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:49,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:49,719 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:49,902 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:49,902 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:49,903 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:49,903 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:49,903 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:49,903 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:49,903 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:49,907 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:49,908 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:49,914 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:49,919 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:49,920 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:49,922 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:49,932 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:49,933 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:50,555 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:50,575 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:50,575 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:50,578 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:50,578 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:50,587 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,599 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,610 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:50,614 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:50,619 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:50,620 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:50,778 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:50,779 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:50,779 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-21 10:31:50,780 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:50,780 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-21 10:31:50,780 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-21 10:31:50,781 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1037, Invalid=1125, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 10:31:50,781 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 25 states. [2018-01-21 10:31:50,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:50,834 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 10:31:50,834 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 10:31:50,834 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 38 [2018-01-21 10:31:50,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:50,835 INFO L225 Difference]: With dead ends: 49 [2018-01-21 10:31:50,835 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 10:31:50,835 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 127 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1063, Invalid=1193, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 10:31:50,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 10:31:50,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 10:31:50,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 10:31:50,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 10:31:50,838 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 10:31:50,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:50,838 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 10:31:50,838 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-21 10:31:50,838 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 10:31:50,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 10:31:50,839 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:50,839 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:50,839 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:50,839 INFO L82 PathProgramCache]: Analyzing trace with hash 1645981643, now seen corresponding path program 21 times [2018-01-21 10:31:50,839 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:50,840 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:50,840 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:50,840 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:50,840 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:50,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:50,847 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:51,039 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:51,040 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:51,040 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:51,040 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:51,040 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:51,040 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:51,040 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:51,046 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:51,046 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:51,052 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,054 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,055 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,056 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,057 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,058 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,059 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,060 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,061 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,062 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,063 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,064 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,065 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:51,066 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:51,074 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:51,074 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:51,740 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:51,761 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:51,762 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:51,765 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:51,765 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:51,776 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,783 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,791 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,799 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,807 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,816 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,826 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,836 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,846 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,857 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,868 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,879 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:51,888 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:51,891 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:51,897 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:51,897 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:52,060 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:52,061 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:52,061 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-21 10:31:52,061 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:52,061 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 10:31:52,061 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 10:31:52,062 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1130, Invalid=1222, Unknown=0, NotChecked=0, Total=2352 [2018-01-21 10:31:52,062 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 26 states. [2018-01-21 10:31:52,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:52,090 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 10:31:52,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 10:31:52,090 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 39 [2018-01-21 10:31:52,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:52,090 INFO L225 Difference]: With dead ends: 50 [2018-01-21 10:31:52,090 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 10:31:52,091 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 130 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 129 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1157, Invalid=1293, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 10:31:52,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 10:31:52,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 10:31:52,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 10:31:52,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 10:31:52,095 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 10:31:52,095 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:52,095 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 10:31:52,095 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 10:31:52,095 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 10:31:52,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 10:31:52,096 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:52,096 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:52,096 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:52,096 INFO L82 PathProgramCache]: Analyzing trace with hash 636005232, now seen corresponding path program 22 times [2018-01-21 10:31:52,096 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:52,096 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:52,097 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:52,097 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:52,097 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:52,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:52,103 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:52,286 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:52,286 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:52,286 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:52,286 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:52,286 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:52,287 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:52,287 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:52,291 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:52,291 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:52,304 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:52,305 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:52,314 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:52,314 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:53,068 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:53,088 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:53,088 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:53,090 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:53,091 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:53,124 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:53,127 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:53,133 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:53,133 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:53,296 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:53,297 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:53,297 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-21 10:31:53,297 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:53,297 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-21 10:31:53,297 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-21 10:31:53,298 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1227, Invalid=1323, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 10:31:53,298 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 27 states. [2018-01-21 10:31:53,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:53,331 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 10:31:53,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 10:31:53,332 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 40 [2018-01-21 10:31:53,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:53,332 INFO L225 Difference]: With dead ends: 51 [2018-01-21 10:31:53,332 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 10:31:53,333 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 185 GetRequests, 133 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1255, Invalid=1397, Unknown=0, NotChecked=0, Total=2652 [2018-01-21 10:31:53,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 10:31:53,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 10:31:53,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 10:31:53,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 10:31:53,337 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 10:31:53,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:53,337 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 10:31:53,337 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-21 10:31:53,337 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 10:31:53,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 10:31:53,338 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:53,338 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:53,338 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:53,338 INFO L82 PathProgramCache]: Analyzing trace with hash -608492437, now seen corresponding path program 23 times [2018-01-21 10:31:53,339 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:53,339 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:53,339 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:53,339 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:53,339 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:53,346 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:53,347 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:53,549 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:53,549 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:53,549 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:53,549 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:53,549 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:53,549 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:53,549 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:53,554 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:31:53,554 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:53,558 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:53,559 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:53,559 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:53,560 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:53,561 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:53,561 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:53,562 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:53,563 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:53,564 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:53,565 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:53,565 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:53,566 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:53,570 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:53,572 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:53,573 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:53,582 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:53,582 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:54,365 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:54,384 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:54,385 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:54,387 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:31:54,387 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:54,392 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:54,394 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:54,397 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:54,400 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:54,404 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:54,408 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:54,413 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:54,418 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:54,423 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:54,429 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:54,436 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:54,442 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:54,455 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:54,465 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:54,468 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:54,477 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:54,477 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:54,669 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:54,670 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:54,670 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-21 10:31:54,670 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:54,671 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 10:31:54,671 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 10:31:54,671 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1328, Invalid=1428, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 10:31:54,671 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 28 states. [2018-01-21 10:31:54,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:54,707 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 10:31:54,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 10:31:54,707 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 41 [2018-01-21 10:31:54,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:54,708 INFO L225 Difference]: With dead ends: 52 [2018-01-21 10:31:54,708 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 10:31:54,709 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 136 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1357, Invalid=1505, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 10:31:54,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 10:31:54,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 10:31:54,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 10:31:54,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 10:31:54,711 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 10:31:54,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:54,712 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 10:31:54,712 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 10:31:54,712 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 10:31:54,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 10:31:54,713 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:54,713 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:54,713 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:54,713 INFO L82 PathProgramCache]: Analyzing trace with hash -533214512, now seen corresponding path program 24 times [2018-01-21 10:31:54,713 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:54,714 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:54,714 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:54,714 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:54,714 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:54,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:54,723 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:54,954 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:54,954 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:54,955 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:54,955 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:54,955 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:54,955 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:54,955 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:54,960 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:31:54,960 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:31:54,966 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:54,968 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:54,969 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:54,970 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:54,971 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:54,972 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:54,973 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:54,974 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:54,975 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:54,976 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:54,977 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:54,978 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:54,979 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:54,980 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:54,981 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:54,990 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:54,990 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:55,827 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:55,848 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:55,848 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:55,851 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:31:55,851 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:31:55,860 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:55,867 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:55,876 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:55,885 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:55,894 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:55,903 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:55,914 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:55,925 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:55,935 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:55,946 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:55,957 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:55,969 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:55,982 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:55,991 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:55,995 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:56,000 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:56,000 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:56,195 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:56,196 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:56,196 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-21 10:31:56,196 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:56,197 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-21 10:31:56,197 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-21 10:31:56,198 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1433, Invalid=1537, Unknown=0, NotChecked=0, Total=2970 [2018-01-21 10:31:56,198 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 29 states. [2018-01-21 10:31:56,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:56,231 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 10:31:56,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 10:31:56,231 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 42 [2018-01-21 10:31:56,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:56,232 INFO L225 Difference]: With dead ends: 53 [2018-01-21 10:31:56,232 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 10:31:56,233 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 139 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1463, Invalid=1617, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 10:31:56,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 10:31:56,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 10:31:56,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 10:31:56,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 10:31:56,236 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 10:31:56,236 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:56,236 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 10:31:56,236 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-21 10:31:56,237 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 10:31:56,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 10:31:56,237 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:56,237 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:56,237 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:56,237 INFO L82 PathProgramCache]: Analyzing trace with hash 1800401163, now seen corresponding path program 25 times [2018-01-21 10:31:56,238 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:56,238 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:56,238 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:56,238 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:56,239 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:56,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:56,245 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:56,480 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:56,480 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:56,480 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:56,480 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:56,480 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:56,480 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:56,480 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:56,490 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:56,491 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:56,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:56,505 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:56,514 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:56,514 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:57,468 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:57,488 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:57,488 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:57,491 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:57,491 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:57,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:57,521 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:57,527 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:57,527 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:57,728 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:57,729 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:57,729 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 57 [2018-01-21 10:31:57,729 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:57,729 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 10:31:57,730 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 10:31:57,730 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1542, Invalid=1650, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 10:31:57,731 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 30 states. [2018-01-21 10:31:57,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:57,770 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 10:31:57,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 10:31:57,771 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 43 [2018-01-21 10:31:57,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:57,771 INFO L225 Difference]: With dead ends: 54 [2018-01-21 10:31:57,771 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 10:31:57,772 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 142 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1573, Invalid=1733, Unknown=0, NotChecked=0, Total=3306 [2018-01-21 10:31:57,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 10:31:57,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 10:31:57,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 10:31:57,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 10:31:57,774 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 10:31:57,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:57,774 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 10:31:57,774 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 10:31:57,774 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 10:31:57,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 10:31:57,775 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:57,775 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:57,775 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:57,775 INFO L82 PathProgramCache]: Analyzing trace with hash 1128043056, now seen corresponding path program 26 times [2018-01-21 10:31:57,775 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:57,775 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:57,776 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:57,776 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:57,776 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:57,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:57,783 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:58,024 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:58,025 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:58,025 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:58,025 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:58,025 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:58,025 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:58,025 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:58,031 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:58,031 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:58,037 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:58,043 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:58,044 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:58,045 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:58,054 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:58,054 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:59,011 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:59,032 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:59,032 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:59,035 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:59,035 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:59,044 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,058 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,070 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:59,074 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:59,079 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:59,080 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:59,285 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:59,286 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:59,286 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 59 [2018-01-21 10:31:59,286 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:59,286 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-21 10:31:59,287 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-21 10:31:59,287 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1655, Invalid=1767, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 10:31:59,287 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 31 states. [2018-01-21 10:31:59,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:59,335 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 10:31:59,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 10:31:59,335 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 44 [2018-01-21 10:31:59,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:59,336 INFO L225 Difference]: With dead ends: 55 [2018-01-21 10:31:59,336 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 10:31:59,336 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 145 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 159 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1687, Invalid=1853, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 10:31:59,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 10:31:59,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 10:31:59,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 10:31:59,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 10:31:59,340 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 10:31:59,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:59,340 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 10:31:59,340 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-21 10:31:59,341 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 10:31:59,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 10:31:59,341 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:59,341 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:59,341 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:59,342 INFO L82 PathProgramCache]: Analyzing trace with hash 1759778219, now seen corresponding path program 27 times [2018-01-21 10:31:59,342 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:59,342 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:59,343 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:59,343 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:59,343 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:59,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:59,352 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:59,627 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:59,627 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:59,627 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:59,627 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:59,628 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:59,628 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:59,628 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:59,636 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:59,636 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:59,643 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:59,645 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:59,646 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:59,647 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:59,649 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:59,650 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:59,651 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:59,653 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:59,654 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:59,656 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:59,657 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:59,658 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:59,659 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:59,660 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:59,661 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:59,662 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:59,663 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:59,672 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:59,672 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:00,690 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:00,710 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:00,710 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:00,713 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:32:00,714 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:32:00,723 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:00,730 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:00,738 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:00,747 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:00,756 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:00,766 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:00,775 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:00,785 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:00,796 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:00,807 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:00,819 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:00,830 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:00,842 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:00,855 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:00,868 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:00,877 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:00,881 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:00,887 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:00,887 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:01,103 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:01,105 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:01,105 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 61 [2018-01-21 10:32:01,105 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:01,105 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 10:32:01,105 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 10:32:01,105 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1772, Invalid=1888, Unknown=0, NotChecked=0, Total=3660 [2018-01-21 10:32:01,106 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 32 states. [2018-01-21 10:32:01,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:01,158 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 10:32:01,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 10:32:01,159 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 45 [2018-01-21 10:32:01,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:01,159 INFO L225 Difference]: With dead ends: 56 [2018-01-21 10:32:01,159 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 10:32:01,160 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 210 GetRequests, 148 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1805, Invalid=1977, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 10:32:01,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 10:32:01,161 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 10:32:01,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 10:32:01,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 10:32:01,162 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 10:32:01,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:01,162 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 10:32:01,162 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 10:32:01,162 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 10:32:01,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 10:32:01,163 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:01,163 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:01,163 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:01,163 INFO L82 PathProgramCache]: Analyzing trace with hash -131268208, now seen corresponding path program 28 times [2018-01-21 10:32:01,163 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:01,163 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:01,163 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:01,164 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:01,164 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:01,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:01,172 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:01,461 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:01,462 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:01,462 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:01,462 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:01,462 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:01,462 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:01,462 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:01,468 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:32:01,468 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:32:01,482 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:01,484 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:01,493 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:01,493 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:02,580 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:02,599 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:02,600 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:02,602 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:32:02,603 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:32:02,642 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:02,646 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:02,653 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:02,654 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:02,887 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:02,887 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:02,888 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 63 [2018-01-21 10:32:02,888 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:02,888 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-21 10:32:02,888 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-21 10:32:02,888 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1893, Invalid=2013, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 10:32:02,888 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 33 states. [2018-01-21 10:32:02,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:02,948 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 10:32:02,948 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 10:32:02,948 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 46 [2018-01-21 10:32:02,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:02,949 INFO L225 Difference]: With dead ends: 57 [2018-01-21 10:32:02,949 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 10:32:02,949 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 151 SyntacticMatches, 2 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1927, Invalid=2105, Unknown=0, NotChecked=0, Total=4032 [2018-01-21 10:32:02,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 10:32:02,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 10:32:02,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 10:32:02,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 10:32:02,953 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 10:32:02,953 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:02,953 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 10:32:02,953 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-21 10:32:02,953 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 10:32:02,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 10:32:02,953 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:02,953 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:02,954 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:02,954 INFO L82 PathProgramCache]: Analyzing trace with hash 1375834699, now seen corresponding path program 29 times [2018-01-21 10:32:02,954 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:02,954 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:02,955 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:02,955 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:02,955 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:02,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:02,964 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:03,417 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:03,417 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:03,418 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:03,418 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:03,418 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:03,418 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:03,418 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:03,426 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:32:03,426 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:32:03,430 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:03,431 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:03,431 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:03,432 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:03,433 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:03,434 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:03,435 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:03,436 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:03,436 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:03,437 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:03,438 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:03,439 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:03,440 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:03,441 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:03,442 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:03,446 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:03,447 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:03,449 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:03,479 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:03,479 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:04,652 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:04,672 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:04,672 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:04,675 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:32:04,676 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:32:04,680 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:04,682 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:04,685 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:04,688 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:04,692 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:04,697 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:04,701 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:04,706 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:04,711 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:04,717 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:04,724 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:04,730 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:04,737 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:04,744 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:04,752 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:04,766 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:04,777 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:04,780 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:04,787 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:04,787 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:05,028 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:05,029 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:05,029 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 65 [2018-01-21 10:32:05,029 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:05,029 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 10:32:05,030 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 10:32:05,030 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2018, Invalid=2142, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 10:32:05,030 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 34 states. [2018-01-21 10:32:05,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:05,070 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 10:32:05,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 10:32:05,070 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 47 [2018-01-21 10:32:05,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:05,071 INFO L225 Difference]: With dead ends: 58 [2018-01-21 10:32:05,071 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 10:32:05,071 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 154 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 177 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2053, Invalid=2237, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 10:32:05,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 10:32:05,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 10:32:05,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 10:32:05,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 10:32:05,074 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 10:32:05,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:05,074 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 10:32:05,074 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 10:32:05,074 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 10:32:05,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 10:32:05,074 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:05,074 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:05,074 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:05,075 INFO L82 PathProgramCache]: Analyzing trace with hash 851384560, now seen corresponding path program 30 times [2018-01-21 10:32:05,075 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:05,075 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:05,075 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:05,075 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:05,075 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:05,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:05,082 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:05,725 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:05,725 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:05,725 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:05,725 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:05,726 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:05,726 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:05,726 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:05,734 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:32:05,734 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:32:05,742 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:05,747 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:05,749 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:05,750 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:05,756 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:05,757 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:05,759 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:05,761 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:05,762 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:05,764 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:05,766 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:05,767 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:05,768 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:05,770 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:05,772 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:05,774 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:05,774 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:05,776 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:05,786 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:05,787 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:07,081 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:07,101 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:07,101 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:07,104 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:32:07,104 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:32:07,113 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:07,120 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:07,128 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:07,136 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:07,145 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:07,154 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:07,163 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:07,173 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:07,183 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:07,194 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:07,228 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:07,240 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:07,252 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:07,265 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:07,278 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:07,293 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:07,304 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:07,308 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:07,318 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:07,319 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:07,659 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:07,660 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:07,660 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 67 [2018-01-21 10:32:07,661 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:07,661 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-21 10:32:07,661 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-21 10:32:07,661 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2147, Invalid=2275, Unknown=0, NotChecked=0, Total=4422 [2018-01-21 10:32:07,661 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 35 states. [2018-01-21 10:32:07,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:07,725 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 10:32:07,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 10:32:07,725 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 48 [2018-01-21 10:32:07,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:07,726 INFO L225 Difference]: With dead ends: 59 [2018-01-21 10:32:07,726 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 10:32:07,726 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 225 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 183 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2183, Invalid=2373, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 10:32:07,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 10:32:07,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 10:32:07,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 10:32:07,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 10:32:07,729 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 10:32:07,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:07,729 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 10:32:07,729 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-21 10:32:07,729 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 10:32:07,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 10:32:07,730 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:07,730 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:07,730 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:07,730 INFO L82 PathProgramCache]: Analyzing trace with hash 1773299435, now seen corresponding path program 31 times [2018-01-21 10:32:07,730 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:07,731 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:07,731 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:07,731 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:07,731 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:07,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:07,747 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:08,138 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:08,138 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:08,138 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:08,138 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:08,139 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:08,139 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:08,139 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:08,144 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:32:08,144 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:32:08,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:08,160 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:08,169 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:08,169 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:09,455 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:09,474 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:09,474 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:09,477 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:32:09,477 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:32:09,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:09,510 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:09,517 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:09,517 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:09,777 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:09,778 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:09,778 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 69 [2018-01-21 10:32:09,779 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:09,779 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 10:32:09,779 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 10:32:09,779 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2280, Invalid=2412, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 10:32:09,779 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 36 states. [2018-01-21 10:32:09,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:09,832 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 10:32:09,833 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 10:32:09,833 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 49 [2018-01-21 10:32:09,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:09,833 INFO L225 Difference]: With dead ends: 60 [2018-01-21 10:32:09,833 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 10:32:09,834 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 230 GetRequests, 160 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 189 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2317, Invalid=2513, Unknown=0, NotChecked=0, Total=4830 [2018-01-21 10:32:09,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 10:32:09,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 10:32:09,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 10:32:09,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 10:32:09,836 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 10:32:09,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:09,836 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 10:32:09,836 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 10:32:09,836 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 10:32:09,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 10:32:09,837 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:09,837 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:09,837 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:09,837 INFO L82 PathProgramCache]: Analyzing trace with hash 287889488, now seen corresponding path program 32 times [2018-01-21 10:32:09,837 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:09,837 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:09,837 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:32:09,838 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:09,838 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:09,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:09,845 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:10,195 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:10,196 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:10,196 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:10,196 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:10,196 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:10,196 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:10,196 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:10,201 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:32:10,201 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:32:10,208 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:10,214 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:10,215 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:10,217 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:10,226 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:10,227 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:11,602 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:11,622 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:11,622 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:11,625 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:32:11,625 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:32:11,635 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:11,650 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:11,664 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:11,668 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:11,675 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:11,675 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:11,966 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:11,968 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:11,968 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 71 [2018-01-21 10:32:11,968 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:11,968 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-21 10:32:11,968 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-21 10:32:11,968 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2417, Invalid=2553, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 10:32:11,969 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 37 states. [2018-01-21 10:32:12,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:12,078 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 10:32:12,078 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 10:32:12,078 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 50 [2018-01-21 10:32:12,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:12,079 INFO L225 Difference]: With dead ends: 61 [2018-01-21 10:32:12,079 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 10:32:12,079 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 235 GetRequests, 163 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 195 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2455, Invalid=2657, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 10:32:12,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 10:32:12,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 10:32:12,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 10:32:12,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 10:32:12,083 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 10:32:12,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:12,083 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 10:32:12,083 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-21 10:32:12,083 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 10:32:12,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 10:32:12,084 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:12,084 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:12,084 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:12,084 INFO L82 PathProgramCache]: Analyzing trace with hash 1484821387, now seen corresponding path program 33 times [2018-01-21 10:32:12,084 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:12,085 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:12,085 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:12,085 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:12,085 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:12,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:12,094 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:12,513 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:12,513 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:12,513 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:12,513 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:12,513 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:12,513 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:12,513 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:12,518 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:32:12,518 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:32:12,525 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,527 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,528 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,529 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,530 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,531 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,532 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,533 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,534 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,535 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,536 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,537 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,538 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,539 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,540 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,541 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,543 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,544 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:12,544 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:12,546 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:12,555 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:12,555 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:13,997 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:14,017 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:14,017 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:14,020 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:32:14,020 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:32:14,030 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,037 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,045 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,054 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,062 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,072 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,081 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,092 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,103 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,115 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,127 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,139 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,152 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,165 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,179 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,193 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,208 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,223 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:14,235 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:14,239 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:14,246 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:14,246 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:14,538 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:14,540 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:14,540 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 73 [2018-01-21 10:32:14,540 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:14,540 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 10:32:14,540 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 10:32:14,540 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2558, Invalid=2698, Unknown=0, NotChecked=0, Total=5256 [2018-01-21 10:32:14,541 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 38 states. [2018-01-21 10:32:14,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:14,576 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 10:32:14,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 10:32:14,577 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 51 [2018-01-21 10:32:14,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:14,577 INFO L225 Difference]: With dead ends: 62 [2018-01-21 10:32:14,577 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 10:32:14,578 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 240 GetRequests, 166 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2597, Invalid=2805, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 10:32:14,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 10:32:14,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 10:32:14,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 10:32:14,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 10:32:14,581 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 10:32:14,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:14,581 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 10:32:14,581 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 10:32:14,581 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 10:32:14,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 10:32:14,582 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:14,582 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:14,582 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:14,582 INFO L82 PathProgramCache]: Analyzing trace with hash -64995408, now seen corresponding path program 34 times [2018-01-21 10:32:14,582 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:14,583 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:14,583 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:14,583 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:14,583 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:14,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:14,591 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:14,970 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:14,970 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:14,970 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:14,970 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:14,970 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:14,970 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:14,970 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:14,975 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:32:14,975 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:32:14,992 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:14,993 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:15,003 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:15,003 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:16,592 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:16,612 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:16,613 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:16,616 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:32:16,616 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:32:16,659 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:16,663 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:16,670 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:16,670 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:16,964 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:16,965 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:16,965 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 75 [2018-01-21 10:32:16,965 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:16,965 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-21 10:32:16,965 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-21 10:32:16,965 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2703, Invalid=2847, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 10:32:16,966 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 39 states. [2018-01-21 10:32:17,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:17,013 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-21 10:32:17,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 10:32:17,013 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 52 [2018-01-21 10:32:17,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:17,014 INFO L225 Difference]: With dead ends: 63 [2018-01-21 10:32:17,014 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 10:32:17,014 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 169 SyntacticMatches, 2 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2743, Invalid=2957, Unknown=0, NotChecked=0, Total=5700 [2018-01-21 10:32:17,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 10:32:17,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 10:32:17,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 10:32:17,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-21 10:32:17,017 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-21 10:32:17,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:17,017 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-21 10:32:17,017 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-21 10:32:17,017 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-21 10:32:17,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 10:32:17,018 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:17,018 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:17,018 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:17,018 INFO L82 PathProgramCache]: Analyzing trace with hash -864675797, now seen corresponding path program 35 times [2018-01-21 10:32:17,018 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:17,019 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:17,019 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:17,019 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:17,019 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:17,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:17,030 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:17,516 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:17,516 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:17,516 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:17,516 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:17,517 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:17,517 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:17,517 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:17,521 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:32:17,521 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:32:17,525 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,526 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,527 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,527 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,528 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,529 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,529 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,530 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,531 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,532 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,533 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,534 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,534 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,535 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,536 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,537 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,538 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,539 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,543 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:17,544 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:17,546 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:17,556 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:17,556 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:19,163 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:19,183 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:19,183 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:19,186 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:32:19,186 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:32:19,191 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,193 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,196 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,200 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,205 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,209 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,215 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,220 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,226 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,233 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,240 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,247 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,255 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,263 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,272 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,281 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,291 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,301 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,318 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,331 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:19,335 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:19,342 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:19,342 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:19,515 WARN L143 SmtUtils]: Spent 171ms on a formula simplification that was a NOOP. DAG size: 113 [2018-01-21 10:32:19,762 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:19,764 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:19,764 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 77 [2018-01-21 10:32:19,764 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:19,764 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 10:32:19,764 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 10:32:19,764 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2852, Invalid=3000, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 10:32:19,765 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 40 states. [2018-01-21 10:32:19,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:19,827 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-21 10:32:19,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-21 10:32:19,828 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 53 [2018-01-21 10:32:19,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:19,828 INFO L225 Difference]: With dead ends: 64 [2018-01-21 10:32:19,829 INFO L226 Difference]: Without dead ends: 55 [2018-01-21 10:32:19,829 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 250 GetRequests, 172 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 213 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=2893, Invalid=3113, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 10:32:19,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-21 10:32:19,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-21 10:32:19,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-21 10:32:19,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-21 10:32:19,832 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-21 10:32:19,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:19,833 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-21 10:32:19,833 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 10:32:19,833 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-21 10:32:19,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-21 10:32:19,834 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:19,834 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:19,834 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:19,834 INFO L82 PathProgramCache]: Analyzing trace with hash 115035920, now seen corresponding path program 36 times [2018-01-21 10:32:19,834 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:19,835 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:19,835 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:19,835 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:19,835 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:19,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:19,845 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:20,327 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:20,327 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:20,327 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:20,327 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:20,327 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:20,327 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:20,327 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:20,332 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:32:20,332 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:32:20,340 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,341 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,342 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,343 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,344 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,345 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,346 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,347 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,348 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,349 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,350 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,352 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,353 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,354 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,355 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,356 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,357 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,359 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,360 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:20,360 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:20,362 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:20,372 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:20,372 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:22,051 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:22,071 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:22,071 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:22,074 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:32:22,074 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:32:22,084 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,090 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,098 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,107 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,115 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,124 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,134 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,143 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,154 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,164 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,176 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,187 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,199 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,212 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,225 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,238 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,252 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,266 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,281 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:22,293 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:22,297 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:22,304 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:22,304 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:22,619 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:22,620 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:22,620 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 79 [2018-01-21 10:32:22,621 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:22,621 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-21 10:32:22,621 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-21 10:32:22,621 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3005, Invalid=3157, Unknown=0, NotChecked=0, Total=6162 [2018-01-21 10:32:22,621 INFO L87 Difference]: Start difference. First operand 55 states and 55 transitions. Second operand 41 states. [2018-01-21 10:32:22,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:22,661 INFO L93 Difference]: Finished difference Result 65 states and 65 transitions. [2018-01-21 10:32:22,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-21 10:32:22,661 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 54 [2018-01-21 10:32:22,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:22,662 INFO L225 Difference]: With dead ends: 65 [2018-01-21 10:32:22,662 INFO L226 Difference]: Without dead ends: 56 [2018-01-21 10:32:22,662 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 255 GetRequests, 175 SyntacticMatches, 2 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 219 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=3047, Invalid=3273, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 10:32:22,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2018-01-21 10:32:22,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2018-01-21 10:32:22,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-21 10:32:22,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 56 transitions. [2018-01-21 10:32:22,665 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 56 transitions. Word has length 54 [2018-01-21 10:32:22,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:22,665 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 56 transitions. [2018-01-21 10:32:22,665 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-21 10:32:22,665 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2018-01-21 10:32:22,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-01-21 10:32:22,665 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:22,665 INFO L322 BasicCegarLoop]: trace histogram [37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:22,665 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:22,665 INFO L82 PathProgramCache]: Analyzing trace with hash 421328075, now seen corresponding path program 37 times [2018-01-21 10:32:22,666 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:22,666 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:22,666 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:22,666 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:22,666 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:22,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:22,675 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:23,145 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:23,145 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:23,145 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:23,145 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:23,145 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:23,145 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:23,146 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:23,151 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:32:23,151 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:32:23,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:23,167 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:23,178 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:23,178 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:24,945 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:24,964 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:24,965 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:24,967 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:32:24,967 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:32:25,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:25,005 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:25,013 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:25,013 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:25,347 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:25,348 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:25,348 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 81 [2018-01-21 10:32:25,348 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:25,349 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 10:32:25,349 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 10:32:25,349 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3162, Invalid=3318, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 10:32:25,349 INFO L87 Difference]: Start difference. First operand 56 states and 56 transitions. Second operand 42 states. [2018-01-21 10:32:25,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:25,400 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-01-21 10:32:25,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-21 10:32:25,400 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 55 [2018-01-21 10:32:25,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:25,400 INFO L225 Difference]: With dead ends: 66 [2018-01-21 10:32:25,400 INFO L226 Difference]: Without dead ends: 57 [2018-01-21 10:32:25,401 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 260 GetRequests, 178 SyntacticMatches, 2 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 225 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=3205, Invalid=3437, Unknown=0, NotChecked=0, Total=6642 [2018-01-21 10:32:25,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-21 10:32:25,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-21 10:32:25,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-21 10:32:25,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-01-21 10:32:25,403 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 55 [2018-01-21 10:32:25,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:25,403 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-01-21 10:32:25,403 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 10:32:25,403 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-01-21 10:32:25,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-21 10:32:25,404 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:25,404 INFO L322 BasicCegarLoop]: trace histogram [38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:25,404 INFO L371 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:25,404 INFO L82 PathProgramCache]: Analyzing trace with hash 1326450288, now seen corresponding path program 38 times [2018-01-21 10:32:25,404 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:25,405 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:25,405 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:32:25,405 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:25,405 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:25,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:25,412 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:25,930 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:25,930 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:25,930 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:25,931 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:25,931 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:25,931 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:25,931 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:25,941 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:32:25,941 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:32:25,949 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:25,956 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:25,958 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:25,959 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:25,970 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:25,970 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:27,948 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:27,967 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:27,967 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:27,970 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:32:27,970 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:32:27,979 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:27,993 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:28,008 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:28,011 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:28,018 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:28,018 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:28,361 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:28,362 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:28,362 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42, 42, 42] total 83 [2018-01-21 10:32:28,362 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:28,362 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-01-21 10:32:28,363 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-01-21 10:32:28,363 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3323, Invalid=3483, Unknown=0, NotChecked=0, Total=6806 [2018-01-21 10:32:28,363 INFO L87 Difference]: Start difference. First operand 57 states and 57 transitions. Second operand 43 states. [2018-01-21 10:32:28,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:28,415 INFO L93 Difference]: Finished difference Result 67 states and 67 transitions. [2018-01-21 10:32:28,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-01-21 10:32:28,415 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 56 [2018-01-21 10:32:28,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:28,416 INFO L225 Difference]: With dead ends: 67 [2018-01-21 10:32:28,416 INFO L226 Difference]: Without dead ends: 58 [2018-01-21 10:32:28,416 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 265 GetRequests, 181 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=3367, Invalid=3605, Unknown=0, NotChecked=0, Total=6972 [2018-01-21 10:32:28,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-01-21 10:32:28,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2018-01-21 10:32:28,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-01-21 10:32:28,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 58 transitions. [2018-01-21 10:32:28,419 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 58 transitions. Word has length 56 [2018-01-21 10:32:28,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:28,419 INFO L432 AbstractCegarLoop]: Abstraction has 58 states and 58 transitions. [2018-01-21 10:32:28,419 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-01-21 10:32:28,419 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2018-01-21 10:32:28,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-01-21 10:32:28,419 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:28,419 INFO L322 BasicCegarLoop]: trace histogram [39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:28,419 INFO L371 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:28,419 INFO L82 PathProgramCache]: Analyzing trace with hash -679532181, now seen corresponding path program 39 times [2018-01-21 10:32:28,420 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:28,420 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:28,420 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:28,420 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:28,420 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:28,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:28,427 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:28,909 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:28,909 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:28,909 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:28,909 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:28,909 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:28,909 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:28,909 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:28,914 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:32:28,914 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:32:28,921 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,923 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,924 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,925 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,926 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,927 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,928 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,929 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,930 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,931 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,932 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,933 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,935 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,936 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,937 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,938 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,939 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,941 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,942 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,943 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,945 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:28,945 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:28,947 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:28,958 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:28,959 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-21 10:32:30,227 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-21 10:32:30,227 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 10:32:30,229 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 10:32:30,229 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 10:32:30,229 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 10:32:30,229 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 10:32:30,229 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 10:32:30,229 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 10:32:30,230 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 10:32:30,230 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 10:32:30,230 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 10:32:30,230 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-21 10:32:30,230 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 10:32:30,231 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 10:32:30 BoogieIcfgContainer [2018-01-21 10:32:30,231 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 10:32:30,232 INFO L168 Benchmark]: Toolchain (without parser) took 55835.46 ms. Allocated memory was 299.4 MB in the beginning and 831.5 MB in the end (delta: 532.2 MB). Free memory was 258.7 MB in the beginning and 454.3 MB in the end (delta: -195.6 MB). Peak memory consumption was 336.5 MB. Max. memory is 5.3 GB. [2018-01-21 10:32:30,232 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 299.4 MB. Free memory is still 262.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 10:32:30,232 INFO L168 Benchmark]: CACSL2BoogieTranslator took 177.38 ms. Allocated memory is still 299.4 MB. Free memory was 256.7 MB in the beginning and 248.7 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. [2018-01-21 10:32:30,232 INFO L168 Benchmark]: Boogie Preprocessor took 33.06 ms. Allocated memory is still 299.4 MB. Free memory is still 248.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 10:32:30,233 INFO L168 Benchmark]: RCFGBuilder took 189.20 ms. Allocated memory is still 299.4 MB. Free memory was 248.7 MB in the beginning and 236.2 MB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 5.3 GB. [2018-01-21 10:32:30,233 INFO L168 Benchmark]: TraceAbstraction took 55427.47 ms. Allocated memory was 299.4 MB in the beginning and 831.5 MB in the end (delta: 532.2 MB). Free memory was 236.2 MB in the beginning and 454.3 MB in the end (delta: -218.1 MB). Peak memory consumption was 314.0 MB. Max. memory is 5.3 GB. [2018-01-21 10:32:30,235 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 299.4 MB. Free memory is still 262.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 177.38 ms. Allocated memory is still 299.4 MB. Free memory was 256.7 MB in the beginning and 248.7 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 33.06 ms. Allocated memory is still 299.4 MB. Free memory is still 248.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * RCFGBuilder took 189.20 ms. Allocated memory is still 299.4 MB. Free memory was 248.7 MB in the beginning and 236.2 MB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 55427.47 ms. Allocated memory was 299.4 MB in the beginning and 831.5 MB in the end (delta: 532.2 MB). Free memory was 236.2 MB in the beginning and 454.3 MB in the end (delta: -218.1 MB). Peak memory consumption was 314.0 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 18 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 126 LocStat_NO_SUPPORTING_DISEQUALITIES : 29 LocStat_NO_DISJUNCTIONS : -36 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 25 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 35 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 25 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.391694 RENAME_VARIABLES(MILLISECONDS) : 0.181205 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.332290 PROJECTAWAY(MILLISECONDS) : 0.119765 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.160567 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.230888 ADD_EQUALITY(MILLISECONDS) : 0.092838 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.020262 #CONJOIN_DISJUNCTIVE : 34 #RENAME_VARIABLES : 64 #UNFREEZE : 0 #CONJOIN : 64 #PROJECTAWAY : 66 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 64 #ADD_EQUALITY : 35 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 58 with TraceHistMax 39, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 70 known predicates. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. TIMEOUT Result, 55.2s OverallTime, 40 OverallIterations, 39 TraceHistogramMax, 2.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 666 SDtfs, 78 SDslu, 9751 SDs, 0 SdLazy, 1566 SolverSat, 55 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 6560 GetRequests, 4771 SyntacticMatches, 76 SemanticMatches, 1713 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4559 ImplicationChecksByTransitivity, 30.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=58occurred in iteration=39, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.3s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 39 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 3.2s SatisfiabilityAnalysisTime, 45.8s InterpolantComputationTime, 4293 NumberOfCodeBlocks, 4293 NumberOfCodeBlocksAsserted, 507 NumberOfCheckSat, 6952 ConstructedInterpolants, 0 QuantifiedInterpolants, 1024624 SizeOfPredicates, 76 NumberOfNonLiveVariables, 9386 ConjunctsInSsa, 1710 ConjunctsInUnsatCore, 191 InterpolantComputations, 1 PerfectInterpolantSequences, 0/49400 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 25]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 25). Cancelled while IsEmpty was searching accepting run (input had 22 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_10-32-30-242.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_10-32-30-242.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_10-32-30-242.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_10-32-30-242.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_10-32-30-242.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_10-32-30-242.csv Completed graceful shutdown