java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test15_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 12:27:13,992 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 12:27:13,994 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 12:27:14,006 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 12:27:14,006 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 12:27:14,007 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 12:27:14,009 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 12:27:14,010 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 12:27:14,013 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 12:27:14,013 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 12:27:14,014 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 12:27:14,014 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 12:27:14,015 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 12:27:14,017 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 12:27:14,018 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 12:27:14,020 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 12:27:14,022 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 12:27:14,024 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 12:27:14,026 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 12:27:14,027 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 12:27:14,029 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 12:27:14,030 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 12:27:14,030 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 12:27:14,031 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 12:27:14,032 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 12:27:14,033 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 12:27:14,033 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 12:27:14,034 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 12:27:14,034 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 12:27:14,034 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 12:27:14,035 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 12:27:14,035 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf [2018-01-24 12:27:14,045 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 12:27:14,046 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 12:27:14,046 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 12:27:14,047 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 12:27:14,047 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 12:27:14,047 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 12:27:14,047 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 12:27:14,048 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 12:27:14,048 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 12:27:14,048 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 12:27:14,049 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 12:27:14,049 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 12:27:14,049 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 12:27:14,049 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 12:27:14,049 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 12:27:14,050 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 12:27:14,050 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 12:27:14,050 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 12:27:14,050 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 12:27:14,050 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 12:27:14,051 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 12:27:14,051 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 12:27:14,051 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 12:27:14,051 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 12:27:14,051 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 12:27:14,052 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 12:27:14,052 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 12:27:14,052 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 12:27:14,052 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-24 12:27:14,053 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 12:27:14,053 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 12:27:14,053 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 12:27:14,054 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 12:27:14,054 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 12:27:14,089 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 12:27:14,101 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 12:27:14,105 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 12:27:14,107 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 12:27:14,108 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 12:27:14,108 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test15_true-valid-memsafety_true-termination.i [2018-01-24 12:27:14,311 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 12:27:14,316 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 12:27:14,317 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 12:27:14,317 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 12:27:14,322 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 12:27:14,323 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 12:27:14" (1/1) ... [2018-01-24 12:27:14,326 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@388a8c3f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:27:14, skipping insertion in model container [2018-01-24 12:27:14,327 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 12:27:14" (1/1) ... [2018-01-24 12:27:14,346 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 12:27:14,400 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 12:27:14,531 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 12:27:14,559 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 12:27:14,573 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:27:14 WrapperNode [2018-01-24 12:27:14,573 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 12:27:14,574 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 12:27:14,574 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 12:27:14,574 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 12:27:14,585 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:27:14" (1/1) ... [2018-01-24 12:27:14,586 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:27:14" (1/1) ... [2018-01-24 12:27:14,598 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:27:14" (1/1) ... [2018-01-24 12:27:14,598 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:27:14" (1/1) ... [2018-01-24 12:27:14,608 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:27:14" (1/1) ... [2018-01-24 12:27:14,612 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:27:14" (1/1) ... [2018-01-24 12:27:14,614 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:27:14" (1/1) ... [2018-01-24 12:27:14,618 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 12:27:14,619 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 12:27:14,619 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 12:27:14,619 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 12:27:14,620 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:27:14" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 12:27:14,672 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 12:27:14,673 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 12:27:14,673 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive [2018-01-24 12:27:14,673 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 12:27:14,673 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_zalloc [2018-01-24 12:27:14,673 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-01-24 12:27:14,673 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-01-24 12:27:14,673 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_hid_get_drvdata [2018-01-24 12:27:14,673 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_hid_set_drvdata [2018-01-24 12:27:14,673 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_init_arvo_device_struct [2018-01-24 12:27:14,674 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_init_specials [2018-01-24 12:27:14,674 INFO L136 BoogieDeclarations]: Found implementation of procedure lvd_arvo_remove_specials [2018-01-24 12:27:14,674 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_probe [2018-01-24 12:27:14,674 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_remove [2018-01-24 12:27:14,674 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 12:27:14,674 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 12:27:14,674 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 12:27:14,674 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 12:27:14,674 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 12:27:14,674 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 12:27:14,675 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 12:27:14,675 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 12:27:14,675 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 12:27:14,675 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-01-24 12:27:14,675 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-01-24 12:27:14,675 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 12:27:14,675 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-01-24 12:27:14,675 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 12:27:14,675 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 12:27:14,676 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_nonpositive [2018-01-24 12:27:14,676 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 12:27:14,676 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_zalloc [2018-01-24 12:27:14,676 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-01-24 12:27:14,676 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-01-24 12:27:14,676 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_hid_get_drvdata [2018-01-24 12:27:14,676 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_hid_set_drvdata [2018-01-24 12:27:14,676 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_init_arvo_device_struct [2018-01-24 12:27:14,676 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_init_specials [2018-01-24 12:27:14,676 INFO L128 BoogieDeclarations]: Found specification of procedure lvd_arvo_remove_specials [2018-01-24 12:27:14,677 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_probe [2018-01-24 12:27:14,677 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_remove [2018-01-24 12:27:14,677 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 12:27:14,677 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 12:27:14,677 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 12:27:14,677 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 12:27:15,239 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 12:27:15,240 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 12:27:15 BoogieIcfgContainer [2018-01-24 12:27:15,240 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 12:27:15,242 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 12:27:15,242 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 12:27:15,244 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 12:27:15,244 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 12:27:14" (1/3) ... [2018-01-24 12:27:15,246 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4f766fbf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 12:27:15, skipping insertion in model container [2018-01-24 12:27:15,246 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:27:14" (2/3) ... [2018-01-24 12:27:15,246 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4f766fbf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 12:27:15, skipping insertion in model container [2018-01-24 12:27:15,247 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 12:27:15" (3/3) ... [2018-01-24 12:27:15,249 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test15_true-valid-memsafety_true-termination.i [2018-01-24 12:27:15,258 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 12:27:15,265 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 45 error locations. [2018-01-24 12:27:15,311 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 12:27:15,312 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 12:27:15,312 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 12:27:15,312 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 12:27:15,312 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 12:27:15,312 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 12:27:15,313 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 12:27:15,313 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 12:27:15,314 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 12:27:15,336 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states. [2018-01-24 12:27:15,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-01-24 12:27:15,341 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:15,342 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:15,343 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:15,347 INFO L82 PathProgramCache]: Analyzing trace with hash -26265707, now seen corresponding path program 1 times [2018-01-24 12:27:15,349 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:15,349 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:15,400 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:15,401 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:15,401 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:15,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:15,466 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:15,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:27:15,633 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:27:15,633 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 12:27:15,635 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 12:27:15,647 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 12:27:15,648 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:27:15,649 INFO L87 Difference]: Start difference. First operand 173 states. Second operand 3 states. [2018-01-24 12:27:15,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:27:15,921 INFO L93 Difference]: Finished difference Result 231 states and 260 transitions. [2018-01-24 12:27:15,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 12:27:15,923 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2018-01-24 12:27:15,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:27:15,938 INFO L225 Difference]: With dead ends: 231 [2018-01-24 12:27:15,938 INFO L226 Difference]: Without dead ends: 224 [2018-01-24 12:27:15,942 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:27:15,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-01-24 12:27:15,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 174. [2018-01-24 12:27:15,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-01-24 12:27:15,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 190 transitions. [2018-01-24 12:27:15,989 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 190 transitions. Word has length 16 [2018-01-24 12:27:15,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:27:15,989 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 190 transitions. [2018-01-24 12:27:15,990 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 12:27:15,990 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 190 transitions. [2018-01-24 12:27:15,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-24 12:27:15,991 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:15,991 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:15,991 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:15,991 INFO L82 PathProgramCache]: Analyzing trace with hash -325108585, now seen corresponding path program 1 times [2018-01-24 12:27:15,991 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:15,991 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:15,993 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:15,993 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:15,993 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:16,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:16,012 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:16,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:27:16,093 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:27:16,093 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:27:16,094 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:27:16,095 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:27:16,095 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:27:16,095 INFO L87 Difference]: Start difference. First operand 174 states and 190 transitions. Second operand 6 states. [2018-01-24 12:27:16,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:27:16,214 INFO L93 Difference]: Finished difference Result 219 states and 244 transitions. [2018-01-24 12:27:16,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:27:16,214 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-01-24 12:27:16,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:27:16,217 INFO L225 Difference]: With dead ends: 219 [2018-01-24 12:27:16,217 INFO L226 Difference]: Without dead ends: 215 [2018-01-24 12:27:16,218 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:27:16,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states. [2018-01-24 12:27:16,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 170. [2018-01-24 12:27:16,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-01-24 12:27:16,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 183 transitions. [2018-01-24 12:27:16,239 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 183 transitions. Word has length 18 [2018-01-24 12:27:16,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:27:16,239 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 183 transitions. [2018-01-24 12:27:16,239 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:27:16,239 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 183 transitions. [2018-01-24 12:27:16,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-24 12:27:16,240 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:16,240 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:16,240 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:16,241 INFO L82 PathProgramCache]: Analyzing trace with hash 743711378, now seen corresponding path program 1 times [2018-01-24 12:27:16,241 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:16,241 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:16,242 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:16,243 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:16,243 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:16,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:16,259 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:16,327 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:27:16,328 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:27:16,328 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:27:16,344 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:16,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:16,388 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:27:16,421 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:27:16,442 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:27:16,442 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4] total 8 [2018-01-24 12:27:16,443 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 12:27:16,443 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 12:27:16,443 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:27:16,443 INFO L87 Difference]: Start difference. First operand 170 states and 183 transitions. Second operand 8 states. [2018-01-24 12:27:16,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:27:16,490 INFO L93 Difference]: Finished difference Result 335 states and 362 transitions. [2018-01-24 12:27:16,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:27:16,491 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-01-24 12:27:16,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:27:16,493 INFO L225 Difference]: With dead ends: 335 [2018-01-24 12:27:16,493 INFO L226 Difference]: Without dead ends: 172 [2018-01-24 12:27:16,495 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:27:16,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-01-24 12:27:16,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 172. [2018-01-24 12:27:16,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-01-24 12:27:16,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 186 transitions. [2018-01-24 12:27:16,511 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 186 transitions. Word has length 21 [2018-01-24 12:27:16,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:27:16,512 INFO L432 AbstractCegarLoop]: Abstraction has 172 states and 186 transitions. [2018-01-24 12:27:16,512 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 12:27:16,512 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 186 transitions. [2018-01-24 12:27:16,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-24 12:27:16,513 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:16,513 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:16,513 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:16,513 INFO L82 PathProgramCache]: Analyzing trace with hash 667479760, now seen corresponding path program 1 times [2018-01-24 12:27:16,514 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:16,514 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:16,515 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:16,515 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:16,516 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:16,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:16,531 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:16,606 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:27:16,606 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:27:16,607 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:27:16,616 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:16,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:16,638 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:27:16,653 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:27:16,674 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:27:16,674 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-01-24 12:27:16,674 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:27:16,674 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:27:16,675 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:27:16,675 INFO L87 Difference]: Start difference. First operand 172 states and 186 transitions. Second operand 6 states. [2018-01-24 12:27:16,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:27:16,774 INFO L93 Difference]: Finished difference Result 172 states and 186 transitions. [2018-01-24 12:27:16,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:27:16,775 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-01-24 12:27:16,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:27:16,777 INFO L225 Difference]: With dead ends: 172 [2018-01-24 12:27:16,777 INFO L226 Difference]: Without dead ends: 171 [2018-01-24 12:27:16,778 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 21 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:27:16,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-01-24 12:27:16,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 171. [2018-01-24 12:27:16,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-01-24 12:27:16,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 185 transitions. [2018-01-24 12:27:16,793 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 185 transitions. Word has length 23 [2018-01-24 12:27:16,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:27:16,793 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 185 transitions. [2018-01-24 12:27:16,793 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:27:16,794 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 185 transitions. [2018-01-24 12:27:16,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-24 12:27:16,795 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:16,795 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:16,795 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:16,795 INFO L82 PathProgramCache]: Analyzing trace with hash 667479761, now seen corresponding path program 1 times [2018-01-24 12:27:16,795 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:16,796 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:16,797 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:16,797 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:16,797 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:16,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:16,810 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:16,921 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:27:16,921 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:27:16,921 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:27:16,930 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:16,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:16,954 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:27:16,977 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 12:27:16,979 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:16,981 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:27:16,981 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 12:27:17,027 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:27:17,048 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:27:17,048 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-01-24 12:27:17,049 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 12:27:17,049 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 12:27:17,049 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:27:17,049 INFO L87 Difference]: Start difference. First operand 171 states and 185 transitions. Second operand 7 states. [2018-01-24 12:27:17,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:27:17,493 INFO L93 Difference]: Finished difference Result 218 states and 240 transitions. [2018-01-24 12:27:17,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:27:17,493 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-01-24 12:27:17,494 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:27:17,495 INFO L225 Difference]: With dead ends: 218 [2018-01-24 12:27:17,495 INFO L226 Difference]: Without dead ends: 216 [2018-01-24 12:27:17,495 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 21 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:27:17,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-01-24 12:27:17,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 184. [2018-01-24 12:27:17,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-01-24 12:27:17,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 211 transitions. [2018-01-24 12:27:17,512 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 211 transitions. Word has length 23 [2018-01-24 12:27:17,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:27:17,512 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 211 transitions. [2018-01-24 12:27:17,512 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 12:27:17,512 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 211 transitions. [2018-01-24 12:27:17,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-24 12:27:17,513 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:17,513 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:17,513 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:17,514 INFO L82 PathProgramCache]: Analyzing trace with hash -314305773, now seen corresponding path program 1 times [2018-01-24 12:27:17,514 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:17,514 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:17,515 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:17,515 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:17,515 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:17,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:17,528 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:17,569 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 12:27:17,569 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:27:17,569 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:27:17,569 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:27:17,570 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:27:17,570 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:27:17,570 INFO L87 Difference]: Start difference. First operand 184 states and 211 transitions. Second operand 6 states. [2018-01-24 12:27:17,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:27:17,691 INFO L93 Difference]: Finished difference Result 226 states and 257 transitions. [2018-01-24 12:27:17,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:27:17,692 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-01-24 12:27:17,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:27:17,694 INFO L225 Difference]: With dead ends: 226 [2018-01-24 12:27:17,694 INFO L226 Difference]: Without dead ends: 220 [2018-01-24 12:27:17,694 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:27:17,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-01-24 12:27:17,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 184. [2018-01-24 12:27:17,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-01-24 12:27:17,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 210 transitions. [2018-01-24 12:27:17,707 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 210 transitions. Word has length 25 [2018-01-24 12:27:17,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:27:17,707 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 210 transitions. [2018-01-24 12:27:17,707 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:27:17,707 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 210 transitions. [2018-01-24 12:27:17,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-24 12:27:17,708 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:17,708 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:17,708 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:17,708 INFO L82 PathProgramCache]: Analyzing trace with hash -808960356, now seen corresponding path program 1 times [2018-01-24 12:27:17,708 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:17,708 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:17,709 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:17,709 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:17,709 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:17,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:17,725 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:17,866 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:27:17,866 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:27:17,866 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:27:17,873 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:17,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:17,888 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:27:18,005 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:27:18,039 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:27:18,039 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 8] total 12 [2018-01-24 12:27:18,040 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 12:27:18,040 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 12:27:18,040 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=122, Unknown=9, NotChecked=0, Total=156 [2018-01-24 12:27:18,040 INFO L87 Difference]: Start difference. First operand 184 states and 210 transitions. Second operand 13 states. [2018-01-24 12:27:19,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:27:19,398 INFO L93 Difference]: Finished difference Result 221 states and 243 transitions. [2018-01-24 12:27:19,398 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 12:27:19,398 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 26 [2018-01-24 12:27:19,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:27:19,400 INFO L225 Difference]: With dead ends: 221 [2018-01-24 12:27:19,400 INFO L226 Difference]: Without dead ends: 216 [2018-01-24 12:27:19,400 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 24 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=50, Invalid=247, Unknown=9, NotChecked=0, Total=306 [2018-01-24 12:27:19,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-01-24 12:27:19,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 183. [2018-01-24 12:27:19,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-01-24 12:27:19,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 208 transitions. [2018-01-24 12:27:19,414 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 208 transitions. Word has length 26 [2018-01-24 12:27:19,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:27:19,414 INFO L432 AbstractCegarLoop]: Abstraction has 183 states and 208 transitions. [2018-01-24 12:27:19,414 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 12:27:19,415 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 208 transitions. [2018-01-24 12:27:19,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-24 12:27:19,416 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:19,416 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:19,416 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:19,416 INFO L82 PathProgramCache]: Analyzing trace with hash 437179314, now seen corresponding path program 1 times [2018-01-24 12:27:19,416 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:19,417 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:19,418 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:19,418 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:19,418 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:19,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:19,430 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:19,494 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-01-24 12:27:19,495 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:27:19,495 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:27:19,509 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:19,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:19,533 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:27:19,546 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:27:19,582 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:27:19,582 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2018-01-24 12:27:19,582 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 12:27:19,583 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 12:27:19,583 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:27:19,583 INFO L87 Difference]: Start difference. First operand 183 states and 208 transitions. Second operand 5 states. [2018-01-24 12:27:19,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:27:19,616 INFO L93 Difference]: Finished difference Result 341 states and 374 transitions. [2018-01-24 12:27:19,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 12:27:19,617 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2018-01-24 12:27:19,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:27:19,618 INFO L225 Difference]: With dead ends: 341 [2018-01-24 12:27:19,618 INFO L226 Difference]: Without dead ends: 171 [2018-01-24 12:27:19,620 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 27 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:27:19,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-01-24 12:27:19,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 171. [2018-01-24 12:27:19,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-01-24 12:27:19,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 183 transitions. [2018-01-24 12:27:19,633 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 183 transitions. Word has length 28 [2018-01-24 12:27:19,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:27:19,633 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 183 transitions. [2018-01-24 12:27:19,633 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 12:27:19,633 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 183 transitions. [2018-01-24 12:27:19,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 12:27:19,634 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:19,635 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:19,635 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:19,635 INFO L82 PathProgramCache]: Analyzing trace with hash 1753876656, now seen corresponding path program 2 times [2018-01-24 12:27:19,635 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:19,635 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:19,636 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:19,637 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:19,637 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:19,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:19,650 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:19,704 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 9 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 12:27:19,704 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:27:19,705 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:27:19,716 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:27:19,732 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:27:19,757 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:27:19,760 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:27:19,763 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:27:19,769 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 12:27:19,770 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:19,774 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:27:19,775 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 12:27:19,797 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 9 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 12:27:19,819 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:27:19,819 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-01-24 12:27:19,819 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 12:27:19,820 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 12:27:19,820 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:27:19,820 INFO L87 Difference]: Start difference. First operand 171 states and 183 transitions. Second operand 7 states. [2018-01-24 12:27:20,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:27:20,180 INFO L93 Difference]: Finished difference Result 194 states and 210 transitions. [2018-01-24 12:27:20,180 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:27:20,181 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 30 [2018-01-24 12:27:20,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:27:20,182 INFO L225 Difference]: With dead ends: 194 [2018-01-24 12:27:20,182 INFO L226 Difference]: Without dead ends: 189 [2018-01-24 12:27:20,183 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 29 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:27:20,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-01-24 12:27:20,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 186. [2018-01-24 12:27:20,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-24 12:27:20,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 205 transitions. [2018-01-24 12:27:20,196 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 205 transitions. Word has length 30 [2018-01-24 12:27:20,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:27:20,197 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 205 transitions. [2018-01-24 12:27:20,197 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 12:27:20,197 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 205 transitions. [2018-01-24 12:27:20,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 12:27:20,198 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:20,198 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:20,198 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:20,198 INFO L82 PathProgramCache]: Analyzing trace with hash 1753876657, now seen corresponding path program 1 times [2018-01-24 12:27:20,198 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:20,198 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:20,200 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:20,200 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:27:20,200 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:20,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:20,214 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:20,482 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 10 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-01-24 12:27:20,482 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:27:20,482 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:27:20,496 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:20,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:20,530 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:27:20,562 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:27:20,562 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:20,581 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:27:20,582 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:20,598 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-24 12:27:20,599 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-01-24 12:27:20,688 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 10 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-01-24 12:27:20,710 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:27:20,710 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-01-24 12:27:20,710 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 12:27:20,710 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 12:27:20,711 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:27:20,711 INFO L87 Difference]: Start difference. First operand 186 states and 205 transitions. Second operand 13 states. [2018-01-24 12:27:21,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:27:21,263 INFO L93 Difference]: Finished difference Result 221 states and 247 transitions. [2018-01-24 12:27:21,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 12:27:21,263 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 30 [2018-01-24 12:27:21,264 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:27:21,265 INFO L225 Difference]: With dead ends: 221 [2018-01-24 12:27:21,265 INFO L226 Difference]: Without dead ends: 216 [2018-01-24 12:27:21,265 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 26 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=48, Invalid=192, Unknown=0, NotChecked=0, Total=240 [2018-01-24 12:27:21,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-01-24 12:27:21,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 204. [2018-01-24 12:27:21,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-01-24 12:27:21,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 236 transitions. [2018-01-24 12:27:21,278 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 236 transitions. Word has length 30 [2018-01-24 12:27:21,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:27:21,279 INFO L432 AbstractCegarLoop]: Abstraction has 204 states and 236 transitions. [2018-01-24 12:27:21,279 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 12:27:21,279 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 236 transitions. [2018-01-24 12:27:21,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-24 12:27:21,279 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:21,279 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:21,279 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:21,280 INFO L82 PathProgramCache]: Analyzing trace with hash 1756950194, now seen corresponding path program 1 times [2018-01-24 12:27:21,280 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:21,280 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:21,280 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:21,281 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:21,281 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:21,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:21,293 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:21,410 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 12:27:21,410 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:27:21,411 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:27:21,422 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:21,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:21,452 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:27:21,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 12:27:21,457 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:21,458 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:27:21,458 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 12:27:21,509 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:21,510 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:21,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-01-24 12:27:21,514 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:21,519 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:27:21,519 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-01-24 12:27:21,533 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 3 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 12:27:21,554 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:27:21,554 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 10 [2018-01-24 12:27:21,555 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 12:27:21,555 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 12:27:21,555 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=86, Unknown=1, NotChecked=0, Total=110 [2018-01-24 12:27:21,555 INFO L87 Difference]: Start difference. First operand 204 states and 236 transitions. Second operand 11 states. [2018-01-24 12:27:22,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:27:22,299 INFO L93 Difference]: Finished difference Result 225 states and 257 transitions. [2018-01-24 12:27:22,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 12:27:22,300 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 32 [2018-01-24 12:27:22,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:27:22,302 INFO L225 Difference]: With dead ends: 225 [2018-01-24 12:27:22,302 INFO L226 Difference]: Without dead ends: 223 [2018-01-24 12:27:22,302 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 28 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=37, Invalid=118, Unknown=1, NotChecked=0, Total=156 [2018-01-24 12:27:22,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-01-24 12:27:22,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 210. [2018-01-24 12:27:22,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2018-01-24 12:27:22,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 244 transitions. [2018-01-24 12:27:22,320 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 244 transitions. Word has length 32 [2018-01-24 12:27:22,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:27:22,320 INFO L432 AbstractCegarLoop]: Abstraction has 210 states and 244 transitions. [2018-01-24 12:27:22,320 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 12:27:22,320 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 244 transitions. [2018-01-24 12:27:22,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-24 12:27:22,321 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:22,321 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:22,321 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:22,321 INFO L82 PathProgramCache]: Analyzing trace with hash 1756950195, now seen corresponding path program 1 times [2018-01-24 12:27:22,321 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:22,322 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:22,323 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:22,323 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:22,323 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:22,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:22,336 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:22,576 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-01-24 12:27:22,576 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:27:22,576 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:27:22,582 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:22,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:22,603 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:27:22,623 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-01-24 12:27:22,624 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:22,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-01-24 12:27:22,650 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:22,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-01-24 12:27:22,680 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:22,684 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-01-24 12:27:22,684 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:22,717 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-24 12:27:22,717 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-01-24 12:27:22,874 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:22,875 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:22,876 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28 [2018-01-24 12:27:22,876 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:22,898 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:22,899 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 37 [2018-01-24 12:27:22,899 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:22,921 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:22,922 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:22,923 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26 [2018-01-24 12:27:22,923 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:22,939 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-01-24 12:27:22,940 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:22,955 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-01-24 12:27:22,955 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:67, output treesize:49 [2018-01-24 12:27:23,009 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 12 proven. 5 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-01-24 12:27:23,030 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:27:23,030 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 17 [2018-01-24 12:27:23,031 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 12:27:23,031 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 12:27:23,031 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=261, Unknown=1, NotChecked=0, Total=306 [2018-01-24 12:27:23,031 INFO L87 Difference]: Start difference. First operand 210 states and 244 transitions. Second operand 18 states. [2018-01-24 12:27:23,274 WARN L146 SmtUtils]: Spent 104ms on a formula simplification. DAG size of input: 68 DAG size of output 65 [2018-01-24 12:27:38,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:27:38,228 INFO L93 Difference]: Finished difference Result 229 states and 259 transitions. [2018-01-24 12:27:38,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 12:27:38,228 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 32 [2018-01-24 12:27:38,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:27:38,230 INFO L225 Difference]: With dead ends: 229 [2018-01-24 12:27:38,230 INFO L226 Difference]: Without dead ends: 224 [2018-01-24 12:27:38,231 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 26 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 60 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=77, Invalid=384, Unknown=1, NotChecked=0, Total=462 [2018-01-24 12:27:38,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-01-24 12:27:38,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 179. [2018-01-24 12:27:38,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-01-24 12:27:38,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 195 transitions. [2018-01-24 12:27:38,252 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 195 transitions. Word has length 32 [2018-01-24 12:27:38,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:27:38,252 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 195 transitions. [2018-01-24 12:27:38,252 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 12:27:38,252 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 195 transitions. [2018-01-24 12:27:38,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 12:27:38,253 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:38,253 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:38,253 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:38,253 INFO L82 PathProgramCache]: Analyzing trace with hash 860002885, now seen corresponding path program 1 times [2018-01-24 12:27:38,254 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:38,254 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:38,255 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:38,255 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:38,255 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:38,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:38,268 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:38,456 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 7 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:27:38,457 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:27:38,457 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:27:38,466 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:38,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:38,491 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:27:38,494 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 12:27:38,494 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:38,499 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:27:38,499 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 12:27:38,546 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:38,546 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:38,547 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-01-24 12:27:38,548 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:38,554 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:27:38,555 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-01-24 12:27:38,642 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:38,644 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-01-24 12:27:38,644 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:38,652 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:27:38,653 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:25, output treesize:15 [2018-01-24 12:27:38,686 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 8 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:27:38,737 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:27:38,737 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 16 [2018-01-24 12:27:38,737 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 12:27:38,737 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 12:27:38,738 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=232, Unknown=0, NotChecked=0, Total=272 [2018-01-24 12:27:38,738 INFO L87 Difference]: Start difference. First operand 179 states and 195 transitions. Second operand 17 states. [2018-01-24 12:27:39,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:27:39,404 INFO L93 Difference]: Finished difference Result 195 states and 215 transitions. [2018-01-24 12:27:39,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:27:39,405 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 35 [2018-01-24 12:27:39,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:27:39,406 INFO L225 Difference]: With dead ends: 195 [2018-01-24 12:27:39,406 INFO L226 Difference]: Without dead ends: 193 [2018-01-24 12:27:39,406 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 28 SyntacticMatches, 5 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=70, Invalid=392, Unknown=0, NotChecked=0, Total=462 [2018-01-24 12:27:39,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-01-24 12:27:39,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 179. [2018-01-24 12:27:39,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-01-24 12:27:39,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 195 transitions. [2018-01-24 12:27:39,428 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 195 transitions. Word has length 35 [2018-01-24 12:27:39,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:27:39,428 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 195 transitions. [2018-01-24 12:27:39,429 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 12:27:39,429 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 195 transitions. [2018-01-24 12:27:39,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 12:27:39,429 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:39,429 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:39,429 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:39,430 INFO L82 PathProgramCache]: Analyzing trace with hash 890317459, now seen corresponding path program 1 times [2018-01-24 12:27:39,430 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:39,430 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:39,431 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:39,431 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:39,431 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:39,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:39,442 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:39,520 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 12:27:39,521 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:27:39,521 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:27:39,521 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:27:39,521 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:27:39,521 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:27:39,521 INFO L87 Difference]: Start difference. First operand 179 states and 195 transitions. Second operand 6 states. [2018-01-24 12:27:39,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:27:39,632 INFO L93 Difference]: Finished difference Result 339 states and 368 transitions. [2018-01-24 12:27:39,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:27:39,633 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 36 [2018-01-24 12:27:39,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:27:39,634 INFO L225 Difference]: With dead ends: 339 [2018-01-24 12:27:39,634 INFO L226 Difference]: Without dead ends: 187 [2018-01-24 12:27:39,635 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:27:39,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-01-24 12:27:39,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 183. [2018-01-24 12:27:39,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-01-24 12:27:39,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 199 transitions. [2018-01-24 12:27:39,656 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 199 transitions. Word has length 36 [2018-01-24 12:27:39,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:27:39,657 INFO L432 AbstractCegarLoop]: Abstraction has 183 states and 199 transitions. [2018-01-24 12:27:39,657 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:27:39,657 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 199 transitions. [2018-01-24 12:27:39,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-24 12:27:39,658 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:39,658 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:39,658 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:39,658 INFO L82 PathProgramCache]: Analyzing trace with hash 866086568, now seen corresponding path program 1 times [2018-01-24 12:27:39,658 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:39,658 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:39,659 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:39,659 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:39,660 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:39,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:39,673 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:40,174 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 12:27:40,174 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:27:40,174 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:27:40,186 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:40,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:40,215 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:27:40,620 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 12:27:40,654 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:27:40,654 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 12] total 19 [2018-01-24 12:27:40,654 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 12:27:40,654 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 12:27:40,655 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=329, Unknown=8, NotChecked=0, Total=380 [2018-01-24 12:27:40,655 INFO L87 Difference]: Start difference. First operand 183 states and 199 transitions. Second operand 20 states. [2018-01-24 12:27:42,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:27:42,023 INFO L93 Difference]: Finished difference Result 196 states and 212 transitions. [2018-01-24 12:27:42,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 12:27:42,023 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 38 [2018-01-24 12:27:42,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:27:42,024 INFO L225 Difference]: With dead ends: 196 [2018-01-24 12:27:42,024 INFO L226 Difference]: Without dead ends: 184 [2018-01-24 12:27:42,025 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 34 SyntacticMatches, 5 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=89, Invalid=659, Unknown=8, NotChecked=0, Total=756 [2018-01-24 12:27:42,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-24 12:27:42,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 177. [2018-01-24 12:27:42,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-01-24 12:27:42,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 192 transitions. [2018-01-24 12:27:42,040 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 192 transitions. Word has length 38 [2018-01-24 12:27:42,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:27:42,040 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 192 transitions. [2018-01-24 12:27:42,040 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 12:27:42,040 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 192 transitions. [2018-01-24 12:27:42,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-24 12:27:42,040 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:42,041 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:42,041 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:42,041 INFO L82 PathProgramCache]: Analyzing trace with hash 499648277, now seen corresponding path program 1 times [2018-01-24 12:27:42,041 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:42,041 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:42,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:42,042 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:42,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:42,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:42,050 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:42,096 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-01-24 12:27:42,096 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:27:42,096 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:27:42,096 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 12:27:42,096 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 12:27:42,096 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:27:42,096 INFO L87 Difference]: Start difference. First operand 177 states and 192 transitions. Second operand 7 states. [2018-01-24 12:27:42,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:27:42,330 INFO L93 Difference]: Finished difference Result 177 states and 192 transitions. [2018-01-24 12:27:42,331 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 12:27:42,331 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 38 [2018-01-24 12:27:42,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:27:42,332 INFO L225 Difference]: With dead ends: 177 [2018-01-24 12:27:42,332 INFO L226 Difference]: Without dead ends: 176 [2018-01-24 12:27:42,333 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:27:42,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-01-24 12:27:42,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2018-01-24 12:27:42,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-24 12:27:42,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 191 transitions. [2018-01-24 12:27:42,353 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 191 transitions. Word has length 38 [2018-01-24 12:27:42,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:27:42,353 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 191 transitions. [2018-01-24 12:27:42,353 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 12:27:42,353 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 191 transitions. [2018-01-24 12:27:42,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-24 12:27:42,354 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:42,354 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:42,354 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:42,354 INFO L82 PathProgramCache]: Analyzing trace with hash 499648278, now seen corresponding path program 1 times [2018-01-24 12:27:42,354 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:42,355 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:42,355 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:42,356 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:42,356 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:42,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:42,368 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:42,500 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-01-24 12:27:42,500 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:27:42,500 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 12:27:42,500 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 12:27:42,501 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 12:27:42,501 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:27:42,501 INFO L87 Difference]: Start difference. First operand 176 states and 191 transitions. Second operand 8 states. [2018-01-24 12:27:42,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:27:42,784 INFO L93 Difference]: Finished difference Result 178 states and 193 transitions. [2018-01-24 12:27:42,785 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:27:42,785 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 38 [2018-01-24 12:27:42,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:27:42,786 INFO L225 Difference]: With dead ends: 178 [2018-01-24 12:27:42,786 INFO L226 Difference]: Without dead ends: 177 [2018-01-24 12:27:42,787 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2018-01-24 12:27:42,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-01-24 12:27:42,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 175. [2018-01-24 12:27:42,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-01-24 12:27:42,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 190 transitions. [2018-01-24 12:27:42,806 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 190 transitions. Word has length 38 [2018-01-24 12:27:42,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:27:42,806 INFO L432 AbstractCegarLoop]: Abstraction has 175 states and 190 transitions. [2018-01-24 12:27:42,806 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 12:27:42,806 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 190 transitions. [2018-01-24 12:27:42,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 12:27:42,807 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:27:42,807 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:27:42,807 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]=== [2018-01-24 12:27:42,807 INFO L82 PathProgramCache]: Analyzing trace with hash -874341065, now seen corresponding path program 1 times [2018-01-24 12:27:42,808 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:27:42,808 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:27:42,808 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:42,809 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:42,809 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:27:42,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:42,826 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:27:43,249 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 12:27:43,249 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:27:43,283 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:27:43,291 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:27:43,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:27:43,329 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:27:43,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-01-24 12:27:43,352 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:43,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-01-24 12:27:43,382 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:43,403 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-01-24 12:27:43,404 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:43,405 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-01-24 12:27:43,405 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:43,421 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-24 12:27:43,421 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-01-24 12:27:43,593 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:43,594 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:43,595 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 44 [2018-01-24 12:27:43,596 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:43,626 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:43,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 41 [2018-01-24 12:27:43,628 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:43,652 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:43,653 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 47 [2018-01-24 12:27:43,653 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:43,676 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:43,677 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:43,677 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 41 [2018-01-24 12:27:43,678 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:43,699 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 4 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:27:43,699 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:79, output treesize:69 [2018-01-24 12:27:43,914 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:43,915 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:43,916 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:43,917 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:43,919 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:43,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 82 [2018-01-24 12:27:43,921 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:44,017 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,017 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,018 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,019 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 46 [2018-01-24 12:27:44,019 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:44,092 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,092 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,093 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,094 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 48 [2018-01-24 12:27:44,094 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:44,164 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,165 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 67 [2018-01-24 12:27:44,166 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:44,241 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 45 [2018-01-24 12:27:44,241 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:44,312 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,313 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,313 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,314 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,314 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 49 [2018-01-24 12:27:44,315 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:44,377 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,378 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,379 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,379 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-01-24 12:27:44,380 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:44,438 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,439 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,440 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:27:44,441 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 63 [2018-01-24 12:27:44,441 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:44,500 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 8 dim-1 vars, End of recursive call: 8 dim-0 vars, and 4 xjuncts. [2018-01-24 12:27:44,500 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 16 variables, input treesize:213, output treesize:165 [2018-01-24 12:27:46,605 WARN L143 SmtUtils]: Spent 2059ms on a formula simplification that was a NOOP. DAG size: 75 [2018-01-24 12:27:46,615 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 55 [2018-01-24 12:27:46,617 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 12:27:46,617 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:46,632 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:27:46,708 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 49 [2018-01-24 12:27:46,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 12:27:46,710 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:46,720 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:27:46,790 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 49 [2018-01-24 12:27:46,792 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 12:27:46,792 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:46,802 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:27:46,867 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 51 [2018-01-24 12:27:46,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 12:27:46,871 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-01-24 12:27:46,882 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:27:46,943 INFO L267 ElimStorePlain]: Start of recursive call 1: 12 dim-0 vars, 4 dim-2 vars, End of recursive call: 8 dim-0 vars, and 4 xjuncts. [2018-01-24 12:27:46,943 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 16 variables, input treesize:217, output treesize:213 [2018-01-24 12:27:47,104 WARN L143 SmtUtils]: Spent 105ms on a formula simplification that was a NOOP. DAG size: 80 [2018-01-24 12:27:47,124 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 47 [2018-01-24 12:27:47,127 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 12 [2018-01-24 12:27:47,128 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:27:47,138 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:27:47,195 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 43 [2018-01-24 12:27:47,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-01-24 12:27:47,197 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:27:47,206 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:27:47,262 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-24 12:27:47,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2018-01-24 12:27:47,264 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:27:47,275 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:27:47,332 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 49 [2018-01-24 12:27:47,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14 [2018-01-24 12:27:47,335 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:27:47,345 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:27:47,397 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 4 dim-2 vars, End of recursive call: 16 dim-0 vars, and 4 xjuncts. [2018-01-24 12:27:47,397 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 20 variables, input treesize:213, output treesize:165 [2018-01-24 12:28:07,947 WARN L146 SmtUtils]: Spent 17847ms on a formula simplification. DAG size of input: 91 DAG size of output 71 [2018-01-24 12:28:07,980 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 2 proven. 13 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 12:28:08,002 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:28:08,002 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 16] total 26 [2018-01-24 12:28:08,002 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-24 12:28:08,003 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-24 12:28:08,003 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=612, Unknown=3, NotChecked=0, Total=702 [2018-01-24 12:28:08,003 INFO L87 Difference]: Start difference. First operand 175 states and 190 transitions. Second operand 27 states. [2018-01-24 12:28:18,773 WARN L146 SmtUtils]: Spent 114ms on a formula simplification. DAG size of input: 88 DAG size of output 59 Received shutdown request... [2018-01-24 12:28:19,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 12:28:19,055 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-24 12:28:19,061 WARN L187 ceAbstractionStarter]: Timeout [2018-01-24 12:28:19,061 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.01 12:28:19 BoogieIcfgContainer [2018-01-24 12:28:19,061 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-24 12:28:19,062 INFO L168 Benchmark]: Toolchain (without parser) took 64750.80 ms. Allocated memory was 306.7 MB in the beginning and 620.2 MB in the end (delta: 313.5 MB). Free memory was 265.6 MB in the beginning and 469.4 MB in the end (delta: -203.8 MB). Peak memory consumption was 109.7 MB. Max. memory is 5.3 GB. [2018-01-24 12:28:19,063 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 306.7 MB. Free memory is still 272.6 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 12:28:19,063 INFO L168 Benchmark]: CACSL2BoogieTranslator took 256.53 ms. Allocated memory is still 306.7 MB. Free memory was 265.6 MB in the beginning and 250.7 MB in the end (delta: 15.0 MB). Peak memory consumption was 15.0 MB. Max. memory is 5.3 GB. [2018-01-24 12:28:19,064 INFO L168 Benchmark]: Boogie Preprocessor took 44.47 ms. Allocated memory is still 306.7 MB. Free memory was 250.7 MB in the beginning and 248.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-24 12:28:19,064 INFO L168 Benchmark]: RCFGBuilder took 621.52 ms. Allocated memory is still 306.7 MB. Free memory was 248.7 MB in the beginning and 207.6 MB in the end (delta: 41.1 MB). Peak memory consumption was 41.1 MB. Max. memory is 5.3 GB. [2018-01-24 12:28:19,064 INFO L168 Benchmark]: TraceAbstraction took 63819.52 ms. Allocated memory was 306.7 MB in the beginning and 620.2 MB in the end (delta: 313.5 MB). Free memory was 207.6 MB in the beginning and 469.4 MB in the end (delta: -261.8 MB). Peak memory consumption was 51.7 MB. Max. memory is 5.3 GB. [2018-01-24 12:28:19,066 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 306.7 MB. Free memory is still 272.6 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 256.53 ms. Allocated memory is still 306.7 MB. Free memory was 265.6 MB in the beginning and 250.7 MB in the end (delta: 15.0 MB). Peak memory consumption was 15.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 44.47 ms. Allocated memory is still 306.7 MB. Free memory was 250.7 MB in the beginning and 248.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 621.52 ms. Allocated memory is still 306.7 MB. Free memory was 248.7 MB in the beginning and 207.6 MB in the end (delta: 41.1 MB). Peak memory consumption was 41.1 MB. Max. memory is 5.3 GB. * TraceAbstraction took 63819.52 ms. Allocated memory was 306.7 MB in the beginning and 620.2 MB in the end (delta: 313.5 MB). Free memory was 207.6 MB in the beginning and 469.4 MB in the end (delta: -261.8 MB). Peak memory consumption was 51.7 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1463). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1479). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1463). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1479). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1533]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1533). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1526). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1513). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1513). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1524). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1524). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1514). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1528). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1524). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1526). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1528). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1514). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1524). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1454). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1455). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1456). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1456). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1454). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1455). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1484). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1484). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1490). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1490). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was constructing difference of abstraction (175states) and interpolant automaton (currently 12 states, 27 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 117. - StatisticsResult: Ultimate Automizer benchmark data CFG has 17 procedures, 173 locations, 45 error locations. TIMEOUT Result, 63.7s OverallTime, 18 OverallIterations, 3 TraceHistogramMax, 33.1s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2682 SDtfs, 1429 SDslu, 10170 SDs, 0 SdLazy, 9304 SolverSat, 345 SolverUnsat, 58 SolverUnknown, 0 SolverNotchecked, 27.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 554 GetRequests, 325 SyntacticMatches, 29 SemanticMatches, 199 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 468 ImplicationChecksByTransitivity, 29.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=210occurred in iteration=11, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 17 MinimizatonAttempts, 296 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 28.9s InterpolantComputationTime, 887 NumberOfCodeBlocks, 887 NumberOfCodeBlocksAsserted, 31 NumberOfCheckSat, 857 ConstructedInterpolants, 34 QuantifiedInterpolants, 261729 SizeOfPredicates, 40 NumberOfNonLiveVariables, 1547 ConjunctsInSsa, 243 ConjunctsInUnsatCore, 30 InterpolantComputations, 7 PerfectInterpolantSequences, 243/332 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test15_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_12-28-19-075.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test15_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-24_12-28-19-075.csv Completed graceful shutdown