java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 13:27:42,913 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 13:27:42,914 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 13:27:42,926 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 13:27:42,926 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 13:27:42,927 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 13:27:42,929 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 13:27:42,930 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 13:27:42,932 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 13:27:42,933 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 13:27:42,934 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 13:27:42,934 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 13:27:42,934 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 13:27:42,935 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 13:27:42,936 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 13:27:42,938 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 13:27:42,940 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 13:27:42,942 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 13:27:42,944 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 13:27:42,945 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 13:27:42,947 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 13:27:42,947 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 13:27:42,948 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 13:27:42,949 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 13:27:42,949 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 13:27:42,951 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 13:27:42,951 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 13:27:42,951 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 13:27:42,952 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 13:27:42,952 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 13:27:42,952 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 13:27:42,953 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf [2018-01-24 13:27:42,962 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 13:27:42,962 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 13:27:42,963 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 13:27:42,963 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 13:27:42,964 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 13:27:42,964 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 13:27:42,964 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 13:27:42,965 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 13:27:42,965 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 13:27:42,965 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 13:27:42,965 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 13:27:42,965 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 13:27:42,966 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 13:27:42,966 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 13:27:42,966 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 13:27:42,966 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 13:27:42,966 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 13:27:42,966 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 13:27:42,967 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 13:27:42,967 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 13:27:42,967 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 13:27:42,967 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 13:27:42,967 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 13:27:42,968 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 13:27:42,968 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 13:27:42,968 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 13:27:42,968 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 13:27:42,968 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 13:27:42,969 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-01-24 13:27:42,969 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 13:27:42,969 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 13:27:42,969 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 13:27:42,970 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 13:27:42,970 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 13:27:43,003 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 13:27:43,012 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 13:27:43,015 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 13:27:43,016 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 13:27:43,016 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 13:27:43,016 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-01-24 13:27:43,188 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 13:27:43,194 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 13:27:43,195 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 13:27:43,195 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 13:27:43,202 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 13:27:43,203 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 01:27:43" (1/1) ... [2018-01-24 13:27:43,206 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@388a8c3f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:27:43, skipping insertion in model container [2018-01-24 13:27:43,207 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 01:27:43" (1/1) ... [2018-01-24 13:27:43,226 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 13:27:43,275 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 13:27:43,392 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 13:27:43,415 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 13:27:43,426 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:27:43 WrapperNode [2018-01-24 13:27:43,426 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 13:27:43,427 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 13:27:43,427 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 13:27:43,427 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 13:27:43,439 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:27:43" (1/1) ... [2018-01-24 13:27:43,439 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:27:43" (1/1) ... [2018-01-24 13:27:43,449 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:27:43" (1/1) ... [2018-01-24 13:27:43,449 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:27:43" (1/1) ... [2018-01-24 13:27:43,454 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:27:43" (1/1) ... [2018-01-24 13:27:43,457 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:27:43" (1/1) ... [2018-01-24 13:27:43,459 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:27:43" (1/1) ... [2018-01-24 13:27:43,462 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 13:27:43,463 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 13:27:43,463 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 13:27:43,463 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 13:27:43,464 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:27:43" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 13:27:43,512 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 13:27:43,512 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 13:27:43,512 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 13:27:43,513 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 13:27:43,513 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-24 13:27:43,513 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-01-24 13:27:43,513 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-24 13:27:43,513 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-24 13:27:43,513 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-24 13:27:43,513 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-01-24 13:27:43,513 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-24 13:27:43,513 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-24 13:27:43,513 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-24 13:27:43,514 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-24 13:27:43,514 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-01-24 13:27:43,514 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-24 13:27:43,514 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-24 13:27:43,514 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-24 13:27:43,514 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 13:27:43,514 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 13:27:43,514 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 13:27:43,514 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 13:27:43,514 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 13:27:43,515 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 13:27:43,515 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 13:27:43,515 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 13:27:43,515 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 13:27:43,515 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-24 13:27:43,515 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-24 13:27:43,515 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 13:27:43,515 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 13:27:43,515 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 13:27:43,516 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-24 13:27:43,516 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 13:27:43,516 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-24 13:27:43,516 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-01-24 13:27:43,516 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-24 13:27:43,516 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-24 13:27:43,516 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 13:27:43,516 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-24 13:27:43,516 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-01-24 13:27:43,516 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-24 13:27:43,516 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-24 13:27:43,516 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-24 13:27:43,517 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-24 13:27:43,517 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-01-24 13:27:43,517 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-24 13:27:43,517 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-24 13:27:43,517 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-24 13:27:43,517 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 13:27:43,517 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 13:27:43,517 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 13:27:43,517 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 13:27:43,771 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-24 13:27:43,906 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 13:27:43,907 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 01:27:43 BoogieIcfgContainer [2018-01-24 13:27:43,907 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 13:27:43,908 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 13:27:43,908 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 13:27:43,910 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 13:27:43,910 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 01:27:43" (1/3) ... [2018-01-24 13:27:43,911 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@12f8851c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 01:27:43, skipping insertion in model container [2018-01-24 13:27:43,911 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:27:43" (2/3) ... [2018-01-24 13:27:43,911 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@12f8851c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 01:27:43, skipping insertion in model container [2018-01-24 13:27:43,911 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 01:27:43" (3/3) ... [2018-01-24 13:27:43,913 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-01-24 13:27:43,920 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 13:27:43,927 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-01-24 13:27:43,966 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 13:27:43,966 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 13:27:43,966 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 13:27:43,966 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 13:27:43,966 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 13:27:43,966 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 13:27:43,966 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 13:27:43,967 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 13:27:43,967 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 13:27:43,987 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states. [2018-01-24 13:27:43,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 13:27:43,994 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:43,994 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:43,995 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:43,998 INFO L82 PathProgramCache]: Analyzing trace with hash -1956546830, now seen corresponding path program 1 times [2018-01-24 13:27:44,000 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:44,047 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:44,047 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:44,048 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:44,048 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:44,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:44,102 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:44,333 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:44,335 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:27:44,335 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 13:27:44,335 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:44,338 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:27:44,348 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:27:44,348 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:27:44,351 INFO L87 Difference]: Start difference. First operand 142 states. Second operand 5 states. [2018-01-24 13:27:44,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:44,416 INFO L93 Difference]: Finished difference Result 272 states and 287 transitions. [2018-01-24 13:27:44,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:27:44,417 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 13:27:44,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:44,430 INFO L225 Difference]: With dead ends: 272 [2018-01-24 13:27:44,430 INFO L226 Difference]: Without dead ends: 145 [2018-01-24 13:27:44,434 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:27:44,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-01-24 13:27:44,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 143. [2018-01-24 13:27:44,473 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-24 13:27:44,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 151 transitions. [2018-01-24 13:27:44,477 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 151 transitions. Word has length 17 [2018-01-24 13:27:44,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:44,478 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 151 transitions. [2018-01-24 13:27:44,478 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:27:44,478 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 151 transitions. [2018-01-24 13:27:44,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 13:27:44,479 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:44,479 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:44,479 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:44,480 INFO L82 PathProgramCache]: Analyzing trace with hash 1123892084, now seen corresponding path program 1 times [2018-01-24 13:27:44,480 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:44,482 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:44,482 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:44,482 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:44,482 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:44,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:44,504 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:44,591 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:44,591 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:27:44,591 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 13:27:44,591 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:44,593 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:27:44,594 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:27:44,594 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:27:44,594 INFO L87 Difference]: Start difference. First operand 143 states and 151 transitions. Second operand 6 states. [2018-01-24 13:27:44,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:44,777 INFO L93 Difference]: Finished difference Result 145 states and 153 transitions. [2018-01-24 13:27:44,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:27:44,777 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-24 13:27:44,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:44,779 INFO L225 Difference]: With dead ends: 145 [2018-01-24 13:27:44,779 INFO L226 Difference]: Without dead ends: 144 [2018-01-24 13:27:44,780 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:27:44,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-01-24 13:27:44,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 142. [2018-01-24 13:27:44,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-01-24 13:27:44,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 150 transitions. [2018-01-24 13:27:44,790 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 150 transitions. Word has length 19 [2018-01-24 13:27:44,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:44,790 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 150 transitions. [2018-01-24 13:27:44,790 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:27:44,790 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 150 transitions. [2018-01-24 13:27:44,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 13:27:44,791 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:44,791 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:44,791 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:44,791 INFO L82 PathProgramCache]: Analyzing trace with hash 1123892085, now seen corresponding path program 1 times [2018-01-24 13:27:44,791 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:44,792 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:44,793 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:44,793 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:44,793 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:44,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:44,814 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:45,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:45,060 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:27:45,060 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:27:45,060 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:45,061 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:27:45,061 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:27:45,061 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:27:45,061 INFO L87 Difference]: Start difference. First operand 142 states and 150 transitions. Second operand 7 states. [2018-01-24 13:27:45,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:45,337 INFO L93 Difference]: Finished difference Result 144 states and 152 transitions. [2018-01-24 13:27:45,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:27:45,337 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-24 13:27:45,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:45,339 INFO L225 Difference]: With dead ends: 144 [2018-01-24 13:27:45,339 INFO L226 Difference]: Without dead ends: 143 [2018-01-24 13:27:45,339 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:27:45,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-24 13:27:45,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 141. [2018-01-24 13:27:45,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-01-24 13:27:45,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 149 transitions. [2018-01-24 13:27:45,350 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 149 transitions. Word has length 19 [2018-01-24 13:27:45,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:45,350 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 149 transitions. [2018-01-24 13:27:45,350 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:27:45,351 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 149 transitions. [2018-01-24 13:27:45,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-24 13:27:45,351 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:45,351 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:45,351 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:45,352 INFO L82 PathProgramCache]: Analyzing trace with hash -1414777661, now seen corresponding path program 1 times [2018-01-24 13:27:45,352 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:45,353 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:45,353 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:45,353 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:45,353 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:45,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:45,364 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:45,431 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:45,431 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:27:45,432 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 13:27:45,432 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:45,432 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:27:45,432 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:27:45,433 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:27:45,433 INFO L87 Difference]: Start difference. First operand 141 states and 149 transitions. Second operand 7 states. [2018-01-24 13:27:45,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:45,513 INFO L93 Difference]: Finished difference Result 235 states and 247 transitions. [2018-01-24 13:27:45,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:27:45,514 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-01-24 13:27:45,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:45,517 INFO L225 Difference]: With dead ends: 235 [2018-01-24 13:27:45,517 INFO L226 Difference]: Without dead ends: 157 [2018-01-24 13:27:45,518 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:27:45,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-01-24 13:27:45,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 150. [2018-01-24 13:27:45,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-01-24 13:27:45,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 158 transitions. [2018-01-24 13:27:45,547 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 158 transitions. Word has length 27 [2018-01-24 13:27:45,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:45,548 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 158 transitions. [2018-01-24 13:27:45,548 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:27:45,548 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 158 transitions. [2018-01-24 13:27:45,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 13:27:45,549 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:45,549 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:45,549 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:45,550 INFO L82 PathProgramCache]: Analyzing trace with hash 1439517623, now seen corresponding path program 1 times [2018-01-24 13:27:45,550 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:45,551 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:45,552 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:45,552 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:45,552 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:45,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:45,570 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:45,651 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:45,651 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:27:45,651 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:27:45,651 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:45,652 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:27:45,652 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:27:45,652 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:27:45,653 INFO L87 Difference]: Start difference. First operand 150 states and 158 transitions. Second operand 10 states. [2018-01-24 13:27:45,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:45,885 INFO L93 Difference]: Finished difference Result 150 states and 158 transitions. [2018-01-24 13:27:45,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:27:45,922 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-01-24 13:27:45,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:45,924 INFO L225 Difference]: With dead ends: 150 [2018-01-24 13:27:45,924 INFO L226 Difference]: Without dead ends: 149 [2018-01-24 13:27:45,925 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:27:45,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-01-24 13:27:45,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-01-24 13:27:45,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-01-24 13:27:45,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 157 transitions. [2018-01-24 13:27:45,937 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 157 transitions. Word has length 34 [2018-01-24 13:27:45,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:45,937 INFO L432 AbstractCegarLoop]: Abstraction has 149 states and 157 transitions. [2018-01-24 13:27:45,938 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:27:45,938 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 157 transitions. [2018-01-24 13:27:45,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 13:27:45,939 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:45,939 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:45,939 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:45,940 INFO L82 PathProgramCache]: Analyzing trace with hash 1439517624, now seen corresponding path program 1 times [2018-01-24 13:27:45,940 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:45,941 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:45,941 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:45,941 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:45,941 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:45,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:45,957 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:45,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:45,992 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:27:45,993 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:27:45,993 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:45,993 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:27:45,993 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:27:45,993 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:27:45,993 INFO L87 Difference]: Start difference. First operand 149 states and 157 transitions. Second operand 4 states. [2018-01-24 13:27:46,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:46,020 INFO L93 Difference]: Finished difference Result 264 states and 278 transitions. [2018-01-24 13:27:46,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:27:46,022 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-01-24 13:27:46,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:46,024 INFO L225 Difference]: With dead ends: 264 [2018-01-24 13:27:46,024 INFO L226 Difference]: Without dead ends: 150 [2018-01-24 13:27:46,025 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:27:46,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-24 13:27:46,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-01-24 13:27:46,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-01-24 13:27:46,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 158 transitions. [2018-01-24 13:27:46,036 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 158 transitions. Word has length 34 [2018-01-24 13:27:46,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:46,037 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 158 transitions. [2018-01-24 13:27:46,037 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:27:46,037 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 158 transitions. [2018-01-24 13:27:46,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 13:27:46,038 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:46,038 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:46,039 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:46,039 INFO L82 PathProgramCache]: Analyzing trace with hash -204456797, now seen corresponding path program 1 times [2018-01-24 13:27:46,039 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:46,040 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:46,040 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:46,041 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:46,041 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:46,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:46,058 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:46,092 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:46,093 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:27:46,093 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:27:46,103 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:46,104 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:27:46,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:46,153 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:27:46,187 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:46,188 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:27:46,229 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:46,250 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:27:46,250 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:27:46,261 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:46,261 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:27:46,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:46,329 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:27:46,335 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:46,335 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:27:46,375 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:46,380 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:27:46,380 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-24 13:27:46,380 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:27:46,381 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:27:46,381 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:27:46,381 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:27:46,381 INFO L87 Difference]: Start difference. First operand 150 states and 158 transitions. Second operand 6 states. [2018-01-24 13:27:46,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:46,448 INFO L93 Difference]: Finished difference Result 265 states and 279 transitions. [2018-01-24 13:27:46,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:27:46,449 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-24 13:27:46,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:46,451 INFO L225 Difference]: With dead ends: 265 [2018-01-24 13:27:46,451 INFO L226 Difference]: Without dead ends: 151 [2018-01-24 13:27:46,452 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:27:46,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-01-24 13:27:46,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-01-24 13:27:46,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-01-24 13:27:46,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 159 transitions. [2018-01-24 13:27:46,464 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 159 transitions. Word has length 35 [2018-01-24 13:27:46,464 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:46,464 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 159 transitions. [2018-01-24 13:27:46,465 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:27:46,465 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 159 transitions. [2018-01-24 13:27:46,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 13:27:46,466 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:46,467 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:46,467 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:46,467 INFO L82 PathProgramCache]: Analyzing trace with hash -1829139958, now seen corresponding path program 1 times [2018-01-24 13:27:46,467 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:46,468 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:46,469 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:46,469 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:46,469 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:46,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:46,486 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:46,628 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:46,629 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:27:46,629 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 13:27:46,629 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:46,629 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:27:46,629 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:27:46,630 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:27:46,630 INFO L87 Difference]: Start difference. First operand 151 states and 159 transitions. Second operand 7 states. [2018-01-24 13:27:46,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:46,737 INFO L93 Difference]: Finished difference Result 215 states and 225 transitions. [2018-01-24 13:27:46,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:27:46,737 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-01-24 13:27:46,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:46,738 INFO L225 Difference]: With dead ends: 215 [2018-01-24 13:27:46,738 INFO L226 Difference]: Without dead ends: 161 [2018-01-24 13:27:46,739 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:27:46,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-01-24 13:27:46,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 157. [2018-01-24 13:27:46,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-01-24 13:27:46,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 165 transitions. [2018-01-24 13:27:46,748 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 165 transitions. Word has length 36 [2018-01-24 13:27:46,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:46,748 INFO L432 AbstractCegarLoop]: Abstraction has 157 states and 165 transitions. [2018-01-24 13:27:46,748 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:27:46,748 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 165 transitions. [2018-01-24 13:27:46,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 13:27:46,749 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:46,749 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:46,749 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:46,750 INFO L82 PathProgramCache]: Analyzing trace with hash 371943704, now seen corresponding path program 2 times [2018-01-24 13:27:46,750 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:46,751 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:46,751 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:46,752 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:46,752 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:46,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:46,768 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:46,831 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:46,832 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:27:46,832 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:27:46,846 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:27:46,846 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:27:46,868 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:27:46,873 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:27:46,878 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:27:46,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:27:46,908 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:27:46,940 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:27:46,941 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:27:46,975 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:27:46,976 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:27:47,618 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 13:27:47,618 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:27:48,017 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 13:27:48,037 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:27:48,037 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14, 13] imperfect sequences [6] total 31 [2018-01-24 13:27:48,038 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:48,038 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 13:27:48,038 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 13:27:48,039 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=840, Unknown=0, NotChecked=0, Total=930 [2018-01-24 13:27:48,039 INFO L87 Difference]: Start difference. First operand 157 states and 165 transitions. Second operand 15 states. [2018-01-24 13:27:48,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:48,994 INFO L93 Difference]: Finished difference Result 176 states and 183 transitions. [2018-01-24 13:27:48,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 13:27:48,994 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 36 [2018-01-24 13:27:48,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:48,995 INFO L225 Difference]: With dead ends: 176 [2018-01-24 13:27:48,995 INFO L226 Difference]: Without dead ends: 175 [2018-01-24 13:27:48,996 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 251 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=118, Invalid=1072, Unknown=0, NotChecked=0, Total=1190 [2018-01-24 13:27:48,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-01-24 13:27:49,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 156. [2018-01-24 13:27:49,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-01-24 13:27:49,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 164 transitions. [2018-01-24 13:27:49,010 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 164 transitions. Word has length 36 [2018-01-24 13:27:49,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:49,010 INFO L432 AbstractCegarLoop]: Abstraction has 156 states and 164 transitions. [2018-01-24 13:27:49,011 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 13:27:49,011 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 164 transitions. [2018-01-24 13:27:49,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 13:27:49,011 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:49,011 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:49,012 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:49,012 INFO L82 PathProgramCache]: Analyzing trace with hash -1983848104, now seen corresponding path program 1 times [2018-01-24 13:27:49,012 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:49,013 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:49,013 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:27:49,013 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:49,013 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:49,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:49,021 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:49,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:49,050 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:27:49,050 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 13:27:49,050 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:49,051 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 13:27:49,051 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 13:27:49,051 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:27:49,052 INFO L87 Difference]: Start difference. First operand 156 states and 164 transitions. Second operand 3 states. [2018-01-24 13:27:49,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:49,187 INFO L93 Difference]: Finished difference Result 174 states and 183 transitions. [2018-01-24 13:27:49,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 13:27:49,188 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2018-01-24 13:27:49,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:49,189 INFO L225 Difference]: With dead ends: 174 [2018-01-24 13:27:49,190 INFO L226 Difference]: Without dead ends: 160 [2018-01-24 13:27:49,190 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:27:49,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-01-24 13:27:49,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 152. [2018-01-24 13:27:49,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-01-24 13:27:49,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 159 transitions. [2018-01-24 13:27:49,206 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 159 transitions. Word has length 34 [2018-01-24 13:27:49,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:49,207 INFO L432 AbstractCegarLoop]: Abstraction has 152 states and 159 transitions. [2018-01-24 13:27:49,207 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 13:27:49,207 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 159 transitions. [2018-01-24 13:27:49,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 13:27:49,208 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:49,208 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:49,208 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:49,208 INFO L82 PathProgramCache]: Analyzing trace with hash 515535126, now seen corresponding path program 1 times [2018-01-24 13:27:49,208 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:49,209 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:49,209 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:49,209 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:49,209 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:49,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:49,216 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:49,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:49,283 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:27:49,283 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:27:49,284 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:49,284 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:27:49,284 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:27:49,284 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:27:49,284 INFO L87 Difference]: Start difference. First operand 152 states and 159 transitions. Second operand 6 states. [2018-01-24 13:27:49,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:49,326 INFO L93 Difference]: Finished difference Result 156 states and 162 transitions. [2018-01-24 13:27:49,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:27:49,326 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 36 [2018-01-24 13:27:49,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:49,328 INFO L225 Difference]: With dead ends: 156 [2018-01-24 13:27:49,328 INFO L226 Difference]: Without dead ends: 137 [2018-01-24 13:27:49,328 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:27:49,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-01-24 13:27:49,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-01-24 13:27:49,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-01-24 13:27:49,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 143 transitions. [2018-01-24 13:27:49,345 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 143 transitions. Word has length 36 [2018-01-24 13:27:49,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:49,345 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 143 transitions. [2018-01-24 13:27:49,345 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:27:49,345 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 143 transitions. [2018-01-24 13:27:49,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 13:27:49,346 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:49,346 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:49,346 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:49,347 INFO L82 PathProgramCache]: Analyzing trace with hash 1666573044, now seen corresponding path program 1 times [2018-01-24 13:27:49,347 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:49,348 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:49,348 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:49,348 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:49,348 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:49,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:49,375 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:49,498 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 13:27:49,498 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:27:49,498 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:27:49,498 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:49,499 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:27:49,499 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:27:49,499 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:27:49,499 INFO L87 Difference]: Start difference. First operand 137 states and 143 transitions. Second operand 10 states. [2018-01-24 13:27:49,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:49,816 INFO L93 Difference]: Finished difference Result 137 states and 143 transitions. [2018-01-24 13:27:49,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:27:49,816 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 41 [2018-01-24 13:27:49,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:49,817 INFO L225 Difference]: With dead ends: 137 [2018-01-24 13:27:49,817 INFO L226 Difference]: Without dead ends: 135 [2018-01-24 13:27:49,817 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:27:49,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-24 13:27:49,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-01-24 13:27:49,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-24 13:27:49,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 141 transitions. [2018-01-24 13:27:49,834 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 141 transitions. Word has length 41 [2018-01-24 13:27:49,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:49,835 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 141 transitions. [2018-01-24 13:27:49,835 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:27:49,835 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 141 transitions. [2018-01-24 13:27:49,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 13:27:49,835 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:49,836 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:49,836 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:49,836 INFO L82 PathProgramCache]: Analyzing trace with hash 1666573045, now seen corresponding path program 1 times [2018-01-24 13:27:49,836 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:49,837 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:49,838 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:49,838 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:49,838 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:49,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:49,854 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:49,899 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:49,899 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:27:49,899 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:27:49,906 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:49,906 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:27:49,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:49,934 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:27:49,957 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:49,957 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:27:50,050 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:50,084 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:27:50,084 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:27:50,090 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:50,090 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:27:50,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:50,140 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:27:50,143 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:50,143 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:27:50,172 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:50,173 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:27:50,173 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-24 13:27:50,173 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:27:50,174 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:27:50,174 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:27:50,174 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:27:50,174 INFO L87 Difference]: Start difference. First operand 135 states and 141 transitions. Second operand 7 states. [2018-01-24 13:27:50,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:50,204 INFO L93 Difference]: Finished difference Result 247 states and 259 transitions. [2018-01-24 13:27:50,205 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:27:50,205 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 41 [2018-01-24 13:27:50,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:50,205 INFO L225 Difference]: With dead ends: 247 [2018-01-24 13:27:50,205 INFO L226 Difference]: Without dead ends: 136 [2018-01-24 13:27:50,206 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-24 13:27:50,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-01-24 13:27:50,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-01-24 13:27:50,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-24 13:27:50,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 142 transitions. [2018-01-24 13:27:50,221 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 142 transitions. Word has length 41 [2018-01-24 13:27:50,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:50,222 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 142 transitions. [2018-01-24 13:27:50,222 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:27:50,222 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 142 transitions. [2018-01-24 13:27:50,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 13:27:50,222 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:50,223 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:50,223 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:50,223 INFO L82 PathProgramCache]: Analyzing trace with hash -723967062, now seen corresponding path program 2 times [2018-01-24 13:27:50,223 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:50,224 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:50,224 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:50,224 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:50,224 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:50,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:50,240 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:50,325 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:50,326 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:27:50,326 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:27:50,332 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:27:50,332 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:27:50,349 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:27:50,351 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:27:50,354 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:27:50,364 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:27:50,364 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:27:50,404 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:27:50,405 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:27:50,443 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:27:50,443 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:27:50,941 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:27:50,941 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:27:53,533 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:27:53,553 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:27:53,553 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15, 13] imperfect sequences [7] total 33 [2018-01-24 13:27:53,553 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:53,553 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 13:27:53,554 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 13:27:53,554 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=950, Unknown=1, NotChecked=0, Total=1056 [2018-01-24 13:27:53,554 INFO L87 Difference]: Start difference. First operand 136 states and 142 transitions. Second operand 16 states. [2018-01-24 13:27:54,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:54,286 INFO L93 Difference]: Finished difference Result 136 states and 142 transitions. [2018-01-24 13:27:54,287 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 13:27:54,287 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 42 [2018-01-24 13:27:54,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:54,288 INFO L225 Difference]: With dead ends: 136 [2018-01-24 13:27:54,288 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 13:27:54,288 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 57 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 311 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=136, Invalid=1195, Unknown=1, NotChecked=0, Total=1332 [2018-01-24 13:27:54,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 13:27:54,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-01-24 13:27:54,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 13:27:54,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 140 transitions. [2018-01-24 13:27:54,300 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 140 transitions. Word has length 42 [2018-01-24 13:27:54,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:54,301 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 140 transitions. [2018-01-24 13:27:54,301 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 13:27:54,301 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 140 transitions. [2018-01-24 13:27:54,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-24 13:27:54,301 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:54,301 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:54,301 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:54,301 INFO L82 PathProgramCache]: Analyzing trace with hash -2043211584, now seen corresponding path program 1 times [2018-01-24 13:27:54,302 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:54,302 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:54,302 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:27:54,302 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:54,303 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:54,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:54,312 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:54,362 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:27:54,362 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:27:54,362 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 13:27:54,362 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:54,363 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 13:27:54,363 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 13:27:54,363 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:27:54,363 INFO L87 Difference]: Start difference. First operand 134 states and 140 transitions. Second operand 8 states. [2018-01-24 13:27:54,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:54,402 INFO L93 Difference]: Finished difference Result 221 states and 230 transitions. [2018-01-24 13:27:54,402 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:27:54,402 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 45 [2018-01-24 13:27:54,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:54,403 INFO L225 Difference]: With dead ends: 221 [2018-01-24 13:27:54,403 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 13:27:54,404 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:27:54,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 13:27:54,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-01-24 13:27:54,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 13:27:54,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 139 transitions. [2018-01-24 13:27:54,421 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 139 transitions. Word has length 45 [2018-01-24 13:27:54,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:54,422 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 139 transitions. [2018-01-24 13:27:54,422 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 13:27:54,422 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 139 transitions. [2018-01-24 13:27:54,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-24 13:27:54,422 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:54,422 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:54,422 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:54,423 INFO L82 PathProgramCache]: Analyzing trace with hash -647760318, now seen corresponding path program 1 times [2018-01-24 13:27:54,423 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:54,423 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:54,423 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:54,423 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:54,424 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:54,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:54,435 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:54,501 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:27:54,501 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:27:54,501 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-24 13:27:54,501 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:54,502 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:27:54,502 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:27:54,502 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:27:54,502 INFO L87 Difference]: Start difference. First operand 134 states and 139 transitions. Second operand 10 states. [2018-01-24 13:27:54,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:54,606 INFO L93 Difference]: Finished difference Result 223 states and 231 transitions. [2018-01-24 13:27:54,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:27:54,607 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 50 [2018-01-24 13:27:54,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:54,608 INFO L225 Difference]: With dead ends: 223 [2018-01-24 13:27:54,608 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 13:27:54,609 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:27:54,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 13:27:54,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-01-24 13:27:54,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 13:27:54,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 138 transitions. [2018-01-24 13:27:54,628 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 138 transitions. Word has length 50 [2018-01-24 13:27:54,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:54,628 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 138 transitions. [2018-01-24 13:27:54,628 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:27:54,629 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 138 transitions. [2018-01-24 13:27:54,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-01-24 13:27:54,629 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:54,630 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:54,630 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:54,630 INFO L82 PathProgramCache]: Analyzing trace with hash 1953733819, now seen corresponding path program 1 times [2018-01-24 13:27:54,630 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:54,631 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:54,631 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:54,631 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:54,631 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:54,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:54,648 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:54,793 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:27:54,793 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:27:54,793 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-01-24 13:27:54,793 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:54,794 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 13:27:54,794 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 13:27:54,794 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:27:54,794 INFO L87 Difference]: Start difference. First operand 134 states and 138 transitions. Second operand 13 states. [2018-01-24 13:27:55,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:55,099 INFO L93 Difference]: Finished difference Result 134 states and 138 transitions. [2018-01-24 13:27:55,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 13:27:55,100 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 61 [2018-01-24 13:27:55,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:55,101 INFO L225 Difference]: With dead ends: 134 [2018-01-24 13:27:55,101 INFO L226 Difference]: Without dead ends: 132 [2018-01-24 13:27:55,101 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:27:55,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-01-24 13:27:55,113 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-01-24 13:27:55,113 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-01-24 13:27:55,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 136 transitions. [2018-01-24 13:27:55,114 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 136 transitions. Word has length 61 [2018-01-24 13:27:55,114 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:55,115 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 136 transitions. [2018-01-24 13:27:55,115 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 13:27:55,115 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 136 transitions. [2018-01-24 13:27:55,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-01-24 13:27:55,115 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:55,115 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:55,115 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:55,116 INFO L82 PathProgramCache]: Analyzing trace with hash 1953733820, now seen corresponding path program 1 times [2018-01-24 13:27:55,116 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:55,116 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:55,116 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:55,116 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:55,117 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:55,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:55,130 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:55,212 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:55,212 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:27:55,212 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:27:55,220 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:55,220 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:27:55,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:55,259 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:27:55,276 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:55,276 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:27:55,396 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:55,424 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:27:55,424 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:27:55,430 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:55,430 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:27:55,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:55,497 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:27:55,502 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:55,502 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:27:55,549 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:55,551 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:27:55,551 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-24 13:27:55,551 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:27:55,551 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 13:27:55,552 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 13:27:55,552 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:27:55,552 INFO L87 Difference]: Start difference. First operand 132 states and 136 transitions. Second operand 8 states. [2018-01-24 13:27:55,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:55,580 INFO L93 Difference]: Finished difference Result 240 states and 248 transitions. [2018-01-24 13:27:55,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:27:55,581 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 61 [2018-01-24 13:27:55,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:55,582 INFO L225 Difference]: With dead ends: 240 [2018-01-24 13:27:55,582 INFO L226 Difference]: Without dead ends: 133 [2018-01-24 13:27:55,582 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 250 GetRequests, 236 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-24 13:27:55,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-01-24 13:27:55,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-01-24 13:27:55,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-01-24 13:27:55,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 137 transitions. [2018-01-24 13:27:55,601 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 137 transitions. Word has length 61 [2018-01-24 13:27:55,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:55,601 INFO L432 AbstractCegarLoop]: Abstraction has 133 states and 137 transitions. [2018-01-24 13:27:55,602 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 13:27:55,602 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 137 transitions. [2018-01-24 13:27:55,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-01-24 13:27:55,603 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:55,603 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:55,603 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:55,603 INFO L82 PathProgramCache]: Analyzing trace with hash 737964273, now seen corresponding path program 2 times [2018-01-24 13:27:55,603 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:55,604 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:55,604 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:55,604 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:55,605 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:55,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:55,624 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:55,712 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:55,712 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:27:55,713 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:27:55,721 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:27:55,721 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:27:55,749 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:27:55,752 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:27:55,757 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:27:55,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:27:55,762 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:27:55,774 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:27:55,775 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:27:55,787 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:27:55,787 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:27:56,356 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:27:56,357 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:27:57,074 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:27:57,095 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:27:57,095 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18, 16] imperfect sequences [8] total 40 [2018-01-24 13:27:57,095 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:57,096 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-24 13:27:57,096 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-24 13:27:57,096 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=132, Invalid=1428, Unknown=0, NotChecked=0, Total=1560 [2018-01-24 13:27:57,096 INFO L87 Difference]: Start difference. First operand 133 states and 137 transitions. Second operand 19 states. [2018-01-24 13:27:58,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:58,036 INFO L93 Difference]: Finished difference Result 133 states and 137 transitions. [2018-01-24 13:27:58,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-24 13:27:58,036 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 62 [2018-01-24 13:27:58,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:58,037 INFO L225 Difference]: With dead ends: 133 [2018-01-24 13:27:58,037 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 13:27:58,037 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 91 SyntacticMatches, 2 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 507 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=173, Invalid=1807, Unknown=0, NotChecked=0, Total=1980 [2018-01-24 13:27:58,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 13:27:58,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-01-24 13:27:58,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-01-24 13:27:58,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 135 transitions. [2018-01-24 13:27:58,056 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 135 transitions. Word has length 62 [2018-01-24 13:27:58,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:58,057 INFO L432 AbstractCegarLoop]: Abstraction has 131 states and 135 transitions. [2018-01-24 13:27:58,057 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-24 13:27:58,057 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 135 transitions. [2018-01-24 13:27:58,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-01-24 13:27:58,058 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:58,058 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:58,058 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:58,058 INFO L82 PathProgramCache]: Analyzing trace with hash -1810517891, now seen corresponding path program 1 times [2018-01-24 13:27:58,058 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:58,059 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:58,059 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:27:58,060 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:58,060 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:58,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:58,077 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:58,172 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:27:58,172 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:27:58,172 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 13:27:58,172 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:58,173 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 13:27:58,173 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 13:27:58,173 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:27:58,173 INFO L87 Difference]: Start difference. First operand 131 states and 135 transitions. Second operand 11 states. [2018-01-24 13:27:58,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:58,229 INFO L93 Difference]: Finished difference Result 192 states and 198 transitions. [2018-01-24 13:27:58,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 13:27:58,230 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 71 [2018-01-24 13:27:58,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:58,231 INFO L225 Difference]: With dead ends: 192 [2018-01-24 13:27:58,231 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 13:27:58,231 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-01-24 13:27:58,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 13:27:58,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-01-24 13:27:58,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-01-24 13:27:58,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 134 transitions. [2018-01-24 13:27:58,247 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 134 transitions. Word has length 71 [2018-01-24 13:27:58,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:58,248 INFO L432 AbstractCegarLoop]: Abstraction has 131 states and 134 transitions. [2018-01-24 13:27:58,248 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 13:27:58,248 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 134 transitions. [2018-01-24 13:27:58,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-01-24 13:27:58,249 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:58,249 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:58,249 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:58,250 INFO L82 PathProgramCache]: Analyzing trace with hash -1846676097, now seen corresponding path program 1 times [2018-01-24 13:27:58,250 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:58,251 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:58,251 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:58,251 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:58,251 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:58,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:58,272 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:58,547 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:27:58,547 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:27:58,547 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-24 13:27:58,547 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:27:58,548 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 13:27:58,548 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 13:27:58,548 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=271, Unknown=0, NotChecked=0, Total=306 [2018-01-24 13:27:58,548 INFO L87 Difference]: Start difference. First operand 131 states and 134 transitions. Second operand 18 states. [2018-01-24 13:27:59,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:27:59,296 INFO L93 Difference]: Finished difference Result 140 states and 143 transitions. [2018-01-24 13:27:59,296 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-24 13:27:59,296 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 84 [2018-01-24 13:27:59,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:27:59,298 INFO L225 Difference]: With dead ends: 140 [2018-01-24 13:27:59,298 INFO L226 Difference]: Without dead ends: 138 [2018-01-24 13:27:59,299 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=59, Invalid=493, Unknown=0, NotChecked=0, Total=552 [2018-01-24 13:27:59,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-01-24 13:27:59,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 129. [2018-01-24 13:27:59,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-01-24 13:27:59,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 132 transitions. [2018-01-24 13:27:59,318 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 132 transitions. Word has length 84 [2018-01-24 13:27:59,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:27:59,318 INFO L432 AbstractCegarLoop]: Abstraction has 129 states and 132 transitions. [2018-01-24 13:27:59,319 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 13:27:59,319 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 132 transitions. [2018-01-24 13:27:59,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-01-24 13:27:59,319 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:27:59,320 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:27:59,320 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:27:59,320 INFO L82 PathProgramCache]: Analyzing trace with hash -1846676096, now seen corresponding path program 1 times [2018-01-24 13:27:59,320 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:27:59,321 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:59,321 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:59,321 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:27:59,321 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:27:59,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:59,343 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:27:59,431 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:59,431 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:27:59,431 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:27:59,446 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:59,447 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:27:59,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:59,508 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:27:59,520 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:59,520 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:27:59,636 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:59,658 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:27:59,658 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:27:59,661 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:27:59,661 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:27:59,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:27:59,753 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:27:59,761 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:59,761 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:27:59,973 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:27:59,974 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:27:59,975 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-24 13:27:59,975 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:27:59,975 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 13:27:59,975 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 13:27:59,975 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-24 13:27:59,976 INFO L87 Difference]: Start difference. First operand 129 states and 132 transitions. Second operand 9 states. [2018-01-24 13:28:00,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:00,006 INFO L93 Difference]: Finished difference Result 233 states and 239 transitions. [2018-01-24 13:28:00,007 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:28:00,007 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 84 [2018-01-24 13:28:00,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:00,008 INFO L225 Difference]: With dead ends: 233 [2018-01-24 13:28:00,008 INFO L226 Difference]: Without dead ends: 130 [2018-01-24 13:28:00,009 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 343 GetRequests, 327 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-24 13:28:00,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-01-24 13:28:00,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 130. [2018-01-24 13:28:00,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-01-24 13:28:00,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 133 transitions. [2018-01-24 13:28:00,022 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 133 transitions. Word has length 84 [2018-01-24 13:28:00,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:00,022 INFO L432 AbstractCegarLoop]: Abstraction has 130 states and 133 transitions. [2018-01-24 13:28:00,022 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 13:28:00,022 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 133 transitions. [2018-01-24 13:28:00,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-01-24 13:28:00,023 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:00,023 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:00,023 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:00,023 INFO L82 PathProgramCache]: Analyzing trace with hash 1476998571, now seen corresponding path program 2 times [2018-01-24 13:28:00,023 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:00,024 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:00,024 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:00,024 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:00,024 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:00,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:00,040 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:00,134 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:00,134 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:00,134 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:28:00,139 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:28:00,139 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:28:00,207 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:28:00,216 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:28:00,222 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:00,238 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:28:00,239 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:28:00,283 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:28:00,284 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:28:00,308 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:28:00,309 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:28:04,486 WARN L143 SmtUtils]: Spent 4017ms on a formula simplification that was a NOOP. DAG size: 21 [2018-01-24 13:28:05,214 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 13:28:05,214 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:07,915 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 13:28:07,935 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:28:07,935 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20, 18] imperfect sequences [9] total 45 [2018-01-24 13:28:07,935 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:07,936 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-24 13:28:07,936 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-24 13:28:07,936 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=1826, Unknown=1, NotChecked=0, Total=1980 [2018-01-24 13:28:07,937 INFO L87 Difference]: Start difference. First operand 130 states and 133 transitions. Second operand 21 states. [2018-01-24 13:28:09,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:09,108 INFO L93 Difference]: Finished difference Result 130 states and 133 transitions. [2018-01-24 13:28:09,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-24 13:28:09,108 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 85 [2018-01-24 13:28:09,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:09,109 INFO L225 Difference]: With dead ends: 130 [2018-01-24 13:28:09,109 INFO L226 Difference]: Without dead ends: 128 [2018-01-24 13:28:09,110 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 131 SyntacticMatches, 4 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 684 ImplicationChecksByTransitivity, 7.6s TimeCoverageRelationStatistics Valid=202, Invalid=2347, Unknown=1, NotChecked=0, Total=2550 [2018-01-24 13:28:09,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-01-24 13:28:09,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-01-24 13:28:09,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-01-24 13:28:09,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 131 transitions. [2018-01-24 13:28:09,124 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 131 transitions. Word has length 85 [2018-01-24 13:28:09,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:09,124 INFO L432 AbstractCegarLoop]: Abstraction has 128 states and 131 transitions. [2018-01-24 13:28:09,124 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-24 13:28:09,124 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 131 transitions. [2018-01-24 13:28:09,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-01-24 13:28:09,125 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:09,125 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:09,125 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:09,125 INFO L82 PathProgramCache]: Analyzing trace with hash -939068168, now seen corresponding path program 1 times [2018-01-24 13:28:09,125 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:09,126 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:09,126 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:28:09,126 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:09,126 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:09,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:09,140 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:09,314 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 13:28:09,315 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:28:09,315 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 13:28:09,315 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:09,315 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 13:28:09,315 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 13:28:09,315 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:28:09,315 INFO L87 Difference]: Start difference. First operand 128 states and 131 transitions. Second operand 11 states. [2018-01-24 13:28:09,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:09,401 INFO L93 Difference]: Finished difference Result 134 states and 136 transitions. [2018-01-24 13:28:09,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 13:28:09,401 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 83 [2018-01-24 13:28:09,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:09,402 INFO L225 Difference]: With dead ends: 134 [2018-01-24 13:28:09,402 INFO L226 Difference]: Without dead ends: 128 [2018-01-24 13:28:09,403 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-01-24 13:28:09,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-01-24 13:28:09,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-01-24 13:28:09,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-01-24 13:28:09,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 130 transitions. [2018-01-24 13:28:09,417 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 130 transitions. Word has length 83 [2018-01-24 13:28:09,417 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:09,418 INFO L432 AbstractCegarLoop]: Abstraction has 128 states and 130 transitions. [2018-01-24 13:28:09,418 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 13:28:09,418 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 130 transitions. [2018-01-24 13:28:09,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-01-24 13:28:09,418 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:09,418 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:09,418 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:09,419 INFO L82 PathProgramCache]: Analyzing trace with hash 983401723, now seen corresponding path program 1 times [2018-01-24 13:28:09,419 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:09,419 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:09,419 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:09,420 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:09,420 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:09,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:09,437 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:09,763 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 13:28:09,763 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:28:09,763 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-01-24 13:28:09,763 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:09,764 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-24 13:28:09,764 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-24 13:28:09,764 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=419, Unknown=0, NotChecked=0, Total=462 [2018-01-24 13:28:09,764 INFO L87 Difference]: Start difference. First operand 128 states and 130 transitions. Second operand 22 states. [2018-01-24 13:28:10,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:10,155 INFO L93 Difference]: Finished difference Result 133 states and 135 transitions. [2018-01-24 13:28:10,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-24 13:28:10,156 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 99 [2018-01-24 13:28:10,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:10,156 INFO L225 Difference]: With dead ends: 133 [2018-01-24 13:28:10,156 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 13:28:10,157 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=75, Invalid=795, Unknown=0, NotChecked=0, Total=870 [2018-01-24 13:28:10,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 13:28:10,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 126. [2018-01-24 13:28:10,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-01-24 13:28:10,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 128 transitions. [2018-01-24 13:28:10,174 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 128 transitions. Word has length 99 [2018-01-24 13:28:10,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:10,174 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 128 transitions. [2018-01-24 13:28:10,174 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-24 13:28:10,174 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 128 transitions. [2018-01-24 13:28:10,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-01-24 13:28:10,175 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:10,175 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:10,175 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:10,176 INFO L82 PathProgramCache]: Analyzing trace with hash 983401724, now seen corresponding path program 1 times [2018-01-24 13:28:10,176 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:10,177 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:10,177 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:10,177 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:10,177 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:10,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:10,200 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:10,301 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:10,301 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:10,302 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:28:10,310 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:10,310 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:28:10,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:10,362 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:10,372 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:10,372 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:10,499 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:10,519 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:10,520 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:28:10,523 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:10,523 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:28:10,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:10,628 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:10,634 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:10,634 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:10,712 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:10,713 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:28:10,713 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-24 13:28:10,714 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:28:10,714 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:28:10,714 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:28:10,714 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:28:10,714 INFO L87 Difference]: Start difference. First operand 126 states and 128 transitions. Second operand 10 states. [2018-01-24 13:28:10,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:10,751 INFO L93 Difference]: Finished difference Result 226 states and 230 transitions. [2018-01-24 13:28:10,751 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 13:28:10,751 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 99 [2018-01-24 13:28:10,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:10,752 INFO L225 Difference]: With dead ends: 226 [2018-01-24 13:28:10,752 INFO L226 Difference]: Without dead ends: 127 [2018-01-24 13:28:10,753 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 404 GetRequests, 386 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-24 13:28:10,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-01-24 13:28:10,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-01-24 13:28:10,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-01-24 13:28:10,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 129 transitions. [2018-01-24 13:28:10,767 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 129 transitions. Word has length 99 [2018-01-24 13:28:10,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:10,768 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 129 transitions. [2018-01-24 13:28:10,768 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:28:10,768 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 129 transitions. [2018-01-24 13:28:10,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-01-24 13:28:10,769 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:10,769 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:10,769 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:10,769 INFO L82 PathProgramCache]: Analyzing trace with hash 1981450609, now seen corresponding path program 2 times [2018-01-24 13:28:10,769 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:10,770 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:10,770 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:10,770 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:10,770 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:10,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:10,794 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:10,986 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:10,986 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:10,986 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:28:10,998 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:28:10,998 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:28:11,039 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:28:11,045 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:28:11,050 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:11,054 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:28:11,054 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:28:11,067 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:28:11,067 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:28:11,079 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:28:11,080 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:28:12,210 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-24 13:28:12,210 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:16,190 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-24 13:28:16,209 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:28:16,210 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24, 22] imperfect sequences [10] total 54 [2018-01-24 13:28:16,210 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:16,210 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-24 13:28:16,210 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-24 13:28:16,211 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=189, Invalid=2672, Unknown=1, NotChecked=0, Total=2862 [2018-01-24 13:28:16,211 INFO L87 Difference]: Start difference. First operand 127 states and 129 transitions. Second operand 25 states. [2018-01-24 13:28:18,301 WARN L143 SmtUtils]: Spent 2034ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-24 13:28:19,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:19,497 INFO L93 Difference]: Finished difference Result 127 states and 129 transitions. [2018-01-24 13:28:19,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 13:28:19,497 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 100 [2018-01-24 13:28:19,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:19,498 INFO L225 Difference]: With dead ends: 127 [2018-01-24 13:28:19,498 INFO L226 Difference]: Without dead ends: 125 [2018-01-24 13:28:19,499 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 217 GetRequests, 151 SyntacticMatches, 6 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1051 ImplicationChecksByTransitivity, 7.3s TimeCoverageRelationStatistics Valid=254, Invalid=3527, Unknown=1, NotChecked=0, Total=3782 [2018-01-24 13:28:19,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-01-24 13:28:19,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2018-01-24 13:28:19,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-01-24 13:28:19,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 127 transitions. [2018-01-24 13:28:19,515 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 127 transitions. Word has length 100 [2018-01-24 13:28:19,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:19,515 INFO L432 AbstractCegarLoop]: Abstraction has 125 states and 127 transitions. [2018-01-24 13:28:19,515 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-24 13:28:19,515 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 127 transitions. [2018-01-24 13:28:19,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-01-24 13:28:19,515 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:19,516 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:19,516 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:19,516 INFO L82 PathProgramCache]: Analyzing trace with hash 1778186610, now seen corresponding path program 1 times [2018-01-24 13:28:19,516 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:19,517 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:19,517 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:28:19,517 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:19,517 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:19,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:19,534 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:19,701 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:19,701 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:19,701 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:28:19,706 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:19,706 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:28:19,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:19,754 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:19,764 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:19,764 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:19,962 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:19,982 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:19,982 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:28:19,985 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:19,986 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:28:20,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:20,088 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:20,095 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:20,095 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:20,171 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:20,173 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:28:20,173 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-24 13:28:20,173 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:28:20,173 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 13:28:20,174 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 13:28:20,174 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-24 13:28:20,174 INFO L87 Difference]: Start difference. First operand 125 states and 127 transitions. Second operand 11 states. [2018-01-24 13:28:20,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:20,218 INFO L93 Difference]: Finished difference Result 223 states and 227 transitions. [2018-01-24 13:28:20,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:28:20,218 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 104 [2018-01-24 13:28:20,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:20,219 INFO L225 Difference]: With dead ends: 223 [2018-01-24 13:28:20,219 INFO L226 Difference]: Without dead ends: 126 [2018-01-24 13:28:20,220 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 425 GetRequests, 405 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-24 13:28:20,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-01-24 13:28:20,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-01-24 13:28:20,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-01-24 13:28:20,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 128 transitions. [2018-01-24 13:28:20,236 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 128 transitions. Word has length 104 [2018-01-24 13:28:20,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:20,237 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 128 transitions. [2018-01-24 13:28:20,237 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 13:28:20,237 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 128 transitions. [2018-01-24 13:28:20,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-01-24 13:28:20,238 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:20,238 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:20,238 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:20,238 INFO L82 PathProgramCache]: Analyzing trace with hash 1873376797, now seen corresponding path program 2 times [2018-01-24 13:28:20,238 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:20,239 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:20,239 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:20,239 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:20,239 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:20,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:20,256 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:20,555 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:20,555 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:20,555 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:28:20,568 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:28:20,568 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:28:20,615 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:28:20,632 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:28:20,638 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:20,979 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 13:28:20,981 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 13:28:20,981 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:28:20,982 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:28:20,983 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:28:20,984 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-01-24 13:28:21,087 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:28:21,090 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:28:21,094 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 13:28:21,095 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-01-24 13:28:21,121 WARN L1029 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-01-24 13:28:21,141 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-01-24 13:28:21,144 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:28:21,147 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-01-24 13:28:21,163 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:28:21,164 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:28:21,180 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-01-24 13:28:21,181 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 13:28:21,229 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:28:21,232 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:28:21,263 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:28:21,263 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-01-24 13:28:21,596 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:28:21,597 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 38 [2018-01-24 13:28:21,599 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:28:21,599 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 9 [2018-01-24 13:28:21,599 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:28:21,601 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:28:21,609 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:28:21,609 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:13 [2018-01-24 13:28:21,925 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-01-24 13:28:21,926 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-01-24 13:28:21,926 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:28:21,927 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:28:21,928 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:28:21,928 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-01-24 13:28:21,967 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-24 13:28:21,967 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:23,175 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-01-24 13:28:23,176 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-01-24 13:28:23,177 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:28:23,178 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:28:23,181 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 13:28:23,181 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:43, output treesize:34 [2018-01-24 13:28:27,384 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:28:27,385 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 79 [2018-01-24 13:28:27,387 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.UnsupportedOperationException: alternation not yet supported at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.applyNonSddEliminations(ElimStorePlain.java:347) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:223) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:270) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:243) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:445) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:421) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:292) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:328) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:237) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:185) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getTraceCheck(BaseTaipanRefinementStrategy.java:213) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:231) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:205) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:68) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:368) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:381) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:316) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:294) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:149) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:113) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:117) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:324) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.runToolchainDefault(DefaultToolchainJob.java:221) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.BasicToolchainJob.run(BasicToolchainJob.java:134) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-01-24 13:28:27,393 INFO L168 Benchmark]: Toolchain (without parser) took 44203.94 ms. Allocated memory was 308.8 MB in the beginning and 682.6 MB in the end (delta: 373.8 MB). Free memory was 265.7 MB in the beginning and 487.1 MB in the end (delta: -221.4 MB). Peak memory consumption was 152.4 MB. Max. memory is 5.3 GB. [2018-01-24 13:28:27,396 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 308.8 MB. Free memory is still 272.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 13:28:27,396 INFO L168 Benchmark]: CACSL2BoogieTranslator took 231.52 ms. Allocated memory is still 308.8 MB. Free memory was 265.7 MB in the beginning and 251.6 MB in the end (delta: 14.1 MB). Peak memory consumption was 14.1 MB. Max. memory is 5.3 GB. [2018-01-24 13:28:27,397 INFO L168 Benchmark]: Boogie Preprocessor took 35.42 ms. Allocated memory is still 308.8 MB. Free memory was 251.6 MB in the beginning and 249.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-24 13:28:27,397 INFO L168 Benchmark]: RCFGBuilder took 444.29 ms. Allocated memory is still 308.8 MB. Free memory was 249.6 MB in the beginning and 214.4 MB in the end (delta: 35.2 MB). Peak memory consumption was 35.2 MB. Max. memory is 5.3 GB. [2018-01-24 13:28:27,397 INFO L168 Benchmark]: TraceAbstraction took 43484.30 ms. Allocated memory was 308.8 MB in the beginning and 682.6 MB in the end (delta: 373.8 MB). Free memory was 214.4 MB in the beginning and 487.1 MB in the end (delta: -272.7 MB). Peak memory consumption was 101.1 MB. Max. memory is 5.3 GB. [2018-01-24 13:28:27,401 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 308.8 MB. Free memory is still 272.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 231.52 ms. Allocated memory is still 308.8 MB. Free memory was 265.7 MB in the beginning and 251.6 MB in the end (delta: 14.1 MB). Peak memory consumption was 14.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 35.42 ms. Allocated memory is still 308.8 MB. Free memory was 251.6 MB in the beginning and 249.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 444.29 ms. Allocated memory is still 308.8 MB. Free memory was 249.6 MB in the beginning and 214.4 MB in the end (delta: 35.2 MB). Peak memory consumption was 35.2 MB. Max. memory is 5.3 GB. * TraceAbstraction took 43484.30 ms. Allocated memory was 308.8 MB in the beginning and 682.6 MB in the end (delta: 373.8 MB). Free memory was 214.4 MB in the beginning and 487.1 MB in the end (delta: -272.7 MB). Peak memory consumption was 101.1 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: UnsupportedOperationException: alternation not yet supported de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: UnsupportedOperationException: alternation not yet supported: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.applyNonSddEliminations(ElimStorePlain.java:347) RESULT: Ultimate could not prove your program: Toolchain returned no result. Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_13-28-27-410.csv Received shutdown request...