java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 13:33:28,042 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 13:33:28,044 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 13:33:28,056 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 13:33:28,056 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 13:33:28,057 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 13:33:28,059 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 13:33:28,061 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 13:33:28,063 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 13:33:28,064 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 13:33:28,065 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 13:33:28,065 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 13:33:28,066 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 13:33:28,068 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 13:33:28,069 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 13:33:28,071 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 13:33:28,074 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 13:33:28,076 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 13:33:28,077 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 13:33:28,078 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 13:33:28,081 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 13:33:28,081 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 13:33:28,082 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 13:33:28,083 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 13:33:28,084 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 13:33:28,085 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 13:33:28,086 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 13:33:28,086 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 13:33:28,087 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 13:33:28,087 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 13:33:28,088 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 13:33:28,088 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf [2018-01-24 13:33:28,098 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 13:33:28,098 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 13:33:28,099 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 13:33:28,099 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 13:33:28,100 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 13:33:28,100 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 13:33:28,100 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 13:33:28,101 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 13:33:28,101 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 13:33:28,101 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 13:33:28,101 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 13:33:28,101 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 13:33:28,102 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 13:33:28,102 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 13:33:28,102 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 13:33:28,102 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 13:33:28,102 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 13:33:28,103 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 13:33:28,103 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 13:33:28,103 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 13:33:28,103 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 13:33:28,103 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 13:33:28,104 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 13:33:28,104 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 13:33:28,104 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 13:33:28,104 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 13:33:28,105 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 13:33:28,105 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 13:33:28,105 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-01-24 13:33:28,105 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 13:33:28,105 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 13:33:28,106 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 13:33:28,106 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 13:33:28,107 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 13:33:28,144 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 13:33:28,157 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 13:33:28,161 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 13:33:28,163 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 13:33:28,163 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 13:33:28,164 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_true-valid-memsafety_true-termination.i [2018-01-24 13:33:28,418 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 13:33:28,424 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 13:33:28,425 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 13:33:28,425 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 13:33:28,430 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 13:33:28,431 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 01:33:28" (1/1) ... [2018-01-24 13:33:28,433 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7bc1eb44 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:33:28, skipping insertion in model container [2018-01-24 13:33:28,433 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 01:33:28" (1/1) ... [2018-01-24 13:33:28,445 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 13:33:28,491 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 13:33:28,623 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 13:33:28,651 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 13:33:28,666 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:33:28 WrapperNode [2018-01-24 13:33:28,666 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 13:33:28,667 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 13:33:28,667 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 13:33:28,667 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 13:33:28,685 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:33:28" (1/1) ... [2018-01-24 13:33:28,686 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:33:28" (1/1) ... [2018-01-24 13:33:28,700 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:33:28" (1/1) ... [2018-01-24 13:33:28,700 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:33:28" (1/1) ... [2018-01-24 13:33:28,711 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:33:28" (1/1) ... [2018-01-24 13:33:28,715 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:33:28" (1/1) ... [2018-01-24 13:33:28,718 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:33:28" (1/1) ... [2018-01-24 13:33:28,722 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 13:33:28,722 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 13:33:28,722 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 13:33:28,723 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 13:33:28,724 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:33:28" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 13:33:28,773 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 13:33:28,773 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 13:33:28,773 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 13:33:28,773 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 13:33:28,774 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-24 13:33:28,774 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-01-24 13:33:28,774 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-24 13:33:28,774 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-24 13:33:28,774 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-24 13:33:28,774 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-01-24 13:33:28,775 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-24 13:33:28,775 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-24 13:33:28,775 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-24 13:33:28,775 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-24 13:33:28,775 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-01-24 13:33:28,775 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-24 13:33:28,776 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-24 13:33:28,776 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-24 13:33:28,776 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_get [2018-01-24 13:33:28,776 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_put [2018-01-24 13:33:28,776 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 13:33:28,776 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 13:33:28,777 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 13:33:28,777 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 13:33:28,777 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 13:33:28,777 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 13:33:28,777 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 13:33:28,778 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 13:33:28,778 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 13:33:28,778 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-24 13:33:28,778 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-24 13:33:28,778 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 13:33:28,778 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 13:33:28,779 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 13:33:28,779 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-24 13:33:28,779 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 13:33:28,779 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-24 13:33:28,779 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-01-24 13:33:28,779 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-24 13:33:28,780 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-24 13:33:28,780 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 13:33:28,780 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-24 13:33:28,780 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-01-24 13:33:28,780 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-24 13:33:28,780 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-24 13:33:28,781 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-24 13:33:28,781 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-24 13:33:28,781 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-01-24 13:33:28,781 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-24 13:33:28,781 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-24 13:33:28,781 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-24 13:33:28,781 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_get [2018-01-24 13:33:28,781 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_put [2018-01-24 13:33:28,782 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 13:33:28,782 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 13:33:28,782 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 13:33:28,782 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 13:33:29,121 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-24 13:33:29,286 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 13:33:29,287 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 01:33:29 BoogieIcfgContainer [2018-01-24 13:33:29,287 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 13:33:29,289 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 13:33:29,289 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 13:33:29,291 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 13:33:29,291 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 01:33:28" (1/3) ... [2018-01-24 13:33:29,292 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4fcba919 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 01:33:29, skipping insertion in model container [2018-01-24 13:33:29,292 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:33:28" (2/3) ... [2018-01-24 13:33:29,293 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4fcba919 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 01:33:29, skipping insertion in model container [2018-01-24 13:33:29,293 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 01:33:29" (3/3) ... [2018-01-24 13:33:29,294 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test22_3_true-valid-memsafety_true-termination.i [2018-01-24 13:33:29,300 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 13:33:29,306 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-01-24 13:33:29,357 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 13:33:29,357 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 13:33:29,358 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 13:33:29,358 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 13:33:29,358 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 13:33:29,358 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 13:33:29,358 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 13:33:29,358 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 13:33:29,359 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 13:33:29,383 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states. [2018-01-24 13:33:29,389 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 13:33:29,390 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:29,391 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:29,391 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:29,396 INFO L82 PathProgramCache]: Analyzing trace with hash 1245228870, now seen corresponding path program 1 times [2018-01-24 13:33:29,399 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:29,466 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:29,466 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:29,467 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:29,467 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:29,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:29,531 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:29,754 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:29,756 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:33:29,757 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 13:33:29,757 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:33:29,761 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:33:29,772 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:33:29,772 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:33:29,774 INFO L87 Difference]: Start difference. First operand 151 states. Second operand 5 states. [2018-01-24 13:33:29,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:29,868 INFO L93 Difference]: Finished difference Result 290 states and 307 transitions. [2018-01-24 13:33:29,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:33:29,870 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 13:33:29,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:29,885 INFO L225 Difference]: With dead ends: 290 [2018-01-24 13:33:29,885 INFO L226 Difference]: Without dead ends: 154 [2018-01-24 13:33:29,890 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:33:29,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-01-24 13:33:29,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 152. [2018-01-24 13:33:29,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-01-24 13:33:29,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 161 transitions. [2018-01-24 13:33:29,946 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 161 transitions. Word has length 17 [2018-01-24 13:33:29,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:29,946 INFO L432 AbstractCegarLoop]: Abstraction has 152 states and 161 transitions. [2018-01-24 13:33:29,947 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:33:29,947 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 161 transitions. [2018-01-24 13:33:29,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 13:33:29,948 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:29,948 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:29,948 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:29,949 INFO L82 PathProgramCache]: Analyzing trace with hash -1572748952, now seen corresponding path program 1 times [2018-01-24 13:33:29,949 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:29,951 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:29,951 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:29,951 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:29,951 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:29,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:29,975 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:30,064 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:30,065 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:33:30,065 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 13:33:30,065 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:33:30,067 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:33:30,067 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:33:30,067 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:33:30,068 INFO L87 Difference]: Start difference. First operand 152 states and 161 transitions. Second operand 6 states. [2018-01-24 13:33:30,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:30,238 INFO L93 Difference]: Finished difference Result 154 states and 163 transitions. [2018-01-24 13:33:30,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:33:30,239 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-24 13:33:30,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:30,242 INFO L225 Difference]: With dead ends: 154 [2018-01-24 13:33:30,243 INFO L226 Difference]: Without dead ends: 153 [2018-01-24 13:33:30,244 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:33:30,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-01-24 13:33:30,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 151. [2018-01-24 13:33:30,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-01-24 13:33:30,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 160 transitions. [2018-01-24 13:33:30,263 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 160 transitions. Word has length 19 [2018-01-24 13:33:30,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:30,263 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 160 transitions. [2018-01-24 13:33:30,264 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:33:30,264 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 160 transitions. [2018-01-24 13:33:30,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 13:33:30,265 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:30,265 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:30,265 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:30,265 INFO L82 PathProgramCache]: Analyzing trace with hash -1572748951, now seen corresponding path program 1 times [2018-01-24 13:33:30,265 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:30,267 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:30,267 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:30,267 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:30,267 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:30,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:30,294 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:30,571 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:30,571 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:33:30,571 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:33:30,571 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:33:30,572 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:33:30,572 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:33:30,572 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:33:30,572 INFO L87 Difference]: Start difference. First operand 151 states and 160 transitions. Second operand 7 states. [2018-01-24 13:33:30,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:30,804 INFO L93 Difference]: Finished difference Result 153 states and 162 transitions. [2018-01-24 13:33:30,805 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:33:30,805 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-24 13:33:30,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:30,806 INFO L225 Difference]: With dead ends: 153 [2018-01-24 13:33:30,807 INFO L226 Difference]: Without dead ends: 152 [2018-01-24 13:33:30,807 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:33:30,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-01-24 13:33:30,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 150. [2018-01-24 13:33:30,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-01-24 13:33:30,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 159 transitions. [2018-01-24 13:33:30,820 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 159 transitions. Word has length 19 [2018-01-24 13:33:30,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:30,821 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 159 transitions. [2018-01-24 13:33:30,821 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:33:30,821 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 159 transitions. [2018-01-24 13:33:30,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 13:33:30,822 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:30,823 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:30,823 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:30,823 INFO L82 PathProgramCache]: Analyzing trace with hash -336004596, now seen corresponding path program 1 times [2018-01-24 13:33:30,823 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:30,825 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:30,825 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:30,825 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:30,825 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:30,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:30,844 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:30,950 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:30,951 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:33:30,951 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:33:30,951 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:33:30,952 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 13:33:30,952 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 13:33:30,952 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:33:30,952 INFO L87 Difference]: Start difference. First operand 150 states and 159 transitions. Second operand 9 states. [2018-01-24 13:33:31,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:31,171 INFO L93 Difference]: Finished difference Result 256 states and 271 transitions. [2018-01-24 13:33:31,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:33:31,171 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-01-24 13:33:31,172 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:31,173 INFO L225 Difference]: With dead ends: 256 [2018-01-24 13:33:31,174 INFO L226 Difference]: Without dead ends: 171 [2018-01-24 13:33:31,175 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:33:31,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-01-24 13:33:31,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 164. [2018-01-24 13:33:31,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-01-24 13:33:31,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 173 transitions. [2018-01-24 13:33:31,191 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 173 transitions. Word has length 29 [2018-01-24 13:33:31,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:31,192 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 173 transitions. [2018-01-24 13:33:31,192 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 13:33:31,192 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 173 transitions. [2018-01-24 13:33:31,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 13:33:31,193 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:31,194 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:31,194 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:31,194 INFO L82 PathProgramCache]: Analyzing trace with hash 610577100, now seen corresponding path program 1 times [2018-01-24 13:33:31,194 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:31,196 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:31,196 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:31,196 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:31,196 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:31,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:31,216 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:31,385 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:31,385 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:33:31,385 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:33:31,385 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:33:31,386 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:33:31,386 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:33:31,386 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:33:31,386 INFO L87 Difference]: Start difference. First operand 164 states and 173 transitions. Second operand 10 states. [2018-01-24 13:33:31,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:31,672 INFO L93 Difference]: Finished difference Result 164 states and 173 transitions. [2018-01-24 13:33:31,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:33:31,673 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-01-24 13:33:31,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:31,675 INFO L225 Difference]: With dead ends: 164 [2018-01-24 13:33:31,675 INFO L226 Difference]: Without dead ends: 163 [2018-01-24 13:33:31,676 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:33:31,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-01-24 13:33:31,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-01-24 13:33:31,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-01-24 13:33:31,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 172 transitions. [2018-01-24 13:33:31,690 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 172 transitions. Word has length 34 [2018-01-24 13:33:31,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:31,691 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 172 transitions. [2018-01-24 13:33:31,691 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:33:31,691 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 172 transitions. [2018-01-24 13:33:31,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 13:33:31,692 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:31,693 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:31,693 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:31,693 INFO L82 PathProgramCache]: Analyzing trace with hash 610577101, now seen corresponding path program 1 times [2018-01-24 13:33:31,693 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:31,695 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:31,695 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:31,695 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:31,695 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:31,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:31,715 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:31,764 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:31,765 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:33:31,765 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:33:31,765 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:33:31,765 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:33:31,765 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:33:31,766 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:33:31,766 INFO L87 Difference]: Start difference. First operand 163 states and 172 transitions. Second operand 4 states. [2018-01-24 13:33:31,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:31,790 INFO L93 Difference]: Finished difference Result 287 states and 303 transitions. [2018-01-24 13:33:31,790 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:33:31,790 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-01-24 13:33:31,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:31,792 INFO L225 Difference]: With dead ends: 287 [2018-01-24 13:33:31,792 INFO L226 Difference]: Without dead ends: 164 [2018-01-24 13:33:31,793 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:33:31,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-01-24 13:33:31,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 164. [2018-01-24 13:33:31,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-01-24 13:33:31,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 173 transitions. [2018-01-24 13:33:31,806 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 173 transitions. Word has length 34 [2018-01-24 13:33:31,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:31,806 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 173 transitions. [2018-01-24 13:33:31,806 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:33:31,806 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 173 transitions. [2018-01-24 13:33:31,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 13:33:31,807 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:31,808 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:31,808 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:31,808 INFO L82 PathProgramCache]: Analyzing trace with hash -838244594, now seen corresponding path program 1 times [2018-01-24 13:33:31,808 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:31,809 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:31,810 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:31,810 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:31,810 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:31,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:31,828 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:31,863 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:31,864 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:33:31,864 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:33:31,871 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:31,872 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:33:31,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:31,923 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:33:31,956 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:31,957 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:33:32,066 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:32,088 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:33:32,088 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:33:32,101 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:32,102 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:33:32,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:32,173 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:33:32,179 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:32,180 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:33:32,217 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:32,219 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:33:32,219 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-24 13:33:32,219 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:33:32,220 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:33:32,220 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:33:32,220 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:33:32,221 INFO L87 Difference]: Start difference. First operand 164 states and 173 transitions. Second operand 6 states. [2018-01-24 13:33:32,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:32,256 INFO L93 Difference]: Finished difference Result 288 states and 304 transitions. [2018-01-24 13:33:32,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:33:32,258 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-24 13:33:32,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:32,260 INFO L225 Difference]: With dead ends: 288 [2018-01-24 13:33:32,260 INFO L226 Difference]: Without dead ends: 165 [2018-01-24 13:33:32,262 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:33:32,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-01-24 13:33:32,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 165. [2018-01-24 13:33:32,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-01-24 13:33:32,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 174 transitions. [2018-01-24 13:33:32,274 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 174 transitions. Word has length 35 [2018-01-24 13:33:32,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:32,275 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 174 transitions. [2018-01-24 13:33:32,275 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:33:32,275 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 174 transitions. [2018-01-24 13:33:32,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 13:33:32,276 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:32,276 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:32,276 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:32,277 INFO L82 PathProgramCache]: Analyzing trace with hash 1492923117, now seen corresponding path program 2 times [2018-01-24 13:33:32,277 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:32,278 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:32,278 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:32,278 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:32,278 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:32,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:32,299 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:32,412 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:32,413 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:33:32,413 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:33:32,420 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:33:32,421 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:33:32,447 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:33:32,460 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:33:32,465 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:33:32,498 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:33:32,500 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:33:32,518 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:33:32,519 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:33:32,546 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:33:32,546 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:33:33,241 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 13:33:33,241 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:33:36,911 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 13:33:36,931 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:33:36,931 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14, 13] imperfect sequences [6] total 31 [2018-01-24 13:33:36,931 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:33:36,932 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 13:33:36,932 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 13:33:36,933 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=838, Unknown=2, NotChecked=0, Total=930 [2018-01-24 13:33:36,933 INFO L87 Difference]: Start difference. First operand 165 states and 174 transitions. Second operand 15 states. [2018-01-24 13:33:40,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:40,222 INFO L93 Difference]: Finished difference Result 241 states and 253 transitions. [2018-01-24 13:33:40,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 13:33:40,222 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 36 [2018-01-24 13:33:40,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:40,224 INFO L225 Difference]: With dead ends: 241 [2018-01-24 13:33:40,225 INFO L226 Difference]: Without dead ends: 240 [2018-01-24 13:33:40,226 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 237 ImplicationChecksByTransitivity, 4.4s TimeCoverageRelationStatistics Valid=118, Invalid=1070, Unknown=2, NotChecked=0, Total=1190 [2018-01-24 13:33:40,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240 states. [2018-01-24 13:33:40,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240 to 164. [2018-01-24 13:33:40,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-01-24 13:33:40,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 173 transitions. [2018-01-24 13:33:40,242 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 173 transitions. Word has length 36 [2018-01-24 13:33:40,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:40,242 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 173 transitions. [2018-01-24 13:33:40,243 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 13:33:40,243 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 173 transitions. [2018-01-24 13:33:40,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 13:33:40,244 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:40,245 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:40,245 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:40,245 INFO L82 PathProgramCache]: Analyzing trace with hash 278126369, now seen corresponding path program 1 times [2018-01-24 13:33:40,245 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:40,246 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:40,247 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:33:40,247 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:40,247 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:40,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:40,260 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:40,432 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:40,432 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:33:40,432 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:33:40,432 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:33:40,433 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 13:33:40,433 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 13:33:40,433 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:33:40,433 INFO L87 Difference]: Start difference. First operand 164 states and 173 transitions. Second operand 9 states. [2018-01-24 13:33:40,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:40,543 INFO L93 Difference]: Finished difference Result 237 states and 253 transitions. [2018-01-24 13:33:40,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:33:40,544 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 42 [2018-01-24 13:33:40,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:40,545 INFO L225 Difference]: With dead ends: 237 [2018-01-24 13:33:40,545 INFO L226 Difference]: Without dead ends: 178 [2018-01-24 13:33:40,559 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:33:40,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-01-24 13:33:40,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 174. [2018-01-24 13:33:40,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-01-24 13:33:40,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 184 transitions. [2018-01-24 13:33:40,574 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 184 transitions. Word has length 42 [2018-01-24 13:33:40,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:40,574 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 184 transitions. [2018-01-24 13:33:40,574 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 13:33:40,574 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 184 transitions. [2018-01-24 13:33:40,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 13:33:40,575 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:40,575 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:40,576 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:40,576 INFO L82 PathProgramCache]: Analyzing trace with hash -870895777, now seen corresponding path program 1 times [2018-01-24 13:33:40,576 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:40,577 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:40,577 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:40,578 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:40,578 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:40,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:40,592 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:40,810 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 13:33:40,810 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:33:40,810 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:33:40,810 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:33:40,811 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:33:40,811 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:33:40,811 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:33:40,811 INFO L87 Difference]: Start difference. First operand 174 states and 184 transitions. Second operand 10 states. [2018-01-24 13:33:41,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:41,047 INFO L93 Difference]: Finished difference Result 174 states and 184 transitions. [2018-01-24 13:33:41,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:33:41,048 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 41 [2018-01-24 13:33:41,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:41,049 INFO L225 Difference]: With dead ends: 174 [2018-01-24 13:33:41,049 INFO L226 Difference]: Without dead ends: 172 [2018-01-24 13:33:41,050 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:33:41,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-01-24 13:33:41,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 172. [2018-01-24 13:33:41,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-01-24 13:33:41,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 182 transitions. [2018-01-24 13:33:41,067 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 182 transitions. Word has length 41 [2018-01-24 13:33:41,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:41,067 INFO L432 AbstractCegarLoop]: Abstraction has 172 states and 182 transitions. [2018-01-24 13:33:41,067 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:33:41,067 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 182 transitions. [2018-01-24 13:33:41,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 13:33:41,069 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:41,069 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:41,069 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:41,069 INFO L82 PathProgramCache]: Analyzing trace with hash -870895776, now seen corresponding path program 1 times [2018-01-24 13:33:41,070 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:41,071 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:41,071 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:41,071 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:41,071 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:41,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:41,088 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:41,133 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:41,134 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:33:41,134 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:33:41,139 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:41,139 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:33:41,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:41,161 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:33:41,172 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:41,173 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:33:41,253 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:41,278 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:33:41,278 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:33:41,282 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:41,282 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:33:41,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:41,326 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:33:41,330 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:41,338 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:33:41,361 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:41,362 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:33:41,362 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-24 13:33:41,362 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:33:41,363 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:33:41,363 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:33:41,363 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:33:41,363 INFO L87 Difference]: Start difference. First operand 172 states and 182 transitions. Second operand 7 states. [2018-01-24 13:33:41,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:41,406 INFO L93 Difference]: Finished difference Result 293 states and 310 transitions. [2018-01-24 13:33:41,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:33:41,407 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 41 [2018-01-24 13:33:41,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:41,409 INFO L225 Difference]: With dead ends: 293 [2018-01-24 13:33:41,409 INFO L226 Difference]: Without dead ends: 173 [2018-01-24 13:33:41,410 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-24 13:33:41,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-01-24 13:33:41,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 173. [2018-01-24 13:33:41,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-01-24 13:33:41,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 183 transitions. [2018-01-24 13:33:41,427 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 183 transitions. Word has length 41 [2018-01-24 13:33:41,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:41,427 INFO L432 AbstractCegarLoop]: Abstraction has 173 states and 183 transitions. [2018-01-24 13:33:41,427 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:33:41,427 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 183 transitions. [2018-01-24 13:33:41,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 13:33:41,428 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:41,428 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:41,429 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:41,429 INFO L82 PathProgramCache]: Analyzing trace with hash 2131974143, now seen corresponding path program 2 times [2018-01-24 13:33:41,429 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:41,430 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:41,430 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:41,430 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:41,430 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:41,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:41,448 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:41,575 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:41,576 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:33:41,576 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:33:41,588 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:33:41,589 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:33:41,606 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:33:41,608 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:33:41,611 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:33:41,617 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:33:41,618 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:33:41,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:33:41,634 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:33:41,645 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:33:41,645 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:33:42,217 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:33:42,217 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:33:42,630 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:33:42,650 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:33:42,650 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15, 13] imperfect sequences [7] total 33 [2018-01-24 13:33:42,650 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:33:42,651 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 13:33:42,651 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 13:33:42,651 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=951, Unknown=0, NotChecked=0, Total=1056 [2018-01-24 13:33:42,652 INFO L87 Difference]: Start difference. First operand 173 states and 183 transitions. Second operand 16 states. [2018-01-24 13:33:44,756 WARN L143 SmtUtils]: Spent 2053ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-24 13:33:45,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:46,555 INFO L93 Difference]: Finished difference Result 205 states and 214 transitions. [2018-01-24 13:33:46,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 13:33:46,556 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 42 [2018-01-24 13:33:46,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:46,558 INFO L225 Difference]: With dead ends: 205 [2018-01-24 13:33:46,558 INFO L226 Difference]: Without dead ends: 203 [2018-01-24 13:33:46,559 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 57 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 317 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=136, Invalid=1196, Unknown=0, NotChecked=0, Total=1332 [2018-01-24 13:33:46,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203 states. [2018-01-24 13:33:46,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203 to 171. [2018-01-24 13:33:46,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-01-24 13:33:46,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 181 transitions. [2018-01-24 13:33:46,595 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 181 transitions. Word has length 42 [2018-01-24 13:33:46,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:46,596 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 181 transitions. [2018-01-24 13:33:46,596 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 13:33:46,596 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 181 transitions. [2018-01-24 13:33:46,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 13:33:46,598 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:46,598 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:46,598 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:46,598 INFO L82 PathProgramCache]: Analyzing trace with hash 799197829, now seen corresponding path program 1 times [2018-01-24 13:33:46,599 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:46,600 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:46,600 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:33:46,600 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:46,601 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:46,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:46,620 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:46,706 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:33:46,706 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:33:46,706 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 13:33:46,706 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:33:46,706 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 13:33:46,707 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 13:33:46,707 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:33:46,707 INFO L87 Difference]: Start difference. First operand 171 states and 181 transitions. Second operand 8 states. [2018-01-24 13:33:46,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:46,765 INFO L93 Difference]: Finished difference Result 291 states and 306 transitions. [2018-01-24 13:33:46,765 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:33:46,765 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 47 [2018-01-24 13:33:46,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:46,767 INFO L225 Difference]: With dead ends: 291 [2018-01-24 13:33:46,767 INFO L226 Difference]: Without dead ends: 171 [2018-01-24 13:33:46,768 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:33:46,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-01-24 13:33:46,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 171. [2018-01-24 13:33:46,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-01-24 13:33:46,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 179 transitions. [2018-01-24 13:33:46,788 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 179 transitions. Word has length 47 [2018-01-24 13:33:46,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:46,789 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 179 transitions. [2018-01-24 13:33:46,789 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 13:33:46,789 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 179 transitions. [2018-01-24 13:33:46,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 13:33:46,790 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:46,790 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:46,790 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:46,790 INFO L82 PathProgramCache]: Analyzing trace with hash 689381786, now seen corresponding path program 1 times [2018-01-24 13:33:46,790 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:46,792 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:46,792 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:46,792 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:46,792 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:46,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:46,801 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:46,832 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-24 13:33:46,833 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:33:46,833 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 13:33:46,833 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:33:46,833 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 13:33:46,834 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 13:33:46,834 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:33:46,834 INFO L87 Difference]: Start difference. First operand 171 states and 179 transitions. Second operand 3 states. [2018-01-24 13:33:46,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:46,976 INFO L93 Difference]: Finished difference Result 185 states and 193 transitions. [2018-01-24 13:33:46,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 13:33:46,976 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 47 [2018-01-24 13:33:46,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:46,977 INFO L225 Difference]: With dead ends: 185 [2018-01-24 13:33:46,978 INFO L226 Difference]: Without dead ends: 153 [2018-01-24 13:33:46,978 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:33:46,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-01-24 13:33:46,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 143. [2018-01-24 13:33:46,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-24 13:33:46,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 149 transitions. [2018-01-24 13:33:46,993 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 149 transitions. Word has length 47 [2018-01-24 13:33:46,993 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:46,994 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 149 transitions. [2018-01-24 13:33:46,994 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 13:33:46,994 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 149 transitions. [2018-01-24 13:33:46,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-24 13:33:46,995 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:46,995 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:46,995 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:46,995 INFO L82 PathProgramCache]: Analyzing trace with hash 1696219427, now seen corresponding path program 1 times [2018-01-24 13:33:46,995 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:46,996 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:46,996 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:46,996 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:46,996 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:47,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:47,007 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:47,064 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:33:47,064 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:33:47,064 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-24 13:33:47,064 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:33:47,064 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:33:47,065 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:33:47,065 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:33:47,065 INFO L87 Difference]: Start difference. First operand 143 states and 149 transitions. Second operand 10 states. [2018-01-24 13:33:47,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:47,143 INFO L93 Difference]: Finished difference Result 241 states and 251 transitions. [2018-01-24 13:33:47,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:33:47,144 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 52 [2018-01-24 13:33:47,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:47,145 INFO L225 Difference]: With dead ends: 241 [2018-01-24 13:33:47,145 INFO L226 Difference]: Without dead ends: 143 [2018-01-24 13:33:47,146 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:33:47,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-24 13:33:47,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-01-24 13:33:47,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-24 13:33:47,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 148 transitions. [2018-01-24 13:33:47,177 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 148 transitions. Word has length 52 [2018-01-24 13:33:47,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:47,177 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 148 transitions. [2018-01-24 13:33:47,178 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:33:47,178 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 148 transitions. [2018-01-24 13:33:47,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-24 13:33:47,178 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:47,178 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:47,179 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:47,179 INFO L82 PathProgramCache]: Analyzing trace with hash 381457938, now seen corresponding path program 1 times [2018-01-24 13:33:47,179 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:47,180 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:47,180 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:47,180 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:47,180 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:47,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:47,195 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:47,534 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:33:47,534 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:33:47,534 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-01-24 13:33:47,534 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:33:47,535 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 13:33:47,535 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 13:33:47,535 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-01-24 13:33:47,535 INFO L87 Difference]: Start difference. First operand 143 states and 148 transitions. Second operand 15 states. [2018-01-24 13:33:47,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:47,848 INFO L93 Difference]: Finished difference Result 143 states and 148 transitions. [2018-01-24 13:33:47,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 13:33:47,848 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 63 [2018-01-24 13:33:47,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:47,849 INFO L225 Difference]: With dead ends: 143 [2018-01-24 13:33:47,849 INFO L226 Difference]: Without dead ends: 141 [2018-01-24 13:33:47,850 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=47, Invalid=333, Unknown=0, NotChecked=0, Total=380 [2018-01-24 13:33:47,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-01-24 13:33:47,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-01-24 13:33:47,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-01-24 13:33:47,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 146 transitions. [2018-01-24 13:33:47,867 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 146 transitions. Word has length 63 [2018-01-24 13:33:47,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:47,868 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 146 transitions. [2018-01-24 13:33:47,868 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 13:33:47,868 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 146 transitions. [2018-01-24 13:33:47,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-24 13:33:47,869 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:47,869 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:47,869 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:47,869 INFO L82 PathProgramCache]: Analyzing trace with hash 381457939, now seen corresponding path program 1 times [2018-01-24 13:33:47,869 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:47,870 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:47,870 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:47,871 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:47,871 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:47,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:47,889 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:47,956 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:47,957 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:33:47,957 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:33:47,967 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:47,967 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:33:48,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:48,006 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:33:48,023 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:48,023 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:33:48,212 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:48,245 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:33:48,245 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:33:48,249 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:48,249 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:33:48,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:48,325 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:33:48,330 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:48,330 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:33:48,410 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:48,411 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:33:48,411 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-24 13:33:48,411 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:33:48,412 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 13:33:48,412 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 13:33:48,412 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:33:48,412 INFO L87 Difference]: Start difference. First operand 141 states and 146 transitions. Second operand 8 states. [2018-01-24 13:33:48,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:48,444 INFO L93 Difference]: Finished difference Result 258 states and 268 transitions. [2018-01-24 13:33:48,444 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:33:48,445 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 63 [2018-01-24 13:33:48,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:48,446 INFO L225 Difference]: With dead ends: 258 [2018-01-24 13:33:48,446 INFO L226 Difference]: Without dead ends: 142 [2018-01-24 13:33:48,447 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 258 GetRequests, 244 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-24 13:33:48,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-01-24 13:33:48,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-01-24 13:33:48,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-01-24 13:33:48,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 147 transitions. [2018-01-24 13:33:48,473 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 147 transitions. Word has length 63 [2018-01-24 13:33:48,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:48,474 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 147 transitions. [2018-01-24 13:33:48,474 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 13:33:48,474 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 147 transitions. [2018-01-24 13:33:48,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-01-24 13:33:48,475 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:48,475 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:48,475 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:48,476 INFO L82 PathProgramCache]: Analyzing trace with hash -109515406, now seen corresponding path program 2 times [2018-01-24 13:33:48,476 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:48,477 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:48,477 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:48,477 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:48,477 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:48,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:48,499 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:48,558 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:48,559 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:33:48,559 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:33:48,571 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:33:48,572 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:33:48,610 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:33:48,616 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:33:48,621 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:33:48,626 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:33:48,627 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:33:48,670 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:33:48,671 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:33:48,707 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:33:48,707 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:33:49,689 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:33:49,689 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:33:50,625 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:33:50,648 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:33:50,648 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20, 18] imperfect sequences [8] total 44 [2018-01-24 13:33:50,648 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:33:50,648 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-24 13:33:50,648 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-24 13:33:50,649 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=146, Invalid=1746, Unknown=0, NotChecked=0, Total=1892 [2018-01-24 13:33:50,649 INFO L87 Difference]: Start difference. First operand 142 states and 147 transitions. Second operand 21 states. [2018-01-24 13:33:52,740 WARN L143 SmtUtils]: Spent 2031ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-24 13:33:54,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:54,324 INFO L93 Difference]: Finished difference Result 142 states and 147 transitions. [2018-01-24 13:33:54,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-24 13:33:54,324 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 64 [2018-01-24 13:33:54,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:54,325 INFO L225 Difference]: With dead ends: 142 [2018-01-24 13:33:54,325 INFO L226 Difference]: Without dead ends: 140 [2018-01-24 13:33:54,326 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 91 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 630 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=195, Invalid=2255, Unknown=0, NotChecked=0, Total=2450 [2018-01-24 13:33:54,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-01-24 13:33:54,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-01-24 13:33:54,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-01-24 13:33:54,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 145 transitions. [2018-01-24 13:33:54,339 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 145 transitions. Word has length 64 [2018-01-24 13:33:54,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:54,340 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 145 transitions. [2018-01-24 13:33:54,340 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-24 13:33:54,340 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 145 transitions. [2018-01-24 13:33:54,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-01-24 13:33:54,341 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:54,341 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:54,342 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:54,343 INFO L82 PathProgramCache]: Analyzing trace with hash -866691108, now seen corresponding path program 1 times [2018-01-24 13:33:54,343 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:54,344 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:54,344 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:33:54,344 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:54,345 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:54,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:54,366 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:54,781 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:33:54,782 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:33:54,782 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-01-24 13:33:54,782 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:33:54,782 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 13:33:54,782 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 13:33:54,783 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:33:54,783 INFO L87 Difference]: Start difference. First operand 140 states and 145 transitions. Second operand 13 states. [2018-01-24 13:33:54,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:54,966 INFO L93 Difference]: Finished difference Result 208 states and 216 transitions. [2018-01-24 13:33:54,966 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 13:33:54,966 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 77 [2018-01-24 13:33:54,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:54,967 INFO L225 Difference]: With dead ends: 208 [2018-01-24 13:33:54,968 INFO L226 Difference]: Without dead ends: 140 [2018-01-24 13:33:54,968 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:33:54,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-01-24 13:33:54,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-01-24 13:33:54,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-01-24 13:33:54,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 144 transitions. [2018-01-24 13:33:54,988 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 144 transitions. Word has length 77 [2018-01-24 13:33:54,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:54,989 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 144 transitions. [2018-01-24 13:33:54,989 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 13:33:54,989 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 144 transitions. [2018-01-24 13:33:54,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-01-24 13:33:54,990 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:54,990 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:54,990 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:54,991 INFO L82 PathProgramCache]: Analyzing trace with hash -1579109870, now seen corresponding path program 1 times [2018-01-24 13:33:54,991 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:54,992 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:54,992 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:54,992 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:54,992 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:55,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:55,017 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:55,280 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:33:55,280 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:33:55,280 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-01-24 13:33:55,280 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:33:55,280 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-24 13:33:55,280 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-24 13:33:55,281 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=419, Unknown=0, NotChecked=0, Total=462 [2018-01-24 13:33:55,281 INFO L87 Difference]: Start difference. First operand 140 states and 144 transitions. Second operand 22 states. [2018-01-24 13:33:55,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:55,825 INFO L93 Difference]: Finished difference Result 169 states and 179 transitions. [2018-01-24 13:33:55,825 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-24 13:33:55,826 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 90 [2018-01-24 13:33:55,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:55,827 INFO L225 Difference]: With dead ends: 169 [2018-01-24 13:33:55,827 INFO L226 Difference]: Without dead ends: 167 [2018-01-24 13:33:55,827 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=75, Invalid=795, Unknown=0, NotChecked=0, Total=870 [2018-01-24 13:33:55,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-01-24 13:33:55,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 162. [2018-01-24 13:33:55,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-01-24 13:33:55,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 172 transitions. [2018-01-24 13:33:55,850 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 172 transitions. Word has length 90 [2018-01-24 13:33:55,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:55,850 INFO L432 AbstractCegarLoop]: Abstraction has 162 states and 172 transitions. [2018-01-24 13:33:55,851 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-24 13:33:55,851 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 172 transitions. [2018-01-24 13:33:55,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-01-24 13:33:55,852 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:55,852 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:55,852 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:55,852 INFO L82 PathProgramCache]: Analyzing trace with hash -1579109869, now seen corresponding path program 1 times [2018-01-24 13:33:55,852 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:55,853 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:55,853 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:55,854 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:55,854 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:55,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:55,879 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:56,039 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:56,040 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:33:56,040 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:33:56,049 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:56,049 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:33:56,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:56,121 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:33:56,153 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:56,153 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:33:56,318 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:56,339 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:33:56,339 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:33:56,344 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:56,344 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:33:56,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:56,448 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:33:56,459 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:56,459 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:33:56,631 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:56,635 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:33:56,635 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-24 13:33:56,635 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:33:56,636 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 13:33:56,636 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 13:33:56,636 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-24 13:33:56,636 INFO L87 Difference]: Start difference. First operand 162 states and 172 transitions. Second operand 9 states. [2018-01-24 13:33:56,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:33:56,772 INFO L93 Difference]: Finished difference Result 299 states and 319 transitions. [2018-01-24 13:33:56,772 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:33:56,773 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 90 [2018-01-24 13:33:56,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:33:56,773 INFO L225 Difference]: With dead ends: 299 [2018-01-24 13:33:56,774 INFO L226 Difference]: Without dead ends: 163 [2018-01-24 13:33:56,774 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 367 GetRequests, 351 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-24 13:33:56,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-01-24 13:33:56,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-01-24 13:33:56,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-01-24 13:33:56,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 173 transitions. [2018-01-24 13:33:56,789 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 173 transitions. Word has length 90 [2018-01-24 13:33:56,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:33:56,789 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 173 transitions. [2018-01-24 13:33:56,789 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 13:33:56,789 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 173 transitions. [2018-01-24 13:33:56,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-01-24 13:33:56,790 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:33:56,790 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:33:56,790 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:33:56,790 INFO L82 PathProgramCache]: Analyzing trace with hash 1354217300, now seen corresponding path program 2 times [2018-01-24 13:33:56,790 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:33:56,791 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:56,791 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:33:56,791 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:33:56,791 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:33:56,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:33:56,808 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:33:56,888 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:33:56,888 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:33:56,888 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:33:56,895 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:33:56,895 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:33:56,929 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:33:56,934 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:33:56,938 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:33:56,942 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:33:56,942 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:33:56,958 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:33:56,958 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:33:56,969 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:33:56,970 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:33:57,764 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 13:33:57,764 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:34:00,502 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 13:34:00,522 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:34:00,522 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22, 20] imperfect sequences [9] total 49 [2018-01-24 13:34:00,522 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:34:00,522 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-24 13:34:00,523 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-24 13:34:00,523 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=2184, Unknown=1, NotChecked=0, Total=2352 [2018-01-24 13:34:00,523 INFO L87 Difference]: Start difference. First operand 163 states and 173 transitions. Second operand 23 states. [2018-01-24 13:34:01,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:34:01,819 INFO L93 Difference]: Finished difference Result 163 states and 173 transitions. [2018-01-24 13:34:01,820 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-24 13:34:01,820 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 91 [2018-01-24 13:34:01,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:34:01,821 INFO L225 Difference]: With dead ends: 163 [2018-01-24 13:34:01,821 INFO L226 Difference]: Without dead ends: 161 [2018-01-24 13:34:01,822 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 197 GetRequests, 139 SyntacticMatches, 4 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 824 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=224, Invalid=2855, Unknown=1, NotChecked=0, Total=3080 [2018-01-24 13:34:01,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-01-24 13:34:01,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 161. [2018-01-24 13:34:01,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-01-24 13:34:01,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 169 transitions. [2018-01-24 13:34:01,843 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 169 transitions. Word has length 91 [2018-01-24 13:34:01,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:34:01,843 INFO L432 AbstractCegarLoop]: Abstraction has 161 states and 169 transitions. [2018-01-24 13:34:01,843 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-24 13:34:01,843 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 169 transitions. [2018-01-24 13:34:01,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-01-24 13:34:01,844 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:34:01,844 INFO L322 BasicCegarLoop]: trace histogram [5, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:34:01,844 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:34:01,845 INFO L82 PathProgramCache]: Analyzing trace with hash 1220226594, now seen corresponding path program 1 times [2018-01-24 13:34:01,845 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:34:01,846 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:34:01,846 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:34:01,846 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:34:01,846 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:34:01,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:34:01,867 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:34:02,000 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 13:34:02,000 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:34:02,000 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-01-24 13:34:02,000 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:34:02,001 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 13:34:02,001 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 13:34:02,001 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:34:02,001 INFO L87 Difference]: Start difference. First operand 161 states and 169 transitions. Second operand 13 states. [2018-01-24 13:34:02,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:34:02,130 INFO L93 Difference]: Finished difference Result 219 states and 229 transitions. [2018-01-24 13:34:02,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 13:34:02,131 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 98 [2018-01-24 13:34:02,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:34:02,132 INFO L225 Difference]: With dead ends: 219 [2018-01-24 13:34:02,132 INFO L226 Difference]: Without dead ends: 159 [2018-01-24 13:34:02,132 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:34:02,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-01-24 13:34:02,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-01-24 13:34:02,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-01-24 13:34:02,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 165 transitions. [2018-01-24 13:34:02,149 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 165 transitions. Word has length 98 [2018-01-24 13:34:02,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:34:02,149 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 165 transitions. [2018-01-24 13:34:02,150 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 13:34:02,150 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 165 transitions. [2018-01-24 13:34:02,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-01-24 13:34:02,150 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:34:02,151 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:34:02,151 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:34:02,151 INFO L82 PathProgramCache]: Analyzing trace with hash -1069596524, now seen corresponding path program 1 times [2018-01-24 13:34:02,151 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:34:02,152 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:34:02,152 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:34:02,152 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:34:02,152 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:34:02,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:34:02,178 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:34:02,669 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 13:34:02,669 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:34:02,669 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-01-24 13:34:02,669 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:34:02,670 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-24 13:34:02,670 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-24 13:34:02,670 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=553, Unknown=0, NotChecked=0, Total=600 [2018-01-24 13:34:02,670 INFO L87 Difference]: Start difference. First operand 159 states and 165 transitions. Second operand 25 states. [2018-01-24 13:34:03,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:34:03,225 INFO L93 Difference]: Finished difference Result 171 states and 181 transitions. [2018-01-24 13:34:03,225 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-24 13:34:03,226 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 105 [2018-01-24 13:34:03,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:34:03,227 INFO L225 Difference]: With dead ends: 171 [2018-01-24 13:34:03,227 INFO L226 Difference]: Without dead ends: 169 [2018-01-24 13:34:03,227 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=91, Invalid=1169, Unknown=0, NotChecked=0, Total=1260 [2018-01-24 13:34:03,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-01-24 13:34:03,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 165. [2018-01-24 13:34:03,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-01-24 13:34:03,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 175 transitions. [2018-01-24 13:34:03,245 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 175 transitions. Word has length 105 [2018-01-24 13:34:03,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:34:03,246 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 175 transitions. [2018-01-24 13:34:03,246 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-24 13:34:03,246 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 175 transitions. [2018-01-24 13:34:03,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-01-24 13:34:03,247 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:34:03,247 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:34:03,247 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:34:03,247 INFO L82 PathProgramCache]: Analyzing trace with hash -1069596523, now seen corresponding path program 1 times [2018-01-24 13:34:03,247 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:34:03,248 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:34:03,248 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:34:03,248 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:34:03,248 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:34:03,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:34:03,266 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:34:03,439 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:34:03,440 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:34:03,440 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:34:03,445 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:34:03,445 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:34:03,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:34:03,510 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:34:03,539 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:34:03,539 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:34:03,700 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:34:03,721 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:34:03,721 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:34:03,726 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:34:03,726 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:34:03,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:34:03,844 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:34:03,856 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:34:03,856 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:34:03,954 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:34:03,956 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:34:03,956 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-24 13:34:03,956 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:34:03,957 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:34:03,957 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:34:03,957 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:34:03,957 INFO L87 Difference]: Start difference. First operand 165 states and 175 transitions. Second operand 10 states. [2018-01-24 13:34:03,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:34:03,990 INFO L93 Difference]: Finished difference Result 304 states and 324 transitions. [2018-01-24 13:34:03,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 13:34:03,991 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 105 [2018-01-24 13:34:03,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:34:03,992 INFO L225 Difference]: With dead ends: 304 [2018-01-24 13:34:03,992 INFO L226 Difference]: Without dead ends: 166 [2018-01-24 13:34:03,992 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 428 GetRequests, 410 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-24 13:34:03,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-01-24 13:34:04,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 166. [2018-01-24 13:34:04,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-01-24 13:34:04,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 176 transitions. [2018-01-24 13:34:04,011 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 176 transitions. Word has length 105 [2018-01-24 13:34:04,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:34:04,012 INFO L432 AbstractCegarLoop]: Abstraction has 166 states and 176 transitions. [2018-01-24 13:34:04,012 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:34:04,012 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 176 transitions. [2018-01-24 13:34:04,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-01-24 13:34:04,014 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:34:04,014 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:34:04,014 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:34:04,014 INFO L82 PathProgramCache]: Analyzing trace with hash -941166284, now seen corresponding path program 2 times [2018-01-24 13:34:04,014 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:34:04,015 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:34:04,015 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:34:04,016 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:34:04,016 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:34:04,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:34:04,037 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:34:04,183 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:34:04,183 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:34:04,183 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:34:04,195 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:34:04,195 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:34:04,233 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:34:04,239 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:34:04,244 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:34:04,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:34:04,249 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:34:04,263 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:34:04,263 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:34:04,275 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:34:04,275 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:34:06,474 WARN L143 SmtUtils]: Spent 2024ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-24 13:34:07,463 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-24 13:34:07,463 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:34:10,594 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-24 13:34:10,614 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:34:10,614 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26, 24] imperfect sequences [10] total 58 [2018-01-24 13:34:10,614 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:34:10,615 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-24 13:34:10,615 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-24 13:34:10,616 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=203, Invalid=3102, Unknown=1, NotChecked=0, Total=3306 [2018-01-24 13:34:10,616 INFO L87 Difference]: Start difference. First operand 166 states and 176 transitions. Second operand 27 states. [2018-01-24 13:34:12,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:34:12,292 INFO L93 Difference]: Finished difference Result 166 states and 176 transitions. [2018-01-24 13:34:12,292 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-24 13:34:12,292 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 106 [2018-01-24 13:34:12,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:34:12,293 INFO L225 Difference]: With dead ends: 166 [2018-01-24 13:34:12,294 INFO L226 Difference]: Without dead ends: 164 [2018-01-24 13:34:12,295 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 230 GetRequests, 159 SyntacticMatches, 6 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1223 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=276, Invalid=4145, Unknown=1, NotChecked=0, Total=4422 [2018-01-24 13:34:12,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-01-24 13:34:12,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 164. [2018-01-24 13:34:12,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-01-24 13:34:12,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 173 transitions. [2018-01-24 13:34:12,331 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 173 transitions. Word has length 106 [2018-01-24 13:34:12,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:34:12,331 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 173 transitions. [2018-01-24 13:34:12,331 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-24 13:34:12,332 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 173 transitions. [2018-01-24 13:34:12,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-01-24 13:34:12,332 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:34:12,332 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:34:12,332 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:34:12,333 INFO L82 PathProgramCache]: Analyzing trace with hash -1409693771, now seen corresponding path program 1 times [2018-01-24 13:34:12,333 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:34:12,333 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:34:12,333 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:34:12,334 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:34:12,334 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:34:12,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:34:12,350 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:34:12,521 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:34:12,521 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:34:12,521 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:34:12,528 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:34:12,528 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:34:12,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:34:12,584 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:34:12,599 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:34:12,599 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:34:12,752 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:34:12,772 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:34:12,772 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:34:12,775 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:34:12,775 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:34:12,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:34:12,888 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:34:12,895 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:34:12,895 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:34:12,992 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:34:12,994 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:34:12,994 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-24 13:34:12,994 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:34:12,995 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 13:34:12,995 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 13:34:12,995 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-24 13:34:12,995 INFO L87 Difference]: Start difference. First operand 164 states and 173 transitions. Second operand 11 states. [2018-01-24 13:34:13,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:34:13,034 INFO L93 Difference]: Finished difference Result 301 states and 319 transitions. [2018-01-24 13:34:13,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:34:13,034 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 110 [2018-01-24 13:34:13,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:34:13,035 INFO L225 Difference]: With dead ends: 301 [2018-01-24 13:34:13,035 INFO L226 Difference]: Without dead ends: 165 [2018-01-24 13:34:13,036 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 449 GetRequests, 429 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-24 13:34:13,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-01-24 13:34:13,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 165. [2018-01-24 13:34:13,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-01-24 13:34:13,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 174 transitions. [2018-01-24 13:34:13,056 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 174 transitions. Word has length 110 [2018-01-24 13:34:13,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:34:13,056 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 174 transitions. [2018-01-24 13:34:13,056 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 13:34:13,056 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 174 transitions. [2018-01-24 13:34:13,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-01-24 13:34:13,057 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:34:13,057 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:34:13,057 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:34:13,058 INFO L82 PathProgramCache]: Analyzing trace with hash -1192058250, now seen corresponding path program 2 times [2018-01-24 13:34:13,058 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:34:13,058 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:34:13,059 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:34:13,059 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:34:13,059 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:34:13,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:34:13,075 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:34:13,244 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:34:13,245 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:34:13,245 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:34:13,268 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:34:13,268 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:34:13,305 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:34:13,313 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:34:13,320 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:34:13,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 13:34:13,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 13:34:13,380 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:34:13,381 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:34:13,382 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:34:13,382 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-01-24 13:34:13,462 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:34:13,464 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:34:13,469 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 13:34:13,469 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-01-24 13:34:13,472 WARN L1029 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-01-24 13:34:13,491 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-01-24 13:34:13,494 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:34:13,498 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-01-24 13:34:13,502 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:34:13,503 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:34:13,508 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-01-24 13:34:13,509 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 13:34:13,517 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:34:13,522 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:34:13,528 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:34:13,528 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-01-24 13:34:13,976 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:34:13,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-01-24 13:34:13,978 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:34:13,979 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:34:13,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-01-24 13:34:13,980 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:34:13,983 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:34:13,986 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:34:13,986 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-01-24 13:34:14,414 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-01-24 13:34:14,415 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-01-24 13:34:14,415 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:34:14,416 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:34:14,417 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:34:14,417 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-01-24 13:34:14,461 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-24 13:34:14,462 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:34:15,852 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-01-24 13:34:15,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-01-24 13:34:15,854 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:34:15,857 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:34:15,861 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 13:34:15,862 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:47, output treesize:38 [2018-01-24 13:34:20,170 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:34:20,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 78 [2018-01-24 13:34:20,172 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.UnsupportedOperationException: alternation not yet supported at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.applyNonSddEliminations(ElimStorePlain.java:347) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:223) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:270) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:243) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:445) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:421) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:292) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:328) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:237) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:185) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getTraceCheck(BaseTaipanRefinementStrategy.java:213) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:231) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:205) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:68) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:368) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:381) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:316) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:294) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:149) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:113) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:117) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:324) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.runToolchainDefault(DefaultToolchainJob.java:221) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.BasicToolchainJob.run(BasicToolchainJob.java:134) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-01-24 13:34:20,176 INFO L168 Benchmark]: Toolchain (without parser) took 51757.42 ms. Allocated memory was 308.3 MB in the beginning and 702.0 MB in the end (delta: 393.7 MB). Free memory was 267.2 MB in the beginning and 369.1 MB in the end (delta: -101.9 MB). Peak memory consumption was 291.9 MB. Max. memory is 5.3 GB. [2018-01-24 13:34:20,177 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 308.3 MB. Free memory is still 273.2 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 13:34:20,177 INFO L168 Benchmark]: CACSL2BoogieTranslator took 241.51 ms. Allocated memory is still 308.3 MB. Free memory was 267.2 MB in the beginning and 253.1 MB in the end (delta: 14.1 MB). Peak memory consumption was 14.1 MB. Max. memory is 5.3 GB. [2018-01-24 13:34:20,177 INFO L168 Benchmark]: Boogie Preprocessor took 54.85 ms. Allocated memory is still 308.3 MB. Free memory was 253.1 MB in the beginning and 251.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-24 13:34:20,177 INFO L168 Benchmark]: RCFGBuilder took 565.23 ms. Allocated memory is still 308.3 MB. Free memory was 249.1 MB in the beginning and 214.2 MB in the end (delta: 34.9 MB). Peak memory consumption was 34.9 MB. Max. memory is 5.3 GB. [2018-01-24 13:34:20,178 INFO L168 Benchmark]: TraceAbstraction took 50886.64 ms. Allocated memory was 308.3 MB in the beginning and 702.0 MB in the end (delta: 393.7 MB). Free memory was 214.2 MB in the beginning and 369.1 MB in the end (delta: -154.9 MB). Peak memory consumption was 238.9 MB. Max. memory is 5.3 GB. [2018-01-24 13:34:20,180 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 308.3 MB. Free memory is still 273.2 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 241.51 ms. Allocated memory is still 308.3 MB. Free memory was 267.2 MB in the beginning and 253.1 MB in the end (delta: 14.1 MB). Peak memory consumption was 14.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 54.85 ms. Allocated memory is still 308.3 MB. Free memory was 253.1 MB in the beginning and 251.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 565.23 ms. Allocated memory is still 308.3 MB. Free memory was 249.1 MB in the beginning and 214.2 MB in the end (delta: 34.9 MB). Peak memory consumption was 34.9 MB. Max. memory is 5.3 GB. * TraceAbstraction took 50886.64 ms. Allocated memory was 308.3 MB in the beginning and 702.0 MB in the end (delta: 393.7 MB). Free memory was 214.2 MB in the beginning and 369.1 MB in the end (delta: -154.9 MB). Peak memory consumption was 238.9 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: UnsupportedOperationException: alternation not yet supported de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: UnsupportedOperationException: alternation not yet supported: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.applyNonSddEliminations(ElimStorePlain.java:347) RESULT: Ultimate could not prove your program: Toolchain returned no result. Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_13-34-20-190.csv Received shutdown request...