java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 13:28:29,169 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 13:28:29,171 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 13:28:29,184 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 13:28:29,184 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 13:28:29,185 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 13:28:29,186 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 13:28:29,187 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 13:28:29,190 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 13:28:29,190 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 13:28:29,191 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 13:28:29,191 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 13:28:29,192 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 13:28:29,193 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 13:28:29,193 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 13:28:29,196 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 13:28:29,198 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 13:28:29,200 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 13:28:29,201 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 13:28:29,202 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 13:28:29,205 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 13:28:29,205 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 13:28:29,205 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 13:28:29,206 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 13:28:29,207 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 13:28:29,208 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 13:28:29,208 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 13:28:29,209 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 13:28:29,209 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 13:28:29,209 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 13:28:29,210 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 13:28:29,210 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf [2018-01-24 13:28:29,220 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 13:28:29,220 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 13:28:29,221 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 13:28:29,221 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 13:28:29,221 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 13:28:29,222 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 13:28:29,222 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 13:28:29,222 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 13:28:29,223 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 13:28:29,223 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 13:28:29,223 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 13:28:29,223 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 13:28:29,223 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 13:28:29,224 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 13:28:29,224 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 13:28:29,224 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 13:28:29,224 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 13:28:29,224 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 13:28:29,225 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 13:28:29,225 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 13:28:29,225 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 13:28:29,225 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 13:28:29,225 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 13:28:29,225 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 13:28:29,226 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 13:28:29,226 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 13:28:29,226 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 13:28:29,226 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 13:28:29,226 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-01-24 13:28:29,227 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 13:28:29,227 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 13:28:29,227 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 13:28:29,228 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 13:28:29,228 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 13:28:29,261 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 13:28:29,275 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 13:28:29,279 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 13:28:29,280 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 13:28:29,281 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 13:28:29,281 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-01-24 13:28:29,485 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 13:28:29,490 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 13:28:29,491 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 13:28:29,491 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 13:28:29,496 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 13:28:29,497 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 01:28:29" (1/1) ... [2018-01-24 13:28:29,499 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4be9a57f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:28:29, skipping insertion in model container [2018-01-24 13:28:29,499 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 01:28:29" (1/1) ... [2018-01-24 13:28:29,512 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 13:28:29,559 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 13:28:29,688 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 13:28:29,715 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 13:28:29,729 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:28:29 WrapperNode [2018-01-24 13:28:29,729 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 13:28:29,730 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 13:28:29,730 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 13:28:29,730 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 13:28:29,740 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:28:29" (1/1) ... [2018-01-24 13:28:29,740 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:28:29" (1/1) ... [2018-01-24 13:28:29,751 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:28:29" (1/1) ... [2018-01-24 13:28:29,752 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:28:29" (1/1) ... [2018-01-24 13:28:29,763 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:28:29" (1/1) ... [2018-01-24 13:28:29,766 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:28:29" (1/1) ... [2018-01-24 13:28:29,769 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:28:29" (1/1) ... [2018-01-24 13:28:29,773 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 13:28:29,773 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 13:28:29,773 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 13:28:29,773 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 13:28:29,774 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:28:29" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 13:28:29,820 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 13:28:29,820 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 13:28:29,820 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 13:28:29,820 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 13:28:29,820 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-24 13:28:29,820 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-01-24 13:28:29,820 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-24 13:28:29,821 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-24 13:28:29,821 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-24 13:28:29,821 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-01-24 13:28:29,821 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-24 13:28:29,821 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-24 13:28:29,821 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-24 13:28:29,821 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-24 13:28:29,822 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-01-24 13:28:29,822 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-24 13:28:29,822 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-24 13:28:29,822 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-24 13:28:29,822 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_get [2018-01-24 13:28:29,822 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 13:28:29,823 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 13:28:29,823 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 13:28:29,823 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 13:28:29,823 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 13:28:29,823 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 13:28:29,824 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 13:28:29,824 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 13:28:29,824 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 13:28:29,824 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-24 13:28:29,824 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-24 13:28:29,824 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 13:28:29,825 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 13:28:29,825 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 13:28:29,825 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-24 13:28:29,825 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 13:28:29,825 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-24 13:28:29,825 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-01-24 13:28:29,825 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-24 13:28:29,826 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-24 13:28:29,826 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 13:28:29,826 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-24 13:28:29,826 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-01-24 13:28:29,826 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-24 13:28:29,826 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-24 13:28:29,827 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-24 13:28:29,827 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-24 13:28:29,827 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-01-24 13:28:29,827 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-24 13:28:29,827 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-24 13:28:29,827 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-24 13:28:29,827 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_get [2018-01-24 13:28:29,827 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 13:28:29,828 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 13:28:29,828 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 13:28:29,828 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 13:28:30,085 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-24 13:28:30,243 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 13:28:30,243 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 01:28:30 BoogieIcfgContainer [2018-01-24 13:28:30,243 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 13:28:30,245 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 13:28:30,245 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 13:28:30,247 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 13:28:30,248 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 01:28:29" (1/3) ... [2018-01-24 13:28:30,249 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3c1ccb85 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 01:28:30, skipping insertion in model container [2018-01-24 13:28:30,249 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:28:29" (2/3) ... [2018-01-24 13:28:30,249 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3c1ccb85 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 01:28:30, skipping insertion in model container [2018-01-24 13:28:30,249 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 01:28:30" (3/3) ... [2018-01-24 13:28:30,251 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-01-24 13:28:30,257 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 13:28:30,264 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-01-24 13:28:30,304 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 13:28:30,304 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 13:28:30,304 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 13:28:30,305 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 13:28:30,305 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 13:28:30,305 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 13:28:30,305 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 13:28:30,305 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 13:28:30,306 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 13:28:30,325 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states. [2018-01-24 13:28:30,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 13:28:30,331 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:30,332 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:30,332 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:30,336 INFO L82 PathProgramCache]: Analyzing trace with hash -367619766, now seen corresponding path program 1 times [2018-01-24 13:28:30,338 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:30,383 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:30,384 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:30,384 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:30,384 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:30,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:30,437 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:30,672 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:30,675 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:28:30,675 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 13:28:30,675 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:30,678 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:28:30,689 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:28:30,690 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:28:30,692 INFO L87 Difference]: Start difference. First operand 146 states. Second operand 5 states. [2018-01-24 13:28:30,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:30,760 INFO L93 Difference]: Finished difference Result 280 states and 295 transitions. [2018-01-24 13:28:30,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:28:30,761 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 13:28:30,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:30,774 INFO L225 Difference]: With dead ends: 280 [2018-01-24 13:28:30,774 INFO L226 Difference]: Without dead ends: 149 [2018-01-24 13:28:30,777 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:28:30,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-01-24 13:28:30,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 147. [2018-01-24 13:28:30,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-01-24 13:28:30,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 155 transitions. [2018-01-24 13:28:30,815 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 155 transitions. Word has length 17 [2018-01-24 13:28:30,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:30,815 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 155 transitions. [2018-01-24 13:28:30,815 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:28:30,816 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 155 transitions. [2018-01-24 13:28:30,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 13:28:30,816 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:30,816 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:30,816 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:30,817 INFO L82 PathProgramCache]: Analyzing trace with hash -1040907540, now seen corresponding path program 1 times [2018-01-24 13:28:30,817 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:30,819 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:30,819 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:30,819 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:30,819 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:30,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:30,842 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:30,898 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:30,898 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:28:30,899 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 13:28:30,899 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:30,900 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:28:30,901 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:28:30,901 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:28:30,901 INFO L87 Difference]: Start difference. First operand 147 states and 155 transitions. Second operand 6 states. [2018-01-24 13:28:31,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:31,088 INFO L93 Difference]: Finished difference Result 149 states and 157 transitions. [2018-01-24 13:28:31,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:28:31,124 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-24 13:28:31,124 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:31,126 INFO L225 Difference]: With dead ends: 149 [2018-01-24 13:28:31,126 INFO L226 Difference]: Without dead ends: 148 [2018-01-24 13:28:31,126 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:28:31,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-01-24 13:28:31,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 146. [2018-01-24 13:28:31,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-01-24 13:28:31,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 154 transitions. [2018-01-24 13:28:31,137 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 154 transitions. Word has length 19 [2018-01-24 13:28:31,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:31,138 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 154 transitions. [2018-01-24 13:28:31,138 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:28:31,138 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 154 transitions. [2018-01-24 13:28:31,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 13:28:31,138 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:31,139 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:31,139 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:31,139 INFO L82 PathProgramCache]: Analyzing trace with hash -1040907539, now seen corresponding path program 1 times [2018-01-24 13:28:31,139 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:31,140 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:31,140 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:31,140 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:31,140 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:31,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:31,162 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:31,406 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:31,406 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:28:31,406 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:28:31,406 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:31,407 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:28:31,407 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:28:31,407 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:28:31,407 INFO L87 Difference]: Start difference. First operand 146 states and 154 transitions. Second operand 7 states. [2018-01-24 13:28:31,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:31,622 INFO L93 Difference]: Finished difference Result 148 states and 156 transitions. [2018-01-24 13:28:31,622 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:28:31,622 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-24 13:28:31,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:31,624 INFO L225 Difference]: With dead ends: 148 [2018-01-24 13:28:31,624 INFO L226 Difference]: Without dead ends: 147 [2018-01-24 13:28:31,625 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:28:31,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-01-24 13:28:31,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 145. [2018-01-24 13:28:31,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-01-24 13:28:31,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 153 transitions. [2018-01-24 13:28:31,640 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 153 transitions. Word has length 19 [2018-01-24 13:28:31,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:31,640 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 153 transitions. [2018-01-24 13:28:31,640 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:28:31,640 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 153 transitions. [2018-01-24 13:28:31,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 13:28:31,641 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:31,642 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:31,642 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:31,642 INFO L82 PathProgramCache]: Analyzing trace with hash -1287954832, now seen corresponding path program 1 times [2018-01-24 13:28:31,642 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:31,643 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:31,644 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:31,644 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:31,644 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:31,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:31,662 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:31,761 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:31,761 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:28:31,761 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:28:31,761 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:31,762 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 13:28:31,762 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 13:28:31,762 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:28:31,762 INFO L87 Difference]: Start difference. First operand 145 states and 153 transitions. Second operand 9 states. [2018-01-24 13:28:31,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:31,920 INFO L93 Difference]: Finished difference Result 245 states and 257 transitions. [2018-01-24 13:28:31,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:28:31,920 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-01-24 13:28:31,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:31,924 INFO L225 Difference]: With dead ends: 245 [2018-01-24 13:28:31,924 INFO L226 Difference]: Without dead ends: 165 [2018-01-24 13:28:31,925 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:28:31,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-01-24 13:28:31,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 159. [2018-01-24 13:28:31,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-01-24 13:28:31,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 167 transitions. [2018-01-24 13:28:31,945 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 167 transitions. Word has length 29 [2018-01-24 13:28:31,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:31,946 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 167 transitions. [2018-01-24 13:28:31,946 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 13:28:31,946 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 167 transitions. [2018-01-24 13:28:31,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 13:28:31,947 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:31,947 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:31,948 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:31,948 INFO L82 PathProgramCache]: Analyzing trace with hash 1025625474, now seen corresponding path program 1 times [2018-01-24 13:28:31,948 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:31,949 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:31,949 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:31,949 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:31,949 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:31,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:31,968 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:32,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:32,050 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:28:32,050 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:28:32,051 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:32,051 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:28:32,051 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:28:32,052 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:28:32,052 INFO L87 Difference]: Start difference. First operand 159 states and 167 transitions. Second operand 10 states. [2018-01-24 13:28:32,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:32,270 INFO L93 Difference]: Finished difference Result 159 states and 167 transitions. [2018-01-24 13:28:32,271 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:28:32,271 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-01-24 13:28:32,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:32,273 INFO L225 Difference]: With dead ends: 159 [2018-01-24 13:28:32,273 INFO L226 Difference]: Without dead ends: 158 [2018-01-24 13:28:32,274 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:28:32,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-01-24 13:28:32,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 158. [2018-01-24 13:28:32,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-01-24 13:28:32,285 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 166 transitions. [2018-01-24 13:28:32,285 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 166 transitions. Word has length 34 [2018-01-24 13:28:32,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:32,286 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 166 transitions. [2018-01-24 13:28:32,286 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:28:32,286 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 166 transitions. [2018-01-24 13:28:32,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 13:28:32,287 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:32,287 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:32,287 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:32,288 INFO L82 PathProgramCache]: Analyzing trace with hash 1025625475, now seen corresponding path program 1 times [2018-01-24 13:28:32,288 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:32,289 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:32,289 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:32,289 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:32,290 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:32,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:32,305 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:32,338 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:32,338 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:28:32,338 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:28:32,338 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:32,339 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:28:32,339 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:28:32,339 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:28:32,339 INFO L87 Difference]: Start difference. First operand 158 states and 166 transitions. Second operand 4 states. [2018-01-24 13:28:32,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:32,359 INFO L93 Difference]: Finished difference Result 277 states and 291 transitions. [2018-01-24 13:28:32,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:28:32,359 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-01-24 13:28:32,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:32,361 INFO L225 Difference]: With dead ends: 277 [2018-01-24 13:28:32,361 INFO L226 Difference]: Without dead ends: 159 [2018-01-24 13:28:32,363 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:28:32,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-01-24 13:28:32,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-01-24 13:28:32,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-01-24 13:28:32,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 167 transitions. [2018-01-24 13:28:32,374 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 167 transitions. Word has length 34 [2018-01-24 13:28:32,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:32,374 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 167 transitions. [2018-01-24 13:28:32,374 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:28:32,374 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 167 transitions. [2018-01-24 13:28:32,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 13:28:32,376 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:32,376 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:32,376 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:32,376 INFO L82 PathProgramCache]: Analyzing trace with hash -553427227, now seen corresponding path program 1 times [2018-01-24 13:28:32,376 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:32,378 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:32,378 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:32,378 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:32,378 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:32,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:32,394 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:32,447 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:32,448 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:32,448 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:28:32,456 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:32,456 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:28:32,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:32,506 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:32,546 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:32,546 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:32,613 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:32,634 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:32,635 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:28:32,643 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:32,643 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:28:32,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:32,695 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:32,701 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:32,702 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:32,736 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:32,737 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:28:32,738 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-24 13:28:32,738 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:28:32,738 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:28:32,738 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:28:32,739 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:28:32,739 INFO L87 Difference]: Start difference. First operand 159 states and 167 transitions. Second operand 6 states. [2018-01-24 13:28:32,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:32,805 INFO L93 Difference]: Finished difference Result 278 states and 292 transitions. [2018-01-24 13:28:32,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:28:32,806 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-24 13:28:32,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:32,807 INFO L225 Difference]: With dead ends: 278 [2018-01-24 13:28:32,807 INFO L226 Difference]: Without dead ends: 160 [2018-01-24 13:28:32,809 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:28:32,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-01-24 13:28:32,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 160. [2018-01-24 13:28:32,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-01-24 13:28:32,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 168 transitions. [2018-01-24 13:28:32,821 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 168 transitions. Word has length 35 [2018-01-24 13:28:32,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:32,821 INFO L432 AbstractCegarLoop]: Abstraction has 160 states and 168 transitions. [2018-01-24 13:28:32,821 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:28:32,822 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 168 transitions. [2018-01-24 13:28:32,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 13:28:32,823 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:32,823 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:32,823 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:32,823 INFO L82 PathProgramCache]: Analyzing trace with hash 2035546563, now seen corresponding path program 2 times [2018-01-24 13:28:32,824 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:32,825 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:32,825 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:32,825 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:32,825 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:32,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:32,843 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:32,921 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:32,921 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:32,921 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:28:32,936 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:28:32,936 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:28:32,962 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:28:32,966 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:28:32,971 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:33,003 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:28:33,005 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:28:33,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:28:33,024 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:28:33,036 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:28:33,037 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:28:33,682 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 13:28:33,683 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:34,128 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 13:28:34,148 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:28:34,148 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14, 13] imperfect sequences [6] total 31 [2018-01-24 13:28:34,148 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:34,149 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 13:28:34,149 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 13:28:34,149 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=840, Unknown=0, NotChecked=0, Total=930 [2018-01-24 13:28:34,149 INFO L87 Difference]: Start difference. First operand 160 states and 168 transitions. Second operand 15 states. [2018-01-24 13:28:37,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:37,249 INFO L93 Difference]: Finished difference Result 228 states and 239 transitions. [2018-01-24 13:28:37,249 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 13:28:37,249 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 36 [2018-01-24 13:28:37,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:37,251 INFO L225 Difference]: With dead ends: 228 [2018-01-24 13:28:37,251 INFO L226 Difference]: Without dead ends: 227 [2018-01-24 13:28:37,252 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 251 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=118, Invalid=1072, Unknown=0, NotChecked=0, Total=1190 [2018-01-24 13:28:37,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2018-01-24 13:28:37,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 159. [2018-01-24 13:28:37,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-01-24 13:28:37,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 167 transitions. [2018-01-24 13:28:37,269 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 167 transitions. Word has length 36 [2018-01-24 13:28:37,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:37,269 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 167 transitions. [2018-01-24 13:28:37,269 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 13:28:37,270 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 167 transitions. [2018-01-24 13:28:37,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 13:28:37,271 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:37,271 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:37,271 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:37,272 INFO L82 PathProgramCache]: Analyzing trace with hash -2073429328, now seen corresponding path program 1 times [2018-01-24 13:28:37,272 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:37,273 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:37,273 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:28:37,273 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:37,273 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:37,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:37,287 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:37,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:37,381 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:28:37,381 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 13:28:37,381 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:37,382 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:28:37,382 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:28:37,382 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:28:37,382 INFO L87 Difference]: Start difference. First operand 159 states and 167 transitions. Second operand 7 states. [2018-01-24 13:28:37,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:37,431 INFO L93 Difference]: Finished difference Result 222 states and 232 transitions. [2018-01-24 13:28:37,431 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:28:37,432 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 40 [2018-01-24 13:28:37,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:37,433 INFO L225 Difference]: With dead ends: 222 [2018-01-24 13:28:37,433 INFO L226 Difference]: Without dead ends: 168 [2018-01-24 13:28:37,434 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:28:37,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-01-24 13:28:37,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 164. [2018-01-24 13:28:37,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-01-24 13:28:37,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 172 transitions. [2018-01-24 13:28:37,449 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 172 transitions. Word has length 40 [2018-01-24 13:28:37,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:37,450 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 172 transitions. [2018-01-24 13:28:37,450 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:28:37,450 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 172 transitions. [2018-01-24 13:28:37,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-24 13:28:37,451 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:37,451 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:37,451 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:37,452 INFO L82 PathProgramCache]: Analyzing trace with hash 2040053740, now seen corresponding path program 1 times [2018-01-24 13:28:37,452 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:37,453 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:37,453 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:37,453 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:37,453 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:37,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:37,461 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:37,497 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:37,498 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:28:37,498 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 13:28:37,498 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:37,498 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 13:28:37,498 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 13:28:37,499 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:28:37,499 INFO L87 Difference]: Start difference. First operand 164 states and 172 transitions. Second operand 3 states. [2018-01-24 13:28:37,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:37,769 INFO L93 Difference]: Finished difference Result 181 states and 190 transitions. [2018-01-24 13:28:37,769 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 13:28:37,769 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 38 [2018-01-24 13:28:37,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:37,771 INFO L225 Difference]: With dead ends: 181 [2018-01-24 13:28:37,771 INFO L226 Difference]: Without dead ends: 168 [2018-01-24 13:28:37,771 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:28:37,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-01-24 13:28:37,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 160. [2018-01-24 13:28:37,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-01-24 13:28:37,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 167 transitions. [2018-01-24 13:28:37,786 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 167 transitions. Word has length 38 [2018-01-24 13:28:37,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:37,786 INFO L432 AbstractCegarLoop]: Abstraction has 160 states and 167 transitions. [2018-01-24 13:28:37,786 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 13:28:37,786 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 167 transitions. [2018-01-24 13:28:37,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 13:28:37,787 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:37,787 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:37,787 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:37,787 INFO L82 PathProgramCache]: Analyzing trace with hash -1765321240, now seen corresponding path program 1 times [2018-01-24 13:28:37,787 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:37,789 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:37,789 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:37,789 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:37,789 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:37,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:37,801 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:37,926 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 13:28:37,926 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:28:37,926 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:28:37,926 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:37,927 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:28:37,927 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:28:37,927 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:28:37,927 INFO L87 Difference]: Start difference. First operand 160 states and 167 transitions. Second operand 10 states. [2018-01-24 13:28:38,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:38,193 INFO L93 Difference]: Finished difference Result 160 states and 167 transitions. [2018-01-24 13:28:38,193 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:28:38,193 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 41 [2018-01-24 13:28:38,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:38,195 INFO L225 Difference]: With dead ends: 160 [2018-01-24 13:28:38,195 INFO L226 Difference]: Without dead ends: 158 [2018-01-24 13:28:38,195 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:28:38,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-01-24 13:28:38,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 158. [2018-01-24 13:28:38,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-01-24 13:28:38,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 165 transitions. [2018-01-24 13:28:38,212 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 165 transitions. Word has length 41 [2018-01-24 13:28:38,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:38,212 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 165 transitions. [2018-01-24 13:28:38,212 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:28:38,212 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 165 transitions. [2018-01-24 13:28:38,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 13:28:38,213 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:38,213 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:38,214 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:38,214 INFO L82 PathProgramCache]: Analyzing trace with hash -1765321239, now seen corresponding path program 1 times [2018-01-24 13:28:38,214 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:38,215 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:38,215 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:38,215 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:38,215 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:38,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:38,232 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:38,277 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:38,278 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:38,278 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:28:38,286 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:38,286 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:28:38,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:38,310 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:38,322 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:38,322 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:38,428 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:38,449 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:38,449 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:28:38,453 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:38,453 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:28:38,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:38,498 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:38,503 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:38,503 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:38,531 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:38,533 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:28:38,533 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-24 13:28:38,533 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:28:38,533 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:28:38,533 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:28:38,533 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:28:38,534 INFO L87 Difference]: Start difference. First operand 158 states and 165 transitions. Second operand 7 states. [2018-01-24 13:28:38,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:38,560 INFO L93 Difference]: Finished difference Result 274 states and 287 transitions. [2018-01-24 13:28:38,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:28:38,560 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 41 [2018-01-24 13:28:38,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:38,561 INFO L225 Difference]: With dead ends: 274 [2018-01-24 13:28:38,561 INFO L226 Difference]: Without dead ends: 159 [2018-01-24 13:28:38,562 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-24 13:28:38,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-01-24 13:28:38,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-01-24 13:28:38,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-01-24 13:28:38,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 166 transitions. [2018-01-24 13:28:38,573 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 166 transitions. Word has length 41 [2018-01-24 13:28:38,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:38,573 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 166 transitions. [2018-01-24 13:28:38,573 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:28:38,573 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 166 transitions. [2018-01-24 13:28:38,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 13:28:38,574 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:38,574 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:38,574 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:38,575 INFO L82 PathProgramCache]: Analyzing trace with hash 8062858, now seen corresponding path program 1 times [2018-01-24 13:28:38,575 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:38,576 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:38,576 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:38,576 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:38,576 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:38,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:38,581 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:38,615 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:38,615 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:28:38,615 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:28:38,615 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:38,616 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:28:38,616 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:28:38,616 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:28:38,616 INFO L87 Difference]: Start difference. First operand 159 states and 166 transitions. Second operand 6 states. [2018-01-24 13:28:38,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:38,648 INFO L93 Difference]: Finished difference Result 163 states and 169 transitions. [2018-01-24 13:28:38,648 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:28:38,648 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2018-01-24 13:28:38,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:38,650 INFO L225 Difference]: With dead ends: 163 [2018-01-24 13:28:38,650 INFO L226 Difference]: Without dead ends: 140 [2018-01-24 13:28:38,650 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:28:38,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-01-24 13:28:38,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-01-24 13:28:38,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-01-24 13:28:38,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 146 transitions. [2018-01-24 13:28:38,660 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 146 transitions. Word has length 40 [2018-01-24 13:28:38,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:38,660 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 146 transitions. [2018-01-24 13:28:38,660 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:28:38,660 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 146 transitions. [2018-01-24 13:28:38,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 13:28:38,661 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:38,661 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:38,661 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:38,661 INFO L82 PathProgramCache]: Analyzing trace with hash -1805397433, now seen corresponding path program 2 times [2018-01-24 13:28:38,661 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:38,662 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:38,662 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:38,662 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:38,662 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:38,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:38,679 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:38,726 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:38,726 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:38,726 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:28:38,733 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:28:38,734 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:28:38,753 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:28:38,756 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:28:38,759 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:38,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:28:38,764 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:28:38,787 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:28:38,788 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:28:38,798 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:28:38,798 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:28:40,989 WARN L143 SmtUtils]: Spent 2040ms on a formula simplification that was a NOOP. DAG size: 27 [2018-01-24 13:28:41,379 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:28:41,379 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:44,038 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:28:44,057 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:28:44,057 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15, 13] imperfect sequences [7] total 33 [2018-01-24 13:28:44,057 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:44,058 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 13:28:44,058 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 13:28:44,058 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=950, Unknown=1, NotChecked=0, Total=1056 [2018-01-24 13:28:44,059 INFO L87 Difference]: Start difference. First operand 140 states and 146 transitions. Second operand 16 states. [2018-01-24 13:28:48,164 WARN L143 SmtUtils]: Spent 4041ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-24 13:28:48,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:48,859 INFO L93 Difference]: Finished difference Result 140 states and 146 transitions. [2018-01-24 13:28:48,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 13:28:48,859 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 42 [2018-01-24 13:28:48,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:48,860 INFO L225 Difference]: With dead ends: 140 [2018-01-24 13:28:48,860 INFO L226 Difference]: Without dead ends: 138 [2018-01-24 13:28:48,861 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 57 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 311 ImplicationChecksByTransitivity, 9.3s TimeCoverageRelationStatistics Valid=136, Invalid=1195, Unknown=1, NotChecked=0, Total=1332 [2018-01-24 13:28:48,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-01-24 13:28:48,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-01-24 13:28:48,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-01-24 13:28:48,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 144 transitions. [2018-01-24 13:28:48,877 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 144 transitions. Word has length 42 [2018-01-24 13:28:48,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:48,877 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 144 transitions. [2018-01-24 13:28:48,877 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 13:28:48,877 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 144 transitions. [2018-01-24 13:28:48,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 13:28:48,878 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:48,878 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:48,878 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:48,878 INFO L82 PathProgramCache]: Analyzing trace with hash -578251942, now seen corresponding path program 1 times [2018-01-24 13:28:48,878 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:48,879 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:48,879 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:28:48,880 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:48,880 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:48,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:48,892 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:48,941 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:28:48,941 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:28:48,941 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 13:28:48,941 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:48,942 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 13:28:48,942 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 13:28:48,942 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:28:48,942 INFO L87 Difference]: Start difference. First operand 138 states and 144 transitions. Second operand 8 states. [2018-01-24 13:28:48,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:48,986 INFO L93 Difference]: Finished difference Result 229 states and 238 transitions. [2018-01-24 13:28:48,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:28:48,986 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 47 [2018-01-24 13:28:48,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:48,988 INFO L225 Difference]: With dead ends: 229 [2018-01-24 13:28:48,988 INFO L226 Difference]: Without dead ends: 138 [2018-01-24 13:28:48,988 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:28:48,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-01-24 13:28:48,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-01-24 13:28:48,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-01-24 13:28:49,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 143 transitions. [2018-01-24 13:28:49,000 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 143 transitions. Word has length 47 [2018-01-24 13:28:49,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:49,001 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 143 transitions. [2018-01-24 13:28:49,001 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 13:28:49,001 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 143 transitions. [2018-01-24 13:28:49,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-24 13:28:49,001 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:49,001 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:49,002 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:49,002 INFO L82 PathProgramCache]: Analyzing trace with hash -792817057, now seen corresponding path program 1 times [2018-01-24 13:28:49,002 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:49,003 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:49,003 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:49,003 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:49,003 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:49,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:49,011 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:49,085 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:28:49,085 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:28:49,085 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-24 13:28:49,085 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:49,085 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:28:49,085 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:28:49,085 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:28:49,086 INFO L87 Difference]: Start difference. First operand 138 states and 143 transitions. Second operand 10 states. [2018-01-24 13:28:49,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:49,149 INFO L93 Difference]: Finished difference Result 231 states and 239 transitions. [2018-01-24 13:28:49,152 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:28:49,152 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 52 [2018-01-24 13:28:49,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:49,153 INFO L225 Difference]: With dead ends: 231 [2018-01-24 13:28:49,153 INFO L226 Difference]: Without dead ends: 138 [2018-01-24 13:28:49,153 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:28:49,153 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-01-24 13:28:49,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-01-24 13:28:49,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-01-24 13:28:49,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 142 transitions. [2018-01-24 13:28:49,164 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 142 transitions. Word has length 52 [2018-01-24 13:28:49,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:49,164 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 142 transitions. [2018-01-24 13:28:49,164 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:28:49,164 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 142 transitions. [2018-01-24 13:28:49,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-24 13:28:49,165 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:49,165 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:49,165 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:49,165 INFO L82 PathProgramCache]: Analyzing trace with hash 1949575069, now seen corresponding path program 1 times [2018-01-24 13:28:49,165 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:49,166 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:49,166 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:49,166 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:49,167 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:49,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:49,181 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:49,365 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:28:49,365 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:28:49,365 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-01-24 13:28:49,365 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:49,365 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 13:28:49,365 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 13:28:49,365 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-01-24 13:28:49,366 INFO L87 Difference]: Start difference. First operand 138 states and 142 transitions. Second operand 15 states. [2018-01-24 13:28:49,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:49,704 INFO L93 Difference]: Finished difference Result 138 states and 142 transitions. [2018-01-24 13:28:49,705 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 13:28:49,705 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 63 [2018-01-24 13:28:49,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:49,706 INFO L225 Difference]: With dead ends: 138 [2018-01-24 13:28:49,706 INFO L226 Difference]: Without dead ends: 136 [2018-01-24 13:28:49,706 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=333, Unknown=0, NotChecked=0, Total=380 [2018-01-24 13:28:49,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-01-24 13:28:49,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-01-24 13:28:49,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-24 13:28:49,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 140 transitions. [2018-01-24 13:28:49,719 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 140 transitions. Word has length 63 [2018-01-24 13:28:49,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:49,719 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 140 transitions. [2018-01-24 13:28:49,719 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 13:28:49,719 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 140 transitions. [2018-01-24 13:28:49,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-24 13:28:49,720 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:49,720 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:49,720 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:49,720 INFO L82 PathProgramCache]: Analyzing trace with hash 1949575070, now seen corresponding path program 1 times [2018-01-24 13:28:49,720 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:49,721 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:49,721 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:49,721 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:49,721 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:49,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:49,737 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:49,799 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:49,799 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:49,799 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:28:49,806 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:49,806 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:28:49,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:49,838 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:49,848 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:49,848 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:49,930 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:49,950 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:49,950 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:28:49,953 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:49,953 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:28:50,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:50,019 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:50,024 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:50,024 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:50,073 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:50,075 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:28:50,075 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-24 13:28:50,075 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:28:50,075 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 13:28:50,075 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 13:28:50,076 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:28:50,076 INFO L87 Difference]: Start difference. First operand 136 states and 140 transitions. Second operand 8 states. [2018-01-24 13:28:50,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:50,114 INFO L93 Difference]: Finished difference Result 248 states and 256 transitions. [2018-01-24 13:28:50,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:28:50,115 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 63 [2018-01-24 13:28:50,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:50,116 INFO L225 Difference]: With dead ends: 248 [2018-01-24 13:28:50,116 INFO L226 Difference]: Without dead ends: 137 [2018-01-24 13:28:50,117 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 258 GetRequests, 244 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-24 13:28:50,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-01-24 13:28:50,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-01-24 13:28:50,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-01-24 13:28:50,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 141 transitions. [2018-01-24 13:28:50,134 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 141 transitions. Word has length 63 [2018-01-24 13:28:50,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:50,134 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 141 transitions. [2018-01-24 13:28:50,135 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 13:28:50,135 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 141 transitions. [2018-01-24 13:28:50,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-01-24 13:28:50,135 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:50,136 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:50,136 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:50,136 INFO L82 PathProgramCache]: Analyzing trace with hash 1497491836, now seen corresponding path program 2 times [2018-01-24 13:28:50,136 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:50,137 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:50,137 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:50,137 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:50,138 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:50,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:50,157 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:50,259 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:50,259 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:50,259 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:28:50,271 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:28:50,271 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:28:50,308 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:28:50,314 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:28:50,319 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:50,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:28:50,327 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:28:50,340 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:28:50,340 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:28:50,355 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:28:50,355 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:28:51,072 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:28:51,073 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:54,863 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:28:54,884 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:28:54,884 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20, 18] imperfect sequences [8] total 44 [2018-01-24 13:28:54,884 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:54,884 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-24 13:28:54,885 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-24 13:28:54,885 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=146, Invalid=1745, Unknown=1, NotChecked=0, Total=1892 [2018-01-24 13:28:54,885 INFO L87 Difference]: Start difference. First operand 137 states and 141 transitions. Second operand 21 states. [2018-01-24 13:28:55,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:55,937 INFO L93 Difference]: Finished difference Result 137 states and 141 transitions. [2018-01-24 13:28:55,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-24 13:28:55,937 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 64 [2018-01-24 13:28:55,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:55,938 INFO L225 Difference]: With dead ends: 137 [2018-01-24 13:28:55,938 INFO L226 Difference]: Without dead ends: 135 [2018-01-24 13:28:55,938 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 91 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 628 ImplicationChecksByTransitivity, 4.6s TimeCoverageRelationStatistics Valid=195, Invalid=2254, Unknown=1, NotChecked=0, Total=2450 [2018-01-24 13:28:55,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-24 13:28:55,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-01-24 13:28:55,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-24 13:28:55,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 139 transitions. [2018-01-24 13:28:55,950 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 139 transitions. Word has length 64 [2018-01-24 13:28:55,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:55,950 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 139 transitions. [2018-01-24 13:28:55,950 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-24 13:28:55,951 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 139 transitions. [2018-01-24 13:28:55,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-01-24 13:28:55,951 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:55,952 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:55,952 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:55,952 INFO L82 PathProgramCache]: Analyzing trace with hash -938431803, now seen corresponding path program 1 times [2018-01-24 13:28:55,952 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:55,953 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:55,953 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:28:55,953 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:55,953 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:55,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:55,966 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:56,222 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:28:56,222 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:28:56,222 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-01-24 13:28:56,222 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:56,222 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 13:28:56,222 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 13:28:56,223 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:28:56,223 INFO L87 Difference]: Start difference. First operand 135 states and 139 transitions. Second operand 13 states. [2018-01-24 13:28:56,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:56,313 INFO L93 Difference]: Finished difference Result 198 states and 204 transitions. [2018-01-24 13:28:56,314 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 13:28:56,314 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 75 [2018-01-24 13:28:56,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:56,314 INFO L225 Difference]: With dead ends: 198 [2018-01-24 13:28:56,315 INFO L226 Difference]: Without dead ends: 135 [2018-01-24 13:28:56,315 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:28:56,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-24 13:28:56,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-01-24 13:28:56,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-24 13:28:56,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 138 transitions. [2018-01-24 13:28:56,326 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 138 transitions. Word has length 75 [2018-01-24 13:28:56,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:56,327 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 138 transitions. [2018-01-24 13:28:56,327 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 13:28:56,327 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 138 transitions. [2018-01-24 13:28:56,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-24 13:28:56,328 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:56,328 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:56,328 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:56,328 INFO L82 PathProgramCache]: Analyzing trace with hash 1956264887, now seen corresponding path program 1 times [2018-01-24 13:28:56,328 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:56,329 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:56,329 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:56,329 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:56,329 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:56,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:56,345 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:56,603 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:28:56,603 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:28:56,603 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-01-24 13:28:56,603 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:28:56,604 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 13:28:56,604 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 13:28:56,604 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=341, Unknown=0, NotChecked=0, Total=380 [2018-01-24 13:28:56,604 INFO L87 Difference]: Start difference. First operand 135 states and 138 transitions. Second operand 20 states. [2018-01-24 13:28:56,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:56,929 INFO L93 Difference]: Finished difference Result 144 states and 147 transitions. [2018-01-24 13:28:56,929 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-24 13:28:56,929 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 88 [2018-01-24 13:28:56,930 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:56,930 INFO L225 Difference]: With dead ends: 144 [2018-01-24 13:28:56,930 INFO L226 Difference]: Without dead ends: 142 [2018-01-24 13:28:56,931 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=67, Invalid=635, Unknown=0, NotChecked=0, Total=702 [2018-01-24 13:28:56,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-01-24 13:28:56,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 133. [2018-01-24 13:28:56,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-01-24 13:28:56,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 136 transitions. [2018-01-24 13:28:56,942 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 136 transitions. Word has length 88 [2018-01-24 13:28:56,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:56,942 INFO L432 AbstractCegarLoop]: Abstraction has 133 states and 136 transitions. [2018-01-24 13:28:56,942 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 13:28:56,943 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 136 transitions. [2018-01-24 13:28:56,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-24 13:28:56,943 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:56,943 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:56,943 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:56,943 INFO L82 PathProgramCache]: Analyzing trace with hash 1956264888, now seen corresponding path program 1 times [2018-01-24 13:28:56,943 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:56,944 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:56,944 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:56,944 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:56,944 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:56,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:56,960 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:57,094 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:57,094 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:57,094 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:28:57,100 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:57,100 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:28:57,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:57,142 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:57,152 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:57,152 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:57,260 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:57,281 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:57,281 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:28:57,284 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:57,284 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:28:57,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:57,381 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:57,389 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:57,389 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:28:57,658 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:57,659 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:28:57,659 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-24 13:28:57,660 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:28:57,660 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 13:28:57,660 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 13:28:57,661 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-24 13:28:57,661 INFO L87 Difference]: Start difference. First operand 133 states and 136 transitions. Second operand 9 states. [2018-01-24 13:28:57,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:28:57,691 INFO L93 Difference]: Finished difference Result 241 states and 247 transitions. [2018-01-24 13:28:57,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:28:57,694 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 88 [2018-01-24 13:28:57,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:28:57,694 INFO L225 Difference]: With dead ends: 241 [2018-01-24 13:28:57,694 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 13:28:57,695 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 359 GetRequests, 343 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-24 13:28:57,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 13:28:57,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-01-24 13:28:57,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 13:28:57,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 137 transitions. [2018-01-24 13:28:57,706 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 137 transitions. Word has length 88 [2018-01-24 13:28:57,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:28:57,706 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 137 transitions. [2018-01-24 13:28:57,707 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 13:28:57,707 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 137 transitions. [2018-01-24 13:28:57,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-01-24 13:28:57,707 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:28:57,707 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:28:57,707 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:28:57,707 INFO L82 PathProgramCache]: Analyzing trace with hash -632442982, now seen corresponding path program 2 times [2018-01-24 13:28:57,708 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:28:57,708 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:57,708 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:28:57,709 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:28:57,709 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:28:57,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:28:57,724 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:28:57,881 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:28:57,881 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:28:57,881 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:28:57,891 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:28:57,891 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:28:57,930 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:28:57,935 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:28:57,939 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:28:57,947 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:28:57,948 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:28:57,992 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:28:57,992 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:28:58,024 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:28:58,025 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:28:58,978 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 13:28:58,978 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:29:05,716 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 13:29:05,735 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:29:05,736 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20, 18] imperfect sequences [9] total 45 [2018-01-24 13:29:05,736 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:29:05,736 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-24 13:29:05,736 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-24 13:29:05,736 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=1824, Unknown=3, NotChecked=0, Total=1980 [2018-01-24 13:29:05,737 INFO L87 Difference]: Start difference. First operand 134 states and 137 transitions. Second operand 21 states. [2018-01-24 13:29:07,818 WARN L143 SmtUtils]: Spent 2036ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-24 13:29:08,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:29:08,950 INFO L93 Difference]: Finished difference Result 134 states and 137 transitions. [2018-01-24 13:29:08,951 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-24 13:29:08,951 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 89 [2018-01-24 13:29:08,951 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:29:08,951 INFO L225 Difference]: With dead ends: 134 [2018-01-24 13:29:08,952 INFO L226 Difference]: Without dead ends: 132 [2018-01-24 13:29:08,952 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 192 GetRequests, 139 SyntacticMatches, 4 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 680 ImplicationChecksByTransitivity, 9.8s TimeCoverageRelationStatistics Valid=202, Invalid=2345, Unknown=3, NotChecked=0, Total=2550 [2018-01-24 13:29:08,952 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-01-24 13:29:08,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-01-24 13:29:08,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-01-24 13:29:08,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 135 transitions. [2018-01-24 13:29:08,967 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 135 transitions. Word has length 89 [2018-01-24 13:29:08,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:29:08,967 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 135 transitions. [2018-01-24 13:29:08,967 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-24 13:29:08,967 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 135 transitions. [2018-01-24 13:29:08,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-01-24 13:29:08,967 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:29:08,968 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:29:08,968 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:29:08,968 INFO L82 PathProgramCache]: Analyzing trace with hash -1819895019, now seen corresponding path program 1 times [2018-01-24 13:29:08,968 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:29:08,968 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:29:08,969 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:29:08,969 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:29:08,969 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:29:08,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:29:08,982 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:29:09,314 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 13:29:09,314 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:29:09,315 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 13:29:09,315 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:29:09,315 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 13:29:09,315 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 13:29:09,315 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:29:09,315 INFO L87 Difference]: Start difference. First operand 132 states and 135 transitions. Second operand 11 states. [2018-01-24 13:29:09,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:29:09,451 INFO L93 Difference]: Finished difference Result 138 states and 140 transitions. [2018-01-24 13:29:09,452 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 13:29:09,452 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 87 [2018-01-24 13:29:09,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:29:09,453 INFO L225 Difference]: With dead ends: 138 [2018-01-24 13:29:09,453 INFO L226 Difference]: Without dead ends: 132 [2018-01-24 13:29:09,453 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-01-24 13:29:09,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-01-24 13:29:09,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-01-24 13:29:09,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-01-24 13:29:09,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 134 transitions. [2018-01-24 13:29:09,467 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 134 transitions. Word has length 87 [2018-01-24 13:29:09,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:29:09,467 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 134 transitions. [2018-01-24 13:29:09,467 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 13:29:09,467 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 134 transitions. [2018-01-24 13:29:09,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-01-24 13:29:09,468 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:29:09,468 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:29:09,468 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:29:09,468 INFO L82 PathProgramCache]: Analyzing trace with hash -1903839439, now seen corresponding path program 1 times [2018-01-24 13:29:09,468 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:29:09,469 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:29:09,469 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:29:09,469 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:29:09,469 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:29:09,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:29:09,486 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:29:09,855 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 13:29:09,855 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:29:09,855 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-01-24 13:29:09,855 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:29:09,856 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-24 13:29:09,856 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-24 13:29:09,856 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=505, Unknown=0, NotChecked=0, Total=552 [2018-01-24 13:29:09,856 INFO L87 Difference]: Start difference. First operand 132 states and 134 transitions. Second operand 24 states. [2018-01-24 13:29:10,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:29:10,315 INFO L93 Difference]: Finished difference Result 137 states and 139 transitions. [2018-01-24 13:29:10,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-24 13:29:10,316 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 103 [2018-01-24 13:29:10,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:29:10,317 INFO L225 Difference]: With dead ends: 137 [2018-01-24 13:29:10,317 INFO L226 Difference]: Without dead ends: 135 [2018-01-24 13:29:10,317 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=83, Invalid=973, Unknown=0, NotChecked=0, Total=1056 [2018-01-24 13:29:10,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-24 13:29:10,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 130. [2018-01-24 13:29:10,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-01-24 13:29:10,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 132 transitions. [2018-01-24 13:29:10,331 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 132 transitions. Word has length 103 [2018-01-24 13:29:10,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:29:10,332 INFO L432 AbstractCegarLoop]: Abstraction has 130 states and 132 transitions. [2018-01-24 13:29:10,332 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-24 13:29:10,332 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 132 transitions. [2018-01-24 13:29:10,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-01-24 13:29:10,333 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:29:10,333 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:29:10,333 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:29:10,333 INFO L82 PathProgramCache]: Analyzing trace with hash -1903839438, now seen corresponding path program 1 times [2018-01-24 13:29:10,333 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:29:10,334 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:29:10,334 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:29:10,334 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:29:10,335 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:29:10,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:29:10,361 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:29:10,481 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:29:10,481 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:29:10,482 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:29:10,488 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:29:10,488 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:29:10,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:29:10,546 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:29:10,576 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:29:10,576 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:29:10,705 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:29:10,725 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:29:10,725 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:29:10,728 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:29:10,729 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:29:10,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:29:10,831 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:29:10,838 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:29:10,838 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:29:10,928 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:29:10,930 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:29:10,930 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-24 13:29:10,930 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:29:10,930 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:29:10,931 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:29:10,931 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:29:10,931 INFO L87 Difference]: Start difference. First operand 130 states and 132 transitions. Second operand 10 states. [2018-01-24 13:29:10,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:29:10,963 INFO L93 Difference]: Finished difference Result 234 states and 238 transitions. [2018-01-24 13:29:10,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 13:29:10,963 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 103 [2018-01-24 13:29:10,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:29:10,963 INFO L225 Difference]: With dead ends: 234 [2018-01-24 13:29:10,964 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 13:29:10,964 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 420 GetRequests, 402 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-24 13:29:10,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 13:29:10,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-01-24 13:29:10,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-01-24 13:29:10,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 133 transitions. [2018-01-24 13:29:10,978 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 133 transitions. Word has length 103 [2018-01-24 13:29:10,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:29:10,978 INFO L432 AbstractCegarLoop]: Abstraction has 131 states and 133 transitions. [2018-01-24 13:29:10,978 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:29:10,978 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 133 transitions. [2018-01-24 13:29:10,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-01-24 13:29:10,979 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:29:10,979 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:29:10,979 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:29:10,979 INFO L82 PathProgramCache]: Analyzing trace with hash 1440989968, now seen corresponding path program 2 times [2018-01-24 13:29:10,979 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:29:10,980 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:29:10,980 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:29:10,980 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:29:10,980 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:29:11,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:29:11,005 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:29:11,111 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:29:11,111 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:29:11,112 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:29:11,123 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:29:11,123 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:29:11,206 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:29:11,216 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:29:11,223 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:29:11,228 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:29:11,228 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:29:11,254 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:29:11,254 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:29:11,278 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:29:11,279 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:29:12,280 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-24 13:29:12,280 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:29:17,228 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-24 13:29:17,249 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:29:17,249 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24, 22] imperfect sequences [10] total 54 [2018-01-24 13:29:17,249 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:29:17,250 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-24 13:29:17,250 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-24 13:29:17,250 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=189, Invalid=2671, Unknown=2, NotChecked=0, Total=2862 [2018-01-24 13:29:17,251 INFO L87 Difference]: Start difference. First operand 131 states and 133 transitions. Second operand 25 states. [2018-01-24 13:29:18,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:29:18,699 INFO L93 Difference]: Finished difference Result 131 states and 133 transitions. [2018-01-24 13:29:18,700 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 13:29:18,700 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 104 [2018-01-24 13:29:18,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:29:18,701 INFO L225 Difference]: With dead ends: 131 [2018-01-24 13:29:18,701 INFO L226 Difference]: Without dead ends: 129 [2018-01-24 13:29:18,703 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 225 GetRequests, 159 SyntacticMatches, 6 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1049 ImplicationChecksByTransitivity, 6.1s TimeCoverageRelationStatistics Valid=254, Invalid=3526, Unknown=2, NotChecked=0, Total=3782 [2018-01-24 13:29:18,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-01-24 13:29:18,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 129. [2018-01-24 13:29:18,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-01-24 13:29:18,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 131 transitions. [2018-01-24 13:29:18,729 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 131 transitions. Word has length 104 [2018-01-24 13:29:18,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:29:18,730 INFO L432 AbstractCegarLoop]: Abstraction has 129 states and 131 transitions. [2018-01-24 13:29:18,730 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-24 13:29:18,730 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 131 transitions. [2018-01-24 13:29:18,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-01-24 13:29:18,731 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:29:18,731 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:29:18,731 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:29:18,731 INFO L82 PathProgramCache]: Analyzing trace with hash 1765921617, now seen corresponding path program 1 times [2018-01-24 13:29:18,731 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:29:18,732 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:29:18,732 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:29:18,733 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:29:18,733 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:29:18,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:29:18,758 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:29:18,940 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:29:18,940 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:29:18,940 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:29:18,955 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:29:18,955 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:29:19,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:29:19,017 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:29:19,092 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:29:19,092 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:29:19,301 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:29:19,323 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:29:19,323 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:29:19,326 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:29:19,326 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:29:19,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:29:19,442 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:29:19,449 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:29:19,449 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:29:19,553 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:29:19,554 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:29:19,555 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-24 13:29:19,555 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:29:19,555 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 13:29:19,555 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 13:29:19,555 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-24 13:29:19,555 INFO L87 Difference]: Start difference. First operand 129 states and 131 transitions. Second operand 11 states. [2018-01-24 13:29:19,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:29:19,597 INFO L93 Difference]: Finished difference Result 231 states and 235 transitions. [2018-01-24 13:29:19,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:29:19,598 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 108 [2018-01-24 13:29:19,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:29:19,599 INFO L225 Difference]: With dead ends: 231 [2018-01-24 13:29:19,599 INFO L226 Difference]: Without dead ends: 130 [2018-01-24 13:29:19,600 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 441 GetRequests, 421 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-24 13:29:19,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-01-24 13:29:19,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 130. [2018-01-24 13:29:19,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-01-24 13:29:19,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 132 transitions. [2018-01-24 13:29:19,628 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 132 transitions. Word has length 108 [2018-01-24 13:29:19,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:29:19,628 INFO L432 AbstractCegarLoop]: Abstraction has 130 states and 132 transitions. [2018-01-24 13:29:19,628 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 13:29:19,628 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 132 transitions. [2018-01-24 13:29:19,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-01-24 13:29:19,629 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:29:19,629 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:29:19,629 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:29:19,630 INFO L82 PathProgramCache]: Analyzing trace with hash -859405773, now seen corresponding path program 2 times [2018-01-24 13:29:19,630 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:29:19,630 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:29:19,631 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:29:19,631 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:29:19,631 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:29:19,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:29:19,655 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:29:19,809 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:29:19,809 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:29:19,809 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:29:19,817 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:29:19,817 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:29:19,881 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:29:19,895 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:29:19,904 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:29:20,073 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 13:29:20,075 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 13:29:20,076 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:29:20,078 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:29:20,079 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:29:20,080 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-01-24 13:29:20,175 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:29:20,177 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:29:20,182 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 13:29:20,182 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-01-24 13:29:20,186 WARN L1029 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-01-24 13:29:20,193 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-01-24 13:29:20,196 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:29:20,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-01-24 13:29:20,214 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:29:20,217 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:29:20,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-01-24 13:29:20,222 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 13:29:20,232 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:29:20,236 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:29:20,241 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:29:20,241 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-01-24 13:29:20,649 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:29:20,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-01-24 13:29:20,653 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:29:20,654 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:29:20,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-01-24 13:29:20,655 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:29:20,658 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:29:20,661 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:29:20,661 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-01-24 13:29:21,071 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-01-24 13:29:21,072 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-01-24 13:29:21,073 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:29:21,074 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:29:21,075 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:29:21,075 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-01-24 13:29:21,123 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-24 13:29:21,124 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:29:22,505 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-01-24 13:29:22,508 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-01-24 13:29:22,508 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:29:22,509 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:29:22,513 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 13:29:22,514 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:47, output treesize:38 Received shutdown request... [2018-01-24 13:29:26,582 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-24 13:29:26,582 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-24 13:29:26,587 WARN L187 ceAbstractionStarter]: Timeout [2018-01-24 13:29:26,588 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.01 01:29:26 BoogieIcfgContainer [2018-01-24 13:29:26,588 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-24 13:29:26,589 INFO L168 Benchmark]: Toolchain (without parser) took 57103.46 ms. Allocated memory was 303.6 MB in the beginning and 720.9 MB in the end (delta: 417.3 MB). Free memory was 262.6 MB in the beginning and 556.4 MB in the end (delta: -293.8 MB). Peak memory consumption was 123.6 MB. Max. memory is 5.3 GB. [2018-01-24 13:29:26,590 INFO L168 Benchmark]: CDTParser took 0.24 ms. Allocated memory is still 303.6 MB. Free memory is still 269.6 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 13:29:26,590 INFO L168 Benchmark]: CACSL2BoogieTranslator took 238.71 ms. Allocated memory is still 303.6 MB. Free memory was 262.6 MB in the beginning and 248.6 MB in the end (delta: 14.1 MB). Peak memory consumption was 14.1 MB. Max. memory is 5.3 GB. [2018-01-24 13:29:26,591 INFO L168 Benchmark]: Boogie Preprocessor took 43.15 ms. Allocated memory is still 303.6 MB. Free memory was 248.6 MB in the beginning and 246.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-24 13:29:26,591 INFO L168 Benchmark]: RCFGBuilder took 470.43 ms. Allocated memory is still 303.6 MB. Free memory was 246.6 MB in the beginning and 210.9 MB in the end (delta: 35.6 MB). Peak memory consumption was 35.6 MB. Max. memory is 5.3 GB. [2018-01-24 13:29:26,591 INFO L168 Benchmark]: TraceAbstraction took 56343.35 ms. Allocated memory was 303.6 MB in the beginning and 720.9 MB in the end (delta: 417.3 MB). Free memory was 210.9 MB in the beginning and 556.4 MB in the end (delta: -345.5 MB). Peak memory consumption was 71.9 MB. Max. memory is 5.3 GB. [2018-01-24 13:29:26,593 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.24 ms. Allocated memory is still 303.6 MB. Free memory is still 269.6 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 238.71 ms. Allocated memory is still 303.6 MB. Free memory was 262.6 MB in the beginning and 248.6 MB in the end (delta: 14.1 MB). Peak memory consumption was 14.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 43.15 ms. Allocated memory is still 303.6 MB. Free memory was 248.6 MB in the beginning and 246.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 470.43 ms. Allocated memory is still 303.6 MB. Free memory was 246.6 MB in the beginning and 210.9 MB in the end (delta: 35.6 MB). Peak memory consumption was 35.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 56343.35 ms. Allocated memory was 303.6 MB in the beginning and 720.9 MB in the end (delta: 417.3 MB). Free memory was 210.9 MB in the beginning and 556.4 MB in the end (delta: -345.5 MB). Peak memory consumption was 71.9 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1452]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1452). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 110 with TraceHistMax 7, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 69 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 22 procedures, 146 locations, 23 error locations. TIMEOUT Result, 56.2s OverallTime, 29 OverallIterations, 7 TraceHistogramMax, 16.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3635 SDtfs, 1092 SDslu, 23636 SDs, 0 SdLazy, 7987 SolverSat, 268 SolverUnsat, 1 SolverUnknown, 0 SolverNotchecked, 7.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2740 GetRequests, 2228 SyntacticMatches, 28 SemanticMatches, 484 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3223 ImplicationChecksByTransitivity, 34.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=164occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 28 MinimizatonAttempts, 106 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 1.0s SatisfiabilityAnalysisTime, 29.8s InterpolantComputationTime, 2810 NumberOfCodeBlocks, 2790 NumberOfCodeBlocksAsserted, 45 NumberOfCheckSat, 3959 ConstructedInterpolants, 270 QuantifiedInterpolants, 1088530 SizeOfPredicates, 93 NumberOfNonLiveVariables, 5712 ConjunctsInSsa, 389 ConjunctsInUnsatCore, 62 InterpolantComputations, 27 PerfectInterpolantSequences, 181/516 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_4_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_13-29-26-600.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_4_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-24_13-29-26-600.csv Completed graceful shutdown