java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf -i ../../../trunk/examples/svcomp/memsafety/960521-1_false-valid-free.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 15:27:08,025 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 15:27:08,026 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 15:27:08,040 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 15:27:08,040 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 15:27:08,041 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 15:27:08,042 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 15:27:08,043 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 15:27:08,044 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 15:27:08,045 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 15:27:08,046 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 15:27:08,046 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 15:27:08,046 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 15:27:08,047 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 15:27:08,048 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 15:27:08,050 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 15:27:08,053 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 15:27:08,055 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 15:27:08,056 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 15:27:08,057 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 15:27:08,059 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 15:27:08,060 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 15:27:08,060 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 15:27:08,061 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 15:27:08,062 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 15:27:08,063 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 15:27:08,063 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 15:27:08,064 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 15:27:08,064 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 15:27:08,064 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 15:27:08,065 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 15:27:08,065 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf [2018-01-24 15:27:08,075 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 15:27:08,075 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 15:27:08,076 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 15:27:08,076 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 15:27:08,076 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 15:27:08,076 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 15:27:08,076 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 15:27:08,077 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 15:27:08,077 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 15:27:08,077 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 15:27:08,078 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 15:27:08,078 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 15:27:08,078 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 15:27:08,078 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 15:27:08,078 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 15:27:08,078 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 15:27:08,079 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 15:27:08,079 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 15:27:08,079 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 15:27:08,079 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 15:27:08,079 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 15:27:08,080 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 15:27:08,080 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 15:27:08,080 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 15:27:08,080 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 15:27:08,080 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 15:27:08,081 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 15:27:08,081 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 15:27:08,081 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-24 15:27:08,081 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 15:27:08,081 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 15:27:08,082 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 15:27:08,082 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-24 15:27:08,083 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 15:27:08,083 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 15:27:08,117 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 15:27:08,129 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 15:27:08,133 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 15:27:08,135 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 15:27:08,135 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 15:27:08,136 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety/960521-1_false-valid-free.i [2018-01-24 15:27:08,305 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 15:27:08,312 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 15:27:08,313 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 15:27:08,313 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 15:27:08,318 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 15:27:08,319 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 03:27:08" (1/1) ... [2018-01-24 15:27:08,321 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@a54d414 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:27:08, skipping insertion in model container [2018-01-24 15:27:08,321 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 03:27:08" (1/1) ... [2018-01-24 15:27:08,336 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 15:27:08,371 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 15:27:08,481 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 15:27:08,497 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 15:27:08,503 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:27:08 WrapperNode [2018-01-24 15:27:08,503 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 15:27:08,503 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 15:27:08,503 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 15:27:08,504 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 15:27:08,516 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:27:08" (1/1) ... [2018-01-24 15:27:08,516 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:27:08" (1/1) ... [2018-01-24 15:27:08,525 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:27:08" (1/1) ... [2018-01-24 15:27:08,525 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:27:08" (1/1) ... [2018-01-24 15:27:08,528 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:27:08" (1/1) ... [2018-01-24 15:27:08,531 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:27:08" (1/1) ... [2018-01-24 15:27:08,532 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:27:08" (1/1) ... [2018-01-24 15:27:08,533 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 15:27:08,533 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 15:27:08,533 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 15:27:08,534 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 15:27:08,534 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:27:08" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 15:27:08,576 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 15:27:08,577 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 15:27:08,577 INFO L136 BoogieDeclarations]: Found implementation of procedure foo [2018-01-24 15:27:08,577 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 15:27:08,577 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 15:27:08,577 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 15:27:08,577 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 15:27:08,577 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 15:27:08,578 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 15:27:08,578 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 15:27:08,578 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 15:27:08,578 INFO L128 BoogieDeclarations]: Found specification of procedure foo [2018-01-24 15:27:08,578 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 15:27:08,578 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 15:27:08,579 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 15:27:08,770 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 15:27:08,770 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 03:27:08 BoogieIcfgContainer [2018-01-24 15:27:08,770 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 15:27:08,771 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 15:27:08,771 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 15:27:08,774 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 15:27:08,774 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 03:27:08" (1/3) ... [2018-01-24 15:27:08,775 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2d6c6991 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 03:27:08, skipping insertion in model container [2018-01-24 15:27:08,775 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:27:08" (2/3) ... [2018-01-24 15:27:08,775 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2d6c6991 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 03:27:08, skipping insertion in model container [2018-01-24 15:27:08,775 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 03:27:08" (3/3) ... [2018-01-24 15:27:08,777 INFO L105 eAbstractionObserver]: Analyzing ICFG 960521-1_false-valid-free.i [2018-01-24 15:27:08,783 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 15:27:08,788 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 17 error locations. [2018-01-24 15:27:08,832 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 15:27:08,833 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 15:27:08,833 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 15:27:08,833 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 15:27:08,833 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 15:27:08,833 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 15:27:08,834 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 15:27:08,834 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 15:27:08,835 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 15:27:08,855 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states. [2018-01-24 15:27:08,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-01-24 15:27:08,861 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:08,862 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:08,862 INFO L371 AbstractCegarLoop]: === Iteration 1 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:08,866 INFO L82 PathProgramCache]: Analyzing trace with hash 1993989713, now seen corresponding path program 1 times [2018-01-24 15:27:08,868 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:08,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:08,908 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:08,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:08,908 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:08,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:08,977 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:09,054 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:09,057 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:27:09,057 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 15:27:09,057 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:27:09,062 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 15:27:09,072 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 15:27:09,073 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 15:27:09,075 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 4 states. [2018-01-24 15:27:09,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:09,305 INFO L93 Difference]: Finished difference Result 84 states and 90 transitions. [2018-01-24 15:27:09,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 15:27:09,307 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2018-01-24 15:27:09,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:09,316 INFO L225 Difference]: With dead ends: 84 [2018-01-24 15:27:09,317 INFO L226 Difference]: Without dead ends: 49 [2018-01-24 15:27:09,320 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 15:27:09,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-24 15:27:09,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-24 15:27:09,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-24 15:27:09,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 51 transitions. [2018-01-24 15:27:09,349 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 51 transitions. Word has length 11 [2018-01-24 15:27:09,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:09,350 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 51 transitions. [2018-01-24 15:27:09,350 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 15:27:09,350 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 51 transitions. [2018-01-24 15:27:09,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-01-24 15:27:09,350 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:09,350 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:09,351 INFO L371 AbstractCegarLoop]: === Iteration 2 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:09,351 INFO L82 PathProgramCache]: Analyzing trace with hash 1993989714, now seen corresponding path program 1 times [2018-01-24 15:27:09,351 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:09,352 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:09,352 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:09,352 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:09,352 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:09,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:09,373 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:09,463 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:09,466 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:27:09,467 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 15:27:09,467 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:27:09,468 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 15:27:09,469 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 15:27:09,469 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 15:27:09,469 INFO L87 Difference]: Start difference. First operand 49 states and 51 transitions. Second operand 5 states. [2018-01-24 15:27:09,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:09,545 INFO L93 Difference]: Finished difference Result 49 states and 51 transitions. [2018-01-24 15:27:09,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 15:27:09,545 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 11 [2018-01-24 15:27:09,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:09,546 INFO L225 Difference]: With dead ends: 49 [2018-01-24 15:27:09,546 INFO L226 Difference]: Without dead ends: 48 [2018-01-24 15:27:09,547 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-01-24 15:27:09,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-24 15:27:09,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-24 15:27:09,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-24 15:27:09,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 50 transitions. [2018-01-24 15:27:09,553 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 50 transitions. Word has length 11 [2018-01-24 15:27:09,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:09,553 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 50 transitions. [2018-01-24 15:27:09,553 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 15:27:09,553 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 50 transitions. [2018-01-24 15:27:09,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 15:27:09,554 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:09,554 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:09,555 INFO L371 AbstractCegarLoop]: === Iteration 3 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:09,555 INFO L82 PathProgramCache]: Analyzing trace with hash -1188525484, now seen corresponding path program 1 times [2018-01-24 15:27:09,555 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:09,556 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:09,556 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:09,556 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:09,556 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:09,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:09,577 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:09,667 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:09,668 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:27:09,668 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 15:27:09,668 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:27:09,668 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 15:27:09,669 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 15:27:09,672 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 15:27:09,673 INFO L87 Difference]: Start difference. First operand 48 states and 50 transitions. Second operand 6 states. [2018-01-24 15:27:09,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:09,785 INFO L93 Difference]: Finished difference Result 48 states and 50 transitions. [2018-01-24 15:27:09,785 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 15:27:09,785 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-01-24 15:27:09,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:09,786 INFO L225 Difference]: With dead ends: 48 [2018-01-24 15:27:09,786 INFO L226 Difference]: Without dead ends: 45 [2018-01-24 15:27:09,787 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-01-24 15:27:09,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-24 15:27:09,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-24 15:27:09,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-24 15:27:09,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 47 transitions. [2018-01-24 15:27:09,793 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 47 transitions. Word has length 17 [2018-01-24 15:27:09,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:09,794 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 47 transitions. [2018-01-24 15:27:09,794 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 15:27:09,794 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 47 transitions. [2018-01-24 15:27:09,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 15:27:09,795 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:09,795 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:09,795 INFO L371 AbstractCegarLoop]: === Iteration 4 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:09,795 INFO L82 PathProgramCache]: Analyzing trace with hash -1188525483, now seen corresponding path program 1 times [2018-01-24 15:27:09,795 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:09,799 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:09,799 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:09,799 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:09,800 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:09,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:09,818 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:09,950 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:09,951 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:27:09,951 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 15:27:09,951 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:27:09,952 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 15:27:09,952 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 15:27:09,952 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-24 15:27:09,952 INFO L87 Difference]: Start difference. First operand 45 states and 47 transitions. Second operand 7 states. [2018-01-24 15:27:10,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:10,073 INFO L93 Difference]: Finished difference Result 80 states and 87 transitions. [2018-01-24 15:27:10,073 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 15:27:10,073 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 17 [2018-01-24 15:27:10,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:10,074 INFO L225 Difference]: With dead ends: 80 [2018-01-24 15:27:10,074 INFO L226 Difference]: Without dead ends: 53 [2018-01-24 15:27:10,074 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-01-24 15:27:10,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-24 15:27:10,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 48. [2018-01-24 15:27:10,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-24 15:27:10,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 50 transitions. [2018-01-24 15:27:10,080 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 50 transitions. Word has length 17 [2018-01-24 15:27:10,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:10,080 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 50 transitions. [2018-01-24 15:27:10,080 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 15:27:10,080 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 50 transitions. [2018-01-24 15:27:10,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-24 15:27:10,081 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:10,081 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:10,081 INFO L371 AbstractCegarLoop]: === Iteration 5 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:10,081 INFO L82 PathProgramCache]: Analyzing trace with hash -2106816852, now seen corresponding path program 1 times [2018-01-24 15:27:10,081 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:10,082 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:10,082 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:10,082 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:10,082 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:10,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:10,100 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:10,248 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:10,249 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:10,249 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:27:10,250 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 22 with the following transitions: [2018-01-24 15:27:10,252 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [11], [12], [14], [16], [42], [43], [44], [45], [46], [47], [50], [76], [77], [78], [80] [2018-01-24 15:27:10,298 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:27:10,298 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:27:12,031 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:27:12,032 INFO L268 AbstractInterpreter]: Visited 19 different actions 28 times. Merged at 5 different actions 9 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 26 variables. [2018-01-24 15:27:12,069 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:27:12,069 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:12,069 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:27:12,078 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:12,079 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:27:12,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:12,117 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:12,151 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:27:12,152 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:12,159 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:12,159 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:14 [2018-01-24 15:27:12,190 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-01-24 15:27:12,191 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:12,200 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 15:27:12,200 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:21 [2018-01-24 15:27:12,320 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:12,321 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:13,348 WARN L143 SmtUtils]: Spent 271ms on a formula simplification that was a NOOP. DAG size: 17 [2018-01-24 15:27:13,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 19 [2018-01-24 15:27:13,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 5 [2018-01-24 15:27:13,376 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:13,378 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:13,379 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:13,379 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:15, output treesize:5 [2018-01-24 15:27:13,407 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:13,436 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:13,436 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:27:13,442 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:13,442 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:27:13,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:13,483 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:13,486 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:27:13,487 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:13,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:27:13,493 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:13,500 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:13,500 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:19 [2018-01-24 15:27:13,544 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:27:13,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 15:27:13,546 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:13,572 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:27:13,573 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:27:13,574 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 15:27:13,574 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:13,584 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 15:27:13,584 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:25 [2018-01-24 15:27:13,733 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:13,733 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:13,823 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 3 [2018-01-24 15:27:13,823 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:13,842 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 19 [2018-01-24 15:27:13,860 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 15:27:13,861 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:13,862 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:13,865 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:13,866 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:25, output treesize:5 [2018-01-24 15:27:13,872 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:13,873 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:27:13,873 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 7, 7, 7] total 24 [2018-01-24 15:27:13,873 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:27:13,874 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 15:27:13,874 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 15:27:13,874 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=476, Unknown=2, NotChecked=0, Total=600 [2018-01-24 15:27:13,875 INFO L87 Difference]: Start difference. First operand 48 states and 50 transitions. Second operand 12 states. [2018-01-24 15:27:14,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:14,152 INFO L93 Difference]: Finished difference Result 90 states and 95 transitions. [2018-01-24 15:27:14,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 15:27:14,153 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 21 [2018-01-24 15:27:14,153 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:14,154 INFO L225 Difference]: With dead ends: 90 [2018-01-24 15:27:14,154 INFO L226 Difference]: Without dead ends: 63 [2018-01-24 15:27:14,155 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 64 SyntacticMatches, 4 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=162, Invalid=592, Unknown=2, NotChecked=0, Total=756 [2018-01-24 15:27:14,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-01-24 15:27:14,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 56. [2018-01-24 15:27:14,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-24 15:27:14,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 60 transitions. [2018-01-24 15:27:14,161 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 60 transitions. Word has length 21 [2018-01-24 15:27:14,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:14,162 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 60 transitions. [2018-01-24 15:27:14,162 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 15:27:14,162 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 60 transitions. [2018-01-24 15:27:14,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-24 15:27:14,163 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:14,163 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:14,163 INFO L371 AbstractCegarLoop]: === Iteration 6 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:14,163 INFO L82 PathProgramCache]: Analyzing trace with hash -702775421, now seen corresponding path program 2 times [2018-01-24 15:27:14,163 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:14,164 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:14,165 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:14,165 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:14,165 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:14,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:14,183 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:14,403 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:14,403 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:14,403 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:27:14,403 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:27:14,403 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:27:14,403 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:14,403 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:27:14,420 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:27:14,420 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:27:14,440 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:14,445 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:14,446 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:14,448 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:14,452 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:27:14,452 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:14,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:27:14,458 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:14,463 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:14,463 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:19 [2018-01-24 15:27:14,488 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:27:14,488 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:27:14,489 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 15:27:14,489 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:14,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 15:27:14,497 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:14,505 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 15:27:14,505 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:32, output treesize:25 [2018-01-24 15:27:14,651 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:14,651 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:14,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 3 [2018-01-24 15:27:14,782 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:14,791 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 19 [2018-01-24 15:27:14,801 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 15:27:14,801 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:14,802 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:14,805 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:14,805 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:25, output treesize:5 [2018-01-24 15:27:14,822 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:14,842 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:14,842 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:27:14,845 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:27:14,845 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:27:14,864 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:14,892 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:14,903 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:14,907 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:14,910 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:27:14,911 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:14,918 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:27:14,918 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:14,924 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:14,925 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:19 [2018-01-24 15:27:14,929 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:27:14,929 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 15:27:14,930 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:14,942 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:27:14,943 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:27:14,943 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 15:27:14,943 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:14,989 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 15:27:14,989 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:25 [2018-01-24 15:27:15,033 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:15,033 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:15,079 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 3 [2018-01-24 15:27:15,079 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:15,083 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 19 [2018-01-24 15:27:15,091 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 5 [2018-01-24 15:27:15,092 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:15,093 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:15,095 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:15,095 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:25, output treesize:5 [2018-01-24 15:27:15,113 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:15,114 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:27:15,114 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8, 8, 8] total 23 [2018-01-24 15:27:15,115 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:27:15,115 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 15:27:15,115 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 15:27:15,116 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=442, Unknown=0, NotChecked=0, Total=552 [2018-01-24 15:27:15,116 INFO L87 Difference]: Start difference. First operand 56 states and 60 transitions. Second operand 17 states. [2018-01-24 15:27:15,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:15,642 INFO L93 Difference]: Finished difference Result 104 states and 111 transitions. [2018-01-24 15:27:15,642 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 15:27:15,642 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 25 [2018-01-24 15:27:15,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:15,643 INFO L225 Difference]: With dead ends: 104 [2018-01-24 15:27:15,643 INFO L226 Difference]: Without dead ends: 73 [2018-01-24 15:27:15,644 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 83 SyntacticMatches, 3 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 257 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=208, Invalid=722, Unknown=0, NotChecked=0, Total=930 [2018-01-24 15:27:15,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-01-24 15:27:15,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 64. [2018-01-24 15:27:15,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-01-24 15:27:15,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 70 transitions. [2018-01-24 15:27:15,655 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 70 transitions. Word has length 25 [2018-01-24 15:27:15,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:15,655 INFO L432 AbstractCegarLoop]: Abstraction has 64 states and 70 transitions. [2018-01-24 15:27:15,655 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 15:27:15,656 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 70 transitions. [2018-01-24 15:27:15,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 15:27:15,656 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:15,657 INFO L322 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:15,657 INFO L371 AbstractCegarLoop]: === Iteration 7 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:15,657 INFO L82 PathProgramCache]: Analyzing trace with hash 1827026138, now seen corresponding path program 3 times [2018-01-24 15:27:15,657 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:15,658 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:15,658 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:27:15,658 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:15,658 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:15,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:15,674 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:15,860 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:15,861 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:15,861 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:27:15,861 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:27:15,861 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:27:15,861 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:15,861 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:27:15,867 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:27:15,867 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:27:15,877 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:15,880 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:15,881 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:15,882 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:15,885 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:27:15,885 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:15,890 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:27:15,891 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:15,894 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:15,894 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:18, output treesize:16 [2018-01-24 15:27:15,918 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:27:15,919 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:27:15,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 15:27:15,919 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:15,926 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 15:27:15,927 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:15,934 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:15,934 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:22 [2018-01-24 15:27:16,049 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 15:27:16,049 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:16,245 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 15:27:16,265 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:16,265 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:27:16,268 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:27:16,268 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:27:16,285 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:16,311 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:16,321 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:16,324 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:16,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:27:16,327 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:16,331 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:27:16,332 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:16,335 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:16,335 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:18, output treesize:16 [2018-01-24 15:27:16,371 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:27:16,372 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:27:16,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 15:27:16,373 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:16,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 15:27:16,380 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:16,385 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 15:27:16,385 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:22 [2018-01-24 15:27:16,557 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 15:27:16,558 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:16,747 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 15:27:16,748 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:27:16,749 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 7, 7, 7] total 29 [2018-01-24 15:27:16,749 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:27:16,749 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 15:27:16,749 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 15:27:16,750 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=730, Unknown=0, NotChecked=0, Total=870 [2018-01-24 15:27:16,750 INFO L87 Difference]: Start difference. First operand 64 states and 70 transitions. Second operand 18 states. [2018-01-24 15:27:17,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:17,844 INFO L93 Difference]: Finished difference Result 125 states and 137 transitions. [2018-01-24 15:27:17,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 15:27:17,845 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 29 [2018-01-24 15:27:17,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:17,848 INFO L225 Difference]: With dead ends: 125 [2018-01-24 15:27:17,848 INFO L226 Difference]: Without dead ends: 90 [2018-01-24 15:27:17,849 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 92 SyntacticMatches, 5 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 460 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=338, Invalid=1302, Unknown=0, NotChecked=0, Total=1640 [2018-01-24 15:27:17,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-01-24 15:27:17,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 70. [2018-01-24 15:27:17,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-01-24 15:27:17,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 76 transitions. [2018-01-24 15:27:17,860 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 76 transitions. Word has length 29 [2018-01-24 15:27:17,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:17,861 INFO L432 AbstractCegarLoop]: Abstraction has 70 states and 76 transitions. [2018-01-24 15:27:17,861 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 15:27:17,861 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 76 transitions. [2018-01-24 15:27:17,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 15:27:17,862 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:17,862 INFO L322 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:17,862 INFO L371 AbstractCegarLoop]: === Iteration 8 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:17,862 INFO L82 PathProgramCache]: Analyzing trace with hash -645884181, now seen corresponding path program 1 times [2018-01-24 15:27:17,862 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:17,863 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:17,864 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:27:17,864 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:17,864 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:17,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:17,878 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:18,123 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:18,123 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:18,123 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:27:18,123 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 41 with the following transitions: [2018-01-24 15:27:18,123 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [9], [11], [12], [16], [20], [24], [29], [32], [42], [43], [44], [45], [46], [47], [50], [76], [77], [78], [80] [2018-01-24 15:27:18,124 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:27:18,124 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:27:19,589 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:27:19,589 INFO L268 AbstractInterpreter]: Visited 23 different actions 41 times. Merged at 9 different actions 18 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 26 variables. [2018-01-24 15:27:19,606 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:27:19,606 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:19,607 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:27:19,618 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:19,618 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:27:19,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:19,647 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:19,980 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:19,981 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:20,301 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:20,336 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:20,336 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:27:20,341 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:20,341 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:27:20,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:20,398 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:20,406 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:20,406 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:20,418 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:20,420 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:27:20,420 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 22 [2018-01-24 15:27:20,420 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:27:20,421 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 15:27:20,421 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 15:27:20,422 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=199, Invalid=263, Unknown=0, NotChecked=0, Total=462 [2018-01-24 15:27:20,422 INFO L87 Difference]: Start difference. First operand 70 states and 76 transitions. Second operand 15 states. [2018-01-24 15:27:20,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:20,561 INFO L93 Difference]: Finished difference Result 136 states and 147 transitions. [2018-01-24 15:27:20,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 15:27:20,561 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 40 [2018-01-24 15:27:20,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:20,563 INFO L225 Difference]: With dead ends: 136 [2018-01-24 15:27:20,563 INFO L226 Difference]: Without dead ends: 102 [2018-01-24 15:27:20,564 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 164 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=199, Invalid=263, Unknown=0, NotChecked=0, Total=462 [2018-01-24 15:27:20,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-01-24 15:27:20,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 86. [2018-01-24 15:27:20,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-01-24 15:27:20,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 98 transitions. [2018-01-24 15:27:20,576 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 98 transitions. Word has length 40 [2018-01-24 15:27:20,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:20,576 INFO L432 AbstractCegarLoop]: Abstraction has 86 states and 98 transitions. [2018-01-24 15:27:20,577 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 15:27:20,577 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 98 transitions. [2018-01-24 15:27:20,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 15:27:20,578 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:20,578 INFO L322 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:20,578 INFO L371 AbstractCegarLoop]: === Iteration 9 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:20,578 INFO L82 PathProgramCache]: Analyzing trace with hash -2113361740, now seen corresponding path program 2 times [2018-01-24 15:27:20,578 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:20,579 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:20,579 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:20,579 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:20,579 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:20,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:20,593 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:20,666 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:20,666 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:20,666 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:27:20,667 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:27:20,667 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:27:20,667 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:20,667 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:27:20,678 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:27:20,678 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:27:20,695 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:20,698 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:20,701 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:20,705 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:27:20,706 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:20,717 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 15:27:20,717 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:14 [2018-01-24 15:27:20,952 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:27:20,952 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:21,216 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:27:21,241 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 15:27:21,241 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7, 7] imperfect sequences [10] total 20 [2018-01-24 15:27:21,241 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:27:21,242 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 15:27:21,242 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 15:27:21,242 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=305, Unknown=0, NotChecked=0, Total=380 [2018-01-24 15:27:21,242 INFO L87 Difference]: Start difference. First operand 86 states and 98 transitions. Second operand 8 states. [2018-01-24 15:27:21,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:21,462 INFO L93 Difference]: Finished difference Result 86 states and 98 transitions. [2018-01-24 15:27:21,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 15:27:21,462 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-01-24 15:27:21,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:21,464 INFO L225 Difference]: With dead ends: 86 [2018-01-24 15:27:21,464 INFO L226 Difference]: Without dead ends: 81 [2018-01-24 15:27:21,465 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 78 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=138, Invalid=564, Unknown=0, NotChecked=0, Total=702 [2018-01-24 15:27:21,465 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2018-01-24 15:27:21,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 81. [2018-01-24 15:27:21,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-01-24 15:27:21,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 87 transitions. [2018-01-24 15:27:21,479 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 87 transitions. Word has length 44 [2018-01-24 15:27:21,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:21,479 INFO L432 AbstractCegarLoop]: Abstraction has 81 states and 87 transitions. [2018-01-24 15:27:21,479 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 15:27:21,479 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 87 transitions. [2018-01-24 15:27:21,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 15:27:21,480 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:21,481 INFO L322 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:21,481 INFO L371 AbstractCegarLoop]: === Iteration 10 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:21,481 INFO L82 PathProgramCache]: Analyzing trace with hash -2113361741, now seen corresponding path program 1 times [2018-01-24 15:27:21,481 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:21,482 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:21,482 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:27:21,482 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:21,482 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:21,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:21,494 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:21,527 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:27:21,528 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:27:21,528 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 15:27:21,528 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:27:21,528 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 15:27:21,528 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 15:27:21,529 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 15:27:21,529 INFO L87 Difference]: Start difference. First operand 81 states and 87 transitions. Second operand 4 states. [2018-01-24 15:27:21,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:21,571 INFO L93 Difference]: Finished difference Result 81 states and 87 transitions. [2018-01-24 15:27:21,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 15:27:21,571 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 44 [2018-01-24 15:27:21,572 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:21,572 INFO L225 Difference]: With dead ends: 81 [2018-01-24 15:27:21,573 INFO L226 Difference]: Without dead ends: 79 [2018-01-24 15:27:21,573 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 15:27:21,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-01-24 15:27:21,581 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 79. [2018-01-24 15:27:21,581 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-01-24 15:27:21,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 80 transitions. [2018-01-24 15:27:21,582 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 80 transitions. Word has length 44 [2018-01-24 15:27:21,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:21,582 INFO L432 AbstractCegarLoop]: Abstraction has 79 states and 80 transitions. [2018-01-24 15:27:21,582 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 15:27:21,582 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 80 transitions. [2018-01-24 15:27:21,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-01-24 15:27:21,584 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:21,584 INFO L322 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:21,584 INFO L371 AbstractCegarLoop]: === Iteration 11 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:21,584 INFO L82 PathProgramCache]: Analyzing trace with hash 1791473436, now seen corresponding path program 1 times [2018-01-24 15:27:21,584 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:21,585 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:21,585 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:21,585 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:21,586 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:21,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:21,603 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:21,787 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:27:21,787 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:21,787 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:27:21,787 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 74 with the following transitions: [2018-01-24 15:27:21,787 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [9], [11], [12], [16], [20], [24], [27], [29], [30], [34], [38], [42], [43], [44], [45], [46], [47], [50], [52], [65], [66], [70], [76], [77], [78], [80], [81] [2018-01-24 15:27:21,789 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:27:21,789 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:27:26,888 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:27:26,888 INFO L268 AbstractInterpreter]: Visited 31 different actions 83 times. Merged at 17 different actions 47 times. Never widened. Found 7 fixpoints after 4 different actions. Largest state had 27 variables. [2018-01-24 15:27:26,901 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:27:26,901 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:26,901 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:27:26,912 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:26,913 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:27:26,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:26,951 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:27,040 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:27:27,041 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:27,170 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:27:27,192 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:27,192 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:27:27,195 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:27,196 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:27:27,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:27,249 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:27,267 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:27:27,267 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:27,358 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:27:27,359 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:27:27,360 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 11, 10, 11] total 26 [2018-01-24 15:27:27,360 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:27:27,360 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 15:27:27,360 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 15:27:27,361 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=238, Invalid=412, Unknown=0, NotChecked=0, Total=650 [2018-01-24 15:27:27,361 INFO L87 Difference]: Start difference. First operand 79 states and 80 transitions. Second operand 18 states. [2018-01-24 15:27:27,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:27,766 INFO L93 Difference]: Finished difference Result 130 states and 133 transitions. [2018-01-24 15:27:27,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 15:27:27,767 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 73 [2018-01-24 15:27:27,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:27,768 INFO L225 Difference]: With dead ends: 130 [2018-01-24 15:27:27,768 INFO L226 Difference]: Without dead ends: 91 [2018-01-24 15:27:27,769 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 302 GetRequests, 273 SyntacticMatches, 4 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 227 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=263, Invalid=439, Unknown=0, NotChecked=0, Total=702 [2018-01-24 15:27:27,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-01-24 15:27:27,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 87. [2018-01-24 15:27:27,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-01-24 15:27:27,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 88 transitions. [2018-01-24 15:27:27,781 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 88 transitions. Word has length 73 [2018-01-24 15:27:27,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:27,782 INFO L432 AbstractCegarLoop]: Abstraction has 87 states and 88 transitions. [2018-01-24 15:27:27,782 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 15:27:27,782 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 88 transitions. [2018-01-24 15:27:27,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-01-24 15:27:27,783 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:27,784 INFO L322 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:27,784 INFO L371 AbstractCegarLoop]: === Iteration 12 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:27,784 INFO L82 PathProgramCache]: Analyzing trace with hash 526780668, now seen corresponding path program 2 times [2018-01-24 15:27:27,784 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:27,785 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:27,785 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:27,785 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:27,785 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:27,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:27,805 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:28,133 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 15:27:28,133 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:28,133 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:27:28,133 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:27:28,133 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:27:28,134 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:28,134 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:27:28,143 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:27:28,143 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:27:28,166 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:28,180 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:28,185 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:28,188 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:28,485 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 15:27:28,485 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:28,700 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 15:27:28,721 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:28,721 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:27:28,724 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:27:28,724 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:27:28,745 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:28,799 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:28,817 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:28,822 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:28,831 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 15:27:28,831 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:28,886 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 15:27:28,887 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:27:28,887 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 12, 11, 12] total 29 [2018-01-24 15:27:28,888 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:27:28,888 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 15:27:28,888 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 15:27:28,888 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=299, Invalid=513, Unknown=0, NotChecked=0, Total=812 [2018-01-24 15:27:28,888 INFO L87 Difference]: Start difference. First operand 87 states and 88 transitions. Second operand 20 states. [2018-01-24 15:27:29,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:29,019 INFO L93 Difference]: Finished difference Result 142 states and 145 transitions. [2018-01-24 15:27:29,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 15:27:29,020 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 81 [2018-01-24 15:27:29,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:29,020 INFO L225 Difference]: With dead ends: 142 [2018-01-24 15:27:29,020 INFO L226 Difference]: Without dead ends: 99 [2018-01-24 15:27:29,021 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 335 GetRequests, 303 SyntacticMatches, 4 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 296 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=327, Invalid=543, Unknown=0, NotChecked=0, Total=870 [2018-01-24 15:27:29,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-01-24 15:27:29,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 95. [2018-01-24 15:27:29,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-01-24 15:27:29,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 96 transitions. [2018-01-24 15:27:29,029 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 96 transitions. Word has length 81 [2018-01-24 15:27:29,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:29,030 INFO L432 AbstractCegarLoop]: Abstraction has 95 states and 96 transitions. [2018-01-24 15:27:29,030 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 15:27:29,030 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 96 transitions. [2018-01-24 15:27:29,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-01-24 15:27:29,031 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:29,031 INFO L322 BasicCegarLoop]: trace histogram [9, 9, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:29,031 INFO L371 AbstractCegarLoop]: === Iteration 13 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:29,032 INFO L82 PathProgramCache]: Analyzing trace with hash -2016762916, now seen corresponding path program 3 times [2018-01-24 15:27:29,032 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:29,032 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:29,032 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:27:29,032 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:29,033 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:29,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:29,054 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:29,174 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-24 15:27:29,175 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:29,175 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:27:29,175 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:27:29,175 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:27:29,175 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:29,175 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:27:29,182 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:27:29,182 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:27:29,195 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:29,199 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:29,202 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:29,205 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:29,212 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:29,221 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:29,240 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:29,271 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:29,282 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:29,283 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:29,285 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:29,363 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-24 15:27:29,363 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:29,534 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-24 15:27:29,554 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:29,555 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:27:29,557 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:27:29,558 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:27:29,576 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:29,618 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:29,673 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:29,737 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:29,817 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:29,918 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:30,048 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:30,211 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:30,430 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:30,454 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:30,460 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:30,470 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-24 15:27:30,470 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:30,544 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-24 15:27:30,546 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:27:30,546 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 13, 12, 13] total 32 [2018-01-24 15:27:30,546 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:27:30,547 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-24 15:27:30,547 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-24 15:27:30,547 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=367, Invalid=625, Unknown=0, NotChecked=0, Total=992 [2018-01-24 15:27:30,547 INFO L87 Difference]: Start difference. First operand 95 states and 96 transitions. Second operand 22 states. [2018-01-24 15:27:30,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:30,656 INFO L93 Difference]: Finished difference Result 154 states and 157 transitions. [2018-01-24 15:27:30,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 15:27:30,657 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 89 [2018-01-24 15:27:30,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:30,658 INFO L225 Difference]: With dead ends: 154 [2018-01-24 15:27:30,658 INFO L226 Difference]: Without dead ends: 107 [2018-01-24 15:27:30,659 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 368 GetRequests, 333 SyntacticMatches, 4 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 374 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=398, Invalid=658, Unknown=0, NotChecked=0, Total=1056 [2018-01-24 15:27:30,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-01-24 15:27:30,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 103. [2018-01-24 15:27:30,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-01-24 15:27:30,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 104 transitions. [2018-01-24 15:27:30,673 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 104 transitions. Word has length 89 [2018-01-24 15:27:30,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:30,674 INFO L432 AbstractCegarLoop]: Abstraction has 103 states and 104 transitions. [2018-01-24 15:27:30,674 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-24 15:27:30,674 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 104 transitions. [2018-01-24 15:27:30,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-01-24 15:27:30,675 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:30,676 INFO L322 BasicCegarLoop]: trace histogram [10, 10, 9, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:30,676 INFO L371 AbstractCegarLoop]: === Iteration 14 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:30,676 INFO L82 PathProgramCache]: Analyzing trace with hash 1885341628, now seen corresponding path program 4 times [2018-01-24 15:27:30,676 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:30,677 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:30,677 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:27:30,677 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:30,677 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:30,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:30,698 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:30,875 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-01-24 15:27:30,875 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:30,875 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:27:30,875 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:27:30,875 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:27:30,875 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:30,875 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:27:30,880 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 15:27:30,880 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 15:27:30,907 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:30,910 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:30,913 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:27:30,913 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:30,914 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:30,914 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:8, output treesize:7 [2018-01-24 15:27:31,255 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-01-24 15:27:31,256 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:31,301 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 15:27:31,367 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:24, output treesize:17 [2018-01-24 15:27:31,722 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 136 proven. 188 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:31,722 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:32,318 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:32,391 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:32,394 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:32,399 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:27:32,454 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:32,456 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:32,460 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:32,463 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:27:32,507 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:32,510 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:32,513 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:32,517 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:27:32,743 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:27:32,796 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:32,798 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:32,799 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:32,989 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:33,032 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:33,078 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:27:33,145 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:33,147 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:33,149 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:33,152 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:27:33,622 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 136 proven. 188 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:33,655 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:33,656 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:27:33,660 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 15:27:33,660 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 15:27:33,734 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:33,741 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:33,744 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:27:33,744 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:33,748 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:33,748 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:8, output treesize:7 [2018-01-24 15:27:33,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-01-24 15:27:33,765 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:33,770 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 15:27:33,771 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:24, output treesize:17 [2018-01-24 15:27:33,791 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 136 proven. 188 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:33,791 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:33,978 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:33,980 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:33,982 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:34,016 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:34,018 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:34,020 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:34,022 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:27:34,025 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:34,028 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:34,031 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:34,328 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:27:34,332 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:34,335 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:34,338 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:34,342 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:27:34,400 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:34,451 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:34,495 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:27:34,717 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 136 proven. 188 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:34,719 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:27:34,719 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 26, 28, 26, 26] total 65 [2018-01-24 15:27:34,719 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:27:34,719 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-24 15:27:34,719 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-24 15:27:34,720 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=810, Invalid=3350, Unknown=0, NotChecked=0, Total=4160 [2018-01-24 15:27:34,721 INFO L87 Difference]: Start difference. First operand 103 states and 104 transitions. Second operand 38 states. [2018-01-24 15:27:35,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:35,303 INFO L93 Difference]: Finished difference Result 166 states and 169 transitions. [2018-01-24 15:27:35,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-24 15:27:35,303 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 97 [2018-01-24 15:27:35,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:35,304 INFO L225 Difference]: With dead ends: 166 [2018-01-24 15:27:35,304 INFO L226 Difference]: Without dead ends: 115 [2018-01-24 15:27:35,305 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 416 GetRequests, 319 SyntacticMatches, 19 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 3 DeprecatedPredicates, 3630 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=1185, Invalid=5135, Unknown=0, NotChecked=0, Total=6320 [2018-01-24 15:27:35,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-01-24 15:27:35,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 111. [2018-01-24 15:27:35,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-01-24 15:27:35,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 112 transitions. [2018-01-24 15:27:35,315 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 112 transitions. Word has length 97 [2018-01-24 15:27:35,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:35,315 INFO L432 AbstractCegarLoop]: Abstraction has 111 states and 112 transitions. [2018-01-24 15:27:35,315 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-24 15:27:35,315 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 112 transitions. [2018-01-24 15:27:35,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-01-24 15:27:35,316 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:35,316 INFO L322 BasicCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:35,316 INFO L371 AbstractCegarLoop]: === Iteration 15 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:35,316 INFO L82 PathProgramCache]: Analyzing trace with hash -984566628, now seen corresponding path program 5 times [2018-01-24 15:27:35,317 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:35,317 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:35,317 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:27:35,317 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:35,317 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:35,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:35,333 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:35,682 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-24 15:27:35,682 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:35,682 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:27:35,682 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:27:35,682 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:27:35,682 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:35,683 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:27:35,688 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 15:27:35,688 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:27:35,696 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:35,698 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:35,701 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:35,704 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:35,710 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:35,726 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:35,754 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:35,788 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:36,000 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:36,047 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:36,773 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:36,777 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:36,782 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:36,801 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-24 15:27:36,801 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:36,929 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-24 15:27:36,950 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:36,950 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 20 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:27:36,953 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 15:27:36,953 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:27:36,963 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:36,969 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:36,978 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:36,991 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:37,019 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:37,057 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:37,111 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:37,183 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:37,407 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:37,714 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:38,227 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:38,266 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:38,273 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:38,281 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-24 15:27:38,281 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:38,294 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-24 15:27:38,296 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:27:38,296 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 13, 13, 13, 13] total 27 [2018-01-24 15:27:38,296 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:27:38,296 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 15:27:38,296 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 15:27:38,297 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=304, Invalid=398, Unknown=0, NotChecked=0, Total=702 [2018-01-24 15:27:38,297 INFO L87 Difference]: Start difference. First operand 111 states and 112 transitions. Second operand 16 states. [2018-01-24 15:27:38,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:38,464 INFO L93 Difference]: Finished difference Result 178 states and 181 transitions. [2018-01-24 15:27:38,464 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 15:27:38,464 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 105 [2018-01-24 15:27:38,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:38,465 INFO L225 Difference]: With dead ends: 178 [2018-01-24 15:27:38,465 INFO L226 Difference]: Without dead ends: 123 [2018-01-24 15:27:38,466 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 455 GetRequests, 419 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 114 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=580, Invalid=826, Unknown=0, NotChecked=0, Total=1406 [2018-01-24 15:27:38,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-01-24 15:27:38,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 119. [2018-01-24 15:27:38,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 15:27:38,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 120 transitions. [2018-01-24 15:27:38,479 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 120 transitions. Word has length 105 [2018-01-24 15:27:38,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:38,480 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 120 transitions. [2018-01-24 15:27:38,480 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 15:27:38,480 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 120 transitions. [2018-01-24 15:27:38,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-01-24 15:27:38,481 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:38,481 INFO L322 BasicCegarLoop]: trace histogram [12, 12, 11, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:38,481 INFO L371 AbstractCegarLoop]: === Iteration 16 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:38,482 INFO L82 PathProgramCache]: Analyzing trace with hash -1299764612, now seen corresponding path program 6 times [2018-01-24 15:27:38,482 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:38,482 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:38,483 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:27:38,483 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:38,483 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:38,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:38,504 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:38,688 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-24 15:27:38,688 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:38,688 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:27:38,688 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:27:38,689 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:27:38,689 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:38,689 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:27:38,698 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 15:27:38,698 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 15:27:38,719 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:38,725 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:38,730 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:38,737 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:38,750 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:38,771 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:38,810 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:38,869 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:38,948 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:39,102 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:39,235 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:39,488 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:39,489 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:39,493 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:39,539 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-24 15:27:39,539 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:39,690 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-24 15:27:39,712 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:39,712 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 22 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:27:39,716 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 15:27:39,716 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 15:27:39,737 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:39,784 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:39,845 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:39,947 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:40,082 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:40,246 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:40,407 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:40,635 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:40,948 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:41,337 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:41,638 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:41,976 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:27:42,015 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:42,023 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:42,032 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-24 15:27:42,032 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:42,047 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-24 15:27:42,049 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:27:42,049 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 14, 14, 14, 14] total 29 [2018-01-24 15:27:42,050 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:27:42,050 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 15:27:42,050 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 15:27:42,050 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=355, Invalid=457, Unknown=0, NotChecked=0, Total=812 [2018-01-24 15:27:42,050 INFO L87 Difference]: Start difference. First operand 119 states and 120 transitions. Second operand 17 states. [2018-01-24 15:27:42,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:42,234 INFO L93 Difference]: Finished difference Result 190 states and 193 transitions. [2018-01-24 15:27:42,234 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 15:27:42,235 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 113 [2018-01-24 15:27:42,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:42,235 INFO L225 Difference]: With dead ends: 190 [2018-01-24 15:27:42,235 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 15:27:42,236 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 490 GetRequests, 451 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 131 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=680, Invalid=960, Unknown=0, NotChecked=0, Total=1640 [2018-01-24 15:27:42,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 15:27:42,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 127. [2018-01-24 15:27:42,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-01-24 15:27:42,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 128 transitions. [2018-01-24 15:27:42,252 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 128 transitions. Word has length 113 [2018-01-24 15:27:42,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:42,253 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 128 transitions. [2018-01-24 15:27:42,253 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 15:27:42,253 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 128 transitions. [2018-01-24 15:27:42,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-01-24 15:27:42,254 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:42,254 INFO L322 BasicCegarLoop]: trace histogram [13, 13, 12, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:42,254 INFO L371 AbstractCegarLoop]: === Iteration 17 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:42,255 INFO L82 PathProgramCache]: Analyzing trace with hash -1012012708, now seen corresponding path program 7 times [2018-01-24 15:27:42,255 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:42,255 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:42,256 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:27:42,256 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:42,256 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:42,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:42,278 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:42,491 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-24 15:27:42,492 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:42,492 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:27:42,492 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:27:42,492 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:27:42,492 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:42,492 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:27:42,497 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:42,497 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:27:42,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:42,527 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:42,639 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-24 15:27:42,639 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:42,922 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-24 15:27:42,942 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:42,942 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 24 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:27:42,945 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:42,945 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:27:43,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:43,019 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:43,033 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-24 15:27:43,033 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:43,129 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-24 15:27:43,131 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:27:43,131 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 17, 16, 17] total 44 [2018-01-24 15:27:43,131 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:27:43,131 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-24 15:27:43,132 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-24 15:27:43,132 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=709, Invalid=1183, Unknown=0, NotChecked=0, Total=1892 [2018-01-24 15:27:43,132 INFO L87 Difference]: Start difference. First operand 127 states and 128 transitions. Second operand 30 states. [2018-01-24 15:27:43,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:43,282 INFO L93 Difference]: Finished difference Result 202 states and 205 transitions. [2018-01-24 15:27:43,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-24 15:27:43,283 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 121 [2018-01-24 15:27:43,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:43,283 INFO L225 Difference]: With dead ends: 202 [2018-01-24 15:27:43,283 INFO L226 Difference]: Without dead ends: 139 [2018-01-24 15:27:43,284 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 500 GetRequests, 453 SyntacticMatches, 4 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 776 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=752, Invalid=1228, Unknown=0, NotChecked=0, Total=1980 [2018-01-24 15:27:43,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-01-24 15:27:43,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 135. [2018-01-24 15:27:43,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-24 15:27:43,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 136 transitions. [2018-01-24 15:27:43,296 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 136 transitions. Word has length 121 [2018-01-24 15:27:43,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:43,297 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 136 transitions. [2018-01-24 15:27:43,297 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-24 15:27:43,297 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 136 transitions. [2018-01-24 15:27:43,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-01-24 15:27:43,297 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:43,297 INFO L322 BasicCegarLoop]: trace histogram [14, 14, 13, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:43,297 INFO L371 AbstractCegarLoop]: === Iteration 18 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:43,298 INFO L82 PathProgramCache]: Analyzing trace with hash 70218044, now seen corresponding path program 8 times [2018-01-24 15:27:43,298 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:43,298 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:43,298 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:27:43,298 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:43,298 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:43,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:43,319 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:43,526 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-24 15:27:43,527 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:43,527 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:27:43,527 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:27:43,527 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:27:43,527 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:43,527 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:27:43,533 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:27:43,533 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:27:43,554 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:43,574 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:43,579 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:43,583 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:43,734 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-24 15:27:43,734 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:44,051 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-24 15:27:44,071 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:44,071 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 26 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:27:44,074 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:27:44,074 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:27:44,096 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:44,161 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:27:44,188 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:44,194 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:44,219 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-24 15:27:44,219 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:44,325 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-24 15:27:44,326 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:27:44,327 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 18, 17, 18] total 47 [2018-01-24 15:27:44,327 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:27:44,327 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-24 15:27:44,327 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-24 15:27:44,328 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=812, Invalid=1350, Unknown=0, NotChecked=0, Total=2162 [2018-01-24 15:27:44,328 INFO L87 Difference]: Start difference. First operand 135 states and 136 transitions. Second operand 32 states. [2018-01-24 15:27:44,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:44,503 INFO L93 Difference]: Finished difference Result 214 states and 217 transitions. [2018-01-24 15:27:44,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-24 15:27:44,504 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 129 [2018-01-24 15:27:44,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:44,504 INFO L225 Difference]: With dead ends: 214 [2018-01-24 15:27:44,505 INFO L226 Difference]: Without dead ends: 147 [2018-01-24 15:27:44,505 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 533 GetRequests, 483 SyntacticMatches, 4 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 899 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=858, Invalid=1398, Unknown=0, NotChecked=0, Total=2256 [2018-01-24 15:27:44,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-01-24 15:27:44,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 143. [2018-01-24 15:27:44,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-24 15:27:44,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 144 transitions. [2018-01-24 15:27:44,517 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 144 transitions. Word has length 129 [2018-01-24 15:27:44,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:44,517 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 144 transitions. [2018-01-24 15:27:44,518 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-24 15:27:44,518 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 144 transitions. [2018-01-24 15:27:44,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-01-24 15:27:44,518 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:44,518 INFO L322 BasicCegarLoop]: trace histogram [15, 15, 14, 14, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:44,518 INFO L371 AbstractCegarLoop]: === Iteration 19 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:44,519 INFO L82 PathProgramCache]: Analyzing trace with hash 523649564, now seen corresponding path program 9 times [2018-01-24 15:27:44,519 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:44,519 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:44,519 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:27:44,519 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:44,519 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:44,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:44,541 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:44,793 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2018-01-24 15:27:44,793 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:44,793 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:27:44,793 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:27:44,794 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:27:44,794 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:44,794 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:27:44,798 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:27:44,799 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:27:44,815 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:44,821 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:44,825 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:44,836 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:44,846 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:44,865 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:44,886 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:44,900 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:44,925 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:44,944 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:45,027 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:45,077 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:45,153 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:45,249 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:45,478 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:45,479 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:45,483 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:45,515 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2018-01-24 15:27:45,516 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:45,745 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2018-01-24 15:27:45,770 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:45,771 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 28 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:27:45,774 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:27:45,774 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:27:45,796 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:45,847 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:45,904 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:45,966 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:46,033 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:46,130 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:46,255 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:46,404 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:46,572 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:46,777 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:47,020 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:47,337 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:47,678 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:48,119 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:48,621 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:27:48,665 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:48,673 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:48,831 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2018-01-24 15:27:48,832 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:49,281 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2018-01-24 15:27:49,283 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:27:49,283 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 17, 17, 18, 19] total 66 [2018-01-24 15:27:49,283 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:27:49,284 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 15:27:49,284 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 15:27:49,285 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1555, Invalid=2735, Unknown=0, NotChecked=0, Total=4290 [2018-01-24 15:27:49,285 INFO L87 Difference]: Start difference. First operand 143 states and 144 transitions. Second operand 20 states. [2018-01-24 15:27:49,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:27:49,405 INFO L93 Difference]: Finished difference Result 226 states and 229 transitions. [2018-01-24 15:27:49,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-24 15:27:49,405 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 137 [2018-01-24 15:27:49,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:27:49,406 INFO L225 Difference]: With dead ends: 226 [2018-01-24 15:27:49,406 INFO L226 Difference]: Without dead ends: 155 [2018-01-24 15:27:49,407 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 595 GetRequests, 528 SyntacticMatches, 2 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2061 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1620, Invalid=2802, Unknown=0, NotChecked=0, Total=4422 [2018-01-24 15:27:49,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2018-01-24 15:27:49,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 151. [2018-01-24 15:27:49,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-01-24 15:27:49,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 152 transitions. [2018-01-24 15:27:49,420 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 152 transitions. Word has length 137 [2018-01-24 15:27:49,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:27:49,420 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 152 transitions. [2018-01-24 15:27:49,420 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 15:27:49,420 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 152 transitions. [2018-01-24 15:27:49,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2018-01-24 15:27:49,421 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:27:49,421 INFO L322 BasicCegarLoop]: trace histogram [16, 16, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:27:49,421 INFO L371 AbstractCegarLoop]: === Iteration 20 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:27:49,421 INFO L82 PathProgramCache]: Analyzing trace with hash 2142034940, now seen corresponding path program 10 times [2018-01-24 15:27:49,421 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:27:49,422 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:49,422 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:27:49,422 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:27:49,422 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:27:49,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:27:49,444 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:27:49,647 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 450 trivial. 0 not checked. [2018-01-24 15:27:49,647 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:49,647 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:27:49,648 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:27:49,648 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:27:49,648 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:49,648 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:27:49,653 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 15:27:49,653 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 15:27:49,685 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:49,689 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:49,691 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:27:49,691 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:49,692 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:49,693 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:8, output treesize:7 [2018-01-24 15:27:50,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-01-24 15:27:50,223 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:50,227 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 15:27:50,227 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:24, output treesize:17 [2018-01-24 15:27:50,303 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 406 proven. 494 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:50,304 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:27:52,271 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 406 proven. 494 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:52,302 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:27:52,302 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 30 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:27:52,305 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 15:27:52,306 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 15:27:52,385 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:27:52,392 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:27:52,394 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:27:52,394 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:52,395 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:27:52,395 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:8, output treesize:7 [2018-01-24 15:27:52,413 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-01-24 15:27:52,413 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:27:52,417 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 15:27:52,417 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:24, output treesize:17 [2018-01-24 15:27:52,455 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 406 proven. 494 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:52,455 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-24 15:27:52,944 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 406 proven. 494 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:27:52,945 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:27:52,946 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 38, 38, 38, 38] total 92 [2018-01-24 15:27:52,946 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:27:52,946 INFO L409 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-01-24 15:27:52,947 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-01-24 15:27:52,949 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1709, Invalid=6663, Unknown=0, NotChecked=0, Total=8372 [2018-01-24 15:27:52,949 INFO L87 Difference]: Start difference. First operand 151 states and 152 transitions. Second operand 56 states. [2018-01-24 15:27:52,950 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-01-24 15:27:52,950 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-24 15:27:52,956 WARN L187 ceAbstractionStarter]: Timeout [2018-01-24 15:27:52,956 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.01 03:27:52 BoogieIcfgContainer [2018-01-24 15:27:52,956 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-24 15:27:52,957 INFO L168 Benchmark]: Toolchain (without parser) took 44651.59 ms. Allocated memory was 305.1 MB in the beginning and 1.0 GB in the end (delta: 701.0 MB). Free memory was 264.2 MB in the beginning and 331.9 MB in the end (delta: -67.8 MB). Peak memory consumption was 633.2 MB. Max. memory is 5.3 GB. [2018-01-24 15:27:52,958 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 305.1 MB. Free memory is still 270.2 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 15:27:52,958 INFO L168 Benchmark]: CACSL2BoogieTranslator took 190.62 ms. Allocated memory is still 305.1 MB. Free memory was 264.2 MB in the beginning and 254.2 MB in the end (delta: 10.0 MB). Peak memory consumption was 10.0 MB. Max. memory is 5.3 GB. [2018-01-24 15:27:52,958 INFO L168 Benchmark]: Boogie Preprocessor took 29.73 ms. Allocated memory is still 305.1 MB. Free memory was 254.2 MB in the beginning and 252.2 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-24 15:27:52,959 INFO L168 Benchmark]: RCFGBuilder took 237.06 ms. Allocated memory is still 305.1 MB. Free memory was 252.2 MB in the beginning and 233.6 MB in the end (delta: 18.6 MB). Peak memory consumption was 18.6 MB. Max. memory is 5.3 GB. [2018-01-24 15:27:52,959 INFO L168 Benchmark]: TraceAbstraction took 44185.42 ms. Allocated memory was 305.1 MB in the beginning and 1.0 GB in the end (delta: 701.0 MB). Free memory was 233.6 MB in the beginning and 331.9 MB in the end (delta: -98.3 MB). Peak memory consumption was 602.6 MB. Max. memory is 5.3 GB. [2018-01-24 15:27:52,961 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 305.1 MB. Free memory is still 270.2 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 190.62 ms. Allocated memory is still 305.1 MB. Free memory was 264.2 MB in the beginning and 254.2 MB in the end (delta: 10.0 MB). Peak memory consumption was 10.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 29.73 ms. Allocated memory is still 305.1 MB. Free memory was 254.2 MB in the beginning and 252.2 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 237.06 ms. Allocated memory is still 305.1 MB. Free memory was 252.2 MB in the beginning and 233.6 MB in the end (delta: 18.6 MB). Peak memory consumption was 18.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 44185.42 ms. Allocated memory was 305.1 MB in the beginning and 1.0 GB in the end (delta: 701.0 MB). Free memory was 233.6 MB in the beginning and 331.9 MB in the end (delta: -98.3 MB). Peak memory consumption was 602.6 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 18 LocStat_MAX_WEQGRAPH_SIZE : 8 LocStat_MAX_SIZEOF_WEQEDGELABEL : 2 LocStat_NO_SUPPORTING_EQUALITIES : 263 LocStat_NO_SUPPORTING_DISEQUALITIES : 38 LocStat_NO_DISJUNCTIONS : -36 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 25 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 65 TransStat_NO_SUPPORTING_DISEQUALITIES : 4 TransStat_NO_DISJUNCTIONS : 26 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 7.408575 RENAME_VARIABLES(MILLISECONDS) : 1.485744 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 3.590153 PROJECTAWAY(MILLISECONDS) : 0.156740 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.111898 DISJOIN(MILLISECONDS) : 0.539086 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 1.521770 ADD_EQUALITY(MILLISECONDS) : 0.047936 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.016049 #CONJOIN_DISJUNCTIVE : 48 #RENAME_VARIABLES : 88 #UNFREEZE : 0 #CONJOIN : 107 #PROJECTAWAY : 72 #ADD_WEAK_EQUALITY : 9 #DISJOIN : 9 #RENAME_VARIABLES_DISJUNCTIVE : 83 #ADD_EQUALITY : 67 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 22 LocStat_MAX_WEQGRAPH_SIZE : 8 LocStat_MAX_SIZEOF_WEQEDGELABEL : 2 LocStat_NO_SUPPORTING_EQUALITIES : 337 LocStat_NO_SUPPORTING_DISEQUALITIES : 50 LocStat_NO_DISJUNCTIONS : -44 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 29 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 67 TransStat_NO_SUPPORTING_DISEQUALITIES : 4 TransStat_NO_DISJUNCTIONS : 30 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 8.950808 RENAME_VARIABLES(MILLISECONDS) : 1.124929 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 4.822552 PROJECTAWAY(MILLISECONDS) : 0.141769 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.042774 DISJOIN(MILLISECONDS) : 0.526609 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 1.157332 ADD_EQUALITY(MILLISECONDS) : 0.021520 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.009847 #CONJOIN_DISJUNCTIVE : 69 #RENAME_VARIABLES : 130 #UNFREEZE : 0 #CONJOIN : 128 #PROJECTAWAY : 97 #ADD_WEAK_EQUALITY : 9 #DISJOIN : 13 #RENAME_VARIABLES_DISJUNCTIVE : 125 #ADD_EQUALITY : 69 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 29 LocStat_MAX_WEQGRAPH_SIZE : 8 LocStat_MAX_SIZEOF_WEQEDGELABEL : 2 LocStat_NO_SUPPORTING_EQUALITIES : 450 LocStat_NO_SUPPORTING_DISEQUALITIES : 72 LocStat_NO_DISJUNCTIONS : -58 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 37 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 86 TransStat_NO_SUPPORTING_DISEQUALITIES : 7 TransStat_NO_DISJUNCTIONS : 40 TransStat_MAX_NO_DISJUNCTIONS : 4 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 1.883632 RENAME_VARIABLES(MILLISECONDS) : 0.132540 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 1.835947 PROJECTAWAY(MILLISECONDS) : 0.067048 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.039058 DISJOIN(MILLISECONDS) : 0.357605 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.149398 ADD_EQUALITY(MILLISECONDS) : 0.023900 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.012387 #CONJOIN_DISJUNCTIVE : 139 #RENAME_VARIABLES : 301 #UNFREEZE : 0 #CONJOIN : 274 #PROJECTAWAY : 213 #ADD_WEAK_EQUALITY : 12 #DISJOIN : 28 #RENAME_VARIABLES_DISJUNCTIVE : 292 #ADD_EQUALITY : 81 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 4 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 625). Cancelled while BasicCegarLoop was constructing difference of abstraction (151states) and interpolant automaton (currently 2 states, 56 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 625). Cancelled while BasicCegarLoop was constructing difference of abstraction (151states) and interpolant automaton (currently 2 states, 56 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 627). Cancelled while BasicCegarLoop was constructing difference of abstraction (151states) and interpolant automaton (currently 2 states, 56 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 627). Cancelled while BasicCegarLoop was constructing difference of abstraction (151states) and interpolant automaton (currently 2 states, 56 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 637). Cancelled while BasicCegarLoop was constructing difference of abstraction (151states) and interpolant automaton (currently 2 states, 56 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 634). Cancelled while BasicCegarLoop was constructing difference of abstraction (151states) and interpolant automaton (currently 2 states, 56 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 639). Cancelled while BasicCegarLoop was constructing difference of abstraction (151states) and interpolant automaton (currently 2 states, 56 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 634). Cancelled while BasicCegarLoop was constructing difference of abstraction (151states) and interpolant automaton (currently 2 states, 56 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 636). Cancelled while BasicCegarLoop was constructing difference of abstraction (151states) and interpolant automaton (currently 2 states, 56 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 637). Cancelled while BasicCegarLoop was constructing difference of abstraction (151states) and interpolant automaton (currently 2 states, 56 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 639). Cancelled while BasicCegarLoop was constructing difference of abstraction (151states) and interpolant automaton (currently 2 states, 56 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 639). Cancelled while BasicCegarLoop was constructing difference of abstraction (151states) and interpolant automaton (currently 2 states, 56 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 639). Cancelled while BasicCegarLoop was constructing difference of abstraction (151states) and interpolant automaton (currently 2 states, 56 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 636). Cancelled while BasicCegarLoop was constructing difference of abstraction (151states) and interpolant automaton (currently 2 states, 56 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 637). Cancelled while BasicCegarLoop was constructing difference of abstraction (151states) and interpolant automaton (currently 2 states, 56 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 637). Cancelled while BasicCegarLoop was constructing difference of abstraction (151states) and interpolant automaton (currently 2 states, 56 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 629]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 629). Cancelled while BasicCegarLoop was constructing difference of abstraction (151states) and interpolant automaton (currently 2 states, 56 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 53 locations, 17 error locations. TIMEOUT Result, 44.1s OverallTime, 20 OverallIterations, 16 TraceHistogramMax, 4.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 549 SDtfs, 2878 SDslu, 3536 SDs, 0 SdLazy, 2853 SolverSat, 630 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 5237 GetRequests, 4536 SyntacticMatches, 59 SemanticMatches, 642 ConstructedPredicates, 0 IntricatePredicates, 3 DeprecatedPredicates, 14406 ImplicationChecksByTransitivity, 14.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=151occurred in iteration=19, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 8.4s AbstIntTime, 3 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 19 MinimizatonAttempts, 93 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 11.1s SatisfiabilityAnalysisTime, 18.2s InterpolantComputationTime, 3803 NumberOfCodeBlocks, 3707 NumberOfCodeBlocksAsserted, 143 NumberOfCheckSat, 6179 ConstructedInterpolants, 660 QuantifiedInterpolants, 4201935 SizeOfPredicates, 112 NumberOfNonLiveVariables, 7725 ConjunctsInSsa, 470 ConjunctsInUnsatCore, 78 InterpolantComputations, 7 PerfectInterpolantSequences, 11842/24408 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_false-valid-free.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_15-27-52-972.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_false-valid-free.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-24_15-27-52-972.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_false-valid-free.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-24_15-27-52-972.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_false-valid-free.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-1-2018-01-24_15-27-52-972.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_false-valid-free.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-1-2018-01-24_15-27-52-972.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_false-valid-free.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-2-2018-01-24_15-27-52-972.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_false-valid-free.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-2-2018-01-24_15-27-52-972.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_false-valid-free.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-24_15-27-52-972.csv Completed graceful shutdown