java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_2_false-valid-memtrack_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 15:57:41,993 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 15:57:41,995 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 15:57:42,010 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 15:57:42,011 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 15:57:42,012 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 15:57:42,013 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 15:57:42,015 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 15:57:42,017 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 15:57:42,018 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 15:57:42,019 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... 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[2018-01-24 15:57:42,040 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 15:57:42,041 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 15:57:42,041 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf [2018-01-24 15:57:42,049 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 15:57:42,050 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 15:57:42,050 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 15:57:42,050 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 15:57:42,051 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 15:57:42,051 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 15:57:42,051 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 15:57:42,051 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 15:57:42,052 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 15:57:42,052 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 15:57:42,052 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 15:57:42,052 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 15:57:42,052 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 15:57:42,052 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 15:57:42,053 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 15:57:42,053 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 15:57:42,053 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 15:57:42,053 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 15:57:42,053 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 15:57:42,053 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 15:57:42,053 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 15:57:42,054 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 15:57:42,054 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 15:57:42,054 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 15:57:42,054 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 15:57:42,054 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 15:57:42,055 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 15:57:42,055 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 15:57:42,055 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-24 15:57:42,055 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 15:57:42,055 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 15:57:42,055 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 15:57:42,055 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-24 15:57:42,056 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 15:57:42,056 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 15:57:42,090 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 15:57:42,100 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 15:57:42,104 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 15:57:42,105 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 15:57:42,105 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 15:57:42,106 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_2_false-valid-memtrack_true-termination.i [2018-01-24 15:57:42,270 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 15:57:42,277 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 15:57:42,278 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 15:57:42,278 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 15:57:42,284 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 15:57:42,285 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 03:57:42" (1/1) ... [2018-01-24 15:57:42,288 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5c336041 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:57:42, skipping insertion in model container [2018-01-24 15:57:42,288 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 03:57:42" (1/1) ... [2018-01-24 15:57:42,306 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 15:57:42,354 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 15:57:42,459 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 15:57:42,483 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 15:57:42,493 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:57:42 WrapperNode [2018-01-24 15:57:42,494 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 15:57:42,494 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 15:57:42,495 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 15:57:42,495 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 15:57:42,507 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:57:42" (1/1) ... [2018-01-24 15:57:42,507 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:57:42" (1/1) ... [2018-01-24 15:57:42,516 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:57:42" (1/1) ... [2018-01-24 15:57:42,516 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:57:42" (1/1) ... [2018-01-24 15:57:42,523 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:57:42" (1/1) ... [2018-01-24 15:57:42,526 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:57:42" (1/1) ... [2018-01-24 15:57:42,528 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:57:42" (1/1) ... [2018-01-24 15:57:42,530 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 15:57:42,531 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 15:57:42,531 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 15:57:42,531 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 15:57:42,532 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:57:42" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 15:57:42,583 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 15:57:42,583 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 15:57:42,583 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 15:57:42,583 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-24 15:57:42,583 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-24 15:57:42,583 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-24 15:57:42,583 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-24 15:57:42,584 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-24 15:57:42,584 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 15:57:42,584 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 15:57:42,584 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 15:57:42,584 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 15:57:42,584 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 15:57:42,584 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 15:57:42,584 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 15:57:42,584 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 15:57:42,584 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 15:57:42,585 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-24 15:57:42,585 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-24 15:57:42,585 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 15:57:42,585 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 15:57:42,585 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-24 15:57:42,585 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 15:57:42,586 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-24 15:57:42,586 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-24 15:57:42,586 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-24 15:57:42,586 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-24 15:57:42,586 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-24 15:57:42,587 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 15:57:42,587 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 15:57:42,587 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 15:57:42,587 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 15:57:42,705 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-24 15:57:42,797 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 15:57:42,797 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 03:57:42 BoogieIcfgContainer [2018-01-24 15:57:42,798 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 15:57:42,798 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 15:57:42,799 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 15:57:42,800 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 15:57:42,801 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 03:57:42" (1/3) ... [2018-01-24 15:57:42,801 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2a420064 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 03:57:42, skipping insertion in model container [2018-01-24 15:57:42,801 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:57:42" (2/3) ... [2018-01-24 15:57:42,802 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2a420064 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 03:57:42, skipping insertion in model container [2018-01-24 15:57:42,802 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 03:57:42" (3/3) ... [2018-01-24 15:57:42,804 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test22_2_false-valid-memtrack_true-termination.i [2018-01-24 15:57:42,812 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 15:57:42,817 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 9 error locations. [2018-01-24 15:57:42,858 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 15:57:42,858 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 15:57:42,858 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 15:57:42,858 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 15:57:42,859 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 15:57:42,859 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 15:57:42,859 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 15:57:42,859 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 15:57:42,859 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 15:57:42,876 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states. [2018-01-24 15:57:42,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 15:57:42,881 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:57:42,882 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:57:42,882 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:57:42,886 INFO L82 PathProgramCache]: Analyzing trace with hash 13572496, now seen corresponding path program 1 times [2018-01-24 15:57:42,888 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:57:42,931 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:42,931 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:57:42,931 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:42,932 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:57:42,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:57:42,986 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:57:43,131 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:43,133 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:57:43,134 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 15:57:43,134 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:57:43,136 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 15:57:43,230 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 15:57:43,231 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 15:57:43,234 INFO L87 Difference]: Start difference. First operand 65 states. Second operand 5 states. [2018-01-24 15:57:43,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:57:43,293 INFO L93 Difference]: Finished difference Result 118 states and 125 transitions. [2018-01-24 15:57:43,294 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 15:57:43,295 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 15:57:43,295 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:57:43,305 INFO L225 Difference]: With dead ends: 118 [2018-01-24 15:57:43,305 INFO L226 Difference]: Without dead ends: 68 [2018-01-24 15:57:43,308 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 15:57:43,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2018-01-24 15:57:43,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 66. [2018-01-24 15:57:43,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-01-24 15:57:43,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 70 transitions. [2018-01-24 15:57:43,347 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 70 transitions. Word has length 17 [2018-01-24 15:57:43,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:57:43,348 INFO L432 AbstractCegarLoop]: Abstraction has 66 states and 70 transitions. [2018-01-24 15:57:43,348 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 15:57:43,348 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 70 transitions. [2018-01-24 15:57:43,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 15:57:43,349 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:57:43,349 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:57:43,349 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:57:43,349 INFO L82 PathProgramCache]: Analyzing trace with hash 64872882, now seen corresponding path program 1 times [2018-01-24 15:57:43,350 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:57:43,351 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:43,352 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:57:43,352 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:43,352 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:57:43,372 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:57:43,373 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:57:43,440 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:43,441 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:57:43,441 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 15:57:43,441 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:57:43,443 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 15:57:43,443 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 15:57:43,443 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 15:57:43,444 INFO L87 Difference]: Start difference. First operand 66 states and 70 transitions. Second operand 6 states. [2018-01-24 15:57:43,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:57:43,591 INFO L93 Difference]: Finished difference Result 68 states and 72 transitions. [2018-01-24 15:57:43,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 15:57:43,592 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-24 15:57:43,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:57:43,593 INFO L225 Difference]: With dead ends: 68 [2018-01-24 15:57:43,593 INFO L226 Difference]: Without dead ends: 67 [2018-01-24 15:57:43,594 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 15:57:43,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-01-24 15:57:43,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 65. [2018-01-24 15:57:43,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2018-01-24 15:57:43,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 69 transitions. [2018-01-24 15:57:43,604 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 69 transitions. Word has length 19 [2018-01-24 15:57:43,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:57:43,605 INFO L432 AbstractCegarLoop]: Abstraction has 65 states and 69 transitions. [2018-01-24 15:57:43,605 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 15:57:43,605 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 69 transitions. [2018-01-24 15:57:43,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 15:57:43,606 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:57:43,606 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:57:43,606 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:57:43,607 INFO L82 PathProgramCache]: Analyzing trace with hash 64872883, now seen corresponding path program 1 times [2018-01-24 15:57:43,607 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:57:43,608 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:43,609 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:57:43,609 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:43,609 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:57:43,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:57:43,631 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:57:43,881 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:43,882 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:57:43,882 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 15:57:43,882 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:57:43,882 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 15:57:43,883 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 15:57:43,883 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 15:57:43,884 INFO L87 Difference]: Start difference. First operand 65 states and 69 transitions. Second operand 7 states. [2018-01-24 15:57:44,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:57:44,122 INFO L93 Difference]: Finished difference Result 67 states and 71 transitions. [2018-01-24 15:57:44,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 15:57:44,122 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-24 15:57:44,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:57:44,123 INFO L225 Difference]: With dead ends: 67 [2018-01-24 15:57:44,123 INFO L226 Difference]: Without dead ends: 66 [2018-01-24 15:57:44,124 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-01-24 15:57:44,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-01-24 15:57:44,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 64. [2018-01-24 15:57:44,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-01-24 15:57:44,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 68 transitions. [2018-01-24 15:57:44,130 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 68 transitions. Word has length 19 [2018-01-24 15:57:44,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:57:44,130 INFO L432 AbstractCegarLoop]: Abstraction has 64 states and 68 transitions. [2018-01-24 15:57:44,131 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 15:57:44,131 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 68 transitions. [2018-01-24 15:57:44,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-24 15:57:44,131 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:57:44,131 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:57:44,132 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:57:44,132 INFO L82 PathProgramCache]: Analyzing trace with hash -1610907055, now seen corresponding path program 1 times [2018-01-24 15:57:44,132 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:57:44,133 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:44,134 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:57:44,134 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:44,134 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:57:44,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:57:44,147 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:57:44,182 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:44,182 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:57:44,182 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 15:57:44,182 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:57:44,183 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 15:57:44,183 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 15:57:44,183 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 15:57:44,183 INFO L87 Difference]: Start difference. First operand 64 states and 68 transitions. Second operand 3 states. [2018-01-24 15:57:44,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:57:44,240 INFO L93 Difference]: Finished difference Result 71 states and 74 transitions. [2018-01-24 15:57:44,240 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 15:57:44,241 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 22 [2018-01-24 15:57:44,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:57:44,242 INFO L225 Difference]: With dead ends: 71 [2018-01-24 15:57:44,242 INFO L226 Difference]: Without dead ends: 60 [2018-01-24 15:57:44,243 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 15:57:44,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-01-24 15:57:44,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2018-01-24 15:57:44,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-24 15:57:44,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 63 transitions. [2018-01-24 15:57:44,251 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 63 transitions. Word has length 22 [2018-01-24 15:57:44,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:57:44,252 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 63 transitions. [2018-01-24 15:57:44,252 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 15:57:44,252 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 63 transitions. [2018-01-24 15:57:44,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-24 15:57:44,253 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:57:44,253 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:57:44,253 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:57:44,254 INFO L82 PathProgramCache]: Analyzing trace with hash -655458449, now seen corresponding path program 1 times [2018-01-24 15:57:44,254 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:57:44,255 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:44,255 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:57:44,256 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:44,256 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:57:44,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:57:44,269 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:57:44,320 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:44,343 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:57:44,343 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 15:57:44,343 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:57:44,343 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 15:57:44,343 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 15:57:44,344 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 15:57:44,344 INFO L87 Difference]: Start difference. First operand 60 states and 63 transitions. Second operand 6 states. [2018-01-24 15:57:44,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:57:44,370 INFO L93 Difference]: Finished difference Result 67 states and 69 transitions. [2018-01-24 15:57:44,377 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 15:57:44,377 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2018-01-24 15:57:44,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:57:44,378 INFO L225 Difference]: With dead ends: 67 [2018-01-24 15:57:44,378 INFO L226 Difference]: Without dead ends: 60 [2018-01-24 15:57:44,379 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 15:57:44,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-01-24 15:57:44,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2018-01-24 15:57:44,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-24 15:57:44,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 62 transitions. [2018-01-24 15:57:44,386 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 62 transitions. Word has length 24 [2018-01-24 15:57:44,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:57:44,387 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 62 transitions. [2018-01-24 15:57:44,387 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 15:57:44,387 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 62 transitions. [2018-01-24 15:57:44,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 15:57:44,388 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:57:44,388 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:57:44,389 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:57:44,389 INFO L82 PathProgramCache]: Analyzing trace with hash -1673666846, now seen corresponding path program 1 times [2018-01-24 15:57:44,389 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:57:44,390 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:44,391 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:57:44,391 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:44,391 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:57:44,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:57:44,411 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:57:44,501 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:44,501 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:57:44,501 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 15:57:44,502 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:57:44,502 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 15:57:44,502 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 15:57:44,502 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 15:57:44,503 INFO L87 Difference]: Start difference. First operand 60 states and 62 transitions. Second operand 10 states. [2018-01-24 15:57:44,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:57:44,769 INFO L93 Difference]: Finished difference Result 60 states and 62 transitions. [2018-01-24 15:57:44,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 15:57:44,770 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-01-24 15:57:44,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:57:44,771 INFO L225 Difference]: With dead ends: 60 [2018-01-24 15:57:44,771 INFO L226 Difference]: Without dead ends: 59 [2018-01-24 15:57:44,771 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 15:57:44,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-01-24 15:57:44,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-01-24 15:57:44,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-01-24 15:57:44,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 61 transitions. [2018-01-24 15:57:44,778 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 61 transitions. Word has length 34 [2018-01-24 15:57:44,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:57:44,778 INFO L432 AbstractCegarLoop]: Abstraction has 59 states and 61 transitions. [2018-01-24 15:57:44,778 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 15:57:44,778 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 61 transitions. [2018-01-24 15:57:44,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 15:57:44,779 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:57:44,780 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:57:44,780 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:57:44,781 INFO L82 PathProgramCache]: Analyzing trace with hash -1673666845, now seen corresponding path program 1 times [2018-01-24 15:57:44,781 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:57:44,782 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:44,782 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:57:44,782 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:44,783 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:57:44,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:57:44,800 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:57:44,843 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:44,844 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:57:44,844 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 15:57:44,844 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:57:44,845 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 15:57:44,845 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 15:57:44,845 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 15:57:44,845 INFO L87 Difference]: Start difference. First operand 59 states and 61 transitions. Second operand 4 states. [2018-01-24 15:57:44,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:57:44,875 INFO L93 Difference]: Finished difference Result 97 states and 101 transitions. [2018-01-24 15:57:44,875 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 15:57:44,876 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-01-24 15:57:44,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:57:44,877 INFO L225 Difference]: With dead ends: 97 [2018-01-24 15:57:44,877 INFO L226 Difference]: Without dead ends: 60 [2018-01-24 15:57:44,878 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 15:57:44,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-01-24 15:57:44,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2018-01-24 15:57:44,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-24 15:57:44,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 62 transitions. [2018-01-24 15:57:44,886 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 62 transitions. Word has length 34 [2018-01-24 15:57:44,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:57:44,886 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 62 transitions. [2018-01-24 15:57:44,886 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 15:57:44,886 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 62 transitions. [2018-01-24 15:57:44,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 15:57:44,888 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:57:44,888 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:57:44,888 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:57:44,888 INFO L82 PathProgramCache]: Analyzing trace with hash -1908152085, now seen corresponding path program 1 times [2018-01-24 15:57:44,888 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:57:44,889 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:44,889 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:57:44,890 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:44,890 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:57:44,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:57:44,907 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:57:44,964 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:44,964 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:57:44,964 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:57:44,965 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 36 with the following transitions: [2018-01-24 15:57:44,968 INFO L201 CegarAbsIntRunner]: [0], [3], [5], [7], [11], [15], [19], [20], [24], [26], [27], [39], [42], [43], [44], [46], [47], [52], [55], [56], [60], [64], [68], [72], [73], [74], [75], [76], [78], [80], [82], [83], [84], [86], [88] [2018-01-24 15:57:45,017 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:57:45,017 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:57:47,844 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:57:47,845 INFO L268 AbstractInterpreter]: Visited 35 different actions 43 times. Merged at 3 different actions 6 times. Never widened. Found 3 fixpoints after 2 different actions. Largest state had 21 variables. [2018-01-24 15:57:47,858 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:57:47,858 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:57:47,858 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:57:47,876 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:57:47,877 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:57:47,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:57:47,916 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:57:47,992 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:47,993 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:57:48,195 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:48,221 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:57:48,221 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:57:48,238 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:57:48,239 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:57:48,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:57:48,295 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:57:48,302 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:48,302 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:57:48,425 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:48,426 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:57:48,427 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-24 15:57:48,427 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:57:48,427 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 15:57:48,428 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 15:57:48,428 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-24 15:57:48,428 INFO L87 Difference]: Start difference. First operand 60 states and 62 transitions. Second operand 6 states. [2018-01-24 15:57:48,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:57:48,508 INFO L93 Difference]: Finished difference Result 98 states and 102 transitions. [2018-01-24 15:57:48,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 15:57:48,509 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-24 15:57:48,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:57:48,511 INFO L225 Difference]: With dead ends: 98 [2018-01-24 15:57:48,511 INFO L226 Difference]: Without dead ends: 61 [2018-01-24 15:57:48,511 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-24 15:57:48,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-01-24 15:57:48,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2018-01-24 15:57:48,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-01-24 15:57:48,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 63 transitions. [2018-01-24 15:57:48,519 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 63 transitions. Word has length 35 [2018-01-24 15:57:48,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:57:48,520 INFO L432 AbstractCegarLoop]: Abstraction has 61 states and 63 transitions. [2018-01-24 15:57:48,520 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 15:57:48,520 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 63 transitions. [2018-01-24 15:57:48,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 15:57:48,521 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:57:48,521 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:57:48,521 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:57:48,522 INFO L82 PathProgramCache]: Analyzing trace with hash -587259933, now seen corresponding path program 2 times [2018-01-24 15:57:48,522 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:57:48,523 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:48,524 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:57:48,524 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:48,524 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:57:48,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:57:48,545 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:57:48,601 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:48,601 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:57:48,602 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:57:48,602 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:57:48,602 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:57:48,602 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:57:48,602 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:57:48,616 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:57:48,616 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:57:48,649 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:57:48,653 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:57:48,660 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:57:48,690 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 15:57:48,692 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:57:48,735 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 15:57:48,736 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:57:48,774 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 15:57:48,775 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 15:57:49,575 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 15:57:49,609 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:57:52,107 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 15:57:52,128 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 15:57:52,128 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14, 13] imperfect sequences [6] total 31 [2018-01-24 15:57:52,128 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:57:52,129 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 15:57:52,129 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 15:57:52,129 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=839, Unknown=1, NotChecked=0, Total=930 [2018-01-24 15:57:52,130 INFO L87 Difference]: Start difference. First operand 61 states and 63 transitions. Second operand 15 states. [2018-01-24 15:57:52,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:57:52,729 INFO L93 Difference]: Finished difference Result 61 states and 63 transitions. [2018-01-24 15:57:52,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 15:57:52,729 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 36 [2018-01-24 15:57:52,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:57:52,730 INFO L225 Difference]: With dead ends: 61 [2018-01-24 15:57:52,730 INFO L226 Difference]: Without dead ends: 60 [2018-01-24 15:57:52,730 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 244 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=118, Invalid=1071, Unknown=1, NotChecked=0, Total=1190 [2018-01-24 15:57:52,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-01-24 15:57:52,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2018-01-24 15:57:52,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-24 15:57:52,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 62 transitions. [2018-01-24 15:57:52,739 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 62 transitions. Word has length 36 [2018-01-24 15:57:52,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:57:52,739 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 62 transitions. [2018-01-24 15:57:52,739 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 15:57:52,740 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 62 transitions. [2018-01-24 15:57:52,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 15:57:52,741 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:57:52,741 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:57:52,741 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:57:52,742 INFO L82 PathProgramCache]: Analyzing trace with hash -789525114, now seen corresponding path program 1 times [2018-01-24 15:57:52,742 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:57:52,743 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:52,743 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:57:52,743 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:52,743 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:57:52,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:57:52,760 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:57:52,857 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 15:57:52,858 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:57:52,858 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 15:57:52,858 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:57:52,859 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 15:57:52,859 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 15:57:52,859 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 15:57:52,859 INFO L87 Difference]: Start difference. First operand 60 states and 62 transitions. Second operand 10 states. [2018-01-24 15:57:53,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:57:53,101 INFO L93 Difference]: Finished difference Result 60 states and 62 transitions. [2018-01-24 15:57:53,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 15:57:53,102 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 41 [2018-01-24 15:57:53,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:57:53,102 INFO L225 Difference]: With dead ends: 60 [2018-01-24 15:57:53,102 INFO L226 Difference]: Without dead ends: 58 [2018-01-24 15:57:53,103 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 15:57:53,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-01-24 15:57:53,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2018-01-24 15:57:53,109 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-01-24 15:57:53,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 60 transitions. [2018-01-24 15:57:53,110 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 60 transitions. Word has length 41 [2018-01-24 15:57:53,110 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:57:53,110 INFO L432 AbstractCegarLoop]: Abstraction has 58 states and 60 transitions. [2018-01-24 15:57:53,110 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 15:57:53,110 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 60 transitions. [2018-01-24 15:57:53,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 15:57:53,111 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:57:53,111 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:57:53,111 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:57:53,111 INFO L82 PathProgramCache]: Analyzing trace with hash -789525113, now seen corresponding path program 1 times [2018-01-24 15:57:53,112 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:57:53,112 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:53,113 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:57:53,113 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:53,113 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:57:53,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:57:53,130 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:57:53,185 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:53,185 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:57:53,185 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:57:53,185 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 42 with the following transitions: [2018-01-24 15:57:53,186 INFO L201 CegarAbsIntRunner]: [0], [1], [4], [5], [7], [11], [15], [19], [20], [24], [26], [27], [31], [34], [39], [42], [43], [44], [46], [47], [52], [55], [56], [60], [64], [68], [72], [73], [74], [75], [76], [78], [80], [82], [83], [84], [86], [88], [89], [90] [2018-01-24 15:57:53,188 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:57:53,188 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:57:56,417 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:57:56,418 INFO L268 AbstractInterpreter]: Visited 40 different actions 48 times. Merged at 3 different actions 6 times. Never widened. Found 3 fixpoints after 2 different actions. Largest state had 21 variables. [2018-01-24 15:57:56,420 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:57:56,420 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:57:56,420 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:57:56,425 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:57:56,425 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:57:56,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:57:56,449 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:57:56,489 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:56,490 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:57:56,605 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:56,626 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:57:56,626 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:57:56,629 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:57:56,629 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:57:56,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:57:56,683 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:57:56,688 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:56,689 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:57:56,714 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:56,716 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:57:56,716 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-24 15:57:56,716 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:57:56,716 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 15:57:56,716 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 15:57:56,717 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-24 15:57:56,717 INFO L87 Difference]: Start difference. First operand 58 states and 60 transitions. Second operand 7 states. [2018-01-24 15:57:56,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:57:56,737 INFO L93 Difference]: Finished difference Result 93 states and 97 transitions. [2018-01-24 15:57:56,738 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 15:57:56,738 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 41 [2018-01-24 15:57:56,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:57:56,738 INFO L225 Difference]: With dead ends: 93 [2018-01-24 15:57:56,738 INFO L226 Difference]: Without dead ends: 59 [2018-01-24 15:57:56,739 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-24 15:57:56,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-01-24 15:57:56,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-01-24 15:57:56,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-01-24 15:57:56,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 61 transitions. [2018-01-24 15:57:56,748 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 61 transitions. Word has length 41 [2018-01-24 15:57:56,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:57:56,748 INFO L432 AbstractCegarLoop]: Abstraction has 59 states and 61 transitions. [2018-01-24 15:57:56,748 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 15:57:56,748 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 61 transitions. [2018-01-24 15:57:56,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 15:57:56,749 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:57:56,749 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:57:56,749 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:57:56,749 INFO L82 PathProgramCache]: Analyzing trace with hash -1225463169, now seen corresponding path program 2 times [2018-01-24 15:57:56,749 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:57:56,750 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:56,750 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:57:56,750 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:57:56,751 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:57:56,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:57:56,768 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:57:56,815 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:57:56,815 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:57:56,815 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:57:56,815 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:57:56,815 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:57:56,815 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:57:56,816 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:57:56,825 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:57:56,825 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:57:56,844 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:57:56,847 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:57:56,851 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:57:56,872 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 15:57:56,872 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:57:56,898 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 15:57:56,899 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:57:56,910 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 15:57:56,910 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 15:57:59,119 WARN L143 SmtUtils]: Spent 2033ms on a formula simplification that was a NOOP. DAG size: 27 [2018-01-24 15:57:59,390 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 15:57:59,390 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:57:59,801 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 15:57:59,821 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 15:57:59,821 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15, 13] imperfect sequences [7] total 33 [2018-01-24 15:57:59,821 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:57:59,821 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 15:57:59,822 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 15:57:59,822 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=951, Unknown=0, NotChecked=0, Total=1056 [2018-01-24 15:57:59,822 INFO L87 Difference]: Start difference. First operand 59 states and 61 transitions. Second operand 16 states. [2018-01-24 15:58:00,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:58:00,296 INFO L93 Difference]: Finished difference Result 59 states and 61 transitions. [2018-01-24 15:58:00,296 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 15:58:00,297 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 42 [2018-01-24 15:58:00,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:58:00,298 INFO L225 Difference]: With dead ends: 59 [2018-01-24 15:58:00,298 INFO L226 Difference]: Without dead ends: 57 [2018-01-24 15:58:00,298 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 57 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 317 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=136, Invalid=1196, Unknown=0, NotChecked=0, Total=1332 [2018-01-24 15:58:00,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-24 15:58:00,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-24 15:58:00,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-24 15:58:00,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 59 transitions. [2018-01-24 15:58:00,308 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 59 transitions. Word has length 42 [2018-01-24 15:58:00,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:58:00,308 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 59 transitions. [2018-01-24 15:58:00,308 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 15:58:00,309 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 59 transitions. [2018-01-24 15:58:00,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 15:58:00,309 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:58:00,309 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:58:00,309 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:58:00,310 INFO L82 PathProgramCache]: Analyzing trace with hash 1869907629, now seen corresponding path program 1 times [2018-01-24 15:58:00,310 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:58:00,311 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:00,311 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:58:00,311 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:00,311 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:58:00,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:58:00,321 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:58:00,429 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 15:58:00,430 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:58:00,430 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 15:58:00,430 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:58:00,430 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 15:58:00,430 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 15:58:00,430 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-24 15:58:00,431 INFO L87 Difference]: Start difference. First operand 57 states and 59 transitions. Second operand 8 states. [2018-01-24 15:58:00,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:58:00,472 INFO L93 Difference]: Finished difference Result 67 states and 68 transitions. [2018-01-24 15:58:00,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 15:58:00,472 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 40 [2018-01-24 15:58:00,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:58:00,473 INFO L225 Difference]: With dead ends: 67 [2018-01-24 15:58:00,473 INFO L226 Difference]: Without dead ends: 57 [2018-01-24 15:58:00,473 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-24 15:58:00,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-24 15:58:00,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-24 15:58:00,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-24 15:58:00,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 58 transitions. [2018-01-24 15:58:00,482 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 58 transitions. Word has length 40 [2018-01-24 15:58:00,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:58:00,483 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 58 transitions. [2018-01-24 15:58:00,483 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 15:58:00,483 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 58 transitions. [2018-01-24 15:58:00,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-24 15:58:00,483 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:58:00,483 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:58:00,484 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:58:00,484 INFO L82 PathProgramCache]: Analyzing trace with hash 946199638, now seen corresponding path program 1 times [2018-01-24 15:58:00,484 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:58:00,485 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:00,485 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:58:00,485 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:00,485 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:58:00,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:58:00,495 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:58:00,586 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 15:58:00,586 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:58:00,586 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-24 15:58:00,586 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:58:00,587 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 15:58:00,587 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 15:58:00,587 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 15:58:00,587 INFO L87 Difference]: Start difference. First operand 57 states and 58 transitions. Second operand 10 states. [2018-01-24 15:58:00,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:58:00,661 INFO L93 Difference]: Finished difference Result 69 states and 69 transitions. [2018-01-24 15:58:00,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 15:58:00,662 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 45 [2018-01-24 15:58:00,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:58:00,662 INFO L225 Difference]: With dead ends: 69 [2018-01-24 15:58:00,662 INFO L226 Difference]: Without dead ends: 57 [2018-01-24 15:58:00,663 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 15:58:00,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-24 15:58:00,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-24 15:58:00,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-24 15:58:00,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-01-24 15:58:00,672 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 45 [2018-01-24 15:58:00,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:58:00,672 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-01-24 15:58:00,673 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 15:58:00,673 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-01-24 15:58:00,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-24 15:58:00,674 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:58:00,674 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:58:00,674 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:58:00,674 INFO L82 PathProgramCache]: Analyzing trace with hash -1294061430, now seen corresponding path program 1 times [2018-01-24 15:58:00,674 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:58:00,675 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:00,676 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:58:00,676 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:00,676 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:58:00,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:58:00,695 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:58:00,749 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:00,749 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:00,749 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:58:00,749 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 57 with the following transitions: [2018-01-24 15:58:00,749 INFO L201 CegarAbsIntRunner]: [0], [1], [4], [5], [7], [11], [15], [17], [18], [19], [20], [24], [26], [27], [30], [31], [32], [35], [38], [39], [42], [43], [44], [46], [47], [52], [54], [55], [56], [60], [62], [63], [64], [68], [71], [72], [73], [74], [75], [76], [77], [78], [79], [80], [81], [82], [83], [84], [86], [87], [88], [89], [90], [91] [2018-01-24 15:58:00,752 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:58:00,752 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:58:03,663 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:58:03,663 INFO L268 AbstractInterpreter]: Visited 54 different actions 62 times. Merged at 3 different actions 6 times. Never widened. Found 3 fixpoints after 2 different actions. Largest state had 22 variables. [2018-01-24 15:58:03,669 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:58:03,669 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:03,669 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:58:03,676 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:58:03,676 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:58:03,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:58:03,705 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:58:03,715 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:03,715 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:58:03,830 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:03,851 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:03,851 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:58:03,855 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:58:03,855 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:58:03,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:58:03,909 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:58:03,915 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:03,915 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:58:03,998 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:04,000 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:58:04,000 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-24 15:58:04,000 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:58:04,000 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 15:58:04,001 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 15:58:04,001 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-24 15:58:04,001 INFO L87 Difference]: Start difference. First operand 57 states and 57 transitions. Second operand 8 states. [2018-01-24 15:58:04,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:58:04,041 INFO L93 Difference]: Finished difference Result 90 states and 90 transitions. [2018-01-24 15:58:04,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 15:58:04,042 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 56 [2018-01-24 15:58:04,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:58:04,043 INFO L225 Difference]: With dead ends: 90 [2018-01-24 15:58:04,043 INFO L226 Difference]: Without dead ends: 58 [2018-01-24 15:58:04,043 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 230 GetRequests, 216 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-24 15:58:04,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-01-24 15:58:04,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2018-01-24 15:58:04,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-01-24 15:58:04,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 58 transitions. [2018-01-24 15:58:04,055 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 58 transitions. Word has length 56 [2018-01-24 15:58:04,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:58:04,055 INFO L432 AbstractCegarLoop]: Abstraction has 58 states and 58 transitions. [2018-01-24 15:58:04,055 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 15:58:04,056 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2018-01-24 15:58:04,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-01-24 15:58:04,056 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:58:04,056 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:58:04,057 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:58:04,057 INFO L82 PathProgramCache]: Analyzing trace with hash -34765678, now seen corresponding path program 2 times [2018-01-24 15:58:04,057 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:58:04,058 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:04,058 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:58:04,058 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:04,058 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:58:04,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:58:04,077 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:58:04,144 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:04,144 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:04,144 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:58:04,144 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:58:04,144 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:58:04,144 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:04,145 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:58:04,157 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:58:04,157 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:58:04,188 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:58:04,200 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:58:04,202 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:58:04,205 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:58:04,234 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:04,234 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:58:04,411 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:04,432 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:04,432 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:58:04,435 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:58:04,435 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:58:04,465 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:58:04,494 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:58:04,510 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:58:04,515 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:58:04,521 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:04,522 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:58:04,606 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:04,608 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:58:04,608 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-24 15:58:04,608 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:58:04,609 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 15:58:04,609 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 15:58:04,609 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-24 15:58:04,609 INFO L87 Difference]: Start difference. First operand 58 states and 58 transitions. Second operand 9 states. [2018-01-24 15:58:04,633 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:58:04,633 INFO L93 Difference]: Finished difference Result 91 states and 91 transitions. [2018-01-24 15:58:04,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 15:58:04,634 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 57 [2018-01-24 15:58:04,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:58:04,634 INFO L225 Difference]: With dead ends: 91 [2018-01-24 15:58:04,635 INFO L226 Difference]: Without dead ends: 59 [2018-01-24 15:58:04,635 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 235 GetRequests, 219 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-24 15:58:04,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-01-24 15:58:04,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-01-24 15:58:04,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-01-24 15:58:04,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 59 transitions. [2018-01-24 15:58:04,642 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 59 transitions. Word has length 57 [2018-01-24 15:58:04,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:58:04,642 INFO L432 AbstractCegarLoop]: Abstraction has 59 states and 59 transitions. [2018-01-24 15:58:04,642 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 15:58:04,643 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 59 transitions. [2018-01-24 15:58:04,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-01-24 15:58:04,643 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:58:04,643 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:58:04,643 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:58:04,643 INFO L82 PathProgramCache]: Analyzing trace with hash 348696970, now seen corresponding path program 3 times [2018-01-24 15:58:04,643 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:58:04,644 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:04,644 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:58:04,644 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:04,644 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:58:04,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:58:04,662 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:58:04,773 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:04,773 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:04,773 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:58:04,773 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:58:04,773 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:58:04,773 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:04,774 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:58:04,787 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:58:04,787 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:58:04,817 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:58:04,828 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:58:04,860 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:58:05,113 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:58:05,115 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:58:05,119 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:58:05,130 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:05,131 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:58:05,440 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:05,462 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:05,465 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:58:05,469 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:58:05,469 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:58:05,506 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:58:05,534 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:58:05,647 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:58:05,921 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:58:05,943 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:58:05,949 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:58:05,954 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:05,954 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:58:06,063 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:06,065 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:58:06,065 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-24 15:58:06,065 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:58:06,065 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 15:58:06,065 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 15:58:06,066 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-24 15:58:06,066 INFO L87 Difference]: Start difference. First operand 59 states and 59 transitions. Second operand 10 states. [2018-01-24 15:58:06,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:58:06,090 INFO L93 Difference]: Finished difference Result 92 states and 92 transitions. [2018-01-24 15:58:06,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 15:58:06,090 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 58 [2018-01-24 15:58:06,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:58:06,091 INFO L225 Difference]: With dead ends: 92 [2018-01-24 15:58:06,091 INFO L226 Difference]: Without dead ends: 60 [2018-01-24 15:58:06,091 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 240 GetRequests, 222 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-24 15:58:06,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-01-24 15:58:06,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2018-01-24 15:58:06,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-24 15:58:06,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 60 transitions. [2018-01-24 15:58:06,102 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 60 transitions. Word has length 58 [2018-01-24 15:58:06,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:58:06,102 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 60 transitions. [2018-01-24 15:58:06,102 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 15:58:06,102 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 60 transitions. [2018-01-24 15:58:06,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-01-24 15:58:06,103 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:58:06,103 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:58:06,103 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:58:06,103 INFO L82 PathProgramCache]: Analyzing trace with hash -648862830, now seen corresponding path program 4 times [2018-01-24 15:58:06,103 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:58:06,104 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:06,105 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:58:06,105 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:06,105 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:58:06,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:58:06,122 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:58:06,211 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:06,212 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:06,212 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:58:06,212 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:58:06,212 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:58:06,212 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:06,212 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:58:06,227 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 15:58:06,228 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 15:58:06,272 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:58:06,275 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:58:06,291 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:06,291 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:58:06,512 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:06,531 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:06,532 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:58:06,535 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 15:58:06,535 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 15:58:06,617 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:58:06,622 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:58:06,627 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:06,627 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:58:06,714 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:06,715 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:58:06,715 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-24 15:58:06,715 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:58:06,716 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 15:58:06,716 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 15:58:06,716 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-24 15:58:06,717 INFO L87 Difference]: Start difference. First operand 60 states and 60 transitions. Second operand 11 states. [2018-01-24 15:58:06,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:58:06,744 INFO L93 Difference]: Finished difference Result 93 states and 93 transitions. [2018-01-24 15:58:06,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 15:58:06,745 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2018-01-24 15:58:06,745 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:58:06,745 INFO L225 Difference]: With dead ends: 93 [2018-01-24 15:58:06,745 INFO L226 Difference]: Without dead ends: 61 [2018-01-24 15:58:06,746 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 225 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-24 15:58:06,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-01-24 15:58:06,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2018-01-24 15:58:06,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-01-24 15:58:06,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 61 transitions. [2018-01-24 15:58:06,757 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 61 transitions. Word has length 59 [2018-01-24 15:58:06,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:58:06,758 INFO L432 AbstractCegarLoop]: Abstraction has 61 states and 61 transitions. [2018-01-24 15:58:06,758 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 15:58:06,758 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 61 transitions. [2018-01-24 15:58:06,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-01-24 15:58:06,759 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:58:06,759 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:58:06,759 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:58:06,759 INFO L82 PathProgramCache]: Analyzing trace with hash -1508445558, now seen corresponding path program 5 times [2018-01-24 15:58:06,759 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:58:06,760 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:06,761 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:58:06,761 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:06,761 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:58:06,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:58:06,779 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:58:06,861 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:06,861 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:06,861 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:58:06,861 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:58:06,861 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:58:06,861 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:06,861 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:58:06,871 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 15:58:06,871 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:58:06,882 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:58:06,884 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:58:06,888 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:58:06,899 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:58:06,938 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:58:06,940 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:58:06,943 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:58:06,955 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:06,955 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:58:07,284 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:07,306 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:07,306 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:58:07,309 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 15:58:07,309 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:58:07,322 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:58:07,326 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:58:07,335 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:58:07,350 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:58:07,395 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:58:07,427 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:58:07,432 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:58:07,438 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:07,438 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:58:07,567 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:07,569 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:58:07,569 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-24 15:58:07,569 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:58:07,569 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 15:58:07,569 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 15:58:07,570 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-24 15:58:07,570 INFO L87 Difference]: Start difference. First operand 61 states and 61 transitions. Second operand 12 states. [2018-01-24 15:58:07,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:58:07,602 INFO L93 Difference]: Finished difference Result 94 states and 94 transitions. [2018-01-24 15:58:07,602 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 15:58:07,602 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 60 [2018-01-24 15:58:07,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:58:07,603 INFO L225 Difference]: With dead ends: 94 [2018-01-24 15:58:07,603 INFO L226 Difference]: Without dead ends: 62 [2018-01-24 15:58:07,603 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 250 GetRequests, 228 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-24 15:58:07,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-01-24 15:58:07,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 62. [2018-01-24 15:58:07,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-01-24 15:58:07,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 62 transitions. [2018-01-24 15:58:07,612 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 62 transitions. Word has length 60 [2018-01-24 15:58:07,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:58:07,613 INFO L432 AbstractCegarLoop]: Abstraction has 62 states and 62 transitions. [2018-01-24 15:58:07,613 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 15:58:07,613 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 62 transitions. [2018-01-24 15:58:07,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-01-24 15:58:07,613 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:58:07,613 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:58:07,614 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:58:07,614 INFO L82 PathProgramCache]: Analyzing trace with hash 1909260946, now seen corresponding path program 6 times [2018-01-24 15:58:07,614 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:58:07,615 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:07,615 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:58:07,615 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:07,615 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:58:07,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:58:07,630 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:58:07,755 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:07,756 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:07,756 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:58:07,756 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:58:07,756 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:58:07,756 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:07,756 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:58:07,765 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 15:58:07,765 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 15:58:07,789 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:58:07,796 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:58:07,814 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:58:07,900 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:58:08,210 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:58:08,212 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:58:08,214 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:58:08,224 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:08,224 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:58:08,515 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:08,546 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:08,547 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:58:08,550 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 15:58:08,550 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 15:58:08,601 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:58:08,645 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:58:09,333 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:58:21,352 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:58:33,395 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:58:33,460 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:58:33,466 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:58:33,472 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:33,473 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:58:33,594 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:33,597 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:58:33,597 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-24 15:58:33,597 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:58:33,597 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 15:58:33,597 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 15:58:33,598 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=232, Invalid=274, Unknown=0, NotChecked=0, Total=506 [2018-01-24 15:58:33,598 INFO L87 Difference]: Start difference. First operand 62 states and 62 transitions. Second operand 13 states. [2018-01-24 15:58:33,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:58:33,631 INFO L93 Difference]: Finished difference Result 95 states and 95 transitions. [2018-01-24 15:58:33,632 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 15:58:33,632 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 61 [2018-01-24 15:58:33,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:58:33,633 INFO L225 Difference]: With dead ends: 95 [2018-01-24 15:58:33,633 INFO L226 Difference]: Without dead ends: 63 [2018-01-24 15:58:33,633 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 255 GetRequests, 231 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=246, Invalid=306, Unknown=0, NotChecked=0, Total=552 [2018-01-24 15:58:33,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-01-24 15:58:33,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2018-01-24 15:58:33,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-01-24 15:58:33,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 63 transitions. [2018-01-24 15:58:33,647 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 63 transitions. Word has length 61 [2018-01-24 15:58:33,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:58:33,647 INFO L432 AbstractCegarLoop]: Abstraction has 63 states and 63 transitions. [2018-01-24 15:58:33,647 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 15:58:33,647 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 63 transitions. [2018-01-24 15:58:33,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-01-24 15:58:33,648 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:58:33,648 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:58:33,648 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 15:58:33,649 INFO L82 PathProgramCache]: Analyzing trace with hash 483980170, now seen corresponding path program 7 times [2018-01-24 15:58:33,649 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:58:33,650 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:33,650 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:58:33,650 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:58:33,650 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:58:33,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:58:33,668 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:58:33,764 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:33,764 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:33,764 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:58:33,764 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:58:33,764 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:58:33,765 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:33,765 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:58:33,770 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:58:33,770 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:58:33,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:58:33,800 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:58:33,809 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:33,809 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:58:34,065 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:34,087 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:58:34,087 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:58:34,091 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:58:34,091 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:58:34,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:58:34,152 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:58:34,158 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:58:34,158 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-24 15:58:34,249 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-24 15:58:34,250 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-24 15:58:34,253 WARN L187 ceAbstractionStarter]: Timeout [2018-01-24 15:58:34,253 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.01 03:58:34 BoogieIcfgContainer [2018-01-24 15:58:34,253 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-24 15:58:34,254 INFO L168 Benchmark]: Toolchain (without parser) took 51982.83 ms. Allocated memory was 301.5 MB in the beginning and 1.1 GB in the end (delta: 772.8 MB). Free memory was 260.5 MB in the beginning and 295.7 MB in the end (delta: -35.1 MB). Peak memory consumption was 737.7 MB. Max. memory is 5.3 GB. [2018-01-24 15:58:34,254 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 301.5 MB. Free memory is still 267.5 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 15:58:34,254 INFO L168 Benchmark]: CACSL2BoogieTranslator took 216.09 ms. Allocated memory is still 301.5 MB. Free memory was 260.5 MB in the beginning and 247.4 MB in the end (delta: 13.2 MB). Peak memory consumption was 13.2 MB. Max. memory is 5.3 GB. [2018-01-24 15:58:34,255 INFO L168 Benchmark]: Boogie Preprocessor took 35.99 ms. Allocated memory is still 301.5 MB. Free memory was 247.4 MB in the beginning and 245.4 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-24 15:58:34,255 INFO L168 Benchmark]: RCFGBuilder took 266.82 ms. Allocated memory is still 301.5 MB. Free memory was 245.4 MB in the beginning and 224.6 MB in the end (delta: 20.8 MB). Peak memory consumption was 20.8 MB. Max. memory is 5.3 GB. [2018-01-24 15:58:34,255 INFO L168 Benchmark]: TraceAbstraction took 51454.68 ms. Allocated memory was 301.5 MB in the beginning and 1.1 GB in the end (delta: 772.8 MB). Free memory was 224.6 MB in the beginning and 295.7 MB in the end (delta: -71.1 MB). Peak memory consumption was 701.7 MB. Max. memory is 5.3 GB. [2018-01-24 15:58:34,256 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 301.5 MB. Free memory is still 267.5 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 216.09 ms. Allocated memory is still 301.5 MB. Free memory was 260.5 MB in the beginning and 247.4 MB in the end (delta: 13.2 MB). Peak memory consumption was 13.2 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 35.99 ms. Allocated memory is still 301.5 MB. Free memory was 247.4 MB in the beginning and 245.4 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 266.82 ms. Allocated memory is still 301.5 MB. Free memory was 245.4 MB in the beginning and 224.6 MB in the end (delta: 20.8 MB). Peak memory consumption was 20.8 MB. Max. memory is 5.3 GB. * TraceAbstraction took 51454.68 ms. Allocated memory was 301.5 MB in the beginning and 1.1 GB in the end (delta: 772.8 MB). Free memory was 224.6 MB in the beginning and 295.7 MB in the end (delta: -71.1 MB). Peak memory consumption was 701.7 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 34 LocStat_MAX_WEQGRAPH_SIZE : 3 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 256 LocStat_NO_SUPPORTING_DISEQUALITIES : 25 LocStat_NO_DISJUNCTIONS : -68 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 53 TransStat_MAX_WEQGRAPH_SIZE : 6 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 108 TransStat_NO_SUPPORTING_DISEQUALITIES : 9 TransStat_NO_DISJUNCTIONS : 57 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.312782 RENAME_VARIABLES(MILLISECONDS) : 0.056234 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.130277 PROJECTAWAY(MILLISECONDS) : 0.038802 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.161770 DISJOIN(MILLISECONDS) : 0.482396 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.072210 ADD_EQUALITY(MILLISECONDS) : 0.021614 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.005123 #CONJOIN_DISJUNCTIVE : 86 #RENAME_VARIABLES : 145 #UNFREEZE : 0 #CONJOIN : 178 #PROJECTAWAY : 142 #ADD_WEAK_EQUALITY : 9 #DISJOIN : 4 #RENAME_VARIABLES_DISJUNCTIVE : 141 #ADD_EQUALITY : 111 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 8 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 39 LocStat_MAX_WEQGRAPH_SIZE : 6 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 296 LocStat_NO_SUPPORTING_DISEQUALITIES : 30 LocStat_NO_DISJUNCTIONS : -78 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 60 TransStat_MAX_WEQGRAPH_SIZE : 6 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 120 TransStat_NO_SUPPORTING_DISEQUALITIES : 9 TransStat_NO_DISJUNCTIONS : 64 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.221423 RENAME_VARIABLES(MILLISECONDS) : 0.052309 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.090074 PROJECTAWAY(MILLISECONDS) : 0.040757 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.054049 DISJOIN(MILLISECONDS) : 0.370860 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.066280 ADD_EQUALITY(MILLISECONDS) : 0.011236 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.005044 #CONJOIN_DISJUNCTIVE : 96 #RENAME_VARIABLES : 160 #UNFREEZE : 0 #CONJOIN : 203 #PROJECTAWAY : 159 #ADD_WEAK_EQUALITY : 15 #DISJOIN : 4 #RENAME_VARIABLES_DISJUNCTIVE : 156 #ADD_EQUALITY : 128 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 8 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 53 LocStat_MAX_WEQGRAPH_SIZE : 6 LocStat_MAX_SIZEOF_WEQEDGELABEL : 2 LocStat_NO_SUPPORTING_EQUALITIES : 385 LocStat_NO_SUPPORTING_DISEQUALITIES : 43 LocStat_NO_DISJUNCTIONS : -106 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 74 TransStat_MAX_WEQGRAPH_SIZE : 6 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 130 TransStat_NO_SUPPORTING_DISEQUALITIES : 10 TransStat_NO_DISJUNCTIONS : 77 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.081938 RENAME_VARIABLES(MILLISECONDS) : 0.035910 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.056482 PROJECTAWAY(MILLISECONDS) : 0.022756 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.046293 DISJOIN(MILLISECONDS) : 0.570868 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.047648 ADD_EQUALITY(MILLISECONDS) : 0.009196 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.011179 #CONJOIN_DISJUNCTIVE : 115 #RENAME_VARIABLES : 202 #UNFREEZE : 0 #CONJOIN : 255 #PROJECTAWAY : 205 #ADD_WEAK_EQUALITY : 27 #DISJOIN : 3 #RENAME_VARIABLES_DISJUNCTIVE : 199 #ADD_EQUALITY : 146 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 9 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 63 with TraceHistMax 9, while TraceCheckSpWp was constructing backward predicates, while PartialQuantifierElimination was doing sequential composition of 5 TransFormulas, while SimplifyDDAWithTimeout was simplifying term of DAG size 1. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 63 with TraceHistMax 9, while TraceCheckSpWp was constructing backward predicates, while PartialQuantifierElimination was doing sequential composition of 5 TransFormulas, while SimplifyDDAWithTimeout was simplifying term of DAG size 1. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 63 with TraceHistMax 9, while TraceCheckSpWp was constructing backward predicates, while PartialQuantifierElimination was doing sequential composition of 5 TransFormulas, while SimplifyDDAWithTimeout was simplifying term of DAG size 1. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 63 with TraceHistMax 9, while TraceCheckSpWp was constructing backward predicates, while PartialQuantifierElimination was doing sequential composition of 5 TransFormulas, while SimplifyDDAWithTimeout was simplifying term of DAG size 1. - TimeoutResultAtElement [Line: 1441]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1441). Cancelled while BasicCegarLoop was analyzing trace of length 63 with TraceHistMax 9, while TraceCheckSpWp was constructing backward predicates, while PartialQuantifierElimination was doing sequential composition of 5 TransFormulas, while SimplifyDDAWithTimeout was simplifying term of DAG size 1. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 63 with TraceHistMax 9, while TraceCheckSpWp was constructing backward predicates, while PartialQuantifierElimination was doing sequential composition of 5 TransFormulas, while SimplifyDDAWithTimeout was simplifying term of DAG size 1. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 63 with TraceHistMax 9, while TraceCheckSpWp was constructing backward predicates, while PartialQuantifierElimination was doing sequential composition of 5 TransFormulas, while SimplifyDDAWithTimeout was simplifying term of DAG size 1. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 63 with TraceHistMax 9, while TraceCheckSpWp was constructing backward predicates, while PartialQuantifierElimination was doing sequential composition of 5 TransFormulas, while SimplifyDDAWithTimeout was simplifying term of DAG size 1. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 63 with TraceHistMax 9, while TraceCheckSpWp was constructing backward predicates, while PartialQuantifierElimination was doing sequential composition of 5 TransFormulas, while SimplifyDDAWithTimeout was simplifying term of DAG size 1. - StatisticsResult: Ultimate Automizer benchmark data CFG has 11 procedures, 65 locations, 9 error locations. TIMEOUT Result, 51.4s OverallTime, 21 OverallIterations, 9 TraceHistogramMax, 2.6s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1035 SDtfs, 239 SDslu, 4936 SDs, 0 SdLazy, 1630 SolverSat, 62 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2030 GetRequests, 1758 SyntacticMatches, 19 SemanticMatches, 253 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 818 ImplicationChecksByTransitivity, 8.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=66occurred in iteration=1, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 9.0s AbstIntTime, 3 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 20 MinimizatonAttempts, 6 StatesRemovedByMinimization, 3 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 26.9s SatisfiabilityAnalysisTime, 10.9s InterpolantComputationTime, 1732 NumberOfCodeBlocks, 1727 NumberOfCodeBlocksAsserted, 64 NumberOfCheckSat, 2608 ConstructedInterpolants, 52 QuantifiedInterpolants, 286385 SizeOfPredicates, 42 NumberOfNonLiveVariables, 4113 ConjunctsInSsa, 210 ConjunctsInUnsatCore, 56 InterpolantComputations, 14 PerfectInterpolantSequences, 33/642 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_15-58-34-269.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-24_15-58-34-269.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-24_15-58-34-269.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-1-2018-01-24_15-58-34-269.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-1-2018-01-24_15-58-34-269.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-2-2018-01-24_15-58-34-269.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-2-2018-01-24_15-58-34-269.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-24_15-58-34-269.csv Completed graceful shutdown