java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf -i ../../../trunk/examples/svcomp/memsafety/960521-1_true-valid-memsafety.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 16:59:23,328 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 16:59:23,330 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 16:59:23,344 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 16:59:23,345 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 16:59:23,346 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 16:59:23,347 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 16:59:23,348 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 16:59:23,350 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 16:59:23,351 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 16:59:23,352 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 16:59:23,352 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 16:59:23,353 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 16:59:23,354 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 16:59:23,355 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 16:59:23,358 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 16:59:23,360 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 16:59:23,362 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 16:59:23,363 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 16:59:23,364 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 16:59:23,367 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 16:59:23,367 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 16:59:23,367 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 16:59:23,368 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 16:59:23,369 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 16:59:23,370 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 16:59:23,371 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 16:59:23,371 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 16:59:23,371 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 16:59:23,372 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 16:59:23,372 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 16:59:23,373 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf [2018-01-24 16:59:23,380 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 16:59:23,381 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 16:59:23,381 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 16:59:23,382 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 16:59:23,382 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 16:59:23,382 INFO L133 SettingsManager]: * Deactivate Weak Equivalences=true [2018-01-24 16:59:23,382 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 16:59:23,382 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 16:59:23,383 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 16:59:23,383 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 16:59:23,383 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 16:59:23,383 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 16:59:23,383 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 16:59:23,383 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 16:59:23,383 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 16:59:23,384 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 16:59:23,384 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 16:59:23,384 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 16:59:23,384 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 16:59:23,384 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 16:59:23,384 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 16:59:23,384 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 16:59:23,385 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 16:59:23,385 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 16:59:23,385 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 16:59:23,385 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 16:59:23,385 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 16:59:23,386 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 16:59:23,386 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 16:59:23,386 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-24 16:59:23,386 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 16:59:23,386 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 16:59:23,386 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 16:59:23,386 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-24 16:59:23,387 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 16:59:23,387 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 16:59:23,418 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 16:59:23,429 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 16:59:23,432 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 16:59:23,433 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 16:59:23,434 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 16:59:23,434 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety/960521-1_true-valid-memsafety.i [2018-01-24 16:59:23,584 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 16:59:23,589 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 16:59:23,589 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 16:59:23,590 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 16:59:23,594 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 16:59:23,595 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 04:59:23" (1/1) ... [2018-01-24 16:59:23,598 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@214b3e12 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 04:59:23, skipping insertion in model container [2018-01-24 16:59:23,598 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 04:59:23" (1/1) ... [2018-01-24 16:59:23,610 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 16:59:23,646 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 16:59:23,759 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 16:59:23,775 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 16:59:23,782 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 04:59:23 WrapperNode [2018-01-24 16:59:23,782 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 16:59:23,783 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 16:59:23,783 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 16:59:23,784 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 16:59:23,800 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 04:59:23" (1/1) ... [2018-01-24 16:59:23,801 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 04:59:23" (1/1) ... [2018-01-24 16:59:23,810 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 04:59:23" (1/1) ... [2018-01-24 16:59:23,810 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 04:59:23" (1/1) ... [2018-01-24 16:59:23,814 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 04:59:23" (1/1) ... [2018-01-24 16:59:23,817 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 04:59:23" (1/1) ... [2018-01-24 16:59:23,819 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 04:59:23" (1/1) ... [2018-01-24 16:59:23,821 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 16:59:23,821 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 16:59:23,821 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 16:59:23,821 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 16:59:23,822 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 04:59:23" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 16:59:23,866 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 16:59:23,866 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 16:59:23,866 INFO L136 BoogieDeclarations]: Found implementation of procedure foo [2018-01-24 16:59:23,866 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 16:59:23,866 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 16:59:23,866 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 16:59:23,866 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 16:59:23,867 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 16:59:23,867 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 16:59:23,867 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 16:59:23,867 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 16:59:23,867 INFO L128 BoogieDeclarations]: Found specification of procedure foo [2018-01-24 16:59:23,867 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 16:59:23,868 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 16:59:23,868 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 16:59:24,061 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 16:59:24,062 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 04:59:24 BoogieIcfgContainer [2018-01-24 16:59:24,062 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 16:59:24,062 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 16:59:24,062 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 16:59:24,064 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 16:59:24,064 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 04:59:23" (1/3) ... [2018-01-24 16:59:24,065 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1e85ad7d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 04:59:24, skipping insertion in model container [2018-01-24 16:59:24,065 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 04:59:23" (2/3) ... [2018-01-24 16:59:24,066 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1e85ad7d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 04:59:24, skipping insertion in model container [2018-01-24 16:59:24,066 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 04:59:24" (3/3) ... [2018-01-24 16:59:24,067 INFO L105 eAbstractionObserver]: Analyzing ICFG 960521-1_true-valid-memsafety.i [2018-01-24 16:59:24,073 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 16:59:24,079 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 17 error locations. [2018-01-24 16:59:24,125 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 16:59:24,126 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 16:59:24,126 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 16:59:24,126 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 16:59:24,126 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 16:59:24,126 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 16:59:24,126 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 16:59:24,126 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 16:59:24,127 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 16:59:24,148 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states. [2018-01-24 16:59:24,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-01-24 16:59:24,155 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 16:59:24,156 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 16:59:24,156 INFO L371 AbstractCegarLoop]: === Iteration 1 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 16:59:24,161 INFO L82 PathProgramCache]: Analyzing trace with hash 1993989713, now seen corresponding path program 1 times [2018-01-24 16:59:24,164 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 16:59:24,221 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:24,222 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:24,222 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:24,222 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 16:59:24,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:24,296 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 16:59:24,395 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:24,397 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 16:59:24,398 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 16:59:24,398 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 16:59:24,401 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 16:59:24,414 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 16:59:24,415 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 16:59:24,417 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 4 states. [2018-01-24 16:59:24,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 16:59:24,656 INFO L93 Difference]: Finished difference Result 84 states and 90 transitions. [2018-01-24 16:59:24,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 16:59:24,657 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2018-01-24 16:59:24,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 16:59:24,668 INFO L225 Difference]: With dead ends: 84 [2018-01-24 16:59:24,668 INFO L226 Difference]: Without dead ends: 49 [2018-01-24 16:59:24,671 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 16:59:24,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-24 16:59:24,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-24 16:59:24,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-24 16:59:24,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 51 transitions. [2018-01-24 16:59:24,702 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 51 transitions. Word has length 11 [2018-01-24 16:59:24,703 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 16:59:24,703 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 51 transitions. [2018-01-24 16:59:24,703 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 16:59:24,703 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 51 transitions. [2018-01-24 16:59:24,703 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-01-24 16:59:24,703 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 16:59:24,703 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 16:59:24,704 INFO L371 AbstractCegarLoop]: === Iteration 2 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 16:59:24,704 INFO L82 PathProgramCache]: Analyzing trace with hash 1993989714, now seen corresponding path program 1 times [2018-01-24 16:59:24,704 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 16:59:24,705 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:24,705 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:24,705 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:24,705 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 16:59:24,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:24,726 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 16:59:24,799 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:24,800 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 16:59:24,800 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 16:59:24,800 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 16:59:24,801 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 16:59:24,801 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 16:59:24,802 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 16:59:24,802 INFO L87 Difference]: Start difference. First operand 49 states and 51 transitions. Second operand 5 states. [2018-01-24 16:59:24,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 16:59:24,930 INFO L93 Difference]: Finished difference Result 49 states and 51 transitions. [2018-01-24 16:59:24,931 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 16:59:24,931 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 11 [2018-01-24 16:59:24,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 16:59:24,932 INFO L225 Difference]: With dead ends: 49 [2018-01-24 16:59:24,933 INFO L226 Difference]: Without dead ends: 48 [2018-01-24 16:59:24,934 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-01-24 16:59:24,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-24 16:59:24,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-24 16:59:24,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-24 16:59:24,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 50 transitions. [2018-01-24 16:59:24,941 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 50 transitions. Word has length 11 [2018-01-24 16:59:24,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 16:59:24,942 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 50 transitions. [2018-01-24 16:59:24,942 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 16:59:24,942 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 50 transitions. [2018-01-24 16:59:24,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 16:59:24,943 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 16:59:24,943 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 16:59:24,943 INFO L371 AbstractCegarLoop]: === Iteration 3 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 16:59:24,943 INFO L82 PathProgramCache]: Analyzing trace with hash -1188525484, now seen corresponding path program 1 times [2018-01-24 16:59:24,944 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 16:59:24,945 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:24,945 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:24,945 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:24,945 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 16:59:24,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:24,964 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 16:59:25,064 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:25,064 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 16:59:25,064 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 16:59:25,064 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 16:59:25,065 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 16:59:25,065 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 16:59:25,065 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 16:59:25,065 INFO L87 Difference]: Start difference. First operand 48 states and 50 transitions. Second operand 6 states. [2018-01-24 16:59:25,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 16:59:25,185 INFO L93 Difference]: Finished difference Result 48 states and 50 transitions. [2018-01-24 16:59:25,186 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 16:59:25,186 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-01-24 16:59:25,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 16:59:25,187 INFO L225 Difference]: With dead ends: 48 [2018-01-24 16:59:25,187 INFO L226 Difference]: Without dead ends: 45 [2018-01-24 16:59:25,187 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-01-24 16:59:25,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-24 16:59:25,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-24 16:59:25,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-24 16:59:25,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 47 transitions. [2018-01-24 16:59:25,195 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 47 transitions. Word has length 17 [2018-01-24 16:59:25,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 16:59:25,196 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 47 transitions. [2018-01-24 16:59:25,196 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 16:59:25,196 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 47 transitions. [2018-01-24 16:59:25,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 16:59:25,197 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 16:59:25,197 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 16:59:25,197 INFO L371 AbstractCegarLoop]: === Iteration 4 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 16:59:25,198 INFO L82 PathProgramCache]: Analyzing trace with hash -1188525483, now seen corresponding path program 1 times [2018-01-24 16:59:25,198 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 16:59:25,199 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:25,199 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:25,199 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:25,199 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 16:59:25,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:25,220 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 16:59:25,368 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:25,369 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 16:59:25,369 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 16:59:25,369 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 16:59:25,369 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 16:59:25,370 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 16:59:25,370 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-24 16:59:25,370 INFO L87 Difference]: Start difference. First operand 45 states and 47 transitions. Second operand 7 states. [2018-01-24 16:59:25,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 16:59:25,487 INFO L93 Difference]: Finished difference Result 80 states and 87 transitions. [2018-01-24 16:59:25,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 16:59:25,487 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 17 [2018-01-24 16:59:25,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 16:59:25,488 INFO L225 Difference]: With dead ends: 80 [2018-01-24 16:59:25,488 INFO L226 Difference]: Without dead ends: 53 [2018-01-24 16:59:25,489 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-01-24 16:59:25,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-24 16:59:25,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 48. [2018-01-24 16:59:25,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-24 16:59:25,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 50 transitions. [2018-01-24 16:59:25,496 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 50 transitions. Word has length 17 [2018-01-24 16:59:25,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 16:59:25,496 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 50 transitions. [2018-01-24 16:59:25,496 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 16:59:25,496 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 50 transitions. [2018-01-24 16:59:25,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-24 16:59:25,497 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 16:59:25,497 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 16:59:25,497 INFO L371 AbstractCegarLoop]: === Iteration 5 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 16:59:25,498 INFO L82 PathProgramCache]: Analyzing trace with hash -2106816852, now seen corresponding path program 1 times [2018-01-24 16:59:25,498 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 16:59:25,499 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:25,499 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:25,499 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:25,499 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 16:59:25,516 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:25,517 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 16:59:25,668 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:25,668 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:25,668 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 16:59:25,669 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 22 with the following transitions: [2018-01-24 16:59:25,671 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [11], [12], [14], [16], [42], [43], [44], [45], [46], [47], [50], [76], [77], [78], [80] [2018-01-24 16:59:25,714 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 16:59:25,715 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 16:59:25,893 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 16:59:25,894 INFO L268 AbstractInterpreter]: Visited 19 different actions 24 times. Merged at 5 different actions 5 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 26 variables. [2018-01-24 16:59:25,906 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 16:59:25,906 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:25,907 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 16:59:25,925 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:25,925 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 16:59:25,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:25,958 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 16:59:25,983 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 16:59:25,985 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:25,989 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 16:59:25,989 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:14 [2018-01-24 16:59:26,005 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-01-24 16:59:26,006 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:26,014 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 16:59:26,014 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:21 [2018-01-24 16:59:26,141 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:26,142 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 16:59:26,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 19 [2018-01-24 16:59:26,843 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 5 [2018-01-24 16:59:26,844 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:26,850 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 16:59:26,851 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 16:59:26,851 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:15, output treesize:5 [2018-01-24 16:59:26,881 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:26,901 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:26,916 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 16:59:26,919 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:26,920 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 16:59:26,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:26,953 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 16:59:26,958 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 16:59:26,958 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:26,965 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 16:59:26,966 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:26,970 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 16:59:26,971 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:19 [2018-01-24 16:59:27,006 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 16:59:27,007 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 16:59:27,007 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:27,027 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 16:59:27,028 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 16:59:27,029 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 16:59:27,029 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:27,037 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 16:59:27,038 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:25 [2018-01-24 16:59:27,148 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:27,148 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 16:59:27,231 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 3 [2018-01-24 16:59:27,232 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:27,235 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 19 [2018-01-24 16:59:27,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 16:59:27,249 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:27,250 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 16:59:27,252 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 16:59:27,252 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:25, output treesize:5 [2018-01-24 16:59:27,256 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:27,257 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 16:59:27,258 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 7, 7, 7] total 24 [2018-01-24 16:59:27,258 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 16:59:27,258 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 16:59:27,258 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 16:59:27,258 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=476, Unknown=2, NotChecked=0, Total=600 [2018-01-24 16:59:27,259 INFO L87 Difference]: Start difference. First operand 48 states and 50 transitions. Second operand 12 states. [2018-01-24 16:59:27,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 16:59:27,585 INFO L93 Difference]: Finished difference Result 90 states and 95 transitions. [2018-01-24 16:59:27,586 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 16:59:27,587 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 21 [2018-01-24 16:59:27,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 16:59:27,588 INFO L225 Difference]: With dead ends: 90 [2018-01-24 16:59:27,588 INFO L226 Difference]: Without dead ends: 63 [2018-01-24 16:59:27,595 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 64 SyntacticMatches, 4 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=162, Invalid=592, Unknown=2, NotChecked=0, Total=756 [2018-01-24 16:59:27,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-01-24 16:59:27,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 56. [2018-01-24 16:59:27,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-24 16:59:27,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 60 transitions. [2018-01-24 16:59:27,602 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 60 transitions. Word has length 21 [2018-01-24 16:59:27,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 16:59:27,602 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 60 transitions. [2018-01-24 16:59:27,602 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 16:59:27,602 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 60 transitions. [2018-01-24 16:59:27,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-24 16:59:27,603 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 16:59:27,603 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 16:59:27,603 INFO L371 AbstractCegarLoop]: === Iteration 6 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 16:59:27,604 INFO L82 PathProgramCache]: Analyzing trace with hash -702775421, now seen corresponding path program 2 times [2018-01-24 16:59:27,604 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 16:59:27,605 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:27,605 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:27,605 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:27,605 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 16:59:27,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:27,622 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 16:59:27,776 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:27,776 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:27,776 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 16:59:27,776 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 16:59:27,777 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 16:59:27,777 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:27,777 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 16:59:27,782 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 16:59:27,782 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 16:59:27,796 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 16:59:27,800 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 16:59:27,801 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 16:59:27,803 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 16:59:27,815 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 16:59:27,816 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:27,823 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 16:59:27,823 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:27,828 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 16:59:27,829 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:19 [2018-01-24 16:59:27,858 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 16:59:27,859 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 16:59:27,859 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 16:59:27,860 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:27,868 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 16:59:27,868 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:27,875 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 16:59:27,875 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:32, output treesize:25 [2018-01-24 16:59:28,040 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:28,040 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 16:59:28,175 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 3 [2018-01-24 16:59:28,175 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:28,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 19 [2018-01-24 16:59:28,190 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 16:59:28,190 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:28,191 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 16:59:28,194 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 16:59:28,194 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:25, output treesize:5 [2018-01-24 16:59:28,211 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:28,232 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:28,232 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 16:59:28,235 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 16:59:28,235 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 16:59:28,255 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 16:59:28,285 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 16:59:28,297 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 16:59:28,301 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 16:59:28,305 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 16:59:28,305 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:28,317 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 16:59:28,317 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:28,326 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 16:59:28,326 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:19 [2018-01-24 16:59:28,331 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 16:59:28,331 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 16:59:28,332 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:28,347 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 16:59:28,348 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 16:59:28,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 16:59:28,348 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:28,359 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 16:59:28,359 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:25 [2018-01-24 16:59:28,406 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:28,406 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 16:59:28,445 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 3 [2018-01-24 16:59:28,445 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:28,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 19 [2018-01-24 16:59:28,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 5 [2018-01-24 16:59:28,461 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:28,463 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 16:59:28,466 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 16:59:28,466 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:25, output treesize:5 [2018-01-24 16:59:28,472 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:28,480 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 16:59:28,480 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8, 8, 8] total 23 [2018-01-24 16:59:28,480 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 16:59:28,480 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 16:59:28,481 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 16:59:28,481 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=442, Unknown=0, NotChecked=0, Total=552 [2018-01-24 16:59:28,481 INFO L87 Difference]: Start difference. First operand 56 states and 60 transitions. Second operand 17 states. [2018-01-24 16:59:29,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 16:59:29,027 INFO L93 Difference]: Finished difference Result 104 states and 111 transitions. [2018-01-24 16:59:29,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 16:59:29,027 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 25 [2018-01-24 16:59:29,027 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 16:59:29,028 INFO L225 Difference]: With dead ends: 104 [2018-01-24 16:59:29,028 INFO L226 Difference]: Without dead ends: 73 [2018-01-24 16:59:29,029 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 83 SyntacticMatches, 3 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 257 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=208, Invalid=722, Unknown=0, NotChecked=0, Total=930 [2018-01-24 16:59:29,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-01-24 16:59:29,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 64. [2018-01-24 16:59:29,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-01-24 16:59:29,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 70 transitions. [2018-01-24 16:59:29,038 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 70 transitions. Word has length 25 [2018-01-24 16:59:29,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 16:59:29,039 INFO L432 AbstractCegarLoop]: Abstraction has 64 states and 70 transitions. [2018-01-24 16:59:29,039 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 16:59:29,039 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 70 transitions. [2018-01-24 16:59:29,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 16:59:29,040 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 16:59:29,040 INFO L322 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 16:59:29,040 INFO L371 AbstractCegarLoop]: === Iteration 7 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 16:59:29,040 INFO L82 PathProgramCache]: Analyzing trace with hash 1827026138, now seen corresponding path program 3 times [2018-01-24 16:59:29,041 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 16:59:29,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:29,042 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 16:59:29,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:29,042 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 16:59:29,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:29,059 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 16:59:29,243 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:29,243 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:29,243 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 16:59:29,244 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 16:59:29,244 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 16:59:29,244 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:29,244 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 16:59:29,256 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 16:59:29,257 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 16:59:29,271 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:29,274 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:29,275 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 16:59:29,277 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 16:59:29,281 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 16:59:29,281 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:29,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 16:59:29,286 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:29,290 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 16:59:29,291 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:18, output treesize:16 [2018-01-24 16:59:29,328 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 16:59:29,335 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 16:59:29,336 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 16:59:29,336 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:29,344 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 16:59:29,344 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:29,350 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 16:59:29,350 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:22 [2018-01-24 16:59:29,467 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 16:59:29,467 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 16:59:29,674 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 16:59:29,695 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:29,695 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 16:59:29,698 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 16:59:29,698 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 16:59:29,716 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:29,744 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:29,755 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 16:59:29,759 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 16:59:29,762 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 16:59:29,762 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:29,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 16:59:29,768 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:29,771 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 16:59:29,771 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:18, output treesize:16 [2018-01-24 16:59:29,812 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 16:59:29,813 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 16:59:29,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 16:59:29,814 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:29,820 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 16:59:29,821 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:29,827 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 16:59:29,827 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:22 [2018-01-24 16:59:30,013 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 16:59:30,014 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 16:59:30,647 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 16:59:30,649 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 16:59:30,649 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 7, 7, 7] total 29 [2018-01-24 16:59:30,649 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 16:59:30,649 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 16:59:30,649 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 16:59:30,650 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=730, Unknown=0, NotChecked=0, Total=870 [2018-01-24 16:59:30,650 INFO L87 Difference]: Start difference. First operand 64 states and 70 transitions. Second operand 18 states. [2018-01-24 16:59:31,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 16:59:31,353 INFO L93 Difference]: Finished difference Result 125 states and 137 transitions. [2018-01-24 16:59:31,353 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 16:59:31,354 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 29 [2018-01-24 16:59:31,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 16:59:31,357 INFO L225 Difference]: With dead ends: 125 [2018-01-24 16:59:31,358 INFO L226 Difference]: Without dead ends: 90 [2018-01-24 16:59:31,359 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 92 SyntacticMatches, 5 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 461 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=338, Invalid=1302, Unknown=0, NotChecked=0, Total=1640 [2018-01-24 16:59:31,359 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-01-24 16:59:31,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 70. [2018-01-24 16:59:31,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-01-24 16:59:31,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 76 transitions. [2018-01-24 16:59:31,370 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 76 transitions. Word has length 29 [2018-01-24 16:59:31,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 16:59:31,371 INFO L432 AbstractCegarLoop]: Abstraction has 70 states and 76 transitions. [2018-01-24 16:59:31,371 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 16:59:31,371 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 76 transitions. [2018-01-24 16:59:31,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 16:59:31,372 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 16:59:31,372 INFO L322 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 16:59:31,373 INFO L371 AbstractCegarLoop]: === Iteration 8 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 16:59:31,373 INFO L82 PathProgramCache]: Analyzing trace with hash -645884181, now seen corresponding path program 1 times [2018-01-24 16:59:31,373 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 16:59:31,374 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:31,374 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 16:59:31,374 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:31,374 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 16:59:31,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:31,390 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 16:59:31,483 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:31,484 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:31,484 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 16:59:31,484 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 41 with the following transitions: [2018-01-24 16:59:31,484 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [9], [11], [12], [16], [20], [24], [29], [32], [42], [43], [44], [45], [46], [47], [50], [76], [77], [78], [80] [2018-01-24 16:59:31,485 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 16:59:31,486 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 16:59:31,599 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 16:59:31,599 INFO L268 AbstractInterpreter]: Visited 23 different actions 32 times. Merged at 9 different actions 9 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 26 variables. [2018-01-24 16:59:31,601 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 16:59:31,601 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:31,601 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 16:59:31,614 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:31,614 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 16:59:31,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:31,642 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 16:59:31,708 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:31,708 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 16:59:31,780 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:31,812 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:31,812 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 16:59:31,817 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:31,818 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 16:59:31,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:31,866 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 16:59:31,873 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:31,873 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 16:59:31,890 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:31,892 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 16:59:31,892 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 22 [2018-01-24 16:59:31,892 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 16:59:31,893 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 16:59:31,893 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 16:59:31,893 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=199, Invalid=263, Unknown=0, NotChecked=0, Total=462 [2018-01-24 16:59:31,893 INFO L87 Difference]: Start difference. First operand 70 states and 76 transitions. Second operand 15 states. [2018-01-24 16:59:32,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 16:59:32,018 INFO L93 Difference]: Finished difference Result 136 states and 147 transitions. [2018-01-24 16:59:32,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 16:59:32,019 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 40 [2018-01-24 16:59:32,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 16:59:32,021 INFO L225 Difference]: With dead ends: 136 [2018-01-24 16:59:32,021 INFO L226 Difference]: Without dead ends: 102 [2018-01-24 16:59:32,021 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 164 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=199, Invalid=263, Unknown=0, NotChecked=0, Total=462 [2018-01-24 16:59:32,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-01-24 16:59:32,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 86. [2018-01-24 16:59:32,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-01-24 16:59:32,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 98 transitions. [2018-01-24 16:59:32,038 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 98 transitions. Word has length 40 [2018-01-24 16:59:32,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 16:59:32,039 INFO L432 AbstractCegarLoop]: Abstraction has 86 states and 98 transitions. [2018-01-24 16:59:32,039 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 16:59:32,039 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 98 transitions. [2018-01-24 16:59:32,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 16:59:32,040 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 16:59:32,040 INFO L322 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 16:59:32,040 INFO L371 AbstractCegarLoop]: === Iteration 9 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 16:59:32,041 INFO L82 PathProgramCache]: Analyzing trace with hash -2113361740, now seen corresponding path program 2 times [2018-01-24 16:59:32,041 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 16:59:32,041 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:32,042 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:32,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:32,042 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 16:59:32,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:32,055 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 16:59:32,210 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 16:59:32,211 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:32,211 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 16:59:32,211 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 16:59:32,211 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 16:59:32,211 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:32,211 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 16:59:32,220 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 16:59:32,220 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 16:59:32,240 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 16:59:32,243 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 16:59:32,247 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 16:59:32,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 16:59:32,253 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:32,259 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 16:59:32,259 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:14 [2018-01-24 16:59:32,463 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 16:59:32,463 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 16:59:32,718 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 16:59:32,744 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 16:59:32,745 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7, 7] imperfect sequences [10] total 20 [2018-01-24 16:59:32,745 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 16:59:32,745 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 16:59:32,745 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 16:59:32,746 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=305, Unknown=0, NotChecked=0, Total=380 [2018-01-24 16:59:32,746 INFO L87 Difference]: Start difference. First operand 86 states and 98 transitions. Second operand 8 states. [2018-01-24 16:59:32,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 16:59:32,995 INFO L93 Difference]: Finished difference Result 89 states and 100 transitions. [2018-01-24 16:59:32,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 16:59:32,995 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-01-24 16:59:32,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 16:59:32,997 INFO L225 Difference]: With dead ends: 89 [2018-01-24 16:59:32,998 INFO L226 Difference]: Without dead ends: 83 [2018-01-24 16:59:32,998 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 78 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=138, Invalid=564, Unknown=0, NotChecked=0, Total=702 [2018-01-24 16:59:32,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-01-24 16:59:33,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2018-01-24 16:59:33,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2018-01-24 16:59:33,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 89 transitions. [2018-01-24 16:59:33,014 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 89 transitions. Word has length 44 [2018-01-24 16:59:33,014 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 16:59:33,014 INFO L432 AbstractCegarLoop]: Abstraction has 83 states and 89 transitions. [2018-01-24 16:59:33,014 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 16:59:33,014 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 89 transitions. [2018-01-24 16:59:33,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 16:59:33,015 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 16:59:33,015 INFO L322 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 16:59:33,016 INFO L371 AbstractCegarLoop]: === Iteration 10 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 16:59:33,016 INFO L82 PathProgramCache]: Analyzing trace with hash -2113361741, now seen corresponding path program 1 times [2018-01-24 16:59:33,016 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 16:59:33,017 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:33,017 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 16:59:33,017 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:33,017 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 16:59:33,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:33,029 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 16:59:33,068 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 16:59:33,068 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 16:59:33,068 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 16:59:33,068 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 16:59:33,069 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 16:59:33,069 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 16:59:33,069 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 16:59:33,069 INFO L87 Difference]: Start difference. First operand 83 states and 89 transitions. Second operand 4 states. [2018-01-24 16:59:33,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 16:59:33,132 INFO L93 Difference]: Finished difference Result 83 states and 89 transitions. [2018-01-24 16:59:33,132 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 16:59:33,132 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 44 [2018-01-24 16:59:33,133 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 16:59:33,133 INFO L225 Difference]: With dead ends: 83 [2018-01-24 16:59:33,134 INFO L226 Difference]: Without dead ends: 81 [2018-01-24 16:59:33,134 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 16:59:33,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2018-01-24 16:59:33,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 81. [2018-01-24 16:59:33,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-01-24 16:59:33,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 82 transitions. [2018-01-24 16:59:33,147 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 82 transitions. Word has length 44 [2018-01-24 16:59:33,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 16:59:33,147 INFO L432 AbstractCegarLoop]: Abstraction has 81 states and 82 transitions. [2018-01-24 16:59:33,147 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 16:59:33,147 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 82 transitions. [2018-01-24 16:59:33,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-01-24 16:59:33,149 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 16:59:33,149 INFO L322 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 16:59:33,149 INFO L371 AbstractCegarLoop]: === Iteration 11 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 16:59:33,149 INFO L82 PathProgramCache]: Analyzing trace with hash 1791473437, now seen corresponding path program 1 times [2018-01-24 16:59:33,149 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 16:59:33,150 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:33,150 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:33,150 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:33,150 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 16:59:33,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:33,169 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 16:59:33,352 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 16:59:33,352 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:33,353 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 16:59:33,353 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 74 with the following transitions: [2018-01-24 16:59:33,353 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [9], [11], [12], [16], [20], [24], [27], [29], [30], [34], [38], [42], [43], [44], [45], [46], [47], [50], [52], [65], [66], [71], [76], [77], [78], [80], [81] [2018-01-24 16:59:33,354 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 16:59:33,355 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 16:59:33,499 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 16:59:33,499 INFO L268 AbstractInterpreter]: Visited 31 different actions 48 times. Merged at 16 different actions 16 times. Never widened. Found 3 fixpoints after 3 different actions. Largest state had 27 variables. [2018-01-24 16:59:33,505 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 16:59:33,506 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:33,506 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 16:59:33,516 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:33,516 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 16:59:33,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:33,556 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 16:59:33,657 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 16:59:33,657 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 16:59:33,844 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 16:59:33,865 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:33,865 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 16:59:33,868 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:33,868 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 16:59:33,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:33,921 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 16:59:33,937 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 16:59:33,937 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 16:59:33,992 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 16:59:33,993 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 16:59:33,993 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 11, 10, 11] total 26 [2018-01-24 16:59:33,994 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 16:59:33,994 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 16:59:33,994 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 16:59:33,995 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=238, Invalid=412, Unknown=0, NotChecked=0, Total=650 [2018-01-24 16:59:33,995 INFO L87 Difference]: Start difference. First operand 81 states and 82 transitions. Second operand 18 states. [2018-01-24 16:59:34,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 16:59:34,202 INFO L93 Difference]: Finished difference Result 134 states and 137 transitions. [2018-01-24 16:59:34,203 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 16:59:34,203 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 73 [2018-01-24 16:59:34,203 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 16:59:34,204 INFO L225 Difference]: With dead ends: 134 [2018-01-24 16:59:34,204 INFO L226 Difference]: Without dead ends: 93 [2018-01-24 16:59:34,205 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 302 GetRequests, 273 SyntacticMatches, 4 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 227 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=263, Invalid=439, Unknown=0, NotChecked=0, Total=702 [2018-01-24 16:59:34,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-01-24 16:59:34,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 89. [2018-01-24 16:59:34,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-01-24 16:59:34,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 90 transitions. [2018-01-24 16:59:34,218 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 90 transitions. Word has length 73 [2018-01-24 16:59:34,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 16:59:34,218 INFO L432 AbstractCegarLoop]: Abstraction has 89 states and 90 transitions. [2018-01-24 16:59:34,218 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 16:59:34,218 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 90 transitions. [2018-01-24 16:59:34,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-01-24 16:59:34,220 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 16:59:34,220 INFO L322 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 16:59:34,220 INFO L371 AbstractCegarLoop]: === Iteration 12 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 16:59:34,220 INFO L82 PathProgramCache]: Analyzing trace with hash 526780669, now seen corresponding path program 2 times [2018-01-24 16:59:34,220 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 16:59:34,221 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:34,221 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:34,222 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:34,222 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 16:59:34,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:34,237 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 16:59:34,522 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 16:59:34,522 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:34,522 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 16:59:34,522 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 16:59:34,522 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 16:59:34,522 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:34,523 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 16:59:34,532 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 16:59:34,532 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 16:59:34,549 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 16:59:34,555 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 16:59:34,557 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 16:59:34,571 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 16:59:34,571 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:34,613 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 16:59:34,614 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:10 [2018-01-24 16:59:34,747 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 16:59:34,753 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 16:59:34,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 16:59:34,754 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:34,762 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 16:59:34,762 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:9 [2018-01-24 16:59:34,906 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 16:59:34,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-01-24 16:59:34,907 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:34,941 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 16:59:34,942 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:15 [2018-01-24 16:59:35,015 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 196 trivial. 0 not checked. [2018-01-24 16:59:35,015 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 16:59:35,026 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2018-01-24 16:59:35,027 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:35,030 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-24 16:59:35,030 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:13 [2018-01-24 16:59:35,041 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 16:59:35,041 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:35,045 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 16:59:35,046 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 16:59:35,048 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-24 16:59:35,048 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:23, output treesize:9 [2018-01-24 16:59:35,112 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 196 trivial. 0 not checked. [2018-01-24 16:59:35,133 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 16:59:35,133 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7, 7] imperfect sequences [12] total 21 [2018-01-24 16:59:35,133 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 16:59:35,134 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 16:59:35,134 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 16:59:35,134 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=348, Unknown=0, NotChecked=0, Total=420 [2018-01-24 16:59:35,135 INFO L87 Difference]: Start difference. First operand 89 states and 90 transitions. Second operand 8 states. [2018-01-24 16:59:35,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 16:59:35,313 INFO L93 Difference]: Finished difference Result 89 states and 90 transitions. [2018-01-24 16:59:35,313 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 16:59:35,313 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 81 [2018-01-24 16:59:35,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 16:59:35,315 INFO L225 Difference]: With dead ends: 89 [2018-01-24 16:59:35,315 INFO L226 Difference]: Without dead ends: 87 [2018-01-24 16:59:35,315 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 153 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 108 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=139, Invalid=673, Unknown=0, NotChecked=0, Total=812 [2018-01-24 16:59:35,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-01-24 16:59:35,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 87. [2018-01-24 16:59:35,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-01-24 16:59:35,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 88 transitions. [2018-01-24 16:59:35,328 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 88 transitions. Word has length 81 [2018-01-24 16:59:35,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 16:59:35,329 INFO L432 AbstractCegarLoop]: Abstraction has 87 states and 88 transitions. [2018-01-24 16:59:35,329 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 16:59:35,329 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 88 transitions. [2018-01-24 16:59:35,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-01-24 16:59:35,330 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 16:59:35,331 INFO L322 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 16:59:35,331 INFO L371 AbstractCegarLoop]: === Iteration 13 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 16:59:35,331 INFO L82 PathProgramCache]: Analyzing trace with hash 526772724, now seen corresponding path program 1 times [2018-01-24 16:59:35,331 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 16:59:35,332 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:35,332 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 16:59:35,332 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:35,332 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 16:59:35,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:35,351 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 16:59:35,499 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 16:59:35,499 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:35,499 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 16:59:35,499 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 82 with the following transitions: [2018-01-24 16:59:35,499 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [9], [11], [12], [16], [20], [24], [27], [29], [30], [34], [38], [42], [43], [44], [45], [46], [47], [50], [52], [57], [58], [62], [76], [77], [78], [80], [81] [2018-01-24 16:59:35,500 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 16:59:35,501 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 16:59:35,611 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 16:59:35,611 INFO L268 AbstractInterpreter]: Visited 31 different actions 48 times. Merged at 16 different actions 16 times. Never widened. Found 3 fixpoints after 3 different actions. Largest state had 27 variables. [2018-01-24 16:59:35,619 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 16:59:35,619 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:35,619 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 16:59:35,629 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:35,629 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 16:59:35,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:35,655 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 16:59:35,715 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 16:59:35,715 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 16:59:35,864 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 16:59:35,885 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:35,885 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 16:59:35,888 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:35,888 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 16:59:35,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:35,953 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 16:59:35,975 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 16:59:35,975 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 16:59:36,052 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 16:59:36,054 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 16:59:36,054 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 12, 11, 12] total 29 [2018-01-24 16:59:36,054 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 16:59:36,054 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 16:59:36,054 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 16:59:36,055 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=299, Invalid=513, Unknown=0, NotChecked=0, Total=812 [2018-01-24 16:59:36,055 INFO L87 Difference]: Start difference. First operand 87 states and 88 transitions. Second operand 20 states. [2018-01-24 16:59:36,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 16:59:36,179 INFO L93 Difference]: Finished difference Result 142 states and 145 transitions. [2018-01-24 16:59:36,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 16:59:36,179 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 81 [2018-01-24 16:59:36,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 16:59:36,181 INFO L225 Difference]: With dead ends: 142 [2018-01-24 16:59:36,181 INFO L226 Difference]: Without dead ends: 99 [2018-01-24 16:59:36,182 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 335 GetRequests, 303 SyntacticMatches, 4 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 296 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=327, Invalid=543, Unknown=0, NotChecked=0, Total=870 [2018-01-24 16:59:36,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-01-24 16:59:36,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 95. [2018-01-24 16:59:36,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-01-24 16:59:36,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 96 transitions. [2018-01-24 16:59:36,197 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 96 transitions. Word has length 81 [2018-01-24 16:59:36,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 16:59:36,197 INFO L432 AbstractCegarLoop]: Abstraction has 95 states and 96 transitions. [2018-01-24 16:59:36,197 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 16:59:36,197 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 96 transitions. [2018-01-24 16:59:36,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-01-24 16:59:36,199 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 16:59:36,199 INFO L322 BasicCegarLoop]: trace histogram [9, 9, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 16:59:36,199 INFO L371 AbstractCegarLoop]: === Iteration 14 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 16:59:36,199 INFO L82 PathProgramCache]: Analyzing trace with hash -2016770860, now seen corresponding path program 2 times [2018-01-24 16:59:36,199 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 16:59:36,200 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:36,200 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 16:59:36,200 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:36,201 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 16:59:36,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:36,221 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 16:59:36,342 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-24 16:59:36,342 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:36,343 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 16:59:36,343 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 16:59:36,343 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 16:59:36,343 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:36,343 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 16:59:36,348 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 16:59:36,348 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 16:59:36,364 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 16:59:36,375 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 16:59:36,377 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 16:59:36,379 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 16:59:36,475 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-24 16:59:36,475 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 16:59:36,708 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-24 16:59:36,729 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:36,730 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 16:59:36,733 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 16:59:36,733 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 16:59:36,753 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 16:59:36,819 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 16:59:36,839 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 16:59:36,844 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 16:59:36,863 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-24 16:59:36,863 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 16:59:36,925 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-24 16:59:36,927 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 16:59:36,949 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12, 13, 12, 13] total 32 [2018-01-24 16:59:36,949 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 16:59:36,949 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-24 16:59:36,950 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-24 16:59:36,950 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=367, Invalid=625, Unknown=0, NotChecked=0, Total=992 [2018-01-24 16:59:36,950 INFO L87 Difference]: Start difference. First operand 95 states and 96 transitions. Second operand 22 states. [2018-01-24 16:59:37,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 16:59:37,113 INFO L93 Difference]: Finished difference Result 154 states and 157 transitions. [2018-01-24 16:59:37,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 16:59:37,114 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 89 [2018-01-24 16:59:37,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 16:59:37,115 INFO L225 Difference]: With dead ends: 154 [2018-01-24 16:59:37,115 INFO L226 Difference]: Without dead ends: 107 [2018-01-24 16:59:37,116 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 368 GetRequests, 333 SyntacticMatches, 4 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 374 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=398, Invalid=658, Unknown=0, NotChecked=0, Total=1056 [2018-01-24 16:59:37,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-01-24 16:59:37,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 103. [2018-01-24 16:59:37,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-01-24 16:59:37,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 104 transitions. [2018-01-24 16:59:37,130 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 104 transitions. Word has length 89 [2018-01-24 16:59:37,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 16:59:37,130 INFO L432 AbstractCegarLoop]: Abstraction has 103 states and 104 transitions. [2018-01-24 16:59:37,131 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-24 16:59:37,131 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 104 transitions. [2018-01-24 16:59:37,131 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-01-24 16:59:37,132 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 16:59:37,132 INFO L322 BasicCegarLoop]: trace histogram [10, 10, 9, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 16:59:37,132 INFO L371 AbstractCegarLoop]: === Iteration 15 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 16:59:37,132 INFO L82 PathProgramCache]: Analyzing trace with hash 1885333684, now seen corresponding path program 3 times [2018-01-24 16:59:37,132 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 16:59:37,133 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:37,133 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 16:59:37,133 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 16:59:37,133 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 16:59:37,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 16:59:37,153 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 16:59:37,301 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-01-24 16:59:37,301 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:37,301 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 16:59:37,301 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 16:59:37,301 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 16:59:37,301 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:37,301 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 16:59:37,306 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 16:59:37,306 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 16:59:37,319 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:37,323 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:37,326 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:37,330 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:37,336 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:37,342 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:37,356 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:37,377 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:37,402 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:37,418 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:37,419 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 16:59:37,422 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 16:59:37,443 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-01-24 16:59:37,443 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 16:59:37,555 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-01-24 16:59:37,576 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 16:59:37,576 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 16:59:37,579 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 16:59:37,579 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 16:59:37,600 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:37,653 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:37,715 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:37,791 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:37,972 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:38,292 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:38,770 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 16:59:50,804 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:00:02,859 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:00:14,899 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:00:14,968 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:00:14,975 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:00:15,070 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-01-24 17:00:15,070 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:00:15,297 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-01-24 17:00:15,299 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:00:15,300 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12, 12, 13, 14] total 46 [2018-01-24 17:00:15,300 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:00:15,300 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 17:00:15,300 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 17:00:15,301 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=740, Invalid=1330, Unknown=0, NotChecked=0, Total=2070 [2018-01-24 17:00:15,301 INFO L87 Difference]: Start difference. First operand 103 states and 104 transitions. Second operand 15 states. [2018-01-24 17:00:15,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:00:15,388 INFO L93 Difference]: Finished difference Result 166 states and 169 transitions. [2018-01-24 17:00:15,388 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 17:00:15,388 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 97 [2018-01-24 17:00:15,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:00:15,389 INFO L225 Difference]: With dead ends: 166 [2018-01-24 17:00:15,389 INFO L226 Difference]: Without dead ends: 115 [2018-01-24 17:00:15,390 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 420 GetRequests, 373 SyntacticMatches, 2 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 946 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=785, Invalid=1377, Unknown=0, NotChecked=0, Total=2162 [2018-01-24 17:00:15,390 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-01-24 17:00:15,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 111. [2018-01-24 17:00:15,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-01-24 17:00:15,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 112 transitions. [2018-01-24 17:00:15,400 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 112 transitions. Word has length 97 [2018-01-24 17:00:15,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:00:15,400 INFO L432 AbstractCegarLoop]: Abstraction has 111 states and 112 transitions. [2018-01-24 17:00:15,400 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 17:00:15,400 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 112 transitions. [2018-01-24 17:00:15,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-01-24 17:00:15,401 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:00:15,402 INFO L322 BasicCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:00:15,402 INFO L371 AbstractCegarLoop]: === Iteration 16 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 17:00:15,402 INFO L82 PathProgramCache]: Analyzing trace with hash -984574572, now seen corresponding path program 4 times [2018-01-24 17:00:15,402 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:00:15,403 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:00:15,403 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:00:15,403 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:00:15,403 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:00:15,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:00:15,417 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:00:15,681 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-24 17:00:15,681 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:00:15,681 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:00:15,682 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:00:15,682 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:00:15,682 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:00:15,682 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:00:15,689 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 17:00:15,689 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 17:00:15,716 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:00:15,719 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:00:15,721 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 17:00:15,721 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:00:15,722 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:00:15,722 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:8, output treesize:7 [2018-01-24 17:00:16,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-01-24 17:00:16,052 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:00:16,056 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 17:00:16,056 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:24, output treesize:17 [2018-01-24 17:00:16,104 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 171 proven. 229 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:00:16,104 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:00:16,553 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 17:00:16,605 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:16,608 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:16,611 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:16,614 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 17:00:16,741 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:16,744 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:16,746 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:16,749 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 17:00:16,818 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:16,821 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:16,823 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:16,825 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 17:00:16,884 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:16,886 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:16,888 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:17,041 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:17,101 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:17,141 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 17:00:17,197 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:17,198 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:17,200 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:17,203 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 17:00:17,256 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:17,258 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:17,260 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:17,262 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 17:00:17,478 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 17:00:18,016 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 171 proven. 229 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:00:18,037 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:00:18,037 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:00:18,042 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 17:00:18,042 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 17:00:18,122 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:00:18,128 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:00:18,131 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 17:00:18,131 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:00:18,132 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:00:18,133 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:8, output treesize:7 [2018-01-24 17:00:18,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-01-24 17:00:18,148 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:00:18,156 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 17:00:18,156 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:24, output treesize:17 [2018-01-24 17:00:18,176 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 171 proven. 229 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:00:18,177 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:00:18,572 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,575 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,578 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,582 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 17:00:18,586 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,589 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,593 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,597 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 17:00:18,601 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,604 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,607 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,612 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 17:00:18,616 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,619 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,622 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,626 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 17:00:18,701 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,745 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,786 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,829 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 17:00:18,895 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,897 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,899 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,902 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 17:00:18,968 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,970 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,972 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 17:00:18,974 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 17:00:19,176 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 17:00:19,261 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 171 proven. 229 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:00:19,262 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:00:19,262 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 28, 29, 28, 28] total 70 [2018-01-24 17:00:19,262 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:00:19,263 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-24 17:00:19,263 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-24 17:00:19,264 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=950, Invalid=3880, Unknown=0, NotChecked=0, Total=4830 [2018-01-24 17:00:19,264 INFO L87 Difference]: Start difference. First operand 111 states and 112 transitions. Second operand 41 states. [2018-01-24 17:00:20,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:00:20,351 INFO L93 Difference]: Finished difference Result 178 states and 181 transitions. [2018-01-24 17:00:20,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-24 17:00:20,351 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 105 [2018-01-24 17:00:20,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:00:20,352 INFO L225 Difference]: With dead ends: 178 [2018-01-24 17:00:20,352 INFO L226 Difference]: Without dead ends: 123 [2018-01-24 17:00:20,354 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 450 GetRequests, 342 SyntacticMatches, 24 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 3 DeprecatedPredicates, 4442 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=1386, Invalid=5924, Unknown=0, NotChecked=0, Total=7310 [2018-01-24 17:00:20,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-01-24 17:00:20,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 119. [2018-01-24 17:00:20,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 17:00:20,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 120 transitions. [2018-01-24 17:00:20,364 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 120 transitions. Word has length 105 [2018-01-24 17:00:20,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:00:20,365 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 120 transitions. [2018-01-24 17:00:20,365 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-24 17:00:20,365 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 120 transitions. [2018-01-24 17:00:20,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-01-24 17:00:20,366 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:00:20,366 INFO L322 BasicCegarLoop]: trace histogram [12, 12, 11, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:00:20,366 INFO L371 AbstractCegarLoop]: === Iteration 17 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 17:00:20,367 INFO L82 PathProgramCache]: Analyzing trace with hash -1299772556, now seen corresponding path program 5 times [2018-01-24 17:00:20,367 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:00:20,367 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:00:20,368 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:00:20,368 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:00:20,368 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:00:20,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:00:20,388 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:00:20,593 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-24 17:00:20,593 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:00:20,593 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:00:20,593 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:00:20,594 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:00:20,594 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:00:20,594 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:00:20,599 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 17:00:20,599 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:00:20,608 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:20,610 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:20,613 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:20,617 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:20,623 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:20,634 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:20,659 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:20,705 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:20,742 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:20,755 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:20,817 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:20,993 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:20,997 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:00:21,000 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:00:21,017 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-24 17:00:21,017 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:00:21,177 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-24 17:00:21,199 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:00:21,199 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:00:21,202 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 17:00:21,202 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:00:21,215 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:21,221 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:21,231 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:21,245 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:21,266 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:21,315 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:21,378 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:21,466 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:21,583 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:21,965 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:22,447 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:23,085 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:00:23,130 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:00:23,136 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:00:23,146 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-24 17:00:23,146 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:00:23,184 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-24 17:00:23,186 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:00:23,186 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 14, 14, 14, 14] total 29 [2018-01-24 17:00:23,186 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:00:23,186 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 17:00:23,187 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 17:00:23,187 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=355, Invalid=457, Unknown=0, NotChecked=0, Total=812 [2018-01-24 17:00:23,187 INFO L87 Difference]: Start difference. First operand 119 states and 120 transitions. Second operand 17 states. [2018-01-24 17:00:23,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:00:23,363 INFO L93 Difference]: Finished difference Result 190 states and 193 transitions. [2018-01-24 17:00:23,364 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 17:00:23,364 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 113 [2018-01-24 17:00:23,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:00:23,364 INFO L225 Difference]: With dead ends: 190 [2018-01-24 17:00:23,365 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 17:00:23,365 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 490 GetRequests, 451 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 131 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=680, Invalid=960, Unknown=0, NotChecked=0, Total=1640 [2018-01-24 17:00:23,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 17:00:23,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 127. [2018-01-24 17:00:23,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-01-24 17:00:23,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 128 transitions. [2018-01-24 17:00:23,378 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 128 transitions. Word has length 113 [2018-01-24 17:00:23,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:00:23,378 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 128 transitions. [2018-01-24 17:00:23,378 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 17:00:23,378 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 128 transitions. [2018-01-24 17:00:23,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-01-24 17:00:23,379 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:00:23,379 INFO L322 BasicCegarLoop]: trace histogram [13, 13, 12, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:00:23,379 INFO L371 AbstractCegarLoop]: === Iteration 18 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 17:00:23,380 INFO L82 PathProgramCache]: Analyzing trace with hash -1012020652, now seen corresponding path program 6 times [2018-01-24 17:00:23,380 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:00:23,381 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:00:23,381 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:00:23,381 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:00:23,381 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:00:23,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:00:23,403 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:00:23,591 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-24 17:00:23,591 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:00:23,591 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:00:23,591 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:00:23,591 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:00:23,591 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:00:23,591 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:00:23,597 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 17:00:23,597 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 17:00:23,612 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:23,616 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:23,619 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:23,623 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:23,632 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:23,652 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:23,676 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:23,817 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:23,898 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:24,086 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:24,185 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:24,473 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:24,713 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:24,715 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:00:24,721 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:00:24,737 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-24 17:00:24,737 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:00:24,926 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-24 17:00:24,948 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:00:24,948 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:00:24,952 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 17:00:24,952 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 17:00:24,973 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:25,030 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:25,097 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:25,197 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:25,368 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:25,525 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command Received shutdown request... [2018-01-24 17:00:25,919 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:00:27,152 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command Cannot interrupt operation gracefully because timeout expired. Forcing shutdown