java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_5_false-valid-deref.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 17:16:13,473 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 17:16:13,485 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 17:16:13,497 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 17:16:13,498 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 17:16:13,499 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 17:16:13,500 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 17:16:13,501 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 17:16:13,504 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 17:16:13,504 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 17:16:13,505 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 17:16:13,505 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 17:16:13,506 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 17:16:13,506 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 17:16:13,507 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 17:16:13,509 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 17:16:13,512 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 17:16:13,514 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 17:16:13,515 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 17:16:13,516 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 17:16:13,518 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 17:16:13,519 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 17:16:13,519 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 17:16:13,520 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 17:16:13,521 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 17:16:13,522 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 17:16:13,522 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 17:16:13,523 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 17:16:13,523 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 17:16:13,523 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 17:16:13,524 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 17:16:13,524 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf [2018-01-24 17:16:13,535 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 17:16:13,535 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 17:16:13,536 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 17:16:13,536 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 17:16:13,536 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 17:16:13,537 INFO L133 SettingsManager]: * Deactivate Weak Equivalences=true [2018-01-24 17:16:13,537 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 17:16:13,537 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 17:16:13,538 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 17:16:13,538 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 17:16:13,538 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 17:16:13,538 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 17:16:13,538 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 17:16:13,539 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 17:16:13,539 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 17:16:13,539 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 17:16:13,539 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 17:16:13,539 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 17:16:13,540 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 17:16:13,540 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 17:16:13,540 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 17:16:13,540 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 17:16:13,541 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 17:16:13,541 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 17:16:13,541 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 17:16:13,541 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 17:16:13,541 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 17:16:13,542 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 17:16:13,542 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 17:16:13,542 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-24 17:16:13,542 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 17:16:13,542 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 17:16:13,543 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 17:16:13,543 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-24 17:16:13,544 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 17:16:13,544 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 17:16:13,578 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 17:16:13,588 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 17:16:13,591 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 17:16:13,592 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 17:16:13,593 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 17:16:13,593 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_5_false-valid-deref.i [2018-01-24 17:16:13,774 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 17:16:13,780 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 17:16:13,781 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 17:16:13,781 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 17:16:13,787 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 17:16:13,788 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 05:16:13" (1/1) ... [2018-01-24 17:16:13,791 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5c336041 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:13, skipping insertion in model container [2018-01-24 17:16:13,792 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 05:16:13" (1/1) ... [2018-01-24 17:16:13,813 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 17:16:13,867 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 17:16:13,997 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 17:16:14,024 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 17:16:14,036 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14 WrapperNode [2018-01-24 17:16:14,036 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 17:16:14,037 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 17:16:14,037 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 17:16:14,037 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 17:16:14,048 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (1/1) ... [2018-01-24 17:16:14,048 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (1/1) ... [2018-01-24 17:16:14,058 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (1/1) ... [2018-01-24 17:16:14,058 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (1/1) ... [2018-01-24 17:16:14,066 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (1/1) ... [2018-01-24 17:16:14,069 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (1/1) ... [2018-01-24 17:16:14,071 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (1/1) ... [2018-01-24 17:16:14,074 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 17:16:14,074 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 17:16:14,074 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 17:16:14,074 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 17:16:14,075 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 17:16:14,124 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 17:16:14,124 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 17:16:14,125 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 17:16:14,125 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 17:16:14,125 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-24 17:16:14,125 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-24 17:16:14,125 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-24 17:16:14,125 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-24 17:16:14,126 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-24 17:16:14,126 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-24 17:16:14,126 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-24 17:16:14,126 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-24 17:16:14,126 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-24 17:16:14,126 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-24 17:16:14,127 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-24 17:16:14,127 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_put [2018-01-24 17:16:14,127 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 17:16:14,127 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 17:16:14,127 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 17:16:14,127 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 17:16:14,128 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 17:16:14,128 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 17:16:14,128 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 17:16:14,128 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 17:16:14,128 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 17:16:14,129 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-24 17:16:14,129 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-24 17:16:14,129 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 17:16:14,129 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 17:16:14,129 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 17:16:14,129 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-24 17:16:14,130 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 17:16:14,130 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-24 17:16:14,130 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-24 17:16:14,130 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-24 17:16:14,130 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 17:16:14,130 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-24 17:16:14,131 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-24 17:16:14,131 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-24 17:16:14,131 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-24 17:16:14,131 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-24 17:16:14,131 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-24 17:16:14,131 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-24 17:16:14,131 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-24 17:16:14,132 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_put [2018-01-24 17:16:14,132 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 17:16:14,132 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 17:16:14,132 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 17:16:14,132 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 17:16:14,368 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-24 17:16:14,533 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 17:16:14,534 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 05:16:14 BoogieIcfgContainer [2018-01-24 17:16:14,534 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 17:16:14,535 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 17:16:14,535 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 17:16:14,537 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 17:16:14,537 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 05:16:13" (1/3) ... [2018-01-24 17:16:14,539 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1008e982 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 05:16:14, skipping insertion in model container [2018-01-24 17:16:14,539 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (2/3) ... [2018-01-24 17:16:14,539 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1008e982 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 05:16:14, skipping insertion in model container [2018-01-24 17:16:14,539 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 05:16:14" (3/3) ... [2018-01-24 17:16:14,541 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test22_5_false-valid-deref.i [2018-01-24 17:16:14,551 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 17:16:14,559 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 19 error locations. [2018-01-24 17:16:14,611 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 17:16:14,612 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 17:16:14,612 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 17:16:14,612 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 17:16:14,612 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 17:16:14,612 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 17:16:14,612 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 17:16:14,613 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 17:16:14,613 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 17:16:14,637 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states. [2018-01-24 17:16:14,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 17:16:14,644 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:14,646 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:14,646 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:14,652 INFO L82 PathProgramCache]: Analyzing trace with hash 1211515492, now seen corresponding path program 1 times [2018-01-24 17:16:14,654 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:14,707 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:14,708 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:14,708 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:14,708 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:14,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:14,769 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:14,898 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:14,900 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:14,900 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 17:16:14,900 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:14,972 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 17:16:14,987 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 17:16:14,988 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:16:14,991 INFO L87 Difference]: Start difference. First operand 123 states. Second operand 5 states. [2018-01-24 17:16:15,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:15,072 INFO L93 Difference]: Finished difference Result 234 states and 249 transitions. [2018-01-24 17:16:15,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 17:16:15,074 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 17:16:15,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:15,090 INFO L225 Difference]: With dead ends: 234 [2018-01-24 17:16:15,091 INFO L226 Difference]: Without dead ends: 126 [2018-01-24 17:16:15,095 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:16:15,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-01-24 17:16:15,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 124. [2018-01-24 17:16:15,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-01-24 17:16:15,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-01-24 17:16:15,152 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 17 [2018-01-24 17:16:15,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:15,152 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-01-24 17:16:15,153 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 17:16:15,153 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-01-24 17:16:15,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 17:16:15,154 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:15,154 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:15,154 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:15,154 INFO L82 PathProgramCache]: Analyzing trace with hash 774524518, now seen corresponding path program 1 times [2018-01-24 17:16:15,155 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:15,156 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:15,157 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:15,157 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:15,157 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:15,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:15,178 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:15,256 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:15,256 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:15,257 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 17:16:15,257 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:15,258 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:16:15,259 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:16:15,259 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:16:15,259 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 6 states. [2018-01-24 17:16:15,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:15,493 INFO L93 Difference]: Finished difference Result 126 states and 134 transitions. [2018-01-24 17:16:15,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:16:15,494 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-24 17:16:15,494 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:15,495 INFO L225 Difference]: With dead ends: 126 [2018-01-24 17:16:15,495 INFO L226 Difference]: Without dead ends: 125 [2018-01-24 17:16:15,496 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:16:15,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-01-24 17:16:15,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 123. [2018-01-24 17:16:15,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 17:16:15,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-01-24 17:16:15,506 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 19 [2018-01-24 17:16:15,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:15,506 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-01-24 17:16:15,506 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:16:15,506 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-01-24 17:16:15,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 17:16:15,507 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:15,507 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:15,507 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:15,507 INFO L82 PathProgramCache]: Analyzing trace with hash 774524519, now seen corresponding path program 1 times [2018-01-24 17:16:15,507 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:15,508 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:15,508 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:15,508 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:15,508 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:15,532 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:15,533 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:15,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:15,932 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:15,932 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 17:16:15,932 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:15,932 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:16:15,933 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:16:15,933 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:16:15,933 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 7 states. [2018-01-24 17:16:16,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:16,131 INFO L93 Difference]: Finished difference Result 125 states and 133 transitions. [2018-01-24 17:16:16,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 17:16:16,131 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-24 17:16:16,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:16,134 INFO L225 Difference]: With dead ends: 125 [2018-01-24 17:16:16,134 INFO L226 Difference]: Without dead ends: 124 [2018-01-24 17:16:16,135 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-01-24 17:16:16,135 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-01-24 17:16:16,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 122. [2018-01-24 17:16:16,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-24 17:16:16,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 130 transitions. [2018-01-24 17:16:16,149 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 130 transitions. Word has length 19 [2018-01-24 17:16:16,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:16,149 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 130 transitions. [2018-01-24 17:16:16,149 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:16:16,149 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 130 transitions. [2018-01-24 17:16:16,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-24 17:16:16,151 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:16,151 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:16,151 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:16,151 INFO L82 PathProgramCache]: Analyzing trace with hash 1886266821, now seen corresponding path program 1 times [2018-01-24 17:16:16,151 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:16,153 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:16,153 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:16,153 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:16,153 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:16,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:16,180 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:16,323 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:16,323 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:16,323 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:16:16,323 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:16,324 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 17:16:16,324 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 17:16:16,325 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-01-24 17:16:16,325 INFO L87 Difference]: Start difference. First operand 122 states and 130 transitions. Second operand 9 states. [2018-01-24 17:16:16,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:16,496 INFO L93 Difference]: Finished difference Result 198 states and 213 transitions. [2018-01-24 17:16:16,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:16:16,497 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 31 [2018-01-24 17:16:16,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:16,499 INFO L225 Difference]: With dead ends: 198 [2018-01-24 17:16:16,499 INFO L226 Difference]: Without dead ends: 139 [2018-01-24 17:16:16,500 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-01-24 17:16:16,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-01-24 17:16:16,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 135. [2018-01-24 17:16:16,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-24 17:16:16,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 144 transitions. [2018-01-24 17:16:16,517 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 144 transitions. Word has length 31 [2018-01-24 17:16:16,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:16,518 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 144 transitions. [2018-01-24 17:16:16,518 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 17:16:16,518 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 144 transitions. [2018-01-24 17:16:16,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 17:16:16,519 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:16,519 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:16,520 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:16,520 INFO L82 PathProgramCache]: Analyzing trace with hash 107698799, now seen corresponding path program 1 times [2018-01-24 17:16:16,520 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:16,521 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:16,522 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:16,522 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:16,522 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:16,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:16,540 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:16,657 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:16,657 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:16,657 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:16:16,657 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:16,658 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:16:16,658 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:16:16,658 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:16:16,658 INFO L87 Difference]: Start difference. First operand 135 states and 144 transitions. Second operand 10 states. [2018-01-24 17:16:16,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:16,872 INFO L93 Difference]: Finished difference Result 135 states and 144 transitions. [2018-01-24 17:16:16,872 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:16:16,872 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-01-24 17:16:16,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:16,874 INFO L225 Difference]: With dead ends: 135 [2018-01-24 17:16:16,874 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 17:16:16,874 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:16:16,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 17:16:16,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-01-24 17:16:16,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 17:16:16,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 143 transitions. [2018-01-24 17:16:16,885 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 143 transitions. Word has length 34 [2018-01-24 17:16:16,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:16,885 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 143 transitions. [2018-01-24 17:16:16,885 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:16:16,885 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 143 transitions. [2018-01-24 17:16:16,886 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 17:16:16,886 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:16,886 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:16,886 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:16,887 INFO L82 PathProgramCache]: Analyzing trace with hash 107698800, now seen corresponding path program 1 times [2018-01-24 17:16:16,887 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:16,888 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:16,888 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:16,888 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:16,888 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:16,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:16,905 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:16,939 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:16,939 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:16,939 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 17:16:16,939 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:16,939 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 17:16:16,940 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 17:16:16,940 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 17:16:16,943 INFO L87 Difference]: Start difference. First operand 134 states and 143 transitions. Second operand 4 states. [2018-01-24 17:16:16,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:16,973 INFO L93 Difference]: Finished difference Result 230 states and 245 transitions. [2018-01-24 17:16:16,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 17:16:16,973 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-01-24 17:16:16,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:16,975 INFO L225 Difference]: With dead ends: 230 [2018-01-24 17:16:16,975 INFO L226 Difference]: Without dead ends: 135 [2018-01-24 17:16:16,976 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:16:16,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-24 17:16:16,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-01-24 17:16:16,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-24 17:16:16,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 144 transitions. [2018-01-24 17:16:16,985 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 144 transitions. Word has length 34 [2018-01-24 17:16:16,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:16,985 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 144 transitions. [2018-01-24 17:16:16,986 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 17:16:16,986 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 144 transitions. [2018-01-24 17:16:16,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 17:16:16,986 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:16,987 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:16,987 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:16,987 INFO L82 PathProgramCache]: Analyzing trace with hash -1590593736, now seen corresponding path program 1 times [2018-01-24 17:16:16,987 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:16,988 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:16,988 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:16,988 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:16,988 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:17,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:17,007 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:17,055 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:17,056 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:17,056 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:17,057 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 36 with the following transitions: [2018-01-24 17:16:17,059 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [27], [32], [48], [54], [58], [62], [65], [67], [68], [72], [74], [75], [118], [121], [122], [123], [125], [126], [127], [135], [136], [137], [138], [139], [141], [145], [149], [155], [169], [170], [171] [2018-01-24 17:16:17,119 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:16:17,119 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:16:17,338 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:16:17,340 INFO L268 AbstractInterpreter]: Visited 35 different actions 39 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 21 variables. [2018-01-24 17:16:17,351 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:16:17,352 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:17,352 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:17,364 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:17,364 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:17,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:17,408 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:17,431 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:17,431 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:17,498 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:17,520 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:17,520 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:16:17,524 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:17,524 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:17,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:17,577 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:17,585 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:17,585 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:17,621 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:17,622 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:16:17,622 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-24 17:16:17,622 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:16:17,623 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:16:17,623 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:16:17,623 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-24 17:16:17,623 INFO L87 Difference]: Start difference. First operand 135 states and 144 transitions. Second operand 6 states. [2018-01-24 17:16:17,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:17,662 INFO L93 Difference]: Finished difference Result 231 states and 246 transitions. [2018-01-24 17:16:17,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 17:16:17,664 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-24 17:16:17,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:17,666 INFO L225 Difference]: With dead ends: 231 [2018-01-24 17:16:17,666 INFO L226 Difference]: Without dead ends: 136 [2018-01-24 17:16:17,667 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:16:17,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-01-24 17:16:17,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-01-24 17:16:17,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-24 17:16:17,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 145 transitions. [2018-01-24 17:16:17,676 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 145 transitions. Word has length 35 [2018-01-24 17:16:17,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:17,676 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 145 transitions. [2018-01-24 17:16:17,676 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:16:17,676 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 145 transitions. [2018-01-24 17:16:17,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 17:16:17,677 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:17,678 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:17,678 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:17,678 INFO L82 PathProgramCache]: Analyzing trace with hash 1596912496, now seen corresponding path program 2 times [2018-01-24 17:16:17,678 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:17,679 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:17,680 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:17,680 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:17,680 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:17,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:17,713 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:17,799 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:17,799 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:17,800 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:17,800 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:16:17,800 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:16:17,800 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:17,800 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:17,820 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:16:17,820 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:16:17,843 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:17,853 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:17,858 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:17,885 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:16:17,887 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:16:17,963 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:16:17,964 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:16:18,015 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:16:18,016 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:16:18,768 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:16:18,768 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:22,804 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:16:22,824 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:16:22,824 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14, 13] imperfect sequences [6] total 31 [2018-01-24 17:16:22,824 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:22,825 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 17:16:22,825 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 17:16:22,825 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=839, Unknown=1, NotChecked=0, Total=930 [2018-01-24 17:16:22,825 INFO L87 Difference]: Start difference. First operand 136 states and 145 transitions. Second operand 15 states. [2018-01-24 17:16:23,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:23,842 INFO L93 Difference]: Finished difference Result 153 states and 162 transitions. [2018-01-24 17:16:23,842 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 17:16:23,842 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 36 [2018-01-24 17:16:23,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:23,844 INFO L225 Difference]: With dead ends: 153 [2018-01-24 17:16:23,844 INFO L226 Difference]: Without dead ends: 152 [2018-01-24 17:16:23,845 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 244 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=118, Invalid=1071, Unknown=1, NotChecked=0, Total=1190 [2018-01-24 17:16:23,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-01-24 17:16:23,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 135. [2018-01-24 17:16:23,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-24 17:16:23,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 144 transitions. [2018-01-24 17:16:23,861 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 144 transitions. Word has length 36 [2018-01-24 17:16:23,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:23,862 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 144 transitions. [2018-01-24 17:16:23,862 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 17:16:23,862 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 144 transitions. [2018-01-24 17:16:23,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 17:16:23,863 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:23,864 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:23,864 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:23,864 INFO L82 PathProgramCache]: Analyzing trace with hash 2040634480, now seen corresponding path program 1 times [2018-01-24 17:16:23,864 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:23,865 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:23,866 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:16:23,866 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:23,866 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:23,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:23,876 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:23,915 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-24 17:16:23,915 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:23,916 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 17:16:23,916 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:23,916 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 17:16:23,916 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 17:16:23,917 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 17:16:23,917 INFO L87 Difference]: Start difference. First operand 135 states and 144 transitions. Second operand 3 states. [2018-01-24 17:16:24,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:24,040 INFO L93 Difference]: Finished difference Result 154 states and 165 transitions. [2018-01-24 17:16:24,040 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 17:16:24,040 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 36 [2018-01-24 17:16:24,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:24,041 INFO L225 Difference]: With dead ends: 154 [2018-01-24 17:16:24,042 INFO L226 Difference]: Without dead ends: 141 [2018-01-24 17:16:24,042 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 17:16:24,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-01-24 17:16:24,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 131. [2018-01-24 17:16:24,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-01-24 17:16:24,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 139 transitions. [2018-01-24 17:16:24,064 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 139 transitions. Word has length 36 [2018-01-24 17:16:24,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:24,064 INFO L432 AbstractCegarLoop]: Abstraction has 131 states and 139 transitions. [2018-01-24 17:16:24,064 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 17:16:24,064 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 139 transitions. [2018-01-24 17:16:24,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-24 17:16:24,066 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:24,066 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:24,066 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:24,067 INFO L82 PathProgramCache]: Analyzing trace with hash 746437934, now seen corresponding path program 1 times [2018-01-24 17:16:24,067 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:24,068 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:24,068 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:24,068 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:24,068 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:24,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:24,077 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:24,122 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-24 17:16:24,122 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:24,122 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 17:16:24,122 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:24,123 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:16:24,123 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:16:24,123 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:16:24,123 INFO L87 Difference]: Start difference. First operand 131 states and 139 transitions. Second operand 6 states. [2018-01-24 17:16:24,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:24,158 INFO L93 Difference]: Finished difference Result 135 states and 142 transitions. [2018-01-24 17:16:24,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:16:24,159 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 38 [2018-01-24 17:16:24,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:24,160 INFO L225 Difference]: With dead ends: 135 [2018-01-24 17:16:24,160 INFO L226 Difference]: Without dead ends: 118 [2018-01-24 17:16:24,161 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:16:24,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-01-24 17:16:24,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 118. [2018-01-24 17:16:24,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-01-24 17:16:24,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 124 transitions. [2018-01-24 17:16:24,177 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 124 transitions. Word has length 38 [2018-01-24 17:16:24,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:24,178 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 124 transitions. [2018-01-24 17:16:24,178 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:16:24,178 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 124 transitions. [2018-01-24 17:16:24,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 17:16:24,179 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:24,179 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:24,179 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:24,179 INFO L82 PathProgramCache]: Analyzing trace with hash 1456559415, now seen corresponding path program 1 times [2018-01-24 17:16:24,179 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:24,180 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:24,181 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:24,181 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:24,181 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:24,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:24,198 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:24,312 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:16:24,313 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:24,313 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:16:24,313 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:24,313 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:16:24,314 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:16:24,314 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:16:24,314 INFO L87 Difference]: Start difference. First operand 118 states and 124 transitions. Second operand 10 states. [2018-01-24 17:16:24,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:24,590 INFO L93 Difference]: Finished difference Result 118 states and 124 transitions. [2018-01-24 17:16:24,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:16:24,590 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 41 [2018-01-24 17:16:24,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:24,591 INFO L225 Difference]: With dead ends: 118 [2018-01-24 17:16:24,591 INFO L226 Difference]: Without dead ends: 116 [2018-01-24 17:16:24,592 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:16:24,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-01-24 17:16:24,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2018-01-24 17:16:24,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-01-24 17:16:24,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 122 transitions. [2018-01-24 17:16:24,603 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 122 transitions. Word has length 41 [2018-01-24 17:16:24,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:24,604 INFO L432 AbstractCegarLoop]: Abstraction has 116 states and 122 transitions. [2018-01-24 17:16:24,604 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:16:24,604 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 122 transitions. [2018-01-24 17:16:24,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 17:16:24,605 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:24,605 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:24,605 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:24,605 INFO L82 PathProgramCache]: Analyzing trace with hash 1456559416, now seen corresponding path program 1 times [2018-01-24 17:16:24,605 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:24,606 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:24,606 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:24,606 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:24,606 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:24,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:24,622 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:24,687 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:24,687 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:24,687 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:24,687 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 42 with the following transitions: [2018-01-24 17:16:24,688 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [27], [32], [48], [54], [58], [62], [63], [66], [67], [68], [72], [74], [75], [107], [110], [118], [121], [122], [123], [125], [126], [127], [135], [136], [137], [138], [139], [141], [145], [149], [155], [156], [157], [169], [170], [171] [2018-01-24 17:16:24,690 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:16:24,690 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:16:24,806 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:16:24,806 INFO L268 AbstractInterpreter]: Visited 40 different actions 44 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 21 variables. [2018-01-24 17:16:24,808 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:16:24,808 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:24,808 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:24,815 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:24,816 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:24,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:24,851 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:24,862 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:24,863 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:24,984 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:25,006 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:25,006 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:16:25,012 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:25,012 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:25,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:25,067 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:25,073 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:25,073 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:25,183 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:25,185 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:16:25,185 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-24 17:16:25,185 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:16:25,186 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:16:25,186 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:16:25,186 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-24 17:16:25,186 INFO L87 Difference]: Start difference. First operand 116 states and 122 transitions. Second operand 7 states. [2018-01-24 17:16:25,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:25,216 INFO L93 Difference]: Finished difference Result 209 states and 221 transitions. [2018-01-24 17:16:25,217 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:16:25,217 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 41 [2018-01-24 17:16:25,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:25,218 INFO L225 Difference]: With dead ends: 209 [2018-01-24 17:16:25,218 INFO L226 Difference]: Without dead ends: 117 [2018-01-24 17:16:25,219 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-24 17:16:25,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-01-24 17:16:25,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2018-01-24 17:16:25,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-01-24 17:16:25,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 123 transitions. [2018-01-24 17:16:25,233 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 123 transitions. Word has length 41 [2018-01-24 17:16:25,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:25,234 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 123 transitions. [2018-01-24 17:16:25,234 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:16:25,234 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 123 transitions. [2018-01-24 17:16:25,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 17:16:25,235 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:25,235 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:25,235 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:25,235 INFO L82 PathProgramCache]: Analyzing trace with hash -98646160, now seen corresponding path program 2 times [2018-01-24 17:16:25,236 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:25,236 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:25,237 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:25,237 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:25,237 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:25,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:25,251 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:25,348 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:25,348 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:25,348 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:25,348 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:16:25,348 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:16:25,348 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:25,348 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:25,359 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:16:25,359 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:16:25,378 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:25,381 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:25,385 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:25,390 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:16:25,390 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:16:25,459 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:16:25,459 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:16:25,476 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:16:25,476 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:16:26,093 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:16:26,094 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:26,495 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:16:26,515 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:16:26,515 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15, 13] imperfect sequences [7] total 33 [2018-01-24 17:16:26,515 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:26,515 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 17:16:26,515 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 17:16:26,516 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=951, Unknown=0, NotChecked=0, Total=1056 [2018-01-24 17:16:26,516 INFO L87 Difference]: Start difference. First operand 117 states and 123 transitions. Second operand 16 states. [2018-01-24 17:16:27,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:27,165 INFO L93 Difference]: Finished difference Result 117 states and 123 transitions. [2018-01-24 17:16:27,166 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 17:16:27,166 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 42 [2018-01-24 17:16:27,166 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:27,167 INFO L225 Difference]: With dead ends: 117 [2018-01-24 17:16:27,167 INFO L226 Difference]: Without dead ends: 115 [2018-01-24 17:16:27,167 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 57 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 317 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=136, Invalid=1196, Unknown=0, NotChecked=0, Total=1332 [2018-01-24 17:16:27,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-01-24 17:16:27,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-01-24 17:16:27,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-01-24 17:16:27,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 121 transitions. [2018-01-24 17:16:27,181 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 121 transitions. Word has length 42 [2018-01-24 17:16:27,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:27,181 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 121 transitions. [2018-01-24 17:16:27,181 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 17:16:27,182 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 121 transitions. [2018-01-24 17:16:27,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-24 17:16:27,182 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:27,183 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:27,183 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:27,183 INFO L82 PathProgramCache]: Analyzing trace with hash 293114675, now seen corresponding path program 1 times [2018-01-24 17:16:27,183 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:27,184 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:27,184 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:16:27,185 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:27,185 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:27,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:27,199 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:27,266 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:16:27,267 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:27,267 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 17:16:27,267 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:27,267 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 17:16:27,268 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 17:16:27,268 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-24 17:16:27,268 INFO L87 Difference]: Start difference. First operand 115 states and 121 transitions. Second operand 8 states. [2018-01-24 17:16:27,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:27,309 INFO L93 Difference]: Finished difference Result 183 states and 192 transitions. [2018-01-24 17:16:27,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:16:27,309 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 49 [2018-01-24 17:16:27,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:27,310 INFO L225 Difference]: With dead ends: 183 [2018-01-24 17:16:27,310 INFO L226 Difference]: Without dead ends: 115 [2018-01-24 17:16:27,311 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:16:27,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-01-24 17:16:27,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-01-24 17:16:27,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-01-24 17:16:27,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 120 transitions. [2018-01-24 17:16:27,322 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 120 transitions. Word has length 49 [2018-01-24 17:16:27,322 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:27,322 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 120 transitions. [2018-01-24 17:16:27,322 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 17:16:27,322 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 120 transitions. [2018-01-24 17:16:27,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-24 17:16:27,322 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:27,323 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:27,323 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:27,323 INFO L82 PathProgramCache]: Analyzing trace with hash 1097015104, now seen corresponding path program 1 times [2018-01-24 17:16:27,323 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:27,323 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:27,324 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:27,324 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:27,324 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:27,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:27,333 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:27,455 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:16:27,455 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:27,455 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-24 17:16:27,455 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:27,456 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:16:27,456 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:16:27,456 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:16:27,456 INFO L87 Difference]: Start difference. First operand 115 states and 120 transitions. Second operand 10 states. [2018-01-24 17:16:27,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:27,525 INFO L93 Difference]: Finished difference Result 185 states and 193 transitions. [2018-01-24 17:16:27,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:16:27,525 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 54 [2018-01-24 17:16:27,525 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:27,526 INFO L225 Difference]: With dead ends: 185 [2018-01-24 17:16:27,526 INFO L226 Difference]: Without dead ends: 115 [2018-01-24 17:16:27,526 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:16:27,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-01-24 17:16:27,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-01-24 17:16:27,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-01-24 17:16:27,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 119 transitions. [2018-01-24 17:16:27,538 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 119 transitions. Word has length 54 [2018-01-24 17:16:27,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:27,538 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 119 transitions. [2018-01-24 17:16:27,539 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:16:27,539 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 119 transitions. [2018-01-24 17:16:27,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-01-24 17:16:27,539 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:27,539 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:27,539 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:27,540 INFO L82 PathProgramCache]: Analyzing trace with hash -399143288, now seen corresponding path program 1 times [2018-01-24 17:16:27,540 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:27,540 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:27,541 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:27,541 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:27,541 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:27,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:27,559 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:27,852 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:16:27,852 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:27,852 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2018-01-24 17:16:27,852 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:27,853 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-24 17:16:27,853 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-24 17:16:27,853 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=461, Unknown=0, NotChecked=0, Total=506 [2018-01-24 17:16:27,853 INFO L87 Difference]: Start difference. First operand 115 states and 119 transitions. Second operand 23 states. [2018-01-24 17:16:28,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:28,489 INFO L93 Difference]: Finished difference Result 144 states and 154 transitions. [2018-01-24 17:16:28,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 17:16:28,490 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 65 [2018-01-24 17:16:28,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:28,491 INFO L225 Difference]: With dead ends: 144 [2018-01-24 17:16:28,491 INFO L226 Difference]: Without dead ends: 142 [2018-01-24 17:16:28,492 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=77, Invalid=853, Unknown=0, NotChecked=0, Total=930 [2018-01-24 17:16:28,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-01-24 17:16:28,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 137. [2018-01-24 17:16:28,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-01-24 17:16:28,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 147 transitions. [2018-01-24 17:16:28,505 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 147 transitions. Word has length 65 [2018-01-24 17:16:28,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:28,506 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 147 transitions. [2018-01-24 17:16:28,506 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-24 17:16:28,506 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 147 transitions. [2018-01-24 17:16:28,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-01-24 17:16:28,506 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:28,507 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:28,507 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:28,507 INFO L82 PathProgramCache]: Analyzing trace with hash -399143287, now seen corresponding path program 1 times [2018-01-24 17:16:28,507 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:28,508 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:28,508 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:28,508 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:28,508 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:28,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:28,534 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:28,609 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:28,609 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:28,609 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:28,609 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 66 with the following transitions: [2018-01-24 17:16:28,610 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [32], [34], [35], [38], [48], [50], [54], [58], [61], [62], [63], [66], [67], [68], [72], [74], [75], [76], [107], [108], [111], [114], [115], [118], [121], [122], [123], [125], [126], [127], [128], [135], [136], [137], [138], [139], [140], [141], [143], [145], [146], [149], [150], [151], [155], [156], [157], [158], [159], [165], [167], [169], [170], [171] [2018-01-24 17:16:28,612 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:16:28,613 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:16:28,783 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:16:28,783 INFO L268 AbstractInterpreter]: Visited 63 different actions 67 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 26 variables. [2018-01-24 17:16:28,786 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:16:28,787 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:28,787 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:28,796 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:28,796 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:28,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:28,851 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:28,919 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:28,919 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:29,149 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:29,182 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:29,182 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:16:29,188 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:29,188 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:29,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:29,281 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:29,288 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:29,289 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:29,365 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:29,367 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:16:29,367 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-24 17:16:29,367 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:16:29,368 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 17:16:29,368 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 17:16:29,368 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:16:29,368 INFO L87 Difference]: Start difference. First operand 137 states and 147 transitions. Second operand 8 states. [2018-01-24 17:16:29,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:29,411 INFO L93 Difference]: Finished difference Result 250 states and 270 transitions. [2018-01-24 17:16:29,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 17:16:29,412 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 65 [2018-01-24 17:16:29,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:29,413 INFO L225 Difference]: With dead ends: 250 [2018-01-24 17:16:29,413 INFO L226 Difference]: Without dead ends: 138 [2018-01-24 17:16:29,414 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 266 GetRequests, 252 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-24 17:16:29,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-01-24 17:16:29,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-01-24 17:16:29,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-01-24 17:16:29,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 148 transitions. [2018-01-24 17:16:29,436 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 148 transitions. Word has length 65 [2018-01-24 17:16:29,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:29,436 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 148 transitions. [2018-01-24 17:16:29,436 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 17:16:29,436 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 148 transitions. [2018-01-24 17:16:29,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-01-24 17:16:29,437 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:29,437 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:29,438 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:29,438 INFO L82 PathProgramCache]: Analyzing trace with hash 559798465, now seen corresponding path program 2 times [2018-01-24 17:16:29,438 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:29,439 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:29,439 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:29,439 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:29,440 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:29,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:29,462 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:29,534 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:29,535 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:29,535 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:29,535 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:16:29,535 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:16:29,535 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:29,535 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:29,547 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:16:29,548 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:16:29,591 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:29,598 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:29,603 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:29,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:16:29,622 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:16:29,657 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:16:29,658 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:16:29,673 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:16:29,674 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:16:31,955 WARN L143 SmtUtils]: Spent 2020ms on a formula simplification that was a NOOP. DAG size: 27 [2018-01-24 17:16:32,609 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:16:32,609 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:37,509 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:16:37,532 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:16:37,532 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22, 20] imperfect sequences [8] total 48 [2018-01-24 17:16:37,532 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:37,533 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-24 17:16:37,533 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-24 17:16:37,533 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=160, Invalid=2094, Unknown=2, NotChecked=0, Total=2256 [2018-01-24 17:16:37,534 INFO L87 Difference]: Start difference. First operand 138 states and 148 transitions. Second operand 23 states. [2018-01-24 17:16:38,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:38,645 INFO L93 Difference]: Finished difference Result 138 states and 148 transitions. [2018-01-24 17:16:38,645 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-24 17:16:38,645 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 66 [2018-01-24 17:16:38,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:38,646 INFO L225 Difference]: With dead ends: 138 [2018-01-24 17:16:38,646 INFO L226 Difference]: Without dead ends: 136 [2018-01-24 17:16:38,647 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 91 SyntacticMatches, 2 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 762 ImplicationChecksByTransitivity, 7.9s TimeCoverageRelationStatistics Valid=217, Invalid=2751, Unknown=2, NotChecked=0, Total=2970 [2018-01-24 17:16:38,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-01-24 17:16:38,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-01-24 17:16:38,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-24 17:16:38,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 144 transitions. [2018-01-24 17:16:38,663 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 144 transitions. Word has length 66 [2018-01-24 17:16:38,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:38,663 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 144 transitions. [2018-01-24 17:16:38,663 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-24 17:16:38,663 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 144 transitions. [2018-01-24 17:16:38,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-01-24 17:16:38,664 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:38,664 INFO L322 BasicCegarLoop]: trace histogram [4, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:38,664 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:38,665 INFO L82 PathProgramCache]: Analyzing trace with hash -1638383027, now seen corresponding path program 1 times [2018-01-24 17:16:38,665 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:38,665 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:38,666 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:16:38,666 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:38,666 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:38,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:38,680 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:38,880 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:16:38,880 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:38,880 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-01-24 17:16:38,880 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:38,880 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 17:16:38,881 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 17:16:38,881 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:16:38,881 INFO L87 Difference]: Start difference. First operand 136 states and 144 transitions. Second operand 13 states. [2018-01-24 17:16:39,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:39,034 INFO L93 Difference]: Finished difference Result 194 states and 204 transitions. [2018-01-24 17:16:39,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 17:16:39,034 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 73 [2018-01-24 17:16:39,034 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:39,035 INFO L225 Difference]: With dead ends: 194 [2018-01-24 17:16:39,035 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 17:16:39,036 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-01-24 17:16:39,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 17:16:39,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-01-24 17:16:39,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 17:16:39,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 140 transitions. [2018-01-24 17:16:39,058 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 140 transitions. Word has length 73 [2018-01-24 17:16:39,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:39,058 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 140 transitions. [2018-01-24 17:16:39,059 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 17:16:39,059 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 140 transitions. [2018-01-24 17:16:39,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-01-24 17:16:39,060 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:39,060 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:39,060 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:39,060 INFO L82 PathProgramCache]: Analyzing trace with hash 154562580, now seen corresponding path program 1 times [2018-01-24 17:16:39,060 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:39,061 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:39,061 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:39,061 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:39,061 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:39,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:39,080 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:39,396 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:16:39,396 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:39,396 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2018-01-24 17:16:39,396 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:39,397 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-24 17:16:39,397 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-24 17:16:39,397 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=649, Unknown=0, NotChecked=0, Total=702 [2018-01-24 17:16:39,398 INFO L87 Difference]: Start difference. First operand 134 states and 140 transitions. Second operand 27 states. [2018-01-24 17:16:39,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:39,938 INFO L93 Difference]: Finished difference Result 146 states and 156 transitions. [2018-01-24 17:16:39,938 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-24 17:16:39,938 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 80 [2018-01-24 17:16:39,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:39,939 INFO L225 Difference]: With dead ends: 146 [2018-01-24 17:16:39,939 INFO L226 Difference]: Without dead ends: 144 [2018-01-24 17:16:39,940 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 96 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=93, Invalid=1239, Unknown=0, NotChecked=0, Total=1332 [2018-01-24 17:16:39,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-01-24 17:16:39,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 140. [2018-01-24 17:16:39,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-01-24 17:16:39,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 150 transitions. [2018-01-24 17:16:39,966 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 150 transitions. Word has length 80 [2018-01-24 17:16:39,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:39,966 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 150 transitions. [2018-01-24 17:16:39,967 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-24 17:16:39,967 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 150 transitions. [2018-01-24 17:16:39,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-01-24 17:16:39,968 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:39,968 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:39,968 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:39,968 INFO L82 PathProgramCache]: Analyzing trace with hash 154562581, now seen corresponding path program 1 times [2018-01-24 17:16:39,968 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:39,969 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:39,969 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:39,969 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:39,969 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:39,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:39,990 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:40,073 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:40,074 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:40,074 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:40,074 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 81 with the following transitions: [2018-01-24 17:16:40,074 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [32], [34], [35], [36], [39], [40], [43], [44], [45], [48], [50], [54], [58], [61], [62], [63], [66], [67], [68], [72], [74], [75], [76], [78], [81], [86], [89], [92], [107], [108], [111], [114], [115], [118], [121], [122], [123], [125], [126], [127], [128], [135], [136], [137], [138], [139], [140], [141], [143], [145], [146], [147], [149], [150], [151], [155], [156], [157], [158], [159], [160], [161], [163], [165], [167], [169], [170], [171] [2018-01-24 17:16:40,077 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:16:40,077 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:16:40,285 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:16:40,285 INFO L268 AbstractInterpreter]: Visited 77 different actions 81 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 27 variables. [2018-01-24 17:16:40,286 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:16:40,287 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:40,287 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:40,292 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:40,292 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:40,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:40,332 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:40,341 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:40,341 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:40,506 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:40,528 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:40,528 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:16:40,531 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:40,531 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:40,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:40,673 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:40,682 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:40,682 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:40,792 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:40,794 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:16:40,794 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-24 17:16:40,795 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:16:40,795 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 17:16:40,795 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 17:16:40,795 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-24 17:16:40,795 INFO L87 Difference]: Start difference. First operand 140 states and 150 transitions. Second operand 9 states. [2018-01-24 17:16:40,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:40,845 INFO L93 Difference]: Finished difference Result 255 states and 275 transitions. [2018-01-24 17:16:40,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:16:40,846 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 80 [2018-01-24 17:16:40,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:40,847 INFO L225 Difference]: With dead ends: 255 [2018-01-24 17:16:40,847 INFO L226 Difference]: Without dead ends: 141 [2018-01-24 17:16:40,848 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 327 GetRequests, 311 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-24 17:16:40,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-01-24 17:16:40,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-01-24 17:16:40,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-01-24 17:16:40,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 151 transitions. [2018-01-24 17:16:40,872 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 151 transitions. Word has length 80 [2018-01-24 17:16:40,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:40,872 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 151 transitions. [2018-01-24 17:16:40,872 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 17:16:40,872 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 151 transitions. [2018-01-24 17:16:40,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-01-24 17:16:40,873 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:40,874 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:40,874 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:40,874 INFO L82 PathProgramCache]: Analyzing trace with hash -585535779, now seen corresponding path program 2 times [2018-01-24 17:16:40,874 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:40,875 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:40,875 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:40,875 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:40,875 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:40,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:40,896 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:41,008 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:41,008 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:41,008 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:41,008 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:16:41,008 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:16:41,008 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:41,009 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:41,020 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:16:41,020 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:16:41,072 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:41,081 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:41,086 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:41,093 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:16:41,093 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:16:41,118 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:16:41,119 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:16:41,142 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:16:41,142 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:16:42,208 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 17:16:42,209 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:47,212 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 17:16:47,231 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:16:47,232 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26, 24] imperfect sequences [9] total 57 [2018-01-24 17:16:47,232 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:47,232 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-24 17:16:47,232 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-24 17:16:47,233 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=195, Invalid=2995, Unknown=2, NotChecked=0, Total=3192 [2018-01-24 17:16:47,233 INFO L87 Difference]: Start difference. First operand 141 states and 151 transitions. Second operand 27 states. [2018-01-24 17:16:48,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:48,588 INFO L93 Difference]: Finished difference Result 141 states and 151 transitions. [2018-01-24 17:16:48,588 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-24 17:16:48,588 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 81 [2018-01-24 17:16:48,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:48,589 INFO L225 Difference]: With dead ends: 141 [2018-01-24 17:16:48,589 INFO L226 Difference]: Without dead ends: 139 [2018-01-24 17:16:48,590 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 179 GetRequests, 111 SyntacticMatches, 4 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1149 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=268, Invalid=4020, Unknown=2, NotChecked=0, Total=4290 [2018-01-24 17:16:48,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-01-24 17:16:48,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-01-24 17:16:48,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-01-24 17:16:48,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 148 transitions. [2018-01-24 17:16:48,609 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 148 transitions. Word has length 81 [2018-01-24 17:16:48,610 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:48,610 INFO L432 AbstractCegarLoop]: Abstraction has 139 states and 148 transitions. [2018-01-24 17:16:48,610 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-24 17:16:48,610 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 148 transitions. [2018-01-24 17:16:48,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-01-24 17:16:48,611 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:48,611 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:48,611 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:48,611 INFO L82 PathProgramCache]: Analyzing trace with hash -1024705250, now seen corresponding path program 1 times [2018-01-24 17:16:48,612 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:48,612 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:48,612 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:16:48,613 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:48,613 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:48,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:48,635 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:48,731 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:48,731 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:48,731 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:48,731 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 86 with the following transitions: [2018-01-24 17:16:48,732 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [32], [34], [35], [36], [39], [40], [43], [44], [45], [48], [50], [54], [58], [61], [62], [63], [66], [67], [68], [72], [74], [75], [76], [78], [81], [86], [89], [90], [93], [94], [99], [101], [107], [108], [111], [114], [115], [118], [121], [122], [123], [125], [126], [127], [128], [135], [136], [137], [138], [139], [140], [141], [143], [145], [146], [147], [149], [150], [151], [155], [156], [157], [158], [159], [160], [161], [163], [165], [167], [169], [170], [171] [2018-01-24 17:16:48,734 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:16:48,734 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:16:48,898 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:16:48,899 INFO L268 AbstractInterpreter]: Visited 81 different actions 85 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 27 variables. [2018-01-24 17:16:48,901 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:16:48,901 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:48,901 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:48,908 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:48,908 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:48,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:48,998 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:49,011 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:49,011 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:49,225 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:49,257 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:49,257 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:16:49,261 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:49,261 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:49,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:49,364 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:49,371 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:49,371 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:49,568 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:49,570 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:16:49,570 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-24 17:16:49,571 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:16:49,571 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:16:49,571 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:16:49,571 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-24 17:16:49,571 INFO L87 Difference]: Start difference. First operand 139 states and 148 transitions. Second operand 10 states. [2018-01-24 17:16:49,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:49,691 INFO L93 Difference]: Finished difference Result 252 states and 270 transitions. [2018-01-24 17:16:49,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 17:16:49,692 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 85 [2018-01-24 17:16:49,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:49,692 INFO L225 Difference]: With dead ends: 252 [2018-01-24 17:16:49,692 INFO L226 Difference]: Without dead ends: 140 [2018-01-24 17:16:49,693 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 348 GetRequests, 330 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-24 17:16:49,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-01-24 17:16:49,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-01-24 17:16:49,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-01-24 17:16:49,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 149 transitions. [2018-01-24 17:16:49,712 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 149 transitions. Word has length 85 [2018-01-24 17:16:49,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:49,712 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 149 transitions. [2018-01-24 17:16:49,712 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:16:49,712 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 149 transitions. [2018-01-24 17:16:49,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-01-24 17:16:49,713 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:49,713 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:49,713 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:49,713 INFO L82 PathProgramCache]: Analyzing trace with hash -796837034, now seen corresponding path program 2 times [2018-01-24 17:16:49,713 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:49,714 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:49,714 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:49,714 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:49,714 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:49,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:49,730 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:49,859 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:49,859 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:49,859 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:49,859 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:16:49,860 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:16:49,860 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:49,860 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:49,866 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:16:49,866 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:16:49,905 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:49,918 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:49,921 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:49,924 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:49,933 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:49,934 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:50,072 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:50,096 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:50,096 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:16:50,100 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:16:50,100 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:16:50,155 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:50,260 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:50,298 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:50,305 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:50,311 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:50,311 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:50,401 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:50,403 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:16:50,403 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-24 17:16:50,403 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:16:50,403 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 17:16:50,404 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 17:16:50,404 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-24 17:16:50,404 INFO L87 Difference]: Start difference. First operand 140 states and 149 transitions. Second operand 11 states. [2018-01-24 17:16:50,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:50,506 INFO L93 Difference]: Finished difference Result 253 states and 271 transitions. [2018-01-24 17:16:50,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:16:50,507 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 86 [2018-01-24 17:16:50,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:50,508 INFO L225 Difference]: With dead ends: 253 [2018-01-24 17:16:50,508 INFO L226 Difference]: Without dead ends: 141 [2018-01-24 17:16:50,509 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 353 GetRequests, 333 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-24 17:16:50,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-01-24 17:16:50,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-01-24 17:16:50,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-01-24 17:16:50,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 150 transitions. [2018-01-24 17:16:50,530 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 150 transitions. Word has length 86 [2018-01-24 17:16:50,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:50,530 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 150 transitions. [2018-01-24 17:16:50,530 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 17:16:50,530 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 150 transitions. [2018-01-24 17:16:50,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-01-24 17:16:50,531 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:50,531 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:50,531 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:50,531 INFO L82 PathProgramCache]: Analyzing trace with hash 1972110366, now seen corresponding path program 3 times [2018-01-24 17:16:50,531 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:50,532 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:50,532 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:16:50,532 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:50,532 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:50,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:50,549 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:50,693 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:50,694 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:50,694 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:50,694 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:16:50,694 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:16:50,694 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:50,694 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:50,706 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 17:16:50,706 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 17:16:50,758 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:16:50,777 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:16:50,820 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:16:51,055 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:16:51,180 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:16:51,181 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:51,185 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:51,195 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:51,195 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:51,425 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:51,449 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:51,449 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:16:51,453 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 17:16:51,453 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 17:16:51,517 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:16:51,628 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:16:52,299 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:16:55,552 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:16:56,943 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:16:57,004 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:57,012 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:57,018 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:57,018 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:57,106 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:57,110 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:16:57,110 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-24 17:16:57,110 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:16:57,111 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 17:16:57,111 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 17:16:57,111 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-24 17:16:57,111 INFO L87 Difference]: Start difference. First operand 141 states and 150 transitions. Second operand 12 states. [2018-01-24 17:16:57,161 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:57,161 INFO L93 Difference]: Finished difference Result 254 states and 272 transitions. [2018-01-24 17:16:57,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 17:16:57,161 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 87 [2018-01-24 17:16:57,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:57,162 INFO L225 Difference]: With dead ends: 254 [2018-01-24 17:16:57,162 INFO L226 Difference]: Without dead ends: 142 [2018-01-24 17:16:57,162 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 358 GetRequests, 336 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-24 17:16:57,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-01-24 17:16:57,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-01-24 17:16:57,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-01-24 17:16:57,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 151 transitions. [2018-01-24 17:16:57,181 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 151 transitions. Word has length 87 [2018-01-24 17:16:57,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:57,181 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 151 transitions. [2018-01-24 17:16:57,182 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 17:16:57,182 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 151 transitions. [2018-01-24 17:16:57,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-24 17:16:57,182 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:57,182 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:57,182 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:57,182 INFO L82 PathProgramCache]: Analyzing trace with hash 1910133846, now seen corresponding path program 4 times [2018-01-24 17:16:57,183 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:57,183 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:57,183 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:16:57,183 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:57,183 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:57,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:57,201 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:57,323 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:57,323 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:57,323 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:57,324 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:16:57,324 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:16:57,324 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:57,324 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:57,335 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 17:16:57,335 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 17:16:57,405 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:57,408 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:57,422 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:57,422 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:57,819 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:57,840 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:57,840 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:16:57,845 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 17:16:57,845 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 17:16:57,993 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:58,000 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:58,006 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:58,006 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:58,082 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:58,084 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:16:58,084 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-24 17:16:58,084 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:16:58,085 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 17:16:58,085 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 17:16:58,085 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=232, Invalid=274, Unknown=0, NotChecked=0, Total=506 [2018-01-24 17:16:58,085 INFO L87 Difference]: Start difference. First operand 142 states and 151 transitions. Second operand 13 states. [2018-01-24 17:16:58,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:58,127 INFO L93 Difference]: Finished difference Result 255 states and 273 transitions. [2018-01-24 17:16:58,127 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 17:16:58,128 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 88 [2018-01-24 17:16:58,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:58,128 INFO L225 Difference]: With dead ends: 255 [2018-01-24 17:16:58,128 INFO L226 Difference]: Without dead ends: 143 [2018-01-24 17:16:58,129 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 363 GetRequests, 339 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=246, Invalid=306, Unknown=0, NotChecked=0, Total=552 [2018-01-24 17:16:58,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-24 17:16:58,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-01-24 17:16:58,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-24 17:16:58,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 152 transitions. [2018-01-24 17:16:58,161 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 152 transitions. Word has length 88 [2018-01-24 17:16:58,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:58,161 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 152 transitions. [2018-01-24 17:16:58,161 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 17:16:58,161 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 152 transitions. [2018-01-24 17:16:58,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-01-24 17:16:58,162 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:58,162 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:58,162 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:58,162 INFO L82 PathProgramCache]: Analyzing trace with hash -11138274, now seen corresponding path program 5 times [2018-01-24 17:16:58,162 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:58,163 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:58,163 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:16:58,163 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:58,164 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:58,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:58,183 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:58,389 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:58,389 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:58,389 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:58,390 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:16:58,390 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:16:58,390 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:58,390 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:58,398 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 17:16:58,398 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:16:58,420 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:58,422 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:58,429 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:58,447 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:58,516 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:58,611 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:58,616 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:58,619 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:58,632 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:58,632 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:58,926 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:58,946 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:58,946 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:16:58,950 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 17:16:58,951 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:16:58,970 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:58,974 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:58,983 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:58,999 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:59,027 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:59,115 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:59,154 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:59,163 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:59,173 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:59,173 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:59,311 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [MP cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (23)] Exception during sending of exit command (exit): Stream closed [2018-01-24 17:16:59,313 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:16:59,314 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-24 17:16:59,314 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:16:59,314 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-24 17:16:59,314 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-24 17:16:59,315 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=272, Invalid=328, Unknown=0, NotChecked=0, Total=600 [2018-01-24 17:16:59,315 INFO L87 Difference]: Start difference. First operand 143 states and 152 transitions. Second operand 14 states. [2018-01-24 17:16:59,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:59,380 INFO L93 Difference]: Finished difference Result 256 states and 274 transitions. [2018-01-24 17:16:59,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 17:16:59,381 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 89 [2018-01-24 17:16:59,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:59,382 INFO L225 Difference]: With dead ends: 256 [2018-01-24 17:16:59,382 INFO L226 Difference]: Without dead ends: 144 [2018-01-24 17:16:59,382 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 368 GetRequests, 342 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=287, Invalid=363, Unknown=0, NotChecked=0, Total=650 [2018-01-24 17:16:59,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-01-24 17:16:59,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 144. [2018-01-24 17:16:59,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-01-24 17:16:59,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 153 transitions. [2018-01-24 17:16:59,416 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 153 transitions. Word has length 89 [2018-01-24 17:16:59,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:59,417 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 153 transitions. [2018-01-24 17:16:59,417 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-24 17:16:59,417 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 153 transitions. [2018-01-24 17:16:59,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-01-24 17:16:59,417 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:59,418 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:59,418 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:59,418 INFO L82 PathProgramCache]: Analyzing trace with hash 558968150, now seen corresponding path program 6 times [2018-01-24 17:16:59,418 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:59,419 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:59,419 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:16:59,419 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:59,419 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:59,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:59,440 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:59,617 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:59,617 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:59,658 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:59,658 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:16:59,658 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:16:59,659 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:59,659 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:59,665 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 17:16:59,665 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 17:16:59,705 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:16:59,717 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:16:59,743 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:16:59,840 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:17:00,047 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:17:00,538 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:17:00,540 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:17:00,544 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:17:00,553 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:17:00,553 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:17:00,778 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:17:00,799 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:17:00,800 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:17:00,803 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 17:17:00,803 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 17:17:00,853 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:17:00,954 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown