java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test12_false-valid-free.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 20:36:17,992 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 20:36:17,994 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 20:36:18,007 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 20:36:18,007 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 20:36:18,008 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 20:36:18,009 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 20:36:18,011 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 20:36:18,013 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 20:36:18,014 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 20:36:18,015 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 20:36:18,016 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 20:36:18,017 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 20:36:18,018 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 20:36:18,019 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 20:36:18,022 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 20:36:18,024 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 20:36:18,026 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 20:36:18,027 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 20:36:18,028 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 20:36:18,031 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 20:36:18,031 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 20:36:18,031 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 20:36:18,032 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 20:36:18,033 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 20:36:18,035 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 20:36:18,035 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 20:36:18,036 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 20:36:18,036 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 20:36:18,036 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 20:36:18,037 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 20:36:18,037 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_mostprecise.epf [2018-01-24 20:36:18,047 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 20:36:18,047 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 20:36:18,048 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 20:36:18,048 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 20:36:18,049 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 20:36:18,049 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-24 20:36:18,049 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 20:36:18,049 INFO L133 SettingsManager]: * Precise comparison operator=true [2018-01-24 20:36:18,049 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 20:36:18,050 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 20:36:18,050 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 20:36:18,050 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 20:36:18,050 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 20:36:18,051 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 20:36:18,051 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 20:36:18,051 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 20:36:18,051 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 20:36:18,051 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 20:36:18,052 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 20:36:18,052 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 20:36:18,052 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 20:36:18,052 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 20:36:18,052 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 20:36:18,052 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 20:36:18,053 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 20:36:18,053 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 20:36:18,053 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 20:36:18,053 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 20:36:18,053 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 20:36:18,054 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 20:36:18,054 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-24 20:36:18,054 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 20:36:18,054 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 20:36:18,054 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 20:36:18,055 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-24 20:36:18,055 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 20:36:18,056 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 20:36:18,092 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 20:36:18,105 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 20:36:18,110 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 20:36:18,111 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 20:36:18,112 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 20:36:18,113 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test12_false-valid-free.i [2018-01-24 20:36:18,321 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 20:36:18,326 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 20:36:18,327 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 20:36:18,327 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 20:36:18,333 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 20:36:18,334 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 08:36:18" (1/1) ... [2018-01-24 20:36:18,336 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2a056a97 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 08:36:18, skipping insertion in model container [2018-01-24 20:36:18,337 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 08:36:18" (1/1) ... [2018-01-24 20:36:18,351 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 20:36:18,402 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 20:36:18,554 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 20:36:18,599 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 20:36:18,616 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 08:36:18 WrapperNode [2018-01-24 20:36:18,616 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 20:36:18,617 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 20:36:18,617 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 20:36:18,617 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 20:36:18,631 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 08:36:18" (1/1) ... [2018-01-24 20:36:18,631 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 08:36:18" (1/1) ... [2018-01-24 20:36:18,643 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 08:36:18" (1/1) ... [2018-01-24 20:36:18,644 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 08:36:18" (1/1) ... [2018-01-24 20:36:18,653 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 08:36:18" (1/1) ... [2018-01-24 20:36:18,657 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 08:36:18" (1/1) ... [2018-01-24 20:36:18,661 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 08:36:18" (1/1) ... [2018-01-24 20:36:18,666 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 20:36:18,667 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 20:36:18,667 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 20:36:18,667 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 20:36:18,668 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 08:36:18" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 20:36:18,713 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 20:36:18,713 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 20:36:18,714 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~$Pointer$~X~int~TO~int [2018-01-24 20:36:18,714 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 20:36:18,714 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-24 20:36:18,714 INFO L136 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-01-24 20:36:18,714 INFO L136 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-01-24 20:36:18,714 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-01-24 20:36:18,714 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-01-24 20:36:18,714 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-01-24 20:36:18,714 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-01-24 20:36:18,714 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-01-24 20:36:18,715 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-01-24 20:36:18,715 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-01-24 20:36:18,715 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-01-24 20:36:18,715 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-01-24 20:36:18,715 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-24 20:36:18,715 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-24 20:36:18,715 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_i2c_get_clientdata [2018-01-24 20:36:18,715 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_i2c_set_clientdata [2018-01-24 20:36:18,715 INFO L136 BoogieDeclarations]: Found implementation of procedure master_xfer [2018-01-24 20:36:18,715 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_i2c_transfer [2018-01-24 20:36:18,716 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_m88ts2022_rd_reg [2018-01-24 20:36:18,716 INFO L136 BoogieDeclarations]: Found implementation of procedure alloc_12 [2018-01-24 20:36:18,716 INFO L136 BoogieDeclarations]: Found implementation of procedure free_12 [2018-01-24 20:36:18,716 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 20:36:18,716 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 20:36:18,716 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 20:36:18,716 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 20:36:18,716 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 20:36:18,716 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 20:36:18,717 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 20:36:18,717 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 20:36:18,717 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 20:36:18,717 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-01-24 20:36:18,717 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-01-24 20:36:18,717 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 20:36:18,717 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 20:36:18,717 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 20:36:18,717 INFO L128 BoogieDeclarations]: Found specification of procedure memcpy [2018-01-24 20:36:18,717 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 20:36:18,717 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-24 20:36:18,717 INFO L128 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-01-24 20:36:18,718 INFO L128 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-01-24 20:36:18,718 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-01-24 20:36:18,718 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-01-24 20:36:18,718 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-01-24 20:36:18,718 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-01-24 20:36:18,718 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-01-24 20:36:18,718 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-01-24 20:36:18,718 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-01-24 20:36:18,718 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-01-24 20:36:18,718 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-01-24 20:36:18,718 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-24 20:36:18,719 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-24 20:36:18,719 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_i2c_get_clientdata [2018-01-24 20:36:18,719 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_i2c_set_clientdata [2018-01-24 20:36:18,719 INFO L128 BoogieDeclarations]: Found specification of procedure master_xfer [2018-01-24 20:36:18,719 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_i2c_transfer [2018-01-24 20:36:18,719 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~$Pointer$~X~int~TO~int [2018-01-24 20:36:18,719 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_m88ts2022_rd_reg [2018-01-24 20:36:18,719 INFO L128 BoogieDeclarations]: Found specification of procedure alloc_12 [2018-01-24 20:36:18,719 INFO L128 BoogieDeclarations]: Found specification of procedure free_12 [2018-01-24 20:36:18,719 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 20:36:18,719 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 20:36:18,719 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 20:36:18,720 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 20:36:19,599 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-24 20:36:19,721 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 20:36:19,722 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 08:36:19 BoogieIcfgContainer [2018-01-24 20:36:19,722 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 20:36:19,723 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 20:36:19,723 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 20:36:19,724 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 20:36:19,725 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 08:36:18" (1/3) ... [2018-01-24 20:36:19,726 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4f3d1654 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 08:36:19, skipping insertion in model container [2018-01-24 20:36:19,726 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 08:36:18" (2/3) ... [2018-01-24 20:36:19,726 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4f3d1654 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 08:36:19, skipping insertion in model container [2018-01-24 20:36:19,726 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 08:36:19" (3/3) ... [2018-01-24 20:36:19,728 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test12_false-valid-free.i [2018-01-24 20:36:19,735 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 20:36:19,743 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 141 error locations. [2018-01-24 20:36:19,791 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 20:36:19,792 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 20:36:19,792 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 20:36:19,792 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 20:36:19,792 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 20:36:19,792 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 20:36:19,793 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 20:36:19,793 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 20:36:19,794 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 20:36:19,822 INFO L276 IsEmpty]: Start isEmpty. Operand 398 states. [2018-01-24 20:36:19,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-01-24 20:36:19,826 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 20:36:19,827 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-01-24 20:36:19,827 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 20:36:19,831 INFO L82 PathProgramCache]: Analyzing trace with hash 18685926, now seen corresponding path program 1 times [2018-01-24 20:36:19,833 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 20:36:19,881 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 20:36:19,881 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 20:36:19,882 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 20:36:19,882 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 20:36:19,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 20:36:20,003 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 20:36:20,056 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 20:36:20,057 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 20:36:20,057 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 20:36:20,058 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 20:36:20,060 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 20:36:20,071 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 20:36:20,072 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 20:36:20,074 INFO L87 Difference]: Start difference. First operand 398 states. Second operand 3 states. [2018-01-24 20:36:20,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 20:36:20,572 INFO L93 Difference]: Finished difference Result 668 states and 724 transitions. [2018-01-24 20:36:20,572 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 20:36:20,574 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2018-01-24 20:36:20,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 20:36:20,592 INFO L225 Difference]: With dead ends: 668 [2018-01-24 20:36:20,592 INFO L226 Difference]: Without dead ends: 481 [2018-01-24 20:36:20,596 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 20:36:20,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 481 states. [2018-01-24 20:36:20,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 481 to 436. [2018-01-24 20:36:20,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 436 states. [2018-01-24 20:36:20,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 436 states to 436 states and 491 transitions. [2018-01-24 20:36:20,660 INFO L78 Accepts]: Start accepts. Automaton has 436 states and 491 transitions. Word has length 4 [2018-01-24 20:36:20,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 20:36:20,660 INFO L432 AbstractCegarLoop]: Abstraction has 436 states and 491 transitions. [2018-01-24 20:36:20,660 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 20:36:20,660 INFO L276 IsEmpty]: Start isEmpty. Operand 436 states and 491 transitions. [2018-01-24 20:36:20,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-01-24 20:36:20,661 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 20:36:20,661 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-01-24 20:36:20,661 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 20:36:20,661 INFO L82 PathProgramCache]: Analyzing trace with hash 18685927, now seen corresponding path program 1 times [2018-01-24 20:36:20,661 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 20:36:20,663 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 20:36:20,663 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 20:36:20,663 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 20:36:20,663 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 20:36:20,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 20:36:20,675 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 20:36:20,716 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 20:36:20,717 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 20:36:20,717 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 20:36:20,717 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 20:36:20,718 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 20:36:20,718 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 20:36:20,718 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 20:36:20,719 INFO L87 Difference]: Start difference. First operand 436 states and 491 transitions. Second operand 3 states. [2018-01-24 20:36:20,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 20:36:20,933 INFO L93 Difference]: Finished difference Result 570 states and 656 transitions. [2018-01-24 20:36:20,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 20:36:20,933 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2018-01-24 20:36:20,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 20:36:20,936 INFO L225 Difference]: With dead ends: 570 [2018-01-24 20:36:20,937 INFO L226 Difference]: Without dead ends: 567 [2018-01-24 20:36:20,938 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 20:36:20,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 567 states. [2018-01-24 20:36:20,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 567 to 497. [2018-01-24 20:36:20,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 497 states. [2018-01-24 20:36:20,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 497 states to 497 states and 602 transitions. [2018-01-24 20:36:20,970 INFO L78 Accepts]: Start accepts. Automaton has 497 states and 602 transitions. Word has length 4 [2018-01-24 20:36:20,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 20:36:20,970 INFO L432 AbstractCegarLoop]: Abstraction has 497 states and 602 transitions. [2018-01-24 20:36:20,970 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 20:36:20,970 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 602 transitions. [2018-01-24 20:36:20,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-24 20:36:20,971 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 20:36:20,971 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 20:36:20,971 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 20:36:20,971 INFO L82 PathProgramCache]: Analyzing trace with hash -2098584656, now seen corresponding path program 1 times [2018-01-24 20:36:20,971 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 20:36:20,973 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 20:36:20,973 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 20:36:20,973 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 20:36:20,973 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 20:36:20,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 20:36:20,994 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 20:36:21,064 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 20:36:21,064 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 20:36:21,064 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 20:36:21,064 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 20:36:21,065 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 20:36:21,065 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 20:36:21,065 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 20:36:21,065 INFO L87 Difference]: Start difference. First operand 497 states and 602 transitions. Second operand 6 states. [2018-01-24 20:36:21,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 20:36:21,184 INFO L93 Difference]: Finished difference Result 624 states and 762 transitions. [2018-01-24 20:36:21,184 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 20:36:21,184 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 21 [2018-01-24 20:36:21,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 20:36:21,189 INFO L225 Difference]: With dead ends: 624 [2018-01-24 20:36:21,189 INFO L226 Difference]: Without dead ends: 543 [2018-01-24 20:36:21,191 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 20:36:21,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 543 states. [2018-01-24 20:36:21,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 543 to 496. [2018-01-24 20:36:21,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 496 states. [2018-01-24 20:36:21,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 496 states to 496 states and 604 transitions. [2018-01-24 20:36:21,225 INFO L78 Accepts]: Start accepts. Automaton has 496 states and 604 transitions. Word has length 21 [2018-01-24 20:36:21,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 20:36:21,226 INFO L432 AbstractCegarLoop]: Abstraction has 496 states and 604 transitions. [2018-01-24 20:36:21,226 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 20:36:21,226 INFO L276 IsEmpty]: Start isEmpty. Operand 496 states and 604 transitions. [2018-01-24 20:36:21,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-24 20:36:21,227 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 20:36:21,227 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 20:36:21,227 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 20:36:21,228 INFO L82 PathProgramCache]: Analyzing trace with hash -1744465714, now seen corresponding path program 1 times [2018-01-24 20:36:21,228 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 20:36:21,230 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 20:36:21,230 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 20:36:21,230 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 20:36:21,230 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 20:36:21,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 20:36:21,258 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 20:36:21,355 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 20:36:21,355 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 20:36:21,355 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 20:36:21,355 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 20:36:21,356 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 20:36:21,356 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 20:36:21,357 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 20:36:21,357 INFO L87 Difference]: Start difference. First operand 496 states and 604 transitions. Second operand 5 states. [2018-01-24 20:36:21,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 20:36:21,762 INFO L93 Difference]: Finished difference Result 572 states and 705 transitions. [2018-01-24 20:36:21,762 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 20:36:21,762 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-01-24 20:36:21,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 20:36:21,766 INFO L225 Difference]: With dead ends: 572 [2018-01-24 20:36:21,767 INFO L226 Difference]: Without dead ends: 571 [2018-01-24 20:36:21,768 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-01-24 20:36:21,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 571 states. [2018-01-24 20:36:21,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 571 to 538. [2018-01-24 20:36:21,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 538 states. [2018-01-24 20:36:21,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 538 states to 538 states and 661 transitions. [2018-01-24 20:36:21,803 INFO L78 Accepts]: Start accepts. Automaton has 538 states and 661 transitions. Word has length 21 [2018-01-24 20:36:21,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 20:36:21,803 INFO L432 AbstractCegarLoop]: Abstraction has 538 states and 661 transitions. [2018-01-24 20:36:21,803 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 20:36:21,803 INFO L276 IsEmpty]: Start isEmpty. Operand 538 states and 661 transitions. [2018-01-24 20:36:21,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-24 20:36:21,804 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 20:36:21,804 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 20:36:21,805 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 20:36:21,805 INFO L82 PathProgramCache]: Analyzing trace with hash -1744465713, now seen corresponding path program 1 times [2018-01-24 20:36:21,805 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 20:36:21,807 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 20:36:21,807 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 20:36:21,807 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 20:36:21,807 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 20:36:21,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 20:36:21,828 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 20:36:22,035 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 20:36:22,035 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 20:36:22,035 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 20:36:22,035 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 20:36:22,036 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 20:36:22,036 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 20:36:22,036 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 20:36:22,037 INFO L87 Difference]: Start difference. First operand 538 states and 661 transitions. Second operand 7 states. [2018-01-24 20:36:23,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 20:36:23,647 INFO L93 Difference]: Finished difference Result 669 states and 772 transitions. [2018-01-24 20:36:23,648 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 20:36:23,648 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 21 [2018-01-24 20:36:23,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 20:36:23,651 INFO L225 Difference]: With dead ends: 669 [2018-01-24 20:36:23,652 INFO L226 Difference]: Without dead ends: 668 [2018-01-24 20:36:23,652 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 5 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=51, Invalid=105, Unknown=0, NotChecked=0, Total=156 [2018-01-24 20:36:23,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 668 states. [2018-01-24 20:36:23,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 668 to 538. [2018-01-24 20:36:23,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 538 states. [2018-01-24 20:36:23,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 538 states to 538 states and 660 transitions. [2018-01-24 20:36:23,692 INFO L78 Accepts]: Start accepts. Automaton has 538 states and 660 transitions. Word has length 21 [2018-01-24 20:36:23,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 20:36:23,692 INFO L432 AbstractCegarLoop]: Abstraction has 538 states and 660 transitions. [2018-01-24 20:36:23,692 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 20:36:23,692 INFO L276 IsEmpty]: Start isEmpty. Operand 538 states and 660 transitions. [2018-01-24 20:36:23,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-24 20:36:23,694 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 20:36:23,694 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 20:36:23,694 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 20:36:23,694 INFO L82 PathProgramCache]: Analyzing trace with hash -1603523080, now seen corresponding path program 1 times [2018-01-24 20:36:23,694 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 20:36:23,696 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 20:36:23,696 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 20:36:23,696 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 20:36:23,697 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 20:36:23,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 20:36:23,711 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 20:36:23,785 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 20:36:23,785 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 20:36:23,785 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 20:36:23,786 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 25 with the following transitions: [2018-01-24 20:36:23,788 INFO L201 CegarAbsIntRunner]: [202], [207], [209], [212], [277], [479], [485], [486], [487], [488], [489], [492], [495], [516], [538], [539], [540], [541], [580], [581], [582] [2018-01-24 20:36:23,843 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 20:36:23,844 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown