java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf -i ../../../trunk/examples/svcomp/array-examples/sanfoundry_24_false-valid-deref.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-25 02:49:43,824 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-25 02:49:43,826 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-25 02:49:43,841 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-25 02:49:43,841 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-25 02:49:43,843 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-25 02:49:43,844 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-25 02:49:43,845 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-25 02:49:43,847 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-25 02:49:43,848 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-25 02:49:43,849 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-25 02:49:43,849 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-25 02:49:43,850 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-25 02:49:43,852 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-25 02:49:43,853 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-25 02:49:43,856 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-25 02:49:43,858 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-25 02:49:43,860 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-25 02:49:43,862 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-25 02:49:43,863 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-25 02:49:43,866 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-25 02:49:43,866 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-25 02:49:43,866 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-25 02:49:43,867 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-25 02:49:43,868 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-25 02:49:43,870 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-25 02:49:43,870 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-25 02:49:43,871 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-25 02:49:43,871 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-25 02:49:43,871 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-25 02:49:43,872 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-25 02:49:43,873 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf [2018-01-25 02:49:43,883 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-25 02:49:43,884 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-25 02:49:43,884 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-25 02:49:43,885 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-25 02:49:43,885 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-25 02:49:43,885 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-25 02:49:43,885 INFO L133 SettingsManager]: * Flatten before fatten=true [2018-01-25 02:49:43,886 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-25 02:49:43,886 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-25 02:49:43,887 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-25 02:49:43,887 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-25 02:49:43,887 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-25 02:49:43,887 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-25 02:49:43,887 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-25 02:49:43,888 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-25 02:49:43,888 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-25 02:49:43,888 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-25 02:49:43,888 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-25 02:49:43,888 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-25 02:49:43,889 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-25 02:49:43,889 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-25 02:49:43,889 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-25 02:49:43,889 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-25 02:49:43,889 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-25 02:49:43,890 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-25 02:49:43,890 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-25 02:49:43,890 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-25 02:49:43,890 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-25 02:49:43,890 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-25 02:49:43,891 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-25 02:49:43,891 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-25 02:49:43,891 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-25 02:49:43,891 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-25 02:49:43,891 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-25 02:49:43,892 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-25 02:49:43,893 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-25 02:49:43,893 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-25 02:49:43,929 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-25 02:49:43,943 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-25 02:49:43,948 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-25 02:49:43,950 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-25 02:49:43,950 INFO L276 PluginConnector]: CDTParser initialized [2018-01-25 02:49:43,951 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/sanfoundry_24_false-valid-deref.i [2018-01-25 02:49:44,098 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-25 02:49:44,104 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-25 02:49:44,105 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-25 02:49:44,105 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-25 02:49:44,113 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-25 02:49:44,114 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.01 02:49:44" (1/1) ... [2018-01-25 02:49:44,118 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2fe1083d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:49:44, skipping insertion in model container [2018-01-25 02:49:44,118 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.01 02:49:44" (1/1) ... [2018-01-25 02:49:44,138 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-25 02:49:44,158 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-25 02:49:44,284 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-25 02:49:44,297 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-25 02:49:44,303 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:49:44 WrapperNode [2018-01-25 02:49:44,303 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-25 02:49:44,303 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-25 02:49:44,304 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-25 02:49:44,304 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-25 02:49:44,316 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:49:44" (1/1) ... [2018-01-25 02:49:44,317 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:49:44" (1/1) ... [2018-01-25 02:49:44,324 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:49:44" (1/1) ... [2018-01-25 02:49:44,324 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:49:44" (1/1) ... [2018-01-25 02:49:44,326 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:49:44" (1/1) ... [2018-01-25 02:49:44,333 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:49:44" (1/1) ... [2018-01-25 02:49:44,334 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:49:44" (1/1) ... [2018-01-25 02:49:44,337 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-25 02:49:44,337 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-25 02:49:44,337 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-25 02:49:44,338 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-25 02:49:44,339 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:49:44" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-25 02:49:44,390 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-25 02:49:44,390 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-25 02:49:44,390 INFO L136 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-01-25 02:49:44,390 INFO L136 BoogieDeclarations]: Found implementation of procedure printEven [2018-01-25 02:49:44,391 INFO L136 BoogieDeclarations]: Found implementation of procedure printOdd [2018-01-25 02:49:44,391 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-25 02:49:44,391 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-01-25 02:49:44,391 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-01-25 02:49:44,391 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-25 02:49:44,391 INFO L128 BoogieDeclarations]: Found specification of procedure printEven [2018-01-25 02:49:44,392 INFO L128 BoogieDeclarations]: Found specification of procedure printOdd [2018-01-25 02:49:44,392 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-25 02:49:44,392 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-25 02:49:44,392 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-25 02:49:44,580 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-25 02:49:44,580 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.01 02:49:44 BoogieIcfgContainer [2018-01-25 02:49:44,581 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-25 02:49:44,581 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-25 02:49:44,582 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-25 02:49:44,584 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-25 02:49:44,585 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 25.01 02:49:44" (1/3) ... [2018-01-25 02:49:44,587 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2629eb00 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.01 02:49:44, skipping insertion in model container [2018-01-25 02:49:44,587 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:49:44" (2/3) ... [2018-01-25 02:49:44,587 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2629eb00 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.01 02:49:44, skipping insertion in model container [2018-01-25 02:49:44,588 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.01 02:49:44" (3/3) ... [2018-01-25 02:49:44,589 INFO L105 eAbstractionObserver]: Analyzing ICFG sanfoundry_24_false-valid-deref.i [2018-01-25 02:49:44,597 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-25 02:49:44,604 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 4 error locations. [2018-01-25 02:49:44,677 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-25 02:49:44,677 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-25 02:49:44,678 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-25 02:49:44,678 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-25 02:49:44,678 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-25 02:49:44,678 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-25 02:49:44,678 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-25 02:49:44,678 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-25 02:49:44,679 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-25 02:49:44,704 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states. [2018-01-25 02:49:44,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-01-25 02:49:44,714 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:49:44,715 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 02:49:44,715 INFO L371 AbstractCegarLoop]: === Iteration 1 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:49:44,730 INFO L82 PathProgramCache]: Analyzing trace with hash 529177341, now seen corresponding path program 1 times [2018-01-25 02:49:44,736 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:49:44,798 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:44,799 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:49:44,799 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:44,799 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:49:44,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:44,853 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:49:44,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:44,978 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 02:49:44,978 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-25 02:49:44,979 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 02:49:44,981 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-25 02:49:44,997 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-25 02:49:44,998 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-25 02:49:45,001 INFO L87 Difference]: Start difference. First operand 42 states. Second operand 3 states. [2018-01-25 02:49:45,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:49:45,138 INFO L93 Difference]: Finished difference Result 97 states and 129 transitions. [2018-01-25 02:49:45,138 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-25 02:49:45,139 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-01-25 02:49:45,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:49:45,147 INFO L225 Difference]: With dead ends: 97 [2018-01-25 02:49:45,148 INFO L226 Difference]: Without dead ends: 51 [2018-01-25 02:49:45,153 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-25 02:49:45,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-25 02:49:45,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 46. [2018-01-25 02:49:45,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-25 02:49:45,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 53 transitions. [2018-01-25 02:49:45,270 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 53 transitions. Word has length 8 [2018-01-25 02:49:45,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:49:45,270 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 53 transitions. [2018-01-25 02:49:45,270 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-25 02:49:45,271 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 53 transitions. [2018-01-25 02:49:45,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-01-25 02:49:45,272 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:49:45,272 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 02:49:45,272 INFO L371 AbstractCegarLoop]: === Iteration 2 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:49:45,273 INFO L82 PathProgramCache]: Analyzing trace with hash -2078569521, now seen corresponding path program 1 times [2018-01-25 02:49:45,273 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:49:45,274 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:45,275 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:49:45,275 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:45,275 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:49:45,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:45,298 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:49:45,398 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:45,399 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:45,399 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:49:45,400 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 14 with the following transitions: [2018-01-25 02:49:45,402 INFO L201 CegarAbsIntRunner]: [0], [10], [14], [19], [20], [21], [29], [31], [74], [75], [76] [2018-01-25 02:49:45,471 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-25 02:49:45,471 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-25 02:49:45,577 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-25 02:49:45,581 INFO L268 AbstractInterpreter]: Visited 11 different actions 17 times. Merged at 6 different actions 6 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 5 variables. [2018-01-25 02:49:45,592 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-25 02:49:45,592 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:45,592 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:49:45,600 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:49:45,600 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:49:45,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:45,619 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:45,649 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:45,650 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:45,737 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:45,764 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:45,764 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:49:45,769 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:49:45,769 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:49:45,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:45,787 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:45,799 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:45,800 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:45,825 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:45,827 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:49:45,827 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3, 3, 3] total 5 [2018-01-25 02:49:45,827 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:49:45,828 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-25 02:49:45,829 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-25 02:49:45,829 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-25 02:49:45,829 INFO L87 Difference]: Start difference. First operand 46 states and 53 transitions. Second operand 4 states. [2018-01-25 02:49:45,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:49:45,961 INFO L93 Difference]: Finished difference Result 70 states and 84 transitions. [2018-01-25 02:49:45,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-25 02:49:45,962 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2018-01-25 02:49:45,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:49:45,964 INFO L225 Difference]: With dead ends: 70 [2018-01-25 02:49:45,964 INFO L226 Difference]: Without dead ends: 66 [2018-01-25 02:49:45,965 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 47 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-25 02:49:45,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-01-25 02:49:45,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 60. [2018-01-25 02:49:45,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-25 02:49:45,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 72 transitions. [2018-01-25 02:49:45,977 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 72 transitions. Word has length 13 [2018-01-25 02:49:45,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:49:45,978 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 72 transitions. [2018-01-25 02:49:45,978 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-25 02:49:45,978 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 72 transitions. [2018-01-25 02:49:45,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-25 02:49:45,980 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:49:45,980 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2018-01-25 02:49:45,980 INFO L371 AbstractCegarLoop]: === Iteration 3 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:49:45,981 INFO L82 PathProgramCache]: Analyzing trace with hash 1794788925, now seen corresponding path program 2 times [2018-01-25 02:49:45,981 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:49:45,982 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:45,982 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:49:45,983 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:45,983 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:49:45,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:45,998 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:49:46,071 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:46,071 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:46,071 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:49:46,071 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:49:46,072 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:49:46,072 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:46,072 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:49:46,082 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:49:46,082 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:49:46,090 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:46,093 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:46,109 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:46,111 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:46,186 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:46,186 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:46,290 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:46,323 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:46,323 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:49:46,328 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:49:46,328 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:49:46,332 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:46,336 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:46,341 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:46,344 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:46,354 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:46,354 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:46,375 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:46,377 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:49:46,377 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 7 [2018-01-25 02:49:46,377 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:49:46,378 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-25 02:49:46,378 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-25 02:49:46,378 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-25 02:49:46,378 INFO L87 Difference]: Start difference. First operand 60 states and 72 transitions. Second operand 5 states. [2018-01-25 02:49:46,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:49:46,835 INFO L93 Difference]: Finished difference Result 85 states and 104 transitions. [2018-01-25 02:49:46,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-25 02:49:46,836 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 18 [2018-01-25 02:49:46,837 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:49:46,839 INFO L225 Difference]: With dead ends: 85 [2018-01-25 02:49:46,839 INFO L226 Difference]: Without dead ends: 81 [2018-01-25 02:49:46,839 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-25 02:49:46,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2018-01-25 02:49:46,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 74. [2018-01-25 02:49:46,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-01-25 02:49:46,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 91 transitions. [2018-01-25 02:49:46,852 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 91 transitions. Word has length 18 [2018-01-25 02:49:46,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:49:46,853 INFO L432 AbstractCegarLoop]: Abstraction has 74 states and 91 transitions. [2018-01-25 02:49:46,853 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-25 02:49:46,853 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 91 transitions. [2018-01-25 02:49:46,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-25 02:49:46,854 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:49:46,855 INFO L322 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1] [2018-01-25 02:49:46,855 INFO L371 AbstractCegarLoop]: === Iteration 4 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:49:46,855 INFO L82 PathProgramCache]: Analyzing trace with hash -424025969, now seen corresponding path program 3 times [2018-01-25 02:49:46,855 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:49:46,856 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:46,856 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:49:46,857 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:46,857 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:49:46,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:46,871 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:49:46,943 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:46,944 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:46,944 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:49:46,944 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:49:46,944 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:49:46,944 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:46,945 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:49:46,968 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:49:46,968 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:49:46,973 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:46,980 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:46,988 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:46,995 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:46,998 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:47,000 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:47,009 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:47,009 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:47,048 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:47,069 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:47,069 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:49:47,073 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:49:47,073 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:49:47,077 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:47,079 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:47,085 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:47,091 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:47,096 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:47,099 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:47,105 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:47,105 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:47,113 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:47,114 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:49:47,114 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-25 02:49:47,115 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:49:47,115 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-25 02:49:47,115 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-25 02:49:47,115 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-25 02:49:47,116 INFO L87 Difference]: Start difference. First operand 74 states and 91 transitions. Second operand 6 states. [2018-01-25 02:49:47,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:49:47,282 INFO L93 Difference]: Finished difference Result 100 states and 124 transitions. [2018-01-25 02:49:47,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-25 02:49:47,283 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-01-25 02:49:47,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:49:47,284 INFO L225 Difference]: With dead ends: 100 [2018-01-25 02:49:47,284 INFO L226 Difference]: Without dead ends: 96 [2018-01-25 02:49:47,285 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 85 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-25 02:49:47,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-01-25 02:49:47,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 88. [2018-01-25 02:49:47,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-01-25 02:49:47,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 110 transitions. [2018-01-25 02:49:47,297 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 110 transitions. Word has length 23 [2018-01-25 02:49:47,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:49:47,298 INFO L432 AbstractCegarLoop]: Abstraction has 88 states and 110 transitions. [2018-01-25 02:49:47,298 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-25 02:49:47,298 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 110 transitions. [2018-01-25 02:49:47,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-25 02:49:47,300 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:49:47,300 INFO L322 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1] [2018-01-25 02:49:47,300 INFO L371 AbstractCegarLoop]: === Iteration 5 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:49:47,300 INFO L82 PathProgramCache]: Analyzing trace with hash -1714228867, now seen corresponding path program 4 times [2018-01-25 02:49:47,301 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:49:47,301 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:47,302 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:49:47,302 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:47,302 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:49:47,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:47,313 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:49:47,425 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:47,426 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:47,637 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:49:47,637 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:49:47,637 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:49:47,637 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:47,637 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:49:47,643 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:49:47,643 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:49:47,654 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:47,656 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:47,666 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:47,666 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:47,834 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:47,880 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:47,880 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:49:47,886 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:49:47,886 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:49:47,916 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:47,922 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:47,937 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:47,937 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:47,946 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:47,948 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:49:47,948 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-25 02:49:47,948 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:49:47,949 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-25 02:49:47,949 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-25 02:49:47,949 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-01-25 02:49:47,950 INFO L87 Difference]: Start difference. First operand 88 states and 110 transitions. Second operand 7 states. [2018-01-25 02:49:48,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:49:48,293 INFO L93 Difference]: Finished difference Result 115 states and 144 transitions. [2018-01-25 02:49:48,294 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-25 02:49:48,294 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 28 [2018-01-25 02:49:48,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:49:48,295 INFO L225 Difference]: With dead ends: 115 [2018-01-25 02:49:48,296 INFO L226 Difference]: Without dead ends: 111 [2018-01-25 02:49:48,296 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 104 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-01-25 02:49:48,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-01-25 02:49:48,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 102. [2018-01-25 02:49:48,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-01-25 02:49:48,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 129 transitions. [2018-01-25 02:49:48,308 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 129 transitions. Word has length 28 [2018-01-25 02:49:48,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:49:48,309 INFO L432 AbstractCegarLoop]: Abstraction has 102 states and 129 transitions. [2018-01-25 02:49:48,309 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-25 02:49:48,309 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 129 transitions. [2018-01-25 02:49:48,310 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-25 02:49:48,310 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:49:48,310 INFO L322 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 1, 1, 1, 1, 1, 1] [2018-01-25 02:49:48,310 INFO L371 AbstractCegarLoop]: === Iteration 6 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:49:48,310 INFO L82 PathProgramCache]: Analyzing trace with hash -771406513, now seen corresponding path program 5 times [2018-01-25 02:49:48,311 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:49:48,311 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:48,311 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:49:48,311 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:48,312 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:49:48,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:48,327 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:49:48,437 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:48,437 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:48,437 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:49:48,437 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:49:48,438 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:49:48,438 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:48,438 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:49:48,446 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:49:48,446 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:49:48,450 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:48,452 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:48,453 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:48,454 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:48,456 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:48,458 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:48,460 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:48,462 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:48,484 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:48,484 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:48,574 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:48,598 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:48,598 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:49:48,601 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:49:48,602 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:49:48,605 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:48,608 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:48,614 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:48,621 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:48,629 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:48,638 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:48,645 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:48,650 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:48,665 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:48,665 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:48,678 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:48,682 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:49:48,682 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-25 02:49:48,682 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:49:48,683 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-25 02:49:48,683 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-25 02:49:48,683 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-01-25 02:49:48,683 INFO L87 Difference]: Start difference. First operand 102 states and 129 transitions. Second operand 8 states. [2018-01-25 02:49:48,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:49:48,942 INFO L93 Difference]: Finished difference Result 130 states and 164 transitions. [2018-01-25 02:49:48,942 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-25 02:49:48,942 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2018-01-25 02:49:48,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:49:48,944 INFO L225 Difference]: With dead ends: 130 [2018-01-25 02:49:48,944 INFO L226 Difference]: Without dead ends: 126 [2018-01-25 02:49:48,944 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 123 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-01-25 02:49:48,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-01-25 02:49:48,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 116. [2018-01-25 02:49:48,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-01-25 02:49:48,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 148 transitions. [2018-01-25 02:49:48,958 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 148 transitions. Word has length 33 [2018-01-25 02:49:48,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:49:48,958 INFO L432 AbstractCegarLoop]: Abstraction has 116 states and 148 transitions. [2018-01-25 02:49:48,958 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-25 02:49:48,958 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 148 transitions. [2018-01-25 02:49:48,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-25 02:49:48,961 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:49:48,961 INFO L322 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 1, 1, 1, 1, 1, 1] [2018-01-25 02:49:48,961 INFO L371 AbstractCegarLoop]: === Iteration 7 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:49:48,961 INFO L82 PathProgramCache]: Analyzing trace with hash -240614211, now seen corresponding path program 6 times [2018-01-25 02:49:48,962 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:49:48,962 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:48,963 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:49:48,963 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:48,963 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:49:48,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:48,979 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:49:49,062 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 93 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:49,062 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:49,062 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:49:49,062 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:49:49,063 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:49:49,063 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:49,063 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:49:49,070 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:49:49,070 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:49:49,075 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:49,076 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:49,078 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:49,079 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:49,081 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:49,083 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:49,085 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:49,085 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:49,087 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:49,099 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 93 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:49,100 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:49,286 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 93 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:49,307 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:49,307 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:49:49,310 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:49:49,310 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:49:49,314 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:49,316 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:49,321 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:49,326 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:49,333 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:49,341 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:49,350 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:49,358 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:49,361 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:49,373 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 93 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:49,373 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:49,383 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 93 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:49,384 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:49:49,385 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-25 02:49:49,385 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:49:49,385 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-25 02:49:49,385 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-25 02:49:49,385 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-01-25 02:49:49,386 INFO L87 Difference]: Start difference. First operand 116 states and 148 transitions. Second operand 9 states. [2018-01-25 02:49:49,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:49:49,713 INFO L93 Difference]: Finished difference Result 145 states and 184 transitions. [2018-01-25 02:49:49,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-25 02:49:49,714 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 38 [2018-01-25 02:49:49,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:49:49,715 INFO L225 Difference]: With dead ends: 145 [2018-01-25 02:49:49,715 INFO L226 Difference]: Without dead ends: 141 [2018-01-25 02:49:49,715 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 142 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-01-25 02:49:49,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-01-25 02:49:49,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 130. [2018-01-25 02:49:49,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-01-25 02:49:49,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 167 transitions. [2018-01-25 02:49:49,728 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 167 transitions. Word has length 38 [2018-01-25 02:49:49,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:49:49,728 INFO L432 AbstractCegarLoop]: Abstraction has 130 states and 167 transitions. [2018-01-25 02:49:49,729 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-25 02:49:49,729 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 167 transitions. [2018-01-25 02:49:49,730 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-25 02:49:49,730 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:49:49,730 INFO L322 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 1, 1, 1, 1, 1, 1] [2018-01-25 02:49:49,731 INFO L371 AbstractCegarLoop]: === Iteration 8 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:49:49,731 INFO L82 PathProgramCache]: Analyzing trace with hash 1558821391, now seen corresponding path program 7 times [2018-01-25 02:49:49,731 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:49:49,732 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:49,732 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:49:49,732 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:49,732 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:49:49,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:49,744 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:49:49,855 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:49,856 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:49,856 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:49:49,856 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:49:49,856 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:49:49,856 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:49,856 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:49:49,865 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:49:49,866 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:49:49,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:49,878 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:49,900 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:49,900 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:50,032 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:50,055 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:50,055 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:49:50,060 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:49:50,061 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:49:50,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:50,083 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:50,100 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:50,100 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:50,115 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:50,117 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:49:50,117 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-25 02:49:50,117 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:49:50,118 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-25 02:49:50,118 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-25 02:49:50,118 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-01-25 02:49:50,119 INFO L87 Difference]: Start difference. First operand 130 states and 167 transitions. Second operand 10 states. [2018-01-25 02:49:50,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:49:50,519 INFO L93 Difference]: Finished difference Result 160 states and 204 transitions. [2018-01-25 02:49:50,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-25 02:49:50,519 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2018-01-25 02:49:50,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:49:50,520 INFO L225 Difference]: With dead ends: 160 [2018-01-25 02:49:50,520 INFO L226 Difference]: Without dead ends: 156 [2018-01-25 02:49:50,521 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 179 GetRequests, 161 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-01-25 02:49:50,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-01-25 02:49:50,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 144. [2018-01-25 02:49:50,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-01-25 02:49:50,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 186 transitions. [2018-01-25 02:49:50,531 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 186 transitions. Word has length 43 [2018-01-25 02:49:50,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:49:50,531 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 186 transitions. [2018-01-25 02:49:50,531 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-25 02:49:50,531 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 186 transitions. [2018-01-25 02:49:50,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-25 02:49:50,532 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:49:50,533 INFO L322 BasicCegarLoop]: trace histogram [9, 9, 8, 8, 8, 1, 1, 1, 1, 1, 1] [2018-01-25 02:49:50,533 INFO L371 AbstractCegarLoop]: === Iteration 9 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:49:50,533 INFO L82 PathProgramCache]: Analyzing trace with hash -821098499, now seen corresponding path program 8 times [2018-01-25 02:49:50,533 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:49:50,534 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:50,534 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:49:50,534 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:50,534 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:49:50,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:50,546 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:49:50,666 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 164 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:50,667 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:50,667 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:49:50,667 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:49:50,667 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:49:50,667 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:50,667 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:49:50,672 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:49:50,672 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:49:50,675 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:50,679 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:50,680 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:50,682 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:50,695 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 164 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:50,695 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:50,814 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 164 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:50,835 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:50,835 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:49:50,838 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:49:50,838 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:49:50,842 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:50,849 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:50,859 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:50,863 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:50,875 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 164 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:50,876 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:50,887 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 164 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:50,890 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:49:50,890 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-25 02:49:50,890 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:49:50,890 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-25 02:49:50,891 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-25 02:49:50,891 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-01-25 02:49:50,891 INFO L87 Difference]: Start difference. First operand 144 states and 186 transitions. Second operand 11 states. [2018-01-25 02:49:51,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:49:51,653 INFO L93 Difference]: Finished difference Result 175 states and 224 transitions. [2018-01-25 02:49:51,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-25 02:49:51,654 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 48 [2018-01-25 02:49:51,654 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:49:51,655 INFO L225 Difference]: With dead ends: 175 [2018-01-25 02:49:51,655 INFO L226 Difference]: Without dead ends: 171 [2018-01-25 02:49:51,656 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 180 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-01-25 02:49:51,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-01-25 02:49:51,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 158. [2018-01-25 02:49:51,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-01-25 02:49:51,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 205 transitions. [2018-01-25 02:49:51,666 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 205 transitions. Word has length 48 [2018-01-25 02:49:51,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:49:51,666 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 205 transitions. [2018-01-25 02:49:51,666 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-25 02:49:51,666 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 205 transitions. [2018-01-25 02:49:51,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-25 02:49:51,668 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:49:51,668 INFO L322 BasicCegarLoop]: trace histogram [10, 10, 9, 9, 9, 1, 1, 1, 1, 1, 1] [2018-01-25 02:49:51,668 INFO L371 AbstractCegarLoop]: === Iteration 10 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:49:51,668 INFO L82 PathProgramCache]: Analyzing trace with hash -413974833, now seen corresponding path program 9 times [2018-01-25 02:49:51,668 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:49:51,669 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:51,670 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:49:51,670 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:51,670 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:49:51,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:51,684 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:49:51,964 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 207 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:51,965 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:51,965 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:49:51,965 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:49:51,965 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:49:51,965 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:51,965 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:49:51,974 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:49:51,974 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:49:51,980 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:51,981 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:51,983 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:51,985 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:51,992 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:51,995 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:51,998 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:52,001 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:52,004 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:52,010 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:52,011 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:52,013 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:52,030 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 207 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:52,031 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:52,258 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 207 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:52,279 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:52,279 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:49:52,282 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:49:52,282 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:49:52,288 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:52,292 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:52,299 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:52,308 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:52,318 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:52,329 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:52,340 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:52,355 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:52,373 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:52,388 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:49:52,403 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:52,408 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:52,418 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 207 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:52,419 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:52,429 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 207 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:52,431 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:49:52,471 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-25 02:49:52,471 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:49:52,472 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-25 02:49:52,472 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-25 02:49:52,472 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-01-25 02:49:52,472 INFO L87 Difference]: Start difference. First operand 158 states and 205 transitions. Second operand 12 states. [2018-01-25 02:49:53,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:49:53,156 INFO L93 Difference]: Finished difference Result 190 states and 244 transitions. [2018-01-25 02:49:53,157 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-25 02:49:53,157 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 53 [2018-01-25 02:49:53,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:49:53,158 INFO L225 Difference]: With dead ends: 190 [2018-01-25 02:49:53,158 INFO L226 Difference]: Without dead ends: 186 [2018-01-25 02:49:53,159 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 199 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-01-25 02:49:53,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-01-25 02:49:53,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 172. [2018-01-25 02:49:53,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-01-25 02:49:53,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 224 transitions. [2018-01-25 02:49:53,170 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 224 transitions. Word has length 53 [2018-01-25 02:49:53,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:49:53,171 INFO L432 AbstractCegarLoop]: Abstraction has 172 states and 224 transitions. [2018-01-25 02:49:53,171 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-25 02:49:53,171 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 224 transitions. [2018-01-25 02:49:53,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-01-25 02:49:53,173 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:49:53,173 INFO L322 BasicCegarLoop]: trace histogram [11, 11, 10, 10, 10, 1, 1, 1, 1, 1, 1] [2018-01-25 02:49:53,173 INFO L371 AbstractCegarLoop]: === Iteration 11 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:49:53,173 INFO L82 PathProgramCache]: Analyzing trace with hash -442860739, now seen corresponding path program 10 times [2018-01-25 02:49:53,173 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:49:53,174 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:53,174 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:49:53,174 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:53,175 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:49:53,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:53,187 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:49:53,339 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 0 proven. 255 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:53,339 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:53,340 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:49:53,340 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:49:53,340 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:49:53,340 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:53,340 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:49:53,348 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:49:53,349 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:49:53,361 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:53,363 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:53,373 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 0 proven. 255 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:53,373 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:53,537 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 0 proven. 255 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:53,559 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:53,559 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:49:53,562 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:49:53,562 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:49:53,597 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:53,601 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:53,611 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 0 proven. 255 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:53,611 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:53,623 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 0 proven. 255 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:53,624 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:49:53,625 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-25 02:49:53,625 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:49:53,625 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-25 02:49:53,625 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-25 02:49:53,625 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-01-25 02:49:53,626 INFO L87 Difference]: Start difference. First operand 172 states and 224 transitions. Second operand 13 states. [2018-01-25 02:49:54,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:49:54,226 INFO L93 Difference]: Finished difference Result 205 states and 264 transitions. [2018-01-25 02:49:54,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-25 02:49:54,226 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 58 [2018-01-25 02:49:54,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:49:54,228 INFO L225 Difference]: With dead ends: 205 [2018-01-25 02:49:54,228 INFO L226 Difference]: Without dead ends: 201 [2018-01-25 02:49:54,229 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 242 GetRequests, 218 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-01-25 02:49:54,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2018-01-25 02:49:54,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 186. [2018-01-25 02:49:54,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-25 02:49:54,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 243 transitions. [2018-01-25 02:49:54,240 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 243 transitions. Word has length 58 [2018-01-25 02:49:54,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:49:54,240 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 243 transitions. [2018-01-25 02:49:54,241 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-25 02:49:54,241 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 243 transitions. [2018-01-25 02:49:54,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-25 02:49:54,242 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:49:54,242 INFO L322 BasicCegarLoop]: trace histogram [12, 12, 11, 11, 11, 1, 1, 1, 1, 1, 1] [2018-01-25 02:49:54,242 INFO L371 AbstractCegarLoop]: === Iteration 12 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:49:54,242 INFO L82 PathProgramCache]: Analyzing trace with hash -634530929, now seen corresponding path program 11 times [2018-01-25 02:49:54,242 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:49:54,243 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:54,243 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:49:54,243 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:54,243 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:49:54,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:54,257 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:49:54,449 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 0 proven. 308 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:54,449 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:54,449 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:49:54,449 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:49:54,450 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:49:54,450 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:54,450 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:49:54,455 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:49:54,455 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:49:54,458 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,460 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,461 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,463 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,465 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,466 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,468 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,469 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,470 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,472 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,474 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,476 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,477 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:54,478 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:54,488 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 0 proven. 308 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:54,489 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:54,665 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 0 proven. 308 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:54,686 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:54,686 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:49:54,689 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:49:54,689 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:49:54,692 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,695 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,701 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,707 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,715 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,723 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,733 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,744 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,756 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,769 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,784 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,803 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:54,815 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:54,819 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:54,830 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 0 proven. 308 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:54,830 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:54,852 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 0 proven. 308 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:54,854 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:49:54,854 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-25 02:49:54,855 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:49:54,855 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-25 02:49:54,855 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-25 02:49:54,856 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-01-25 02:49:54,856 INFO L87 Difference]: Start difference. First operand 186 states and 243 transitions. Second operand 14 states. [2018-01-25 02:49:55,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:49:55,510 INFO L93 Difference]: Finished difference Result 220 states and 284 transitions. [2018-01-25 02:49:55,510 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-25 02:49:55,510 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 63 [2018-01-25 02:49:55,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:49:55,512 INFO L225 Difference]: With dead ends: 220 [2018-01-25 02:49:55,512 INFO L226 Difference]: Without dead ends: 216 [2018-01-25 02:49:55,512 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 263 GetRequests, 237 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-01-25 02:49:55,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-01-25 02:49:55,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 200. [2018-01-25 02:49:55,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states. [2018-01-25 02:49:55,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 262 transitions. [2018-01-25 02:49:55,523 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 262 transitions. Word has length 63 [2018-01-25 02:49:55,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:49:55,523 INFO L432 AbstractCegarLoop]: Abstraction has 200 states and 262 transitions. [2018-01-25 02:49:55,523 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-25 02:49:55,523 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 262 transitions. [2018-01-25 02:49:55,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-01-25 02:49:55,524 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:49:55,524 INFO L322 BasicCegarLoop]: trace histogram [13, 13, 12, 12, 12, 1, 1, 1, 1, 1, 1] [2018-01-25 02:49:55,525 INFO L371 AbstractCegarLoop]: === Iteration 13 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:49:55,525 INFO L82 PathProgramCache]: Analyzing trace with hash 2145312381, now seen corresponding path program 12 times [2018-01-25 02:49:55,525 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:49:55,526 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:55,526 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:49:55,526 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:55,526 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:49:55,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:55,537 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:49:55,761 INFO L134 CoverageAnalysis]: Checked inductivity of 366 backedges. 0 proven. 366 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:55,761 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:55,761 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:49:55,761 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:49:55,761 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:49:55,761 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:55,761 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:49:55,770 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:49:55,770 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:49:55,774 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:55,775 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:55,777 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:55,778 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:55,779 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:55,781 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:55,783 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:55,785 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:55,787 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:55,790 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:55,793 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:55,795 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:55,798 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:55,799 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:55,801 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:55,812 INFO L134 CoverageAnalysis]: Checked inductivity of 366 backedges. 0 proven. 366 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:55,813 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:56,090 INFO L134 CoverageAnalysis]: Checked inductivity of 366 backedges. 0 proven. 366 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:56,111 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:56,111 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:49:56,114 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:49:56,114 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:49:56,118 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:56,120 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:56,125 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:56,130 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:56,137 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:56,145 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:56,155 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:56,165 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:56,177 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:56,190 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:56,204 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:56,219 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:56,236 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:49:56,248 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:56,253 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:56,267 INFO L134 CoverageAnalysis]: Checked inductivity of 366 backedges. 0 proven. 366 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:56,267 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:56,287 INFO L134 CoverageAnalysis]: Checked inductivity of 366 backedges. 0 proven. 366 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:56,288 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:49:56,289 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-25 02:49:56,289 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:49:56,289 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-25 02:49:56,289 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-25 02:49:56,290 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-01-25 02:49:56,290 INFO L87 Difference]: Start difference. First operand 200 states and 262 transitions. Second operand 15 states. [2018-01-25 02:49:57,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:49:57,259 INFO L93 Difference]: Finished difference Result 235 states and 304 transitions. [2018-01-25 02:49:57,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-25 02:49:57,259 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 68 [2018-01-25 02:49:57,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:49:57,261 INFO L225 Difference]: With dead ends: 235 [2018-01-25 02:49:57,261 INFO L226 Difference]: Without dead ends: 231 [2018-01-25 02:49:57,261 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 284 GetRequests, 256 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-01-25 02:49:57,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2018-01-25 02:49:57,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 214. [2018-01-25 02:49:57,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-01-25 02:49:57,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 281 transitions. [2018-01-25 02:49:57,270 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 281 transitions. Word has length 68 [2018-01-25 02:49:57,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:49:57,271 INFO L432 AbstractCegarLoop]: Abstraction has 214 states and 281 transitions. [2018-01-25 02:49:57,271 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-25 02:49:57,271 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 281 transitions. [2018-01-25 02:49:57,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-01-25 02:49:57,272 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:49:57,272 INFO L322 BasicCegarLoop]: trace histogram [14, 14, 13, 13, 13, 1, 1, 1, 1, 1, 1] [2018-01-25 02:49:57,272 INFO L371 AbstractCegarLoop]: === Iteration 14 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:49:57,272 INFO L82 PathProgramCache]: Analyzing trace with hash 1734703183, now seen corresponding path program 13 times [2018-01-25 02:49:57,272 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:49:57,273 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:57,273 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:49:57,273 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:57,273 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:49:57,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:57,285 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:49:57,448 INFO L134 CoverageAnalysis]: Checked inductivity of 429 backedges. 0 proven. 429 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:57,448 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:57,481 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:49:57,481 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:49:57,481 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:49:57,481 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:57,481 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:49:57,487 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:49:57,487 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:49:57,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:57,499 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:57,516 INFO L134 CoverageAnalysis]: Checked inductivity of 429 backedges. 0 proven. 429 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:57,516 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:57,755 INFO L134 CoverageAnalysis]: Checked inductivity of 429 backedges. 0 proven. 429 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:57,776 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:57,776 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:49:57,780 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:49:57,780 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:49:57,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:57,809 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:57,822 INFO L134 CoverageAnalysis]: Checked inductivity of 429 backedges. 0 proven. 429 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:57,822 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:57,842 INFO L134 CoverageAnalysis]: Checked inductivity of 429 backedges. 0 proven. 429 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:57,844 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:49:57,844 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-25 02:49:57,844 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:49:57,844 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-25 02:49:57,845 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-25 02:49:57,845 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-01-25 02:49:57,845 INFO L87 Difference]: Start difference. First operand 214 states and 281 transitions. Second operand 16 states. [2018-01-25 02:49:58,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:49:58,739 INFO L93 Difference]: Finished difference Result 250 states and 324 transitions. [2018-01-25 02:49:58,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-25 02:49:58,740 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 73 [2018-01-25 02:49:58,740 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:49:58,741 INFO L225 Difference]: With dead ends: 250 [2018-01-25 02:49:58,742 INFO L226 Difference]: Without dead ends: 246 [2018-01-25 02:49:58,742 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 305 GetRequests, 275 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-01-25 02:49:58,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-01-25 02:49:58,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 228. [2018-01-25 02:49:58,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228 states. [2018-01-25 02:49:58,756 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 300 transitions. [2018-01-25 02:49:58,756 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 300 transitions. Word has length 73 [2018-01-25 02:49:58,757 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:49:58,757 INFO L432 AbstractCegarLoop]: Abstraction has 228 states and 300 transitions. [2018-01-25 02:49:58,757 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-25 02:49:58,757 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 300 transitions. [2018-01-25 02:49:58,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-01-25 02:49:58,759 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:49:58,759 INFO L322 BasicCegarLoop]: trace histogram [15, 15, 14, 14, 14, 1, 1, 1, 1, 1, 1] [2018-01-25 02:49:58,759 INFO L371 AbstractCegarLoop]: === Iteration 15 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:49:58,759 INFO L82 PathProgramCache]: Analyzing trace with hash -1083166275, now seen corresponding path program 14 times [2018-01-25 02:49:58,759 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:49:58,760 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:58,760 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:49:58,760 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:49:58,761 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:49:58,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:49:58,776 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:49:59,064 INFO L134 CoverageAnalysis]: Checked inductivity of 497 backedges. 0 proven. 497 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:59,065 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:59,065 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:49:59,065 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:49:59,065 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:49:59,065 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:59,065 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:49:59,071 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:49:59,071 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:49:59,075 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:59,082 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:59,084 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:59,087 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:59,109 INFO L134 CoverageAnalysis]: Checked inductivity of 497 backedges. 0 proven. 497 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:59,109 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:59,366 INFO L134 CoverageAnalysis]: Checked inductivity of 497 backedges. 0 proven. 497 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:59,386 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:49:59,386 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:49:59,389 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:49:59,390 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:49:59,394 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:59,404 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:49:59,419 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:49:59,423 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:49:59,463 INFO L134 CoverageAnalysis]: Checked inductivity of 497 backedges. 0 proven. 497 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:59,463 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:49:59,487 INFO L134 CoverageAnalysis]: Checked inductivity of 497 backedges. 0 proven. 497 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:49:59,488 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:49:59,489 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-25 02:49:59,489 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:49:59,489 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-25 02:49:59,489 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-25 02:49:59,490 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=706, Unknown=0, NotChecked=0, Total=992 [2018-01-25 02:49:59,490 INFO L87 Difference]: Start difference. First operand 228 states and 300 transitions. Second operand 17 states. [2018-01-25 02:50:00,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:00,685 INFO L93 Difference]: Finished difference Result 265 states and 344 transitions. [2018-01-25 02:50:00,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-25 02:50:00,685 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 78 [2018-01-25 02:50:00,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:00,687 INFO L225 Difference]: With dead ends: 265 [2018-01-25 02:50:00,687 INFO L226 Difference]: Without dead ends: 261 [2018-01-25 02:50:00,688 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 326 GetRequests, 294 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=286, Invalid=706, Unknown=0, NotChecked=0, Total=992 [2018-01-25 02:50:00,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261 states. [2018-01-25 02:50:00,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261 to 242. [2018-01-25 02:50:00,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 242 states. [2018-01-25 02:50:00,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 319 transitions. [2018-01-25 02:50:00,699 INFO L78 Accepts]: Start accepts. Automaton has 242 states and 319 transitions. Word has length 78 [2018-01-25 02:50:00,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:00,699 INFO L432 AbstractCegarLoop]: Abstraction has 242 states and 319 transitions. [2018-01-25 02:50:00,699 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-25 02:50:00,699 INFO L276 IsEmpty]: Start isEmpty. Operand 242 states and 319 transitions. [2018-01-25 02:50:00,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-01-25 02:50:00,700 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:00,700 INFO L322 BasicCegarLoop]: trace histogram [16, 16, 15, 15, 15, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:00,701 INFO L371 AbstractCegarLoop]: === Iteration 16 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:00,701 INFO L82 PathProgramCache]: Analyzing trace with hash 1239821583, now seen corresponding path program 15 times [2018-01-25 02:50:00,701 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:00,701 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:00,701 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:00,702 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:00,702 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:00,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:00,717 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:01,290 INFO L134 CoverageAnalysis]: Checked inductivity of 570 backedges. 0 proven. 570 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:01,290 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:01,290 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:01,291 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:01,291 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:01,291 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:01,291 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:01,309 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:50:01,310 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:50:01,314 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,315 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,317 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,318 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,319 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,321 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,323 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,324 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,326 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,328 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,330 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,332 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,335 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,337 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,340 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,343 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,344 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:01,346 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:01,361 INFO L134 CoverageAnalysis]: Checked inductivity of 570 backedges. 0 proven. 570 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:01,362 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:01,750 INFO L134 CoverageAnalysis]: Checked inductivity of 570 backedges. 0 proven. 570 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:01,771 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:01,771 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:01,774 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:50:01,774 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:50:01,778 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,780 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,785 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,791 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,801 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,809 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,818 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,828 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,840 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,853 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,867 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,883 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,901 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,918 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,937 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,958 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:01,983 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:01,987 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:02,010 INFO L134 CoverageAnalysis]: Checked inductivity of 570 backedges. 0 proven. 570 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:02,010 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:02,027 INFO L134 CoverageAnalysis]: Checked inductivity of 570 backedges. 0 proven. 570 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:02,029 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:02,029 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-25 02:50:02,029 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:02,029 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-25 02:50:02,030 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-25 02:50:02,030 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2018-01-25 02:50:02,030 INFO L87 Difference]: Start difference. First operand 242 states and 319 transitions. Second operand 18 states. [2018-01-25 02:50:03,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:03,186 INFO L93 Difference]: Finished difference Result 280 states and 364 transitions. [2018-01-25 02:50:03,186 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-25 02:50:03,186 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 83 [2018-01-25 02:50:03,187 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:03,188 INFO L225 Difference]: With dead ends: 280 [2018-01-25 02:50:03,189 INFO L226 Difference]: Without dead ends: 276 [2018-01-25 02:50:03,189 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 347 GetRequests, 313 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2018-01-25 02:50:03,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 276 states. [2018-01-25 02:50:03,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 276 to 256. [2018-01-25 02:50:03,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 256 states. [2018-01-25 02:50:03,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 256 states to 256 states and 338 transitions. [2018-01-25 02:50:03,203 INFO L78 Accepts]: Start accepts. Automaton has 256 states and 338 transitions. Word has length 83 [2018-01-25 02:50:03,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:03,203 INFO L432 AbstractCegarLoop]: Abstraction has 256 states and 338 transitions. [2018-01-25 02:50:03,203 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-25 02:50:03,203 INFO L276 IsEmpty]: Start isEmpty. Operand 256 states and 338 transitions. [2018-01-25 02:50:03,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-25 02:50:03,205 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:03,205 INFO L322 BasicCegarLoop]: trace histogram [17, 17, 16, 16, 16, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:03,205 INFO L371 AbstractCegarLoop]: === Iteration 17 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:03,205 INFO L82 PathProgramCache]: Analyzing trace with hash -589138691, now seen corresponding path program 16 times [2018-01-25 02:50:03,206 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:03,206 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:03,206 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:03,206 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:03,207 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:03,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:03,220 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:03,579 INFO L134 CoverageAnalysis]: Checked inductivity of 648 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:03,579 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:03,579 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:03,579 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:03,579 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:03,579 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:03,579 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:03,585 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:50:03,585 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:50:03,602 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:03,605 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:03,635 INFO L134 CoverageAnalysis]: Checked inductivity of 648 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:03,635 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:03,956 INFO L134 CoverageAnalysis]: Checked inductivity of 648 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:03,977 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:03,977 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:03,980 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:50:03,980 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:50:04,055 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:04,061 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:04,077 INFO L134 CoverageAnalysis]: Checked inductivity of 648 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:04,077 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:04,106 INFO L134 CoverageAnalysis]: Checked inductivity of 648 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:04,107 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:04,108 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-25 02:50:04,108 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:04,108 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-25 02:50:04,108 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-25 02:50:04,109 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=358, Invalid=902, Unknown=0, NotChecked=0, Total=1260 [2018-01-25 02:50:04,109 INFO L87 Difference]: Start difference. First operand 256 states and 338 transitions. Second operand 19 states. [2018-01-25 02:50:05,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:05,585 INFO L93 Difference]: Finished difference Result 295 states and 384 transitions. [2018-01-25 02:50:05,585 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-25 02:50:05,586 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 88 [2018-01-25 02:50:05,586 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:05,588 INFO L225 Difference]: With dead ends: 295 [2018-01-25 02:50:05,588 INFO L226 Difference]: Without dead ends: 291 [2018-01-25 02:50:05,589 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 368 GetRequests, 332 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=358, Invalid=902, Unknown=0, NotChecked=0, Total=1260 [2018-01-25 02:50:05,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2018-01-25 02:50:05,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 270. [2018-01-25 02:50:05,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 270 states. [2018-01-25 02:50:05,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 270 states to 270 states and 357 transitions. [2018-01-25 02:50:05,604 INFO L78 Accepts]: Start accepts. Automaton has 270 states and 357 transitions. Word has length 88 [2018-01-25 02:50:05,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:05,605 INFO L432 AbstractCegarLoop]: Abstraction has 270 states and 357 transitions. [2018-01-25 02:50:05,605 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-25 02:50:05,605 INFO L276 IsEmpty]: Start isEmpty. Operand 270 states and 357 transitions. [2018-01-25 02:50:05,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-01-25 02:50:05,608 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:05,608 INFO L322 BasicCegarLoop]: trace histogram [18, 18, 17, 17, 17, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:05,608 INFO L371 AbstractCegarLoop]: === Iteration 18 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:05,608 INFO L82 PathProgramCache]: Analyzing trace with hash -2053377585, now seen corresponding path program 17 times [2018-01-25 02:50:05,608 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:05,609 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:05,609 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:05,609 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:05,610 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:05,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:05,627 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:05,914 INFO L134 CoverageAnalysis]: Checked inductivity of 731 backedges. 0 proven. 731 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:05,915 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:05,915 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:05,915 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:05,915 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:05,915 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:05,915 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:05,923 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:50:05,923 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:05,927 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,929 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,930 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,932 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,933 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,935 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,937 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,939 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,941 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,943 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,945 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,948 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,951 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,954 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,958 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,961 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,965 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,969 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:05,970 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:05,973 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:05,997 INFO L134 CoverageAnalysis]: Checked inductivity of 731 backedges. 0 proven. 731 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:05,998 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:06,409 INFO L134 CoverageAnalysis]: Checked inductivity of 731 backedges. 0 proven. 731 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:06,430 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:06,430 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:06,433 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:50:06,433 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:06,437 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,440 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,445 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,451 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,459 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,468 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,479 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,490 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,501 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,515 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,529 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,545 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,562 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,580 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,608 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,629 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,652 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,676 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:06,698 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:06,703 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:06,719 INFO L134 CoverageAnalysis]: Checked inductivity of 731 backedges. 0 proven. 731 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:06,719 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:06,744 INFO L134 CoverageAnalysis]: Checked inductivity of 731 backedges. 0 proven. 731 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:06,745 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:06,745 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-25 02:50:06,745 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:06,745 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-25 02:50:06,746 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-25 02:50:06,746 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=397, Invalid=1009, Unknown=0, NotChecked=0, Total=1406 [2018-01-25 02:50:06,746 INFO L87 Difference]: Start difference. First operand 270 states and 357 transitions. Second operand 20 states. [2018-01-25 02:50:08,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:08,686 INFO L93 Difference]: Finished difference Result 310 states and 404 transitions. [2018-01-25 02:50:08,686 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-25 02:50:08,686 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 93 [2018-01-25 02:50:08,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:08,688 INFO L225 Difference]: With dead ends: 310 [2018-01-25 02:50:08,688 INFO L226 Difference]: Without dead ends: 306 [2018-01-25 02:50:08,689 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 389 GetRequests, 351 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=397, Invalid=1009, Unknown=0, NotChecked=0, Total=1406 [2018-01-25 02:50:08,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 306 states. [2018-01-25 02:50:08,701 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 306 to 284. [2018-01-25 02:50:08,702 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 284 states. [2018-01-25 02:50:08,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 284 states to 284 states and 376 transitions. [2018-01-25 02:50:08,704 INFO L78 Accepts]: Start accepts. Automaton has 284 states and 376 transitions. Word has length 93 [2018-01-25 02:50:08,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:08,705 INFO L432 AbstractCegarLoop]: Abstraction has 284 states and 376 transitions. [2018-01-25 02:50:08,705 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-25 02:50:08,705 INFO L276 IsEmpty]: Start isEmpty. Operand 284 states and 376 transitions. [2018-01-25 02:50:08,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-01-25 02:50:08,707 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:08,707 INFO L322 BasicCegarLoop]: trace histogram [19, 19, 18, 18, 18, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:08,708 INFO L371 AbstractCegarLoop]: === Iteration 19 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:08,708 INFO L82 PathProgramCache]: Analyzing trace with hash 1741269053, now seen corresponding path program 18 times [2018-01-25 02:50:08,708 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:08,709 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:08,709 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:08,709 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:08,709 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:08,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:08,724 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:08,979 INFO L134 CoverageAnalysis]: Checked inductivity of 819 backedges. 0 proven. 819 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:08,979 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:08,979 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:08,979 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:08,979 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:08,979 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:08,979 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:08,984 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:50:08,985 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:50:08,989 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:08,990 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:08,992 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:08,993 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:08,994 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:08,996 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:08,997 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:08,999 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,000 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,002 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,004 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,006 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,008 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,011 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,013 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,016 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,018 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,021 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,024 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,024 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:09,026 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:09,043 INFO L134 CoverageAnalysis]: Checked inductivity of 819 backedges. 0 proven. 819 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:09,043 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:09,491 INFO L134 CoverageAnalysis]: Checked inductivity of 819 backedges. 0 proven. 819 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:09,512 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:09,512 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:09,515 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:50:09,515 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:50:09,520 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,522 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,527 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,533 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,540 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,548 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,557 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,568 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,580 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,593 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,608 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,623 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,641 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,659 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,678 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,709 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,732 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,757 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,781 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:09,809 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:09,814 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:09,832 INFO L134 CoverageAnalysis]: Checked inductivity of 819 backedges. 0 proven. 819 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:09,832 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:09,853 INFO L134 CoverageAnalysis]: Checked inductivity of 819 backedges. 0 proven. 819 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:09,854 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:09,855 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-25 02:50:09,855 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:09,855 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-25 02:50:09,855 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-25 02:50:09,856 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=438, Invalid=1122, Unknown=0, NotChecked=0, Total=1560 [2018-01-25 02:50:09,856 INFO L87 Difference]: Start difference. First operand 284 states and 376 transitions. Second operand 21 states. [2018-01-25 02:50:11,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:11,995 INFO L93 Difference]: Finished difference Result 325 states and 424 transitions. [2018-01-25 02:50:11,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-25 02:50:11,995 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 98 [2018-01-25 02:50:11,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:11,997 INFO L225 Difference]: With dead ends: 325 [2018-01-25 02:50:11,997 INFO L226 Difference]: Without dead ends: 321 [2018-01-25 02:50:11,998 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 410 GetRequests, 370 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=438, Invalid=1122, Unknown=0, NotChecked=0, Total=1560 [2018-01-25 02:50:11,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 321 states. [2018-01-25 02:50:12,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 321 to 298. [2018-01-25 02:50:12,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 298 states. [2018-01-25 02:50:12,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 298 states to 298 states and 395 transitions. [2018-01-25 02:50:12,008 INFO L78 Accepts]: Start accepts. Automaton has 298 states and 395 transitions. Word has length 98 [2018-01-25 02:50:12,008 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:12,008 INFO L432 AbstractCegarLoop]: Abstraction has 298 states and 395 transitions. [2018-01-25 02:50:12,008 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-25 02:50:12,008 INFO L276 IsEmpty]: Start isEmpty. Operand 298 states and 395 transitions. [2018-01-25 02:50:12,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-01-25 02:50:12,009 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:12,009 INFO L322 BasicCegarLoop]: trace histogram [20, 20, 19, 19, 19, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:12,010 INFO L371 AbstractCegarLoop]: === Iteration 20 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:12,010 INFO L82 PathProgramCache]: Analyzing trace with hash 661833359, now seen corresponding path program 19 times [2018-01-25 02:50:12,010 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:12,010 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:12,010 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:12,010 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:12,011 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:12,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:12,026 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:12,475 INFO L134 CoverageAnalysis]: Checked inductivity of 912 backedges. 0 proven. 912 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:12,476 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:12,476 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:12,476 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:12,476 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:12,476 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:12,476 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:12,481 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:12,482 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:12,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:12,498 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:12,519 INFO L134 CoverageAnalysis]: Checked inductivity of 912 backedges. 0 proven. 912 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:12,519 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:13,287 INFO L134 CoverageAnalysis]: Checked inductivity of 912 backedges. 0 proven. 912 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:13,308 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:13,308 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:13,311 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:13,311 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:13,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:13,353 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:13,371 INFO L134 CoverageAnalysis]: Checked inductivity of 912 backedges. 0 proven. 912 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:13,371 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:13,393 INFO L134 CoverageAnalysis]: Checked inductivity of 912 backedges. 0 proven. 912 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:13,405 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:13,405 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-25 02:50:13,405 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:13,405 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-25 02:50:13,406 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-25 02:50:13,406 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=481, Invalid=1241, Unknown=0, NotChecked=0, Total=1722 [2018-01-25 02:50:13,406 INFO L87 Difference]: Start difference. First operand 298 states and 395 transitions. Second operand 22 states. [2018-01-25 02:50:15,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:15,178 INFO L93 Difference]: Finished difference Result 340 states and 444 transitions. [2018-01-25 02:50:15,178 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-25 02:50:15,178 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 103 [2018-01-25 02:50:15,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:15,180 INFO L225 Difference]: With dead ends: 340 [2018-01-25 02:50:15,180 INFO L226 Difference]: Without dead ends: 336 [2018-01-25 02:50:15,181 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 431 GetRequests, 389 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=481, Invalid=1241, Unknown=0, NotChecked=0, Total=1722 [2018-01-25 02:50:15,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 336 states. [2018-01-25 02:50:15,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 336 to 312. [2018-01-25 02:50:15,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 312 states. [2018-01-25 02:50:15,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 312 states to 312 states and 414 transitions. [2018-01-25 02:50:15,190 INFO L78 Accepts]: Start accepts. Automaton has 312 states and 414 transitions. Word has length 103 [2018-01-25 02:50:15,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:15,190 INFO L432 AbstractCegarLoop]: Abstraction has 312 states and 414 transitions. [2018-01-25 02:50:15,190 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-25 02:50:15,190 INFO L276 IsEmpty]: Start isEmpty. Operand 312 states and 414 transitions. [2018-01-25 02:50:15,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-01-25 02:50:15,191 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:15,191 INFO L322 BasicCegarLoop]: trace histogram [21, 21, 20, 20, 20, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:15,191 INFO L371 AbstractCegarLoop]: === Iteration 21 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:15,191 INFO L82 PathProgramCache]: Analyzing trace with hash -2034644099, now seen corresponding path program 20 times [2018-01-25 02:50:15,191 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:15,192 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:15,192 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:15,192 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:15,192 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:15,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:15,203 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:15,948 INFO L134 CoverageAnalysis]: Checked inductivity of 1010 backedges. 0 proven. 1010 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:15,948 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:15,948 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:15,948 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:15,949 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:15,949 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:15,949 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:15,954 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:50:15,954 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:15,959 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:15,968 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:15,971 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:15,974 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:16,001 INFO L134 CoverageAnalysis]: Checked inductivity of 1010 backedges. 0 proven. 1010 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:16,001 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:16,481 INFO L134 CoverageAnalysis]: Checked inductivity of 1010 backedges. 0 proven. 1010 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:16,502 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:16,502 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:16,506 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:50:16,506 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:16,512 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:16,527 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:16,549 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:16,554 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:16,583 INFO L134 CoverageAnalysis]: Checked inductivity of 1010 backedges. 0 proven. 1010 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:16,583 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:16,629 INFO L134 CoverageAnalysis]: Checked inductivity of 1010 backedges. 0 proven. 1010 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:16,630 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:16,630 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-25 02:50:16,630 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:16,631 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-25 02:50:16,631 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-25 02:50:16,631 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=526, Invalid=1366, Unknown=0, NotChecked=0, Total=1892 [2018-01-25 02:50:16,631 INFO L87 Difference]: Start difference. First operand 312 states and 414 transitions. Second operand 23 states. [2018-01-25 02:50:18,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:18,640 INFO L93 Difference]: Finished difference Result 355 states and 464 transitions. [2018-01-25 02:50:18,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-25 02:50:18,671 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 108 [2018-01-25 02:50:18,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:18,673 INFO L225 Difference]: With dead ends: 355 [2018-01-25 02:50:18,673 INFO L226 Difference]: Without dead ends: 351 [2018-01-25 02:50:18,674 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 452 GetRequests, 408 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=526, Invalid=1366, Unknown=0, NotChecked=0, Total=1892 [2018-01-25 02:50:18,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 351 states. [2018-01-25 02:50:18,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 351 to 326. [2018-01-25 02:50:18,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 326 states. [2018-01-25 02:50:18,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 433 transitions. [2018-01-25 02:50:18,688 INFO L78 Accepts]: Start accepts. Automaton has 326 states and 433 transitions. Word has length 108 [2018-01-25 02:50:18,688 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:18,688 INFO L432 AbstractCegarLoop]: Abstraction has 326 states and 433 transitions. [2018-01-25 02:50:18,689 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-25 02:50:18,689 INFO L276 IsEmpty]: Start isEmpty. Operand 326 states and 433 transitions. [2018-01-25 02:50:18,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-01-25 02:50:18,691 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:18,691 INFO L322 BasicCegarLoop]: trace histogram [22, 22, 21, 21, 21, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:18,691 INFO L371 AbstractCegarLoop]: === Iteration 22 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:18,691 INFO L82 PathProgramCache]: Analyzing trace with hash 89566031, now seen corresponding path program 21 times [2018-01-25 02:50:18,691 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:18,692 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:18,692 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:18,692 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:18,692 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:18,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:18,708 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:19,023 INFO L134 CoverageAnalysis]: Checked inductivity of 1113 backedges. 0 proven. 1113 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:19,023 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:19,023 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:19,023 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:19,023 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:19,023 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:19,024 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:19,028 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:50:19,029 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:50:19,033 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,034 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,035 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,036 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,037 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,038 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,040 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,041 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,043 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,044 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,046 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,048 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,050 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,052 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,054 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,056 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,058 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,061 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,064 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,066 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,069 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,072 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,073 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:19,075 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:19,102 INFO L134 CoverageAnalysis]: Checked inductivity of 1113 backedges. 0 proven. 1113 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:19,102 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:19,796 INFO L134 CoverageAnalysis]: Checked inductivity of 1113 backedges. 0 proven. 1113 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:19,817 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:19,817 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:19,820 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:50:19,820 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:50:19,826 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,829 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,834 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,840 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,847 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,855 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,864 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,875 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,887 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,899 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,913 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,929 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,946 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,964 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:19,983 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:20,003 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:20,034 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:20,057 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:20,081 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:20,107 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:20,144 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:20,172 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:20,196 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:20,213 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:20,254 INFO L134 CoverageAnalysis]: Checked inductivity of 1113 backedges. 0 proven. 1113 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:20,254 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:20,308 INFO L134 CoverageAnalysis]: Checked inductivity of 1113 backedges. 0 proven. 1113 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:20,310 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:20,310 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-25 02:50:20,310 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:20,310 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-25 02:50:20,310 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-25 02:50:20,311 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-01-25 02:50:20,311 INFO L87 Difference]: Start difference. First operand 326 states and 433 transitions. Second operand 24 states. [2018-01-25 02:50:22,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:22,377 INFO L93 Difference]: Finished difference Result 370 states and 484 transitions. [2018-01-25 02:50:22,377 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-25 02:50:22,377 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 113 [2018-01-25 02:50:22,378 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:22,379 INFO L225 Difference]: With dead ends: 370 [2018-01-25 02:50:22,379 INFO L226 Difference]: Without dead ends: 366 [2018-01-25 02:50:22,380 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 473 GetRequests, 427 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-01-25 02:50:22,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366 states. [2018-01-25 02:50:22,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366 to 340. [2018-01-25 02:50:22,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 340 states. [2018-01-25 02:50:22,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 452 transitions. [2018-01-25 02:50:22,395 INFO L78 Accepts]: Start accepts. Automaton has 340 states and 452 transitions. Word has length 113 [2018-01-25 02:50:22,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:22,395 INFO L432 AbstractCegarLoop]: Abstraction has 340 states and 452 transitions. [2018-01-25 02:50:22,396 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-25 02:50:22,396 INFO L276 IsEmpty]: Start isEmpty. Operand 340 states and 452 transitions. [2018-01-25 02:50:22,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2018-01-25 02:50:22,397 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:22,398 INFO L322 BasicCegarLoop]: trace histogram [23, 23, 22, 22, 22, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:22,398 INFO L371 AbstractCegarLoop]: === Iteration 23 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:22,398 INFO L82 PathProgramCache]: Analyzing trace with hash 927391421, now seen corresponding path program 22 times [2018-01-25 02:50:22,398 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:22,399 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:22,399 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:22,399 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:22,399 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:22,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:22,416 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:23,140 INFO L134 CoverageAnalysis]: Checked inductivity of 1221 backedges. 0 proven. 1221 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:23,140 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:23,140 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:23,140 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:23,140 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:23,140 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:23,141 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:23,160 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:50:23,160 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:50:23,197 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:23,201 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:23,242 INFO L134 CoverageAnalysis]: Checked inductivity of 1221 backedges. 0 proven. 1221 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:23,242 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:23,815 INFO L134 CoverageAnalysis]: Checked inductivity of 1221 backedges. 0 proven. 1221 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:23,836 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:23,836 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:23,839 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:50:23,840 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:50:23,912 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:23,918 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:23,950 INFO L134 CoverageAnalysis]: Checked inductivity of 1221 backedges. 0 proven. 1221 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:23,951 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:23,977 INFO L134 CoverageAnalysis]: Checked inductivity of 1221 backedges. 0 proven. 1221 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:23,978 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:23,979 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-25 02:50:23,979 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:23,979 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-25 02:50:23,979 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-25 02:50:23,980 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=622, Invalid=1634, Unknown=0, NotChecked=0, Total=2256 [2018-01-25 02:50:23,980 INFO L87 Difference]: Start difference. First operand 340 states and 452 transitions. Second operand 25 states. [2018-01-25 02:50:26,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:26,200 INFO L93 Difference]: Finished difference Result 385 states and 504 transitions. [2018-01-25 02:50:26,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-25 02:50:26,201 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 118 [2018-01-25 02:50:26,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:26,202 INFO L225 Difference]: With dead ends: 385 [2018-01-25 02:50:26,202 INFO L226 Difference]: Without dead ends: 381 [2018-01-25 02:50:26,203 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 494 GetRequests, 446 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=622, Invalid=1634, Unknown=0, NotChecked=0, Total=2256 [2018-01-25 02:50:26,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 381 states. [2018-01-25 02:50:26,216 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 381 to 354. [2018-01-25 02:50:26,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 354 states. [2018-01-25 02:50:26,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 354 states to 354 states and 471 transitions. [2018-01-25 02:50:26,217 INFO L78 Accepts]: Start accepts. Automaton has 354 states and 471 transitions. Word has length 118 [2018-01-25 02:50:26,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:26,218 INFO L432 AbstractCegarLoop]: Abstraction has 354 states and 471 transitions. [2018-01-25 02:50:26,218 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-25 02:50:26,218 INFO L276 IsEmpty]: Start isEmpty. Operand 354 states and 471 transitions. [2018-01-25 02:50:26,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-01-25 02:50:26,220 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:26,220 INFO L322 BasicCegarLoop]: trace histogram [24, 24, 23, 23, 23, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:26,220 INFO L371 AbstractCegarLoop]: === Iteration 24 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:26,220 INFO L82 PathProgramCache]: Analyzing trace with hash 2117312527, now seen corresponding path program 23 times [2018-01-25 02:50:26,221 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:26,221 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:26,221 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:26,221 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:26,222 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:26,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:26,237 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:26,995 INFO L134 CoverageAnalysis]: Checked inductivity of 1334 backedges. 0 proven. 1334 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:26,995 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:26,995 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:26,996 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:26,996 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:26,996 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:26,996 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:27,001 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:50:27,001 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:27,005 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,007 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,008 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,009 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,011 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,012 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,014 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,015 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,017 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,018 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,020 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,022 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,025 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,027 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,029 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,032 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,034 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,036 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,039 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,041 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,044 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,047 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,051 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,055 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,056 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:27,058 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:27,088 INFO L134 CoverageAnalysis]: Checked inductivity of 1334 backedges. 0 proven. 1334 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:27,088 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:27,808 INFO L134 CoverageAnalysis]: Checked inductivity of 1334 backedges. 0 proven. 1334 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:27,828 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:27,829 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:27,832 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:50:27,832 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:27,838 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,841 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,846 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,853 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,860 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,869 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,879 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,890 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,902 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,916 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,930 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,946 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,962 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:27,980 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:28,009 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:28,031 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:28,054 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:28,077 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:28,101 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:28,136 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:28,163 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:28,192 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:28,231 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:28,262 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:28,304 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:28,312 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:28,350 INFO L134 CoverageAnalysis]: Checked inductivity of 1334 backedges. 0 proven. 1334 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:28,350 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:28,398 INFO L134 CoverageAnalysis]: Checked inductivity of 1334 backedges. 0 proven. 1334 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:28,400 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:28,400 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-25 02:50:28,400 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:28,400 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-25 02:50:28,401 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-25 02:50:28,401 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=673, Invalid=1777, Unknown=0, NotChecked=0, Total=2450 [2018-01-25 02:50:28,401 INFO L87 Difference]: Start difference. First operand 354 states and 471 transitions. Second operand 26 states. [2018-01-25 02:50:31,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:31,116 INFO L93 Difference]: Finished difference Result 400 states and 524 transitions. [2018-01-25 02:50:31,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-25 02:50:31,116 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 123 [2018-01-25 02:50:31,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:31,118 INFO L225 Difference]: With dead ends: 400 [2018-01-25 02:50:31,118 INFO L226 Difference]: Without dead ends: 396 [2018-01-25 02:50:31,119 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 515 GetRequests, 465 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=673, Invalid=1777, Unknown=0, NotChecked=0, Total=2450 [2018-01-25 02:50:31,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 396 states. [2018-01-25 02:50:31,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 396 to 368. [2018-01-25 02:50:31,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 368 states. [2018-01-25 02:50:31,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 368 states to 368 states and 490 transitions. [2018-01-25 02:50:31,135 INFO L78 Accepts]: Start accepts. Automaton has 368 states and 490 transitions. Word has length 123 [2018-01-25 02:50:31,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:31,136 INFO L432 AbstractCegarLoop]: Abstraction has 368 states and 490 transitions. [2018-01-25 02:50:31,136 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-25 02:50:31,136 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states and 490 transitions. [2018-01-25 02:50:31,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-01-25 02:50:31,138 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:31,138 INFO L322 BasicCegarLoop]: trace histogram [25, 25, 24, 24, 24, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:31,138 INFO L371 AbstractCegarLoop]: === Iteration 25 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:31,138 INFO L82 PathProgramCache]: Analyzing trace with hash -1912282627, now seen corresponding path program 24 times [2018-01-25 02:50:31,139 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:31,139 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:31,139 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:31,139 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:31,140 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:31,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:31,158 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:31,590 INFO L134 CoverageAnalysis]: Checked inductivity of 1452 backedges. 0 proven. 1452 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:31,590 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:31,590 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:31,590 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:31,590 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:31,591 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:31,591 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:31,597 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:50:31,597 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:50:31,601 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,602 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,603 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,605 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,606 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,607 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,608 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,610 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,611 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,613 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,615 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,616 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,618 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,620 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,622 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,625 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,627 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,629 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,632 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,635 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,637 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,640 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,643 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,646 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,649 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:31,650 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:31,652 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:31,677 INFO L134 CoverageAnalysis]: Checked inductivity of 1452 backedges. 0 proven. 1452 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:31,677 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:32,422 INFO L134 CoverageAnalysis]: Checked inductivity of 1452 backedges. 0 proven. 1452 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:32,443 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:32,443 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:32,446 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:50:32,446 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:50:32,453 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,456 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,464 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,472 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,479 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,488 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,498 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,508 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,521 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,534 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,550 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,566 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,585 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,604 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,625 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,659 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,683 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,708 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,732 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,768 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,796 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,824 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,865 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,906 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,965 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:32,990 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:32,996 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:33,025 INFO L134 CoverageAnalysis]: Checked inductivity of 1452 backedges. 0 proven. 1452 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:33,025 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:33,060 INFO L134 CoverageAnalysis]: Checked inductivity of 1452 backedges. 0 proven. 1452 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:33,061 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:33,061 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-25 02:50:33,061 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:33,062 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-25 02:50:33,062 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-25 02:50:33,062 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=726, Invalid=1926, Unknown=0, NotChecked=0, Total=2652 [2018-01-25 02:50:33,063 INFO L87 Difference]: Start difference. First operand 368 states and 490 transitions. Second operand 27 states. [2018-01-25 02:50:35,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:35,645 INFO L93 Difference]: Finished difference Result 415 states and 544 transitions. [2018-01-25 02:50:35,645 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-25 02:50:35,645 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 128 [2018-01-25 02:50:35,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:35,647 INFO L225 Difference]: With dead ends: 415 [2018-01-25 02:50:35,647 INFO L226 Difference]: Without dead ends: 411 [2018-01-25 02:50:35,648 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 536 GetRequests, 484 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=726, Invalid=1926, Unknown=0, NotChecked=0, Total=2652 [2018-01-25 02:50:35,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 411 states. [2018-01-25 02:50:35,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 411 to 382. [2018-01-25 02:50:35,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 382 states. [2018-01-25 02:50:35,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 382 states to 382 states and 509 transitions. [2018-01-25 02:50:35,664 INFO L78 Accepts]: Start accepts. Automaton has 382 states and 509 transitions. Word has length 128 [2018-01-25 02:50:35,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:35,664 INFO L432 AbstractCegarLoop]: Abstraction has 382 states and 509 transitions. [2018-01-25 02:50:35,664 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-25 02:50:35,664 INFO L276 IsEmpty]: Start isEmpty. Operand 382 states and 509 transitions. [2018-01-25 02:50:35,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2018-01-25 02:50:35,667 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:35,667 INFO L322 BasicCegarLoop]: trace histogram [26, 26, 25, 25, 25, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:35,668 INFO L371 AbstractCegarLoop]: === Iteration 26 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:35,668 INFO L82 PathProgramCache]: Analyzing trace with hash 972399823, now seen corresponding path program 25 times [2018-01-25 02:50:35,668 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:35,669 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:35,669 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:35,669 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:35,669 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:35,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:35,687 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:36,373 INFO L134 CoverageAnalysis]: Checked inductivity of 1575 backedges. 0 proven. 1575 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:36,373 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:36,373 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:36,373 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:36,373 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:36,374 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:36,374 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:36,378 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:36,379 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:36,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:36,396 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:36,422 INFO L134 CoverageAnalysis]: Checked inductivity of 1575 backedges. 0 proven. 1575 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:36,422 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:37,110 INFO L134 CoverageAnalysis]: Checked inductivity of 1575 backedges. 0 proven. 1575 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:37,130 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:37,131 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:37,134 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:37,134 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:37,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:37,188 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:37,214 INFO L134 CoverageAnalysis]: Checked inductivity of 1575 backedges. 0 proven. 1575 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:37,214 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:37,246 INFO L134 CoverageAnalysis]: Checked inductivity of 1575 backedges. 0 proven. 1575 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:37,248 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:37,248 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-25 02:50:37,248 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:37,248 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-25 02:50:37,248 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-25 02:50:37,249 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=781, Invalid=2081, Unknown=0, NotChecked=0, Total=2862 [2018-01-25 02:50:37,249 INFO L87 Difference]: Start difference. First operand 382 states and 509 transitions. Second operand 28 states. Received shutdown request... [2018-01-25 02:50:38,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-25 02:50:38,389 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-25 02:50:38,393 WARN L187 ceAbstractionStarter]: Timeout [2018-01-25 02:50:38,393 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 25.01 02:50:38 BoogieIcfgContainer [2018-01-25 02:50:38,394 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-25 02:50:38,394 INFO L168 Benchmark]: Toolchain (without parser) took 54295.91 ms. Allocated memory was 303.6 MB in the beginning and 734.5 MB in the end (delta: 431.0 MB). Free memory was 262.9 MB in the beginning and 603.5 MB in the end (delta: -340.6 MB). Peak memory consumption was 90.4 MB. Max. memory is 5.3 GB. [2018-01-25 02:50:38,395 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 303.6 MB. Free memory is still 267.9 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-25 02:50:38,395 INFO L168 Benchmark]: CACSL2BoogieTranslator took 197.97 ms. Allocated memory is still 303.6 MB. Free memory was 261.9 MB in the beginning and 253.8 MB in the end (delta: 8.1 MB). Peak memory consumption was 8.1 MB. Max. memory is 5.3 GB. [2018-01-25 02:50:38,395 INFO L168 Benchmark]: Boogie Preprocessor took 33.42 ms. Allocated memory is still 303.6 MB. Free memory was 253.8 MB in the beginning and 251.8 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-25 02:50:38,396 INFO L168 Benchmark]: RCFGBuilder took 243.27 ms. Allocated memory is still 303.6 MB. Free memory was 251.8 MB in the beginning and 239.3 MB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 5.3 GB. [2018-01-25 02:50:38,396 INFO L168 Benchmark]: TraceAbstraction took 53812.27 ms. Allocated memory was 303.6 MB in the beginning and 734.5 MB in the end (delta: 431.0 MB). Free memory was 238.3 MB in the beginning and 603.5 MB in the end (delta: -365.2 MB). Peak memory consumption was 65.8 MB. Max. memory is 5.3 GB. [2018-01-25 02:50:38,398 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 303.6 MB. Free memory is still 267.9 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 197.97 ms. Allocated memory is still 303.6 MB. Free memory was 261.9 MB in the beginning and 253.8 MB in the end (delta: 8.1 MB). Peak memory consumption was 8.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 33.42 ms. Allocated memory is still 303.6 MB. Free memory was 253.8 MB in the beginning and 251.8 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 243.27 ms. Allocated memory is still 303.6 MB. Free memory was 251.8 MB in the beginning and 239.3 MB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 53812.27 ms. Allocated memory was 303.6 MB in the beginning and 734.5 MB in the end (delta: 431.0 MB). Free memory was 238.3 MB in the beginning and 603.5 MB in the end (delta: -365.2 MB). Peak memory consumption was 65.8 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 10 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 0 LocStat_NO_SUPPORTING_DISEQUALITIES : 1 LocStat_NO_DISJUNCTIONS : -20 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 15 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 5 TransStat_NO_SUPPORTING_DISEQUALITIES : 1 TransStat_NO_DISJUNCTIONS : 16 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.213890 RENAME_VARIABLES(MILLISECONDS) : 0.392427 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.141351 PROJECTAWAY(MILLISECONDS) : 0.241971 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.000000 DISJOIN(MILLISECONDS) : 2.475638 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.457498 ADD_EQUALITY(MILLISECONDS) : 0.097214 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.118228 #CONJOIN_DISJUNCTIVE : 18 #RENAME_VARIABLES : 43 #UNFREEZE : 0 #CONJOIN : 29 #PROJECTAWAY : 36 #ADD_WEAK_EQUALITY : 0 #DISJOIN : 1 #RENAME_VARIABLES_DISJUNCTIVE : 41 #ADD_EQUALITY : 5 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 1 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 17]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 17). Cancelled while BasicCegarLoop was constructing difference of abstraction (382states) and interpolant automaton (currently 15 states, 28 states before enhancement), while ReachableStatesComputation was computing reachable states (202 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 24]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 24). Cancelled while BasicCegarLoop was constructing difference of abstraction (382states) and interpolant automaton (currently 15 states, 28 states before enhancement), while ReachableStatesComputation was computing reachable states (202 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 26]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 26). Cancelled while BasicCegarLoop was constructing difference of abstraction (382states) and interpolant automaton (currently 15 states, 28 states before enhancement), while ReachableStatesComputation was computing reachable states (202 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 19]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 19). Cancelled while BasicCegarLoop was constructing difference of abstraction (382states) and interpolant automaton (currently 15 states, 28 states before enhancement), while ReachableStatesComputation was computing reachable states (202 states constructedinput type IntersectNwa). - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 42 locations, 4 error locations. TIMEOUT Result, 53.7s OverallTime, 26 OverallIterations, 26 TraceHistogramMax, 29.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4257 SDtfs, 3089 SDslu, 50623 SDs, 0 SdLazy, 70271 SolverSat, 750 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 23.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 7627 GetRequests, 6876 SyntacticMatches, 50 SemanticMatches, 701 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 350 ImplicationChecksByTransitivity, 14.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=382occurred in iteration=25, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.1s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 25 MinimizatonAttempts, 425 StatesRemovedByMinimization, 25 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 3.9s SatisfiabilityAnalysisTime, 17.9s InterpolantComputationTime, 5483 NumberOfCodeBlocks, 5483 NumberOfCodeBlocksAsserted, 420 NumberOfCheckSat, 9007 ConstructedInterpolants, 0 QuantifiedInterpolants, 6055675 SizeOfPredicates, 0 NumberOfNonLiveVariables, 4850 ConjunctsInSsa, 1450 ConjunctsInUnsatCore, 126 InterpolantComputations, 1 PerfectInterpolantSequences, 0/69875 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/sanfoundry_24_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-25_02-50-38-409.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/sanfoundry_24_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-25_02-50-38-409.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/sanfoundry_24_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-25_02-50-38-409.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/sanfoundry_24_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-25_02-50-38-409.csv Completed graceful shutdown