java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf -i ../../../trunk/examples/svcomp/array-examples/standard_strcpy_false-valid-deref_ground.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-25 02:50:40,640 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-25 02:50:40,642 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-25 02:50:40,683 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-25 02:50:40,684 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-25 02:50:40,685 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-25 02:50:40,686 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-25 02:50:40,688 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-25 02:50:40,690 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-25 02:50:40,691 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-25 02:50:40,692 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-25 02:50:40,692 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-25 02:50:40,694 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-25 02:50:40,695 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-25 02:50:40,696 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-25 02:50:40,698 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-25 02:50:40,700 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-25 02:50:40,702 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-25 02:50:40,704 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-25 02:50:40,705 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-25 02:50:40,707 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-25 02:50:40,712 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-25 02:50:40,713 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-25 02:50:40,713 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf [2018-01-25 02:50:40,723 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-25 02:50:40,723 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-25 02:50:40,724 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-25 02:50:40,724 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-25 02:50:40,724 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-25 02:50:40,725 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-25 02:50:40,725 INFO L133 SettingsManager]: * Flatten before fatten=true [2018-01-25 02:50:40,725 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-25 02:50:40,725 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-25 02:50:40,726 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-25 02:50:40,726 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-25 02:50:40,726 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-25 02:50:40,726 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-25 02:50:40,726 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-25 02:50:40,727 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-25 02:50:40,727 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-25 02:50:40,727 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-25 02:50:40,727 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-25 02:50:40,727 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-25 02:50:40,727 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-25 02:50:40,728 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-25 02:50:40,728 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-25 02:50:40,728 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-25 02:50:40,728 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-25 02:50:40,728 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-25 02:50:40,729 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-25 02:50:40,729 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-25 02:50:40,729 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-25 02:50:40,729 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-25 02:50:40,729 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-25 02:50:40,730 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-25 02:50:40,730 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-25 02:50:40,730 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-25 02:50:40,730 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-25 02:50:40,730 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-25 02:50:40,731 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-25 02:50:40,731 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-25 02:50:40,767 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-25 02:50:40,780 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-25 02:50:40,784 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-25 02:50:40,786 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-25 02:50:40,787 INFO L276 PluginConnector]: CDTParser initialized [2018-01-25 02:50:40,787 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/standard_strcpy_false-valid-deref_ground.i [2018-01-25 02:50:40,923 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-25 02:50:40,930 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-25 02:50:40,931 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-25 02:50:40,931 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-25 02:50:40,937 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-25 02:50:40,938 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.01 02:50:40" (1/1) ... [2018-01-25 02:50:40,940 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@52238b0c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:40, skipping insertion in model container [2018-01-25 02:50:40,941 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.01 02:50:40" (1/1) ... [2018-01-25 02:50:40,955 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-25 02:50:40,970 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-25 02:50:41,092 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-25 02:50:41,103 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-25 02:50:41,107 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:41 WrapperNode [2018-01-25 02:50:41,108 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-25 02:50:41,108 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-25 02:50:41,108 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-25 02:50:41,108 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-25 02:50:41,119 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:41" (1/1) ... [2018-01-25 02:50:41,120 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:41" (1/1) ... [2018-01-25 02:50:41,126 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:41" (1/1) ... [2018-01-25 02:50:41,126 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:41" (1/1) ... [2018-01-25 02:50:41,127 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:41" (1/1) ... [2018-01-25 02:50:41,131 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:41" (1/1) ... [2018-01-25 02:50:41,132 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:41" (1/1) ... [2018-01-25 02:50:41,134 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-25 02:50:41,135 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-25 02:50:41,135 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-25 02:50:41,135 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-25 02:50:41,136 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:41" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-25 02:50:41,190 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-25 02:50:41,190 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-25 02:50:41,190 INFO L136 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-01-25 02:50:41,190 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-25 02:50:41,190 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-01-25 02:50:41,190 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-01-25 02:50:41,191 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-25 02:50:41,191 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-25 02:50:41,191 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-25 02:50:41,334 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-25 02:50:41,335 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.01 02:50:41 BoogieIcfgContainer [2018-01-25 02:50:41,335 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-25 02:50:41,336 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-25 02:50:41,336 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-25 02:50:41,339 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-25 02:50:41,339 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 25.01 02:50:40" (1/3) ... [2018-01-25 02:50:41,340 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6b2114e0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.01 02:50:41, skipping insertion in model container [2018-01-25 02:50:41,341 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:41" (2/3) ... [2018-01-25 02:50:41,341 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6b2114e0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.01 02:50:41, skipping insertion in model container [2018-01-25 02:50:41,341 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.01 02:50:41" (3/3) ... [2018-01-25 02:50:41,343 INFO L105 eAbstractionObserver]: Analyzing ICFG standard_strcpy_false-valid-deref_ground.i [2018-01-25 02:50:41,352 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-25 02:50:41,360 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 5 error locations. [2018-01-25 02:50:41,406 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-25 02:50:41,407 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-25 02:50:41,407 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-25 02:50:41,407 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-25 02:50:41,407 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-25 02:50:41,407 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-25 02:50:41,407 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-25 02:50:41,408 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-25 02:50:41,409 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-25 02:50:41,431 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states. [2018-01-25 02:50:41,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-01-25 02:50:41,438 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:41,439 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:41,440 INFO L371 AbstractCegarLoop]: === Iteration 1 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:41,447 INFO L82 PathProgramCache]: Analyzing trace with hash -42218404, now seen corresponding path program 1 times [2018-01-25 02:50:41,449 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:41,497 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:41,497 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:41,497 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:41,497 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:41,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:41,546 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:41,615 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:41,617 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 02:50:41,618 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-25 02:50:41,618 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 02:50:41,620 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-25 02:50:41,631 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-25 02:50:41,632 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-25 02:50:41,634 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 3 states. [2018-01-25 02:50:41,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:41,694 INFO L93 Difference]: Finished difference Result 71 states and 84 transitions. [2018-01-25 02:50:41,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-25 02:50:41,696 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-01-25 02:50:41,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:41,704 INFO L225 Difference]: With dead ends: 71 [2018-01-25 02:50:41,704 INFO L226 Difference]: Without dead ends: 40 [2018-01-25 02:50:41,708 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-25 02:50:41,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-25 02:50:41,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 31. [2018-01-25 02:50:41,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-25 02:50:41,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 33 transitions. [2018-01-25 02:50:41,813 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 33 transitions. Word has length 7 [2018-01-25 02:50:41,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:41,813 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 33 transitions. [2018-01-25 02:50:41,813 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-25 02:50:41,813 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 33 transitions. [2018-01-25 02:50:41,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-01-25 02:50:41,814 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:41,814 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:41,814 INFO L371 AbstractCegarLoop]: === Iteration 2 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:41,814 INFO L82 PathProgramCache]: Analyzing trace with hash -207595369, now seen corresponding path program 1 times [2018-01-25 02:50:41,814 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:41,815 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:41,815 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:41,815 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:41,816 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:41,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:41,825 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:41,872 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:41,872 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:41,872 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:41,873 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 13 with the following transitions: [2018-01-25 02:50:41,875 INFO L201 CegarAbsIntRunner]: [0], [4], [8], [10], [11], [16], [18], [20], [56], [57], [58] [2018-01-25 02:50:41,923 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-25 02:50:41,923 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-25 02:50:42,226 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-25 02:50:42,227 INFO L268 AbstractInterpreter]: Visited 11 different actions 23 times. Merged at 6 different actions 12 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 3 variables. [2018-01-25 02:50:42,247 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-25 02:50:42,247 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:42,247 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:42,254 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:42,254 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:42,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:42,270 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:42,279 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:42,279 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:42,320 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:42,348 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:42,348 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:42,352 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:42,352 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:42,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:42,363 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:42,375 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:42,375 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:42,382 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:42,383 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:42,383 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3, 3, 3] total 5 [2018-01-25 02:50:42,384 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:42,384 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-25 02:50:42,385 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-25 02:50:42,385 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-25 02:50:42,385 INFO L87 Difference]: Start difference. First operand 31 states and 33 transitions. Second operand 4 states. [2018-01-25 02:50:42,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:42,469 INFO L93 Difference]: Finished difference Result 57 states and 62 transitions. [2018-01-25 02:50:42,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-25 02:50:42,470 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 12 [2018-01-25 02:50:42,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:42,472 INFO L225 Difference]: With dead ends: 57 [2018-01-25 02:50:42,472 INFO L226 Difference]: Without dead ends: 54 [2018-01-25 02:50:42,473 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 43 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-25 02:50:42,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-25 02:50:42,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 36. [2018-01-25 02:50:42,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-25 02:50:42,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 39 transitions. [2018-01-25 02:50:42,479 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 39 transitions. Word has length 12 [2018-01-25 02:50:42,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:42,479 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 39 transitions. [2018-01-25 02:50:42,479 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-25 02:50:42,480 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 39 transitions. [2018-01-25 02:50:42,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-01-25 02:50:42,480 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:42,481 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:42,481 INFO L371 AbstractCegarLoop]: === Iteration 3 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:42,481 INFO L82 PathProgramCache]: Analyzing trace with hash -209255178, now seen corresponding path program 1 times [2018-01-25 02:50:42,481 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:42,482 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:42,483 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:42,483 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:42,483 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:42,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:42,489 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:42,536 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:42,536 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 02:50:42,536 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-25 02:50:42,536 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 02:50:42,536 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-25 02:50:42,536 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-25 02:50:42,537 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-01-25 02:50:42,537 INFO L87 Difference]: Start difference. First operand 36 states and 39 transitions. Second operand 4 states. [2018-01-25 02:50:42,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:42,559 INFO L93 Difference]: Finished difference Result 51 states and 54 transitions. [2018-01-25 02:50:42,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-25 02:50:42,559 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 12 [2018-01-25 02:50:42,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:42,561 INFO L225 Difference]: With dead ends: 51 [2018-01-25 02:50:42,561 INFO L226 Difference]: Without dead ends: 36 [2018-01-25 02:50:42,561 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-01-25 02:50:42,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-25 02:50:42,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-25 02:50:42,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-25 02:50:42,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 38 transitions. [2018-01-25 02:50:42,567 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 38 transitions. Word has length 12 [2018-01-25 02:50:42,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:42,568 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 38 transitions. [2018-01-25 02:50:42,568 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-25 02:50:42,568 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 38 transitions. [2018-01-25 02:50:42,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-25 02:50:42,569 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:42,569 INFO L322 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:42,569 INFO L371 AbstractCegarLoop]: === Iteration 4 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:42,570 INFO L82 PathProgramCache]: Analyzing trace with hash 2132883772, now seen corresponding path program 2 times [2018-01-25 02:50:42,570 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:42,571 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:42,571 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:42,572 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:42,572 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:42,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:42,580 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:42,646 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:42,647 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:42,647 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:42,647 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:42,647 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:42,647 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:42,648 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:42,655 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:50:42,655 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:42,660 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:42,663 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:42,663 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:42,665 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:42,672 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:42,672 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:42,759 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:42,780 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:42,780 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:42,785 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:50:42,785 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:42,790 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:42,792 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:42,796 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:42,799 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:42,826 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:42,826 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:42,841 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:42,842 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:42,842 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 7 [2018-01-25 02:50:42,843 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:42,843 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-25 02:50:42,843 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-25 02:50:42,843 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-25 02:50:42,843 INFO L87 Difference]: Start difference. First operand 36 states and 38 transitions. Second operand 5 states. [2018-01-25 02:50:42,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:42,906 INFO L93 Difference]: Finished difference Result 62 states and 67 transitions. [2018-01-25 02:50:42,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-25 02:50:42,906 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-25 02:50:42,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:42,907 INFO L225 Difference]: With dead ends: 62 [2018-01-25 02:50:42,907 INFO L226 Difference]: Without dead ends: 59 [2018-01-25 02:50:42,908 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 62 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-25 02:50:42,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-01-25 02:50:42,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 41. [2018-01-25 02:50:42,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-25 02:50:42,912 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 44 transitions. [2018-01-25 02:50:42,912 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 44 transitions. Word has length 17 [2018-01-25 02:50:42,912 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:42,912 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 44 transitions. [2018-01-25 02:50:42,913 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-25 02:50:42,913 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 44 transitions. [2018-01-25 02:50:42,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-25 02:50:42,913 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:42,913 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:42,913 INFO L371 AbstractCegarLoop]: === Iteration 5 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:42,914 INFO L82 PathProgramCache]: Analyzing trace with hash 2131223963, now seen corresponding path program 1 times [2018-01-25 02:50:42,914 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:42,914 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:42,915 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:42,915 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:42,915 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:42,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:42,919 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:42,973 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:42,973 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:42,973 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:42,974 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 18 with the following transitions: [2018-01-25 02:50:42,974 INFO L201 CegarAbsIntRunner]: [0], [4], [8], [11], [14], [16], [18], [20], [24], [28], [33], [34], [56], [57], [58] [2018-01-25 02:50:42,975 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-25 02:50:42,975 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-25 02:50:43,217 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-25 02:50:43,217 INFO L268 AbstractInterpreter]: Visited 15 different actions 35 times. Merged at 10 different actions 20 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 4 variables. [2018-01-25 02:50:43,233 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-25 02:50:43,233 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:43,233 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:43,239 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:43,239 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:43,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:43,246 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:43,248 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-25 02:50:43,248 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:43,283 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-25 02:50:43,304 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-25 02:50:43,305 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2, 2] imperfect sequences [5] total 6 [2018-01-25 02:50:43,305 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 02:50:43,305 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-25 02:50:43,305 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-25 02:50:43,305 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-25 02:50:43,305 INFO L87 Difference]: Start difference. First operand 41 states and 44 transitions. Second operand 3 states. [2018-01-25 02:50:43,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:43,331 INFO L93 Difference]: Finished difference Result 49 states and 53 transitions. [2018-01-25 02:50:43,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-25 02:50:43,332 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2018-01-25 02:50:43,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:43,333 INFO L225 Difference]: With dead ends: 49 [2018-01-25 02:50:43,333 INFO L226 Difference]: Without dead ends: 47 [2018-01-25 02:50:43,333 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-25 02:50:43,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-25 02:50:43,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 45. [2018-01-25 02:50:43,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-25 02:50:43,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 48 transitions. [2018-01-25 02:50:43,340 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 48 transitions. Word has length 17 [2018-01-25 02:50:43,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:43,340 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 48 transitions. [2018-01-25 02:50:43,340 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-25 02:50:43,340 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 48 transitions. [2018-01-25 02:50:43,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-25 02:50:43,341 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:43,341 INFO L322 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:43,341 INFO L371 AbstractCegarLoop]: === Iteration 6 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:43,342 INFO L82 PathProgramCache]: Analyzing trace with hash 2059138999, now seen corresponding path program 3 times [2018-01-25 02:50:43,342 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:43,343 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:43,343 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:43,343 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:43,343 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:43,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:43,350 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:43,590 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:43,591 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:43,591 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:43,591 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:43,591 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:43,591 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:43,591 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:43,612 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:50:43,612 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:50:43,619 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:43,633 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:43,651 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:43,666 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:43,674 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:43,676 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:43,692 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:43,693 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:43,851 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:43,873 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:43,873 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 8 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:43,878 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:50:43,878 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:50:43,883 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:43,886 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:43,892 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:43,899 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:43,904 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:43,908 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:43,919 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:43,919 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:43,930 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:43,933 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:43,933 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-25 02:50:43,933 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:43,933 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-25 02:50:43,934 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-25 02:50:43,934 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-25 02:50:43,934 INFO L87 Difference]: Start difference. First operand 45 states and 48 transitions. Second operand 6 states. [2018-01-25 02:50:44,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:44,024 INFO L93 Difference]: Finished difference Result 92 states and 99 transitions. [2018-01-25 02:50:44,024 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-25 02:50:44,025 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2018-01-25 02:50:44,025 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:44,025 INFO L225 Difference]: With dead ends: 92 [2018-01-25 02:50:44,026 INFO L226 Difference]: Without dead ends: 89 [2018-01-25 02:50:44,026 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-25 02:50:44,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-01-25 02:50:44,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 50. [2018-01-25 02:50:44,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-25 02:50:44,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2018-01-25 02:50:44,033 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 22 [2018-01-25 02:50:44,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:44,033 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2018-01-25 02:50:44,033 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-25 02:50:44,033 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2018-01-25 02:50:44,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-25 02:50:44,034 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:44,034 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:44,034 INFO L371 AbstractCegarLoop]: === Iteration 7 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:44,035 INFO L82 PathProgramCache]: Analyzing trace with hash -6617899, now seen corresponding path program 1 times [2018-01-25 02:50:44,035 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:44,036 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:44,036 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:44,036 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:44,036 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:44,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:44,048 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:44,088 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:44,089 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:44,089 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:44,089 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 28 with the following transitions: [2018-01-25 02:50:44,089 INFO L201 CegarAbsIntRunner]: [0], [4], [8], [11], [14], [16], [18], [20], [24], [28], [33], [34], [35], [37], [40], [46], [53], [55], [56], [57], [58], [60], [61] [2018-01-25 02:50:44,090 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-25 02:50:44,090 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-25 02:50:44,486 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-25 02:50:44,486 INFO L268 AbstractInterpreter]: Visited 23 different actions 81 times. Merged at 14 different actions 39 times. Never widened. Found 5 fixpoints after 3 different actions. Largest state had 5 variables. [2018-01-25 02:50:44,493 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-25 02:50:44,493 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:44,493 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:44,503 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:44,504 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:44,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:44,514 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:44,543 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:44,543 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:44,597 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:44,618 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:44,619 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 10 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:44,624 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:44,624 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:44,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:44,639 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:44,645 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:44,645 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:44,673 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:44,675 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:44,676 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 9 [2018-01-25 02:50:44,676 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:44,677 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-25 02:50:44,677 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-25 02:50:44,677 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-01-25 02:50:44,678 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 8 states. [2018-01-25 02:50:44,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:44,757 INFO L93 Difference]: Finished difference Result 71 states and 76 transitions. [2018-01-25 02:50:44,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-25 02:50:44,757 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 27 [2018-01-25 02:50:44,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:44,758 INFO L225 Difference]: With dead ends: 71 [2018-01-25 02:50:44,759 INFO L226 Difference]: Without dead ends: 50 [2018-01-25 02:50:44,759 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 101 SyntacticMatches, 4 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-01-25 02:50:44,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-25 02:50:44,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-25 02:50:44,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-25 02:50:44,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 53 transitions. [2018-01-25 02:50:44,766 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 53 transitions. Word has length 27 [2018-01-25 02:50:44,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:44,766 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 53 transitions. [2018-01-25 02:50:44,766 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-25 02:50:44,766 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 53 transitions. [2018-01-25 02:50:44,767 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-25 02:50:44,767 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:44,767 INFO L322 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:44,767 INFO L371 AbstractCegarLoop]: === Iteration 8 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:44,768 INFO L82 PathProgramCache]: Analyzing trace with hash -1173615076, now seen corresponding path program 4 times [2018-01-25 02:50:44,768 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:44,769 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:44,769 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:44,769 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:44,769 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:44,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:44,777 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:44,871 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:44,871 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:44,871 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:44,871 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:44,872 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:44,872 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:44,872 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:44,883 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:50:44,883 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:50:44,893 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:44,895 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:44,904 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:44,904 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:44,986 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:45,007 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:45,007 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:45,011 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:50:45,011 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:50:45,025 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:45,028 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:45,037 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:45,037 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:45,049 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:45,051 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:45,051 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-25 02:50:45,051 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:45,052 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-25 02:50:45,052 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-25 02:50:45,052 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-01-25 02:50:45,052 INFO L87 Difference]: Start difference. First operand 50 states and 53 transitions. Second operand 7 states. [2018-01-25 02:50:45,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:45,137 INFO L93 Difference]: Finished difference Result 97 states and 104 transitions. [2018-01-25 02:50:45,137 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-25 02:50:45,137 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-01-25 02:50:45,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:45,138 INFO L225 Difference]: With dead ends: 97 [2018-01-25 02:50:45,138 INFO L226 Difference]: Without dead ends: 94 [2018-01-25 02:50:45,139 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-01-25 02:50:45,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-01-25 02:50:45,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 55. [2018-01-25 02:50:45,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-25 02:50:45,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 59 transitions. [2018-01-25 02:50:45,146 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 59 transitions. Word has length 27 [2018-01-25 02:50:45,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:45,146 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 59 transitions. [2018-01-25 02:50:45,146 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-25 02:50:45,146 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 59 transitions. [2018-01-25 02:50:45,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-25 02:50:45,147 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:45,147 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:45,148 INFO L371 AbstractCegarLoop]: === Iteration 9 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:45,148 INFO L82 PathProgramCache]: Analyzing trace with hash 155329936, now seen corresponding path program 2 times [2018-01-25 02:50:45,148 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:45,149 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:45,149 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:45,149 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:45,149 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:45,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:45,157 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:45,293 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:45,294 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:45,294 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:45,294 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:45,294 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:45,294 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:45,294 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:45,305 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:50:45,306 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:45,310 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:45,314 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:45,315 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:45,317 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:45,335 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:45,336 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:45,438 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:45,472 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:45,472 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:45,476 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:50:45,477 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:45,482 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:45,489 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:45,496 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:45,500 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:45,508 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:45,508 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:45,534 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:45,536 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:45,537 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 14 [2018-01-25 02:50:45,537 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:45,537 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-25 02:50:45,538 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-25 02:50:45,538 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2018-01-25 02:50:45,538 INFO L87 Difference]: Start difference. First operand 55 states and 59 transitions. Second operand 9 states. [2018-01-25 02:50:45,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:45,665 INFO L93 Difference]: Finished difference Result 72 states and 78 transitions. [2018-01-25 02:50:45,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-25 02:50:45,683 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 32 [2018-01-25 02:50:45,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:45,684 INFO L225 Difference]: With dead ends: 72 [2018-01-25 02:50:45,684 INFO L226 Difference]: Without dead ends: 55 [2018-01-25 02:50:45,684 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 120 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-01-25 02:50:45,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-25 02:50:45,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-25 02:50:45,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-25 02:50:45,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 58 transitions. [2018-01-25 02:50:45,689 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 58 transitions. Word has length 32 [2018-01-25 02:50:45,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:45,689 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 58 transitions. [2018-01-25 02:50:45,690 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-25 02:50:45,690 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 58 transitions. [2018-01-25 02:50:45,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-25 02:50:45,691 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:45,691 INFO L322 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:45,691 INFO L371 AbstractCegarLoop]: === Iteration 10 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:45,691 INFO L82 PathProgramCache]: Analyzing trace with hash -1011667241, now seen corresponding path program 5 times [2018-01-25 02:50:45,691 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:45,692 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:45,692 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:45,692 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:45,692 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:45,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:45,699 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:45,772 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:45,773 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:45,773 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:45,773 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:45,773 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:45,773 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:45,773 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:45,778 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:50:45,778 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:45,781 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:45,782 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:45,783 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:45,784 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:45,785 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:45,786 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:45,787 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:45,788 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:45,800 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:45,800 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:45,858 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:45,879 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:45,879 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:45,882 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:50:45,882 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:45,885 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:45,887 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:45,891 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:45,896 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:45,901 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:45,909 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:45,913 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:45,916 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:45,924 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:45,924 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:45,936 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:45,939 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:45,939 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-25 02:50:45,939 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:45,939 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-25 02:50:45,940 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-25 02:50:45,940 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-01-25 02:50:45,940 INFO L87 Difference]: Start difference. First operand 55 states and 58 transitions. Second operand 8 states. [2018-01-25 02:50:46,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:46,136 INFO L93 Difference]: Finished difference Result 102 states and 109 transitions. [2018-01-25 02:50:46,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-25 02:50:46,136 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 32 [2018-01-25 02:50:46,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:46,137 INFO L225 Difference]: With dead ends: 102 [2018-01-25 02:50:46,137 INFO L226 Difference]: Without dead ends: 99 [2018-01-25 02:50:46,137 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 119 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-01-25 02:50:46,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-01-25 02:50:46,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 60. [2018-01-25 02:50:46,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-25 02:50:46,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 64 transitions. [2018-01-25 02:50:46,146 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 64 transitions. Word has length 32 [2018-01-25 02:50:46,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:46,146 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 64 transitions. [2018-01-25 02:50:46,146 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-25 02:50:46,146 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 64 transitions. [2018-01-25 02:50:46,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-25 02:50:46,148 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:46,148 INFO L322 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:46,148 INFO L371 AbstractCegarLoop]: === Iteration 11 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:46,148 INFO L82 PathProgramCache]: Analyzing trace with hash -903265867, now seen corresponding path program 3 times [2018-01-25 02:50:46,148 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:46,149 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:46,149 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:46,149 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:46,149 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:46,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:46,157 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:46,360 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:46,360 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:46,360 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:46,360 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:46,361 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:46,361 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:46,361 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:46,377 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:50:46,377 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:50:46,381 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:46,383 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:46,384 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:46,385 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:46,403 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-25 02:50:46,403 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:46,421 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-25 02:50:46,446 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:46,446 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:46,449 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:50:46,449 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:50:46,453 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:46,456 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:46,460 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:46,463 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:46,465 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-25 02:50:46,466 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:46,471 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-25 02:50:46,473 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:46,473 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 3, 3, 3, 3] total 12 [2018-01-25 02:50:46,473 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:46,474 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-25 02:50:46,474 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-25 02:50:46,474 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2018-01-25 02:50:46,474 INFO L87 Difference]: Start difference. First operand 60 states and 64 transitions. Second operand 11 states. [2018-01-25 02:50:46,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:46,555 INFO L93 Difference]: Finished difference Result 97 states and 113 transitions. [2018-01-25 02:50:46,557 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-25 02:50:46,557 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 37 [2018-01-25 02:50:46,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:46,558 INFO L225 Difference]: With dead ends: 97 [2018-01-25 02:50:46,558 INFO L226 Difference]: Without dead ends: 74 [2018-01-25 02:50:46,559 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 143 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2018-01-25 02:50:46,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-01-25 02:50:46,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 72. [2018-01-25 02:50:46,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-01-25 02:50:46,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 77 transitions. [2018-01-25 02:50:46,569 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 77 transitions. Word has length 37 [2018-01-25 02:50:46,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:46,569 INFO L432 AbstractCegarLoop]: Abstraction has 72 states and 77 transitions. [2018-01-25 02:50:46,569 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-25 02:50:46,570 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 77 transitions. [2018-01-25 02:50:46,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-25 02:50:46,572 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:46,572 INFO L322 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:46,572 INFO L371 AbstractCegarLoop]: === Iteration 12 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:46,572 INFO L82 PathProgramCache]: Analyzing trace with hash -2070263044, now seen corresponding path program 6 times [2018-01-25 02:50:46,572 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:46,573 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:46,573 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:46,573 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:46,574 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:46,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:46,580 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:46,666 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:46,667 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:46,667 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:46,667 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:46,667 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:46,667 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:46,667 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:46,672 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:50:46,672 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:50:46,675 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:46,676 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:46,677 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:46,678 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:46,679 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:46,679 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:46,680 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:46,681 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:46,682 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:46,691 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:46,691 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:46,764 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:46,785 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:46,785 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 20 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:46,788 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:50:46,788 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:50:46,791 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:46,793 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:46,798 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:46,803 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:46,809 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:46,816 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:46,826 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:46,830 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:46,833 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:46,840 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:46,840 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:46,851 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:46,853 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:46,853 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-25 02:50:46,853 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:46,853 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-25 02:50:46,854 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-25 02:50:46,854 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-01-25 02:50:46,854 INFO L87 Difference]: Start difference. First operand 72 states and 77 transitions. Second operand 9 states. [2018-01-25 02:50:46,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:46,947 INFO L93 Difference]: Finished difference Result 155 states and 170 transitions. [2018-01-25 02:50:46,947 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-25 02:50:46,947 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 37 [2018-01-25 02:50:46,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:46,948 INFO L225 Difference]: With dead ends: 155 [2018-01-25 02:50:46,949 INFO L226 Difference]: Without dead ends: 152 [2018-01-25 02:50:46,949 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-01-25 02:50:46,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-01-25 02:50:46,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 77. [2018-01-25 02:50:46,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-01-25 02:50:46,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 83 transitions. [2018-01-25 02:50:46,956 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 83 transitions. Word has length 37 [2018-01-25 02:50:46,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:46,957 INFO L432 AbstractCegarLoop]: Abstraction has 77 states and 83 transitions. [2018-01-25 02:50:46,957 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-25 02:50:46,957 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 83 transitions. [2018-01-25 02:50:46,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-25 02:50:46,958 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:46,958 INFO L322 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:46,958 INFO L371 AbstractCegarLoop]: === Iteration 13 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:46,958 INFO L82 PathProgramCache]: Analyzing trace with hash 1122500087, now seen corresponding path program 7 times [2018-01-25 02:50:46,958 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:46,959 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:46,959 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:46,959 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:46,959 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:46,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:46,965 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:47,055 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:47,055 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:47,055 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:47,055 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:47,056 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:47,056 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:47,056 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:47,062 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:47,062 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:47,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:47,073 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:47,098 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:47,099 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:47,288 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:47,309 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:47,309 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 22 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:47,313 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:47,313 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:47,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:47,331 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:47,340 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:47,340 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:47,385 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:47,387 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:47,387 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-25 02:50:47,387 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:47,387 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-25 02:50:47,388 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-25 02:50:47,388 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-01-25 02:50:47,388 INFO L87 Difference]: Start difference. First operand 77 states and 83 transitions. Second operand 10 states. [2018-01-25 02:50:47,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:47,694 INFO L93 Difference]: Finished difference Result 185 states and 204 transitions. [2018-01-25 02:50:47,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-25 02:50:47,695 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-01-25 02:50:47,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:47,697 INFO L225 Difference]: With dead ends: 185 [2018-01-25 02:50:47,697 INFO L226 Difference]: Without dead ends: 182 [2018-01-25 02:50:47,698 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-01-25 02:50:47,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-01-25 02:50:47,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 82. [2018-01-25 02:50:47,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states. [2018-01-25 02:50:47,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 89 transitions. [2018-01-25 02:50:47,721 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 89 transitions. Word has length 42 [2018-01-25 02:50:47,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:47,721 INFO L432 AbstractCegarLoop]: Abstraction has 82 states and 89 transitions. [2018-01-25 02:50:47,721 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-25 02:50:47,721 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 89 transitions. [2018-01-25 02:50:47,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-25 02:50:47,723 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:47,723 INFO L322 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:47,723 INFO L371 AbstractCegarLoop]: === Iteration 14 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:47,723 INFO L82 PathProgramCache]: Analyzing trace with hash -676728868, now seen corresponding path program 8 times [2018-01-25 02:50:47,723 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:47,726 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:47,727 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:47,727 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:47,727 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:47,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:47,738 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:48,084 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:48,085 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:48,085 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:48,085 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:48,085 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:48,085 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:48,085 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:48,090 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:50:48,091 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:48,095 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:48,100 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:48,101 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:48,102 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:48,110 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:48,111 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:48,272 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:48,305 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:48,305 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 24 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:48,309 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:50:48,309 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:48,313 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:48,321 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:48,326 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:48,329 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:48,338 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:48,338 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:48,346 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:48,348 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:48,349 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-25 02:50:48,349 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:48,349 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-25 02:50:48,349 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-25 02:50:48,349 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-01-25 02:50:48,350 INFO L87 Difference]: Start difference. First operand 82 states and 89 transitions. Second operand 11 states. [2018-01-25 02:50:48,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:48,549 INFO L93 Difference]: Finished difference Result 215 states and 238 transitions. [2018-01-25 02:50:48,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-25 02:50:48,552 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 47 [2018-01-25 02:50:48,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:48,554 INFO L225 Difference]: With dead ends: 215 [2018-01-25 02:50:48,554 INFO L226 Difference]: Without dead ends: 212 [2018-01-25 02:50:48,555 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 176 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-01-25 02:50:48,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2018-01-25 02:50:48,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 87. [2018-01-25 02:50:48,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-01-25 02:50:48,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 95 transitions. [2018-01-25 02:50:48,570 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 95 transitions. Word has length 47 [2018-01-25 02:50:48,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:48,571 INFO L432 AbstractCegarLoop]: Abstraction has 87 states and 95 transitions. [2018-01-25 02:50:48,571 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-25 02:50:48,571 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 95 transitions. [2018-01-25 02:50:48,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-25 02:50:48,572 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:48,572 INFO L322 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:48,576 INFO L371 AbstractCegarLoop]: === Iteration 15 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:48,576 INFO L82 PathProgramCache]: Analyzing trace with hash -633576169, now seen corresponding path program 9 times [2018-01-25 02:50:48,576 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:48,577 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:48,577 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:48,577 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:48,577 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:48,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:48,593 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:49,230 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:49,231 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:49,231 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:49,231 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:49,231 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:49,231 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:49,231 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:49,238 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:50:49,238 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:50:49,241 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,242 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,243 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,244 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,246 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,247 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,248 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,249 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,250 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,252 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,252 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:49,254 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:49,268 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:49,268 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:49,658 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:49,685 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:49,685 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 26 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:49,692 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:50:49,692 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:50:49,701 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,703 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,707 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,713 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,720 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,729 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,741 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,754 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,766 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,783 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:49,789 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:49,793 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:49,805 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:49,806 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:49,831 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:49,833 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:49,833 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-25 02:50:49,833 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:49,834 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-25 02:50:49,834 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-25 02:50:49,834 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-01-25 02:50:49,834 INFO L87 Difference]: Start difference. First operand 87 states and 95 transitions. Second operand 12 states. [2018-01-25 02:50:50,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:50,209 INFO L93 Difference]: Finished difference Result 245 states and 272 transitions. [2018-01-25 02:50:50,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-25 02:50:50,214 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 52 [2018-01-25 02:50:50,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:50,217 INFO L225 Difference]: With dead ends: 245 [2018-01-25 02:50:50,217 INFO L226 Difference]: Without dead ends: 242 [2018-01-25 02:50:50,218 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 217 GetRequests, 195 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-01-25 02:50:50,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-01-25 02:50:50,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 92. [2018-01-25 02:50:50,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-01-25 02:50:50,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 101 transitions. [2018-01-25 02:50:50,234 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 101 transitions. Word has length 52 [2018-01-25 02:50:50,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:50,234 INFO L432 AbstractCegarLoop]: Abstraction has 92 states and 101 transitions. [2018-01-25 02:50:50,234 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-25 02:50:50,234 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 101 transitions. [2018-01-25 02:50:50,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-01-25 02:50:50,235 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:50,235 INFO L322 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:50,235 INFO L371 AbstractCegarLoop]: === Iteration 16 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:50,235 INFO L82 PathProgramCache]: Analyzing trace with hash -1365705540, now seen corresponding path program 10 times [2018-01-25 02:50:50,236 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:50,236 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:50,236 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:50,237 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:50,237 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:50,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:50,257 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:50,408 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:50,408 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:50,408 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:50,408 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:50,408 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:50,408 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:50,408 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:50,413 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:50:50,414 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:50:50,425 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:50,427 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:50,452 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:50,452 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:50,656 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:50,677 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:50,716 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 28 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:50,720 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:50:50,720 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:50:50,767 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:50,771 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:50,781 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:50,782 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:50,802 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:50,804 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:50,804 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-25 02:50:50,804 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:50,804 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-25 02:50:50,804 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-25 02:50:50,805 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-01-25 02:50:50,805 INFO L87 Difference]: Start difference. First operand 92 states and 101 transitions. Second operand 13 states. [2018-01-25 02:50:51,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:51,065 INFO L93 Difference]: Finished difference Result 275 states and 306 transitions. [2018-01-25 02:50:51,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-25 02:50:51,066 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2018-01-25 02:50:51,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:51,068 INFO L225 Difference]: With dead ends: 275 [2018-01-25 02:50:51,068 INFO L226 Difference]: Without dead ends: 272 [2018-01-25 02:50:51,068 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 238 GetRequests, 214 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-01-25 02:50:51,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 272 states. [2018-01-25 02:50:51,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 272 to 97. [2018-01-25 02:50:51,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-01-25 02:50:51,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 107 transitions. [2018-01-25 02:50:51,083 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 107 transitions. Word has length 57 [2018-01-25 02:50:51,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:51,084 INFO L432 AbstractCegarLoop]: Abstraction has 97 states and 107 transitions. [2018-01-25 02:50:51,084 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-25 02:50:51,084 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 107 transitions. [2018-01-25 02:50:51,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-01-25 02:50:51,085 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:51,086 INFO L322 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:51,086 INFO L371 AbstractCegarLoop]: === Iteration 17 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:51,086 INFO L82 PathProgramCache]: Analyzing trace with hash -1933470172, now seen corresponding path program 4 times [2018-01-25 02:50:51,086 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:51,087 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:51,087 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:51,087 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:51,087 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:51,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:51,097 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:51,262 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 10 proven. 59 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-01-25 02:50:51,262 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:51,262 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:51,262 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:51,262 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:51,262 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:51,262 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:51,267 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:50:51,268 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:50:51,278 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:51,280 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:51,310 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 02:50:51,310 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:51,367 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 02:50:51,389 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:51,389 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 30 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:51,392 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:50:51,393 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:50:51,426 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:51,429 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:51,500 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 02:50:51,500 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:51,569 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 02:50:51,571 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:51,571 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 5, 5, 5, 5] total 18 [2018-01-25 02:50:51,571 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:51,571 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-25 02:50:51,572 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-25 02:50:51,572 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=269, Unknown=0, NotChecked=0, Total=342 [2018-01-25 02:50:51,572 INFO L87 Difference]: Start difference. First operand 97 states and 107 transitions. Second operand 15 states. [2018-01-25 02:50:51,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:51,821 INFO L93 Difference]: Finished difference Result 134 states and 152 transitions. [2018-01-25 02:50:51,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-25 02:50:51,821 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 62 [2018-01-25 02:50:51,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:51,822 INFO L225 Difference]: With dead ends: 134 [2018-01-25 02:50:51,822 INFO L226 Difference]: Without dead ends: 105 [2018-01-25 02:50:51,823 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 260 GetRequests, 238 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 112 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=103, Invalid=359, Unknown=0, NotChecked=0, Total=462 [2018-01-25 02:50:51,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-01-25 02:50:51,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 103. [2018-01-25 02:50:51,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-01-25 02:50:51,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 113 transitions. [2018-01-25 02:50:51,831 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 113 transitions. Word has length 62 [2018-01-25 02:50:51,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:51,831 INFO L432 AbstractCegarLoop]: Abstraction has 103 states and 113 transitions. [2018-01-25 02:50:51,831 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-25 02:50:51,831 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 113 transitions. [2018-01-25 02:50:51,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-01-25 02:50:51,831 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:51,832 INFO L322 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:51,832 INFO L371 AbstractCegarLoop]: === Iteration 18 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:51,832 INFO L82 PathProgramCache]: Analyzing trace with hash -116235209, now seen corresponding path program 11 times [2018-01-25 02:50:51,832 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:51,833 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:51,833 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:51,833 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:51,833 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:51,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:51,839 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:51,977 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:51,977 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:51,977 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:51,977 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:51,977 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:51,977 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:51,977 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:51,982 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:50:51,982 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:51,985 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:51,986 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:51,986 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:51,987 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:51,988 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:51,989 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:51,991 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:51,992 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:51,993 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:51,995 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:51,997 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:51,999 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:52,000 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:52,001 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:52,014 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:52,015 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:52,264 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:52,285 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:52,285 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 32 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:52,288 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:50:52,288 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:52,292 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:52,293 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:52,298 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:52,303 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:52,309 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:52,316 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:52,324 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:52,337 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:52,352 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:52,367 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:52,384 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:52,405 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:52,412 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:52,415 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:52,424 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:52,425 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:52,440 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:52,441 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:52,441 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-25 02:50:52,441 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:52,442 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-25 02:50:52,442 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-25 02:50:52,442 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-01-25 02:50:52,442 INFO L87 Difference]: Start difference. First operand 103 states and 113 transitions. Second operand 14 states. [2018-01-25 02:50:52,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:52,719 INFO L93 Difference]: Finished difference Result 328 states and 367 transitions. [2018-01-25 02:50:52,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-25 02:50:52,719 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 62 [2018-01-25 02:50:52,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:52,722 INFO L225 Difference]: With dead ends: 328 [2018-01-25 02:50:52,722 INFO L226 Difference]: Without dead ends: 325 [2018-01-25 02:50:52,723 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 259 GetRequests, 233 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-01-25 02:50:52,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2018-01-25 02:50:52,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 108. [2018-01-25 02:50:52,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-01-25 02:50:52,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 119 transitions. [2018-01-25 02:50:52,738 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 119 transitions. Word has length 62 [2018-01-25 02:50:52,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:52,738 INFO L432 AbstractCegarLoop]: Abstraction has 108 states and 119 transitions. [2018-01-25 02:50:52,739 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-25 02:50:52,739 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 119 transitions. [2018-01-25 02:50:52,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-01-25 02:50:52,740 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:52,740 INFO L322 BasicCegarLoop]: trace histogram [13, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:52,740 INFO L371 AbstractCegarLoop]: === Iteration 19 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:52,740 INFO L82 PathProgramCache]: Analyzing trace with hash -414879332, now seen corresponding path program 12 times [2018-01-25 02:50:52,740 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:52,741 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:52,741 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:52,741 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:52,741 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:52,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:52,749 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:52,935 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:52,936 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:52,936 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:52,936 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:52,936 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:52,936 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:52,936 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:52,941 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:50:52,941 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:50:52,944 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:52,945 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:52,946 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:52,947 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:52,948 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:52,949 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:52,950 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:52,951 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:52,952 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:52,953 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:52,955 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:52,957 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:52,958 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:52,959 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:52,960 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:52,971 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:52,971 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:53,169 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:53,190 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:53,190 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 34 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:53,193 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:50:53,194 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:50:53,197 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:53,199 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:53,203 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:53,207 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:53,212 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:53,218 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:53,227 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:53,238 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:53,252 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:53,278 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:53,295 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:53,319 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:53,348 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:53,355 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:53,359 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:53,371 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:53,372 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:53,395 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:53,397 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:53,397 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-25 02:50:53,397 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:53,397 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-25 02:50:53,398 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-25 02:50:53,398 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-01-25 02:50:53,398 INFO L87 Difference]: Start difference. First operand 108 states and 119 transitions. Second operand 15 states. [2018-01-25 02:50:53,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:53,686 INFO L93 Difference]: Finished difference Result 364 states and 408 transitions. [2018-01-25 02:50:53,686 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-25 02:50:53,686 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2018-01-25 02:50:53,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:53,688 INFO L225 Difference]: With dead ends: 364 [2018-01-25 02:50:53,688 INFO L226 Difference]: Without dead ends: 361 [2018-01-25 02:50:53,689 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 280 GetRequests, 252 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-01-25 02:50:53,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 361 states. [2018-01-25 02:50:53,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 361 to 113. [2018-01-25 02:50:53,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-01-25 02:50:53,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 125 transitions. [2018-01-25 02:50:53,701 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 125 transitions. Word has length 67 [2018-01-25 02:50:53,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:53,701 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 125 transitions. [2018-01-25 02:50:53,701 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-25 02:50:53,701 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 125 transitions. [2018-01-25 02:50:53,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-01-25 02:50:53,701 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:53,702 INFO L322 BasicCegarLoop]: trace histogram [14, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:53,702 INFO L371 AbstractCegarLoop]: === Iteration 20 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:53,702 INFO L82 PathProgramCache]: Analyzing trace with hash -1135871145, now seen corresponding path program 13 times [2018-01-25 02:50:53,702 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:53,703 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:53,703 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:53,703 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:53,703 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:53,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:53,709 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:53,932 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:53,932 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:53,932 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:53,932 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:53,932 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:53,933 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:53,933 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:53,940 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:53,940 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:53,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:53,953 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:53,970 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:53,970 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:54,327 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:54,348 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:54,349 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 36 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:54,352 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:54,352 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:54,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:54,379 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:54,454 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:54,454 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:54,468 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:54,469 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:54,469 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-25 02:50:54,469 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:54,469 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-25 02:50:54,469 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-25 02:50:54,470 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-01-25 02:50:54,470 INFO L87 Difference]: Start difference. First operand 113 states and 125 transitions. Second operand 16 states. [2018-01-25 02:50:54,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:54,894 INFO L93 Difference]: Finished difference Result 400 states and 449 transitions. [2018-01-25 02:50:54,895 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-25 02:50:54,895 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 72 [2018-01-25 02:50:54,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:54,897 INFO L225 Difference]: With dead ends: 400 [2018-01-25 02:50:54,897 INFO L226 Difference]: Without dead ends: 397 [2018-01-25 02:50:54,898 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 301 GetRequests, 271 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-01-25 02:50:54,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 397 states. [2018-01-25 02:50:54,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 397 to 118. [2018-01-25 02:50:54,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-01-25 02:50:54,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 131 transitions. [2018-01-25 02:50:54,916 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 131 transitions. Word has length 72 [2018-01-25 02:50:54,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:54,916 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 131 transitions. [2018-01-25 02:50:54,916 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-25 02:50:54,917 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 131 transitions. [2018-01-25 02:50:54,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-01-25 02:50:54,918 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:54,918 INFO L322 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:54,918 INFO L371 AbstractCegarLoop]: === Iteration 21 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:54,918 INFO L82 PathProgramCache]: Analyzing trace with hash 1226682691, now seen corresponding path program 5 times [2018-01-25 02:50:54,918 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:54,919 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:54,919 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:54,919 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:54,920 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:54,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:54,930 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:55,218 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 24 proven. 89 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-25 02:50:55,218 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:55,219 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:55,219 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:55,219 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:55,219 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:55,219 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:55,227 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:50:55,227 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:55,232 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,235 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,238 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,245 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,254 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,262 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,275 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:55,278 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:55,327 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 48 refuted. 0 times theorem prover too weak. 89 trivial. 0 not checked. [2018-01-25 02:50:55,328 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:55,498 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 48 refuted. 0 times theorem prover too weak. 89 trivial. 0 not checked. [2018-01-25 02:50:55,518 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:55,518 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 38 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:55,522 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:50:55,522 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:55,526 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,529 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,537 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,546 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,557 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,576 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,584 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:55,588 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:55,601 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 48 refuted. 0 times theorem prover too weak. 89 trivial. 0 not checked. [2018-01-25 02:50:55,601 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:55,613 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 48 refuted. 0 times theorem prover too weak. 89 trivial. 0 not checked. [2018-01-25 02:50:55,614 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:55,614 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 6, 6, 6, 6] total 22 [2018-01-25 02:50:55,614 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:55,615 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-25 02:50:55,615 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-25 02:50:55,615 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=100, Invalid=406, Unknown=0, NotChecked=0, Total=506 [2018-01-25 02:50:55,615 INFO L87 Difference]: Start difference. First operand 118 states and 131 transitions. Second operand 18 states. [2018-01-25 02:50:55,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:55,793 INFO L93 Difference]: Finished difference Result 161 states and 183 transitions. [2018-01-25 02:50:55,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-25 02:50:55,793 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 77 [2018-01-25 02:50:55,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:55,794 INFO L225 Difference]: With dead ends: 161 [2018-01-25 02:50:55,794 INFO L226 Difference]: Without dead ends: 126 [2018-01-25 02:50:55,795 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 323 GetRequests, 296 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 169 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=146, Invalid=556, Unknown=0, NotChecked=0, Total=702 [2018-01-25 02:50:55,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-01-25 02:50:55,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 124. [2018-01-25 02:50:55,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-01-25 02:50:55,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 137 transitions. [2018-01-25 02:50:55,805 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 137 transitions. Word has length 77 [2018-01-25 02:50:55,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:55,805 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 137 transitions. [2018-01-25 02:50:55,805 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-25 02:50:55,805 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 137 transitions. [2018-01-25 02:50:55,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-01-25 02:50:55,805 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:55,806 INFO L322 BasicCegarLoop]: trace histogram [15, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:55,806 INFO L371 AbstractCegarLoop]: === Iteration 22 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:55,806 INFO L82 PathProgramCache]: Analyzing trace with hash 571297404, now seen corresponding path program 14 times [2018-01-25 02:50:55,806 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:55,806 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:55,806 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:55,807 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:55,807 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:55,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:55,816 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:56,043 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:56,043 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:56,043 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:56,043 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:56,044 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:56,044 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:56,044 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:56,049 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:50:56,049 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:56,054 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:56,060 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:56,062 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:56,064 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:56,084 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:56,084 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:56,362 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:56,382 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:56,382 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 40 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:56,385 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:50:56,385 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:56,389 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:56,398 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:56,405 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:56,408 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:56,423 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:56,423 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:56,442 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:56,443 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:56,443 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-25 02:50:56,443 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:56,444 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-25 02:50:56,444 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-25 02:50:56,444 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=706, Unknown=0, NotChecked=0, Total=992 [2018-01-25 02:50:56,444 INFO L87 Difference]: Start difference. First operand 124 states and 137 transitions. Second operand 17 states. [2018-01-25 02:50:56,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:56,809 INFO L93 Difference]: Finished difference Result 465 states and 524 transitions. [2018-01-25 02:50:56,810 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-25 02:50:56,810 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 77 [2018-01-25 02:50:56,810 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:56,812 INFO L225 Difference]: With dead ends: 465 [2018-01-25 02:50:56,812 INFO L226 Difference]: Without dead ends: 462 [2018-01-25 02:50:56,813 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 322 GetRequests, 290 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=286, Invalid=706, Unknown=0, NotChecked=0, Total=992 [2018-01-25 02:50:56,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 462 states. [2018-01-25 02:50:56,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 462 to 129. [2018-01-25 02:50:56,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-01-25 02:50:56,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 143 transitions. [2018-01-25 02:50:56,833 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 143 transitions. Word has length 77 [2018-01-25 02:50:56,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:56,834 INFO L432 AbstractCegarLoop]: Abstraction has 129 states and 143 transitions. [2018-01-25 02:50:56,834 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-25 02:50:56,834 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 143 transitions. [2018-01-25 02:50:56,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-01-25 02:50:56,835 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:56,835 INFO L322 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:56,835 INFO L371 AbstractCegarLoop]: === Iteration 23 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:56,836 INFO L82 PathProgramCache]: Analyzing trace with hash 239807095, now seen corresponding path program 15 times [2018-01-25 02:50:56,836 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:56,836 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:56,837 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:56,837 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:56,837 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:56,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:56,845 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:57,010 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:57,011 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:57,011 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:57,011 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:57,011 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:57,011 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:57,011 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:57,018 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:50:57,018 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:50:57,022 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,023 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,024 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,025 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,026 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,027 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,028 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,029 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,031 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,032 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,034 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,036 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,038 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,040 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,042 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,045 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,046 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:57,047 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:57,061 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:57,062 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:57,340 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:57,360 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:57,361 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 42 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:57,364 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:50:57,364 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:50:57,368 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,369 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,373 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,378 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,388 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,399 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,411 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,425 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,443 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,464 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,483 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,505 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,529 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,557 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,597 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,643 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:57,652 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:57,656 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:57,675 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:57,675 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:57,696 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:57,698 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:57,698 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-25 02:50:57,698 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:57,698 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-25 02:50:57,698 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-25 02:50:57,699 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2018-01-25 02:50:57,699 INFO L87 Difference]: Start difference. First operand 129 states and 143 transitions. Second operand 18 states. [2018-01-25 02:50:58,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:58,259 INFO L93 Difference]: Finished difference Result 507 states and 572 transitions. [2018-01-25 02:50:58,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-25 02:50:58,262 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 82 [2018-01-25 02:50:58,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:58,265 INFO L225 Difference]: With dead ends: 507 [2018-01-25 02:50:58,265 INFO L226 Difference]: Without dead ends: 504 [2018-01-25 02:50:58,266 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 343 GetRequests, 309 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2018-01-25 02:50:58,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 504 states. [2018-01-25 02:50:58,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 504 to 134. [2018-01-25 02:50:58,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-25 02:50:58,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 149 transitions. [2018-01-25 02:50:58,289 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 149 transitions. Word has length 82 [2018-01-25 02:50:58,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:58,289 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 149 transitions. [2018-01-25 02:50:58,289 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-25 02:50:58,290 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 149 transitions. [2018-01-25 02:50:58,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-01-25 02:50:58,291 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:58,291 INFO L322 BasicCegarLoop]: trace histogram [17, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:58,291 INFO L371 AbstractCegarLoop]: === Iteration 24 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:58,291 INFO L82 PathProgramCache]: Analyzing trace with hash -1580297380, now seen corresponding path program 16 times [2018-01-25 02:50:58,291 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:58,292 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:58,292 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:58,292 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:58,292 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:58,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:58,300 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:58,815 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:58,816 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:58,816 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:58,816 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:58,816 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:58,816 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:58,817 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:58,827 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:50:58,827 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:50:58,852 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:58,855 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:58,888 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:58,888 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:59,420 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:59,450 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:59,451 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 44 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:59,454 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:50:59,454 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:50:59,523 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:59,528 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:59,542 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:59,542 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:59,558 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:59,560 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:59,560 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-25 02:50:59,560 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:59,560 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-25 02:50:59,561 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-25 02:50:59,561 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=358, Invalid=902, Unknown=0, NotChecked=0, Total=1260 [2018-01-25 02:50:59,561 INFO L87 Difference]: Start difference. First operand 134 states and 149 transitions. Second operand 19 states. [2018-01-25 02:51:00,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:00,501 INFO L93 Difference]: Finished difference Result 549 states and 620 transitions. [2018-01-25 02:51:00,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-25 02:51:00,502 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 87 [2018-01-25 02:51:00,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:00,503 INFO L225 Difference]: With dead ends: 549 [2018-01-25 02:51:00,503 INFO L226 Difference]: Without dead ends: 546 [2018-01-25 02:51:00,504 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 364 GetRequests, 328 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=358, Invalid=902, Unknown=0, NotChecked=0, Total=1260 [2018-01-25 02:51:00,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 546 states. [2018-01-25 02:51:00,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 546 to 139. [2018-01-25 02:51:00,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-01-25 02:51:00,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 155 transitions. [2018-01-25 02:51:00,529 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 155 transitions. Word has length 87 [2018-01-25 02:51:00,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:00,530 INFO L432 AbstractCegarLoop]: Abstraction has 139 states and 155 transitions. [2018-01-25 02:51:00,530 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-25 02:51:00,530 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 155 transitions. [2018-01-25 02:51:00,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-01-25 02:51:00,531 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:00,531 INFO L322 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:00,531 INFO L371 AbstractCegarLoop]: === Iteration 25 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:00,532 INFO L82 PathProgramCache]: Analyzing trace with hash 677887160, now seen corresponding path program 6 times [2018-01-25 02:51:00,532 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:00,532 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:00,533 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:00,533 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:00,533 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:00,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:00,542 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:00,714 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 44 proven. 124 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-01-25 02:51:00,714 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:00,714 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:00,714 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:00,714 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:00,715 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:00,715 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:00,719 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:51:00,720 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:51:00,724 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:00,725 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:00,727 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:00,729 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:00,731 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:00,733 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:00,736 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:00,736 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:00,738 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:00,782 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 0 proven. 75 refuted. 0 times theorem prover too weak. 133 trivial. 0 not checked. [2018-01-25 02:51:00,782 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:00,867 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 0 proven. 75 refuted. 0 times theorem prover too weak. 133 trivial. 0 not checked. [2018-01-25 02:51:00,887 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:00,887 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 46 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:00,890 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:51:00,890 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:51:00,895 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:00,897 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:00,903 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:00,911 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:00,922 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:00,938 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:00,959 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:00,969 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:00,973 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:00,985 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 0 proven. 75 refuted. 0 times theorem prover too weak. 133 trivial. 0 not checked. [2018-01-25 02:51:00,985 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:01,000 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 0 proven. 75 refuted. 0 times theorem prover too weak. 133 trivial. 0 not checked. [2018-01-25 02:51:01,002 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:01,002 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 7, 7, 7, 7] total 26 [2018-01-25 02:51:01,002 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:01,002 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-25 02:51:01,002 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-25 02:51:01,002 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=131, Invalid=571, Unknown=0, NotChecked=0, Total=702 [2018-01-25 02:51:01,003 INFO L87 Difference]: Start difference. First operand 139 states and 155 transitions. Second operand 21 states. [2018-01-25 02:51:01,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:01,183 INFO L93 Difference]: Finished difference Result 188 states and 214 transitions. [2018-01-25 02:51:01,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-25 02:51:01,183 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 92 [2018-01-25 02:51:01,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:01,184 INFO L225 Difference]: With dead ends: 188 [2018-01-25 02:51:01,184 INFO L226 Difference]: Without dead ends: 147 [2018-01-25 02:51:01,185 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 386 GetRequests, 354 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 238 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=196, Invalid=796, Unknown=0, NotChecked=0, Total=992 [2018-01-25 02:51:01,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-01-25 02:51:01,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 145. [2018-01-25 02:51:01,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-01-25 02:51:01,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 161 transitions. [2018-01-25 02:51:01,198 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 161 transitions. Word has length 92 [2018-01-25 02:51:01,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:01,198 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 161 transitions. [2018-01-25 02:51:01,198 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-25 02:51:01,198 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 161 transitions. [2018-01-25 02:51:01,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-01-25 02:51:01,199 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:01,199 INFO L322 BasicCegarLoop]: trace histogram [18, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:01,199 INFO L371 AbstractCegarLoop]: === Iteration 26 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:01,199 INFO L82 PathProgramCache]: Analyzing trace with hash -957222505, now seen corresponding path program 17 times [2018-01-25 02:51:01,200 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:01,200 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:01,200 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:01,200 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:01,200 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:01,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:01,207 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:01,470 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:01,470 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:01,470 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:01,470 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:01,470 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:01,470 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:01,470 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:01,477 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:51:01,477 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:51:01,480 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,483 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,484 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,485 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,487 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,488 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,490 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,492 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,494 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,496 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,499 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,502 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,506 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,510 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,515 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,520 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,526 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,533 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:01,534 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:01,537 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:01,561 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:01,561 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:01,976 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:01,996 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:01,996 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 48 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:01,999 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:51:01,999 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:51:02,004 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,006 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,010 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,015 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,022 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,029 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,042 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,058 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,074 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,093 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,110 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,131 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,156 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,193 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,236 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,273 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,317 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,367 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:02,378 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:02,383 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:02,410 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:02,410 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:02,432 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:02,433 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:02,434 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-25 02:51:02,434 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:02,434 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-25 02:51:02,434 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-25 02:51:02,435 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=397, Invalid=1009, Unknown=0, NotChecked=0, Total=1406 [2018-01-25 02:51:02,435 INFO L87 Difference]: Start difference. First operand 145 states and 161 transitions. Second operand 20 states. [2018-01-25 02:51:03,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:03,065 INFO L93 Difference]: Finished difference Result 626 states and 709 transitions. [2018-01-25 02:51:03,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-25 02:51:03,066 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 92 [2018-01-25 02:51:03,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:03,068 INFO L225 Difference]: With dead ends: 626 [2018-01-25 02:51:03,068 INFO L226 Difference]: Without dead ends: 623 [2018-01-25 02:51:03,069 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 385 GetRequests, 347 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=397, Invalid=1009, Unknown=0, NotChecked=0, Total=1406 [2018-01-25 02:51:03,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 623 states. [2018-01-25 02:51:03,088 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 623 to 150. [2018-01-25 02:51:03,088 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-01-25 02:51:03,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 167 transitions. [2018-01-25 02:51:03,089 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 167 transitions. Word has length 92 [2018-01-25 02:51:03,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:03,090 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 167 transitions. [2018-01-25 02:51:03,090 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-25 02:51:03,090 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 167 transitions. [2018-01-25 02:51:03,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-01-25 02:51:03,091 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:03,091 INFO L322 BasicCegarLoop]: trace histogram [19, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:03,091 INFO L371 AbstractCegarLoop]: === Iteration 27 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:03,091 INFO L82 PathProgramCache]: Analyzing trace with hash 736575548, now seen corresponding path program 18 times [2018-01-25 02:51:03,092 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:03,092 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:03,092 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:03,093 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:03,093 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:03,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:03,101 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:03,377 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:03,378 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:03,378 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:03,378 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:03,378 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:03,378 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:03,378 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:03,385 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:51:03,385 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:51:03,390 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,391 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,392 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,393 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,394 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,395 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,396 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,398 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,399 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,401 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,402 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,404 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,406 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,408 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,410 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,413 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,417 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,420 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,424 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:03,425 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:03,427 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:03,445 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:03,445 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:04,335 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:04,355 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:04,355 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 50 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:04,358 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:51:04,358 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:51:04,362 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,364 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,367 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,371 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,376 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,381 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,388 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,397 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,412 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,428 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,448 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,470 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,492 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,516 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,545 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,578 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,616 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,664 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,781 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:04,792 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:04,796 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:04,812 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:04,812 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:04,835 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:04,836 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:04,836 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-25 02:51:04,836 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:04,837 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-25 02:51:04,837 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-25 02:51:04,837 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=438, Invalid=1122, Unknown=0, NotChecked=0, Total=1560 [2018-01-25 02:51:04,837 INFO L87 Difference]: Start difference. First operand 150 states and 167 transitions. Second operand 21 states. [2018-01-25 02:51:05,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:05,455 INFO L93 Difference]: Finished difference Result 674 states and 764 transitions. [2018-01-25 02:51:05,455 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-25 02:51:05,455 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 97 [2018-01-25 02:51:05,455 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:05,458 INFO L225 Difference]: With dead ends: 674 [2018-01-25 02:51:05,458 INFO L226 Difference]: Without dead ends: 671 [2018-01-25 02:51:05,458 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 406 GetRequests, 366 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=438, Invalid=1122, Unknown=0, NotChecked=0, Total=1560 [2018-01-25 02:51:05,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 671 states. [2018-01-25 02:51:05,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 671 to 155. [2018-01-25 02:51:05,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-01-25 02:51:05,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 173 transitions. [2018-01-25 02:51:05,500 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 173 transitions. Word has length 97 [2018-01-25 02:51:05,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:05,500 INFO L432 AbstractCegarLoop]: Abstraction has 155 states and 173 transitions. [2018-01-25 02:51:05,500 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-25 02:51:05,500 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 173 transitions. [2018-01-25 02:51:05,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-01-25 02:51:05,501 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:05,501 INFO L322 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:05,501 INFO L371 AbstractCegarLoop]: === Iteration 28 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:05,502 INFO L82 PathProgramCache]: Analyzing trace with hash -891985897, now seen corresponding path program 7 times [2018-01-25 02:51:05,502 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:05,503 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:05,503 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:05,503 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:05,503 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:05,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:05,513 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:05,751 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 70 proven. 164 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-01-25 02:51:05,751 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:05,751 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:05,751 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:05,751 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:05,751 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:05,752 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:05,758 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:51:05,758 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:51:05,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:05,777 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:05,877 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 0 proven. 108 refuted. 0 times theorem prover too weak. 186 trivial. 0 not checked. [2018-01-25 02:51:05,878 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:06,091 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 0 proven. 108 refuted. 0 times theorem prover too weak. 186 trivial. 0 not checked. [2018-01-25 02:51:06,112 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:06,112 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 52 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:06,115 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:51:06,115 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:51:06,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:06,156 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:06,202 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 0 proven. 108 refuted. 0 times theorem prover too weak. 186 trivial. 0 not checked. [2018-01-25 02:51:06,202 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:06,266 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 0 proven. 108 refuted. 0 times theorem prover too weak. 186 trivial. 0 not checked. [2018-01-25 02:51:06,268 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:06,268 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 8, 8, 8, 8] total 30 [2018-01-25 02:51:06,268 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:06,268 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-25 02:51:06,268 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-25 02:51:06,269 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=764, Unknown=0, NotChecked=0, Total=930 [2018-01-25 02:51:06,269 INFO L87 Difference]: Start difference. First operand 155 states and 173 transitions. Second operand 24 states. [2018-01-25 02:51:06,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:06,541 INFO L93 Difference]: Finished difference Result 210 states and 239 transitions. [2018-01-25 02:51:06,541 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-25 02:51:06,541 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 107 [2018-01-25 02:51:06,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:06,542 INFO L225 Difference]: With dead ends: 210 [2018-01-25 02:51:06,542 INFO L226 Difference]: Without dead ends: 163 [2018-01-25 02:51:06,543 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 449 GetRequests, 412 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 319 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=253, Invalid=1079, Unknown=0, NotChecked=0, Total=1332 [2018-01-25 02:51:06,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-01-25 02:51:06,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 161. [2018-01-25 02:51:06,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-01-25 02:51:06,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 179 transitions. [2018-01-25 02:51:06,570 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 179 transitions. Word has length 107 [2018-01-25 02:51:06,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:06,571 INFO L432 AbstractCegarLoop]: Abstraction has 161 states and 179 transitions. [2018-01-25 02:51:06,571 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-25 02:51:06,571 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 179 transitions. [2018-01-25 02:51:06,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-01-25 02:51:06,572 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:06,572 INFO L322 BasicCegarLoop]: trace histogram [20, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:06,572 INFO L371 AbstractCegarLoop]: === Iteration 29 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:06,572 INFO L82 PathProgramCache]: Analyzing trace with hash -878554953, now seen corresponding path program 19 times [2018-01-25 02:51:06,572 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:06,572 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:06,573 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:51:06,573 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:06,573 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:06,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:06,579 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:06,948 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:06,949 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:06,949 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:06,949 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:06,949 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:06,949 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:06,949 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:06,954 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:51:06,954 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:51:06,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:06,968 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:06,988 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:06,988 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:07,434 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:07,454 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:07,454 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 54 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:07,458 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:51:07,458 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:51:07,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:07,493 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:07,545 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:07,545 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:07,576 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:07,577 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:07,578 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-25 02:51:07,578 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:07,578 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-25 02:51:07,578 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-25 02:51:07,579 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=481, Invalid=1241, Unknown=0, NotChecked=0, Total=1722 [2018-01-25 02:51:07,579 INFO L87 Difference]: Start difference. First operand 161 states and 179 transitions. Second operand 22 states. [2018-01-25 02:51:08,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:08,486 INFO L93 Difference]: Finished difference Result 757 states and 860 transitions. [2018-01-25 02:51:08,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-25 02:51:08,487 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 102 [2018-01-25 02:51:08,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:08,489 INFO L225 Difference]: With dead ends: 757 [2018-01-25 02:51:08,489 INFO L226 Difference]: Without dead ends: 754 [2018-01-25 02:51:08,490 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 427 GetRequests, 385 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=481, Invalid=1241, Unknown=0, NotChecked=0, Total=1722 [2018-01-25 02:51:08,491 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 754 states. [2018-01-25 02:51:08,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 754 to 166. [2018-01-25 02:51:08,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-01-25 02:51:08,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 185 transitions. [2018-01-25 02:51:08,528 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 185 transitions. Word has length 102 [2018-01-25 02:51:08,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:08,528 INFO L432 AbstractCegarLoop]: Abstraction has 166 states and 185 transitions. [2018-01-25 02:51:08,528 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-25 02:51:08,528 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 185 transitions. [2018-01-25 02:51:08,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-01-25 02:51:08,529 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:08,530 INFO L322 BasicCegarLoop]: trace histogram [21, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:08,530 INFO L371 AbstractCegarLoop]: === Iteration 30 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:08,530 INFO L82 PathProgramCache]: Analyzing trace with hash -399157988, now seen corresponding path program 20 times [2018-01-25 02:51:08,530 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:08,531 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:08,531 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:51:08,531 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:08,531 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:08,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:08,538 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:08,974 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:08,974 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:08,974 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:08,974 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:08,974 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:08,974 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:08,974 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:08,980 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:51:08,980 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:51:08,985 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:08,995 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:08,998 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:09,001 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:09,062 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:09,062 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:10,031 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:10,052 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:10,052 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 56 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:10,055 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:51:10,055 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:51:10,061 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:10,082 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:10,098 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:10,103 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:10,122 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:10,122 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:10,148 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:10,149 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:10,149 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-25 02:51:10,150 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:10,150 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-25 02:51:10,150 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-25 02:51:10,150 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=526, Invalid=1366, Unknown=0, NotChecked=0, Total=1892 [2018-01-25 02:51:10,151 INFO L87 Difference]: Start difference. First operand 166 states and 185 transitions. Second operand 23 states. [2018-01-25 02:51:10,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:10,988 INFO L93 Difference]: Finished difference Result 811 states and 922 transitions. [2018-01-25 02:51:10,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-25 02:51:10,989 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 107 [2018-01-25 02:51:10,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:10,993 INFO L225 Difference]: With dead ends: 811 [2018-01-25 02:51:10,993 INFO L226 Difference]: Without dead ends: 808 [2018-01-25 02:51:10,994 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 448 GetRequests, 404 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=526, Invalid=1366, Unknown=0, NotChecked=0, Total=1892 [2018-01-25 02:51:10,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 808 states. [2018-01-25 02:51:11,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 808 to 171. [2018-01-25 02:51:11,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-01-25 02:51:11,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 191 transitions. [2018-01-25 02:51:11,039 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 191 transitions. Word has length 107 [2018-01-25 02:51:11,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:11,040 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 191 transitions. [2018-01-25 02:51:11,040 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-25 02:51:11,040 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 191 transitions. [2018-01-25 02:51:11,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-01-25 02:51:11,041 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:11,041 INFO L322 BasicCegarLoop]: trace histogram [22, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:11,041 INFO L371 AbstractCegarLoop]: === Iteration 31 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:11,042 INFO L82 PathProgramCache]: Analyzing trace with hash 792610775, now seen corresponding path program 21 times [2018-01-25 02:51:11,042 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:11,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:11,043 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:11,043 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:11,043 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:11,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:11,052 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:12,274 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:12,274 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:12,274 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:12,274 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:12,274 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:12,274 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:12,274 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:12,281 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:51:12,281 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:51:12,287 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,297 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,309 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,323 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,332 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,346 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,355 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,369 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,377 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,381 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,386 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,390 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,395 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,399 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,402 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,407 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,411 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,425 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,430 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,437 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,444 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,450 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:12,454 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:12,457 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:12,507 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:12,508 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:13,476 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:13,497 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:13,497 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 58 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:13,501 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:51:13,501 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:51:13,506 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,508 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,514 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,520 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,529 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,540 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,552 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,567 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,585 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,610 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,637 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,657 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,681 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,710 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,750 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,797 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,843 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,898 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:13,962 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:14,051 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:14,162 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:14,260 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:14,273 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:14,279 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:14,298 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:14,298 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:14,321 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:14,323 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:14,323 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-25 02:51:14,323 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:14,323 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-25 02:51:14,324 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-25 02:51:14,324 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-01-25 02:51:14,324 INFO L87 Difference]: Start difference. First operand 171 states and 191 transitions. Second operand 24 states. [2018-01-25 02:51:15,498 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:15,498 INFO L93 Difference]: Finished difference Result 865 states and 984 transitions. [2018-01-25 02:51:15,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-25 02:51:15,499 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 112 [2018-01-25 02:51:15,499 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:15,503 INFO L225 Difference]: With dead ends: 865 [2018-01-25 02:51:15,503 INFO L226 Difference]: Without dead ends: 862 [2018-01-25 02:51:15,504 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 469 GetRequests, 423 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-01-25 02:51:15,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 862 states. [2018-01-25 02:51:15,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 862 to 176. [2018-01-25 02:51:15,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-25 02:51:15,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 197 transitions. [2018-01-25 02:51:15,555 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 197 transitions. Word has length 112 [2018-01-25 02:51:15,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:15,555 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 197 transitions. [2018-01-25 02:51:15,555 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-25 02:51:15,555 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 197 transitions. [2018-01-25 02:51:15,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-01-25 02:51:15,556 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:15,557 INFO L322 BasicCegarLoop]: trace histogram [9, 9, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:15,557 INFO L371 AbstractCegarLoop]: === Iteration 32 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:15,557 INFO L82 PathProgramCache]: Analyzing trace with hash -600860340, now seen corresponding path program 8 times [2018-01-25 02:51:15,557 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:15,558 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:15,558 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:15,558 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:15,558 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:15,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:15,568 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:15,836 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 102 proven. 209 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-01-25 02:51:15,837 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:15,837 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:15,837 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:15,837 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:15,837 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:15,837 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:15,844 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:51:15,844 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:51:15,849 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:15,860 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:15,862 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:15,864 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:15,950 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 0 proven. 147 refuted. 0 times theorem prover too weak. 248 trivial. 0 not checked. [2018-01-25 02:51:15,950 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:16,165 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 0 proven. 147 refuted. 0 times theorem prover too weak. 248 trivial. 0 not checked. [2018-01-25 02:51:16,185 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:16,185 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 60 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:16,188 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:51:16,188 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:51:16,193 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:16,210 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:16,223 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:16,226 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:16,264 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 140 proven. 171 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-01-25 02:51:16,264 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:16,762 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 126 proven. 185 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-01-25 02:51:16,763 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:16,763 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 9, 9, 19, 19] total 52 [2018-01-25 02:51:16,763 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:16,763 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-25 02:51:16,764 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-25 02:51:16,764 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=550, Invalid=2206, Unknown=0, NotChecked=0, Total=2756 [2018-01-25 02:51:16,764 INFO L87 Difference]: Start difference. First operand 176 states and 197 transitions. Second operand 27 states. [2018-01-25 02:51:17,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:17,108 INFO L93 Difference]: Finished difference Result 237 states and 270 transitions. [2018-01-25 02:51:17,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-25 02:51:17,108 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 122 [2018-01-25 02:51:17,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:17,109 INFO L225 Difference]: With dead ends: 237 [2018-01-25 02:51:17,109 INFO L226 Difference]: Without dead ends: 184 [2018-01-25 02:51:17,110 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 512 GetRequests, 453 SyntacticMatches, 1 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 951 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=788, Invalid=2752, Unknown=0, NotChecked=0, Total=3540 [2018-01-25 02:51:17,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-25 02:51:17,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 182. [2018-01-25 02:51:17,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-25 02:51:17,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 203 transitions. [2018-01-25 02:51:17,135 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 203 transitions. Word has length 122 [2018-01-25 02:51:17,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:17,135 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 203 transitions. [2018-01-25 02:51:17,135 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-25 02:51:17,135 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 203 transitions. [2018-01-25 02:51:17,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-01-25 02:51:17,136 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:17,136 INFO L322 BasicCegarLoop]: trace histogram [23, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:17,136 INFO L371 AbstractCegarLoop]: === Iteration 33 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:17,136 INFO L82 PathProgramCache]: Analyzing trace with hash 1092014588, now seen corresponding path program 22 times [2018-01-25 02:51:17,136 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:17,137 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:17,137 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:17,137 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:17,137 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:17,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:17,143 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:17,467 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:17,468 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:17,468 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:17,468 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:17,468 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:17,468 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:17,468 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:17,473 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:51:17,473 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:51:17,497 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:17,500 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:17,526 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:17,526 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:18,207 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:18,228 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:18,228 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 62 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:18,232 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:51:18,232 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:51:18,401 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:18,406 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:18,444 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:18,445 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:18,489 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:18,491 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:18,491 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-25 02:51:18,491 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:18,491 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-25 02:51:18,491 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-25 02:51:18,492 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=622, Invalid=1634, Unknown=0, NotChecked=0, Total=2256 [2018-01-25 02:51:18,492 INFO L87 Difference]: Start difference. First operand 182 states and 203 transitions. Second operand 25 states. [2018-01-25 02:51:19,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:19,806 INFO L93 Difference]: Finished difference Result 960 states and 1094 transitions. [2018-01-25 02:51:19,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-25 02:51:19,807 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 117 [2018-01-25 02:51:19,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:19,809 INFO L225 Difference]: With dead ends: 960 [2018-01-25 02:51:19,810 INFO L226 Difference]: Without dead ends: 957 [2018-01-25 02:51:19,810 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 490 GetRequests, 442 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=622, Invalid=1634, Unknown=0, NotChecked=0, Total=2256 [2018-01-25 02:51:19,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 957 states. [2018-01-25 02:51:19,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 957 to 187. [2018-01-25 02:51:19,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-01-25 02:51:19,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 209 transitions. [2018-01-25 02:51:19,863 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 209 transitions. Word has length 117 [2018-01-25 02:51:19,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:19,863 INFO L432 AbstractCegarLoop]: Abstraction has 187 states and 209 transitions. [2018-01-25 02:51:19,863 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-25 02:51:19,863 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 209 transitions. [2018-01-25 02:51:19,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-01-25 02:51:19,864 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:19,864 INFO L322 BasicCegarLoop]: trace histogram [24, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:19,864 INFO L371 AbstractCegarLoop]: === Iteration 34 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:19,864 INFO L82 PathProgramCache]: Analyzing trace with hash 1378342647, now seen corresponding path program 23 times [2018-01-25 02:51:19,864 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:19,864 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:19,865 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:19,865 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:19,865 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:19,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:19,871 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:20,320 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:20,321 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:20,321 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:20,321 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:20,321 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:20,321 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:20,321 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:20,326 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:51:20,326 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:51:20,330 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,331 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,332 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,334 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,336 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,343 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,344 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,351 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,353 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,370 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,377 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,384 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,388 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,392 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,396 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,402 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,408 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,415 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,422 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,430 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,439 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,445 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,453 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,461 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:20,462 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:20,464 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:20,486 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:20,486 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:21,086 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:21,106 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:21,107 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 64 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:21,110 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:51:21,110 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:51:21,114 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,116 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,120 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,125 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,132 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,140 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,148 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,159 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,171 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,189 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,211 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,231 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,255 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,283 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,325 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,375 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,418 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,466 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,521 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,607 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,715 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,795 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,882 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,979 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,003 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:22,008 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:22,036 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:22,036 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:22,066 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:22,068 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:22,068 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-25 02:51:22,068 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:22,068 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-25 02:51:22,068 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-25 02:51:22,069 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=673, Invalid=1777, Unknown=0, NotChecked=0, Total=2450 [2018-01-25 02:51:22,069 INFO L87 Difference]: Start difference. First operand 187 states and 209 transitions. Second operand 26 states. [2018-01-25 02:51:23,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:23,198 INFO L93 Difference]: Finished difference Result 1020 states and 1163 transitions. [2018-01-25 02:51:23,199 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-25 02:51:23,199 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 122 [2018-01-25 02:51:23,199 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:23,202 INFO L225 Difference]: With dead ends: 1020 [2018-01-25 02:51:23,203 INFO L226 Difference]: Without dead ends: 1017 [2018-01-25 02:51:23,203 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 511 GetRequests, 461 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=673, Invalid=1777, Unknown=0, NotChecked=0, Total=2450 [2018-01-25 02:51:23,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1017 states. [2018-01-25 02:51:23,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1017 to 192. [2018-01-25 02:51:23,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-01-25 02:51:23,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 215 transitions. [2018-01-25 02:51:23,255 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 215 transitions. Word has length 122 [2018-01-25 02:51:23,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:23,255 INFO L432 AbstractCegarLoop]: Abstraction has 192 states and 215 transitions. [2018-01-25 02:51:23,255 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-25 02:51:23,255 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 215 transitions. [2018-01-25 02:51:23,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-01-25 02:51:23,256 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:23,256 INFO L322 BasicCegarLoop]: trace histogram [25, 24, 24, 24, 24, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:23,256 INFO L371 AbstractCegarLoop]: === Iteration 35 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:23,256 INFO L82 PathProgramCache]: Analyzing trace with hash -1016482084, now seen corresponding path program 24 times [2018-01-25 02:51:23,256 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:23,257 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:23,257 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:23,257 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:23,257 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:23,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:23,266 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:23,690 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:23,690 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:23,690 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:23,691 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:23,691 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:23,691 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:23,691 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:23,696 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:51:23,696 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:51:23,699 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,700 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,701 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,701 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,702 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,703 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,704 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,705 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,706 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,707 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,708 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,710 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,711 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,713 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,715 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,716 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,719 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,721 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,723 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,725 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,728 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,731 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,735 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,738 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,742 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:23,743 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:23,745 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:23,768 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:23,768 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:24,412 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:24,432 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:24,433 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 66 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:24,435 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:51:24,436 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:51:24,441 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,442 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,448 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,452 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,457 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,463 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,470 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,479 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,491 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,504 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,525 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,547 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,572 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,602 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,631 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,664 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,703 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,755 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,840 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:24,906 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,002 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,216 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,451 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,737 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,973 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,999 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:26,011 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:26,037 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:26,037 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:26,065 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:26,067 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:26,067 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-25 02:51:26,067 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:26,068 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-25 02:51:26,068 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-25 02:51:26,069 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=726, Invalid=1926, Unknown=0, NotChecked=0, Total=2652 [2018-01-25 02:51:26,069 INFO L87 Difference]: Start difference. First operand 192 states and 215 transitions. Second operand 27 states. [2018-01-25 02:51:27,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:27,738 INFO L93 Difference]: Finished difference Result 1080 states and 1232 transitions. [2018-01-25 02:51:27,741 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-25 02:51:27,741 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 127 [2018-01-25 02:51:27,742 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:27,746 INFO L225 Difference]: With dead ends: 1080 [2018-01-25 02:51:27,746 INFO L226 Difference]: Without dead ends: 1077 [2018-01-25 02:51:27,748 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 532 GetRequests, 480 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=726, Invalid=1926, Unknown=0, NotChecked=0, Total=2652 [2018-01-25 02:51:27,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1077 states. [2018-01-25 02:51:27,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1077 to 197. [2018-01-25 02:51:27,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-01-25 02:51:27,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 221 transitions. [2018-01-25 02:51:27,811 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 221 transitions. Word has length 127 [2018-01-25 02:51:27,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:27,811 INFO L432 AbstractCegarLoop]: Abstraction has 197 states and 221 transitions. [2018-01-25 02:51:27,811 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-25 02:51:27,811 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 221 transitions. [2018-01-25 02:51:27,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-01-25 02:51:27,812 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:27,812 INFO L322 BasicCegarLoop]: trace histogram [10, 10, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:27,812 INFO L371 AbstractCegarLoop]: === Iteration 36 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:27,812 INFO L82 PathProgramCache]: Analyzing trace with hash 795448555, now seen corresponding path program 9 times [2018-01-25 02:51:27,812 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:27,813 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:27,813 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:27,813 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:27,813 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:27,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:27,821 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:28,535 INFO L134 CoverageAnalysis]: Checked inductivity of 511 backedges. 140 proven. 259 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-01-25 02:51:28,535 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:28,535 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:28,536 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:28,536 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:28,536 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:28,536 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:28,545 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:51:28,545 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:51:28,551 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:28,553 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:28,568 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:28,583 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:28,602 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:28,610 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:28,617 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:28,625 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:28,632 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:28,638 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:28,641 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:28,818 INFO L134 CoverageAnalysis]: Checked inductivity of 511 backedges. 0 proven. 192 refuted. 0 times theorem prover too weak. 319 trivial. 0 not checked. [2018-01-25 02:51:28,818 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:29,023 INFO L134 CoverageAnalysis]: Checked inductivity of 511 backedges. 0 proven. 192 refuted. 0 times theorem prover too weak. 319 trivial. 0 not checked. [2018-01-25 02:51:29,044 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:29,044 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 68 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:29,052 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:51:29,052 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:51:29,058 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:29,062 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:29,069 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:29,079 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:29,092 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:29,111 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:29,133 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:29,175 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:29,227 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:29,242 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:29,247 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:29,307 INFO L134 CoverageAnalysis]: Checked inductivity of 511 backedges. 0 proven. 192 refuted. 0 times theorem prover too weak. 319 trivial. 0 not checked. [2018-01-25 02:51:29,307 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:29,383 INFO L134 CoverageAnalysis]: Checked inductivity of 511 backedges. 0 proven. 192 refuted. 0 times theorem prover too weak. 319 trivial. 0 not checked. [2018-01-25 02:51:29,384 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:29,384 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 10, 10, 10, 10] total 38 [2018-01-25 02:51:29,384 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:29,385 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-25 02:51:29,385 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-25 02:51:29,385 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=248, Invalid=1234, Unknown=0, NotChecked=0, Total=1482 [2018-01-25 02:51:29,385 INFO L87 Difference]: Start difference. First operand 197 states and 221 transitions. Second operand 30 states. [2018-01-25 02:51:29,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:29,874 INFO L93 Difference]: Finished difference Result 264 states and 301 transitions. [2018-01-25 02:51:29,874 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-25 02:51:29,874 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 137 [2018-01-25 02:51:29,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:29,875 INFO L225 Difference]: With dead ends: 264 [2018-01-25 02:51:29,875 INFO L226 Difference]: Without dead ends: 205 [2018-01-25 02:51:29,876 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 575 GetRequests, 528 SyntacticMatches, 2 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 517 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=388, Invalid=1774, Unknown=0, NotChecked=0, Total=2162 [2018-01-25 02:51:29,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-01-25 02:51:29,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 203. [2018-01-25 02:51:29,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-01-25 02:51:29,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 227 transitions. [2018-01-25 02:51:29,909 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 227 transitions. Word has length 137 [2018-01-25 02:51:29,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:29,910 INFO L432 AbstractCegarLoop]: Abstraction has 203 states and 227 transitions. [2018-01-25 02:51:29,910 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-25 02:51:29,910 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 227 transitions. [2018-01-25 02:51:29,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-01-25 02:51:29,911 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:29,911 INFO L322 BasicCegarLoop]: trace histogram [26, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:29,911 INFO L371 AbstractCegarLoop]: === Iteration 37 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:29,911 INFO L82 PathProgramCache]: Analyzing trace with hash 37813783, now seen corresponding path program 25 times [2018-01-25 02:51:29,912 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:29,912 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:29,912 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:29,912 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:29,913 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:29,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:29,922 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:30,404 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:30,405 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:30,405 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:30,405 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:30,405 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:30,405 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:30,405 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:30,410 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:51:30,410 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:51:30,430 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:30,432 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:30,480 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:30,480 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-25 02:51:30,722 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-25 02:51:30,722 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-25 02:51:30,725 WARN L187 ceAbstractionStarter]: Timeout [2018-01-25 02:51:30,726 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 25.01 02:51:30 BoogieIcfgContainer [2018-01-25 02:51:30,726 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-25 02:51:30,726 INFO L168 Benchmark]: Toolchain (without parser) took 49803.00 ms. Allocated memory was 309.9 MB in the beginning and 752.4 MB in the end (delta: 442.5 MB). Free memory was 269.2 MB in the beginning and 612.2 MB in the end (delta: -343.0 MB). Peak memory consumption was 99.5 MB. Max. memory is 5.3 GB. [2018-01-25 02:51:30,727 INFO L168 Benchmark]: CDTParser took 0.23 ms. Allocated memory is still 309.9 MB. Free memory is still 273.1 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-25 02:51:30,727 INFO L168 Benchmark]: CACSL2BoogieTranslator took 177.16 ms. Allocated memory is still 309.9 MB. Free memory was 267.2 MB in the beginning and 259.2 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. [2018-01-25 02:51:30,728 INFO L168 Benchmark]: Boogie Preprocessor took 26.14 ms. Allocated memory is still 309.9 MB. Free memory is still 259.2 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-25 02:51:30,728 INFO L168 Benchmark]: RCFGBuilder took 200.39 ms. Allocated memory is still 309.9 MB. Free memory was 259.2 MB in the beginning and 246.6 MB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 5.3 GB. [2018-01-25 02:51:30,728 INFO L168 Benchmark]: TraceAbstraction took 49389.82 ms. Allocated memory was 309.9 MB in the beginning and 752.4 MB in the end (delta: 442.5 MB). Free memory was 246.6 MB in the beginning and 612.2 MB in the end (delta: -365.6 MB). Peak memory consumption was 76.9 MB. Max. memory is 5.3 GB. [2018-01-25 02:51:30,729 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23 ms. Allocated memory is still 309.9 MB. Free memory is still 273.1 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 177.16 ms. Allocated memory is still 309.9 MB. Free memory was 267.2 MB in the beginning and 259.2 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 26.14 ms. Allocated memory is still 309.9 MB. Free memory is still 259.2 MB. There was no memory consumed. Max. memory is 5.3 GB. * RCFGBuilder took 200.39 ms. Allocated memory is still 309.9 MB. Free memory was 259.2 MB in the beginning and 246.6 MB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 49389.82 ms. Allocated memory was 309.9 MB in the beginning and 752.4 MB in the end (delta: 442.5 MB). Free memory was 246.6 MB in the beginning and 612.2 MB in the end (delta: -365.6 MB). Peak memory consumption was 76.9 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 10 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 0 LocStat_NO_SUPPORTING_DISEQUALITIES : 4 LocStat_NO_DISJUNCTIONS : -20 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 15 TransStat_MAX_WEQGRAPH_SIZE : 3 TransStat_MAX_SIZEOF_WEQEDGELABEL : 2 TransStat_NO_SUPPORTING_EQUALITIES : 5 TransStat_NO_SUPPORTING_DISEQUALITIES : 1 TransStat_NO_DISJUNCTIONS : 16 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 5.083218 RENAME_VARIABLES(MILLISECONDS) : 0.600090 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 5.005633 PROJECTAWAY(MILLISECONDS) : 8.592390 ADD_WEAK_EQUALITY(MILLISECONDS) : 2.190435 DISJOIN(MILLISECONDS) : 0.239560 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.642047 ADD_EQUALITY(MILLISECONDS) : 3.463834 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.782129 #CONJOIN_DISJUNCTIVE : 36 #RENAME_VARIABLES : 82 #UNFREEZE : 0 #CONJOIN : 48 #PROJECTAWAY : 57 #ADD_WEAK_EQUALITY : 1 #DISJOIN : 10 #RENAME_VARIABLES_DISJUNCTIVE : 77 #ADD_EQUALITY : 5 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 1 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 14 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 9 LocStat_NO_SUPPORTING_DISEQUALITIES : 4 LocStat_NO_DISJUNCTIONS : -28 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 19 TransStat_MAX_WEQGRAPH_SIZE : 3 TransStat_MAX_SIZEOF_WEQEDGELABEL : 2 TransStat_NO_SUPPORTING_EQUALITIES : 7 TransStat_NO_SUPPORTING_DISEQUALITIES : 1 TransStat_NO_DISJUNCTIONS : 20 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.888697 RENAME_VARIABLES(MILLISECONDS) : 0.311943 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.367852 PROJECTAWAY(MILLISECONDS) : 0.072718 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.667742 DISJOIN(MILLISECONDS) : 0.163863 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.340239 ADD_EQUALITY(MILLISECONDS) : 0.032142 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.268095 #CONJOIN_DISJUNCTIVE : 56 #RENAME_VARIABLES : 122 #UNFREEZE : 0 #CONJOIN : 68 #PROJECTAWAY : 81 #ADD_WEAK_EQUALITY : 1 #DISJOIN : 14 #RENAME_VARIABLES_DISJUNCTIVE : 117 #ADD_EQUALITY : 7 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 1 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 21 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 11 LocStat_NO_SUPPORTING_DISEQUALITIES : 7 LocStat_NO_DISJUNCTIONS : -42 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 29 TransStat_MAX_WEQGRAPH_SIZE : 3 TransStat_MAX_SIZEOF_WEQEDGELABEL : 2 TransStat_NO_SUPPORTING_EQUALITIES : 10 TransStat_NO_SUPPORTING_DISEQUALITIES : 2 TransStat_NO_DISJUNCTIONS : 30 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.163122 RENAME_VARIABLES(MILLISECONDS) : 0.143402 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.118743 PROJECTAWAY(MILLISECONDS) : 0.148092 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.199281 DISJOIN(MILLISECONDS) : 0.185348 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.169457 ADD_EQUALITY(MILLISECONDS) : 0.057553 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.013418 #CONJOIN_DISJUNCTIVE : 121 #RENAME_VARIABLES : 295 #UNFREEZE : 0 #CONJOIN : 184 #PROJECTAWAY : 191 #ADD_WEAK_EQUALITY : 1 #DISJOIN : 26 #RENAME_VARIABLES_DISJUNCTIVE : 287 #ADD_EQUALITY : 10 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 7]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 7). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 26, while TraceCheckSpWp was constructing backward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 8. - TimeoutResultAtElement [Line: 8]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 8). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 26, while TraceCheckSpWp was constructing backward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 8. - TimeoutResultAtElement [Line: 13]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 13). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 26, while TraceCheckSpWp was constructing backward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 8. - TimeoutResultAtElement [Line: 13]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 13). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 26, while TraceCheckSpWp was constructing backward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 8. - TimeoutResultAtElement [Line: 8]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 8). Cancelled while BasicCegarLoop was analyzing trace of length 133 with TraceHistMax 26, while TraceCheckSpWp was constructing backward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 8. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 32 locations, 5 error locations. TIMEOUT Result, 49.3s OverallTime, 37 OverallIterations, 26 TraceHistogramMax, 15.1s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3556 SDtfs, 2266 SDslu, 48336 SDs, 0 SdLazy, 25223 SolverSat, 226 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 9.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 9923 GetRequests, 8956 SyntacticMatches, 64 SemanticMatches, 903 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2743 ImplicationChecksByTransitivity, 18.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=203occurred in iteration=36, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 1.0s AbstIntTime, 3 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.8s AutomataMinimizationTime, 36 MinimizatonAttempts, 8032 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 6.8s SatisfiabilityAnalysisTime, 22.6s InterpolantComputationTime, 7136 NumberOfCodeBlocks, 7106 NumberOfCodeBlocksAsserted, 493 NumberOfCheckSat, 11705 ConstructedInterpolants, 0 QuantifiedInterpolants, 6389661 SizeOfPredicates, 7 NumberOfNonLiveVariables, 6946 ConjunctsInSsa, 1551 ConjunctsInUnsatCore, 170 InterpolantComputations, 4 PerfectInterpolantSequences, 4895/68874 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-25_02-51-30-740.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-25_02-51-30-740.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-25_02-51-30-740.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-VPDomainBenchmark-1-2018-01-25_02-51-30-740.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-1-2018-01-25_02-51-30-740.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-VPDomainBenchmark-2-2018-01-25_02-51-30-740.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-2-2018-01-25_02-51-30-740.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-25_02-51-30-740.csv Completed graceful shutdown