java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf -i ../../../trunk/examples/svcomp/array-examples/standard_strcpy_false-valid-deref_ground.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-25 05:33:41,745 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-25 05:33:41,747 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-25 05:33:41,761 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-25 05:33:41,762 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-25 05:33:41,763 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-25 05:33:41,764 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-25 05:33:41,765 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-25 05:33:41,767 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-25 05:33:41,768 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-25 05:33:41,769 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-25 05:33:41,769 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-25 05:33:41,770 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-25 05:33:41,771 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-25 05:33:41,772 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-25 05:33:41,775 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-25 05:33:41,777 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-25 05:33:41,779 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-25 05:33:41,780 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-25 05:33:41,782 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-25 05:33:41,784 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-25 05:33:41,784 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-25 05:33:41,784 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-25 05:33:41,785 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-25 05:33:41,786 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-25 05:33:41,788 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-25 05:33:41,788 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-25 05:33:41,788 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-25 05:33:41,789 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-25 05:33:41,789 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-25 05:33:41,789 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-25 05:33:41,790 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf [2018-01-25 05:33:41,799 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-25 05:33:41,799 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-25 05:33:41,799 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-25 05:33:41,800 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-25 05:33:41,800 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-25 05:33:41,800 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-25 05:33:41,800 INFO L133 SettingsManager]: * Precise comparison operator=true [2018-01-25 05:33:41,800 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-25 05:33:41,800 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-25 05:33:41,801 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-25 05:33:41,801 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-25 05:33:41,801 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-25 05:33:41,801 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-25 05:33:41,801 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-25 05:33:41,801 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-25 05:33:41,801 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-25 05:33:41,802 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-25 05:33:41,802 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-25 05:33:41,802 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-25 05:33:41,802 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-25 05:33:41,802 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-25 05:33:41,802 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-25 05:33:41,802 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-25 05:33:41,803 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-25 05:33:41,803 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-25 05:33:41,803 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-25 05:33:41,803 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-25 05:33:41,803 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-25 05:33:41,804 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-25 05:33:41,804 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-25 05:33:41,804 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-25 05:33:41,804 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-25 05:33:41,804 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-25 05:33:41,804 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-25 05:33:41,805 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-25 05:33:41,805 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-25 05:33:41,838 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-25 05:33:41,849 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-25 05:33:41,852 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-25 05:33:41,853 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-25 05:33:41,854 INFO L276 PluginConnector]: CDTParser initialized [2018-01-25 05:33:41,854 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/standard_strcpy_false-valid-deref_ground.i [2018-01-25 05:33:41,968 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-25 05:33:41,973 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-25 05:33:41,973 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-25 05:33:41,973 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-25 05:33:41,978 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-25 05:33:41,979 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.01 05:33:41" (1/1) ... [2018-01-25 05:33:41,982 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6c604d9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:41, skipping insertion in model container [2018-01-25 05:33:41,982 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.01 05:33:41" (1/1) ... [2018-01-25 05:33:41,994 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-25 05:33:42,007 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-25 05:33:42,117 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-25 05:33:42,128 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-25 05:33:42,133 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:42 WrapperNode [2018-01-25 05:33:42,133 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-25 05:33:42,134 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-25 05:33:42,134 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-25 05:33:42,134 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-25 05:33:42,145 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:42" (1/1) ... [2018-01-25 05:33:42,145 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:42" (1/1) ... [2018-01-25 05:33:42,151 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:42" (1/1) ... [2018-01-25 05:33:42,152 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:42" (1/1) ... [2018-01-25 05:33:42,153 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:42" (1/1) ... [2018-01-25 05:33:42,157 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:42" (1/1) ... [2018-01-25 05:33:42,158 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:42" (1/1) ... [2018-01-25 05:33:42,159 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-25 05:33:42,160 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-25 05:33:42,160 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-25 05:33:42,160 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-25 05:33:42,161 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:42" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-25 05:33:42,209 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-25 05:33:42,209 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-25 05:33:42,209 INFO L136 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-01-25 05:33:42,209 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-25 05:33:42,210 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-01-25 05:33:42,210 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-01-25 05:33:42,210 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-25 05:33:42,210 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-25 05:33:42,210 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-25 05:33:42,335 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-25 05:33:42,335 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.01 05:33:42 BoogieIcfgContainer [2018-01-25 05:33:42,336 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-25 05:33:42,336 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-25 05:33:42,336 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-25 05:33:42,338 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-25 05:33:42,338 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 25.01 05:33:41" (1/3) ... [2018-01-25 05:33:42,339 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4344e42a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.01 05:33:42, skipping insertion in model container [2018-01-25 05:33:42,339 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:42" (2/3) ... [2018-01-25 05:33:42,339 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4344e42a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.01 05:33:42, skipping insertion in model container [2018-01-25 05:33:42,340 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.01 05:33:42" (3/3) ... [2018-01-25 05:33:42,342 INFO L105 eAbstractionObserver]: Analyzing ICFG standard_strcpy_false-valid-deref_ground.i [2018-01-25 05:33:42,349 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-25 05:33:42,355 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 5 error locations. [2018-01-25 05:33:42,394 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-25 05:33:42,415 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-25 05:33:42,415 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-25 05:33:42,415 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-25 05:33:42,415 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-25 05:33:42,416 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-25 05:33:42,416 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-25 05:33:42,416 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-25 05:33:42,417 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-25 05:33:42,438 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states. [2018-01-25 05:33:42,444 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-01-25 05:33:42,445 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:42,445 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:42,446 INFO L371 AbstractCegarLoop]: === Iteration 1 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:42,450 INFO L82 PathProgramCache]: Analyzing trace with hash -42218404, now seen corresponding path program 1 times [2018-01-25 05:33:42,453 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:42,503 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:42,503 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:42,503 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:42,503 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:42,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:42,538 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:42,609 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:42,611 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 05:33:42,612 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-25 05:33:42,612 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 05:33:42,615 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-25 05:33:42,627 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-25 05:33:42,627 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-25 05:33:42,629 INFO L87 Difference]: Start difference. First operand 32 states. Second operand 3 states. [2018-01-25 05:33:42,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:42,708 INFO L93 Difference]: Finished difference Result 71 states and 84 transitions. [2018-01-25 05:33:42,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-25 05:33:42,710 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-01-25 05:33:42,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:42,717 INFO L225 Difference]: With dead ends: 71 [2018-01-25 05:33:42,717 INFO L226 Difference]: Without dead ends: 40 [2018-01-25 05:33:42,720 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-25 05:33:42,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-25 05:33:42,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 31. [2018-01-25 05:33:42,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-25 05:33:42,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 33 transitions. [2018-01-25 05:33:42,813 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 33 transitions. Word has length 7 [2018-01-25 05:33:42,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:42,813 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 33 transitions. [2018-01-25 05:33:42,813 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-25 05:33:42,814 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 33 transitions. [2018-01-25 05:33:42,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-01-25 05:33:42,814 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:42,814 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:42,814 INFO L371 AbstractCegarLoop]: === Iteration 2 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:42,815 INFO L82 PathProgramCache]: Analyzing trace with hash -207595369, now seen corresponding path program 1 times [2018-01-25 05:33:42,815 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:42,816 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:42,816 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:42,816 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:42,816 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:42,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:42,828 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:42,879 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:42,880 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:42,880 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:42,881 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 13 with the following transitions: [2018-01-25 05:33:42,883 INFO L201 CegarAbsIntRunner]: [0], [4], [8], [10], [11], [16], [18], [20], [56], [57], [58] [2018-01-25 05:33:42,930 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-25 05:33:42,930 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-25 05:33:43,178 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-25 05:33:43,180 INFO L268 AbstractInterpreter]: Visited 11 different actions 23 times. Merged at 6 different actions 12 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 3 variables. [2018-01-25 05:33:43,188 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-25 05:33:43,188 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:43,188 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:43,200 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:43,200 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:43,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:43,219 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:43,235 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:43,235 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:43,281 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:43,304 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:43,304 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:43,308 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:43,308 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:43,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:43,322 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:43,338 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:43,339 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:43,371 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:43,373 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:43,373 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3, 3, 3] total 5 [2018-01-25 05:33:43,373 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:43,374 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-25 05:33:43,374 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-25 05:33:43,374 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-25 05:33:43,375 INFO L87 Difference]: Start difference. First operand 31 states and 33 transitions. Second operand 4 states. [2018-01-25 05:33:43,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:43,467 INFO L93 Difference]: Finished difference Result 57 states and 62 transitions. [2018-01-25 05:33:43,468 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-25 05:33:43,468 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 12 [2018-01-25 05:33:43,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:43,469 INFO L225 Difference]: With dead ends: 57 [2018-01-25 05:33:43,469 INFO L226 Difference]: Without dead ends: 54 [2018-01-25 05:33:43,470 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 43 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-25 05:33:43,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-25 05:33:43,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 36. [2018-01-25 05:33:43,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-25 05:33:43,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 39 transitions. [2018-01-25 05:33:43,477 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 39 transitions. Word has length 12 [2018-01-25 05:33:43,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:43,477 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 39 transitions. [2018-01-25 05:33:43,477 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-25 05:33:43,478 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 39 transitions. [2018-01-25 05:33:43,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-01-25 05:33:43,478 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:43,479 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:43,479 INFO L371 AbstractCegarLoop]: === Iteration 3 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:43,479 INFO L82 PathProgramCache]: Analyzing trace with hash -209255178, now seen corresponding path program 1 times [2018-01-25 05:33:43,479 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:43,480 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:43,480 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:43,480 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:43,480 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:43,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:43,486 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:43,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:43,533 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 05:33:43,533 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-25 05:33:43,533 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 05:33:43,533 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-25 05:33:43,533 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-25 05:33:43,534 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-01-25 05:33:43,534 INFO L87 Difference]: Start difference. First operand 36 states and 39 transitions. Second operand 4 states. [2018-01-25 05:33:43,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:43,577 INFO L93 Difference]: Finished difference Result 51 states and 54 transitions. [2018-01-25 05:33:43,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-25 05:33:43,577 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 12 [2018-01-25 05:33:43,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:43,578 INFO L225 Difference]: With dead ends: 51 [2018-01-25 05:33:43,578 INFO L226 Difference]: Without dead ends: 36 [2018-01-25 05:33:43,579 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-01-25 05:33:43,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-25 05:33:43,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-25 05:33:43,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-25 05:33:43,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 38 transitions. [2018-01-25 05:33:43,584 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 38 transitions. Word has length 12 [2018-01-25 05:33:43,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:43,585 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 38 transitions. [2018-01-25 05:33:43,585 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-25 05:33:43,585 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 38 transitions. [2018-01-25 05:33:43,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-25 05:33:43,586 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:43,586 INFO L322 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:43,586 INFO L371 AbstractCegarLoop]: === Iteration 4 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:43,587 INFO L82 PathProgramCache]: Analyzing trace with hash 2132883772, now seen corresponding path program 2 times [2018-01-25 05:33:43,587 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:43,588 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:43,588 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:43,588 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:43,589 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:43,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:43,598 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:43,672 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:43,673 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:43,673 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:43,673 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:43,673 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:43,673 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:43,673 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:43,681 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:43,682 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:43,687 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:43,690 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:43,691 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:43,693 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:43,701 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:43,701 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:43,773 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:43,804 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:43,805 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:43,808 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:43,808 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:43,812 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:43,816 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:43,820 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:43,823 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:43,830 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:43,831 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:43,839 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:43,841 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:43,841 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 7 [2018-01-25 05:33:43,841 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:43,841 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-25 05:33:43,841 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-25 05:33:43,842 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-25 05:33:43,842 INFO L87 Difference]: Start difference. First operand 36 states and 38 transitions. Second operand 5 states. [2018-01-25 05:33:43,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:43,915 INFO L93 Difference]: Finished difference Result 62 states and 67 transitions. [2018-01-25 05:33:43,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-25 05:33:43,916 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-25 05:33:43,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:43,917 INFO L225 Difference]: With dead ends: 62 [2018-01-25 05:33:43,917 INFO L226 Difference]: Without dead ends: 59 [2018-01-25 05:33:43,918 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 62 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-25 05:33:43,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-01-25 05:33:43,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 41. [2018-01-25 05:33:43,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-25 05:33:43,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 44 transitions. [2018-01-25 05:33:43,923 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 44 transitions. Word has length 17 [2018-01-25 05:33:43,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:43,924 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 44 transitions. [2018-01-25 05:33:43,924 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-25 05:33:43,924 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 44 transitions. [2018-01-25 05:33:43,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-25 05:33:43,924 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:43,925 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:43,925 INFO L371 AbstractCegarLoop]: === Iteration 5 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:43,925 INFO L82 PathProgramCache]: Analyzing trace with hash 2131223963, now seen corresponding path program 1 times [2018-01-25 05:33:43,925 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:43,926 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:43,926 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:43,926 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:43,926 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:43,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:43,932 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:43,978 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:43,978 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:43,978 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:43,978 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 18 with the following transitions: [2018-01-25 05:33:43,979 INFO L201 CegarAbsIntRunner]: [0], [4], [8], [11], [14], [16], [18], [20], [24], [28], [33], [34], [56], [57], [58] [2018-01-25 05:33:43,980 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-25 05:33:43,980 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-25 05:33:44,190 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-25 05:33:44,190 INFO L268 AbstractInterpreter]: Visited 15 different actions 35 times. Merged at 10 different actions 20 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 4 variables. [2018-01-25 05:33:44,196 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-25 05:33:44,196 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:44,196 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:44,204 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:44,204 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:44,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:44,211 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:44,213 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-25 05:33:44,213 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:44,255 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-25 05:33:44,275 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-25 05:33:44,275 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2, 2] imperfect sequences [5] total 6 [2018-01-25 05:33:44,275 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 05:33:44,275 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-25 05:33:44,276 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-25 05:33:44,276 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-25 05:33:44,276 INFO L87 Difference]: Start difference. First operand 41 states and 44 transitions. Second operand 3 states. [2018-01-25 05:33:44,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:44,289 INFO L93 Difference]: Finished difference Result 49 states and 53 transitions. [2018-01-25 05:33:44,289 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-25 05:33:44,289 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2018-01-25 05:33:44,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:44,290 INFO L225 Difference]: With dead ends: 49 [2018-01-25 05:33:44,290 INFO L226 Difference]: Without dead ends: 47 [2018-01-25 05:33:44,291 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 33 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-25 05:33:44,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-25 05:33:44,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 45. [2018-01-25 05:33:44,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-25 05:33:44,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 48 transitions. [2018-01-25 05:33:44,296 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 48 transitions. Word has length 17 [2018-01-25 05:33:44,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:44,296 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 48 transitions. [2018-01-25 05:33:44,297 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-25 05:33:44,297 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 48 transitions. [2018-01-25 05:33:44,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-25 05:33:44,298 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:44,298 INFO L322 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:44,298 INFO L371 AbstractCegarLoop]: === Iteration 6 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:44,298 INFO L82 PathProgramCache]: Analyzing trace with hash 2059138999, now seen corresponding path program 3 times [2018-01-25 05:33:44,298 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:44,299 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:44,299 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:44,299 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:44,299 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:44,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:44,306 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:44,391 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:44,391 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:44,391 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:44,391 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:44,391 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:44,392 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:44,392 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:44,400 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:33:44,400 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:33:44,405 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:44,406 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:44,408 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:44,409 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:44,410 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:44,412 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:44,426 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:44,426 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:44,529 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:44,562 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:44,563 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 8 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:44,570 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:33:44,570 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:33:44,575 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:44,577 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:44,582 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:44,587 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:44,591 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:44,594 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:44,601 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:44,601 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:44,617 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:44,619 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:44,619 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-25 05:33:44,619 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:44,620 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-25 05:33:44,620 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-25 05:33:44,620 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-25 05:33:44,620 INFO L87 Difference]: Start difference. First operand 45 states and 48 transitions. Second operand 6 states. [2018-01-25 05:33:44,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:44,714 INFO L93 Difference]: Finished difference Result 92 states and 99 transitions. [2018-01-25 05:33:44,715 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-25 05:33:44,715 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2018-01-25 05:33:44,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:44,716 INFO L225 Difference]: With dead ends: 92 [2018-01-25 05:33:44,716 INFO L226 Difference]: Without dead ends: 89 [2018-01-25 05:33:44,716 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-25 05:33:44,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-01-25 05:33:44,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 50. [2018-01-25 05:33:44,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-25 05:33:44,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2018-01-25 05:33:44,721 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 22 [2018-01-25 05:33:44,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:44,722 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2018-01-25 05:33:44,722 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-25 05:33:44,722 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2018-01-25 05:33:44,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-25 05:33:44,722 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:44,723 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:44,723 INFO L371 AbstractCegarLoop]: === Iteration 7 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:44,723 INFO L82 PathProgramCache]: Analyzing trace with hash -6617899, now seen corresponding path program 1 times [2018-01-25 05:33:44,723 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:44,724 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:44,724 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:44,724 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:44,724 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:44,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:44,736 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:44,766 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:44,766 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:44,766 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:44,767 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 28 with the following transitions: [2018-01-25 05:33:44,767 INFO L201 CegarAbsIntRunner]: [0], [4], [8], [11], [14], [16], [18], [20], [24], [28], [33], [34], [35], [37], [40], [46], [53], [55], [56], [57], [58], [60], [61] [2018-01-25 05:33:44,768 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-25 05:33:44,768 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-25 05:33:45,028 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-25 05:33:45,029 INFO L268 AbstractInterpreter]: Visited 23 different actions 81 times. Merged at 14 different actions 39 times. Never widened. Found 5 fixpoints after 3 different actions. Largest state had 5 variables. [2018-01-25 05:33:45,042 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-25 05:33:45,042 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:45,042 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:45,049 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:45,049 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:45,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:45,058 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:45,124 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:45,125 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:45,140 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:45,164 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:45,164 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 10 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:45,167 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:45,167 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:45,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:45,178 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:45,184 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:45,185 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:45,204 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:45,205 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:45,206 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 9 [2018-01-25 05:33:45,206 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:45,206 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-25 05:33:45,206 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-25 05:33:45,206 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-01-25 05:33:45,207 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 8 states. [2018-01-25 05:33:45,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:45,254 INFO L93 Difference]: Finished difference Result 71 states and 76 transitions. [2018-01-25 05:33:45,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-25 05:33:45,255 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 27 [2018-01-25 05:33:45,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:45,255 INFO L225 Difference]: With dead ends: 71 [2018-01-25 05:33:45,255 INFO L226 Difference]: Without dead ends: 50 [2018-01-25 05:33:45,256 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 101 SyntacticMatches, 4 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2018-01-25 05:33:45,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-25 05:33:45,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-25 05:33:45,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-25 05:33:45,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 53 transitions. [2018-01-25 05:33:45,260 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 53 transitions. Word has length 27 [2018-01-25 05:33:45,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:45,260 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 53 transitions. [2018-01-25 05:33:45,260 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-25 05:33:45,260 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 53 transitions. [2018-01-25 05:33:45,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-25 05:33:45,261 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:45,261 INFO L322 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:45,261 INFO L371 AbstractCegarLoop]: === Iteration 8 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:45,262 INFO L82 PathProgramCache]: Analyzing trace with hash -1173615076, now seen corresponding path program 4 times [2018-01-25 05:33:45,262 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:45,263 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:45,263 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:45,263 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:45,263 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:45,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:45,271 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:45,379 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:45,379 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:45,379 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:45,379 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:45,380 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:45,380 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:45,380 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:45,396 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:33:45,396 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:33:45,402 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:45,404 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:45,413 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:45,413 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:45,512 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:45,532 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:45,532 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:45,535 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:33:45,536 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:33:45,549 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:45,552 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:45,559 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:45,560 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:45,572 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:45,574 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:45,574 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-25 05:33:45,574 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:45,574 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-25 05:33:45,574 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-25 05:33:45,575 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-01-25 05:33:45,575 INFO L87 Difference]: Start difference. First operand 50 states and 53 transitions. Second operand 7 states. [2018-01-25 05:33:45,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:45,650 INFO L93 Difference]: Finished difference Result 97 states and 104 transitions. [2018-01-25 05:33:45,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-25 05:33:45,651 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-01-25 05:33:45,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:45,652 INFO L225 Difference]: With dead ends: 97 [2018-01-25 05:33:45,652 INFO L226 Difference]: Without dead ends: 94 [2018-01-25 05:33:45,652 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-01-25 05:33:45,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-01-25 05:33:45,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 55. [2018-01-25 05:33:45,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-25 05:33:45,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 59 transitions. [2018-01-25 05:33:45,659 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 59 transitions. Word has length 27 [2018-01-25 05:33:45,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:45,659 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 59 transitions. [2018-01-25 05:33:45,659 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-25 05:33:45,659 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 59 transitions. [2018-01-25 05:33:45,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-25 05:33:45,660 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:45,660 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:45,660 INFO L371 AbstractCegarLoop]: === Iteration 9 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:45,660 INFO L82 PathProgramCache]: Analyzing trace with hash 155329936, now seen corresponding path program 2 times [2018-01-25 05:33:45,660 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:45,661 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:45,661 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:45,661 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:45,661 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:45,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:45,669 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:45,783 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:45,783 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:45,783 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:45,783 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:45,783 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:45,783 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:45,783 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:45,789 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:45,789 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:45,793 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:45,796 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:45,802 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:45,804 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:45,840 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:45,841 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:45,928 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:45,948 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:45,948 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:45,951 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:45,951 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:45,955 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:45,960 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:45,964 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:45,967 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:45,973 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 2 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:45,974 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:45,994 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:45,996 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:45,997 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 14 [2018-01-25 05:33:45,997 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:45,997 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-25 05:33:45,997 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-25 05:33:45,998 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2018-01-25 05:33:45,998 INFO L87 Difference]: Start difference. First operand 55 states and 59 transitions. Second operand 9 states. [2018-01-25 05:33:46,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:46,155 INFO L93 Difference]: Finished difference Result 72 states and 78 transitions. [2018-01-25 05:33:46,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-25 05:33:46,156 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 32 [2018-01-25 05:33:46,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:46,157 INFO L225 Difference]: With dead ends: 72 [2018-01-25 05:33:46,157 INFO L226 Difference]: Without dead ends: 55 [2018-01-25 05:33:46,158 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 120 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-01-25 05:33:46,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-25 05:33:46,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-25 05:33:46,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-25 05:33:46,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 58 transitions. [2018-01-25 05:33:46,163 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 58 transitions. Word has length 32 [2018-01-25 05:33:46,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:46,164 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 58 transitions. [2018-01-25 05:33:46,164 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-25 05:33:46,164 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 58 transitions. [2018-01-25 05:33:46,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-25 05:33:46,165 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:46,165 INFO L322 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:46,165 INFO L371 AbstractCegarLoop]: === Iteration 10 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:46,165 INFO L82 PathProgramCache]: Analyzing trace with hash -1011667241, now seen corresponding path program 5 times [2018-01-25 05:33:46,165 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:46,166 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:46,166 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:46,166 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:46,166 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:46,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:46,173 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:46,249 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:46,249 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:46,249 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:46,249 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:46,249 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:46,249 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:46,249 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:46,255 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:33:46,255 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:46,257 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:46,258 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:46,259 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:46,260 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:46,261 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:46,263 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:46,263 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:46,264 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:46,270 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:46,270 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:46,330 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:46,350 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:46,350 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:46,353 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:33:46,353 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:46,356 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:46,358 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:46,363 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:46,367 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:46,372 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:46,379 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:46,382 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:46,385 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:46,391 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:46,391 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:46,397 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:46,399 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:46,399 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-25 05:33:46,399 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:46,399 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-25 05:33:46,400 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-25 05:33:46,400 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-01-25 05:33:46,400 INFO L87 Difference]: Start difference. First operand 55 states and 58 transitions. Second operand 8 states. [2018-01-25 05:33:46,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:46,519 INFO L93 Difference]: Finished difference Result 102 states and 109 transitions. [2018-01-25 05:33:46,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-25 05:33:46,520 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 32 [2018-01-25 05:33:46,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:46,520 INFO L225 Difference]: With dead ends: 102 [2018-01-25 05:33:46,521 INFO L226 Difference]: Without dead ends: 99 [2018-01-25 05:33:46,521 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 119 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-01-25 05:33:46,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-01-25 05:33:46,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 60. [2018-01-25 05:33:46,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-25 05:33:46,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 64 transitions. [2018-01-25 05:33:46,527 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 64 transitions. Word has length 32 [2018-01-25 05:33:46,527 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:46,528 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 64 transitions. [2018-01-25 05:33:46,528 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-25 05:33:46,528 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 64 transitions. [2018-01-25 05:33:46,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-25 05:33:46,529 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:46,529 INFO L322 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:46,529 INFO L371 AbstractCegarLoop]: === Iteration 11 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:46,529 INFO L82 PathProgramCache]: Analyzing trace with hash -903265867, now seen corresponding path program 3 times [2018-01-25 05:33:46,530 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:46,530 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:46,531 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:46,531 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:46,531 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:46,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:46,538 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:46,623 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:46,623 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:46,623 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:46,624 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:46,624 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:46,624 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:46,624 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:46,637 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:33:46,637 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:33:46,642 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:46,645 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:46,646 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:46,647 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:46,668 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-25 05:33:46,668 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:46,696 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-25 05:33:46,728 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:46,728 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:46,731 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:33:46,731 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:33:46,735 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:46,740 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:46,743 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:46,746 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:46,749 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-25 05:33:46,750 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:46,756 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-25 05:33:46,758 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:46,758 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 3, 3, 3, 3] total 12 [2018-01-25 05:33:46,758 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:46,758 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-25 05:33:46,759 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-25 05:33:46,759 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2018-01-25 05:33:46,759 INFO L87 Difference]: Start difference. First operand 60 states and 64 transitions. Second operand 11 states. [2018-01-25 05:33:46,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:46,833 INFO L93 Difference]: Finished difference Result 97 states and 113 transitions. [2018-01-25 05:33:46,835 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-25 05:33:46,835 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 37 [2018-01-25 05:33:46,835 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:46,836 INFO L225 Difference]: With dead ends: 97 [2018-01-25 05:33:46,836 INFO L226 Difference]: Without dead ends: 74 [2018-01-25 05:33:46,837 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 143 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2018-01-25 05:33:46,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-01-25 05:33:46,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 72. [2018-01-25 05:33:46,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-01-25 05:33:46,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 77 transitions. [2018-01-25 05:33:46,845 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 77 transitions. Word has length 37 [2018-01-25 05:33:46,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:46,845 INFO L432 AbstractCegarLoop]: Abstraction has 72 states and 77 transitions. [2018-01-25 05:33:46,845 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-25 05:33:46,845 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 77 transitions. [2018-01-25 05:33:46,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-25 05:33:46,847 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:46,847 INFO L322 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:46,847 INFO L371 AbstractCegarLoop]: === Iteration 12 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:46,848 INFO L82 PathProgramCache]: Analyzing trace with hash -2070263044, now seen corresponding path program 6 times [2018-01-25 05:33:46,848 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:46,849 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:46,849 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:46,849 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:46,849 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:46,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:46,856 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:46,926 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:46,926 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:46,927 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:46,927 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:46,927 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:46,927 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:46,927 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:46,933 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:33:46,933 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:33:46,936 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,937 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,937 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,938 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,939 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,940 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,941 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,942 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:46,943 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:46,951 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:46,951 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:47,029 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:47,049 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:47,049 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 20 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:47,055 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:33:47,055 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:33:47,059 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:47,060 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:47,065 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:47,069 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:47,075 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:47,082 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:47,090 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:47,093 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:47,096 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:47,104 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:47,104 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:47,115 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:47,116 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:47,117 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-25 05:33:47,117 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:47,117 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-25 05:33:47,117 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-25 05:33:47,117 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-01-25 05:33:47,117 INFO L87 Difference]: Start difference. First operand 72 states and 77 transitions. Second operand 9 states. [2018-01-25 05:33:47,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:47,205 INFO L93 Difference]: Finished difference Result 155 states and 170 transitions. [2018-01-25 05:33:47,205 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-25 05:33:47,205 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 37 [2018-01-25 05:33:47,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:47,207 INFO L225 Difference]: With dead ends: 155 [2018-01-25 05:33:47,207 INFO L226 Difference]: Without dead ends: 152 [2018-01-25 05:33:47,208 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-01-25 05:33:47,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-01-25 05:33:47,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 77. [2018-01-25 05:33:47,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-01-25 05:33:47,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 83 transitions. [2018-01-25 05:33:47,217 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 83 transitions. Word has length 37 [2018-01-25 05:33:47,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:47,217 INFO L432 AbstractCegarLoop]: Abstraction has 77 states and 83 transitions. [2018-01-25 05:33:47,217 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-25 05:33:47,217 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 83 transitions. [2018-01-25 05:33:47,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-25 05:33:47,218 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:47,218 INFO L322 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:47,219 INFO L371 AbstractCegarLoop]: === Iteration 13 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:47,219 INFO L82 PathProgramCache]: Analyzing trace with hash 1122500087, now seen corresponding path program 7 times [2018-01-25 05:33:47,219 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:47,220 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:47,220 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:47,220 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:47,220 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:47,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:47,227 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:47,302 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:47,303 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:47,303 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:47,303 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:47,303 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:47,303 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:47,303 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:47,309 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:47,309 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:47,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:47,317 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:47,326 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:47,326 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:47,435 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:47,455 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:47,465 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 22 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:47,468 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:47,468 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:47,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:47,482 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:47,491 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:47,491 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:47,506 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:47,508 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:47,508 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-25 05:33:47,508 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:47,508 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-25 05:33:47,508 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-25 05:33:47,509 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-01-25 05:33:47,509 INFO L87 Difference]: Start difference. First operand 77 states and 83 transitions. Second operand 10 states. [2018-01-25 05:33:47,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:47,629 INFO L93 Difference]: Finished difference Result 185 states and 204 transitions. [2018-01-25 05:33:47,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-25 05:33:47,630 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-01-25 05:33:47,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:47,631 INFO L225 Difference]: With dead ends: 185 [2018-01-25 05:33:47,631 INFO L226 Difference]: Without dead ends: 182 [2018-01-25 05:33:47,632 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-01-25 05:33:47,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-01-25 05:33:47,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 82. [2018-01-25 05:33:47,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states. [2018-01-25 05:33:47,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 89 transitions. [2018-01-25 05:33:47,642 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 89 transitions. Word has length 42 [2018-01-25 05:33:47,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:47,642 INFO L432 AbstractCegarLoop]: Abstraction has 82 states and 89 transitions. [2018-01-25 05:33:47,642 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-25 05:33:47,642 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 89 transitions. [2018-01-25 05:33:47,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-25 05:33:47,643 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:47,644 INFO L322 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:47,644 INFO L371 AbstractCegarLoop]: === Iteration 14 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:47,644 INFO L82 PathProgramCache]: Analyzing trace with hash -676728868, now seen corresponding path program 8 times [2018-01-25 05:33:47,644 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:47,645 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:47,645 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:47,645 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:47,645 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:47,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:47,651 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:47,755 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:47,755 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:47,755 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:47,756 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:47,756 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:47,756 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:47,756 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:47,761 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:47,761 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:47,764 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:47,768 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:47,769 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:47,770 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:47,779 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:47,779 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:47,896 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:47,919 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:47,919 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 24 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:47,922 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:47,922 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:47,926 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:47,934 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:47,940 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:47,942 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:47,951 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:47,951 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:47,966 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:47,968 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:47,968 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-25 05:33:47,968 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:47,968 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-25 05:33:47,968 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-25 05:33:47,968 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-01-25 05:33:47,969 INFO L87 Difference]: Start difference. First operand 82 states and 89 transitions. Second operand 11 states. [2018-01-25 05:33:48,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:48,195 INFO L93 Difference]: Finished difference Result 215 states and 238 transitions. [2018-01-25 05:33:48,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-25 05:33:48,195 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 47 [2018-01-25 05:33:48,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:48,197 INFO L225 Difference]: With dead ends: 215 [2018-01-25 05:33:48,197 INFO L226 Difference]: Without dead ends: 212 [2018-01-25 05:33:48,198 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 176 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-01-25 05:33:48,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2018-01-25 05:33:48,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 87. [2018-01-25 05:33:48,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-01-25 05:33:48,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 95 transitions. [2018-01-25 05:33:48,209 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 95 transitions. Word has length 47 [2018-01-25 05:33:48,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:48,209 INFO L432 AbstractCegarLoop]: Abstraction has 87 states and 95 transitions. [2018-01-25 05:33:48,209 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-25 05:33:48,209 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 95 transitions. [2018-01-25 05:33:48,210 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-25 05:33:48,210 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:48,210 INFO L322 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:48,210 INFO L371 AbstractCegarLoop]: === Iteration 15 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:48,210 INFO L82 PathProgramCache]: Analyzing trace with hash -633576169, now seen corresponding path program 9 times [2018-01-25 05:33:48,211 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:48,211 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:48,211 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:48,212 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:48,212 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:48,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:48,221 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:48,367 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:48,367 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:48,367 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:48,367 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:48,367 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:48,368 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:48,368 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:48,375 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:33:48,375 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:33:48,379 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,382 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,383 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,388 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,389 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,391 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,393 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,395 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,398 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,400 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,401 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:48,403 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:48,437 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:48,437 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:48,656 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:48,676 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:48,677 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 26 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:48,681 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:33:48,681 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:33:48,685 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,687 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,692 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,697 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,706 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,716 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,727 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,740 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,751 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,767 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:48,772 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:48,775 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:48,787 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:48,788 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:48,806 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:48,808 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:48,808 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-25 05:33:48,808 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:48,809 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-25 05:33:48,809 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-25 05:33:48,809 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-01-25 05:33:48,809 INFO L87 Difference]: Start difference. First operand 87 states and 95 transitions. Second operand 12 states. [2018-01-25 05:33:49,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:49,042 INFO L93 Difference]: Finished difference Result 245 states and 272 transitions. [2018-01-25 05:33:49,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-25 05:33:49,043 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 52 [2018-01-25 05:33:49,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:49,045 INFO L225 Difference]: With dead ends: 245 [2018-01-25 05:33:49,045 INFO L226 Difference]: Without dead ends: 242 [2018-01-25 05:33:49,045 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 217 GetRequests, 195 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-01-25 05:33:49,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-01-25 05:33:49,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 92. [2018-01-25 05:33:49,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-01-25 05:33:49,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 101 transitions. [2018-01-25 05:33:49,058 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 101 transitions. Word has length 52 [2018-01-25 05:33:49,058 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:49,058 INFO L432 AbstractCegarLoop]: Abstraction has 92 states and 101 transitions. [2018-01-25 05:33:49,058 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-25 05:33:49,058 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 101 transitions. [2018-01-25 05:33:49,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-01-25 05:33:49,059 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:49,059 INFO L322 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:49,060 INFO L371 AbstractCegarLoop]: === Iteration 16 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:49,060 INFO L82 PathProgramCache]: Analyzing trace with hash -1365705540, now seen corresponding path program 10 times [2018-01-25 05:33:49,060 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:49,061 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:49,061 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:49,061 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:49,061 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:49,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:49,070 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:49,205 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:49,205 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:49,205 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:49,205 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:49,205 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:49,206 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:49,206 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:49,216 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:33:49,216 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:33:49,228 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:49,230 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:49,242 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:49,242 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:49,416 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:49,436 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:49,436 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 28 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:49,439 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:33:49,439 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:33:49,470 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:49,472 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:49,481 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:49,481 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:49,491 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:49,492 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:49,493 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-25 05:33:49,493 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:49,493 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-25 05:33:49,493 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-25 05:33:49,493 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-01-25 05:33:49,494 INFO L87 Difference]: Start difference. First operand 92 states and 101 transitions. Second operand 13 states. [2018-01-25 05:33:49,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:49,751 INFO L93 Difference]: Finished difference Result 275 states and 306 transitions. [2018-01-25 05:33:49,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-25 05:33:49,752 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2018-01-25 05:33:49,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:49,753 INFO L225 Difference]: With dead ends: 275 [2018-01-25 05:33:49,753 INFO L226 Difference]: Without dead ends: 272 [2018-01-25 05:33:49,754 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 238 GetRequests, 214 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-01-25 05:33:49,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 272 states. [2018-01-25 05:33:49,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 272 to 97. [2018-01-25 05:33:49,765 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-01-25 05:33:49,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 107 transitions. [2018-01-25 05:33:49,765 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 107 transitions. Word has length 57 [2018-01-25 05:33:49,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:49,766 INFO L432 AbstractCegarLoop]: Abstraction has 97 states and 107 transitions. [2018-01-25 05:33:49,766 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-25 05:33:49,766 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 107 transitions. [2018-01-25 05:33:49,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-01-25 05:33:49,767 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:49,767 INFO L322 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:49,767 INFO L371 AbstractCegarLoop]: === Iteration 17 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:49,767 INFO L82 PathProgramCache]: Analyzing trace with hash -1933470172, now seen corresponding path program 4 times [2018-01-25 05:33:49,767 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:49,768 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:49,768 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:49,768 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:49,768 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:49,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:49,779 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:49,926 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 10 proven. 59 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-01-25 05:33:49,926 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:49,926 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:49,926 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:49,926 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:49,926 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:49,926 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:49,932 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:33:49,932 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:33:49,942 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:49,943 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:49,967 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:33:49,967 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:50,015 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:33:50,035 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:50,035 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 30 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:50,038 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:33:50,039 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:33:50,071 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:50,074 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:50,092 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:33:50,092 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:50,125 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:33:50,126 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:50,127 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 5, 5, 5, 5] total 18 [2018-01-25 05:33:50,127 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:50,127 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-25 05:33:50,127 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-25 05:33:50,128 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=269, Unknown=0, NotChecked=0, Total=342 [2018-01-25 05:33:50,128 INFO L87 Difference]: Start difference. First operand 97 states and 107 transitions. Second operand 15 states. [2018-01-25 05:33:50,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:50,304 INFO L93 Difference]: Finished difference Result 134 states and 152 transitions. [2018-01-25 05:33:50,305 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-25 05:33:50,305 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 62 [2018-01-25 05:33:50,305 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:50,307 INFO L225 Difference]: With dead ends: 134 [2018-01-25 05:33:50,307 INFO L226 Difference]: Without dead ends: 105 [2018-01-25 05:33:50,307 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 260 GetRequests, 238 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 112 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=103, Invalid=359, Unknown=0, NotChecked=0, Total=462 [2018-01-25 05:33:50,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-01-25 05:33:50,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 103. [2018-01-25 05:33:50,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-01-25 05:33:50,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 113 transitions. [2018-01-25 05:33:50,316 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 113 transitions. Word has length 62 [2018-01-25 05:33:50,316 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:50,316 INFO L432 AbstractCegarLoop]: Abstraction has 103 states and 113 transitions. [2018-01-25 05:33:50,316 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-25 05:33:50,317 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 113 transitions. [2018-01-25 05:33:50,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-01-25 05:33:50,317 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:50,317 INFO L322 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:50,317 INFO L371 AbstractCegarLoop]: === Iteration 18 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:50,317 INFO L82 PathProgramCache]: Analyzing trace with hash -116235209, now seen corresponding path program 11 times [2018-01-25 05:33:50,317 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:50,318 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:50,318 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:50,318 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:50,318 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:50,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:50,325 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:50,500 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:50,501 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:50,501 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:50,501 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:50,501 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:50,501 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:50,501 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:50,507 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:33:50,507 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:50,510 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,511 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,514 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,516 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,523 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,524 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,530 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,539 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,547 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,549 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,555 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,560 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,561 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:50,562 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:50,575 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:50,576 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:50,847 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:50,866 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:50,866 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 32 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:50,869 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:33:50,869 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:50,876 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,878 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,882 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,887 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,892 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,898 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,906 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,917 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,931 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,945 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,961 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,981 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:50,987 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:50,990 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:51,000 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:51,000 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:51,021 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:51,022 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:51,023 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-25 05:33:51,023 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:51,023 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-25 05:33:51,023 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-25 05:33:51,024 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-01-25 05:33:51,024 INFO L87 Difference]: Start difference. First operand 103 states and 113 transitions. Second operand 14 states. [2018-01-25 05:33:51,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:51,304 INFO L93 Difference]: Finished difference Result 328 states and 367 transitions. [2018-01-25 05:33:51,304 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-25 05:33:51,304 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 62 [2018-01-25 05:33:51,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:51,306 INFO L225 Difference]: With dead ends: 328 [2018-01-25 05:33:51,306 INFO L226 Difference]: Without dead ends: 325 [2018-01-25 05:33:51,307 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 259 GetRequests, 233 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-01-25 05:33:51,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2018-01-25 05:33:51,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 108. [2018-01-25 05:33:51,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-01-25 05:33:51,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 119 transitions. [2018-01-25 05:33:51,322 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 119 transitions. Word has length 62 [2018-01-25 05:33:51,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:51,323 INFO L432 AbstractCegarLoop]: Abstraction has 108 states and 119 transitions. [2018-01-25 05:33:51,323 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-25 05:33:51,323 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 119 transitions. [2018-01-25 05:33:51,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-01-25 05:33:51,324 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:51,324 INFO L322 BasicCegarLoop]: trace histogram [13, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:51,324 INFO L371 AbstractCegarLoop]: === Iteration 19 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:51,324 INFO L82 PathProgramCache]: Analyzing trace with hash -414879332, now seen corresponding path program 12 times [2018-01-25 05:33:51,324 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:51,325 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:51,325 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:51,325 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:51,326 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:51,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:51,334 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:51,528 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:51,528 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:51,528 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:51,528 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:51,528 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:51,529 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:51,529 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:51,533 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:33:51,534 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:33:51,537 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,538 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,541 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,542 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,543 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,544 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,545 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,547 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,548 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,550 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,552 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,554 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,557 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,557 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:51,559 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:51,580 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:51,580 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:51,819 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:51,839 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:51,840 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 34 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:51,843 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:33:51,843 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:33:51,847 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,849 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,853 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,857 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,862 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,868 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,876 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,887 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,902 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,919 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,936 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,959 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,988 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:51,996 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:52,000 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:52,032 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:52,032 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:52,055 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:52,056 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:52,056 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-25 05:33:52,056 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:52,056 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-25 05:33:52,057 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-25 05:33:52,057 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-01-25 05:33:52,057 INFO L87 Difference]: Start difference. First operand 108 states and 119 transitions. Second operand 15 states. [2018-01-25 05:33:52,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:52,334 INFO L93 Difference]: Finished difference Result 364 states and 408 transitions. [2018-01-25 05:33:52,334 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-25 05:33:52,334 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2018-01-25 05:33:52,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:52,336 INFO L225 Difference]: With dead ends: 364 [2018-01-25 05:33:52,336 INFO L226 Difference]: Without dead ends: 361 [2018-01-25 05:33:52,337 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 280 GetRequests, 252 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-01-25 05:33:52,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 361 states. [2018-01-25 05:33:52,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 361 to 113. [2018-01-25 05:33:52,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-01-25 05:33:52,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 125 transitions. [2018-01-25 05:33:52,350 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 125 transitions. Word has length 67 [2018-01-25 05:33:52,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:52,350 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 125 transitions. [2018-01-25 05:33:52,350 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-25 05:33:52,351 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 125 transitions. [2018-01-25 05:33:52,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-01-25 05:33:52,351 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:52,351 INFO L322 BasicCegarLoop]: trace histogram [14, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:52,351 INFO L371 AbstractCegarLoop]: === Iteration 20 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:52,351 INFO L82 PathProgramCache]: Analyzing trace with hash -1135871145, now seen corresponding path program 13 times [2018-01-25 05:33:52,351 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:52,352 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:52,352 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:52,352 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:52,352 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:52,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:52,359 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:52,510 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:52,510 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:52,510 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:52,510 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:52,510 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:52,510 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:52,510 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:52,515 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:52,515 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:52,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:52,526 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:52,537 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:52,537 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:52,764 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:52,783 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:52,784 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 36 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:52,786 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:52,787 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:52,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:52,808 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:52,819 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:52,819 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:52,834 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:52,835 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:52,836 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-25 05:33:52,836 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:52,836 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-25 05:33:52,836 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-25 05:33:52,836 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-01-25 05:33:52,837 INFO L87 Difference]: Start difference. First operand 113 states and 125 transitions. Second operand 16 states. [2018-01-25 05:33:53,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:53,176 INFO L93 Difference]: Finished difference Result 400 states and 449 transitions. [2018-01-25 05:33:53,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-25 05:33:53,177 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 72 [2018-01-25 05:33:53,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:53,179 INFO L225 Difference]: With dead ends: 400 [2018-01-25 05:33:53,179 INFO L226 Difference]: Without dead ends: 397 [2018-01-25 05:33:53,180 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 301 GetRequests, 271 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-01-25 05:33:53,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 397 states. [2018-01-25 05:33:53,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 397 to 118. [2018-01-25 05:33:53,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-01-25 05:33:53,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 131 transitions. [2018-01-25 05:33:53,193 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 131 transitions. Word has length 72 [2018-01-25 05:33:53,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:53,193 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 131 transitions. [2018-01-25 05:33:53,193 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-25 05:33:53,193 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 131 transitions. [2018-01-25 05:33:53,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-01-25 05:33:53,194 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:53,195 INFO L322 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:53,195 INFO L371 AbstractCegarLoop]: === Iteration 21 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:53,195 INFO L82 PathProgramCache]: Analyzing trace with hash 1226682691, now seen corresponding path program 5 times [2018-01-25 05:33:53,195 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:53,196 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:53,196 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:53,196 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:53,196 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:53,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:53,205 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:53,381 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 24 proven. 89 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-25 05:33:53,381 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:53,382 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:53,382 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:53,382 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:53,382 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:53,382 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:53,388 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:33:53,388 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:53,391 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:53,393 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:53,396 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:53,398 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:53,400 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:53,403 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:53,404 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:53,406 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:53,453 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 48 refuted. 0 times theorem prover too weak. 89 trivial. 0 not checked. [2018-01-25 05:33:53,453 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:53,532 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 48 refuted. 0 times theorem prover too weak. 89 trivial. 0 not checked. [2018-01-25 05:33:53,553 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:53,553 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 38 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:53,556 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:33:53,556 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:53,560 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:53,564 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:53,571 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:53,580 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:53,591 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:53,610 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:53,618 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:53,622 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:53,633 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 48 refuted. 0 times theorem prover too weak. 89 trivial. 0 not checked. [2018-01-25 05:33:53,633 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:53,646 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 0 proven. 48 refuted. 0 times theorem prover too weak. 89 trivial. 0 not checked. [2018-01-25 05:33:53,647 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:53,647 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 6, 6, 6, 6] total 22 [2018-01-25 05:33:53,647 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:53,647 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-25 05:33:53,648 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-25 05:33:53,648 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=100, Invalid=406, Unknown=0, NotChecked=0, Total=506 [2018-01-25 05:33:53,648 INFO L87 Difference]: Start difference. First operand 118 states and 131 transitions. Second operand 18 states. [2018-01-25 05:33:53,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:53,803 INFO L93 Difference]: Finished difference Result 161 states and 183 transitions. [2018-01-25 05:33:53,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-25 05:33:53,803 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 77 [2018-01-25 05:33:53,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:53,804 INFO L225 Difference]: With dead ends: 161 [2018-01-25 05:33:53,804 INFO L226 Difference]: Without dead ends: 126 [2018-01-25 05:33:53,805 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 323 GetRequests, 296 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 169 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=146, Invalid=556, Unknown=0, NotChecked=0, Total=702 [2018-01-25 05:33:53,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-01-25 05:33:53,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 124. [2018-01-25 05:33:53,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-01-25 05:33:53,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 137 transitions. [2018-01-25 05:33:53,815 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 137 transitions. Word has length 77 [2018-01-25 05:33:53,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:53,815 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 137 transitions. [2018-01-25 05:33:53,815 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-25 05:33:53,815 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 137 transitions. [2018-01-25 05:33:53,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-01-25 05:33:53,816 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:53,816 INFO L322 BasicCegarLoop]: trace histogram [15, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:53,816 INFO L371 AbstractCegarLoop]: === Iteration 22 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:53,816 INFO L82 PathProgramCache]: Analyzing trace with hash 571297404, now seen corresponding path program 14 times [2018-01-25 05:33:53,816 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:53,817 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:53,817 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:53,817 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:53,817 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:53,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:53,824 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:54,008 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:54,008 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:54,008 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:54,008 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:54,008 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:54,008 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:54,008 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:54,013 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:54,013 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:54,017 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:54,022 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:54,023 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:54,025 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:54,041 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:54,041 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:54,330 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:54,350 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:54,350 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 40 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:54,353 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:54,353 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:54,357 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:54,367 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:54,374 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:54,378 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:54,395 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:54,395 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:54,417 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:54,418 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:54,418 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-25 05:33:54,419 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:54,419 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-25 05:33:54,419 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-25 05:33:54,419 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=706, Unknown=0, NotChecked=0, Total=992 [2018-01-25 05:33:54,419 INFO L87 Difference]: Start difference. First operand 124 states and 137 transitions. Second operand 17 states. [2018-01-25 05:33:54,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:54,836 INFO L93 Difference]: Finished difference Result 465 states and 524 transitions. [2018-01-25 05:33:54,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-25 05:33:54,836 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 77 [2018-01-25 05:33:54,837 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:54,839 INFO L225 Difference]: With dead ends: 465 [2018-01-25 05:33:54,839 INFO L226 Difference]: Without dead ends: 462 [2018-01-25 05:33:54,839 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 322 GetRequests, 290 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=286, Invalid=706, Unknown=0, NotChecked=0, Total=992 [2018-01-25 05:33:54,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 462 states. [2018-01-25 05:33:54,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 462 to 129. [2018-01-25 05:33:54,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-01-25 05:33:54,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 143 transitions. [2018-01-25 05:33:54,852 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 143 transitions. Word has length 77 [2018-01-25 05:33:54,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:54,852 INFO L432 AbstractCegarLoop]: Abstraction has 129 states and 143 transitions. [2018-01-25 05:33:54,852 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-25 05:33:54,852 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 143 transitions. [2018-01-25 05:33:54,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-01-25 05:33:54,853 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:54,853 INFO L322 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:54,853 INFO L371 AbstractCegarLoop]: === Iteration 23 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:54,853 INFO L82 PathProgramCache]: Analyzing trace with hash 239807095, now seen corresponding path program 15 times [2018-01-25 05:33:54,853 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:54,853 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:54,854 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:54,854 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:54,854 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:54,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:54,859 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:55,025 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:55,025 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:55,025 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:55,026 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:55,026 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:55,026 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:55,026 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:55,031 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:33:55,031 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:33:55,034 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,035 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,036 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,037 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,038 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,039 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,040 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,041 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,042 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,044 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,045 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,047 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,049 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,051 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,053 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,055 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,056 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:55,058 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:55,070 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:55,070 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:55,363 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:55,383 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:55,383 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 42 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:55,386 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:33:55,386 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:33:55,390 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,392 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,396 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,400 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,405 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,412 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,420 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,429 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,440 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,456 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,474 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,494 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,517 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,545 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,583 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,627 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:55,636 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:55,639 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:55,656 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:55,656 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:55,676 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:55,678 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:55,678 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-25 05:33:55,678 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:55,678 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-25 05:33:55,678 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-25 05:33:55,679 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2018-01-25 05:33:55,679 INFO L87 Difference]: Start difference. First operand 129 states and 143 transitions. Second operand 18 states. [2018-01-25 05:33:56,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:56,437 INFO L93 Difference]: Finished difference Result 507 states and 572 transitions. [2018-01-25 05:33:56,437 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-25 05:33:56,437 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 82 [2018-01-25 05:33:56,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:56,439 INFO L225 Difference]: With dead ends: 507 [2018-01-25 05:33:56,439 INFO L226 Difference]: Without dead ends: 504 [2018-01-25 05:33:56,439 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 343 GetRequests, 309 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2018-01-25 05:33:56,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 504 states. [2018-01-25 05:33:56,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 504 to 134. [2018-01-25 05:33:56,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-25 05:33:56,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 149 transitions. [2018-01-25 05:33:56,453 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 149 transitions. Word has length 82 [2018-01-25 05:33:56,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:56,454 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 149 transitions. [2018-01-25 05:33:56,454 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-25 05:33:56,454 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 149 transitions. [2018-01-25 05:33:56,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-01-25 05:33:56,454 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:56,454 INFO L322 BasicCegarLoop]: trace histogram [17, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:56,455 INFO L371 AbstractCegarLoop]: === Iteration 24 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:56,455 INFO L82 PathProgramCache]: Analyzing trace with hash -1580297380, now seen corresponding path program 16 times [2018-01-25 05:33:56,455 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:56,455 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:56,455 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:56,455 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:56,456 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:56,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:56,461 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:56,759 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:56,759 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:56,759 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:56,760 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:56,760 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:56,760 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:56,760 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:56,765 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:33:56,765 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:33:56,783 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:56,785 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:56,808 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:56,808 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:57,135 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:57,154 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:57,155 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 44 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:57,157 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:33:57,158 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:33:57,223 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:57,227 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:57,241 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:57,241 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:57,257 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:57,259 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:57,259 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-25 05:33:57,259 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:57,259 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-25 05:33:57,259 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-25 05:33:57,260 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=358, Invalid=902, Unknown=0, NotChecked=0, Total=1260 [2018-01-25 05:33:57,260 INFO L87 Difference]: Start difference. First operand 134 states and 149 transitions. Second operand 19 states. [2018-01-25 05:33:57,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:57,754 INFO L93 Difference]: Finished difference Result 549 states and 620 transitions. [2018-01-25 05:33:57,755 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-25 05:33:57,755 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 87 [2018-01-25 05:33:57,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:57,756 INFO L225 Difference]: With dead ends: 549 [2018-01-25 05:33:57,756 INFO L226 Difference]: Without dead ends: 546 [2018-01-25 05:33:57,757 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 364 GetRequests, 328 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=358, Invalid=902, Unknown=0, NotChecked=0, Total=1260 [2018-01-25 05:33:57,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 546 states. [2018-01-25 05:33:57,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 546 to 139. [2018-01-25 05:33:57,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-01-25 05:33:57,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 155 transitions. [2018-01-25 05:33:57,772 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 155 transitions. Word has length 87 [2018-01-25 05:33:57,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:57,772 INFO L432 AbstractCegarLoop]: Abstraction has 139 states and 155 transitions. [2018-01-25 05:33:57,772 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-25 05:33:57,772 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 155 transitions. [2018-01-25 05:33:57,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-01-25 05:33:57,773 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:57,773 INFO L322 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:57,773 INFO L371 AbstractCegarLoop]: === Iteration 25 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:57,773 INFO L82 PathProgramCache]: Analyzing trace with hash 677887160, now seen corresponding path program 6 times [2018-01-25 05:33:57,773 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:57,773 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:57,774 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:57,774 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:57,774 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:57,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:57,781 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:57,901 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 44 proven. 124 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2018-01-25 05:33:57,901 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:57,901 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:57,901 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:57,901 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:57,902 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:57,902 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:57,906 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:33:57,906 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:33:57,910 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:57,911 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:57,913 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:57,914 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:57,916 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:57,918 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:57,921 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:57,921 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:57,923 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:57,966 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 0 proven. 75 refuted. 0 times theorem prover too weak. 133 trivial. 0 not checked. [2018-01-25 05:33:57,967 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:58,051 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 0 proven. 75 refuted. 0 times theorem prover too weak. 133 trivial. 0 not checked. [2018-01-25 05:33:58,071 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:58,071 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 46 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:58,074 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:33:58,074 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:33:58,078 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:58,080 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:58,086 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:58,093 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:58,104 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:58,118 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:58,138 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:58,147 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:58,150 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:58,164 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 0 proven. 75 refuted. 0 times theorem prover too weak. 133 trivial. 0 not checked. [2018-01-25 05:33:58,164 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:58,178 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 0 proven. 75 refuted. 0 times theorem prover too weak. 133 trivial. 0 not checked. [2018-01-25 05:33:58,179 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:58,179 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 7, 7, 7, 7] total 26 [2018-01-25 05:33:58,179 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:58,180 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-25 05:33:58,180 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-25 05:33:58,180 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=131, Invalid=571, Unknown=0, NotChecked=0, Total=702 [2018-01-25 05:33:58,180 INFO L87 Difference]: Start difference. First operand 139 states and 155 transitions. Second operand 21 states. [2018-01-25 05:33:58,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:58,367 INFO L93 Difference]: Finished difference Result 188 states and 214 transitions. [2018-01-25 05:33:58,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-25 05:33:58,367 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 92 [2018-01-25 05:33:58,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:58,368 INFO L225 Difference]: With dead ends: 188 [2018-01-25 05:33:58,368 INFO L226 Difference]: Without dead ends: 147 [2018-01-25 05:33:58,368 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 386 GetRequests, 354 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 238 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=196, Invalid=796, Unknown=0, NotChecked=0, Total=992 [2018-01-25 05:33:58,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-01-25 05:33:58,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 145. [2018-01-25 05:33:58,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-01-25 05:33:58,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 161 transitions. [2018-01-25 05:33:58,381 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 161 transitions. Word has length 92 [2018-01-25 05:33:58,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:58,381 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 161 transitions. [2018-01-25 05:33:58,381 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-25 05:33:58,381 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 161 transitions. [2018-01-25 05:33:58,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-01-25 05:33:58,382 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:58,382 INFO L322 BasicCegarLoop]: trace histogram [18, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:58,383 INFO L371 AbstractCegarLoop]: === Iteration 26 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:58,383 INFO L82 PathProgramCache]: Analyzing trace with hash -957222505, now seen corresponding path program 17 times [2018-01-25 05:33:58,383 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:58,383 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:58,384 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:58,384 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:58,384 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:58,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:58,392 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:59,170 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:59,170 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:59,170 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:59,171 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:59,171 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:59,171 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:59,171 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:59,176 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:33:59,176 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:59,179 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,180 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,180 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,181 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,182 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,183 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,184 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,186 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,187 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,189 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,190 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,192 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,195 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,197 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,200 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,203 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,206 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,210 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,211 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:59,213 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:59,226 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:59,227 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:59,553 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:59,572 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:59,572 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 48 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:59,577 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:33:59,577 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:59,583 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,586 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,592 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,599 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,608 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,617 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,628 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,641 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,661 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,683 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,703 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,725 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,751 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,788 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,829 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,861 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,899 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,944 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:59,952 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:59,956 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:59,980 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:59,980 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:00,000 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:00,001 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:00,001 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-25 05:34:00,001 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:00,002 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-25 05:34:00,002 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-25 05:34:00,002 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=397, Invalid=1009, Unknown=0, NotChecked=0, Total=1406 [2018-01-25 05:34:00,002 INFO L87 Difference]: Start difference. First operand 145 states and 161 transitions. Second operand 20 states. [2018-01-25 05:34:00,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:00,563 INFO L93 Difference]: Finished difference Result 626 states and 709 transitions. [2018-01-25 05:34:00,563 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-25 05:34:00,564 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 92 [2018-01-25 05:34:00,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:00,565 INFO L225 Difference]: With dead ends: 626 [2018-01-25 05:34:00,566 INFO L226 Difference]: Without dead ends: 623 [2018-01-25 05:34:00,566 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 385 GetRequests, 347 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=397, Invalid=1009, Unknown=0, NotChecked=0, Total=1406 [2018-01-25 05:34:00,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 623 states. [2018-01-25 05:34:00,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 623 to 150. [2018-01-25 05:34:00,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-01-25 05:34:00,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 167 transitions. [2018-01-25 05:34:00,594 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 167 transitions. Word has length 92 [2018-01-25 05:34:00,594 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:00,594 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 167 transitions. [2018-01-25 05:34:00,594 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-25 05:34:00,594 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 167 transitions. [2018-01-25 05:34:00,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-01-25 05:34:00,595 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:00,595 INFO L322 BasicCegarLoop]: trace histogram [19, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:00,595 INFO L371 AbstractCegarLoop]: === Iteration 27 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:00,595 INFO L82 PathProgramCache]: Analyzing trace with hash 736575548, now seen corresponding path program 18 times [2018-01-25 05:34:00,595 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:00,596 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:00,596 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:00,596 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:00,596 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:00,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:00,603 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:00,879 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:00,879 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:00,880 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:00,880 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:00,880 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:00,880 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:00,880 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:00,885 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:34:00,885 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:34:00,888 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,889 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,890 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,891 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,892 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,892 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,893 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,894 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,895 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,897 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,898 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,899 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,901 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,902 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,904 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,906 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,908 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,910 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,913 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:00,913 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:00,915 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:00,933 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:00,933 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:01,394 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:01,415 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:01,416 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 50 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:01,419 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:34:01,419 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:34:01,423 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,425 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,429 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,434 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,439 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,446 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,454 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,464 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,479 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,497 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,517 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,538 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,559 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,583 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,612 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,645 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,684 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,732 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,852 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:01,864 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:01,868 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:01,889 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:01,890 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:01,908 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:01,910 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:01,910 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-25 05:34:01,910 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:01,910 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-25 05:34:01,910 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-25 05:34:01,911 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=438, Invalid=1122, Unknown=0, NotChecked=0, Total=1560 [2018-01-25 05:34:01,911 INFO L87 Difference]: Start difference. First operand 150 states and 167 transitions. Second operand 21 states. [2018-01-25 05:34:02,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:02,540 INFO L93 Difference]: Finished difference Result 674 states and 764 transitions. [2018-01-25 05:34:02,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-25 05:34:02,540 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 97 [2018-01-25 05:34:02,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:02,543 INFO L225 Difference]: With dead ends: 674 [2018-01-25 05:34:02,543 INFO L226 Difference]: Without dead ends: 671 [2018-01-25 05:34:02,544 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 406 GetRequests, 366 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=438, Invalid=1122, Unknown=0, NotChecked=0, Total=1560 [2018-01-25 05:34:02,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 671 states. [2018-01-25 05:34:02,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 671 to 155. [2018-01-25 05:34:02,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-01-25 05:34:02,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 173 transitions. [2018-01-25 05:34:02,580 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 173 transitions. Word has length 97 [2018-01-25 05:34:02,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:02,581 INFO L432 AbstractCegarLoop]: Abstraction has 155 states and 173 transitions. [2018-01-25 05:34:02,581 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-25 05:34:02,581 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 173 transitions. [2018-01-25 05:34:02,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-01-25 05:34:02,582 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:02,582 INFO L322 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:02,582 INFO L371 AbstractCegarLoop]: === Iteration 28 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:02,583 INFO L82 PathProgramCache]: Analyzing trace with hash -891985897, now seen corresponding path program 7 times [2018-01-25 05:34:02,583 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:02,584 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:02,584 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:02,584 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:02,584 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:02,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:02,595 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:02,797 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 70 proven. 164 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-01-25 05:34:02,797 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:02,833 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:02,833 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:02,833 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:02,833 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:02,833 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:02,838 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:02,838 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:34:02,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:02,853 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:02,939 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 0 proven. 108 refuted. 0 times theorem prover too weak. 186 trivial. 0 not checked. [2018-01-25 05:34:02,940 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:03,069 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 0 proven. 108 refuted. 0 times theorem prover too weak. 186 trivial. 0 not checked. [2018-01-25 05:34:03,089 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:03,090 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 52 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:03,093 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:03,093 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:34:03,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:03,125 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:03,152 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 0 proven. 108 refuted. 0 times theorem prover too weak. 186 trivial. 0 not checked. [2018-01-25 05:34:03,153 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:03,199 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 0 proven. 108 refuted. 0 times theorem prover too weak. 186 trivial. 0 not checked. [2018-01-25 05:34:03,201 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:03,201 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 8, 8, 8, 8] total 30 [2018-01-25 05:34:03,201 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:03,201 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-25 05:34:03,201 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-25 05:34:03,202 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=764, Unknown=0, NotChecked=0, Total=930 [2018-01-25 05:34:03,202 INFO L87 Difference]: Start difference. First operand 155 states and 173 transitions. Second operand 24 states. [2018-01-25 05:34:03,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:03,469 INFO L93 Difference]: Finished difference Result 210 states and 239 transitions. [2018-01-25 05:34:03,469 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-25 05:34:03,470 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 107 [2018-01-25 05:34:03,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:03,470 INFO L225 Difference]: With dead ends: 210 [2018-01-25 05:34:03,471 INFO L226 Difference]: Without dead ends: 163 [2018-01-25 05:34:03,471 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 449 GetRequests, 412 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 319 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=253, Invalid=1079, Unknown=0, NotChecked=0, Total=1332 [2018-01-25 05:34:03,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-01-25 05:34:03,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 161. [2018-01-25 05:34:03,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-01-25 05:34:03,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 179 transitions. [2018-01-25 05:34:03,499 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 179 transitions. Word has length 107 [2018-01-25 05:34:03,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:03,499 INFO L432 AbstractCegarLoop]: Abstraction has 161 states and 179 transitions. [2018-01-25 05:34:03,499 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-25 05:34:03,499 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 179 transitions. [2018-01-25 05:34:03,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-01-25 05:34:03,500 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:03,500 INFO L322 BasicCegarLoop]: trace histogram [20, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:03,500 INFO L371 AbstractCegarLoop]: === Iteration 29 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:03,500 INFO L82 PathProgramCache]: Analyzing trace with hash -878554953, now seen corresponding path program 19 times [2018-01-25 05:34:03,500 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:03,501 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:03,501 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:03,501 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:03,501 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:03,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:03,507 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:03,815 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:03,815 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:03,815 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:03,815 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:03,815 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:03,815 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:03,815 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:03,820 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:03,821 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:34:03,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:03,834 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:03,853 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:03,854 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:04,281 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:04,301 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:04,301 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 54 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:04,304 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:04,304 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:34:04,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:04,331 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:04,353 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:04,353 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:04,384 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:04,385 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:04,385 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-25 05:34:04,385 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:04,385 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-25 05:34:04,386 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-25 05:34:04,386 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=481, Invalid=1241, Unknown=0, NotChecked=0, Total=1722 [2018-01-25 05:34:04,386 INFO L87 Difference]: Start difference. First operand 161 states and 179 transitions. Second operand 22 states. [2018-01-25 05:34:05,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:05,184 INFO L93 Difference]: Finished difference Result 757 states and 860 transitions. [2018-01-25 05:34:05,184 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-25 05:34:05,184 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 102 [2018-01-25 05:34:05,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:05,187 INFO L225 Difference]: With dead ends: 757 [2018-01-25 05:34:05,187 INFO L226 Difference]: Without dead ends: 754 [2018-01-25 05:34:05,188 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 427 GetRequests, 385 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=481, Invalid=1241, Unknown=0, NotChecked=0, Total=1722 [2018-01-25 05:34:05,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 754 states. [2018-01-25 05:34:05,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 754 to 166. [2018-01-25 05:34:05,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-01-25 05:34:05,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 185 transitions. [2018-01-25 05:34:05,229 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 185 transitions. Word has length 102 [2018-01-25 05:34:05,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:05,230 INFO L432 AbstractCegarLoop]: Abstraction has 166 states and 185 transitions. [2018-01-25 05:34:05,230 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-25 05:34:05,230 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 185 transitions. [2018-01-25 05:34:05,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-01-25 05:34:05,231 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:05,231 INFO L322 BasicCegarLoop]: trace histogram [21, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:05,231 INFO L371 AbstractCegarLoop]: === Iteration 30 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:05,231 INFO L82 PathProgramCache]: Analyzing trace with hash -399157988, now seen corresponding path program 20 times [2018-01-25 05:34:05,231 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:05,232 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:05,232 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:05,232 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:05,232 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:05,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:05,241 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:05,713 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:05,713 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:05,713 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:05,713 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:05,714 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:05,714 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:05,714 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:05,719 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:34:05,719 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:05,722 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:05,734 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:05,735 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:05,737 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:05,755 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:05,755 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:06,222 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:06,241 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:06,242 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 56 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:06,244 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:34:06,245 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:06,250 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:06,265 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:06,275 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:06,278 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:06,297 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:06,298 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:06,327 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:06,328 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:06,329 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-25 05:34:06,329 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:06,329 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-25 05:34:06,329 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-25 05:34:06,330 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=526, Invalid=1366, Unknown=0, NotChecked=0, Total=1892 [2018-01-25 05:34:06,330 INFO L87 Difference]: Start difference. First operand 166 states and 185 transitions. Second operand 23 states. [2018-01-25 05:34:07,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:07,114 INFO L93 Difference]: Finished difference Result 811 states and 922 transitions. [2018-01-25 05:34:07,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-25 05:34:07,114 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 107 [2018-01-25 05:34:07,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:07,117 INFO L225 Difference]: With dead ends: 811 [2018-01-25 05:34:07,117 INFO L226 Difference]: Without dead ends: 808 [2018-01-25 05:34:07,118 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 448 GetRequests, 404 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=526, Invalid=1366, Unknown=0, NotChecked=0, Total=1892 [2018-01-25 05:34:07,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 808 states. [2018-01-25 05:34:07,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 808 to 171. [2018-01-25 05:34:07,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-01-25 05:34:07,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 191 transitions. [2018-01-25 05:34:07,146 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 191 transitions. Word has length 107 [2018-01-25 05:34:07,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:07,146 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 191 transitions. [2018-01-25 05:34:07,146 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-25 05:34:07,146 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 191 transitions. [2018-01-25 05:34:07,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-01-25 05:34:07,147 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:07,147 INFO L322 BasicCegarLoop]: trace histogram [22, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:07,147 INFO L371 AbstractCegarLoop]: === Iteration 31 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:07,147 INFO L82 PathProgramCache]: Analyzing trace with hash 792610775, now seen corresponding path program 21 times [2018-01-25 05:34:07,147 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:07,148 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:07,148 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:07,148 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:07,148 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:07,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:07,154 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:07,786 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:07,786 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:07,786 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:07,786 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:07,786 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:07,786 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:07,786 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:07,793 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:34:07,793 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:34:07,797 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,802 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,845 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,854 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,858 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,859 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,861 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,863 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,865 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,867 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,870 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,873 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,876 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,879 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,883 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,887 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,891 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,896 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,901 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,908 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,916 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,922 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,924 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:07,927 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:07,961 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:07,961 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:08,734 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:08,755 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:08,755 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 58 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:08,758 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:34:08,758 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:34:08,762 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:08,764 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:08,768 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:08,772 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:08,778 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:08,785 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:08,793 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:08,802 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:08,813 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:08,829 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:08,848 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:08,868 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:08,892 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:08,921 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:08,962 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:09,008 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:09,053 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:09,105 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:09,166 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:09,249 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:09,345 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:09,438 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:09,451 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:09,455 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:09,474 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:09,475 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:09,497 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:09,499 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:09,499 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-25 05:34:09,499 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:09,499 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-25 05:34:09,500 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-25 05:34:09,500 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-01-25 05:34:09,500 INFO L87 Difference]: Start difference. First operand 171 states and 191 transitions. Second operand 24 states. [2018-01-25 05:34:10,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:10,398 INFO L93 Difference]: Finished difference Result 865 states and 984 transitions. [2018-01-25 05:34:10,398 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-25 05:34:10,398 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 112 [2018-01-25 05:34:10,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:10,401 INFO L225 Difference]: With dead ends: 865 [2018-01-25 05:34:10,401 INFO L226 Difference]: Without dead ends: 862 [2018-01-25 05:34:10,402 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 469 GetRequests, 423 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-01-25 05:34:10,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 862 states. [2018-01-25 05:34:10,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 862 to 176. [2018-01-25 05:34:10,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-25 05:34:10,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 197 transitions. [2018-01-25 05:34:10,451 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 197 transitions. Word has length 112 [2018-01-25 05:34:10,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:10,451 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 197 transitions. [2018-01-25 05:34:10,451 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-25 05:34:10,451 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 197 transitions. [2018-01-25 05:34:10,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-01-25 05:34:10,453 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:10,453 INFO L322 BasicCegarLoop]: trace histogram [9, 9, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:10,453 INFO L371 AbstractCegarLoop]: === Iteration 32 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:10,453 INFO L82 PathProgramCache]: Analyzing trace with hash -600860340, now seen corresponding path program 8 times [2018-01-25 05:34:10,453 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:10,454 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:10,454 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:10,454 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:10,454 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:10,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:10,463 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:10,679 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 102 proven. 209 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-01-25 05:34:10,679 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:10,679 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:10,679 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:10,679 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:10,679 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:10,679 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:10,684 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:34:10,684 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:10,688 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:10,697 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:10,699 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:10,701 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:10,772 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 0 proven. 147 refuted. 0 times theorem prover too weak. 248 trivial. 0 not checked. [2018-01-25 05:34:10,773 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:10,909 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 0 proven. 147 refuted. 0 times theorem prover too weak. 248 trivial. 0 not checked. [2018-01-25 05:34:10,929 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:10,930 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 60 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:10,932 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:34:10,933 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:10,938 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:10,954 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:10,967 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:10,971 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:11,020 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 140 proven. 171 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-01-25 05:34:11,020 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:11,655 INFO L134 CoverageAnalysis]: Checked inductivity of 395 backedges. 126 proven. 185 refuted. 0 times theorem prover too weak. 84 trivial. 0 not checked. [2018-01-25 05:34:11,657 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:11,657 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 9, 9, 19, 19] total 52 [2018-01-25 05:34:11,657 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:11,657 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-25 05:34:11,657 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-25 05:34:11,658 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=550, Invalid=2206, Unknown=0, NotChecked=0, Total=2756 [2018-01-25 05:34:11,658 INFO L87 Difference]: Start difference. First operand 176 states and 197 transitions. Second operand 27 states. [2018-01-25 05:34:11,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:11,976 INFO L93 Difference]: Finished difference Result 237 states and 270 transitions. [2018-01-25 05:34:11,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-25 05:34:11,976 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 122 [2018-01-25 05:34:11,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:11,977 INFO L225 Difference]: With dead ends: 237 [2018-01-25 05:34:11,977 INFO L226 Difference]: Without dead ends: 184 [2018-01-25 05:34:11,978 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 512 GetRequests, 453 SyntacticMatches, 1 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 951 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=788, Invalid=2752, Unknown=0, NotChecked=0, Total=3540 [2018-01-25 05:34:11,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-25 05:34:12,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 182. [2018-01-25 05:34:12,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-25 05:34:12,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 203 transitions. [2018-01-25 05:34:12,006 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 203 transitions. Word has length 122 [2018-01-25 05:34:12,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:12,006 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 203 transitions. [2018-01-25 05:34:12,007 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-25 05:34:12,007 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 203 transitions. [2018-01-25 05:34:12,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-01-25 05:34:12,007 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:12,007 INFO L322 BasicCegarLoop]: trace histogram [23, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:12,007 INFO L371 AbstractCegarLoop]: === Iteration 33 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:12,008 INFO L82 PathProgramCache]: Analyzing trace with hash 1092014588, now seen corresponding path program 22 times [2018-01-25 05:34:12,008 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:12,008 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:12,008 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:12,008 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:12,008 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:12,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:12,014 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:12,459 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:12,460 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:12,460 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:12,460 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:12,460 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:12,460 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:12,460 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:12,467 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:34:12,467 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:34:12,495 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:12,498 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:12,533 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:12,533 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:13,129 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:13,149 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:13,166 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 62 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:13,169 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:34:13,169 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:34:13,289 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:13,293 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:13,316 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:13,316 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:13,340 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:13,342 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:13,342 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-25 05:34:13,342 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:13,343 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-25 05:34:13,343 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-25 05:34:13,343 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=622, Invalid=1634, Unknown=0, NotChecked=0, Total=2256 [2018-01-25 05:34:13,343 INFO L87 Difference]: Start difference. First operand 182 states and 203 transitions. Second operand 25 states. [2018-01-25 05:34:14,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:14,320 INFO L93 Difference]: Finished difference Result 960 states and 1094 transitions. [2018-01-25 05:34:14,321 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-25 05:34:14,321 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 117 [2018-01-25 05:34:14,321 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:14,323 INFO L225 Difference]: With dead ends: 960 [2018-01-25 05:34:14,324 INFO L226 Difference]: Without dead ends: 957 [2018-01-25 05:34:14,324 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 490 GetRequests, 442 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=622, Invalid=1634, Unknown=0, NotChecked=0, Total=2256 [2018-01-25 05:34:14,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 957 states. [2018-01-25 05:34:14,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 957 to 187. [2018-01-25 05:34:14,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-01-25 05:34:14,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 209 transitions. [2018-01-25 05:34:14,356 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 209 transitions. Word has length 117 [2018-01-25 05:34:14,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:14,356 INFO L432 AbstractCegarLoop]: Abstraction has 187 states and 209 transitions. [2018-01-25 05:34:14,356 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-25 05:34:14,356 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 209 transitions. [2018-01-25 05:34:14,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-01-25 05:34:14,357 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:14,357 INFO L322 BasicCegarLoop]: trace histogram [24, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:14,357 INFO L371 AbstractCegarLoop]: === Iteration 34 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:14,357 INFO L82 PathProgramCache]: Analyzing trace with hash 1378342647, now seen corresponding path program 23 times [2018-01-25 05:34:14,357 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:14,358 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:14,358 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:14,358 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:14,358 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:14,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:14,364 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:14,740 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:14,740 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:14,740 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:14,740 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:14,740 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:14,740 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:14,740 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:14,747 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:34:14,747 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:14,751 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,752 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,760 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,761 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,762 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,767 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,771 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,776 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,778 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,784 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,786 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,792 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,799 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,803 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,807 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,813 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,818 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,825 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,832 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,840 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,849 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,856 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,863 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,871 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:14,872 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:14,874 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:14,907 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:14,907 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:15,519 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:15,539 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:15,539 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 64 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:15,542 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:34:15,542 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:15,546 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,548 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,551 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,556 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,562 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,569 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,576 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,585 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,596 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,613 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,635 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,656 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,679 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,705 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,746 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,796 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,838 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,886 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:15,941 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,030 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,141 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,218 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,304 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,397 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,420 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:16,425 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:16,455 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:16,455 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:16,487 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:16,488 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:16,488 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-25 05:34:16,489 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:16,489 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-25 05:34:16,489 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-25 05:34:16,490 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=673, Invalid=1777, Unknown=0, NotChecked=0, Total=2450 [2018-01-25 05:34:16,490 INFO L87 Difference]: Start difference. First operand 187 states and 209 transitions. Second operand 26 states. [2018-01-25 05:34:17,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:17,579 INFO L93 Difference]: Finished difference Result 1020 states and 1163 transitions. [2018-01-25 05:34:17,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-25 05:34:17,580 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 122 [2018-01-25 05:34:17,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:17,584 INFO L225 Difference]: With dead ends: 1020 [2018-01-25 05:34:17,584 INFO L226 Difference]: Without dead ends: 1017 [2018-01-25 05:34:17,585 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 511 GetRequests, 461 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=673, Invalid=1777, Unknown=0, NotChecked=0, Total=2450 [2018-01-25 05:34:17,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1017 states. [2018-01-25 05:34:17,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1017 to 192. [2018-01-25 05:34:17,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-01-25 05:34:17,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 215 transitions. [2018-01-25 05:34:17,619 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 215 transitions. Word has length 122 [2018-01-25 05:34:17,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:17,620 INFO L432 AbstractCegarLoop]: Abstraction has 192 states and 215 transitions. [2018-01-25 05:34:17,620 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-25 05:34:17,620 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 215 transitions. [2018-01-25 05:34:17,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-01-25 05:34:17,620 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:17,621 INFO L322 BasicCegarLoop]: trace histogram [25, 24, 24, 24, 24, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:17,621 INFO L371 AbstractCegarLoop]: === Iteration 35 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:17,621 INFO L82 PathProgramCache]: Analyzing trace with hash -1016482084, now seen corresponding path program 24 times [2018-01-25 05:34:17,621 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:17,621 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:17,621 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:17,622 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:17,622 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:17,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:17,629 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:18,129 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:18,129 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:18,130 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:18,130 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:18,130 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:18,130 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:18,130 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:18,141 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:34:18,141 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:34:18,145 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,146 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,147 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,147 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,148 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,149 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,172 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,173 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,175 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,176 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,177 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,179 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,180 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,182 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,184 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,186 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,190 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,192 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,196 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,199 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,203 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,208 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,213 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,217 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,221 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,222 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:18,224 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:18,248 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:18,248 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:18,912 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:18,933 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:18,933 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 66 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:18,936 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:34:18,936 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:34:18,941 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,943 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,949 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,955 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,960 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,966 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,973 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,982 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,993 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,007 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,028 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,048 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,073 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,101 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,128 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,159 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,195 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,241 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,295 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,355 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,446 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,640 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,862 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:20,114 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:20,341 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:20,356 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:20,361 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:20,390 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:20,391 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:20,421 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:20,423 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:20,423 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-25 05:34:20,423 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:20,423 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-25 05:34:20,423 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-25 05:34:20,424 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=726, Invalid=1926, Unknown=0, NotChecked=0, Total=2652 [2018-01-25 05:34:20,424 INFO L87 Difference]: Start difference. First operand 192 states and 215 transitions. Second operand 27 states. [2018-01-25 05:34:21,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:21,983 INFO L93 Difference]: Finished difference Result 1080 states and 1232 transitions. [2018-01-25 05:34:21,983 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-25 05:34:21,983 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 127 [2018-01-25 05:34:21,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:21,987 INFO L225 Difference]: With dead ends: 1080 [2018-01-25 05:34:21,987 INFO L226 Difference]: Without dead ends: 1077 [2018-01-25 05:34:21,987 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 532 GetRequests, 480 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=726, Invalid=1926, Unknown=0, NotChecked=0, Total=2652 [2018-01-25 05:34:21,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1077 states. [2018-01-25 05:34:22,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1077 to 197. [2018-01-25 05:34:22,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-01-25 05:34:22,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 221 transitions. [2018-01-25 05:34:22,026 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 221 transitions. Word has length 127 [2018-01-25 05:34:22,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:22,026 INFO L432 AbstractCegarLoop]: Abstraction has 197 states and 221 transitions. [2018-01-25 05:34:22,026 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-25 05:34:22,026 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 221 transitions. [2018-01-25 05:34:22,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-01-25 05:34:22,027 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:22,027 INFO L322 BasicCegarLoop]: trace histogram [10, 10, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:22,027 INFO L371 AbstractCegarLoop]: === Iteration 36 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:22,027 INFO L82 PathProgramCache]: Analyzing trace with hash 795448555, now seen corresponding path program 9 times [2018-01-25 05:34:22,027 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:22,028 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:22,028 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:22,028 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:22,028 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:22,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:22,035 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:22,406 INFO L134 CoverageAnalysis]: Checked inductivity of 511 backedges. 140 proven. 259 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-01-25 05:34:22,407 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:22,407 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:22,407 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:22,407 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:22,407 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:22,407 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:22,413 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:34:22,414 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:34:22,418 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,420 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,423 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,435 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,438 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,442 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,447 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,451 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,457 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,458 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:22,460 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:22,560 INFO L134 CoverageAnalysis]: Checked inductivity of 511 backedges. 0 proven. 192 refuted. 0 times theorem prover too weak. 319 trivial. 0 not checked. [2018-01-25 05:34:22,561 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:22,734 INFO L134 CoverageAnalysis]: Checked inductivity of 511 backedges. 0 proven. 192 refuted. 0 times theorem prover too weak. 319 trivial. 0 not checked. [2018-01-25 05:34:22,754 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:22,754 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 68 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:22,757 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:34:22,757 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:34:22,762 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,765 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,772 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,781 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,794 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,812 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,833 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,873 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,920 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:22,935 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:22,940 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:22,990 INFO L134 CoverageAnalysis]: Checked inductivity of 511 backedges. 0 proven. 192 refuted. 0 times theorem prover too weak. 319 trivial. 0 not checked. [2018-01-25 05:34:22,990 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:23,016 INFO L134 CoverageAnalysis]: Checked inductivity of 511 backedges. 0 proven. 192 refuted. 0 times theorem prover too weak. 319 trivial. 0 not checked. [2018-01-25 05:34:23,018 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:23,018 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 10, 10, 10, 10] total 38 [2018-01-25 05:34:23,018 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:23,018 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-25 05:34:23,019 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-25 05:34:23,019 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=248, Invalid=1234, Unknown=0, NotChecked=0, Total=1482 [2018-01-25 05:34:23,019 INFO L87 Difference]: Start difference. First operand 197 states and 221 transitions. Second operand 30 states. [2018-01-25 05:34:23,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:23,442 INFO L93 Difference]: Finished difference Result 264 states and 301 transitions. [2018-01-25 05:34:23,483 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-25 05:34:23,483 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 137 [2018-01-25 05:34:23,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:23,484 INFO L225 Difference]: With dead ends: 264 [2018-01-25 05:34:23,484 INFO L226 Difference]: Without dead ends: 205 [2018-01-25 05:34:23,484 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 575 GetRequests, 528 SyntacticMatches, 2 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 517 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=388, Invalid=1774, Unknown=0, NotChecked=0, Total=2162 [2018-01-25 05:34:23,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-01-25 05:34:23,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 203. [2018-01-25 05:34:23,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-01-25 05:34:23,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 227 transitions. [2018-01-25 05:34:23,517 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 227 transitions. Word has length 137 [2018-01-25 05:34:23,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:23,518 INFO L432 AbstractCegarLoop]: Abstraction has 203 states and 227 transitions. [2018-01-25 05:34:23,518 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-25 05:34:23,518 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 227 transitions. [2018-01-25 05:34:23,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-01-25 05:34:23,519 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:23,519 INFO L322 BasicCegarLoop]: trace histogram [26, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:23,519 INFO L371 AbstractCegarLoop]: === Iteration 37 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:23,519 INFO L82 PathProgramCache]: Analyzing trace with hash 37813783, now seen corresponding path program 25 times [2018-01-25 05:34:23,519 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:23,520 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:23,520 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:23,520 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:23,520 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:23,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:23,528 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:24,040 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:24,040 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:24,040 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:24,040 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:24,041 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:24,041 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:24,041 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:24,045 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:24,046 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:34:24,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:24,061 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:24,095 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:24,095 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:24,821 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:24,841 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:24,841 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 70 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:24,844 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:24,844 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:34:24,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:24,881 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:24,922 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:24,922 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:24,977 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:24,979 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:24,979 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-25 05:34:24,979 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:24,979 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-25 05:34:24,980 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-25 05:34:24,980 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=781, Invalid=2081, Unknown=0, NotChecked=0, Total=2862 [2018-01-25 05:34:24,980 INFO L87 Difference]: Start difference. First operand 203 states and 227 transitions. Second operand 28 states. [2018-01-25 05:34:26,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:26,538 INFO L93 Difference]: Finished difference Result 1187 states and 1356 transitions. [2018-01-25 05:34:26,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-25 05:34:26,538 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 132 [2018-01-25 05:34:26,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:26,543 INFO L225 Difference]: With dead ends: 1187 [2018-01-25 05:34:26,543 INFO L226 Difference]: Without dead ends: 1184 [2018-01-25 05:34:26,544 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 553 GetRequests, 499 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=781, Invalid=2081, Unknown=0, NotChecked=0, Total=2862 [2018-01-25 05:34:26,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1184 states. [2018-01-25 05:34:26,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1184 to 208. [2018-01-25 05:34:26,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-01-25 05:34:26,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 233 transitions. [2018-01-25 05:34:26,599 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 233 transitions. Word has length 132 [2018-01-25 05:34:26,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:26,599 INFO L432 AbstractCegarLoop]: Abstraction has 208 states and 233 transitions. [2018-01-25 05:34:26,600 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-25 05:34:26,600 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 233 transitions. [2018-01-25 05:34:26,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-01-25 05:34:26,601 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:26,601 INFO L322 BasicCegarLoop]: trace histogram [27, 26, 26, 26, 26, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:26,601 INFO L371 AbstractCegarLoop]: === Iteration 38 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:26,601 INFO L82 PathProgramCache]: Analyzing trace with hash -24378436, now seen corresponding path program 26 times [2018-01-25 05:34:26,601 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:26,602 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:26,602 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:26,602 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:26,602 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:26,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:26,610 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:27,043 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 0 proven. 1677 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:27,043 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:27,044 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:27,044 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:27,044 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:27,044 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:27,044 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:27,048 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:34:27,049 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:27,052 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:27,063 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:27,064 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:27,066 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:27,114 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 0 proven. 1677 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:27,115 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:27,880 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 0 proven. 1677 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:27,900 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:27,900 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 72 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:27,903 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:34:27,903 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:27,907 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:27,924 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:27,937 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:27,941 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:27,967 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 0 proven. 1677 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:27,968 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:28,000 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 0 proven. 1677 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:28,001 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:28,001 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-25 05:34:28,001 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:28,002 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-25 05:34:28,002 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-25 05:34:28,002 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=838, Invalid=2242, Unknown=0, NotChecked=0, Total=3080 [2018-01-25 05:34:28,002 INFO L87 Difference]: Start difference. First operand 208 states and 233 transitions. Second operand 29 states. [2018-01-25 05:34:29,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:29,565 INFO L93 Difference]: Finished difference Result 1253 states and 1432 transitions. [2018-01-25 05:34:29,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-25 05:34:29,565 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 137 [2018-01-25 05:34:29,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:29,569 INFO L225 Difference]: With dead ends: 1253 [2018-01-25 05:34:29,569 INFO L226 Difference]: Without dead ends: 1250 [2018-01-25 05:34:29,569 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 574 GetRequests, 518 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=838, Invalid=2242, Unknown=0, NotChecked=0, Total=3080 [2018-01-25 05:34:29,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1250 states. [2018-01-25 05:34:29,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1250 to 213. [2018-01-25 05:34:29,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213 states. [2018-01-25 05:34:29,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 239 transitions. [2018-01-25 05:34:29,616 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 239 transitions. Word has length 137 [2018-01-25 05:34:29,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:29,616 INFO L432 AbstractCegarLoop]: Abstraction has 213 states and 239 transitions. [2018-01-25 05:34:29,616 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-25 05:34:29,616 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 239 transitions. [2018-01-25 05:34:29,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-01-25 05:34:29,617 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:29,617 INFO L322 BasicCegarLoop]: trace histogram [28, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:29,617 INFO L371 AbstractCegarLoop]: === Iteration 39 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:29,617 INFO L82 PathProgramCache]: Analyzing trace with hash -1695826633, now seen corresponding path program 27 times [2018-01-25 05:34:29,617 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:29,618 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:29,618 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:29,618 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:29,618 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:29,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:29,626 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. Received shutdown request... [2018-01-25 05:34:29,923 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-25 05:34:29,926 WARN L187 ceAbstractionStarter]: Timeout [2018-01-25 05:34:29,926 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 25.01 05:34:29 BoogieIcfgContainer [2018-01-25 05:34:29,926 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-25 05:34:29,927 INFO L168 Benchmark]: Toolchain (without parser) took 47958.60 ms. Allocated memory was 304.6 MB in the beginning and 750.8 MB in the end (delta: 446.2 MB). Free memory was 265.7 MB in the beginning and 367.4 MB in the end (delta: -101.7 MB). Peak memory consumption was 344.4 MB. Max. memory is 5.3 GB. [2018-01-25 05:34:29,927 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 304.6 MB. Free memory is still 270.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-25 05:34:29,928 INFO L168 Benchmark]: CACSL2BoogieTranslator took 159.98 ms. Allocated memory is still 304.6 MB. Free memory was 264.7 MB in the beginning and 256.7 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. [2018-01-25 05:34:29,928 INFO L168 Benchmark]: Boogie Preprocessor took 25.83 ms. Allocated memory is still 304.6 MB. Free memory was 256.7 MB in the beginning and 255.7 MB in the end (delta: 996.3 kB). Peak memory consumption was 996.3 kB. Max. memory is 5.3 GB. [2018-01-25 05:34:29,928 INFO L168 Benchmark]: RCFGBuilder took 175.95 ms. Allocated memory is still 304.6 MB. Free memory was 255.7 MB in the beginning and 244.0 MB in the end (delta: 11.7 MB). Peak memory consumption was 11.7 MB. Max. memory is 5.3 GB. [2018-01-25 05:34:29,928 INFO L168 Benchmark]: TraceAbstraction took 47590.14 ms. Allocated memory was 304.6 MB in the beginning and 750.8 MB in the end (delta: 446.2 MB). Free memory was 244.0 MB in the beginning and 367.4 MB in the end (delta: -123.4 MB). Peak memory consumption was 322.8 MB. Max. memory is 5.3 GB. [2018-01-25 05:34:29,930 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 304.6 MB. Free memory is still 270.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 159.98 ms. Allocated memory is still 304.6 MB. Free memory was 264.7 MB in the beginning and 256.7 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 25.83 ms. Allocated memory is still 304.6 MB. Free memory was 256.7 MB in the beginning and 255.7 MB in the end (delta: 996.3 kB). Peak memory consumption was 996.3 kB. Max. memory is 5.3 GB. * RCFGBuilder took 175.95 ms. Allocated memory is still 304.6 MB. Free memory was 255.7 MB in the beginning and 244.0 MB in the end (delta: 11.7 MB). Peak memory consumption was 11.7 MB. Max. memory is 5.3 GB. * TraceAbstraction took 47590.14 ms. Allocated memory was 304.6 MB in the beginning and 750.8 MB in the end (delta: 446.2 MB). Free memory was 244.0 MB in the beginning and 367.4 MB in the end (delta: -123.4 MB). Peak memory consumption was 322.8 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 10 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 0 LocStat_NO_SUPPORTING_DISEQUALITIES : 4 LocStat_NO_DISJUNCTIONS : -20 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 15 TransStat_MAX_WEQGRAPH_SIZE : 3 TransStat_MAX_SIZEOF_WEQEDGELABEL : 2 TransStat_NO_SUPPORTING_EQUALITIES : 5 TransStat_NO_SUPPORTING_DISEQUALITIES : 1 TransStat_NO_DISJUNCTIONS : 16 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 5.375490 RENAME_VARIABLES(MILLISECONDS) : 0.490195 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 5.299996 PROJECTAWAY(MILLISECONDS) : 1.952381 ADD_WEAK_EQUALITY(MILLISECONDS) : 2.476554 DISJOIN(MILLISECONDS) : 0.220508 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.530968 ADD_EQUALITY(MILLISECONDS) : 3.198547 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.539060 #CONJOIN_DISJUNCTIVE : 36 #RENAME_VARIABLES : 82 #UNFREEZE : 0 #CONJOIN : 48 #PROJECTAWAY : 57 #ADD_WEAK_EQUALITY : 1 #DISJOIN : 10 #RENAME_VARIABLES_DISJUNCTIVE : 77 #ADD_EQUALITY : 5 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 1 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 14 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 9 LocStat_NO_SUPPORTING_DISEQUALITIES : 4 LocStat_NO_DISJUNCTIONS : -28 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 19 TransStat_MAX_WEQGRAPH_SIZE : 3 TransStat_MAX_SIZEOF_WEQEDGELABEL : 2 TransStat_NO_SUPPORTING_EQUALITIES : 7 TransStat_NO_SUPPORTING_DISEQUALITIES : 1 TransStat_NO_DISJUNCTIONS : 20 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.834213 RENAME_VARIABLES(MILLISECONDS) : 0.350789 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.351957 PROJECTAWAY(MILLISECONDS) : 0.074471 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.516848 DISJOIN(MILLISECONDS) : 0.181718 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.383678 ADD_EQUALITY(MILLISECONDS) : 0.038121 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.241145 #CONJOIN_DISJUNCTIVE : 56 #RENAME_VARIABLES : 122 #UNFREEZE : 0 #CONJOIN : 68 #PROJECTAWAY : 81 #ADD_WEAK_EQUALITY : 1 #DISJOIN : 14 #RENAME_VARIABLES_DISJUNCTIVE : 117 #ADD_EQUALITY : 7 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 1 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 21 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 11 LocStat_NO_SUPPORTING_DISEQUALITIES : 7 LocStat_NO_DISJUNCTIONS : -42 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 29 TransStat_MAX_WEQGRAPH_SIZE : 3 TransStat_MAX_SIZEOF_WEQEDGELABEL : 2 TransStat_NO_SUPPORTING_EQUALITIES : 10 TransStat_NO_SUPPORTING_DISEQUALITIES : 2 TransStat_NO_DISJUNCTIONS : 30 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.128436 RENAME_VARIABLES(MILLISECONDS) : 0.145020 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.091027 PROJECTAWAY(MILLISECONDS) : 0.133942 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.211712 DISJOIN(MILLISECONDS) : 0.153141 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.170065 ADD_EQUALITY(MILLISECONDS) : 0.044216 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.009490 #CONJOIN_DISJUNCTIVE : 121 #RENAME_VARIABLES : 295 #UNFREEZE : 0 #CONJOIN : 184 #PROJECTAWAY : 191 #ADD_WEAK_EQUALITY : 1 #DISJOIN : 26 #RENAME_VARIABLES_DISJUNCTIVE : 287 #ADD_EQUALITY : 10 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 7]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 7). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 28, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateComparison was comparing new predicate (quantifier-free) to 20 known predicates. - TimeoutResultAtElement [Line: 8]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 8). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 28, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateComparison was comparing new predicate (quantifier-free) to 20 known predicates. - TimeoutResultAtElement [Line: 13]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 13). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 28, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateComparison was comparing new predicate (quantifier-free) to 20 known predicates. - TimeoutResultAtElement [Line: 13]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 13). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 28, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateComparison was comparing new predicate (quantifier-free) to 20 known predicates. - TimeoutResultAtElement [Line: 8]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 8). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 28, while InterpolatingTraceCheckCraig was constructing Craig interpolants, while PredicateComparison was comparing new predicate (quantifier-free) to 20 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 32 locations, 5 error locations. TIMEOUT Result, 47.5s OverallTime, 39 OverallIterations, 28 TraceHistogramMax, 16.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4036 SDtfs, 2569 SDslu, 59587 SDs, 0 SdLazy, 30837 SolverSat, 230 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 9.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 11050 GetRequests, 9973 SyntacticMatches, 68 SemanticMatches, 1009 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2796 ImplicationChecksByTransitivity, 16.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=213occurred in iteration=38, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.8s AbstIntTime, 3 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.7s AutomataMinimizationTime, 38 MinimizatonAttempts, 10045 StatesRemovedByMinimization, 35 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 6.3s SatisfiabilityAnalysisTime, 20.8s InterpolantComputationTime, 7943 NumberOfCodeBlocks, 7913 NumberOfCodeBlocksAsserted, 501 NumberOfCheckSat, 13040 ConstructedInterpolants, 0 QuantifiedInterpolants, 7741836 SizeOfPredicates, 7 NumberOfNonLiveVariables, 7716 ConjunctsInSsa, 1767 ConjunctsInUnsatCore, 180 InterpolantComputations, 4 PerfectInterpolantSequences, 4895/85009 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-25_05-34-29-940.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-25_05-34-29-940.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-25_05-34-29-940.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-VPDomainBenchmark-1-2018-01-25_05-34-29-940.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-1-2018-01-25_05-34-29-940.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-VPDomainBenchmark-2-2018-01-25_05-34-29-940.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-2-2018-01-25_05-34-29-940.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_false-valid-deref_ground.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-25_05-34-29-940.csv Completed graceful shutdown