java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf -i ../../../trunk/examples/svcomp/array-examples/standard_strcpy_original_false-valid-deref.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-25 05:34:01,550 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-25 05:34:01,552 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-25 05:34:01,567 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-25 05:34:01,567 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-25 05:34:01,568 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-25 05:34:01,569 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-25 05:34:01,571 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-25 05:34:01,573 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-25 05:34:01,574 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-25 05:34:01,575 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-25 05:34:01,575 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-25 05:34:01,576 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-25 05:34:01,577 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-25 05:34:01,578 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-25 05:34:01,580 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-25 05:34:01,582 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-25 05:34:01,584 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-25 05:34:01,586 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-25 05:34:01,587 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-25 05:34:01,589 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-25 05:34:01,590 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-25 05:34:01,590 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-25 05:34:01,591 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-25 05:34:01,592 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-25 05:34:01,593 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-25 05:34:01,593 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-25 05:34:01,594 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-25 05:34:01,594 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-25 05:34:01,594 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-25 05:34:01,595 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-25 05:34:01,595 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf [2018-01-25 05:34:01,604 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-25 05:34:01,604 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-25 05:34:01,605 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-25 05:34:01,605 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-25 05:34:01,605 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-25 05:34:01,605 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-25 05:34:01,605 INFO L133 SettingsManager]: * Precise comparison operator=true [2018-01-25 05:34:01,605 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-25 05:34:01,606 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-25 05:34:01,606 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-25 05:34:01,606 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-25 05:34:01,606 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-25 05:34:01,606 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-25 05:34:01,607 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-25 05:34:01,607 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-25 05:34:01,607 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-25 05:34:01,607 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-25 05:34:01,607 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-25 05:34:01,607 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-25 05:34:01,607 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-25 05:34:01,607 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-25 05:34:01,608 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-25 05:34:01,608 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-25 05:34:01,608 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-25 05:34:01,608 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-25 05:34:01,608 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-25 05:34:01,609 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-25 05:34:01,609 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-25 05:34:01,609 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-25 05:34:01,609 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-25 05:34:01,609 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-25 05:34:01,609 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-25 05:34:01,609 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-25 05:34:01,609 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-25 05:34:01,610 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-25 05:34:01,610 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-25 05:34:01,643 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-25 05:34:01,652 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-25 05:34:01,655 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-25 05:34:01,656 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-25 05:34:01,657 INFO L276 PluginConnector]: CDTParser initialized [2018-01-25 05:34:01,657 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/standard_strcpy_original_false-valid-deref.i [2018-01-25 05:34:01,779 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-25 05:34:01,784 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-25 05:34:01,785 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-25 05:34:01,785 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-25 05:34:01,790 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-25 05:34:01,791 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.01 05:34:01" (1/1) ... [2018-01-25 05:34:01,793 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6fff9f6e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:34:01, skipping insertion in model container [2018-01-25 05:34:01,794 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.01 05:34:01" (1/1) ... [2018-01-25 05:34:01,807 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-25 05:34:01,820 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-25 05:34:01,931 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-25 05:34:01,943 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-25 05:34:01,948 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:34:01 WrapperNode [2018-01-25 05:34:01,948 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-25 05:34:01,948 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-25 05:34:01,949 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-25 05:34:01,949 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-25 05:34:01,960 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:34:01" (1/1) ... [2018-01-25 05:34:01,960 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:34:01" (1/1) ... [2018-01-25 05:34:01,966 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:34:01" (1/1) ... [2018-01-25 05:34:01,967 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:34:01" (1/1) ... [2018-01-25 05:34:01,968 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:34:01" (1/1) ... [2018-01-25 05:34:01,971 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:34:01" (1/1) ... [2018-01-25 05:34:01,972 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:34:01" (1/1) ... [2018-01-25 05:34:01,974 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-25 05:34:01,974 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-25 05:34:01,974 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-25 05:34:01,974 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-25 05:34:01,975 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:34:01" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-25 05:34:02,023 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-25 05:34:02,023 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-25 05:34:02,024 INFO L136 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-01-25 05:34:02,024 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-25 05:34:02,024 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-01-25 05:34:02,024 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-01-25 05:34:02,024 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-25 05:34:02,024 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-25 05:34:02,024 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-25 05:34:02,150 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-25 05:34:02,151 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.01 05:34:02 BoogieIcfgContainer [2018-01-25 05:34:02,151 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-25 05:34:02,152 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-25 05:34:02,152 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-25 05:34:02,154 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-25 05:34:02,155 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 25.01 05:34:01" (1/3) ... [2018-01-25 05:34:02,156 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@60ae1371 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.01 05:34:02, skipping insertion in model container [2018-01-25 05:34:02,156 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:34:01" (2/3) ... [2018-01-25 05:34:02,157 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@60ae1371 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.01 05:34:02, skipping insertion in model container [2018-01-25 05:34:02,157 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.01 05:34:02" (3/3) ... [2018-01-25 05:34:02,159 INFO L105 eAbstractionObserver]: Analyzing ICFG standard_strcpy_original_false-valid-deref.i [2018-01-25 05:34:02,165 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-25 05:34:02,170 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 6 error locations. [2018-01-25 05:34:02,210 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-25 05:34:02,211 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-25 05:34:02,211 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-25 05:34:02,211 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-25 05:34:02,211 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-25 05:34:02,212 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-25 05:34:02,212 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-25 05:34:02,212 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-25 05:34:02,213 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-25 05:34:02,229 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states. [2018-01-25 05:34:02,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-01-25 05:34:02,234 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:02,234 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:02,235 INFO L371 AbstractCegarLoop]: === Iteration 1 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:02,238 INFO L82 PathProgramCache]: Analyzing trace with hash 1734695582, now seen corresponding path program 1 times [2018-01-25 05:34:02,241 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:02,283 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:02,283 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:02,283 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:02,283 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:02,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:02,329 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:02,391 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:02,392 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 05:34:02,393 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-25 05:34:02,393 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 05:34:02,395 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-25 05:34:02,405 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-25 05:34:02,406 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-25 05:34:02,408 INFO L87 Difference]: Start difference. First operand 34 states. Second operand 3 states. [2018-01-25 05:34:02,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:02,513 INFO L93 Difference]: Finished difference Result 74 states and 90 transitions. [2018-01-25 05:34:02,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-25 05:34:02,515 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-01-25 05:34:02,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:02,522 INFO L225 Difference]: With dead ends: 74 [2018-01-25 05:34:02,522 INFO L226 Difference]: Without dead ends: 41 [2018-01-25 05:34:02,525 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-25 05:34:02,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-25 05:34:02,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 38. [2018-01-25 05:34:02,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-25 05:34:02,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 40 transitions. [2018-01-25 05:34:02,620 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 40 transitions. Word has length 7 [2018-01-25 05:34:02,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:02,620 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 40 transitions. [2018-01-25 05:34:02,620 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-25 05:34:02,621 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 40 transitions. [2018-01-25 05:34:02,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-01-25 05:34:02,621 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:02,621 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:02,622 INFO L371 AbstractCegarLoop]: === Iteration 2 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:02,622 INFO L82 PathProgramCache]: Analyzing trace with hash 337601429, now seen corresponding path program 1 times [2018-01-25 05:34:02,622 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:02,623 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:02,623 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:02,623 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:02,623 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:02,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:02,633 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:02,677 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:02,677 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:02,678 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:02,679 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 13 with the following transitions: [2018-01-25 05:34:02,681 INFO L201 CegarAbsIntRunner]: [0], [4], [8], [10], [11], [16], [18], [20], [58], [59], [60] [2018-01-25 05:34:02,730 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-25 05:34:02,731 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-25 05:34:02,981 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-25 05:34:02,983 INFO L268 AbstractInterpreter]: Visited 11 different actions 23 times. Merged at 6 different actions 12 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 3 variables. [2018-01-25 05:34:02,996 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-25 05:34:02,996 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:02,996 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:03,009 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:03,010 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:34:03,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:03,031 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:03,058 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:03,058 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:03,096 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:03,126 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:03,126 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:03,131 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:03,131 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:34:03,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:03,140 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:03,167 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:03,167 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:03,204 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:03,206 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:03,206 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3, 3, 3] total 5 [2018-01-25 05:34:03,206 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:03,207 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-25 05:34:03,208 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-25 05:34:03,208 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-25 05:34:03,208 INFO L87 Difference]: Start difference. First operand 38 states and 40 transitions. Second operand 4 states. [2018-01-25 05:34:03,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:03,292 INFO L93 Difference]: Finished difference Result 60 states and 65 transitions. [2018-01-25 05:34:03,292 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-25 05:34:03,292 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 12 [2018-01-25 05:34:03,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:03,293 INFO L225 Difference]: With dead ends: 60 [2018-01-25 05:34:03,293 INFO L226 Difference]: Without dead ends: 54 [2018-01-25 05:34:03,294 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 43 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-25 05:34:03,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-25 05:34:03,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 50. [2018-01-25 05:34:03,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-25 05:34:03,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2018-01-25 05:34:03,300 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 12 [2018-01-25 05:34:03,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:03,300 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2018-01-25 05:34:03,300 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-25 05:34:03,300 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2018-01-25 05:34:03,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-25 05:34:03,301 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:03,301 INFO L322 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:03,301 INFO L371 AbstractCegarLoop]: === Iteration 3 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:03,301 INFO L82 PathProgramCache]: Analyzing trace with hash -1746445058, now seen corresponding path program 2 times [2018-01-25 05:34:03,301 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:03,302 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:03,302 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:03,303 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:03,303 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:03,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:03,309 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:03,379 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:03,379 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:03,380 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:03,380 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:03,380 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:03,380 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:03,380 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:03,389 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:34:03,389 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:03,395 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:03,406 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:03,407 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:03,409 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:03,416 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:03,417 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:03,562 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:03,583 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:03,583 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:03,589 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:34:03,589 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:03,594 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:03,597 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:03,601 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:03,605 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:03,612 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:03,612 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:03,627 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:03,629 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:03,629 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 7 [2018-01-25 05:34:03,629 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:03,630 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-25 05:34:03,630 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-25 05:34:03,630 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-25 05:34:03,630 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 5 states. [2018-01-25 05:34:03,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:03,729 INFO L93 Difference]: Finished difference Result 73 states and 80 transitions. [2018-01-25 05:34:03,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-25 05:34:03,729 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-25 05:34:03,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:03,730 INFO L225 Difference]: With dead ends: 73 [2018-01-25 05:34:03,731 INFO L226 Difference]: Without dead ends: 67 [2018-01-25 05:34:03,731 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 62 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-25 05:34:03,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-01-25 05:34:03,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 62. [2018-01-25 05:34:03,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-01-25 05:34:03,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 68 transitions. [2018-01-25 05:34:03,737 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 68 transitions. Word has length 17 [2018-01-25 05:34:03,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:03,738 INFO L432 AbstractCegarLoop]: Abstraction has 62 states and 68 transitions. [2018-01-25 05:34:03,738 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-25 05:34:03,738 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 68 transitions. [2018-01-25 05:34:03,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-25 05:34:03,739 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:03,739 INFO L322 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:03,739 INFO L371 AbstractCegarLoop]: === Iteration 4 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:03,739 INFO L82 PathProgramCache]: Analyzing trace with hash -228598475, now seen corresponding path program 3 times [2018-01-25 05:34:03,739 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:03,740 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:03,740 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:03,740 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:03,740 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:03,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:03,747 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:03,832 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:03,832 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:03,832 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:03,832 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:03,833 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:03,833 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:03,833 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:03,840 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:34:03,840 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:34:03,844 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:03,846 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:03,847 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:03,850 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:03,850 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:03,852 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:03,860 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:03,860 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:03,946 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:03,979 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:03,979 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:03,984 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:34:03,984 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:34:03,987 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:03,988 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:03,992 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:03,997 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:04,000 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:04,002 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:04,014 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:04,015 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:04,032 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:04,034 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:04,034 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-25 05:34:04,034 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:04,034 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-25 05:34:04,034 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-25 05:34:04,034 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-25 05:34:04,035 INFO L87 Difference]: Start difference. First operand 62 states and 68 transitions. Second operand 6 states. [2018-01-25 05:34:04,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:04,171 INFO L93 Difference]: Finished difference Result 86 states and 95 transitions. [2018-01-25 05:34:04,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-25 05:34:04,171 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2018-01-25 05:34:04,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:04,172 INFO L225 Difference]: With dead ends: 86 [2018-01-25 05:34:04,172 INFO L226 Difference]: Without dead ends: 80 [2018-01-25 05:34:04,173 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-25 05:34:04,173 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-01-25 05:34:04,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 74. [2018-01-25 05:34:04,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-01-25 05:34:04,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 82 transitions. [2018-01-25 05:34:04,182 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 82 transitions. Word has length 22 [2018-01-25 05:34:04,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:04,182 INFO L432 AbstractCegarLoop]: Abstraction has 74 states and 82 transitions. [2018-01-25 05:34:04,182 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-25 05:34:04,183 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 82 transitions. [2018-01-25 05:34:04,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-25 05:34:04,184 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:04,184 INFO L322 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:04,184 INFO L371 AbstractCegarLoop]: === Iteration 5 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:04,184 INFO L82 PathProgramCache]: Analyzing trace with hash 756148062, now seen corresponding path program 4 times [2018-01-25 05:34:04,184 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:04,185 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:04,186 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:04,186 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:04,186 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:04,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:04,195 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:04,260 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:04,261 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:04,261 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:04,261 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:04,261 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:04,261 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:04,261 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:04,266 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:34:04,267 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:34:04,275 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:04,276 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:04,284 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:04,284 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:04,352 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:04,373 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:04,374 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:04,378 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:34:04,378 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:34:04,393 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:04,395 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:04,403 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:04,403 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:04,411 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:04,413 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:04,413 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-25 05:34:04,413 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:04,413 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-25 05:34:04,413 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-25 05:34:04,413 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-01-25 05:34:04,413 INFO L87 Difference]: Start difference. First operand 74 states and 82 transitions. Second operand 7 states. [2018-01-25 05:34:04,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:04,564 INFO L93 Difference]: Finished difference Result 99 states and 110 transitions. [2018-01-25 05:34:04,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-25 05:34:04,564 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-01-25 05:34:04,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:04,565 INFO L225 Difference]: With dead ends: 99 [2018-01-25 05:34:04,565 INFO L226 Difference]: Without dead ends: 93 [2018-01-25 05:34:04,566 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-01-25 05:34:04,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-01-25 05:34:04,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 86. [2018-01-25 05:34:04,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-01-25 05:34:04,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 96 transitions. [2018-01-25 05:34:04,574 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 96 transitions. Word has length 27 [2018-01-25 05:34:04,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:04,574 INFO L432 AbstractCegarLoop]: Abstraction has 86 states and 96 transitions. [2018-01-25 05:34:04,574 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-25 05:34:04,574 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 96 transitions. [2018-01-25 05:34:04,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-25 05:34:04,575 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:04,575 INFO L322 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:04,575 INFO L371 AbstractCegarLoop]: === Iteration 6 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:04,576 INFO L82 PathProgramCache]: Analyzing trace with hash 671928021, now seen corresponding path program 5 times [2018-01-25 05:34:04,576 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:04,576 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:04,576 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:04,577 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:04,577 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:04,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:04,583 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:04,665 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:04,666 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:04,666 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:04,666 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:04,666 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:04,666 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:04,666 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:04,673 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:34:04,673 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:04,678 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:04,680 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:04,683 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:04,685 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:04,687 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:04,689 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:04,690 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:04,692 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:04,715 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:04,715 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:04,842 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:04,862 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:04,862 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:04,865 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:34:04,865 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:04,869 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:04,871 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:04,875 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:04,880 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:04,886 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:04,898 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:04,904 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:04,907 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:04,920 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:04,920 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:04,933 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:04,938 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:04,938 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-25 05:34:04,938 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:04,939 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-25 05:34:04,939 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-25 05:34:04,939 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-01-25 05:34:04,940 INFO L87 Difference]: Start difference. First operand 86 states and 96 transitions. Second operand 8 states. [2018-01-25 05:34:05,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:05,178 INFO L93 Difference]: Finished difference Result 112 states and 125 transitions. [2018-01-25 05:34:05,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-25 05:34:05,179 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 32 [2018-01-25 05:34:05,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:05,180 INFO L225 Difference]: With dead ends: 112 [2018-01-25 05:34:05,181 INFO L226 Difference]: Without dead ends: 106 [2018-01-25 05:34:05,181 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 119 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-01-25 05:34:05,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-01-25 05:34:05,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 98. [2018-01-25 05:34:05,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-01-25 05:34:05,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 110 transitions. [2018-01-25 05:34:05,192 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 110 transitions. Word has length 32 [2018-01-25 05:34:05,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:05,192 INFO L432 AbstractCegarLoop]: Abstraction has 98 states and 110 transitions. [2018-01-25 05:34:05,193 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-25 05:34:05,193 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 110 transitions. [2018-01-25 05:34:05,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-25 05:34:05,194 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:05,194 INFO L322 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:05,194 INFO L371 AbstractCegarLoop]: === Iteration 7 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:05,195 INFO L82 PathProgramCache]: Analyzing trace with hash -203753026, now seen corresponding path program 6 times [2018-01-25 05:34:05,195 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:05,196 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:05,196 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:05,196 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:05,196 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:05,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:05,206 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:05,308 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:05,308 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:05,308 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:05,309 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:05,309 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:05,309 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:05,309 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:05,319 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:34:05,319 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:34:05,323 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:05,326 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:05,327 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:05,328 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:05,329 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:05,331 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:05,332 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:05,336 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:05,339 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:05,350 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:05,350 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:05,531 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:05,570 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:05,570 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:05,577 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:34:05,577 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:34:05,582 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:05,584 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:05,590 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:05,595 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:05,601 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:05,608 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:05,618 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:05,622 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:05,625 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:05,632 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:05,632 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:05,639 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:05,641 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:05,641 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-25 05:34:05,641 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:05,641 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-25 05:34:05,641 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-25 05:34:05,642 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-01-25 05:34:05,642 INFO L87 Difference]: Start difference. First operand 98 states and 110 transitions. Second operand 9 states. [2018-01-25 05:34:05,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:05,804 INFO L93 Difference]: Finished difference Result 125 states and 140 transitions. [2018-01-25 05:34:05,805 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-25 05:34:05,805 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 37 [2018-01-25 05:34:05,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:05,806 INFO L225 Difference]: With dead ends: 125 [2018-01-25 05:34:05,806 INFO L226 Difference]: Without dead ends: 119 [2018-01-25 05:34:05,806 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-01-25 05:34:05,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-01-25 05:34:05,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 110. [2018-01-25 05:34:05,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-01-25 05:34:05,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 124 transitions. [2018-01-25 05:34:05,814 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 124 transitions. Word has length 37 [2018-01-25 05:34:05,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:05,814 INFO L432 AbstractCegarLoop]: Abstraction has 110 states and 124 transitions. [2018-01-25 05:34:05,814 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-25 05:34:05,815 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 124 transitions. [2018-01-25 05:34:05,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-25 05:34:05,815 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:05,816 INFO L322 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:05,816 INFO L371 AbstractCegarLoop]: === Iteration 8 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:05,816 INFO L82 PathProgramCache]: Analyzing trace with hash -1846527883, now seen corresponding path program 7 times [2018-01-25 05:34:05,816 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:05,816 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:05,817 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:05,817 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:05,817 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:05,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:05,826 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:05,956 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:05,956 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:05,956 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:05,957 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:05,957 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:05,957 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:05,957 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:05,969 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:05,969 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:34:05,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:05,978 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:05,989 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:05,989 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:06,088 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:06,108 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:06,109 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:06,112 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:06,112 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:34:06,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:06,125 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:06,132 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:06,132 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:06,143 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:06,145 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:06,145 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-25 05:34:06,145 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:06,145 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-25 05:34:06,145 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-25 05:34:06,146 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-01-25 05:34:06,146 INFO L87 Difference]: Start difference. First operand 110 states and 124 transitions. Second operand 10 states. [2018-01-25 05:34:06,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:06,344 INFO L93 Difference]: Finished difference Result 138 states and 155 transitions. [2018-01-25 05:34:06,344 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-25 05:34:06,344 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-01-25 05:34:06,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:06,345 INFO L225 Difference]: With dead ends: 138 [2018-01-25 05:34:06,345 INFO L226 Difference]: Without dead ends: 132 [2018-01-25 05:34:06,346 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-01-25 05:34:06,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-01-25 05:34:06,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 122. [2018-01-25 05:34:06,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-25 05:34:06,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 138 transitions. [2018-01-25 05:34:06,356 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 138 transitions. Word has length 42 [2018-01-25 05:34:06,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:06,356 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 138 transitions. [2018-01-25 05:34:06,356 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-25 05:34:06,357 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 138 transitions. [2018-01-25 05:34:06,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-25 05:34:06,358 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:06,358 INFO L322 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:06,358 INFO L371 AbstractCegarLoop]: === Iteration 9 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:06,359 INFO L82 PathProgramCache]: Analyzing trace with hash 2109248542, now seen corresponding path program 8 times [2018-01-25 05:34:06,359 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:06,359 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:06,360 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:06,360 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:06,360 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:06,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:06,369 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:06,466 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:06,466 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:06,466 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:06,467 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:06,467 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:06,467 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:06,467 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:06,473 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:34:06,474 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:06,477 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:06,480 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:06,481 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:06,482 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:06,490 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:06,490 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:06,610 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:06,630 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:06,630 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:06,633 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:34:06,633 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:06,637 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:06,644 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:06,649 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:06,653 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:06,669 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:06,669 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:06,683 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:06,684 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:06,684 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-25 05:34:06,684 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:06,685 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-25 05:34:06,685 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-25 05:34:06,685 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-01-25 05:34:06,686 INFO L87 Difference]: Start difference. First operand 122 states and 138 transitions. Second operand 11 states. [2018-01-25 05:34:07,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:07,042 INFO L93 Difference]: Finished difference Result 151 states and 170 transitions. [2018-01-25 05:34:07,043 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-25 05:34:07,043 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 47 [2018-01-25 05:34:07,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:07,044 INFO L225 Difference]: With dead ends: 151 [2018-01-25 05:34:07,044 INFO L226 Difference]: Without dead ends: 145 [2018-01-25 05:34:07,045 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 176 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-01-25 05:34:07,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-01-25 05:34:07,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 134. [2018-01-25 05:34:07,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-25 05:34:07,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 152 transitions. [2018-01-25 05:34:07,053 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 152 transitions. Word has length 47 [2018-01-25 05:34:07,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:07,054 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 152 transitions. [2018-01-25 05:34:07,054 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-25 05:34:07,054 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 152 transitions. [2018-01-25 05:34:07,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-25 05:34:07,056 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:07,056 INFO L322 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:07,056 INFO L371 AbstractCegarLoop]: === Iteration 10 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:07,056 INFO L82 PathProgramCache]: Analyzing trace with hash 408164885, now seen corresponding path program 9 times [2018-01-25 05:34:07,057 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:07,057 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:07,058 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:07,058 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:07,058 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:07,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:07,066 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:07,193 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:07,193 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:07,193 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:07,193 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:07,193 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:07,193 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:07,193 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:07,201 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:34:07,202 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:34:07,205 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,210 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,211 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,216 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,217 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,219 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,220 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,222 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,223 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,226 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,226 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:07,228 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:07,259 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:07,259 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:07,458 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:07,491 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:07,491 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:07,494 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:34:07,494 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:34:07,498 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,500 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,504 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,508 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,514 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,521 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,529 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,539 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,550 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,566 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:07,572 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:07,575 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:07,588 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:07,588 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:07,603 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:07,605 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:07,605 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-25 05:34:07,605 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:07,606 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-25 05:34:07,606 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-25 05:34:07,607 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-01-25 05:34:07,607 INFO L87 Difference]: Start difference. First operand 134 states and 152 transitions. Second operand 12 states. [2018-01-25 05:34:07,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:07,964 INFO L93 Difference]: Finished difference Result 164 states and 185 transitions. [2018-01-25 05:34:07,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-25 05:34:07,964 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 52 [2018-01-25 05:34:07,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:07,966 INFO L225 Difference]: With dead ends: 164 [2018-01-25 05:34:07,966 INFO L226 Difference]: Without dead ends: 158 [2018-01-25 05:34:07,966 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 217 GetRequests, 195 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-01-25 05:34:07,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-01-25 05:34:07,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 146. [2018-01-25 05:34:07,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-01-25 05:34:07,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 166 transitions. [2018-01-25 05:34:07,975 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 166 transitions. Word has length 52 [2018-01-25 05:34:07,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:07,975 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 166 transitions. [2018-01-25 05:34:07,975 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-25 05:34:07,976 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 166 transitions. [2018-01-25 05:34:07,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-01-25 05:34:07,977 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:07,977 INFO L322 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:07,978 INFO L371 AbstractCegarLoop]: === Iteration 11 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:07,978 INFO L82 PathProgramCache]: Analyzing trace with hash -2136951170, now seen corresponding path program 10 times [2018-01-25 05:34:07,978 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:07,979 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:07,979 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:07,979 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:07,979 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:07,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:07,988 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:08,099 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:08,100 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:08,100 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:08,100 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:08,100 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:08,100 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:08,100 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:08,105 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:34:08,105 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:34:08,114 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:08,116 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:08,125 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:08,126 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:08,285 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:08,306 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:08,307 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:08,310 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:34:08,310 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:34:08,345 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:08,348 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:08,358 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:08,358 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:08,369 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:08,370 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:08,370 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-25 05:34:08,370 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:08,371 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-25 05:34:08,371 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-25 05:34:08,371 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-01-25 05:34:08,371 INFO L87 Difference]: Start difference. First operand 146 states and 166 transitions. Second operand 13 states. [2018-01-25 05:34:08,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:08,724 INFO L93 Difference]: Finished difference Result 177 states and 200 transitions. [2018-01-25 05:34:08,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-25 05:34:08,724 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2018-01-25 05:34:08,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:08,725 INFO L225 Difference]: With dead ends: 177 [2018-01-25 05:34:08,725 INFO L226 Difference]: Without dead ends: 171 [2018-01-25 05:34:08,726 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 238 GetRequests, 214 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-01-25 05:34:08,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-01-25 05:34:08,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 158. [2018-01-25 05:34:08,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-01-25 05:34:08,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 180 transitions. [2018-01-25 05:34:08,734 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 180 transitions. Word has length 57 [2018-01-25 05:34:08,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:08,734 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 180 transitions. [2018-01-25 05:34:08,734 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-25 05:34:08,734 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 180 transitions. [2018-01-25 05:34:08,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-01-25 05:34:08,735 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:08,735 INFO L322 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:08,735 INFO L371 AbstractCegarLoop]: === Iteration 12 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:08,735 INFO L82 PathProgramCache]: Analyzing trace with hash 1325560757, now seen corresponding path program 11 times [2018-01-25 05:34:08,735 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:08,736 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:08,736 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:08,736 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:08,736 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:08,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:08,745 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:08,907 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:08,907 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:08,907 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:08,908 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:08,908 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:08,908 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:08,908 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:08,916 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:34:08,916 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:08,919 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:08,920 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:08,921 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:08,922 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:08,924 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:08,925 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:08,927 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:08,928 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:08,930 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:08,932 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:08,934 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:08,938 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:08,938 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:08,940 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:08,953 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:08,953 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:09,121 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:09,140 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:09,140 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:09,143 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:34:09,143 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:09,146 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:09,148 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:09,152 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:09,156 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:09,162 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:09,168 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:09,176 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:09,188 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:09,201 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:09,214 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:09,230 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:09,249 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:09,255 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:09,258 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:09,270 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:09,270 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:09,283 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:09,284 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:09,285 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-25 05:34:09,285 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:09,285 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-25 05:34:09,285 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-25 05:34:09,285 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-01-25 05:34:09,286 INFO L87 Difference]: Start difference. First operand 158 states and 180 transitions. Second operand 14 states. [2018-01-25 05:34:09,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:09,659 INFO L93 Difference]: Finished difference Result 190 states and 215 transitions. [2018-01-25 05:34:09,659 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-25 05:34:09,659 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 62 [2018-01-25 05:34:09,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:09,660 INFO L225 Difference]: With dead ends: 190 [2018-01-25 05:34:09,660 INFO L226 Difference]: Without dead ends: 184 [2018-01-25 05:34:09,661 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 259 GetRequests, 233 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-01-25 05:34:09,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-25 05:34:09,666 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 170. [2018-01-25 05:34:09,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-01-25 05:34:09,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 194 transitions. [2018-01-25 05:34:09,667 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 194 transitions. Word has length 62 [2018-01-25 05:34:09,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:09,668 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 194 transitions. [2018-01-25 05:34:09,668 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-25 05:34:09,668 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 194 transitions. [2018-01-25 05:34:09,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-01-25 05:34:09,669 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:09,669 INFO L322 BasicCegarLoop]: trace histogram [13, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:09,669 INFO L371 AbstractCegarLoop]: === Iteration 13 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:09,670 INFO L82 PathProgramCache]: Analyzing trace with hash 923361502, now seen corresponding path program 12 times [2018-01-25 05:34:09,670 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:09,670 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:09,671 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:09,671 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:09,671 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:09,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:09,679 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:09,912 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:09,913 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:09,913 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:09,913 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:09,913 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:09,913 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:09,913 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:09,918 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:34:09,918 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:34:09,922 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:09,923 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:09,924 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:09,924 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:09,926 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:09,927 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:09,928 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:09,929 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:09,931 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:09,932 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:09,934 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:09,936 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:09,938 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:09,939 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:09,940 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:09,953 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:09,953 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:10,204 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:10,226 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:10,226 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:10,229 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:34:10,229 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:34:10,232 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:10,233 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:10,237 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:10,240 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:10,245 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:10,250 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:10,257 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:10,271 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:10,286 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:10,308 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:10,325 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:10,347 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:10,373 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:10,380 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:10,383 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:10,397 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:10,397 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:10,413 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:10,414 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:10,415 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-25 05:34:10,415 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:10,415 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-25 05:34:10,415 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-25 05:34:10,415 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-01-25 05:34:10,416 INFO L87 Difference]: Start difference. First operand 170 states and 194 transitions. Second operand 15 states. [2018-01-25 05:34:10,852 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:10,852 INFO L93 Difference]: Finished difference Result 203 states and 230 transitions. [2018-01-25 05:34:10,852 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-25 05:34:10,852 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2018-01-25 05:34:10,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:10,853 INFO L225 Difference]: With dead ends: 203 [2018-01-25 05:34:10,854 INFO L226 Difference]: Without dead ends: 197 [2018-01-25 05:34:10,854 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 280 GetRequests, 252 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-01-25 05:34:10,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-01-25 05:34:10,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 182. [2018-01-25 05:34:10,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-25 05:34:10,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 208 transitions. [2018-01-25 05:34:10,863 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 208 transitions. Word has length 67 [2018-01-25 05:34:10,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:10,863 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 208 transitions. [2018-01-25 05:34:10,863 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-25 05:34:10,863 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 208 transitions. [2018-01-25 05:34:10,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-01-25 05:34:10,864 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:10,864 INFO L322 BasicCegarLoop]: trace histogram [14, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:10,864 INFO L371 AbstractCegarLoop]: === Iteration 14 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:10,864 INFO L82 PathProgramCache]: Analyzing trace with hash 356861269, now seen corresponding path program 13 times [2018-01-25 05:34:10,865 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:10,865 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:10,865 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:10,865 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:10,866 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:10,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:10,874 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:11,070 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:11,070 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:11,070 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:11,070 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:11,070 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:11,070 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:11,071 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:11,075 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:11,076 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:34:11,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:11,086 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:11,109 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:11,109 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:11,369 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:11,389 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:11,390 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:11,393 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:11,393 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:34:11,410 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:11,413 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:11,425 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:11,425 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:11,442 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:11,444 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:11,444 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-25 05:34:11,444 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:11,445 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-25 05:34:11,445 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-25 05:34:11,445 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-01-25 05:34:11,445 INFO L87 Difference]: Start difference. First operand 182 states and 208 transitions. Second operand 16 states. [2018-01-25 05:34:11,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:11,975 INFO L93 Difference]: Finished difference Result 216 states and 245 transitions. [2018-01-25 05:34:11,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-25 05:34:11,975 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 72 [2018-01-25 05:34:11,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:11,976 INFO L225 Difference]: With dead ends: 216 [2018-01-25 05:34:11,976 INFO L226 Difference]: Without dead ends: 210 [2018-01-25 05:34:11,976 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 301 GetRequests, 271 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-01-25 05:34:11,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2018-01-25 05:34:11,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 194. [2018-01-25 05:34:11,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-25 05:34:11,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 222 transitions. [2018-01-25 05:34:11,986 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 222 transitions. Word has length 72 [2018-01-25 05:34:11,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:11,986 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 222 transitions. [2018-01-25 05:34:11,986 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-25 05:34:11,986 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 222 transitions. [2018-01-25 05:34:11,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-01-25 05:34:11,987 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:11,987 INFO L322 BasicCegarLoop]: trace histogram [15, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:11,988 INFO L371 AbstractCegarLoop]: === Iteration 15 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:11,988 INFO L82 PathProgramCache]: Analyzing trace with hash -1075276994, now seen corresponding path program 14 times [2018-01-25 05:34:11,988 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:11,989 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:11,989 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:11,989 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:11,989 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:11,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:11,998 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:12,239 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:12,239 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:12,239 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:12,239 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:12,239 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:12,239 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:12,240 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:12,248 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:34:12,248 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:12,252 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:12,270 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:12,282 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:12,284 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:12,300 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:12,300 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:12,720 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:12,739 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:12,740 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:12,742 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:34:12,743 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:12,746 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:12,756 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:12,764 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:12,767 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:12,780 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:12,780 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:12,794 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:12,795 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:12,795 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-25 05:34:12,795 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:12,795 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-25 05:34:12,796 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-25 05:34:12,796 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=706, Unknown=0, NotChecked=0, Total=992 [2018-01-25 05:34:12,796 INFO L87 Difference]: Start difference. First operand 194 states and 222 transitions. Second operand 17 states. [2018-01-25 05:34:13,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:13,352 INFO L93 Difference]: Finished difference Result 229 states and 260 transitions. [2018-01-25 05:34:13,352 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-25 05:34:13,352 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 77 [2018-01-25 05:34:13,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:13,353 INFO L225 Difference]: With dead ends: 229 [2018-01-25 05:34:13,353 INFO L226 Difference]: Without dead ends: 223 [2018-01-25 05:34:13,354 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 322 GetRequests, 290 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=286, Invalid=706, Unknown=0, NotChecked=0, Total=992 [2018-01-25 05:34:13,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-01-25 05:34:13,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 206. [2018-01-25 05:34:13,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-01-25 05:34:13,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 236 transitions. [2018-01-25 05:34:13,362 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 236 transitions. Word has length 77 [2018-01-25 05:34:13,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:13,362 INFO L432 AbstractCegarLoop]: Abstraction has 206 states and 236 transitions. [2018-01-25 05:34:13,362 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-25 05:34:13,362 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 236 transitions. [2018-01-25 05:34:13,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-01-25 05:34:13,363 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:13,363 INFO L322 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:13,363 INFO L371 AbstractCegarLoop]: === Iteration 16 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:13,363 INFO L82 PathProgramCache]: Analyzing trace with hash 904302325, now seen corresponding path program 15 times [2018-01-25 05:34:13,363 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:13,363 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:13,364 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:13,364 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:13,364 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:13,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:13,370 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:13,617 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:13,617 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:13,617 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:13,618 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:13,618 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:13,618 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:13,618 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:13,624 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:34:13,624 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:34:13,629 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:13,631 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:13,632 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:13,633 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:13,634 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:13,635 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:13,637 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:13,638 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:13,640 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:13,642 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:13,644 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:13,646 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:13,648 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:13,651 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:13,653 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:13,656 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:13,657 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:13,659 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:13,679 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:13,679 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:13,976 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:13,996 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:13,996 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:13,999 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:34:13,999 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:34:14,003 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:14,004 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:14,007 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:14,011 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:14,017 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:14,023 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:14,030 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:14,039 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:14,050 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:14,065 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:14,083 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:14,102 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:14,125 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:14,152 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:14,190 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:14,234 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:14,242 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:14,246 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:14,268 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:14,268 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:14,286 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:14,288 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:14,288 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-25 05:34:14,288 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:14,288 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-25 05:34:14,288 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-25 05:34:14,289 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2018-01-25 05:34:14,289 INFO L87 Difference]: Start difference. First operand 206 states and 236 transitions. Second operand 18 states. [2018-01-25 05:34:14,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:14,923 INFO L93 Difference]: Finished difference Result 242 states and 275 transitions. [2018-01-25 05:34:14,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-25 05:34:14,923 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 82 [2018-01-25 05:34:14,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:14,924 INFO L225 Difference]: With dead ends: 242 [2018-01-25 05:34:14,924 INFO L226 Difference]: Without dead ends: 236 [2018-01-25 05:34:14,925 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 343 GetRequests, 309 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2018-01-25 05:34:14,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236 states. [2018-01-25 05:34:14,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236 to 218. [2018-01-25 05:34:14,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 218 states. [2018-01-25 05:34:14,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 250 transitions. [2018-01-25 05:34:14,934 INFO L78 Accepts]: Start accepts. Automaton has 218 states and 250 transitions. Word has length 82 [2018-01-25 05:34:14,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:14,934 INFO L432 AbstractCegarLoop]: Abstraction has 218 states and 250 transitions. [2018-01-25 05:34:14,934 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-25 05:34:14,934 INFO L276 IsEmpty]: Start isEmpty. Operand 218 states and 250 transitions. [2018-01-25 05:34:14,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-01-25 05:34:14,935 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:14,935 INFO L322 BasicCegarLoop]: trace histogram [17, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:14,936 INFO L371 AbstractCegarLoop]: === Iteration 17 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:14,936 INFO L82 PathProgramCache]: Analyzing trace with hash 2125745566, now seen corresponding path program 16 times [2018-01-25 05:34:14,936 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:14,936 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:14,936 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:14,936 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:14,937 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:14,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:14,943 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:15,157 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:15,157 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:15,157 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:15,157 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:15,158 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:15,158 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:15,158 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:15,162 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:34:15,163 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:34:15,178 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:15,180 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:15,199 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:15,199 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:15,526 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:15,546 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:15,546 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:15,549 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:34:15,549 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:34:15,613 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:15,621 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:15,641 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:15,641 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:15,659 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:15,660 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:15,660 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-25 05:34:15,660 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:15,660 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-25 05:34:15,661 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-25 05:34:15,661 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=358, Invalid=902, Unknown=0, NotChecked=0, Total=1260 [2018-01-25 05:34:15,661 INFO L87 Difference]: Start difference. First operand 218 states and 250 transitions. Second operand 19 states. [2018-01-25 05:34:16,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:16,410 INFO L93 Difference]: Finished difference Result 255 states and 290 transitions. [2018-01-25 05:34:16,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-25 05:34:16,410 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 87 [2018-01-25 05:34:16,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:16,411 INFO L225 Difference]: With dead ends: 255 [2018-01-25 05:34:16,412 INFO L226 Difference]: Without dead ends: 249 [2018-01-25 05:34:16,412 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 364 GetRequests, 328 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=358, Invalid=902, Unknown=0, NotChecked=0, Total=1260 [2018-01-25 05:34:16,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states. [2018-01-25 05:34:16,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 230. [2018-01-25 05:34:16,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230 states. [2018-01-25 05:34:16,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230 states to 230 states and 264 transitions. [2018-01-25 05:34:16,422 INFO L78 Accepts]: Start accepts. Automaton has 230 states and 264 transitions. Word has length 87 [2018-01-25 05:34:16,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:16,422 INFO L432 AbstractCegarLoop]: Abstraction has 230 states and 264 transitions. [2018-01-25 05:34:16,422 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-25 05:34:16,423 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 264 transitions. [2018-01-25 05:34:16,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-01-25 05:34:16,424 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:16,424 INFO L322 BasicCegarLoop]: trace histogram [18, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:16,424 INFO L371 AbstractCegarLoop]: === Iteration 18 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:16,424 INFO L82 PathProgramCache]: Analyzing trace with hash 120606869, now seen corresponding path program 17 times [2018-01-25 05:34:16,424 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:16,425 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:16,425 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:16,425 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:16,426 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:16,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:16,434 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:16,641 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:16,641 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:16,641 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:16,641 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:16,642 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:16,642 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:16,642 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:16,646 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:34:16,647 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:16,650 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,651 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,651 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,652 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,653 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,654 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,656 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,657 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,659 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,661 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,663 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,665 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,667 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,670 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,673 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,676 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,679 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,684 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:16,684 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:16,686 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:16,702 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:16,702 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:17,047 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:17,067 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:17,067 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:17,070 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:34:17,070 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:17,073 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,075 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,079 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,084 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,090 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,096 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,105 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,114 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,129 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,146 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,162 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,182 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,206 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,241 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,283 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,318 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,360 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,406 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:17,416 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:17,419 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:17,440 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:17,440 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:17,459 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:17,461 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:17,461 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-25 05:34:17,461 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:17,461 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-25 05:34:17,462 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-25 05:34:17,462 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=397, Invalid=1009, Unknown=0, NotChecked=0, Total=1406 [2018-01-25 05:34:17,462 INFO L87 Difference]: Start difference. First operand 230 states and 264 transitions. Second operand 20 states. [2018-01-25 05:34:18,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:18,256 INFO L93 Difference]: Finished difference Result 268 states and 305 transitions. [2018-01-25 05:34:18,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-25 05:34:18,256 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 92 [2018-01-25 05:34:18,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:18,258 INFO L225 Difference]: With dead ends: 268 [2018-01-25 05:34:18,258 INFO L226 Difference]: Without dead ends: 262 [2018-01-25 05:34:18,259 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 385 GetRequests, 347 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=397, Invalid=1009, Unknown=0, NotChecked=0, Total=1406 [2018-01-25 05:34:18,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262 states. [2018-01-25 05:34:18,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262 to 242. [2018-01-25 05:34:18,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 242 states. [2018-01-25 05:34:18,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 278 transitions. [2018-01-25 05:34:18,267 INFO L78 Accepts]: Start accepts. Automaton has 242 states and 278 transitions. Word has length 92 [2018-01-25 05:34:18,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:18,267 INFO L432 AbstractCegarLoop]: Abstraction has 242 states and 278 transitions. [2018-01-25 05:34:18,267 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-25 05:34:18,267 INFO L276 IsEmpty]: Start isEmpty. Operand 242 states and 278 transitions. [2018-01-25 05:34:18,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-01-25 05:34:18,268 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:18,268 INFO L322 BasicCegarLoop]: trace histogram [19, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:18,268 INFO L371 AbstractCegarLoop]: === Iteration 19 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:18,269 INFO L82 PathProgramCache]: Analyzing trace with hash 2070056958, now seen corresponding path program 18 times [2018-01-25 05:34:18,269 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:18,269 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:18,269 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:18,269 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:18,269 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:18,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:18,277 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:18,520 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:18,521 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:18,521 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:18,521 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:18,521 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:18,521 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:18,521 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:18,526 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:34:18,526 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:34:18,530 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,531 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,531 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,532 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,533 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,534 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,535 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,536 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,538 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,539 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,540 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,542 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,543 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,545 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,547 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,549 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,551 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,553 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,556 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:18,556 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:18,563 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:18,579 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:18,579 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:19,002 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:19,022 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:19,022 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:19,025 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:34:19,025 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:34:19,030 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,031 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,035 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,038 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,043 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,048 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,055 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,064 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,081 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,103 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,123 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,147 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,170 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,197 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,230 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,269 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,315 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,387 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,500 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:19,510 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:19,513 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:19,530 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:19,530 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:19,549 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:19,550 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:19,550 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-25 05:34:19,550 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:19,551 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-25 05:34:19,551 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-25 05:34:19,551 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=438, Invalid=1122, Unknown=0, NotChecked=0, Total=1560 [2018-01-25 05:34:19,552 INFO L87 Difference]: Start difference. First operand 242 states and 278 transitions. Second operand 21 states. [2018-01-25 05:34:20,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:20,365 INFO L93 Difference]: Finished difference Result 281 states and 320 transitions. [2018-01-25 05:34:20,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-25 05:34:20,365 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 97 [2018-01-25 05:34:20,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:20,367 INFO L225 Difference]: With dead ends: 281 [2018-01-25 05:34:20,367 INFO L226 Difference]: Without dead ends: 275 [2018-01-25 05:34:20,367 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 406 GetRequests, 366 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=438, Invalid=1122, Unknown=0, NotChecked=0, Total=1560 [2018-01-25 05:34:20,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275 states. [2018-01-25 05:34:20,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275 to 254. [2018-01-25 05:34:20,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2018-01-25 05:34:20,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 292 transitions. [2018-01-25 05:34:20,380 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 292 transitions. Word has length 97 [2018-01-25 05:34:20,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:20,380 INFO L432 AbstractCegarLoop]: Abstraction has 254 states and 292 transitions. [2018-01-25 05:34:20,380 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-25 05:34:20,380 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 292 transitions. [2018-01-25 05:34:20,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-01-25 05:34:20,382 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:20,382 INFO L322 BasicCegarLoop]: trace histogram [20, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:20,382 INFO L371 AbstractCegarLoop]: === Iteration 20 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:20,382 INFO L82 PathProgramCache]: Analyzing trace with hash 183274037, now seen corresponding path program 19 times [2018-01-25 05:34:20,383 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:20,383 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:20,383 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:20,384 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:20,384 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:20,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:20,393 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:20,695 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:20,696 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:20,696 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:20,696 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:20,696 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:20,696 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:20,696 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:20,701 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:20,701 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:34:20,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:20,714 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:20,741 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:20,741 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:21,245 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:21,265 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:21,265 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:21,268 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:21,268 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:34:21,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:21,295 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:21,313 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:21,313 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:21,339 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:21,340 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:21,341 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-25 05:34:21,341 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:21,341 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-25 05:34:21,341 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-25 05:34:21,342 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=481, Invalid=1241, Unknown=0, NotChecked=0, Total=1722 [2018-01-25 05:34:21,342 INFO L87 Difference]: Start difference. First operand 254 states and 292 transitions. Second operand 22 states. [2018-01-25 05:34:22,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:22,281 INFO L93 Difference]: Finished difference Result 294 states and 335 transitions. [2018-01-25 05:34:22,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-25 05:34:22,282 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 102 [2018-01-25 05:34:22,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:22,283 INFO L225 Difference]: With dead ends: 294 [2018-01-25 05:34:22,283 INFO L226 Difference]: Without dead ends: 288 [2018-01-25 05:34:22,284 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 427 GetRequests, 385 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=481, Invalid=1241, Unknown=0, NotChecked=0, Total=1722 [2018-01-25 05:34:22,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states. [2018-01-25 05:34:22,292 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 266. [2018-01-25 05:34:22,292 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 266 states. [2018-01-25 05:34:22,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 266 states to 266 states and 306 transitions. [2018-01-25 05:34:22,294 INFO L78 Accepts]: Start accepts. Automaton has 266 states and 306 transitions. Word has length 102 [2018-01-25 05:34:22,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:22,295 INFO L432 AbstractCegarLoop]: Abstraction has 266 states and 306 transitions. [2018-01-25 05:34:22,295 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-25 05:34:22,295 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 306 transitions. [2018-01-25 05:34:22,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-01-25 05:34:22,296 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:22,296 INFO L322 BasicCegarLoop]: trace histogram [21, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:22,297 INFO L371 AbstractCegarLoop]: === Iteration 21 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:22,297 INFO L82 PathProgramCache]: Analyzing trace with hash -1033282978, now seen corresponding path program 20 times [2018-01-25 05:34:22,297 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:22,298 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:22,298 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:22,298 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:22,298 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:22,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:22,307 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:22,931 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:22,931 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:22,931 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:22,931 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:22,931 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:22,931 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:22,931 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:22,942 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:34:22,943 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:22,948 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:22,960 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:22,968 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:22,971 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:23,030 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:23,030 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:23,674 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:23,701 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:23,701 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:23,705 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:34:23,705 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:23,710 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:23,726 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:23,742 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:23,748 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:23,768 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:23,768 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:23,804 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:23,805 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:23,806 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-25 05:34:23,806 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:23,806 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-25 05:34:23,806 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-25 05:34:23,807 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=526, Invalid=1366, Unknown=0, NotChecked=0, Total=1892 [2018-01-25 05:34:23,807 INFO L87 Difference]: Start difference. First operand 266 states and 306 transitions. Second operand 23 states. [2018-01-25 05:34:24,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:24,888 INFO L93 Difference]: Finished difference Result 307 states and 350 transitions. [2018-01-25 05:34:24,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-25 05:34:24,888 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 107 [2018-01-25 05:34:24,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:24,890 INFO L225 Difference]: With dead ends: 307 [2018-01-25 05:34:24,890 INFO L226 Difference]: Without dead ends: 301 [2018-01-25 05:34:24,890 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 448 GetRequests, 404 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=526, Invalid=1366, Unknown=0, NotChecked=0, Total=1892 [2018-01-25 05:34:24,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301 states. [2018-01-25 05:34:24,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301 to 278. [2018-01-25 05:34:24,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 278 states. [2018-01-25 05:34:24,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 278 states to 278 states and 320 transitions. [2018-01-25 05:34:24,900 INFO L78 Accepts]: Start accepts. Automaton has 278 states and 320 transitions. Word has length 107 [2018-01-25 05:34:24,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:24,900 INFO L432 AbstractCegarLoop]: Abstraction has 278 states and 320 transitions. [2018-01-25 05:34:24,900 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-25 05:34:24,901 INFO L276 IsEmpty]: Start isEmpty. Operand 278 states and 320 transitions. [2018-01-25 05:34:24,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-01-25 05:34:24,901 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:24,901 INFO L322 BasicCegarLoop]: trace histogram [22, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:24,901 INFO L371 AbstractCegarLoop]: === Iteration 22 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:24,902 INFO L82 PathProgramCache]: Analyzing trace with hash -1905968171, now seen corresponding path program 21 times [2018-01-25 05:34:24,902 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:24,902 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:24,902 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:24,903 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:24,903 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:24,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:24,909 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:25,314 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:25,314 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:25,315 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:25,315 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:25,315 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:25,315 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:25,315 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:25,320 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:34:25,320 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:34:25,323 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,325 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,325 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,326 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,327 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,328 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,329 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,330 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,332 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,333 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,335 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,336 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,338 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,340 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,343 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,346 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,348 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,351 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,355 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,359 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,363 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,367 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,368 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:25,370 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:25,399 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:25,399 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:25,897 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:25,916 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:25,917 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:25,920 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:34:25,920 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:34:25,925 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,926 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,930 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,933 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,939 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,946 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,953 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,962 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,972 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:25,988 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:26,006 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:26,025 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:26,048 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:26,075 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:26,114 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:26,159 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:26,204 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:26,256 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:26,314 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:26,395 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:26,486 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:26,577 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:26,590 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:26,594 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:26,621 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:26,621 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:26,684 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:26,686 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:26,686 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-25 05:34:26,686 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:26,686 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-25 05:34:26,687 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-25 05:34:26,687 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-01-25 05:34:26,687 INFO L87 Difference]: Start difference. First operand 278 states and 320 transitions. Second operand 24 states. [2018-01-25 05:34:27,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:27,826 INFO L93 Difference]: Finished difference Result 320 states and 365 transitions. [2018-01-25 05:34:27,826 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-25 05:34:27,826 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 112 [2018-01-25 05:34:27,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:27,828 INFO L225 Difference]: With dead ends: 320 [2018-01-25 05:34:27,828 INFO L226 Difference]: Without dead ends: 314 [2018-01-25 05:34:27,828 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 469 GetRequests, 423 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-01-25 05:34:27,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314 states. [2018-01-25 05:34:27,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314 to 290. [2018-01-25 05:34:27,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 290 states. [2018-01-25 05:34:27,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 334 transitions. [2018-01-25 05:34:27,840 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 334 transitions. Word has length 112 [2018-01-25 05:34:27,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:27,841 INFO L432 AbstractCegarLoop]: Abstraction has 290 states and 334 transitions. [2018-01-25 05:34:27,841 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-25 05:34:27,841 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 334 transitions. [2018-01-25 05:34:27,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-01-25 05:34:27,842 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:27,842 INFO L322 BasicCegarLoop]: trace histogram [23, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:27,842 INFO L371 AbstractCegarLoop]: === Iteration 23 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:27,843 INFO L82 PathProgramCache]: Analyzing trace with hash -994136898, now seen corresponding path program 22 times [2018-01-25 05:34:27,843 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:27,843 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:27,844 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:27,844 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:27,844 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:27,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:27,853 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:28,220 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:28,220 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:28,220 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:28,220 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:28,221 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:28,221 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:28,221 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:28,226 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:34:28,226 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:34:28,264 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:28,267 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:28,292 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:28,292 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:28,865 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:28,885 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:28,905 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:28,908 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:34:28,908 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:34:29,027 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:29,032 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:29,066 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:29,066 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:29,100 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:29,102 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:29,102 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-25 05:34:29,102 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:29,103 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-25 05:34:29,103 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-25 05:34:29,103 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=622, Invalid=1634, Unknown=0, NotChecked=0, Total=2256 [2018-01-25 05:34:29,103 INFO L87 Difference]: Start difference. First operand 290 states and 334 transitions. Second operand 25 states. [2018-01-25 05:34:30,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:30,277 INFO L93 Difference]: Finished difference Result 333 states and 380 transitions. [2018-01-25 05:34:30,277 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-25 05:34:30,277 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 117 [2018-01-25 05:34:30,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:30,278 INFO L225 Difference]: With dead ends: 333 [2018-01-25 05:34:30,278 INFO L226 Difference]: Without dead ends: 327 [2018-01-25 05:34:30,279 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 490 GetRequests, 442 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=622, Invalid=1634, Unknown=0, NotChecked=0, Total=2256 [2018-01-25 05:34:30,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2018-01-25 05:34:30,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 302. [2018-01-25 05:34:30,285 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 302 states. [2018-01-25 05:34:30,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 302 states to 302 states and 348 transitions. [2018-01-25 05:34:30,286 INFO L78 Accepts]: Start accepts. Automaton has 302 states and 348 transitions. Word has length 117 [2018-01-25 05:34:30,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:30,287 INFO L432 AbstractCegarLoop]: Abstraction has 302 states and 348 transitions. [2018-01-25 05:34:30,287 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-25 05:34:30,287 INFO L276 IsEmpty]: Start isEmpty. Operand 302 states and 348 transitions. [2018-01-25 05:34:30,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-01-25 05:34:30,288 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:30,288 INFO L322 BasicCegarLoop]: trace histogram [24, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:30,288 INFO L371 AbstractCegarLoop]: === Iteration 24 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:30,289 INFO L82 PathProgramCache]: Analyzing trace with hash 1248093557, now seen corresponding path program 23 times [2018-01-25 05:34:30,289 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:30,289 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:30,289 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:30,290 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:30,290 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:30,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:30,299 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:30,615 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:30,615 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:30,615 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:30,615 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:30,615 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:30,615 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:30,615 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:30,620 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:34:30,620 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:30,624 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,625 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,625 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,626 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,627 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,628 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,629 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,630 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,632 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,633 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,635 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,637 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,639 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,642 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,644 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,647 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,651 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,654 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,659 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,663 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,668 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,674 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,680 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,687 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:30,688 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:30,690 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:30,712 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:30,712 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:31,289 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:31,309 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:31,309 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:31,312 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:34:31,312 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:31,317 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,319 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,323 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,328 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,334 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,342 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,350 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,361 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,373 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,391 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,413 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,433 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,456 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,484 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,526 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,575 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,617 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,667 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,720 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,806 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,917 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:31,999 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:32,090 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:32,190 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:32,216 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:32,221 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:32,247 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:32,247 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:32,276 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:32,278 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:32,278 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-25 05:34:32,278 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:32,278 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-25 05:34:32,278 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-25 05:34:32,279 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=673, Invalid=1777, Unknown=0, NotChecked=0, Total=2450 [2018-01-25 05:34:32,279 INFO L87 Difference]: Start difference. First operand 302 states and 348 transitions. Second operand 26 states. [2018-01-25 05:34:33,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:33,877 INFO L93 Difference]: Finished difference Result 346 states and 395 transitions. [2018-01-25 05:34:33,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-25 05:34:33,878 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 122 [2018-01-25 05:34:33,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:33,879 INFO L225 Difference]: With dead ends: 346 [2018-01-25 05:34:33,880 INFO L226 Difference]: Without dead ends: 340 [2018-01-25 05:34:33,881 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 511 GetRequests, 461 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=673, Invalid=1777, Unknown=0, NotChecked=0, Total=2450 [2018-01-25 05:34:33,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 340 states. [2018-01-25 05:34:33,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 340 to 314. [2018-01-25 05:34:33,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 314 states. [2018-01-25 05:34:33,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314 states to 314 states and 362 transitions. [2018-01-25 05:34:33,940 INFO L78 Accepts]: Start accepts. Automaton has 314 states and 362 transitions. Word has length 122 [2018-01-25 05:34:33,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:33,940 INFO L432 AbstractCegarLoop]: Abstraction has 314 states and 362 transitions. [2018-01-25 05:34:33,941 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-25 05:34:33,941 INFO L276 IsEmpty]: Start isEmpty. Operand 314 states and 362 transitions. [2018-01-25 05:34:33,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-01-25 05:34:33,941 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:33,941 INFO L322 BasicCegarLoop]: trace histogram [25, 24, 24, 24, 24, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:33,941 INFO L371 AbstractCegarLoop]: === Iteration 25 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:33,942 INFO L82 PathProgramCache]: Analyzing trace with hash -1210546402, now seen corresponding path program 24 times [2018-01-25 05:34:33,942 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:33,942 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:33,942 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:33,942 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:33,942 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:33,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:33,949 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:34,301 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:34,301 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:34,301 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:34,302 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:34,302 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:34,302 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:34,302 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:34,307 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:34:34,307 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:34:34,311 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,312 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,314 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,315 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,316 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,317 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,318 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,320 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,321 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,322 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,324 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,325 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,327 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,329 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,330 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,332 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,334 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,336 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,339 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,341 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,344 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,347 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,351 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,355 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,359 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:34,360 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:34,363 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:34,401 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:34,402 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:35,296 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:35,317 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:35,317 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:35,321 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:34:35,321 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:34:35,326 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,327 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,332 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,338 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,345 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,353 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,364 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,376 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,389 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,406 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,430 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,457 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,489 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,527 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,562 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,605 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,654 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,719 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,796 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:35,888 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:36,010 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:36,208 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:36,441 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:36,710 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:36,930 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:34:36,944 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:36,948 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:36,977 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:36,977 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:37,012 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:37,014 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:37,014 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-25 05:34:37,014 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:37,014 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-25 05:34:37,014 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-25 05:34:37,015 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=726, Invalid=1926, Unknown=0, NotChecked=0, Total=2652 [2018-01-25 05:34:37,015 INFO L87 Difference]: Start difference. First operand 314 states and 362 transitions. Second operand 27 states. [2018-01-25 05:34:38,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:38,477 INFO L93 Difference]: Finished difference Result 359 states and 410 transitions. [2018-01-25 05:34:38,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-25 05:34:38,477 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 127 [2018-01-25 05:34:38,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:38,478 INFO L225 Difference]: With dead ends: 359 [2018-01-25 05:34:38,478 INFO L226 Difference]: Without dead ends: 353 [2018-01-25 05:34:38,479 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 532 GetRequests, 480 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=726, Invalid=1926, Unknown=0, NotChecked=0, Total=2652 [2018-01-25 05:34:38,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 353 states. [2018-01-25 05:34:38,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 353 to 326. [2018-01-25 05:34:38,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 326 states. [2018-01-25 05:34:38,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 376 transitions. [2018-01-25 05:34:38,491 INFO L78 Accepts]: Start accepts. Automaton has 326 states and 376 transitions. Word has length 127 [2018-01-25 05:34:38,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:38,492 INFO L432 AbstractCegarLoop]: Abstraction has 326 states and 376 transitions. [2018-01-25 05:34:38,492 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-25 05:34:38,492 INFO L276 IsEmpty]: Start isEmpty. Operand 326 states and 376 transitions. [2018-01-25 05:34:38,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-01-25 05:34:38,493 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:38,494 INFO L322 BasicCegarLoop]: trace histogram [26, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:38,494 INFO L371 AbstractCegarLoop]: === Iteration 26 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:38,494 INFO L82 PathProgramCache]: Analyzing trace with hash 53741333, now seen corresponding path program 25 times [2018-01-25 05:34:38,494 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:38,495 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:38,495 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:38,495 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:38,495 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:38,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:38,504 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:38,964 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:38,964 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:38,965 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:38,965 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:38,965 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:38,965 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:38,965 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:38,970 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:38,970 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:34:38,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:38,996 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:39,058 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:39,058 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:39,884 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:39,904 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:39,904 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:39,907 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:39,907 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:34:39,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:39,941 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:39,968 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:39,968 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:40,004 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:40,005 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:40,005 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-25 05:34:40,005 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:40,005 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-25 05:34:40,006 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-25 05:34:40,006 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=781, Invalid=2081, Unknown=0, NotChecked=0, Total=2862 [2018-01-25 05:34:40,006 INFO L87 Difference]: Start difference. First operand 326 states and 376 transitions. Second operand 28 states. [2018-01-25 05:34:41,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:41,520 INFO L93 Difference]: Finished difference Result 372 states and 425 transitions. [2018-01-25 05:34:41,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-25 05:34:41,520 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 132 [2018-01-25 05:34:41,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:41,522 INFO L225 Difference]: With dead ends: 372 [2018-01-25 05:34:41,522 INFO L226 Difference]: Without dead ends: 366 [2018-01-25 05:34:41,522 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 553 GetRequests, 499 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=781, Invalid=2081, Unknown=0, NotChecked=0, Total=2862 [2018-01-25 05:34:41,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366 states. [2018-01-25 05:34:41,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366 to 338. [2018-01-25 05:34:41,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 338 states. [2018-01-25 05:34:41,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 338 states to 338 states and 390 transitions. [2018-01-25 05:34:41,530 INFO L78 Accepts]: Start accepts. Automaton has 338 states and 390 transitions. Word has length 132 [2018-01-25 05:34:41,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:41,531 INFO L432 AbstractCegarLoop]: Abstraction has 338 states and 390 transitions. [2018-01-25 05:34:41,531 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-25 05:34:41,531 INFO L276 IsEmpty]: Start isEmpty. Operand 338 states and 390 transitions. [2018-01-25 05:34:41,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-01-25 05:34:41,532 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:41,532 INFO L322 BasicCegarLoop]: trace histogram [27, 26, 26, 26, 26, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:41,532 INFO L371 AbstractCegarLoop]: === Iteration 27 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:41,532 INFO L82 PathProgramCache]: Analyzing trace with hash -173217410, now seen corresponding path program 26 times [2018-01-25 05:34:41,533 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:41,533 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:41,533 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:34:41,533 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:41,533 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:41,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:41,539 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:42,108 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 0 proven. 1677 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:42,108 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:42,108 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:42,108 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:42,108 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:42,108 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:42,108 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:42,114 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:34:42,114 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:42,120 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:42,137 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:42,140 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:42,143 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:42,174 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 0 proven. 1677 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:42,174 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:42,929 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 0 proven. 1677 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:42,950 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:42,950 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:42,953 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:34:42,953 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:42,958 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:42,976 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:42,990 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:42,994 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:43,021 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 0 proven. 1677 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:43,022 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:43,058 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 0 proven. 1677 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:43,060 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:43,060 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-25 05:34:43,060 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:43,060 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-25 05:34:43,060 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-25 05:34:43,061 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=838, Invalid=2242, Unknown=0, NotChecked=0, Total=3080 [2018-01-25 05:34:43,061 INFO L87 Difference]: Start difference. First operand 338 states and 390 transitions. Second operand 29 states. [2018-01-25 05:34:44,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:44,733 INFO L93 Difference]: Finished difference Result 385 states and 440 transitions. [2018-01-25 05:34:44,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-25 05:34:44,733 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 137 [2018-01-25 05:34:44,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:44,735 INFO L225 Difference]: With dead ends: 385 [2018-01-25 05:34:44,735 INFO L226 Difference]: Without dead ends: 379 [2018-01-25 05:34:44,736 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 574 GetRequests, 518 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=838, Invalid=2242, Unknown=0, NotChecked=0, Total=3080 [2018-01-25 05:34:44,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 379 states. [2018-01-25 05:34:44,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 379 to 350. [2018-01-25 05:34:44,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 350 states. [2018-01-25 05:34:44,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 350 states to 350 states and 404 transitions. [2018-01-25 05:34:44,748 INFO L78 Accepts]: Start accepts. Automaton has 350 states and 404 transitions. Word has length 137 [2018-01-25 05:34:44,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:44,749 INFO L432 AbstractCegarLoop]: Abstraction has 350 states and 404 transitions. [2018-01-25 05:34:44,749 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-25 05:34:44,749 INFO L276 IsEmpty]: Start isEmpty. Operand 350 states and 404 transitions. [2018-01-25 05:34:44,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-01-25 05:34:44,750 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:44,751 INFO L322 BasicCegarLoop]: trace histogram [28, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:44,751 INFO L371 AbstractCegarLoop]: === Iteration 28 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:44,751 INFO L82 PathProgramCache]: Analyzing trace with hash 681451701, now seen corresponding path program 27 times [2018-01-25 05:34:44,751 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:44,752 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:44,752 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:44,752 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:44,752 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:44,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:44,762 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:45,465 INFO L134 CoverageAnalysis]: Checked inductivity of 1809 backedges. 0 proven. 1809 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:45,465 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:45,465 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:45,465 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:45,465 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:45,465 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:45,465 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:45,472 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:34:45,472 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:34:45,478 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,480 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,481 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,482 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,484 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,485 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,487 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,489 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,491 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,493 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,496 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,500 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,503 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,506 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,509 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,512 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,514 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,518 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,521 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,526 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,531 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,535 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,541 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,547 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,553 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,560 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,567 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,574 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:45,576 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:45,578 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:45,612 INFO L134 CoverageAnalysis]: Checked inductivity of 1809 backedges. 0 proven. 1809 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:45,612 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:46,419 INFO L134 CoverageAnalysis]: Checked inductivity of 1809 backedges. 0 proven. 1809 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:46,440 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:46,440 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:46,443 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:34:46,443 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:34:46,448 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,450 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,453 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,458 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,464 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,471 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,479 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,489 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,501 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,518 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,538 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,559 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,583 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,611 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,651 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,698 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,745 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,799 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,860 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:46,948 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:47,045 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:47,142 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:47,248 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:47,366 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:47,539 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:47,727 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:47,904 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:48,111 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:34:48,140 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:48,147 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:48,193 INFO L134 CoverageAnalysis]: Checked inductivity of 1809 backedges. 0 proven. 1809 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:48,193 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:48,245 INFO L134 CoverageAnalysis]: Checked inductivity of 1809 backedges. 0 proven. 1809 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:48,247 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:48,247 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 57 [2018-01-25 05:34:48,247 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:48,247 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-25 05:34:48,248 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-25 05:34:48,249 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=897, Invalid=2409, Unknown=0, NotChecked=0, Total=3306 [2018-01-25 05:34:48,249 INFO L87 Difference]: Start difference. First operand 350 states and 404 transitions. Second operand 30 states. [2018-01-25 05:34:49,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:49,972 INFO L93 Difference]: Finished difference Result 398 states and 455 transitions. [2018-01-25 05:34:49,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-25 05:34:49,973 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 142 [2018-01-25 05:34:49,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:49,974 INFO L225 Difference]: With dead ends: 398 [2018-01-25 05:34:49,974 INFO L226 Difference]: Without dead ends: 392 [2018-01-25 05:34:49,975 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 595 GetRequests, 537 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=897, Invalid=2409, Unknown=0, NotChecked=0, Total=3306 [2018-01-25 05:34:49,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2018-01-25 05:34:49,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 362. [2018-01-25 05:34:49,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 362 states. [2018-01-25 05:34:49,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 362 states to 362 states and 418 transitions. [2018-01-25 05:34:49,987 INFO L78 Accepts]: Start accepts. Automaton has 362 states and 418 transitions. Word has length 142 [2018-01-25 05:34:49,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:49,987 INFO L432 AbstractCegarLoop]: Abstraction has 362 states and 418 transitions. [2018-01-25 05:34:49,987 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-25 05:34:49,987 INFO L276 IsEmpty]: Start isEmpty. Operand 362 states and 418 transitions. [2018-01-25 05:34:49,989 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-01-25 05:34:49,989 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:49,989 INFO L322 BasicCegarLoop]: trace histogram [29, 28, 28, 28, 28, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:49,989 INFO L371 AbstractCegarLoop]: === Iteration 29 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:49,989 INFO L82 PathProgramCache]: Analyzing trace with hash 1555157982, now seen corresponding path program 28 times [2018-01-25 05:34:49,989 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:49,990 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:49,990 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:49,990 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:49,990 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:49,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:49,997 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:50,546 INFO L134 CoverageAnalysis]: Checked inductivity of 1946 backedges. 0 proven. 1946 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:50,546 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:50,546 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:50,547 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:50,547 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:50,547 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:50,547 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:50,552 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:34:50,552 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:34:50,586 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:50,588 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:50,618 INFO L134 CoverageAnalysis]: Checked inductivity of 1946 backedges. 0 proven. 1946 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:50,618 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:51,465 INFO L134 CoverageAnalysis]: Checked inductivity of 1946 backedges. 0 proven. 1946 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:51,486 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:51,486 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:34:51,489 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:34:51,489 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:34:51,712 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:51,718 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:51,749 INFO L134 CoverageAnalysis]: Checked inductivity of 1946 backedges. 0 proven. 1946 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:51,749 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:34:51,790 INFO L134 CoverageAnalysis]: Checked inductivity of 1946 backedges. 0 proven. 1946 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:51,792 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:34:51,792 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 59 [2018-01-25 05:34:51,792 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:34:51,793 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-25 05:34:51,793 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-25 05:34:51,793 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=958, Invalid=2582, Unknown=0, NotChecked=0, Total=3540 [2018-01-25 05:34:51,793 INFO L87 Difference]: Start difference. First operand 362 states and 418 transitions. Second operand 31 states. [2018-01-25 05:34:53,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:34:53,677 INFO L93 Difference]: Finished difference Result 411 states and 470 transitions. [2018-01-25 05:34:53,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-25 05:34:53,677 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 147 [2018-01-25 05:34:53,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:34:53,680 INFO L225 Difference]: With dead ends: 411 [2018-01-25 05:34:53,680 INFO L226 Difference]: Without dead ends: 405 [2018-01-25 05:34:53,681 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 616 GetRequests, 556 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=958, Invalid=2582, Unknown=0, NotChecked=0, Total=3540 [2018-01-25 05:34:53,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 405 states. [2018-01-25 05:34:53,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 405 to 374. [2018-01-25 05:34:53,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 374 states. [2018-01-25 05:34:53,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 374 states to 374 states and 432 transitions. [2018-01-25 05:34:53,694 INFO L78 Accepts]: Start accepts. Automaton has 374 states and 432 transitions. Word has length 147 [2018-01-25 05:34:53,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:34:53,695 INFO L432 AbstractCegarLoop]: Abstraction has 374 states and 432 transitions. [2018-01-25 05:34:53,695 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-25 05:34:53,695 INFO L276 IsEmpty]: Start isEmpty. Operand 374 states and 432 transitions. [2018-01-25 05:34:53,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-01-25 05:34:53,696 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:34:53,697 INFO L322 BasicCegarLoop]: trace histogram [30, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1] [2018-01-25 05:34:53,697 INFO L371 AbstractCegarLoop]: === Iteration 30 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:34:53,697 INFO L82 PathProgramCache]: Analyzing trace with hash 1978446421, now seen corresponding path program 29 times [2018-01-25 05:34:53,697 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:34:53,698 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:53,698 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:34:53,698 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:34:53,698 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:34:53,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:34:53,708 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:34:54,226 INFO L134 CoverageAnalysis]: Checked inductivity of 2088 backedges. 0 proven. 2088 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:54,226 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:54,226 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:34:54,226 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:34:54,227 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:34:54,227 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:34:54,227 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:34:54,231 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:34:54,231 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:34:54,235 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,236 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,237 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,238 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,239 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,240 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,241 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,242 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,244 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,245 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,247 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,249 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,251 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,254 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,257 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,260 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,264 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,268 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,272 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,277 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,283 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,289 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,295 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,303 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,311 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,321 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,331 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,343 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,355 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,369 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:34:54,371 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:34:54,373 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:34:54,433 INFO L134 CoverageAnalysis]: Checked inductivity of 2088 backedges. 0 proven. 2088 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:34:54,433 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-25 05:34:54,899 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-25 05:34:54,899 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-25 05:34:54,902 WARN L187 ceAbstractionStarter]: Timeout [2018-01-25 05:34:54,903 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 25.01 05:34:54 BoogieIcfgContainer [2018-01-25 05:34:54,903 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-25 05:34:54,904 INFO L168 Benchmark]: Toolchain (without parser) took 53123.98 ms. Allocated memory was 307.2 MB in the beginning and 730.3 MB in the end (delta: 423.1 MB). Free memory was 268.3 MB in the beginning and 647.5 MB in the end (delta: -379.2 MB). Peak memory consumption was 43.9 MB. Max. memory is 5.3 GB. [2018-01-25 05:34:54,904 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 307.2 MB. Free memory is still 272.3 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-25 05:34:54,905 INFO L168 Benchmark]: CACSL2BoogieTranslator took 163.43 ms. Allocated memory is still 307.2 MB. Free memory was 266.3 MB in the beginning and 258.3 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. [2018-01-25 05:34:54,905 INFO L168 Benchmark]: Boogie Preprocessor took 25.48 ms. Allocated memory is still 307.2 MB. Free memory is still 258.3 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-25 05:34:54,905 INFO L168 Benchmark]: RCFGBuilder took 176.70 ms. Allocated memory is still 307.2 MB. Free memory was 258.3 MB in the beginning and 245.7 MB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 5.3 GB. [2018-01-25 05:34:54,905 INFO L168 Benchmark]: TraceAbstraction took 52751.20 ms. Allocated memory was 307.2 MB in the beginning and 730.3 MB in the end (delta: 423.1 MB). Free memory was 245.7 MB in the beginning and 647.5 MB in the end (delta: -401.7 MB). Peak memory consumption was 21.4 MB. Max. memory is 5.3 GB. [2018-01-25 05:34:54,907 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 307.2 MB. Free memory is still 272.3 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 163.43 ms. Allocated memory is still 307.2 MB. Free memory was 266.3 MB in the beginning and 258.3 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 25.48 ms. Allocated memory is still 307.2 MB. Free memory is still 258.3 MB. There was no memory consumed. Max. memory is 5.3 GB. * RCFGBuilder took 176.70 ms. Allocated memory is still 307.2 MB. Free memory was 258.3 MB in the beginning and 245.7 MB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 52751.20 ms. Allocated memory was 307.2 MB in the beginning and 730.3 MB in the end (delta: 423.1 MB). Free memory was 245.7 MB in the beginning and 647.5 MB in the end (delta: -401.7 MB). Peak memory consumption was 21.4 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 10 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 0 LocStat_NO_SUPPORTING_DISEQUALITIES : 4 LocStat_NO_DISJUNCTIONS : -20 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 15 TransStat_MAX_WEQGRAPH_SIZE : 3 TransStat_MAX_SIZEOF_WEQEDGELABEL : 2 TransStat_NO_SUPPORTING_EQUALITIES : 5 TransStat_NO_SUPPORTING_DISEQUALITIES : 1 TransStat_NO_DISJUNCTIONS : 16 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 4.620499 RENAME_VARIABLES(MILLISECONDS) : 0.591398 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 4.541737 PROJECTAWAY(MILLISECONDS) : 2.367157 ADD_WEAK_EQUALITY(MILLISECONDS) : 2.269310 DISJOIN(MILLISECONDS) : 0.225273 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.639898 ADD_EQUALITY(MILLISECONDS) : 0.054664 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.596070 #CONJOIN_DISJUNCTIVE : 36 #RENAME_VARIABLES : 82 #UNFREEZE : 0 #CONJOIN : 48 #PROJECTAWAY : 57 #ADD_WEAK_EQUALITY : 1 #DISJOIN : 10 #RENAME_VARIABLES_DISJUNCTIVE : 77 #ADD_EQUALITY : 5 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 1 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 7]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 7). Cancelled while BasicCegarLoop was analyzing trace of length 153 with TraceHistMax 30, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 49 known predicates. - TimeoutResultAtElement [Line: 8]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 8). Cancelled while BasicCegarLoop was analyzing trace of length 153 with TraceHistMax 30, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 49 known predicates. - TimeoutResultAtElement [Line: 13]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 13). Cancelled while BasicCegarLoop was analyzing trace of length 153 with TraceHistMax 30, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 49 known predicates. - TimeoutResultAtElement [Line: 13]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 13). Cancelled while BasicCegarLoop was analyzing trace of length 153 with TraceHistMax 30, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 49 known predicates. - TimeoutResultAtElement [Line: 12]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 12). Cancelled while BasicCegarLoop was analyzing trace of length 153 with TraceHistMax 30, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 49 known predicates. - TimeoutResultAtElement [Line: 8]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 8). Cancelled while BasicCegarLoop was analyzing trace of length 153 with TraceHistMax 30, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 49 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 34 locations, 6 error locations. TIMEOUT Result, 52.7s OverallTime, 30 OverallIterations, 30 TraceHistogramMax, 21.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4790 SDtfs, 2700 SDslu, 68887 SDs, 0 SdLazy, 62094 SolverSat, 1015 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 16.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 9312 GetRequests, 8387 SyntacticMatches, 56 SemanticMatches, 869 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 434 ImplicationChecksByTransitivity, 15.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=374occurred in iteration=29, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.3s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 29 MinimizatonAttempts, 493 StatesRemovedByMinimization, 29 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 7.9s SatisfiabilityAnalysisTime, 19.8s InterpolantComputationTime, 6685 NumberOfCodeBlocks, 6685 NumberOfCodeBlocksAsserted, 487 NumberOfCheckSat, 10996 ConstructedInterpolants, 0 QuantifiedInterpolants, 8194098 SizeOfPredicates, 0 NumberOfNonLiveVariables, 6468 ConjunctsInSsa, 1792 ConjunctsInUnsatCore, 141 InterpolantComputations, 1 PerfectInterpolantSequences, 0/95410 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_original_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-25_05-34-54-917.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_original_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-25_05-34-54-917.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_original_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-25_05-34-54-917.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_original_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-25_05-34-54-917.csv Completed graceful shutdown