java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test15_true-valid-memsafety_true-termination.i
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This is Ultimate 0.1.23-1cceb4a
[2018-01-30 00:10:57,220 INFO L170 SettingsManager]: Resetting all preferences to default values...
[2018-01-30 00:10:57,221 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values
[2018-01-30 00:10:57,236 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring...
[2018-01-30 00:10:57,236 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values
[2018-01-30 00:10:57,237 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values
[2018-01-30 00:10:57,238 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values
[2018-01-30 00:10:57,240 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values
[2018-01-30 00:10:57,242 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values
[2018-01-30 00:10:57,242 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values
[2018-01-30 00:10:57,243 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring...
[2018-01-30 00:10:57,243 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values
[2018-01-30 00:10:57,244 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values
[2018-01-30 00:10:57,246 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values
[2018-01-30 00:10:57,247 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values
[2018-01-30 00:10:57,249 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values
[2018-01-30 00:10:57,251 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values
[2018-01-30 00:10:57,253 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values
[2018-01-30 00:10:57,254 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values
[2018-01-30 00:10:57,255 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values
[2018-01-30 00:10:57,258 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring...
[2018-01-30 00:10:57,258 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring...
[2018-01-30 00:10:57,258 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values
[2018-01-30 00:10:57,259 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values
[2018-01-30 00:10:57,260 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values
[2018-01-30 00:10:57,261 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring...
[2018-01-30 00:10:57,262 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values
[2018-01-30 00:10:57,262 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring...
[2018-01-30 00:10:57,262 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring...
[2018-01-30 00:10:57,263 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values
[2018-01-30 00:10:57,263 INFO L181 SettingsManager]: Finished resetting all preferences to default values...
[2018-01-30 00:10:57,263 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf
[2018-01-30 00:10:57,272 INFO L110 SettingsManager]: Loading preferences was successful
[2018-01-30 00:10:57,272 INFO L112 SettingsManager]: Preferences different from defaults after loading the file:
[2018-01-30 00:10:57,273 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults:
[2018-01-30 00:10:57,274 INFO L133 SettingsManager]: * to procedures, called more than once=true
[2018-01-30 00:10:57,274 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults:
[2018-01-30 00:10:57,274 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain
[2018-01-30 00:10:57,274 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true
[2018-01-30 00:10:57,275 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2018-01-30 00:10:57,275 INFO L133 SettingsManager]: * sizeof long=4
[2018-01-30 00:10:57,275 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false
[2018-01-30 00:10:57,275 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true
[2018-01-30 00:10:57,275 INFO L133 SettingsManager]: * sizeof POINTER=4
[2018-01-30 00:10:57,276 INFO L133 SettingsManager]: * Check division by zero=IGNORE
[2018-01-30 00:10:57,276 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true
[2018-01-30 00:10:57,276 INFO L133 SettingsManager]: * Bitprecise bitfields=true
[2018-01-30 00:10:57,276 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true
[2018-01-30 00:10:57,276 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE
[2018-01-30 00:10:57,276 INFO L133 SettingsManager]: * sizeof long double=12
[2018-01-30 00:10:57,276 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2018-01-30 00:10:57,276 INFO L133 SettingsManager]: * Size of a code block=SingleStatement
[2018-01-30 00:10:57,277 INFO L133 SettingsManager]: * To the following directory=./dump/
[2018-01-30 00:10:57,277 INFO L133 SettingsManager]: * Add additional assume for each assert=false
[2018-01-30 00:10:57,277 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode
[2018-01-30 00:10:57,277 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2018-01-30 00:10:57,277 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2018-01-30 00:10:57,278 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK
[2018-01-30 00:10:57,278 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP
[2018-01-30 00:10:57,278 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles
[2018-01-30 00:10:57,278 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL
[2018-01-30 00:10:57,278 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode
[2018-01-30 00:10:57,278 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in
[2018-01-30 00:10:57,278 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true
[2018-01-30 00:10:57,279 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults:
[2018-01-30 00:10:57,279 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR
[2018-01-30 00:10:57,311 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp
[2018-01-30 00:10:57,321 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized
[2018-01-30 00:10:57,324 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected.
[2018-01-30 00:10:57,326 INFO L271 PluginConnector]: Initializing CDTParser...
[2018-01-30 00:10:57,326 INFO L276 PluginConnector]: CDTParser initialized
[2018-01-30 00:10:57,327 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test15_true-valid-memsafety_true-termination.i
[2018-01-30 00:10:57,506 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2018-01-30 00:10:57,512 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements.
[2018-01-30 00:10:57,513 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2018-01-30 00:10:57,513 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator...
[2018-01-30 00:10:57,518 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized
[2018-01-30 00:10:57,519 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 30.01 12:10:57" (1/1) ...
[2018-01-30 00:10:57,522 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@715ee194 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:10:57, skipping insertion in model container
[2018-01-30 00:10:57,522 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 30.01 12:10:57" (1/1) ...
[2018-01-30 00:10:57,536 INFO L153 Dispatcher]: Using SV-COMP mode
[2018-01-30 00:10:57,587 INFO L153 Dispatcher]: Using SV-COMP mode
[2018-01-30 00:10:57,713 INFO L450 PostProcessor]: Settings: Checked method=main
[2018-01-30 00:10:57,743 INFO L450 PostProcessor]: Settings: Checked method=main
[2018-01-30 00:10:57,757 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:10:57 WrapperNode
[2018-01-30 00:10:57,757 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2018-01-30 00:10:57,758 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2018-01-30 00:10:57,758 INFO L271 PluginConnector]: Initializing Boogie Preprocessor...
[2018-01-30 00:10:57,758 INFO L276 PluginConnector]: Boogie Preprocessor initialized
[2018-01-30 00:10:57,769 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:10:57" (1/1) ...
[2018-01-30 00:10:57,769 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:10:57" (1/1) ...
[2018-01-30 00:10:57,780 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:10:57" (1/1) ...
[2018-01-30 00:10:57,781 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:10:57" (1/1) ...
[2018-01-30 00:10:57,790 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:10:57" (1/1) ...
[2018-01-30 00:10:57,794 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:10:57" (1/1) ...
[2018-01-30 00:10:57,796 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:10:57" (1/1) ...
[2018-01-30 00:10:57,800 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2018-01-30 00:10:57,800 INFO L113 PluginConnector]: ------------------------RCFGBuilder----------------------------
[2018-01-30 00:10:57,800 INFO L271 PluginConnector]: Initializing RCFGBuilder...
[2018-01-30 00:10:57,801 INFO L276 PluginConnector]: RCFGBuilder initialized
[2018-01-30 00:10:57,801 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:10:57" (1/1) ...
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000
[2018-01-30 00:10:57,849 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init
[2018-01-30 00:10:57,849 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2018-01-30 00:10:57,849 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_nonpositive
[2018-01-30 00:10:57,849 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc
[2018-01-30 00:10:57,849 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_zalloc
[2018-01-30 00:10:57,849 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata
[2018-01-30 00:10:57,849 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata
[2018-01-30 00:10:57,849 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_hid_get_drvdata
[2018-01-30 00:10:57,849 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_hid_set_drvdata
[2018-01-30 00:10:57,850 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_init_arvo_device_struct
[2018-01-30 00:10:57,850 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_init_specials
[2018-01-30 00:10:57,850 INFO L136 BoogieDeclarations]: Found implementation of procedure lvd_arvo_remove_specials
[2018-01-30 00:10:57,850 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_probe
[2018-01-30 00:10:57,850 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_arvo_remove
[2018-01-30 00:10:57,850 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point
[2018-01-30 00:10:57,850 INFO L136 BoogieDeclarations]: Found implementation of procedure main
[2018-01-30 00:10:57,850 INFO L128 BoogieDeclarations]: Found specification of procedure write~int
[2018-01-30 00:10:57,850 INFO L128 BoogieDeclarations]: Found specification of procedure read~int
[2018-01-30 00:10:57,850 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$
[2018-01-30 00:10:57,851 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$
[2018-01-30 00:10:57,851 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free
[2018-01-30 00:10:57,851 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc
[2018-01-30 00:10:57,851 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc
[2018-01-30 00:10:57,851 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit
[2018-01-30 00:10:57,851 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit
[2018-01-30 00:10:57,851 INFO L128 BoogieDeclarations]: Found specification of procedure malloc
[2018-01-30 00:10:57,851 INFO L128 BoogieDeclarations]: Found specification of procedure calloc
[2018-01-30 00:10:57,851 INFO L128 BoogieDeclarations]: Found specification of procedure free
[2018-01-30 00:10:57,852 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int
[2018-01-30 00:10:57,852 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_nonpositive
[2018-01-30 00:10:57,852 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc
[2018-01-30 00:10:57,852 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_zalloc
[2018-01-30 00:10:57,852 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata
[2018-01-30 00:10:57,852 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata
[2018-01-30 00:10:57,852 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_hid_get_drvdata
[2018-01-30 00:10:57,852 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_hid_set_drvdata
[2018-01-30 00:10:57,852 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_init_arvo_device_struct
[2018-01-30 00:10:57,852 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_init_specials
[2018-01-30 00:10:57,852 INFO L128 BoogieDeclarations]: Found specification of procedure lvd_arvo_remove_specials
[2018-01-30 00:10:57,853 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_probe
[2018-01-30 00:10:57,853 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_arvo_remove
[2018-01-30 00:10:57,853 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point
[2018-01-30 00:10:57,853 INFO L128 BoogieDeclarations]: Found specification of procedure main
[2018-01-30 00:10:57,853 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init
[2018-01-30 00:10:57,853 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2018-01-30 00:10:58,387 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2018-01-30 00:10:58,388 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 30.01 12:10:58 BoogieIcfgContainer
[2018-01-30 00:10:58,388 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2018-01-30 00:10:58,389 INFO L113 PluginConnector]: ------------------------TraceAbstraction----------------------------
[2018-01-30 00:10:58,389 INFO L271 PluginConnector]: Initializing TraceAbstraction...
[2018-01-30 00:10:58,392 INFO L276 PluginConnector]: TraceAbstraction initialized
[2018-01-30 00:10:58,392 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 30.01 12:10:57" (1/3) ...
[2018-01-30 00:10:58,393 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22b4ee1d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 30.01 12:10:58, skipping insertion in model container
[2018-01-30 00:10:58,393 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:10:57" (2/3) ...
[2018-01-30 00:10:58,393 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@22b4ee1d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 30.01 12:10:58, skipping insertion in model container
[2018-01-30 00:10:58,393 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 30.01 12:10:58" (3/3) ...
[2018-01-30 00:10:58,394 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test15_true-valid-memsafety_true-termination.i
[2018-01-30 00:10:58,401 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2018-01-30 00:10:58,407 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 45 error locations.
[2018-01-30 00:10:58,447 INFO L322 AbstractCegarLoop]: Interprodecural is true
[2018-01-30 00:10:58,447 INFO L323 AbstractCegarLoop]: Hoare is true
[2018-01-30 00:10:58,448 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP
[2018-01-30 00:10:58,448 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK
[2018-01-30 00:10:58,448 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2018-01-30 00:10:58,448 INFO L327 AbstractCegarLoop]: Difference is false
[2018-01-30 00:10:58,448 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA
[2018-01-30 00:10:58,448 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce========
[2018-01-30 00:10:58,449 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure
[2018-01-30 00:10:58,468 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states.
[2018-01-30 00:10:58,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22
[2018-01-30 00:10:58,475 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:10:58,476 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:10:58,476 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:10:58,479 INFO L82 PathProgramCache]: Analyzing trace with hash -411099236, now seen corresponding path program 1 times
[2018-01-30 00:10:58,481 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:10:58,481 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:10:58,528 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:10:58,528 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:10:58,528 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:10:58,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:10:58,577 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:10:58,755 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-30 00:10:58,758 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-30 00:10:58,758 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2018-01-30 00:10:58,760 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states
[2018-01-30 00:10:58,775 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2018-01-30 00:10:58,775 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2018-01-30 00:10:58,778 INFO L87 Difference]: Start difference. First operand 225 states. Second operand 3 states.
[2018-01-30 00:10:59,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:10:59,026 INFO L93 Difference]: Finished difference Result 293 states and 322 transitions.
[2018-01-30 00:10:59,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states.
[2018-01-30 00:10:59,028 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 21
[2018-01-30 00:10:59,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:10:59,043 INFO L225 Difference]: With dead ends: 293
[2018-01-30 00:10:59,043 INFO L226 Difference]: Without dead ends: 286
[2018-01-30 00:10:59,047 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2018-01-30 00:10:59,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 286 states.
[2018-01-30 00:10:59,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 286 to 227.
[2018-01-30 00:10:59,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 227 states.
[2018-01-30 00:10:59,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227 states to 227 states and 243 transitions.
[2018-01-30 00:10:59,112 INFO L78 Accepts]: Start accepts. Automaton has 227 states and 243 transitions. Word has length 21
[2018-01-30 00:10:59,112 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:10:59,112 INFO L432 AbstractCegarLoop]: Abstraction has 227 states and 243 transitions.
[2018-01-30 00:10:59,112 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states.
[2018-01-30 00:10:59,113 INFO L276 IsEmpty]: Start isEmpty. Operand 227 states and 243 transitions.
[2018-01-30 00:10:59,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23
[2018-01-30 00:10:59,114 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:10:59,114 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:10:59,114 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:10:59,114 INFO L82 PathProgramCache]: Analyzing trace with hash -1317459009, now seen corresponding path program 1 times
[2018-01-30 00:10:59,115 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:10:59,115 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:10:59,116 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:10:59,116 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:10:59,116 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:10:59,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:10:59,136 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:10:59,232 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-30 00:10:59,233 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-30 00:10:59,233 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2018-01-30 00:10:59,234 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-01-30 00:10:59,234 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-01-30 00:10:59,235 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-01-30 00:10:59,235 INFO L87 Difference]: Start difference. First operand 227 states and 243 transitions. Second operand 6 states.
[2018-01-30 00:10:59,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:10:59,330 INFO L93 Difference]: Finished difference Result 278 states and 303 transitions.
[2018-01-30 00:10:59,330 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states.
[2018-01-30 00:10:59,330 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22
[2018-01-30 00:10:59,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:10:59,334 INFO L225 Difference]: With dead ends: 278
[2018-01-30 00:10:59,334 INFO L226 Difference]: Without dead ends: 274
[2018-01-30 00:10:59,337 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56
[2018-01-30 00:10:59,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274 states.
[2018-01-30 00:10:59,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274 to 222.
[2018-01-30 00:10:59,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222 states.
[2018-01-30 00:10:59,357 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 235 transitions.
[2018-01-30 00:10:59,358 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 235 transitions. Word has length 22
[2018-01-30 00:10:59,358 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:10:59,358 INFO L432 AbstractCegarLoop]: Abstraction has 222 states and 235 transitions.
[2018-01-30 00:10:59,358 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-01-30 00:10:59,358 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 235 transitions.
[2018-01-30 00:10:59,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31
[2018-01-30 00:10:59,359 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:10:59,359 INFO L350 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:10:59,360 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:10:59,360 INFO L82 PathProgramCache]: Analyzing trace with hash -1940195697, now seen corresponding path program 1 times
[2018-01-30 00:10:59,360 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:10:59,360 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:10:59,361 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:10:59,361 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:10:59,361 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:10:59,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:10:59,374 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:10:59,456 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked.
[2018-01-30 00:10:59,456 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:10:59,456 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:10:59,470 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:10:59,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:10:59,503 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:10:59,553 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked.
[2018-01-30 00:10:59,577 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-01-30 00:10:59,578 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4] total 8
[2018-01-30 00:10:59,578 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states
[2018-01-30 00:10:59,578 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2018-01-30 00:10:59,578 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56
[2018-01-30 00:10:59,578 INFO L87 Difference]: Start difference. First operand 222 states and 235 transitions. Second operand 8 states.
[2018-01-30 00:10:59,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:10:59,630 INFO L93 Difference]: Finished difference Result 438 states and 465 transitions.
[2018-01-30 00:10:59,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-01-30 00:10:59,630 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 30
[2018-01-30 00:10:59,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:10:59,632 INFO L225 Difference]: With dead ends: 438
[2018-01-30 00:10:59,632 INFO L226 Difference]: Without dead ends: 224
[2018-01-30 00:10:59,634 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72
[2018-01-30 00:10:59,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states.
[2018-01-30 00:10:59,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 224.
[2018-01-30 00:10:59,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states.
[2018-01-30 00:10:59,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 238 transitions.
[2018-01-30 00:10:59,652 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 238 transitions. Word has length 30
[2018-01-30 00:10:59,652 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:10:59,652 INFO L432 AbstractCegarLoop]: Abstraction has 224 states and 238 transitions.
[2018-01-30 00:10:59,652 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states.
[2018-01-30 00:10:59,652 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 238 transitions.
[2018-01-30 00:10:59,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32
[2018-01-30 00:10:59,653 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:10:59,653 INFO L350 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:10:59,653 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:10:59,653 INFO L82 PathProgramCache]: Analyzing trace with hash 855171532, now seen corresponding path program 1 times
[2018-01-30 00:10:59,653 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:10:59,654 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:10:59,655 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:10:59,655 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:10:59,655 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:10:59,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:10:59,672 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:10:59,773 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-30 00:10:59,773 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:10:59,774 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:10:59,788 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:10:59,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:10:59,811 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:10:59,832 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5
[2018-01-30 00:10:59,833 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:10:59,835 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:10:59,835 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5
[2018-01-30 00:10:59,881 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2018-01-30 00:10:59,900 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-01-30 00:10:59,901 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6
[2018-01-30 00:10:59,901 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states
[2018-01-30 00:10:59,901 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2018-01-30 00:10:59,901 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2018-01-30 00:10:59,901 INFO L87 Difference]: Start difference. First operand 224 states and 238 transitions. Second operand 7 states.
[2018-01-30 00:11:00,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:11:00,449 INFO L93 Difference]: Finished difference Result 281 states and 303 transitions.
[2018-01-30 00:11:00,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states.
[2018-01-30 00:11:00,449 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 31
[2018-01-30 00:11:00,449 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:11:00,451 INFO L225 Difference]: With dead ends: 281
[2018-01-30 00:11:00,452 INFO L226 Difference]: Without dead ends: 279
[2018-01-30 00:11:00,452 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 29 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72
[2018-01-30 00:11:00,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279 states.
[2018-01-30 00:11:00,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279 to 240.
[2018-01-30 00:11:00,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 240 states.
[2018-01-30 00:11:00,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 240 states to 240 states and 268 transitions.
[2018-01-30 00:11:00,469 INFO L78 Accepts]: Start accepts. Automaton has 240 states and 268 transitions. Word has length 31
[2018-01-30 00:11:00,470 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:11:00,470 INFO L432 AbstractCegarLoop]: Abstraction has 240 states and 268 transitions.
[2018-01-30 00:11:00,470 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states.
[2018-01-30 00:11:00,470 INFO L276 IsEmpty]: Start isEmpty. Operand 240 states and 268 transitions.
[2018-01-30 00:11:00,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32
[2018-01-30 00:11:00,471 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:11:00,471 INFO L350 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:11:00,471 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:11:00,472 INFO L82 PathProgramCache]: Analyzing trace with hash 855171531, now seen corresponding path program 1 times
[2018-01-30 00:11:00,472 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:11:00,472 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:11:00,473 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:00,474 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:00,474 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:00,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:00,484 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:11:00,519 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked.
[2018-01-30 00:11:00,520 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:11:00,520 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:11:00,525 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:00,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:00,541 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:11:00,554 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked.
[2018-01-30 00:11:00,574 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-01-30 00:11:00,574 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5
[2018-01-30 00:11:00,574 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-01-30 00:11:00,575 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-01-30 00:11:00,575 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-01-30 00:11:00,575 INFO L87 Difference]: Start difference. First operand 240 states and 268 transitions. Second operand 6 states.
[2018-01-30 00:11:00,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:11:00,605 INFO L93 Difference]: Finished difference Result 240 states and 268 transitions.
[2018-01-30 00:11:00,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states.
[2018-01-30 00:11:00,610 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 31
[2018-01-30 00:11:00,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:11:00,612 INFO L225 Difference]: With dead ends: 240
[2018-01-30 00:11:00,612 INFO L226 Difference]: Without dead ends: 239
[2018-01-30 00:11:00,613 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 29 SyntacticMatches, 3 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56
[2018-01-30 00:11:00,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states.
[2018-01-30 00:11:00,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 239.
[2018-01-30 00:11:00,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239 states.
[2018-01-30 00:11:00,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 266 transitions.
[2018-01-30 00:11:00,624 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 266 transitions. Word has length 31
[2018-01-30 00:11:00,624 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:11:00,624 INFO L432 AbstractCegarLoop]: Abstraction has 239 states and 266 transitions.
[2018-01-30 00:11:00,624 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-01-30 00:11:00,625 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 266 transitions.
[2018-01-30 00:11:00,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33
[2018-01-30 00:11:00,626 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:11:00,626 INFO L350 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:11:00,626 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:11:00,626 INFO L82 PathProgramCache]: Analyzing trace with hash -391957859, now seen corresponding path program 1 times
[2018-01-30 00:11:00,626 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:11:00,627 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:11:00,628 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:00,628 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:00,628 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:00,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:00,642 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:11:00,691 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked.
[2018-01-30 00:11:00,691 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-30 00:11:00,691 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2018-01-30 00:11:00,691 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-01-30 00:11:00,691 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-01-30 00:11:00,692 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-01-30 00:11:00,692 INFO L87 Difference]: Start difference. First operand 239 states and 266 transitions. Second operand 6 states.
[2018-01-30 00:11:00,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:11:00,767 INFO L93 Difference]: Finished difference Result 286 states and 317 transitions.
[2018-01-30 00:11:00,768 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states.
[2018-01-30 00:11:00,768 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32
[2018-01-30 00:11:00,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:11:00,770 INFO L225 Difference]: With dead ends: 286
[2018-01-30 00:11:00,770 INFO L226 Difference]: Without dead ends: 280
[2018-01-30 00:11:00,771 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56
[2018-01-30 00:11:00,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states.
[2018-01-30 00:11:00,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 239.
[2018-01-30 00:11:00,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239 states.
[2018-01-30 00:11:00,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 265 transitions.
[2018-01-30 00:11:00,783 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 265 transitions. Word has length 32
[2018-01-30 00:11:00,783 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:11:00,783 INFO L432 AbstractCegarLoop]: Abstraction has 239 states and 265 transitions.
[2018-01-30 00:11:00,783 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-01-30 00:11:00,783 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 265 transitions.
[2018-01-30 00:11:00,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35
[2018-01-30 00:11:00,784 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:11:00,784 INFO L350 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:11:00,785 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:11:00,785 INFO L82 PathProgramCache]: Analyzing trace with hash -1330801367, now seen corresponding path program 1 times
[2018-01-30 00:11:00,785 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:11:00,785 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:11:00,786 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:00,786 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:00,786 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:00,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:00,802 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:11:00,930 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked.
[2018-01-30 00:11:00,931 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:11:00,968 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:11:00,973 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:00,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:00,989 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:11:01,112 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked.
[2018-01-30 00:11:01,143 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-01-30 00:11:01,143 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 8] total 12
[2018-01-30 00:11:01,143 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states
[2018-01-30 00:11:01,144 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants.
[2018-01-30 00:11:01,144 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=122, Unknown=9, NotChecked=0, Total=156
[2018-01-30 00:11:01,147 INFO L87 Difference]: Start difference. First operand 239 states and 265 transitions. Second operand 13 states.
[2018-01-30 00:11:02,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:11:02,235 INFO L93 Difference]: Finished difference Result 282 states and 304 transitions.
[2018-01-30 00:11:02,236 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states.
[2018-01-30 00:11:02,236 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 34
[2018-01-30 00:11:02,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:11:02,238 INFO L225 Difference]: With dead ends: 282
[2018-01-30 00:11:02,238 INFO L226 Difference]: Without dead ends: 277
[2018-01-30 00:11:02,239 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 32 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=59, Invalid=274, Unknown=9, NotChecked=0, Total=342
[2018-01-30 00:11:02,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277 states.
[2018-01-30 00:11:02,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277 to 238.
[2018-01-30 00:11:02,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 238 states.
[2018-01-30 00:11:02,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238 states to 238 states and 263 transitions.
[2018-01-30 00:11:02,254 INFO L78 Accepts]: Start accepts. Automaton has 238 states and 263 transitions. Word has length 34
[2018-01-30 00:11:02,254 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:11:02,254 INFO L432 AbstractCegarLoop]: Abstraction has 238 states and 263 transitions.
[2018-01-30 00:11:02,254 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states.
[2018-01-30 00:11:02,254 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states and 263 transitions.
[2018-01-30 00:11:02,255 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40
[2018-01-30 00:11:02,256 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:11:02,256 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:11:02,256 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:11:02,256 INFO L82 PathProgramCache]: Analyzing trace with hash 297311418, now seen corresponding path program 1 times
[2018-01-30 00:11:02,256 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:11:02,256 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:11:02,258 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:02,258 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:02,258 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:02,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:02,270 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:11:02,324 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked.
[2018-01-30 00:11:02,324 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:11:02,324 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:11:02,329 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:02,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:02,345 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:11:02,355 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked.
[2018-01-30 00:11:02,375 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-01-30 00:11:02,375 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5
[2018-01-30 00:11:02,375 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states
[2018-01-30 00:11:02,375 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2018-01-30 00:11:02,376 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2018-01-30 00:11:02,376 INFO L87 Difference]: Start difference. First operand 238 states and 263 transitions. Second operand 5 states.
[2018-01-30 00:11:02,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:11:02,409 INFO L93 Difference]: Finished difference Result 445 states and 478 transitions.
[2018-01-30 00:11:02,409 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-01-30 00:11:02,409 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 39
[2018-01-30 00:11:02,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:11:02,410 INFO L225 Difference]: With dead ends: 445
[2018-01-30 00:11:02,410 INFO L226 Difference]: Without dead ends: 223
[2018-01-30 00:11:02,411 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 38 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30
[2018-01-30 00:11:02,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states.
[2018-01-30 00:11:02,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 223.
[2018-01-30 00:11:02,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states.
[2018-01-30 00:11:02,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 235 transitions.
[2018-01-30 00:11:02,423 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 235 transitions. Word has length 39
[2018-01-30 00:11:02,424 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:11:02,424 INFO L432 AbstractCegarLoop]: Abstraction has 223 states and 235 transitions.
[2018-01-30 00:11:02,424 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states.
[2018-01-30 00:11:02,424 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 235 transitions.
[2018-01-30 00:11:02,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41
[2018-01-30 00:11:02,425 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:11:02,425 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:11:02,425 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:11:02,426 INFO L82 PathProgramCache]: Analyzing trace with hash -336491381, now seen corresponding path program 2 times
[2018-01-30 00:11:02,426 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:11:02,426 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:11:02,427 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:02,427 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:02,427 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:02,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:02,439 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:11:02,559 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 11 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked.
[2018-01-30 00:11:02,559 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:11:02,559 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:11:02,568 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1
[2018-01-30 00:11:02,583 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command
[2018-01-30 00:11:02,593 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command
[2018-01-30 00:11:02,595 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat
[2018-01-30 00:11:02,597 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:11:02,605 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5
[2018-01-30 00:11:02,606 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:02,608 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:02,608 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5
[2018-01-30 00:11:02,619 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 11 proven. 2 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked.
[2018-01-30 00:11:02,638 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-01-30 00:11:02,638 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6
[2018-01-30 00:11:02,639 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states
[2018-01-30 00:11:02,639 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2018-01-30 00:11:02,639 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2018-01-30 00:11:02,639 INFO L87 Difference]: Start difference. First operand 223 states and 235 transitions. Second operand 7 states.
[2018-01-30 00:11:02,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:11:02,975 INFO L93 Difference]: Finished difference Result 251 states and 267 transitions.
[2018-01-30 00:11:02,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states.
[2018-01-30 00:11:02,975 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 40
[2018-01-30 00:11:02,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:11:02,977 INFO L225 Difference]: With dead ends: 251
[2018-01-30 00:11:02,977 INFO L226 Difference]: Without dead ends: 246
[2018-01-30 00:11:02,978 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 39 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72
[2018-01-30 00:11:02,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states.
[2018-01-30 00:11:02,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 243.
[2018-01-30 00:11:02,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 243 states.
[2018-01-30 00:11:02,990 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 243 states to 243 states and 262 transitions.
[2018-01-30 00:11:02,990 INFO L78 Accepts]: Start accepts. Automaton has 243 states and 262 transitions. Word has length 40
[2018-01-30 00:11:02,990 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:11:02,991 INFO L432 AbstractCegarLoop]: Abstraction has 243 states and 262 transitions.
[2018-01-30 00:11:02,991 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states.
[2018-01-30 00:11:02,991 INFO L276 IsEmpty]: Start isEmpty. Operand 243 states and 262 transitions.
[2018-01-30 00:11:02,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41
[2018-01-30 00:11:02,992 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:11:02,992 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:11:02,992 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:11:02,993 INFO L82 PathProgramCache]: Analyzing trace with hash -336491380, now seen corresponding path program 1 times
[2018-01-30 00:11:02,993 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:11:02,993 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:11:02,994 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:02,994 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2018-01-30 00:11:02,994 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:03,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:03,009 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:11:03,292 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 13 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked.
[2018-01-30 00:11:03,292 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:11:03,292 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:11:03,300 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:03,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:03,324 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:11:03,340 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19
[2018-01-30 00:11:03,340 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:03,357 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16
[2018-01-30 00:11:03,358 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:03,369 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts.
[2018-01-30 00:11:03,369 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36
[2018-01-30 00:11:03,455 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 13 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked.
[2018-01-30 00:11:03,486 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-01-30 00:11:03,487 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12
[2018-01-30 00:11:03,487 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states
[2018-01-30 00:11:03,487 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants.
[2018-01-30 00:11:03,487 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156
[2018-01-30 00:11:03,488 INFO L87 Difference]: Start difference. First operand 243 states and 262 transitions. Second operand 13 states.
[2018-01-30 00:11:04,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:11:04,217 INFO L93 Difference]: Finished difference Result 283 states and 309 transitions.
[2018-01-30 00:11:04,217 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states.
[2018-01-30 00:11:04,218 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 40
[2018-01-30 00:11:04,218 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:11:04,220 INFO L225 Difference]: With dead ends: 283
[2018-01-30 00:11:04,220 INFO L226 Difference]: Without dead ends: 278
[2018-01-30 00:11:04,220 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 36 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=54, Invalid=218, Unknown=0, NotChecked=0, Total=272
[2018-01-30 00:11:04,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278 states.
[2018-01-30 00:11:04,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278 to 266.
[2018-01-30 00:11:04,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 266 states.
[2018-01-30 00:11:04,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 266 states to 266 states and 298 transitions.
[2018-01-30 00:11:04,242 INFO L78 Accepts]: Start accepts. Automaton has 266 states and 298 transitions. Word has length 40
[2018-01-30 00:11:04,242 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:11:04,242 INFO L432 AbstractCegarLoop]: Abstraction has 266 states and 298 transitions.
[2018-01-30 00:11:04,242 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states.
[2018-01-30 00:11:04,242 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 298 transitions.
[2018-01-30 00:11:04,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42
[2018-01-30 00:11:04,243 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:11:04,243 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:11:04,243 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:11:04,244 INFO L82 PathProgramCache]: Analyzing trace with hash -1214775628, now seen corresponding path program 1 times
[2018-01-30 00:11:04,244 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:11:04,244 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:11:04,245 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:04,245 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:04,245 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:04,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:04,259 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:11:04,436 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 16 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked.
[2018-01-30 00:11:04,436 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:11:04,437 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:11:04,446 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:04,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:04,474 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:11:04,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5
[2018-01-30 00:11:04,493 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:04,495 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:04,495 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5
[2018-01-30 00:11:04,543 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:04,544 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:04,547 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21
[2018-01-30 00:11:04,547 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:04,555 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:11:04,556 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15
[2018-01-30 00:11:04,579 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 16 proven. 3 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked.
[2018-01-30 00:11:04,614 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-01-30 00:11:04,614 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 10
[2018-01-30 00:11:04,614 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states
[2018-01-30 00:11:04,615 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants.
[2018-01-30 00:11:04,615 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=86, Unknown=1, NotChecked=0, Total=110
[2018-01-30 00:11:04,615 INFO L87 Difference]: Start difference. First operand 266 states and 298 transitions. Second operand 11 states.
[2018-01-30 00:11:05,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:11:05,648 INFO L93 Difference]: Finished difference Result 292 states and 324 transitions.
[2018-01-30 00:11:05,648 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states.
[2018-01-30 00:11:05,648 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 41
[2018-01-30 00:11:05,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:11:05,650 INFO L225 Difference]: With dead ends: 292
[2018-01-30 00:11:05,651 INFO L226 Difference]: Without dead ends: 290
[2018-01-30 00:11:05,651 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 37 SyntacticMatches, 3 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=41, Invalid=140, Unknown=1, NotChecked=0, Total=182
[2018-01-30 00:11:05,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 290 states.
[2018-01-30 00:11:05,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 290 to 275.
[2018-01-30 00:11:05,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 275 states.
[2018-01-30 00:11:05,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 275 states to 275 states and 309 transitions.
[2018-01-30 00:11:05,672 INFO L78 Accepts]: Start accepts. Automaton has 275 states and 309 transitions. Word has length 41
[2018-01-30 00:11:05,672 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:11:05,673 INFO L432 AbstractCegarLoop]: Abstraction has 275 states and 309 transitions.
[2018-01-30 00:11:05,673 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states.
[2018-01-30 00:11:05,673 INFO L276 IsEmpty]: Start isEmpty. Operand 275 states and 309 transitions.
[2018-01-30 00:11:05,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42
[2018-01-30 00:11:05,673 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:11:05,674 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:11:05,674 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:11:05,674 INFO L82 PathProgramCache]: Analyzing trace with hash -1214775627, now seen corresponding path program 1 times
[2018-01-30 00:11:05,674 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:11:05,674 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:11:05,675 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:05,676 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:05,676 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:05,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:05,691 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:11:05,888 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked.
[2018-01-30 00:11:05,888 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:11:05,888 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:11:05,893 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:05,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:05,910 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:11:05,925 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22
[2018-01-30 00:11:05,926 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:05,952 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25
[2018-01-30 00:11:05,953 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:06,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21
[2018-01-30 00:11:06,005 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:06,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24
[2018-01-30 00:11:06,006 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:06,018 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts.
[2018-01-30 00:11:06,019 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46
[2018-01-30 00:11:06,155 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:06,156 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:06,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28
[2018-01-30 00:11:06,157 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:06,183 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:06,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 37
[2018-01-30 00:11:06,185 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:06,207 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:06,208 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:06,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26
[2018-01-30 00:11:06,209 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:06,224 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25
[2018-01-30 00:11:06,225 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:06,239 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts.
[2018-01-30 00:11:06,239 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:67, output treesize:49
[2018-01-30 00:11:06,284 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 16 proven. 7 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked.
[2018-01-30 00:11:06,303 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-01-30 00:11:06,304 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 17
[2018-01-30 00:11:06,304 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states
[2018-01-30 00:11:06,304 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants.
[2018-01-30 00:11:06,304 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=261, Unknown=1, NotChecked=0, Total=306
[2018-01-30 00:11:06,304 INFO L87 Difference]: Start difference. First operand 275 states and 309 transitions. Second operand 18 states.
[2018-01-30 00:11:06,556 WARN L146 SmtUtils]: Spent 110ms on a formula simplification. DAG size of input: 68 DAG size of output 65
[2018-01-30 00:11:19,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:11:19,450 INFO L93 Difference]: Finished difference Result 292 states and 331 transitions.
[2018-01-30 00:11:19,450 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states.
[2018-01-30 00:11:19,450 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 41
[2018-01-30 00:11:19,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:11:19,452 INFO L225 Difference]: With dead ends: 292
[2018-01-30 00:11:19,452 INFO L226 Difference]: Without dead ends: 287
[2018-01-30 00:11:19,452 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=84, Invalid=421, Unknown=1, NotChecked=0, Total=506
[2018-01-30 00:11:19,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 287 states.
[2018-01-30 00:11:19,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 287 to 236.
[2018-01-30 00:11:19,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236 states.
[2018-01-30 00:11:19,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236 states to 236 states and 252 transitions.
[2018-01-30 00:11:19,475 INFO L78 Accepts]: Start accepts. Automaton has 236 states and 252 transitions. Word has length 41
[2018-01-30 00:11:19,476 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:11:19,476 INFO L432 AbstractCegarLoop]: Abstraction has 236 states and 252 transitions.
[2018-01-30 00:11:19,476 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states.
[2018-01-30 00:11:19,476 INFO L276 IsEmpty]: Start isEmpty. Operand 236 states and 252 transitions.
[2018-01-30 00:11:19,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47
[2018-01-30 00:11:19,477 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:11:19,477 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:11:19,477 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:11:19,477 INFO L82 PathProgramCache]: Analyzing trace with hash -1995664814, now seen corresponding path program 1 times
[2018-01-30 00:11:19,478 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:11:19,478 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:11:19,479 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:19,479 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:19,479 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:19,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:19,492 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:11:19,681 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 8 proven. 7 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked.
[2018-01-30 00:11:19,681 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:11:19,681 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:11:19,692 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:19,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:19,719 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:11:19,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5
[2018-01-30 00:11:19,735 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:19,749 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:19,749 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5
[2018-01-30 00:11:19,797 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:19,798 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:19,799 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21
[2018-01-30 00:11:19,799 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:19,806 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:19,806 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15
[2018-01-30 00:11:19,909 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:19,910 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15
[2018-01-30 00:11:19,910 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:19,916 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:11:19,916 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:25, output treesize:15
[2018-01-30 00:11:19,961 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 11 proven. 4 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked.
[2018-01-30 00:11:19,995 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-01-30 00:11:19,995 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 16
[2018-01-30 00:11:19,995 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states
[2018-01-30 00:11:19,996 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants.
[2018-01-30 00:11:19,996 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=232, Unknown=0, NotChecked=0, Total=272
[2018-01-30 00:11:19,996 INFO L87 Difference]: Start difference. First operand 236 states and 252 transitions. Second operand 17 states.
[2018-01-30 00:11:21,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:11:21,021 INFO L93 Difference]: Finished difference Result 257 states and 277 transitions.
[2018-01-30 00:11:21,021 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states.
[2018-01-30 00:11:21,021 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 46
[2018-01-30 00:11:21,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:11:21,022 INFO L225 Difference]: With dead ends: 257
[2018-01-30 00:11:21,022 INFO L226 Difference]: Without dead ends: 255
[2018-01-30 00:11:21,023 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 39 SyntacticMatches, 5 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=84, Invalid=468, Unknown=0, NotChecked=0, Total=552
[2018-01-30 00:11:21,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 255 states.
[2018-01-30 00:11:21,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 255 to 236.
[2018-01-30 00:11:21,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236 states.
[2018-01-30 00:11:21,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236 states to 236 states and 252 transitions.
[2018-01-30 00:11:21,040 INFO L78 Accepts]: Start accepts. Automaton has 236 states and 252 transitions. Word has length 46
[2018-01-30 00:11:21,040 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:11:21,040 INFO L432 AbstractCegarLoop]: Abstraction has 236 states and 252 transitions.
[2018-01-30 00:11:21,040 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states.
[2018-01-30 00:11:21,040 INFO L276 IsEmpty]: Start isEmpty. Operand 236 states and 252 transitions.
[2018-01-30 00:11:21,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48
[2018-01-30 00:11:21,041 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:11:21,041 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:11:21,041 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:11:21,041 INFO L82 PathProgramCache]: Analyzing trace with hash -1733237887, now seen corresponding path program 1 times
[2018-01-30 00:11:21,041 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:11:21,041 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:11:21,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:21,042 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:21,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:21,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:21,051 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:11:21,163 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked.
[2018-01-30 00:11:21,163 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-30 00:11:21,164 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2018-01-30 00:11:21,164 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-01-30 00:11:21,164 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-01-30 00:11:21,164 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-01-30 00:11:21,164 INFO L87 Difference]: Start difference. First operand 236 states and 252 transitions. Second operand 6 states.
[2018-01-30 00:11:21,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:11:21,326 INFO L93 Difference]: Finished difference Result 446 states and 475 transitions.
[2018-01-30 00:11:21,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states.
[2018-01-30 00:11:21,360 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 47
[2018-01-30 00:11:21,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:11:21,361 INFO L225 Difference]: With dead ends: 446
[2018-01-30 00:11:21,361 INFO L226 Difference]: Without dead ends: 245
[2018-01-30 00:11:21,362 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56
[2018-01-30 00:11:21,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245 states.
[2018-01-30 00:11:21,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245 to 240.
[2018-01-30 00:11:21,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 240 states.
[2018-01-30 00:11:21,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 240 states to 240 states and 256 transitions.
[2018-01-30 00:11:21,376 INFO L78 Accepts]: Start accepts. Automaton has 240 states and 256 transitions. Word has length 47
[2018-01-30 00:11:21,376 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:11:21,376 INFO L432 AbstractCegarLoop]: Abstraction has 240 states and 256 transitions.
[2018-01-30 00:11:21,376 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-01-30 00:11:21,376 INFO L276 IsEmpty]: Start isEmpty. Operand 240 states and 256 transitions.
[2018-01-30 00:11:21,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49
[2018-01-30 00:11:21,377 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:11:21,377 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:11:21,377 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:11:21,377 INFO L82 PathProgramCache]: Analyzing trace with hash 1867931960, now seen corresponding path program 1 times
[2018-01-30 00:11:21,377 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:11:21,377 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:11:21,378 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:21,378 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:21,378 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:21,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:21,387 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:11:21,477 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked.
[2018-01-30 00:11:21,477 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-30 00:11:21,478 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2018-01-30 00:11:21,478 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states
[2018-01-30 00:11:21,478 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2018-01-30 00:11:21,478 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2018-01-30 00:11:21,478 INFO L87 Difference]: Start difference. First operand 240 states and 256 transitions. Second operand 7 states.
[2018-01-30 00:11:21,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:11:21,784 INFO L93 Difference]: Finished difference Result 242 states and 258 transitions.
[2018-01-30 00:11:21,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states.
[2018-01-30 00:11:21,784 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 48
[2018-01-30 00:11:21,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:11:21,786 INFO L225 Difference]: With dead ends: 242
[2018-01-30 00:11:21,786 INFO L226 Difference]: Without dead ends: 241
[2018-01-30 00:11:21,786 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90
[2018-01-30 00:11:21,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 241 states.
[2018-01-30 00:11:21,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 241 to 239.
[2018-01-30 00:11:21,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239 states.
[2018-01-30 00:11:21,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 255 transitions.
[2018-01-30 00:11:21,809 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 255 transitions. Word has length 48
[2018-01-30 00:11:21,809 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:11:21,810 INFO L432 AbstractCegarLoop]: Abstraction has 239 states and 255 transitions.
[2018-01-30 00:11:21,810 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states.
[2018-01-30 00:11:21,810 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 255 transitions.
[2018-01-30 00:11:21,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49
[2018-01-30 00:11:21,811 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:11:21,811 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:11:21,811 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:11:21,811 INFO L82 PathProgramCache]: Analyzing trace with hash 1867931961, now seen corresponding path program 1 times
[2018-01-30 00:11:21,811 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:11:21,812 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:11:21,812 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:21,813 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:21,813 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:21,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:21,825 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:11:21,991 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked.
[2018-01-30 00:11:21,991 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-30 00:11:21,991 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2018-01-30 00:11:21,991 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states
[2018-01-30 00:11:21,992 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2018-01-30 00:11:21,992 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56
[2018-01-30 00:11:21,992 INFO L87 Difference]: Start difference. First operand 239 states and 255 transitions. Second operand 8 states.
[2018-01-30 00:11:22,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:11:22,350 INFO L93 Difference]: Finished difference Result 244 states and 260 transitions.
[2018-01-30 00:11:22,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states.
[2018-01-30 00:11:22,350 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 48
[2018-01-30 00:11:22,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:11:22,352 INFO L225 Difference]: With dead ends: 244
[2018-01-30 00:11:22,352 INFO L226 Difference]: Without dead ends: 243
[2018-01-30 00:11:22,352 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132
[2018-01-30 00:11:22,353 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states.
[2018-01-30 00:11:22,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 238.
[2018-01-30 00:11:22,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 238 states.
[2018-01-30 00:11:22,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238 states to 238 states and 254 transitions.
[2018-01-30 00:11:22,372 INFO L78 Accepts]: Start accepts. Automaton has 238 states and 254 transitions. Word has length 48
[2018-01-30 00:11:22,372 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:11:22,372 INFO L432 AbstractCegarLoop]: Abstraction has 238 states and 254 transitions.
[2018-01-30 00:11:22,372 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states.
[2018-01-30 00:11:22,372 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states and 254 transitions.
[2018-01-30 00:11:22,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50
[2018-01-30 00:11:22,373 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:11:22,373 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:11:22,373 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:11:22,373 INFO L82 PathProgramCache]: Analyzing trace with hash -1913073949, now seen corresponding path program 1 times
[2018-01-30 00:11:22,374 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:11:22,374 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:11:22,374 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:22,375 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:22,375 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:22,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:22,386 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:11:22,847 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked.
[2018-01-30 00:11:22,847 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:11:22,847 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:11:22,854 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:22,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:22,878 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:11:23,185 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked.
[2018-01-30 00:11:23,219 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-01-30 00:11:23,219 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 12] total 19
[2018-01-30 00:11:23,220 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states
[2018-01-30 00:11:23,220 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants.
[2018-01-30 00:11:23,220 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=329, Unknown=8, NotChecked=0, Total=380
[2018-01-30 00:11:23,220 INFO L87 Difference]: Start difference. First operand 238 states and 254 transitions. Second operand 20 states.
[2018-01-30 00:11:24,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:11:24,729 INFO L93 Difference]: Finished difference Result 255 states and 271 transitions.
[2018-01-30 00:11:24,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states.
[2018-01-30 00:11:24,729 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 49
[2018-01-30 00:11:24,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:11:24,730 INFO L225 Difference]: With dead ends: 255
[2018-01-30 00:11:24,730 INFO L226 Difference]: Without dead ends: 240
[2018-01-30 00:11:24,731 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 44 SyntacticMatches, 6 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=108, Invalid=754, Unknown=8, NotChecked=0, Total=870
[2018-01-30 00:11:24,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240 states.
[2018-01-30 00:11:24,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240 to 230.
[2018-01-30 00:11:24,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230 states.
[2018-01-30 00:11:24,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230 states to 230 states and 245 transitions.
[2018-01-30 00:11:24,744 INFO L78 Accepts]: Start accepts. Automaton has 230 states and 245 transitions. Word has length 49
[2018-01-30 00:11:24,744 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:11:24,744 INFO L432 AbstractCegarLoop]: Abstraction has 230 states and 245 transitions.
[2018-01-30 00:11:24,744 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states.
[2018-01-30 00:11:24,744 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 245 transitions.
[2018-01-30 00:11:24,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51
[2018-01-30 00:11:24,744 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:11:24,745 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:11:24,745 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:11:24,745 INFO L82 PathProgramCache]: Analyzing trace with hash 1362475738, now seen corresponding path program 1 times
[2018-01-30 00:11:24,745 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:11:24,745 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:11:24,746 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:24,746 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:24,746 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:24,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:24,754 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:11:24,831 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked.
[2018-01-30 00:11:24,831 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-30 00:11:24,831 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2018-01-30 00:11:24,832 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states
[2018-01-30 00:11:24,832 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2018-01-30 00:11:24,832 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2018-01-30 00:11:24,832 INFO L87 Difference]: Start difference. First operand 230 states and 245 transitions. Second operand 7 states.
[2018-01-30 00:11:24,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:11:24,926 INFO L93 Difference]: Finished difference Result 234 states and 248 transitions.
[2018-01-30 00:11:24,926 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states.
[2018-01-30 00:11:24,926 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 50
[2018-01-30 00:11:24,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:11:24,928 INFO L225 Difference]: With dead ends: 234
[2018-01-30 00:11:24,928 INFO L226 Difference]: Without dead ends: 227
[2018-01-30 00:11:24,929 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90
[2018-01-30 00:11:24,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states.
[2018-01-30 00:11:24,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 227.
[2018-01-30 00:11:24,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 227 states.
[2018-01-30 00:11:24,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227 states to 227 states and 241 transitions.
[2018-01-30 00:11:24,946 INFO L78 Accepts]: Start accepts. Automaton has 227 states and 241 transitions. Word has length 50
[2018-01-30 00:11:24,947 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:11:24,947 INFO L432 AbstractCegarLoop]: Abstraction has 227 states and 241 transitions.
[2018-01-30 00:11:24,947 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states.
[2018-01-30 00:11:24,947 INFO L276 IsEmpty]: Start isEmpty. Operand 227 states and 241 transitions.
[2018-01-30 00:11:24,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52
[2018-01-30 00:11:24,948 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:11:24,948 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:11:24,948 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:11:24,948 INFO L82 PathProgramCache]: Analyzing trace with hash 1964816830, now seen corresponding path program 1 times
[2018-01-30 00:11:24,948 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:11:24,948 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:11:24,949 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:24,950 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:24,950 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:11:24,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:24,970 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:11:25,289 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 2 proven. 17 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked.
[2018-01-30 00:11:25,289 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:11:25,289 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:11:25,294 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:11:25,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:11:25,318 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:11:25,341 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25
[2018-01-30 00:11:25,342 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:25,356 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22
[2018-01-30 00:11:25,356 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:25,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21
[2018-01-30 00:11:25,370 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:25,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24
[2018-01-30 00:11:25,371 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:25,383 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts.
[2018-01-30 00:11:25,383 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46
[2018-01-30 00:11:25,555 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:25,556 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:25,556 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 44
[2018-01-30 00:11:25,557 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:25,583 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:25,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 41
[2018-01-30 00:11:25,585 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:25,608 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:25,609 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 47
[2018-01-30 00:11:25,609 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:25,632 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:25,633 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:25,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 41
[2018-01-30 00:11:25,634 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:25,655 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 4 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts.
[2018-01-30 00:11:25,655 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:79, output treesize:69
[2018-01-30 00:11:25,850 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:25,850 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:25,851 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:25,852 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:25,852 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 50
[2018-01-30 00:11:25,853 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:25,925 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:25,925 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:25,927 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:25,928 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 67
[2018-01-30 00:11:25,928 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:26,003 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:26,004 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:26,005 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:26,005 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:26,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48
[2018-01-30 00:11:26,006 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:26,077 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:26,078 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:26,079 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:26,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 63
[2018-01-30 00:11:26,081 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:26,153 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:26,154 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:26,155 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:26,155 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 48
[2018-01-30 00:11:26,156 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:26,223 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:26,223 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:26,224 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 67
[2018-01-30 00:11:26,224 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:26,293 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:26,294 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:26,294 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:11:26,295 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 46
[2018-01-30 00:11:26,295 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:26,358 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 45
[2018-01-30 00:11:26,358 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:26,453 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 8 dim-1 vars, End of recursive call: 8 dim-0 vars, and 4 xjuncts.
[2018-01-30 00:11:26,453 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 16 variables, input treesize:213, output treesize:165
[2018-01-30 00:11:26,583 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 49
[2018-01-30 00:11:26,585 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9
[2018-01-30 00:11:26,586 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:26,598 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:26,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 55
[2018-01-30 00:11:26,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9
[2018-01-30 00:11:26,695 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:26,708 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:26,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 49
[2018-01-30 00:11:26,780 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9
[2018-01-30 00:11:26,781 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:26,791 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:26,855 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 51
[2018-01-30 00:11:26,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9
[2018-01-30 00:11:26,857 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:26,868 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:11:26,929 INFO L267 ElimStorePlain]: Start of recursive call 1: 12 dim-0 vars, 4 dim-2 vars, End of recursive call: 8 dim-0 vars, and 4 xjuncts.
[2018-01-30 00:11:26,929 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 16 variables, input treesize:217, output treesize:213
[2018-01-30 00:11:27,085 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 43
[2018-01-30 00:11:27,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9
[2018-01-30 00:11:27,088 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:11:27,099 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:11:27,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 49
[2018-01-30 00:11:27,175 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 14
[2018-01-30 00:11:27,176 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:11:27,188 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:11:27,246 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 47
[2018-01-30 00:11:27,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 12
[2018-01-30 00:11:27,248 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:11:27,257 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:11:27,311 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57
[2018-01-30 00:11:27,313 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16
[2018-01-30 00:11:27,314 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:11:27,325 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:11:27,402 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 4 dim-2 vars, End of recursive call: 16 dim-0 vars, and 4 xjuncts.
[2018-01-30 00:11:27,402 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 20 variables, input treesize:213, output treesize:165
[2018-01-30 00:11:48,167 WARN L146 SmtUtils]: Spent 16691ms on a formula simplification. DAG size of input: 91 DAG size of output 71
[2018-01-30 00:11:48,198 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 2 proven. 17 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked.
[2018-01-30 00:11:48,222 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-01-30 00:11:48,222 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 16] total 26
[2018-01-30 00:11:48,223 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states
[2018-01-30 00:11:48,223 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants.
[2018-01-30 00:11:48,223 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=611, Unknown=4, NotChecked=0, Total=702
[2018-01-30 00:11:48,223 INFO L87 Difference]: Start difference. First operand 227 states and 241 transitions. Second operand 27 states.
[2018-01-30 00:12:07,282 WARN L146 SmtUtils]: Spent 213ms on a formula simplification. DAG size of input: 85 DAG size of output 59
[2018-01-30 00:12:14,044 WARN L146 SmtUtils]: Spent 6695ms on a formula simplification. DAG size of input: 114 DAG size of output 104
[2018-01-30 00:12:14,267 WARN L146 SmtUtils]: Spent 180ms on a formula simplification. DAG size of input: 90 DAG size of output 88
[2018-01-30 00:12:27,385 WARN L146 SmtUtils]: Spent 10999ms on a formula simplification. DAG size of input: 88 DAG size of output 86
[2018-01-30 00:12:47,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:12:47,375 INFO L93 Difference]: Finished difference Result 261 states and 279 transitions.
[2018-01-30 00:12:47,375 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states.
[2018-01-30 00:12:47,375 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 51
[2018-01-30 00:12:47,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:12:47,377 INFO L225 Difference]: With dead ends: 261
[2018-01-30 00:12:47,377 INFO L226 Difference]: Without dead ends: 260
[2018-01-30 00:12:47,377 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 301 ImplicationChecksByTransitivity, 48.2s TimeCoverageRelationStatistics Valid=191, Invalid=1207, Unknown=8, NotChecked=0, Total=1406
[2018-01-30 00:12:47,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 260 states.
[2018-01-30 00:12:47,398 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 260 to 226.
[2018-01-30 00:12:47,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 226 states.
[2018-01-30 00:12:47,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 240 transitions.
[2018-01-30 00:12:47,400 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 240 transitions. Word has length 51
[2018-01-30 00:12:47,400 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:12:47,400 INFO L432 AbstractCegarLoop]: Abstraction has 226 states and 240 transitions.
[2018-01-30 00:12:47,400 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states.
[2018-01-30 00:12:47,400 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 240 transitions.
[2018-01-30 00:12:47,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60
[2018-01-30 00:12:47,401 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:12:47,401 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:12:47,401 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:12:47,402 INFO L82 PathProgramCache]: Analyzing trace with hash -1729210922, now seen corresponding path program 1 times
[2018-01-30 00:12:47,402 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:12:47,402 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:12:47,403 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:12:47,403 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:12:47,403 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:12:47,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:12:47,417 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:12:47,490 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2018-01-30 00:12:47,491 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-30 00:12:47,491 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2018-01-30 00:12:47,491 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states
[2018-01-30 00:12:47,492 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2018-01-30 00:12:47,492 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2018-01-30 00:12:47,492 INFO L87 Difference]: Start difference. First operand 226 states and 240 transitions. Second operand 7 states.
[2018-01-30 00:12:47,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:12:47,750 INFO L93 Difference]: Finished difference Result 236 states and 251 transitions.
[2018-01-30 00:12:47,751 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states.
[2018-01-30 00:12:47,751 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 59
[2018-01-30 00:12:47,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:12:47,752 INFO L225 Difference]: With dead ends: 236
[2018-01-30 00:12:47,752 INFO L226 Difference]: Without dead ends: 235
[2018-01-30 00:12:47,752 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72
[2018-01-30 00:12:47,753 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states.
[2018-01-30 00:12:47,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 225.
[2018-01-30 00:12:47,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states.
[2018-01-30 00:12:47,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 239 transitions.
[2018-01-30 00:12:47,776 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 239 transitions. Word has length 59
[2018-01-30 00:12:47,776 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:12:47,776 INFO L432 AbstractCegarLoop]: Abstraction has 225 states and 239 transitions.
[2018-01-30 00:12:47,776 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states.
[2018-01-30 00:12:47,777 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 239 transitions.
[2018-01-30 00:12:47,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60
[2018-01-30 00:12:47,777 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:12:47,777 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:12:47,778 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:12:47,778 INFO L82 PathProgramCache]: Analyzing trace with hash -1729210921, now seen corresponding path program 1 times
[2018-01-30 00:12:47,778 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:12:47,778 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:12:47,779 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:12:47,779 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:12:47,779 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:12:47,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:12:47,793 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:12:47,964 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked.
[2018-01-30 00:12:47,964 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:12:47,965 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:12:47,973 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:12:48,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:12:48,011 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:12:48,110 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2018-01-30 00:12:48,143 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-01-30 00:12:48,143 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [10] total 15
[2018-01-30 00:12:48,144 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states
[2018-01-30 00:12:48,144 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants.
[2018-01-30 00:12:48,144 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=205, Unknown=0, NotChecked=0, Total=240
[2018-01-30 00:12:48,144 INFO L87 Difference]: Start difference. First operand 225 states and 239 transitions. Second operand 16 states.
[2018-01-30 00:12:48,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:12:48,440 INFO L93 Difference]: Finished difference Result 235 states and 250 transitions.
[2018-01-30 00:12:48,440 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states.
[2018-01-30 00:12:48,440 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 59
[2018-01-30 00:12:48,441 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:12:48,442 INFO L225 Difference]: With dead ends: 235
[2018-01-30 00:12:48,442 INFO L226 Difference]: Without dead ends: 234
[2018-01-30 00:12:48,443 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 54 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=55, Invalid=325, Unknown=0, NotChecked=0, Total=380
[2018-01-30 00:12:48,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234 states.
[2018-01-30 00:12:48,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234 to 224.
[2018-01-30 00:12:48,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states.
[2018-01-30 00:12:48,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 238 transitions.
[2018-01-30 00:12:48,466 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 238 transitions. Word has length 59
[2018-01-30 00:12:48,467 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:12:48,467 INFO L432 AbstractCegarLoop]: Abstraction has 224 states and 238 transitions.
[2018-01-30 00:12:48,467 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states.
[2018-01-30 00:12:48,467 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 238 transitions.
[2018-01-30 00:12:48,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64
[2018-01-30 00:12:48,468 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:12:48,468 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:12:48,468 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:12:48,468 INFO L82 PathProgramCache]: Analyzing trace with hash 734378521, now seen corresponding path program 1 times
[2018-01-30 00:12:48,468 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:12:48,468 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:12:48,469 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:12:48,469 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:12:48,469 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:12:48,490 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:12:48,491 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:12:49,095 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 13 proven. 10 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked.
[2018-01-30 00:12:49,095 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:12:49,095 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:12:49,100 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:12:49,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:12:49,131 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:12:49,160 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10
[2018-01-30 00:12:49,162 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9
[2018-01-30 00:12:49,162 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:49,164 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:49,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12
[2018-01-30 00:12:49,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11
[2018-01-30 00:12:49,175 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:49,176 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:49,182 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:49,182 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:41, output treesize:27
[2018-01-30 00:12:49,318 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 23
[2018-01-30 00:12:49,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 11
[2018-01-30 00:12:49,319 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:49,320 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:49,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24
[2018-01-30 00:12:49,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 9
[2018-01-30 00:12:49,327 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:49,329 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:49,331 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:49,332 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:45, output treesize:9
[2018-01-30 00:12:49,400 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2018-01-30 00:12:49,420 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-01-30 00:12:49,420 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [23] total 32
[2018-01-30 00:12:49,421 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states
[2018-01-30 00:12:49,421 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants.
[2018-01-30 00:12:49,421 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=973, Unknown=0, NotChecked=0, Total=1056
[2018-01-30 00:12:49,421 INFO L87 Difference]: Start difference. First operand 224 states and 238 transitions. Second operand 33 states.
[2018-01-30 00:12:51,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:12:51,631 INFO L93 Difference]: Finished difference Result 240 states and 258 transitions.
[2018-01-30 00:12:51,631 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states.
[2018-01-30 00:12:51,631 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 63
[2018-01-30 00:12:51,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:12:51,632 INFO L225 Difference]: With dead ends: 240
[2018-01-30 00:12:51,632 INFO L226 Difference]: Without dead ends: 239
[2018-01-30 00:12:51,633 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 54 SyntacticMatches, 2 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 449 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=237, Invalid=2313, Unknown=0, NotChecked=0, Total=2550
[2018-01-30 00:12:51,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states.
[2018-01-30 00:12:51,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 223.
[2018-01-30 00:12:51,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states.
[2018-01-30 00:12:51,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 237 transitions.
[2018-01-30 00:12:51,655 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 237 transitions. Word has length 63
[2018-01-30 00:12:51,655 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:12:51,655 INFO L432 AbstractCegarLoop]: Abstraction has 223 states and 237 transitions.
[2018-01-30 00:12:51,655 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states.
[2018-01-30 00:12:51,655 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 237 transitions.
[2018-01-30 00:12:51,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64
[2018-01-30 00:12:51,655 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:12:51,656 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:12:51,656 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:12:51,656 INFO L82 PathProgramCache]: Analyzing trace with hash 734378520, now seen corresponding path program 1 times
[2018-01-30 00:12:51,656 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:12:51,656 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:12:51,657 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:12:51,657 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:12:51,657 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:12:51,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:12:51,678 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:12:51,972 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked.
[2018-01-30 00:12:51,973 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:12:51,973 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:12:51,980 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:12:52,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:12:52,012 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:12:52,039 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10
[2018-01-30 00:12:52,043 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9
[2018-01-30 00:12:52,043 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:52,045 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:52,049 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:52,050 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:11
[2018-01-30 00:12:52,202 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17
[2018-01-30 00:12:52,205 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5
[2018-01-30 00:12:52,205 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:52,207 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:52,209 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:52,209 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:21, output treesize:5
[2018-01-30 00:12:52,227 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2018-01-30 00:12:52,249 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-01-30 00:12:52,249 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [14] total 20
[2018-01-30 00:12:52,249 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states
[2018-01-30 00:12:52,249 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants.
[2018-01-30 00:12:52,250 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=373, Unknown=0, NotChecked=0, Total=420
[2018-01-30 00:12:52,250 INFO L87 Difference]: Start difference. First operand 223 states and 237 transitions. Second operand 21 states.
[2018-01-30 00:12:52,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:12:52,806 INFO L93 Difference]: Finished difference Result 225 states and 239 transitions.
[2018-01-30 00:12:52,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states.
[2018-01-30 00:12:52,807 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 63
[2018-01-30 00:12:52,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:12:52,808 INFO L225 Difference]: With dead ends: 225
[2018-01-30 00:12:52,808 INFO L226 Difference]: Without dead ends: 224
[2018-01-30 00:12:52,808 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 88 GetRequests, 56 SyntacticMatches, 3 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 104 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=116, Invalid=814, Unknown=0, NotChecked=0, Total=930
[2018-01-30 00:12:52,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states.
[2018-01-30 00:12:52,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 222.
[2018-01-30 00:12:52,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222 states.
[2018-01-30 00:12:52,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 236 transitions.
[2018-01-30 00:12:52,832 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 236 transitions. Word has length 63
[2018-01-30 00:12:52,832 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:12:52,832 INFO L432 AbstractCegarLoop]: Abstraction has 222 states and 236 transitions.
[2018-01-30 00:12:52,833 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states.
[2018-01-30 00:12:52,833 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 236 transitions.
[2018-01-30 00:12:52,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65
[2018-01-30 00:12:52,833 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:12:52,834 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:12:52,834 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:12:52,834 INFO L82 PathProgramCache]: Analyzing trace with hash 1290897787, now seen corresponding path program 1 times
[2018-01-30 00:12:52,834 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:12:52,834 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:12:52,835 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:12:52,835 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:12:52,835 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:12:52,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:12:52,860 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:12:53,524 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked.
[2018-01-30 00:12:53,524 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:12:53,524 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:12:53,529 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:12:53,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:12:53,559 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:12:53,561 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5
[2018-01-30 00:12:53,561 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:53,565 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:53,565 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5
[2018-01-30 00:12:53,697 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:12:53,698 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:12:53,698 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21
[2018-01-30 00:12:53,699 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:53,703 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:53,703 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15
[2018-01-30 00:12:53,759 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:12:53,760 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:12:53,761 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:12:53,762 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 34
[2018-01-30 00:12:53,762 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:53,775 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:53,775 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:26, output treesize:28
[2018-01-30 00:12:53,822 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10
[2018-01-30 00:12:53,824 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9
[2018-01-30 00:12:53,825 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:53,826 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:53,836 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:53,836 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:46
[2018-01-30 00:12:53,936 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 63
[2018-01-30 00:12:53,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1
[2018-01-30 00:12:53,939 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:53,943 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:53,951 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:53,951 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:83, output treesize:46
[2018-01-30 00:12:53,958 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12
[2018-01-30 00:12:53,961 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11
[2018-01-30 00:12:53,961 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:53,963 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:53,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 46
[2018-01-30 00:12:53,985 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9
[2018-01-30 00:12:53,985 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:53,993 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:54,006 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:54,006 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:74, output treesize:100
[2018-01-30 00:12:54,268 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 75
[2018-01-30 00:12:54,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 56
[2018-01-30 00:12:54,271 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:54,277 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:54,286 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:12:54,287 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:118, output treesize:91
[2018-01-30 00:12:54,462 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 61
[2018-01-30 00:12:54,464 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 18
[2018-01-30 00:12:54,465 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:12:54,476 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 14
[2018-01-30 00:12:54,477 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:54,483 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:12:54,490 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:12:54,490 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:97, output treesize:28
[2018-01-30 00:12:54,554 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked.
[2018-01-30 00:12:54,575 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-01-30 00:12:54,575 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [23] total 43
[2018-01-30 00:12:54,575 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states
[2018-01-30 00:12:54,576 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants.
[2018-01-30 00:12:54,576 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=1781, Unknown=0, NotChecked=0, Total=1892
[2018-01-30 00:12:54,576 INFO L87 Difference]: Start difference. First operand 222 states and 236 transitions. Second operand 44 states.
[2018-01-30 00:12:57,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:12:57,615 INFO L93 Difference]: Finished difference Result 241 states and 259 transitions.
[2018-01-30 00:12:57,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states.
[2018-01-30 00:12:57,616 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 64
[2018-01-30 00:12:57,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:12:57,617 INFO L225 Difference]: With dead ends: 241
[2018-01-30 00:12:57,617 INFO L226 Difference]: Without dead ends: 240
[2018-01-30 00:12:57,618 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 45 SyntacticMatches, 3 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 534 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=309, Invalid=3723, Unknown=0, NotChecked=0, Total=4032
[2018-01-30 00:12:57,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240 states.
[2018-01-30 00:12:57,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240 to 221.
[2018-01-30 00:12:57,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221 states.
[2018-01-30 00:12:57,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 235 transitions.
[2018-01-30 00:12:57,642 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 235 transitions. Word has length 64
[2018-01-30 00:12:57,642 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:12:57,642 INFO L432 AbstractCegarLoop]: Abstraction has 221 states and 235 transitions.
[2018-01-30 00:12:57,642 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states.
[2018-01-30 00:12:57,643 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 235 transitions.
[2018-01-30 00:12:57,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65
[2018-01-30 00:12:57,643 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:12:57,643 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:12:57,644 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:12:57,644 INFO L82 PathProgramCache]: Analyzing trace with hash 1290897788, now seen corresponding path program 1 times
[2018-01-30 00:12:57,644 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:12:57,644 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:12:57,645 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:12:57,645 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:12:57,645 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:12:57,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:12:57,671 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:12:58,627 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 13 proven. 6 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked.
[2018-01-30 00:12:58,628 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:12:58,628 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:12:58,633 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:12:58,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:12:58,665 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:12:58,667 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5
[2018-01-30 00:12:58,667 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:58,668 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:58,668 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5
[2018-01-30 00:12:58,807 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:12:58,808 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:12:58,808 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21
[2018-01-30 00:12:58,808 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:58,812 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:58,813 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15
[2018-01-30 00:12:58,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24
[2018-01-30 00:12:58,872 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:58,886 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21
[2018-01-30 00:12:58,887 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:58,900 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts.
[2018-01-30 00:12:58,900 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:48, output treesize:46
[2018-01-30 00:12:59,022 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:12:59,023 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:12:59,023 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:12:59,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 28
[2018-01-30 00:12:59,024 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,045 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:12:59,045 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:12:59,046 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:12:59,046 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30
[2018-01-30 00:12:59,047 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,066 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts.
[2018-01-30 00:12:59,066 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:73, output treesize:59
[2018-01-30 00:12:59,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48
[2018-01-30 00:12:59,138 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9
[2018-01-30 00:12:59,138 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,148 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 50
[2018-01-30 00:12:59,181 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9
[2018-01-30 00:12:59,182 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,191 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,219 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 46
[2018-01-30 00:12:59,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9
[2018-01-30 00:12:59,221 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,229 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,255 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 44
[2018-01-30 00:12:59,257 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9
[2018-01-30 00:12:59,257 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,266 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,288 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts.
[2018-01-30 00:12:59,288 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 8 variables, input treesize:105, output treesize:107
[2018-01-30 00:12:59,475 WARN L307 Elim1Store]: Array PQE input equivalent to false
[2018-01-30 00:12:59,475 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,499 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 121 treesize of output 115
[2018-01-30 00:12:59,502 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1
[2018-01-30 00:12:59,502 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,510 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,529 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 57
[2018-01-30 00:12:59,532 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 1
[2018-01-30 00:12:59,532 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,536 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,559 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 4 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:12:59,559 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 7 variables, input treesize:299, output treesize:71
[2018-01-30 00:12:59,627 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 45
[2018-01-30 00:12:59,629 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11
[2018-01-30 00:12:59,630 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,636 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,654 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 67
[2018-01-30 00:12:59,656 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9
[2018-01-30 00:12:59,656 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,667 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:12:59,682 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:12:59,682 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:99, output treesize:155
[2018-01-30 00:13:00,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 192 treesize of output 149
[2018-01-30 00:13:00,338 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 78
[2018-01-30 00:13:00,338 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:13:00,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 35
[2018-01-30 00:13:00,352 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts.
[2018-01-30 00:13:00,362 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:13:00,375 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 42
[2018-01-30 00:13:00,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 26
[2018-01-30 00:13:00,377 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:13:00,383 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 11
[2018-01-30 00:13:00,383 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts.
[2018-01-30 00:13:00,386 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:13:00,394 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts.
[2018-01-30 00:13:00,394 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:197, output treesize:23
[2018-01-30 00:13:00,471 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 13 proven. 6 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked.
[2018-01-30 00:13:00,491 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-01-30 00:13:00,491 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 48
[2018-01-30 00:13:00,492 INFO L409 AbstractCegarLoop]: Interpolant automaton has 49 states
[2018-01-30 00:13:00,492 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants.
[2018-01-30 00:13:00,492 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=2234, Unknown=0, NotChecked=0, Total=2352
[2018-01-30 00:13:00,493 INFO L87 Difference]: Start difference. First operand 221 states and 235 transitions. Second operand 49 states.
[2018-01-30 00:13:01,278 WARN L146 SmtUtils]: Spent 111ms on a formula simplification. DAG size of input: 73 DAG size of output 67
[2018-01-30 00:13:02,620 WARN L146 SmtUtils]: Spent 100ms on a formula simplification. DAG size of input: 96 DAG size of output 83
[2018-01-30 00:13:02,848 WARN L146 SmtUtils]: Spent 133ms on a formula simplification. DAG size of input: 102 DAG size of output 89
[2018-01-30 00:13:03,022 WARN L146 SmtUtils]: Spent 105ms on a formula simplification. DAG size of input: 96 DAG size of output 83
[2018-01-30 00:13:03,244 WARN L146 SmtUtils]: Spent 128ms on a formula simplification. DAG size of input: 103 DAG size of output 90
[2018-01-30 00:13:03,500 WARN L146 SmtUtils]: Spent 156ms on a formula simplification. DAG size of input: 112 DAG size of output 104
[2018-01-30 00:13:05,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:13:05,034 INFO L93 Difference]: Finished difference Result 240 states and 258 transitions.
[2018-01-30 00:13:05,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states.
[2018-01-30 00:13:05,034 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 64
[2018-01-30 00:13:05,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:13:05,035 INFO L225 Difference]: With dead ends: 240
[2018-01-30 00:13:05,035 INFO L226 Difference]: Without dead ends: 239
[2018-01-30 00:13:05,037 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 113 GetRequests, 42 SyntacticMatches, 2 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 858 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=349, Invalid=4621, Unknown=0, NotChecked=0, Total=4970
[2018-01-30 00:13:05,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states.
[2018-01-30 00:13:05,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 220.
[2018-01-30 00:13:05,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states.
[2018-01-30 00:13:05,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 234 transitions.
[2018-01-30 00:13:05,052 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 234 transitions. Word has length 64
[2018-01-30 00:13:05,052 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:13:05,052 INFO L432 AbstractCegarLoop]: Abstraction has 220 states and 234 transitions.
[2018-01-30 00:13:05,052 INFO L433 AbstractCegarLoop]: Interpolant automaton has 49 states.
[2018-01-30 00:13:05,052 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 234 transitions.
[2018-01-30 00:13:05,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75
[2018-01-30 00:13:05,053 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:13:05,053 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:13:05,053 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:13:05,053 INFO L82 PathProgramCache]: Analyzing trace with hash -365207090, now seen corresponding path program 1 times
[2018-01-30 00:13:05,053 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:13:05,053 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:13:05,054 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:05,054 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:13:05,054 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:05,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:13:05,064 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:13:05,175 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2018-01-30 00:13:05,175 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-30 00:13:05,175 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2018-01-30 00:13:05,175 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states
[2018-01-30 00:13:05,175 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants.
[2018-01-30 00:13:05,175 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42
[2018-01-30 00:13:05,176 INFO L87 Difference]: Start difference. First operand 220 states and 234 transitions. Second operand 7 states.
[2018-01-30 00:13:05,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:13:05,364 INFO L93 Difference]: Finished difference Result 234 states and 247 transitions.
[2018-01-30 00:13:05,364 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states.
[2018-01-30 00:13:05,364 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 74
[2018-01-30 00:13:05,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:13:05,366 INFO L225 Difference]: With dead ends: 234
[2018-01-30 00:13:05,366 INFO L226 Difference]: Without dead ends: 233
[2018-01-30 00:13:05,366 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72
[2018-01-30 00:13:05,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states.
[2018-01-30 00:13:05,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 230.
[2018-01-30 00:13:05,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230 states.
[2018-01-30 00:13:05,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230 states to 230 states and 244 transitions.
[2018-01-30 00:13:05,381 INFO L78 Accepts]: Start accepts. Automaton has 230 states and 244 transitions. Word has length 74
[2018-01-30 00:13:05,381 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:13:05,382 INFO L432 AbstractCegarLoop]: Abstraction has 230 states and 244 transitions.
[2018-01-30 00:13:05,382 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states.
[2018-01-30 00:13:05,382 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 244 transitions.
[2018-01-30 00:13:05,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75
[2018-01-30 00:13:05,382 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:13:05,382 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:13:05,382 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:13:05,382 INFO L82 PathProgramCache]: Analyzing trace with hash -365207089, now seen corresponding path program 1 times
[2018-01-30 00:13:05,382 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:13:05,383 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:13:05,383 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:05,383 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:13:05,383 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:05,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:13:05,394 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:13:05,666 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked.
[2018-01-30 00:13:05,667 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:13:05,667 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:13:05,675 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:13:05,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:13:05,709 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:13:05,797 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked.
[2018-01-30 00:13:05,817 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences.
[2018-01-30 00:13:05,817 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 18
[2018-01-30 00:13:05,818 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states
[2018-01-30 00:13:05,818 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants.
[2018-01-30 00:13:05,818 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=302, Unknown=0, NotChecked=0, Total=342
[2018-01-30 00:13:05,818 INFO L87 Difference]: Start difference. First operand 230 states and 244 transitions. Second operand 19 states.
[2018-01-30 00:13:06,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:13:06,235 INFO L93 Difference]: Finished difference Result 241 states and 255 transitions.
[2018-01-30 00:13:06,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states.
[2018-01-30 00:13:06,235 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 74
[2018-01-30 00:13:06,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:13:06,236 INFO L225 Difference]: With dead ends: 241
[2018-01-30 00:13:06,237 INFO L226 Difference]: Without dead ends: 240
[2018-01-30 00:13:06,237 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 65 SyntacticMatches, 5 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=85, Invalid=671, Unknown=0, NotChecked=0, Total=756
[2018-01-30 00:13:06,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240 states.
[2018-01-30 00:13:06,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240 to 230.
[2018-01-30 00:13:06,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230 states.
[2018-01-30 00:13:06,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230 states to 230 states and 243 transitions.
[2018-01-30 00:13:06,257 INFO L78 Accepts]: Start accepts. Automaton has 230 states and 243 transitions. Word has length 74
[2018-01-30 00:13:06,258 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:13:06,258 INFO L432 AbstractCegarLoop]: Abstraction has 230 states and 243 transitions.
[2018-01-30 00:13:06,258 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states.
[2018-01-30 00:13:06,258 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 243 transitions.
[2018-01-30 00:13:06,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86
[2018-01-30 00:13:06,259 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:13:06,259 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:13:06,259 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:13:06,259 INFO L82 PathProgramCache]: Analyzing trace with hash 631651345, now seen corresponding path program 1 times
[2018-01-30 00:13:06,260 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:13:06,260 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:13:06,261 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:06,261 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:13:06,261 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:06,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:13:06,276 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:13:06,386 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2018-01-30 00:13:06,387 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-30 00:13:06,387 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2018-01-30 00:13:06,387 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states
[2018-01-30 00:13:06,387 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2018-01-30 00:13:06,387 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56
[2018-01-30 00:13:06,387 INFO L87 Difference]: Start difference. First operand 230 states and 243 transitions. Second operand 8 states.
[2018-01-30 00:13:07,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:13:07,128 INFO L93 Difference]: Finished difference Result 232 states and 245 transitions.
[2018-01-30 00:13:07,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states.
[2018-01-30 00:13:07,128 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 85
[2018-01-30 00:13:07,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:13:07,129 INFO L225 Difference]: With dead ends: 232
[2018-01-30 00:13:07,129 INFO L226 Difference]: Without dead ends: 228
[2018-01-30 00:13:07,130 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110
[2018-01-30 00:13:07,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states.
[2018-01-30 00:13:07,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 226.
[2018-01-30 00:13:07,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 226 states.
[2018-01-30 00:13:07,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 239 transitions.
[2018-01-30 00:13:07,145 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 239 transitions. Word has length 85
[2018-01-30 00:13:07,145 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:13:07,145 INFO L432 AbstractCegarLoop]: Abstraction has 226 states and 239 transitions.
[2018-01-30 00:13:07,145 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states.
[2018-01-30 00:13:07,145 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 239 transitions.
[2018-01-30 00:13:07,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86
[2018-01-30 00:13:07,145 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:13:07,146 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:13:07,146 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:13:07,146 INFO L82 PathProgramCache]: Analyzing trace with hash 631651346, now seen corresponding path program 1 times
[2018-01-30 00:13:07,146 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:13:07,146 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:13:07,147 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:07,147 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:13:07,147 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:07,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:13:07,165 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:13:07,466 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2018-01-30 00:13:07,467 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-30 00:13:07,467 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9
[2018-01-30 00:13:07,467 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states
[2018-01-30 00:13:07,467 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants.
[2018-01-30 00:13:07,467 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90
[2018-01-30 00:13:07,467 INFO L87 Difference]: Start difference. First operand 226 states and 239 transitions. Second operand 10 states.
[2018-01-30 00:13:07,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:13:07,927 INFO L93 Difference]: Finished difference Result 228 states and 241 transitions.
[2018-01-30 00:13:07,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states.
[2018-01-30 00:13:07,927 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 85
[2018-01-30 00:13:07,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:13:07,928 INFO L225 Difference]: With dead ends: 228
[2018-01-30 00:13:07,929 INFO L226 Difference]: Without dead ends: 224
[2018-01-30 00:13:07,929 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=38, Invalid=144, Unknown=0, NotChecked=0, Total=182
[2018-01-30 00:13:07,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states.
[2018-01-30 00:13:07,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 222.
[2018-01-30 00:13:07,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222 states.
[2018-01-30 00:13:07,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 235 transitions.
[2018-01-30 00:13:07,952 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 235 transitions. Word has length 85
[2018-01-30 00:13:07,952 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:13:07,952 INFO L432 AbstractCegarLoop]: Abstraction has 222 states and 235 transitions.
[2018-01-30 00:13:07,953 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states.
[2018-01-30 00:13:07,953 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 235 transitions.
[2018-01-30 00:13:07,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94
[2018-01-30 00:13:07,954 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:13:07,954 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:13:07,954 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:13:07,954 INFO L82 PathProgramCache]: Analyzing trace with hash -1875330636, now seen corresponding path program 1 times
[2018-01-30 00:13:07,954 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:13:07,954 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:13:07,955 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:07,955 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:13:07,955 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:07,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:13:07,970 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:13:08,023 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2018-01-30 00:13:08,024 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-30 00:13:08,024 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5
[2018-01-30 00:13:08,024 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states
[2018-01-30 00:13:08,024 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2018-01-30 00:13:08,025 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2018-01-30 00:13:08,025 INFO L87 Difference]: Start difference. First operand 222 states and 235 transitions. Second operand 5 states.
[2018-01-30 00:13:08,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:13:08,069 INFO L93 Difference]: Finished difference Result 304 states and 319 transitions.
[2018-01-30 00:13:08,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states.
[2018-01-30 00:13:08,070 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 93
[2018-01-30 00:13:08,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:13:08,071 INFO L225 Difference]: With dead ends: 304
[2018-01-30 00:13:08,072 INFO L226 Difference]: Without dead ends: 232
[2018-01-30 00:13:08,072 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30
[2018-01-30 00:13:08,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states.
[2018-01-30 00:13:08,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 228.
[2018-01-30 00:13:08,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228 states.
[2018-01-30 00:13:08,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 241 transitions.
[2018-01-30 00:13:08,098 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 241 transitions. Word has length 93
[2018-01-30 00:13:08,098 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:13:08,099 INFO L432 AbstractCegarLoop]: Abstraction has 228 states and 241 transitions.
[2018-01-30 00:13:08,099 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states.
[2018-01-30 00:13:08,099 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 241 transitions.
[2018-01-30 00:13:08,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94
[2018-01-30 00:13:08,100 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:13:08,100 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:13:08,100 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:13:08,100 INFO L82 PathProgramCache]: Analyzing trace with hash 1356884695, now seen corresponding path program 1 times
[2018-01-30 00:13:08,100 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:13:08,101 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:13:08,101 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:08,101 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:13:08,102 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:08,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:13:08,116 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:13:08,147 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2018-01-30 00:13:08,148 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-30 00:13:08,148 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4
[2018-01-30 00:13:08,149 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states
[2018-01-30 00:13:08,149 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2018-01-30 00:13:08,150 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2018-01-30 00:13:08,150 INFO L87 Difference]: Start difference. First operand 228 states and 241 transitions. Second operand 4 states.
[2018-01-30 00:13:08,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:13:08,193 INFO L93 Difference]: Finished difference Result 253 states and 267 transitions.
[2018-01-30 00:13:08,193 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states.
[2018-01-30 00:13:08,194 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93
[2018-01-30 00:13:08,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:13:08,195 INFO L225 Difference]: With dead ends: 253
[2018-01-30 00:13:08,195 INFO L226 Difference]: Without dead ends: 236
[2018-01-30 00:13:08,196 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2018-01-30 00:13:08,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236 states.
[2018-01-30 00:13:08,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236 to 236.
[2018-01-30 00:13:08,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236 states.
[2018-01-30 00:13:08,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236 states to 236 states and 249 transitions.
[2018-01-30 00:13:08,220 INFO L78 Accepts]: Start accepts. Automaton has 236 states and 249 transitions. Word has length 93
[2018-01-30 00:13:08,220 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:13:08,221 INFO L432 AbstractCegarLoop]: Abstraction has 236 states and 249 transitions.
[2018-01-30 00:13:08,221 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states.
[2018-01-30 00:13:08,221 INFO L276 IsEmpty]: Start isEmpty. Operand 236 states and 249 transitions.
[2018-01-30 00:13:08,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97
[2018-01-30 00:13:08,221 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:13:08,222 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:13:08,222 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:13:08,222 INFO L82 PathProgramCache]: Analyzing trace with hash -516165598, now seen corresponding path program 1 times
[2018-01-30 00:13:08,222 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:13:08,223 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:13:08,223 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:08,223 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:13:08,224 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:08,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:13:08,240 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:13:08,314 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2018-01-30 00:13:08,314 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-30 00:13:08,314 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7
[2018-01-30 00:13:08,314 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states
[2018-01-30 00:13:08,315 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants.
[2018-01-30 00:13:08,315 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56
[2018-01-30 00:13:08,315 INFO L87 Difference]: Start difference. First operand 236 states and 249 transitions. Second operand 8 states.
[2018-01-30 00:13:08,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:13:08,798 INFO L93 Difference]: Finished difference Result 284 states and 301 transitions.
[2018-01-30 00:13:08,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states.
[2018-01-30 00:13:08,799 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 96
[2018-01-30 00:13:08,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:13:08,800 INFO L225 Difference]: With dead ends: 284
[2018-01-30 00:13:08,800 INFO L226 Difference]: Without dead ends: 283
[2018-01-30 00:13:08,800 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156
[2018-01-30 00:13:08,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 283 states.
[2018-01-30 00:13:08,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 283 to 266.
[2018-01-30 00:13:08,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 266 states.
[2018-01-30 00:13:08,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 266 states to 266 states and 287 transitions.
[2018-01-30 00:13:08,820 INFO L78 Accepts]: Start accepts. Automaton has 266 states and 287 transitions. Word has length 96
[2018-01-30 00:13:08,820 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:13:08,820 INFO L432 AbstractCegarLoop]: Abstraction has 266 states and 287 transitions.
[2018-01-30 00:13:08,820 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states.
[2018-01-30 00:13:08,820 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 287 transitions.
[2018-01-30 00:13:08,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97
[2018-01-30 00:13:08,821 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:13:08,821 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:13:08,821 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:13:08,821 INFO L82 PathProgramCache]: Analyzing trace with hash -516165597, now seen corresponding path program 1 times
[2018-01-30 00:13:08,821 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:13:08,821 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:13:08,822 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:08,822 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:13:08,822 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:08,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:13:08,835 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:13:09,206 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked.
[2018-01-30 00:13:09,206 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:13:09,206 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:13:09,212 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:13:09,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:13:09,247 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:13:09,360 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2018-01-30 00:13:09,381 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-01-30 00:13:09,381 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [17] total 23
[2018-01-30 00:13:09,382 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states
[2018-01-30 00:13:09,382 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants.
[2018-01-30 00:13:09,382 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=499, Unknown=0, NotChecked=0, Total=552
[2018-01-30 00:13:09,382 INFO L87 Difference]: Start difference. First operand 266 states and 287 transitions. Second operand 24 states.
[2018-01-30 00:13:10,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:13:10,399 INFO L93 Difference]: Finished difference Result 296 states and 311 transitions.
[2018-01-30 00:13:10,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states.
[2018-01-30 00:13:10,400 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 96
[2018-01-30 00:13:10,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:13:10,401 INFO L225 Difference]: With dead ends: 296
[2018-01-30 00:13:10,402 INFO L226 Difference]: Without dead ends: 295
[2018-01-30 00:13:10,402 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 146 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=121, Invalid=1211, Unknown=0, NotChecked=0, Total=1332
[2018-01-30 00:13:10,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 295 states.
[2018-01-30 00:13:10,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 295 to 276.
[2018-01-30 00:13:10,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 276 states.
[2018-01-30 00:13:10,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 276 states to 276 states and 297 transitions.
[2018-01-30 00:13:10,431 INFO L78 Accepts]: Start accepts. Automaton has 276 states and 297 transitions. Word has length 96
[2018-01-30 00:13:10,431 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:13:10,431 INFO L432 AbstractCegarLoop]: Abstraction has 276 states and 297 transitions.
[2018-01-30 00:13:10,431 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states.
[2018-01-30 00:13:10,431 INFO L276 IsEmpty]: Start isEmpty. Operand 276 states and 297 transitions.
[2018-01-30 00:13:10,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97
[2018-01-30 00:13:10,432 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:13:10,433 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:13:10,433 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:13:10,433 INFO L82 PathProgramCache]: Analyzing trace with hash -836007155, now seen corresponding path program 1 times
[2018-01-30 00:13:10,433 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:13:10,433 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:13:10,434 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:10,434 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:13:10,434 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:10,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:13:10,448 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:13:10,536 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2018-01-30 00:13:10,536 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2018-01-30 00:13:10,537 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6
[2018-01-30 00:13:10,537 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states
[2018-01-30 00:13:10,537 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants.
[2018-01-30 00:13:10,537 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30
[2018-01-30 00:13:10,537 INFO L87 Difference]: Start difference. First operand 276 states and 297 transitions. Second operand 6 states.
[2018-01-30 00:13:10,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization.
[2018-01-30 00:13:10,580 INFO L93 Difference]: Finished difference Result 347 states and 368 transitions.
[2018-01-30 00:13:10,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states.
[2018-01-30 00:13:10,581 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96
[2018-01-30 00:13:10,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted.
[2018-01-30 00:13:10,582 INFO L225 Difference]: With dead ends: 347
[2018-01-30 00:13:10,582 INFO L226 Difference]: Without dead ends: 263
[2018-01-30 00:13:10,583 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56
[2018-01-30 00:13:10,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 263 states.
[2018-01-30 00:13:10,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 263 to 263.
[2018-01-30 00:13:10,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 263 states.
[2018-01-30 00:13:10,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 263 states to 263 states and 281 transitions.
[2018-01-30 00:13:10,600 INFO L78 Accepts]: Start accepts. Automaton has 263 states and 281 transitions. Word has length 96
[2018-01-30 00:13:10,600 INFO L84 Accepts]: Finished accepts. word is rejected.
[2018-01-30 00:13:10,600 INFO L432 AbstractCegarLoop]: Abstraction has 263 states and 281 transitions.
[2018-01-30 00:13:10,600 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states.
[2018-01-30 00:13:10,600 INFO L276 IsEmpty]: Start isEmpty. Operand 263 states and 281 transitions.
[2018-01-30 00:13:10,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102
[2018-01-30 00:13:10,601 INFO L342 BasicCegarLoop]: Found error trace
[2018-01-30 00:13:10,601 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2018-01-30 00:13:10,601 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ldv_arvo_init_specialsErr1RequiresViolation, ldv_arvo_init_specialsErr3RequiresViolation, ldv_arvo_init_specialsErr7RequiresViolation, ldv_arvo_init_specialsErr2RequiresViolation, ldv_arvo_init_specialsErr4RequiresViolation, ldv_arvo_init_specialsErr0RequiresViolation, ldv_arvo_init_specialsErr6RequiresViolation, ldv_arvo_init_specialsErr5RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, mainErr0EnsuresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_arvo_init_arvo_device_structErr0RequiresViolation, ldv_arvo_init_arvo_device_structErr2RequiresViolation, ldv_arvo_init_arvo_device_structErr4RequiresViolation, ldv_arvo_init_arvo_device_structErr5RequiresViolation, ldv_arvo_init_arvo_device_structErr1RequiresViolation, ldv_arvo_init_arvo_device_structErr3RequiresViolation, lvd_arvo_remove_specialsErr4RequiresViolation, lvd_arvo_remove_specialsErr1RequiresViolation, lvd_arvo_remove_specialsErr0RequiresViolation, lvd_arvo_remove_specialsErr6RequiresViolation, lvd_arvo_remove_specialsErr7RequiresViolation, lvd_arvo_remove_specialsErr5RequiresViolation, lvd_arvo_remove_specialsErr2RequiresViolation, lvd_arvo_remove_specialsErr3RequiresViolation]===
[2018-01-30 00:13:10,602 INFO L82 PathProgramCache]: Analyzing trace with hash 1869637385, now seen corresponding path program 1 times
[2018-01-30 00:13:10,602 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS
[2018-01-30 00:13:10,602 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy
[2018-01-30 00:13:10,602 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:10,602 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:13:10,603 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order
[2018-01-30 00:13:10,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:13:10,626 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs.
[2018-01-30 00:13:11,254 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked.
[2018-01-30 00:13:11,255 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more.
[2018-01-30 00:13:11,255 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP
No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000
[2018-01-30 00:13:11,260 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2018-01-30 00:13:11,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat
[2018-01-30 00:13:11,300 INFO L270 TraceCheckSpWp]: Computing forward predicates...
[2018-01-30 00:13:11,320 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10
[2018-01-30 00:13:11,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9
[2018-01-30 00:13:11,326 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:13:11,327 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:13:11,330 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:13:11,331 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:11
[2018-01-30 00:13:11,438 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_dev_set_drvdata_~data.base Int) (ldv_dev_set_drvdata_~dev.offset Int)) (and (= |c_#memory_$Pointer$.base| (store |c_old(#memory_$Pointer$.base)| |c_ldv_dev_set_drvdata_#in~dev.base| (store (select |c_old(#memory_$Pointer$.base)| |c_ldv_dev_set_drvdata_#in~dev.base|) (+ ldv_dev_set_drvdata_~dev.offset 4) ldv_dev_set_drvdata_~data.base))) (<= ldv_dev_set_drvdata_~dev.offset |c_ldv_dev_set_drvdata_#in~dev.offset|))) is different from true
[2018-01-30 00:13:11,442 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_dev_set_drvdata_~data.base Int) (ldv_dev_set_drvdata_~dev.offset Int)) (and (<= ldv_dev_set_drvdata_~dev.offset |c_ldv_hid_set_drvdata_#in~hdev.offset|) (= |c_#memory_$Pointer$.base| (store |c_old(#memory_$Pointer$.base)| |c_ldv_hid_set_drvdata_#in~hdev.base| (store (select |c_old(#memory_$Pointer$.base)| |c_ldv_hid_set_drvdata_#in~hdev.base|) (+ ldv_dev_set_drvdata_~dev.offset 4) ldv_dev_set_drvdata_~data.base))))) is different from true
[2018-01-30 00:13:11,527 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20
[2018-01-30 00:13:11,529 INFO L700 Elim1Store]: detected not equals via solver
[2018-01-30 00:13:11,531 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 29
[2018-01-30 00:13:11,531 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:13:11,535 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:13:11,543 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:13:11,543 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:28, output treesize:11
[2018-01-30 00:13:11,636 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17
[2018-01-30 00:13:11,640 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5
[2018-01-30 00:13:11,641 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts.
[2018-01-30 00:13:11,642 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:13:11,643 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts.
[2018-01-30 00:13:11,643 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:21, output treesize:5
[2018-01-30 00:13:11,671 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked.
[2018-01-30 00:13:11,701 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences.
[2018-01-30 00:13:11,701 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [24] total 38
[2018-01-30 00:13:11,702 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states
[2018-01-30 00:13:11,702 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants.
[2018-01-30 00:13:11,702 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=131, Invalid=1192, Unknown=17, NotChecked=142, Total=1482
[2018-01-30 00:13:11,702 INFO L87 Difference]: Start difference. First operand 263 states and 281 transitions. Second operand 39 states.
Received shutdown request...
[2018-01-30 00:13:12,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states.
[2018-01-30 00:13:12,056 WARN L491 AbstractCegarLoop]: Verification canceled
[2018-01-30 00:13:12,061 WARN L185 ceAbstractionStarter]: Timeout
[2018-01-30 00:13:12,061 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 30.01 12:13:12 BoogieIcfgContainer
[2018-01-30 00:13:12,061 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction----------------------------
[2018-01-30 00:13:12,062 INFO L168 Benchmark]: Toolchain (without parser) took 134555.06 ms. Allocated memory was 302.5 MB in the beginning and 788.5 MB in the end (delta: 486.0 MB). Free memory was 261.5 MB in the beginning and 667.8 MB in the end (delta: -406.3 MB). Peak memory consumption was 79.7 MB. Max. memory is 5.3 GB.
[2018-01-30 00:13:12,063 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 302.5 MB. Free memory is still 268.5 MB. There was no memory consumed. Max. memory is 5.3 GB.
[2018-01-30 00:13:12,063 INFO L168 Benchmark]: CACSL2BoogieTranslator took 245.05 ms. Allocated memory is still 302.5 MB. Free memory was 261.5 MB in the beginning and 246.4 MB in the end (delta: 15.2 MB). Peak memory consumption was 15.2 MB. Max. memory is 5.3 GB.
[2018-01-30 00:13:12,063 INFO L168 Benchmark]: Boogie Preprocessor took 41.95 ms. Allocated memory is still 302.5 MB. Free memory was 246.4 MB in the beginning and 244.4 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB.
[2018-01-30 00:13:12,064 INFO L168 Benchmark]: RCFGBuilder took 588.17 ms. Allocated memory is still 302.5 MB. Free memory was 244.4 MB in the beginning and 198.4 MB in the end (delta: 46.0 MB). Peak memory consumption was 46.0 MB. Max. memory is 5.3 GB.
[2018-01-30 00:13:12,064 INFO L168 Benchmark]: TraceAbstraction took 133672.07 ms. Allocated memory was 302.5 MB in the beginning and 788.5 MB in the end (delta: 486.0 MB). Free memory was 197.4 MB in the beginning and 667.8 MB in the end (delta: -470.5 MB). Peak memory consumption was 15.6 MB. Max. memory is 5.3 GB.
[2018-01-30 00:13:12,066 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] #######################
--- Results ---
* Results from de.uni_freiburg.informatik.ultimate.core:
- StatisticsResult: Toolchain Benchmarks
Benchmark results are:
* CDTParser took 0.12 ms. Allocated memory is still 302.5 MB. Free memory is still 268.5 MB. There was no memory consumed. Max. memory is 5.3 GB.
* CACSL2BoogieTranslator took 245.05 ms. Allocated memory is still 302.5 MB. Free memory was 261.5 MB in the beginning and 246.4 MB in the end (delta: 15.2 MB). Peak memory consumption was 15.2 MB. Max. memory is 5.3 GB.
* Boogie Preprocessor took 41.95 ms. Allocated memory is still 302.5 MB. Free memory was 246.4 MB in the beginning and 244.4 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB.
* RCFGBuilder took 588.17 ms. Allocated memory is still 302.5 MB. Free memory was 244.4 MB in the beginning and 198.4 MB in the end (delta: 46.0 MB). Peak memory consumption was 46.0 MB. Max. memory is 5.3 GB.
* TraceAbstraction took 133672.07 ms. Allocated memory was 302.5 MB in the beginning and 788.5 MB in the end (delta: 486.0 MB). Free memory was 197.4 MB in the beginning and 667.8 MB in the end (delta: -470.5 MB). Peak memory consumption was 15.6 MB. Max. memory is 5.3 GB.
* Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1463). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1479). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1463). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1479). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1464). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1533]: Timeout (TraceAbstraction)
Unable to prove that all allocated memory was freed (line 1533). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1526). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1513). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1513). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1524). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1524). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1514). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1528). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1524). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1526). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1528). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1516). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1514). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1524). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1454). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1455). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1456). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1456). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1454). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1455). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1484). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1484). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1490). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that free always succeeds (line 1490). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction)
Unable to prove that pointer dereference always succeeds (line 1486). Cancelled while BasicCegarLoop was constructing difference of abstraction (263states) and interpolant automaton (currently 10 states, 39 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 17.
- StatisticsResult: Ultimate Automizer benchmark data
CFG has 17 procedures, 225 locations, 45 error locations. TIMEOUT Result, 133.6s OverallTime, 35 OverallIterations, 3 TraceHistogramMax, 94.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 6732 SDtfs, 4058 SDslu, 39016 SDs, 0 SdLazy, 30403 SolverSat, 634 SolverUnsat, 82 SolverUnknown, 0 SolverNotchecked, 57.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1619 GetRequests, 952 SyntacticMatches, 51 SemanticMatches, 615 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 3269 ImplicationChecksByTransitivity, 64.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=276occurred in iteration=33, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.6s AutomataMinimizationTime, 34 MinimizatonAttempts, 519 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 0.7s SatisfiabilityAnalysisTime, 35.9s InterpolantComputationTime, 3063 NumberOfCodeBlocks, 3063 NumberOfCodeBlocksAsserted, 56 NumberOfCheckSat, 3008 ConstructedInterpolants, 83 QuantifiedInterpolants, 1427812 SizeOfPredicates, 202 NumberOfNonLiveVariables, 3829 ConjunctsInSsa, 653 ConjunctsInUnsatCore, 55 InterpolantComputations, 22 PerfectInterpolantSequences, 873/1040 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available
RESULT: Ultimate could not prove your program: Timeout
Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test15_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-30_00-13-12-074.csv
Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test15_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-30_00-13-12-074.csv
Completed graceful shutdown