java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-1cceb4a [2018-01-30 00:07:53,401 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-30 00:07:53,402 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-30 00:07:53,417 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-30 00:07:53,417 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-30 00:07:53,418 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-30 00:07:53,419 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-30 00:07:53,421 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-30 00:07:53,423 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-30 00:07:53,424 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-30 00:07:53,425 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-30 00:07:53,425 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-30 00:07:53,426 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-30 00:07:53,427 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-30 00:07:53,428 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-30 00:07:53,430 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-30 00:07:53,432 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-30 00:07:53,434 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-30 00:07:53,435 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-30 00:07:53,437 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-30 00:07:53,439 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-30 00:07:53,444 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-30 00:07:53,444 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-30 00:07:53,445 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-30 00:07:53,452 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-30 00:07:53,453 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-30 00:07:53,454 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-30 00:07:53,454 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-30 00:07:53,454 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-30 00:07:53,454 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-30 00:07:53,454 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-30 00:07:53,454 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-30 00:07:53,455 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-30 00:07:53,455 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-30 00:07:53,455 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-30 00:07:53,455 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-30 00:07:53,455 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-30 00:07:53,455 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-30 00:07:53,455 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-30 00:07:53,456 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-30 00:07:53,456 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-30 00:07:53,456 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-30 00:07:53,456 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-30 00:07:53,456 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-30 00:07:53,456 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-30 00:07:53,456 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-30 00:07:53,457 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-30 00:07:53,457 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-30 00:07:53,457 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-30 00:07:53,457 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-30 00:07:53,457 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-30 00:07:53,458 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-30 00:07:53,458 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-30 00:07:53,458 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-30 00:07:53,458 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-30 00:07:53,458 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-30 00:07:53,459 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-30 00:07:53,459 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-30 00:07:53,490 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-30 00:07:53,501 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-30 00:07:53,503 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-30 00:07:53,505 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-30 00:07:53,505 INFO L276 PluginConnector]: CDTParser initialized [2018-01-30 00:07:53,506 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-01-30 00:07:53,683 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-30 00:07:53,689 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-30 00:07:53,690 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-30 00:07:53,690 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-30 00:07:53,695 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-30 00:07:53,696 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 30.01 12:07:53" (1/1) ... [2018-01-30 00:07:53,698 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@715ee194 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:07:53, skipping insertion in model container [2018-01-30 00:07:53,699 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 30.01 12:07:53" (1/1) ... [2018-01-30 00:07:53,712 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-30 00:07:53,762 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-30 00:07:53,889 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-30 00:07:53,916 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-30 00:07:53,927 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:07:53 WrapperNode [2018-01-30 00:07:53,928 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-30 00:07:53,928 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-30 00:07:53,928 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-30 00:07:53,928 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-30 00:07:53,941 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:07:53" (1/1) ... [2018-01-30 00:07:53,941 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:07:53" (1/1) ... [2018-01-30 00:07:53,954 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:07:53" (1/1) ... [2018-01-30 00:07:53,954 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:07:53" (1/1) ... [2018-01-30 00:07:53,964 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:07:53" (1/1) ... [2018-01-30 00:07:53,967 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:07:53" (1/1) ... [2018-01-30 00:07:53,968 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:07:53" (1/1) ... [2018-01-30 00:07:53,971 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-30 00:07:53,972 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-30 00:07:53,972 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-30 00:07:53,972 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-30 00:07:53,973 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:07:53" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-30 00:07:54,017 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-30 00:07:54,017 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-30 00:07:54,017 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-30 00:07:54,017 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-30 00:07:54,017 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-30 00:07:54,017 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-01-30 00:07:54,017 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-30 00:07:54,018 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-30 00:07:54,018 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-30 00:07:54,018 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-01-30 00:07:54,018 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-30 00:07:54,018 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-30 00:07:54,018 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-30 00:07:54,018 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-30 00:07:54,018 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-01-30 00:07:54,018 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-30 00:07:54,018 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-30 00:07:54,019 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-30 00:07:54,019 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-30 00:07:54,019 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-30 00:07:54,019 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-30 00:07:54,019 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-30 00:07:54,019 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-30 00:07:54,019 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-30 00:07:54,019 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-30 00:07:54,019 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-30 00:07:54,019 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-30 00:07:54,020 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-30 00:07:54,020 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-30 00:07:54,020 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-30 00:07:54,020 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-30 00:07:54,020 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-30 00:07:54,020 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-30 00:07:54,020 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-30 00:07:54,020 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-30 00:07:54,020 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-01-30 00:07:54,020 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-30 00:07:54,021 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-30 00:07:54,021 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-30 00:07:54,021 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-30 00:07:54,021 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-01-30 00:07:54,021 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-30 00:07:54,021 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-30 00:07:54,021 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-30 00:07:54,021 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-30 00:07:54,021 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-01-30 00:07:54,021 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-30 00:07:54,021 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-30 00:07:54,022 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-30 00:07:54,022 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-30 00:07:54,022 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-30 00:07:54,022 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-30 00:07:54,022 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-30 00:07:54,335 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-30 00:07:54,472 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-30 00:07:54,473 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 30.01 12:07:54 BoogieIcfgContainer [2018-01-30 00:07:54,473 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-30 00:07:54,474 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-30 00:07:54,474 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-30 00:07:54,476 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-30 00:07:54,477 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 30.01 12:07:53" (1/3) ... [2018-01-30 00:07:54,477 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7228f6db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 30.01 12:07:54, skipping insertion in model container [2018-01-30 00:07:54,478 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:07:53" (2/3) ... [2018-01-30 00:07:54,478 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7228f6db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 30.01 12:07:54, skipping insertion in model container [2018-01-30 00:07:54,478 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 30.01 12:07:54" (3/3) ... [2018-01-30 00:07:54,480 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-01-30 00:07:54,486 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-30 00:07:54,495 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-01-30 00:07:54,535 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-30 00:07:54,535 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-30 00:07:54,535 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-30 00:07:54,535 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-30 00:07:54,535 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-30 00:07:54,535 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-30 00:07:54,535 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-30 00:07:54,536 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-30 00:07:54,536 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-30 00:07:54,555 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states. [2018-01-30 00:07:54,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-30 00:07:54,563 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:07:54,564 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:07:54,564 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:07:54,568 INFO L82 PathProgramCache]: Analyzing trace with hash -1627230509, now seen corresponding path program 1 times [2018-01-30 00:07:54,569 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:07:54,570 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:07:54,618 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:54,618 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:07:54,618 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:54,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:07:54,676 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:07:54,889 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:07:54,891 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:07:54,892 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-30 00:07:54,893 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-30 00:07:54,903 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-30 00:07:54,903 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-30 00:07:54,905 INFO L87 Difference]: Start difference. First operand 175 states. Second operand 5 states. [2018-01-30 00:07:55,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:07:55,005 INFO L93 Difference]: Finished difference Result 332 states and 347 transitions. [2018-01-30 00:07:55,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-30 00:07:55,007 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-30 00:07:55,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:07:55,019 INFO L225 Difference]: With dead ends: 332 [2018-01-30 00:07:55,019 INFO L226 Difference]: Without dead ends: 179 [2018-01-30 00:07:55,022 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-30 00:07:55,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-30 00:07:55,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 177. [2018-01-30 00:07:55,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-01-30 00:07:55,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 185 transitions. [2018-01-30 00:07:55,059 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 185 transitions. Word has length 22 [2018-01-30 00:07:55,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:07:55,060 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 185 transitions. [2018-01-30 00:07:55,060 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-30 00:07:55,060 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 185 transitions. [2018-01-30 00:07:55,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-30 00:07:55,061 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:07:55,061 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:07:55,061 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:07:55,061 INFO L82 PathProgramCache]: Analyzing trace with hash -1951140373, now seen corresponding path program 1 times [2018-01-30 00:07:55,061 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:07:55,061 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:07:55,063 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:55,063 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:07:55,064 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:55,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:07:55,087 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:07:55,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:07:55,143 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:07:55,143 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-30 00:07:55,144 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-30 00:07:55,145 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-30 00:07:55,145 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-30 00:07:55,145 INFO L87 Difference]: Start difference. First operand 177 states and 185 transitions. Second operand 6 states. [2018-01-30 00:07:55,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:07:55,376 INFO L93 Difference]: Finished difference Result 180 states and 188 transitions. [2018-01-30 00:07:55,376 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-30 00:07:55,377 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-01-30 00:07:55,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:07:55,379 INFO L225 Difference]: With dead ends: 180 [2018-01-30 00:07:55,380 INFO L226 Difference]: Without dead ends: 179 [2018-01-30 00:07:55,382 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-30 00:07:55,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-30 00:07:55,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 176. [2018-01-30 00:07:55,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-30 00:07:55,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 184 transitions. [2018-01-30 00:07:55,398 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 184 transitions. Word has length 23 [2018-01-30 00:07:55,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:07:55,398 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 184 transitions. [2018-01-30 00:07:55,398 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-30 00:07:55,398 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 184 transitions. [2018-01-30 00:07:55,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-30 00:07:55,399 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:07:55,399 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:07:55,399 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:07:55,400 INFO L82 PathProgramCache]: Analyzing trace with hash -1951140372, now seen corresponding path program 1 times [2018-01-30 00:07:55,400 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:07:55,400 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:07:55,401 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:55,402 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:07:55,402 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:55,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:07:55,422 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:07:55,714 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:07:55,714 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:07:55,714 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-30 00:07:55,714 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-30 00:07:55,715 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-30 00:07:55,715 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-30 00:07:55,715 INFO L87 Difference]: Start difference. First operand 176 states and 184 transitions. Second operand 7 states. [2018-01-30 00:07:55,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:07:55,988 INFO L93 Difference]: Finished difference Result 179 states and 187 transitions. [2018-01-30 00:07:55,988 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-30 00:07:55,988 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-01-30 00:07:55,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:07:55,990 INFO L225 Difference]: With dead ends: 179 [2018-01-30 00:07:55,991 INFO L226 Difference]: Without dead ends: 178 [2018-01-30 00:07:55,991 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-01-30 00:07:55,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-01-30 00:07:56,003 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 175. [2018-01-30 00:07:56,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-01-30 00:07:56,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 183 transitions. [2018-01-30 00:07:56,005 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 183 transitions. Word has length 23 [2018-01-30 00:07:56,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:07:56,005 INFO L432 AbstractCegarLoop]: Abstraction has 175 states and 183 transitions. [2018-01-30 00:07:56,005 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-30 00:07:56,006 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 183 transitions. [2018-01-30 00:07:56,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-30 00:07:56,007 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:07:56,007 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:07:56,007 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:07:56,008 INFO L82 PathProgramCache]: Analyzing trace with hash -774558826, now seen corresponding path program 1 times [2018-01-30 00:07:56,008 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:07:56,008 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:07:56,009 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:56,010 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:07:56,010 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:56,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:07:56,028 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:07:56,128 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:07:56,129 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:07:56,129 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-30 00:07:56,129 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-30 00:07:56,129 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-30 00:07:56,130 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-30 00:07:56,130 INFO L87 Difference]: Start difference. First operand 175 states and 183 transitions. Second operand 7 states. [2018-01-30 00:07:56,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:07:56,222 INFO L93 Difference]: Finished difference Result 291 states and 303 transitions. [2018-01-30 00:07:56,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-30 00:07:56,222 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-01-30 00:07:56,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:07:56,225 INFO L225 Difference]: With dead ends: 291 [2018-01-30 00:07:56,225 INFO L226 Difference]: Without dead ends: 192 [2018-01-30 00:07:56,226 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-01-30 00:07:56,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2018-01-30 00:07:56,241 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 185. [2018-01-30 00:07:56,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-01-30 00:07:56,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 193 transitions. [2018-01-30 00:07:56,243 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 193 transitions. Word has length 36 [2018-01-30 00:07:56,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:07:56,244 INFO L432 AbstractCegarLoop]: Abstraction has 185 states and 193 transitions. [2018-01-30 00:07:56,244 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-30 00:07:56,244 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 193 transitions. [2018-01-30 00:07:56,246 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-30 00:07:56,246 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:07:56,246 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:07:56,246 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:07:56,246 INFO L82 PathProgramCache]: Analyzing trace with hash -2065483374, now seen corresponding path program 1 times [2018-01-30 00:07:56,247 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:07:56,247 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:07:56,248 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:56,248 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:07:56,248 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:56,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:07:56,268 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:07:56,372 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:07:56,372 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:07:56,372 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-30 00:07:56,373 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-30 00:07:56,373 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-30 00:07:56,373 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-30 00:07:56,373 INFO L87 Difference]: Start difference. First operand 185 states and 193 transitions. Second operand 10 states. [2018-01-30 00:07:56,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:07:56,629 INFO L93 Difference]: Finished difference Result 185 states and 193 transitions. [2018-01-30 00:07:56,631 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-30 00:07:56,631 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 39 [2018-01-30 00:07:56,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:07:56,633 INFO L225 Difference]: With dead ends: 185 [2018-01-30 00:07:56,633 INFO L226 Difference]: Without dead ends: 184 [2018-01-30 00:07:56,634 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-30 00:07:56,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-30 00:07:56,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 184. [2018-01-30 00:07:56,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-01-30 00:07:56,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 192 transitions. [2018-01-30 00:07:56,644 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 192 transitions. Word has length 39 [2018-01-30 00:07:56,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:07:56,645 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 192 transitions. [2018-01-30 00:07:56,645 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-30 00:07:56,645 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 192 transitions. [2018-01-30 00:07:56,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-30 00:07:56,646 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:07:56,647 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:07:56,647 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:07:56,647 INFO L82 PathProgramCache]: Analyzing trace with hash -2065483373, now seen corresponding path program 1 times [2018-01-30 00:07:56,647 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:07:56,647 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:07:56,648 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:56,649 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:07:56,649 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:56,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:07:56,664 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:07:56,693 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:07:56,694 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:07:56,732 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-30 00:07:56,733 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-30 00:07:56,733 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-30 00:07:56,733 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-30 00:07:56,734 INFO L87 Difference]: Start difference. First operand 184 states and 192 transitions. Second operand 4 states. [2018-01-30 00:07:56,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:07:56,777 INFO L93 Difference]: Finished difference Result 324 states and 338 transitions. [2018-01-30 00:07:56,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-30 00:07:56,777 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2018-01-30 00:07:56,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:07:56,779 INFO L225 Difference]: With dead ends: 324 [2018-01-30 00:07:56,779 INFO L226 Difference]: Without dead ends: 188 [2018-01-30 00:07:56,780 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-30 00:07:56,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-01-30 00:07:56,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 185. [2018-01-30 00:07:56,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-01-30 00:07:56,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 193 transitions. [2018-01-30 00:07:56,791 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 193 transitions. Word has length 39 [2018-01-30 00:07:56,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:07:56,791 INFO L432 AbstractCegarLoop]: Abstraction has 185 states and 193 transitions. [2018-01-30 00:07:56,792 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-30 00:07:56,792 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 193 transitions. [2018-01-30 00:07:56,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-30 00:07:56,793 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:07:56,793 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:07:56,794 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:07:56,794 INFO L82 PathProgramCache]: Analyzing trace with hash 1097981657, now seen corresponding path program 1 times [2018-01-30 00:07:56,794 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:07:56,794 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:07:56,795 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:56,795 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:07:56,795 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:56,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:07:56,806 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:07:56,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:07:56,856 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:07:56,856 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-30 00:07:56,856 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-30 00:07:56,856 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-30 00:07:56,857 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-30 00:07:56,857 INFO L87 Difference]: Start difference. First operand 185 states and 193 transitions. Second operand 3 states. [2018-01-30 00:07:56,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:07:56,937 INFO L93 Difference]: Finished difference Result 208 states and 218 transitions. [2018-01-30 00:07:56,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-30 00:07:56,938 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2018-01-30 00:07:56,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:07:56,940 INFO L225 Difference]: With dead ends: 208 [2018-01-30 00:07:56,940 INFO L226 Difference]: Without dead ends: 204 [2018-01-30 00:07:56,940 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-30 00:07:56,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 204 states. [2018-01-30 00:07:56,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 204 to 204. [2018-01-30 00:07:56,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-01-30 00:07:56,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 214 transitions. [2018-01-30 00:07:56,953 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 214 transitions. Word has length 41 [2018-01-30 00:07:56,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:07:56,954 INFO L432 AbstractCegarLoop]: Abstraction has 204 states and 214 transitions. [2018-01-30 00:07:56,954 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-30 00:07:56,954 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 214 transitions. [2018-01-30 00:07:56,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-30 00:07:56,956 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:07:56,957 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:07:56,957 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:07:56,957 INFO L82 PathProgramCache]: Analyzing trace with hash -2110626927, now seen corresponding path program 1 times [2018-01-30 00:07:56,957 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:07:56,957 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:07:56,959 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:56,959 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:07:56,959 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:56,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:07:56,976 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:07:57,040 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:07:57,040 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:07:57,040 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:07:57,060 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:07:57,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:07:57,129 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:07:57,181 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:07:57,202 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:07:57,202 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-01-30 00:07:57,203 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-30 00:07:57,203 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-30 00:07:57,203 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-01-30 00:07:57,203 INFO L87 Difference]: Start difference. First operand 204 states and 214 transitions. Second operand 6 states. [2018-01-30 00:07:57,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:07:57,274 INFO L93 Difference]: Finished difference Result 358 states and 374 transitions. [2018-01-30 00:07:57,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-30 00:07:57,275 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2018-01-30 00:07:57,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:07:57,276 INFO L225 Difference]: With dead ends: 358 [2018-01-30 00:07:57,277 INFO L226 Difference]: Without dead ends: 211 [2018-01-30 00:07:57,278 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-30 00:07:57,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2018-01-30 00:07:57,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 208. [2018-01-30 00:07:57,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-01-30 00:07:57,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 218 transitions. [2018-01-30 00:07:57,292 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 218 transitions. Word has length 43 [2018-01-30 00:07:57,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:07:57,292 INFO L432 AbstractCegarLoop]: Abstraction has 208 states and 218 transitions. [2018-01-30 00:07:57,292 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-30 00:07:57,293 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 218 transitions. [2018-01-30 00:07:57,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-30 00:07:57,294 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:07:57,294 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:07:57,294 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:07:57,294 INFO L82 PathProgramCache]: Analyzing trace with hash 475599041, now seen corresponding path program 1 times [2018-01-30 00:07:57,294 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:07:57,295 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:07:57,296 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:57,296 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:07:57,296 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:57,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:07:57,309 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:07:57,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:07:57,384 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:07:57,384 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-30 00:07:57,385 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-30 00:07:57,385 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-30 00:07:57,385 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-30 00:07:57,385 INFO L87 Difference]: Start difference. First operand 208 states and 218 transitions. Second operand 6 states. [2018-01-30 00:07:57,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:07:57,552 INFO L93 Difference]: Finished difference Result 298 states and 309 transitions. [2018-01-30 00:07:57,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-30 00:07:57,553 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2018-01-30 00:07:57,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:07:57,554 INFO L225 Difference]: With dead ends: 298 [2018-01-30 00:07:57,554 INFO L226 Difference]: Without dead ends: 202 [2018-01-30 00:07:57,555 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-30 00:07:57,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2018-01-30 00:07:57,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 202. [2018-01-30 00:07:57,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202 states. [2018-01-30 00:07:57,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 210 transitions. [2018-01-30 00:07:57,570 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 210 transitions. Word has length 42 [2018-01-30 00:07:57,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:07:57,571 INFO L432 AbstractCegarLoop]: Abstraction has 202 states and 210 transitions. [2018-01-30 00:07:57,571 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-30 00:07:57,571 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 210 transitions. [2018-01-30 00:07:57,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-30 00:07:57,572 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:07:57,573 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:07:57,573 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:07:57,573 INFO L82 PathProgramCache]: Analyzing trace with hash 483411827, now seen corresponding path program 1 times [2018-01-30 00:07:57,573 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:07:57,574 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:07:57,575 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:57,575 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:07:57,576 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:57,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:07:57,589 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:07:57,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:07:57,699 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:07:57,699 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-30 00:07:57,700 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-30 00:07:57,700 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-30 00:07:57,700 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-30 00:07:57,700 INFO L87 Difference]: Start difference. First operand 202 states and 210 transitions. Second operand 7 states. [2018-01-30 00:07:57,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:07:57,752 INFO L93 Difference]: Finished difference Result 289 states and 296 transitions. [2018-01-30 00:07:57,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-30 00:07:57,752 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 48 [2018-01-30 00:07:57,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:07:57,754 INFO L225 Difference]: With dead ends: 289 [2018-01-30 00:07:57,754 INFO L226 Difference]: Without dead ends: 184 [2018-01-30 00:07:57,755 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-01-30 00:07:57,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-30 00:07:57,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 171. [2018-01-30 00:07:57,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-01-30 00:07:57,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 177 transitions. [2018-01-30 00:07:57,765 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 177 transitions. Word has length 48 [2018-01-30 00:07:57,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:07:57,765 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 177 transitions. [2018-01-30 00:07:57,765 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-30 00:07:57,765 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 177 transitions. [2018-01-30 00:07:57,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-30 00:07:57,766 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:07:57,766 INFO L350 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:07:57,766 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:07:57,767 INFO L82 PathProgramCache]: Analyzing trace with hash -1883218289, now seen corresponding path program 2 times [2018-01-30 00:07:57,767 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:07:57,767 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:07:57,768 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:57,768 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:07:57,768 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:07:57,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:07:57,784 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:07:57,826 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:07:57,826 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:07:57,826 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:07:57,835 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:07:57,868 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:07:57,871 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:07:57,877 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:07:57,912 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:07:57,915 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:07:57,951 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:07:57,951 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:07:57,966 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:07:57,967 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:07:58,666 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-30 00:07:58,687 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:07:58,687 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-01-30 00:07:58,687 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-30 00:07:58,688 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-30 00:07:58,688 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-01-30 00:07:58,688 INFO L87 Difference]: Start difference. First operand 171 states and 177 transitions. Second operand 19 states. [2018-01-30 00:08:01,010 WARN L143 SmtUtils]: Spent 2032ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-30 00:08:01,826 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:01,826 INFO L93 Difference]: Finished difference Result 313 states and 326 transitions. [2018-01-30 00:08:01,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-30 00:08:01,827 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-01-30 00:08:01,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:01,828 INFO L225 Difference]: With dead ends: 313 [2018-01-30 00:08:01,828 INFO L226 Difference]: Without dead ends: 177 [2018-01-30 00:08:01,829 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=104, Invalid=652, Unknown=0, NotChecked=0, Total=756 [2018-01-30 00:08:01,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-01-30 00:08:01,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 174. [2018-01-30 00:08:01,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-01-30 00:08:01,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 180 transitions. [2018-01-30 00:08:01,843 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 180 transitions. Word has length 47 [2018-01-30 00:08:01,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:01,843 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 180 transitions. [2018-01-30 00:08:01,843 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-30 00:08:01,843 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 180 transitions. [2018-01-30 00:08:01,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-30 00:08:01,843 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:01,844 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:01,844 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:01,844 INFO L82 PathProgramCache]: Analyzing trace with hash -1617259160, now seen corresponding path program 1 times [2018-01-30 00:08:01,844 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:01,844 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:01,845 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:01,845 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:08:01,845 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:01,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:01,859 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:02,039 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-30 00:08:02,039 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:08:02,039 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-30 00:08:02,040 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-30 00:08:02,040 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-30 00:08:02,040 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-01-30 00:08:02,040 INFO L87 Difference]: Start difference. First operand 174 states and 180 transitions. Second operand 12 states. [2018-01-30 00:08:02,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:02,341 INFO L93 Difference]: Finished difference Result 174 states and 180 transitions. [2018-01-30 00:08:02,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-30 00:08:02,343 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2018-01-30 00:08:02,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:02,345 INFO L225 Difference]: With dead ends: 174 [2018-01-30 00:08:02,345 INFO L226 Difference]: Without dead ends: 172 [2018-01-30 00:08:02,345 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2018-01-30 00:08:02,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-01-30 00:08:02,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 172. [2018-01-30 00:08:02,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-01-30 00:08:02,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 178 transitions. [2018-01-30 00:08:02,362 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 178 transitions. Word has length 56 [2018-01-30 00:08:02,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:02,362 INFO L432 AbstractCegarLoop]: Abstraction has 172 states and 178 transitions. [2018-01-30 00:08:02,362 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-30 00:08:02,362 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 178 transitions. [2018-01-30 00:08:02,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-30 00:08:02,363 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:02,363 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:02,363 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:02,364 INFO L82 PathProgramCache]: Analyzing trace with hash -1617259159, now seen corresponding path program 1 times [2018-01-30 00:08:02,364 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:02,364 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:02,365 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:02,365 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:02,365 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:02,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:02,382 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:02,453 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:02,454 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:08:02,454 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:08:02,462 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:02,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:02,491 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:08:02,507 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:02,528 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:08:02,528 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-01-30 00:08:02,528 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-30 00:08:02,528 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-30 00:08:02,528 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-01-30 00:08:02,529 INFO L87 Difference]: Start difference. First operand 172 states and 178 transitions. Second operand 8 states. [2018-01-30 00:08:02,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:02,577 INFO L93 Difference]: Finished difference Result 312 states and 324 transitions. [2018-01-30 00:08:02,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-30 00:08:02,578 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 56 [2018-01-30 00:08:02,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:02,579 INFO L225 Difference]: With dead ends: 312 [2018-01-30 00:08:02,579 INFO L226 Difference]: Without dead ends: 179 [2018-01-30 00:08:02,580 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-01-30 00:08:02,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-30 00:08:02,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 176. [2018-01-30 00:08:02,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-30 00:08:02,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 182 transitions. [2018-01-30 00:08:02,595 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 182 transitions. Word has length 56 [2018-01-30 00:08:02,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:02,595 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 182 transitions. [2018-01-30 00:08:02,595 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-30 00:08:02,596 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 182 transitions. [2018-01-30 00:08:02,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-01-30 00:08:02,596 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:02,596 INFO L350 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:02,597 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:02,597 INFO L82 PathProgramCache]: Analyzing trace with hash 1881204523, now seen corresponding path program 2 times [2018-01-30 00:08:02,597 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:02,597 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:02,598 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:02,598 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:02,598 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:02,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:02,613 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:02,660 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:02,661 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:08:02,661 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:08:02,668 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:08:02,687 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:08:02,689 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:08:02,693 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:08:02,700 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:08:02,700 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:08:02,716 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:08:02,717 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:08:02,731 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:08:02,731 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:08:03,262 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-30 00:08:03,281 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:08:03,282 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-01-30 00:08:03,282 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-30 00:08:03,282 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-30 00:08:03,282 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-01-30 00:08:03,283 INFO L87 Difference]: Start difference. First operand 176 states and 182 transitions. Second operand 22 states. [2018-01-30 00:08:05,680 WARN L143 SmtUtils]: Spent 2022ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-30 00:08:07,769 WARN L143 SmtUtils]: Spent 2022ms on a formula simplification that was a NOOP. DAG size: 32 [2018-01-30 00:08:08,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:08,465 INFO L93 Difference]: Finished difference Result 314 states and 328 transitions. [2018-01-30 00:08:08,465 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-30 00:08:08,465 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 60 [2018-01-30 00:08:08,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:08,466 INFO L225 Difference]: With dead ends: 314 [2018-01-30 00:08:08,466 INFO L226 Difference]: Without dead ends: 181 [2018-01-30 00:08:08,467 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 46 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=152, Invalid=904, Unknown=0, NotChecked=0, Total=1056 [2018-01-30 00:08:08,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-01-30 00:08:08,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 178. [2018-01-30 00:08:08,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-30 00:08:08,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 184 transitions. [2018-01-30 00:08:08,488 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 184 transitions. Word has length 60 [2018-01-30 00:08:08,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:08,489 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 184 transitions. [2018-01-30 00:08:08,489 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-30 00:08:08,489 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 184 transitions. [2018-01-30 00:08:08,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-01-30 00:08:08,490 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:08,490 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:08,490 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:08,490 INFO L82 PathProgramCache]: Analyzing trace with hash 856578843, now seen corresponding path program 1 times [2018-01-30 00:08:08,490 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:08,490 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:08,492 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:08,492 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:08:08,492 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:08,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:08,507 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:08,602 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-30 00:08:08,602 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:08:08,603 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-30 00:08:08,603 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-30 00:08:08,603 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-30 00:08:08,603 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-30 00:08:08,603 INFO L87 Difference]: Start difference. First operand 178 states and 184 transitions. Second operand 8 states. [2018-01-30 00:08:08,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:08,656 INFO L93 Difference]: Finished difference Result 287 states and 296 transitions. [2018-01-30 00:08:08,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-30 00:08:08,657 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 70 [2018-01-30 00:08:08,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:08,658 INFO L225 Difference]: With dead ends: 287 [2018-01-30 00:08:08,659 INFO L226 Difference]: Without dead ends: 178 [2018-01-30 00:08:08,659 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-01-30 00:08:08,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-01-30 00:08:08,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 178. [2018-01-30 00:08:08,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-30 00:08:08,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 183 transitions. [2018-01-30 00:08:08,679 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 183 transitions. Word has length 70 [2018-01-30 00:08:08,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:08,679 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 183 transitions. [2018-01-30 00:08:08,679 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-30 00:08:08,679 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 183 transitions. [2018-01-30 00:08:08,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-01-30 00:08:08,680 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:08,680 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:08,680 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:08,681 INFO L82 PathProgramCache]: Analyzing trace with hash 243427596, now seen corresponding path program 1 times [2018-01-30 00:08:08,681 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:08,681 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:08,682 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:08,682 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:08,682 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:08,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:08,698 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:08,788 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-30 00:08:08,788 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:08:08,788 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-30 00:08:08,788 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-30 00:08:08,789 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-30 00:08:08,789 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-30 00:08:08,789 INFO L87 Difference]: Start difference. First operand 178 states and 183 transitions. Second operand 10 states. [2018-01-30 00:08:08,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:08,909 INFO L93 Difference]: Finished difference Result 289 states and 297 transitions. [2018-01-30 00:08:08,909 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-30 00:08:08,909 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 75 [2018-01-30 00:08:08,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:08,911 INFO L225 Difference]: With dead ends: 289 [2018-01-30 00:08:08,911 INFO L226 Difference]: Without dead ends: 178 [2018-01-30 00:08:08,912 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2018-01-30 00:08:08,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-01-30 00:08:08,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 178. [2018-01-30 00:08:08,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-30 00:08:08,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 182 transitions. [2018-01-30 00:08:08,930 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 182 transitions. Word has length 75 [2018-01-30 00:08:08,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:08,931 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 182 transitions. [2018-01-30 00:08:08,931 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-30 00:08:08,931 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 182 transitions. [2018-01-30 00:08:08,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-01-30 00:08:08,932 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:08,932 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:08,932 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:08,932 INFO L82 PathProgramCache]: Analyzing trace with hash -1945594352, now seen corresponding path program 1 times [2018-01-30 00:08:08,932 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:08,932 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:08,933 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:08,933 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:08,934 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:08,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:08,951 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:09,176 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-30 00:08:09,176 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:08:09,177 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-01-30 00:08:09,177 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-30 00:08:09,177 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-30 00:08:09,177 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-01-30 00:08:09,178 INFO L87 Difference]: Start difference. First operand 178 states and 182 transitions. Second operand 15 states. [2018-01-30 00:08:09,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:09,899 INFO L93 Difference]: Finished difference Result 178 states and 182 transitions. [2018-01-30 00:08:09,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-30 00:08:09,900 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 86 [2018-01-30 00:08:09,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:09,901 INFO L225 Difference]: With dead ends: 178 [2018-01-30 00:08:09,901 INFO L226 Difference]: Without dead ends: 176 [2018-01-30 00:08:09,901 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=55, Invalid=407, Unknown=0, NotChecked=0, Total=462 [2018-01-30 00:08:09,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-01-30 00:08:09,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2018-01-30 00:08:09,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-30 00:08:09,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 180 transitions. [2018-01-30 00:08:09,915 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 180 transitions. Word has length 86 [2018-01-30 00:08:09,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:09,916 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 180 transitions. [2018-01-30 00:08:09,916 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-30 00:08:09,916 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 180 transitions. [2018-01-30 00:08:09,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-01-30 00:08:09,917 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:09,917 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:09,917 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:09,917 INFO L82 PathProgramCache]: Analyzing trace with hash -1945594351, now seen corresponding path program 1 times [2018-01-30 00:08:09,917 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:09,917 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:09,918 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:09,918 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:09,918 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:09,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:09,932 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:10,138 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:10,139 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:08:10,139 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:08:10,158 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:10,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:10,207 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:08:10,301 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:10,322 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:08:10,322 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-01-30 00:08:10,322 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-30 00:08:10,322 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-30 00:08:10,322 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-01-30 00:08:10,323 INFO L87 Difference]: Start difference. First operand 176 states and 180 transitions. Second operand 10 states. [2018-01-30 00:08:10,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:10,573 INFO L93 Difference]: Finished difference Result 312 states and 320 transitions. [2018-01-30 00:08:10,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-30 00:08:10,574 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 86 [2018-01-30 00:08:10,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:10,575 INFO L225 Difference]: With dead ends: 312 [2018-01-30 00:08:10,575 INFO L226 Difference]: Without dead ends: 183 [2018-01-30 00:08:10,576 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 86 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-30 00:08:10,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-01-30 00:08:10,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 180. [2018-01-30 00:08:10,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-01-30 00:08:10,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 184 transitions. [2018-01-30 00:08:10,596 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 184 transitions. Word has length 86 [2018-01-30 00:08:10,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:10,596 INFO L432 AbstractCegarLoop]: Abstraction has 180 states and 184 transitions. [2018-01-30 00:08:10,596 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-30 00:08:10,597 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 184 transitions. [2018-01-30 00:08:10,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-01-30 00:08:10,597 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:10,598 INFO L350 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:10,598 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:10,598 INFO L82 PathProgramCache]: Analyzing trace with hash -1378686893, now seen corresponding path program 2 times [2018-01-30 00:08:10,598 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:10,598 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:10,599 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:10,599 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:10,599 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:10,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:10,619 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:10,758 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:10,759 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:08:10,759 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:08:10,768 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:08:10,803 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:08:10,808 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:08:10,815 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:08:10,821 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:08:10,821 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:08:10,851 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:08:10,851 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:08:10,865 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:08:10,865 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:08:11,844 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-01-30 00:08:11,875 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:08:11,876 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [10] total 27 [2018-01-30 00:08:11,876 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-30 00:08:11,876 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-30 00:08:11,877 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=603, Unknown=0, NotChecked=0, Total=702 [2018-01-30 00:08:11,877 INFO L87 Difference]: Start difference. First operand 180 states and 184 transitions. Second operand 27 states. [2018-01-30 00:08:14,314 WARN L143 SmtUtils]: Spent 2025ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-30 00:08:15,292 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:15,292 INFO L93 Difference]: Finished difference Result 314 states and 324 transitions. [2018-01-30 00:08:15,293 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-30 00:08:15,293 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 90 [2018-01-30 00:08:15,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:15,294 INFO L225 Difference]: With dead ends: 314 [2018-01-30 00:08:15,294 INFO L226 Difference]: Without dead ends: 185 [2018-01-30 00:08:15,295 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 73 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 356 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=224, Invalid=1498, Unknown=0, NotChecked=0, Total=1722 [2018-01-30 00:08:15,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-01-30 00:08:15,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 182. [2018-01-30 00:08:15,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-30 00:08:15,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 186 transitions. [2018-01-30 00:08:15,319 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 186 transitions. Word has length 90 [2018-01-30 00:08:15,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:15,319 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 186 transitions. [2018-01-30 00:08:15,319 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-30 00:08:15,319 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 186 transitions. [2018-01-30 00:08:15,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-01-30 00:08:15,321 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:15,321 INFO L350 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:15,321 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:15,321 INFO L82 PathProgramCache]: Analyzing trace with hash 773443483, now seen corresponding path program 1 times [2018-01-30 00:08:15,321 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:15,321 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:15,323 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:15,323 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:08:15,323 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:15,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:15,342 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:15,466 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-01-30 00:08:15,466 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:08:15,467 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-30 00:08:15,467 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-30 00:08:15,467 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-30 00:08:15,467 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-30 00:08:15,468 INFO L87 Difference]: Start difference. First operand 182 states and 186 transitions. Second operand 11 states. [2018-01-30 00:08:15,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:15,537 INFO L93 Difference]: Finished difference Result 259 states and 265 transitions. [2018-01-30 00:08:15,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-30 00:08:15,538 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 99 [2018-01-30 00:08:15,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:15,538 INFO L225 Difference]: With dead ends: 259 [2018-01-30 00:08:15,539 INFO L226 Difference]: Without dead ends: 182 [2018-01-30 00:08:15,539 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2018-01-30 00:08:15,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-01-30 00:08:15,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 182. [2018-01-30 00:08:15,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-30 00:08:15,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 185 transitions. [2018-01-30 00:08:15,552 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 185 transitions. Word has length 99 [2018-01-30 00:08:15,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:15,553 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 185 transitions. [2018-01-30 00:08:15,553 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-30 00:08:15,553 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 185 transitions. [2018-01-30 00:08:15,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-01-30 00:08:15,554 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:15,554 INFO L350 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:15,554 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:15,554 INFO L82 PathProgramCache]: Analyzing trace with hash -360236654, now seen corresponding path program 1 times [2018-01-30 00:08:15,554 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:15,554 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:15,555 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:15,555 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:15,555 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:15,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:15,573 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:15,696 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-01-30 00:08:15,697 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:08:15,697 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-30 00:08:15,697 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-30 00:08:15,697 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-30 00:08:15,698 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-30 00:08:15,698 INFO L87 Difference]: Start difference. First operand 182 states and 185 transitions. Second operand 11 states. [2018-01-30 00:08:15,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:15,812 INFO L93 Difference]: Finished difference Result 188 states and 190 transitions. [2018-01-30 00:08:15,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-30 00:08:15,812 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 117 [2018-01-30 00:08:15,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:15,814 INFO L225 Difference]: With dead ends: 188 [2018-01-30 00:08:15,814 INFO L226 Difference]: Without dead ends: 182 [2018-01-30 00:08:15,814 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2018-01-30 00:08:15,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-01-30 00:08:15,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 182. [2018-01-30 00:08:15,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-30 00:08:15,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 184 transitions. [2018-01-30 00:08:15,835 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 184 transitions. Word has length 117 [2018-01-30 00:08:15,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:15,836 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 184 transitions. [2018-01-30 00:08:15,836 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-30 00:08:15,836 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 184 transitions. [2018-01-30 00:08:15,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-01-30 00:08:15,837 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:15,837 INFO L350 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:15,837 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:15,837 INFO L82 PathProgramCache]: Analyzing trace with hash 1033575066, now seen corresponding path program 1 times [2018-01-30 00:08:15,837 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:15,838 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:15,838 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:15,839 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:15,839 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:15,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:15,863 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:16,042 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:16,042 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:08:16,043 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:08:16,050 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:16,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:16,119 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:08:16,172 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:16,206 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:08:16,206 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-01-30 00:08:16,206 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-30 00:08:16,206 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-30 00:08:16,206 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-01-30 00:08:16,206 INFO L87 Difference]: Start difference. First operand 182 states and 184 transitions. Second operand 12 states. [2018-01-30 00:08:16,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:16,271 INFO L93 Difference]: Finished difference Result 316 states and 320 transitions. [2018-01-30 00:08:16,271 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-30 00:08:16,271 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 124 [2018-01-30 00:08:16,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:16,273 INFO L225 Difference]: With dead ends: 316 [2018-01-30 00:08:16,273 INFO L226 Difference]: Without dead ends: 189 [2018-01-30 00:08:16,273 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 124 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-01-30 00:08:16,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-01-30 00:08:16,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 186. [2018-01-30 00:08:16,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-30 00:08:16,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 188 transitions. [2018-01-30 00:08:16,292 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 188 transitions. Word has length 124 [2018-01-30 00:08:16,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:16,292 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 188 transitions. [2018-01-30 00:08:16,292 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-30 00:08:16,292 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 188 transitions. [2018-01-30 00:08:16,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-01-30 00:08:16,293 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:16,294 INFO L350 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:16,294 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:16,294 INFO L82 PathProgramCache]: Analyzing trace with hash -648565924, now seen corresponding path program 2 times [2018-01-30 00:08:16,294 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:16,294 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:16,295 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:16,295 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:16,295 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:16,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:16,315 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:16,539 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:16,539 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:08:16,539 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:08:16,546 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:08:16,601 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:08:16,609 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:08:16,615 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:08:16,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:08:16,622 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:08:16,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:08:16,641 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:08:16,653 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:08:16,653 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:08:17,712 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-01-30 00:08:17,732 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:08:17,732 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [12] total 31 [2018-01-30 00:08:17,732 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-30 00:08:17,733 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-30 00:08:17,733 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=804, Unknown=0, NotChecked=0, Total=930 [2018-01-30 00:08:17,733 INFO L87 Difference]: Start difference. First operand 186 states and 188 transitions. Second operand 31 states. [2018-01-30 00:08:20,302 WARN L143 SmtUtils]: Spent 2025ms on a formula simplification that was a NOOP. DAG size: 35 [2018-01-30 00:08:21,489 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:21,489 INFO L93 Difference]: Finished difference Result 318 states and 324 transitions. [2018-01-30 00:08:21,490 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-30 00:08:21,490 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 128 [2018-01-30 00:08:21,490 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:21,491 INFO L225 Difference]: With dead ends: 318 [2018-01-30 00:08:21,491 INFO L226 Difference]: Without dead ends: 191 [2018-01-30 00:08:21,493 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 107 SyntacticMatches, 3 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 533 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=297, Invalid=2055, Unknown=0, NotChecked=0, Total=2352 [2018-01-30 00:08:21,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-01-30 00:08:21,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 188. [2018-01-30 00:08:21,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-01-30 00:08:21,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 190 transitions. [2018-01-30 00:08:21,518 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 190 transitions. Word has length 128 [2018-01-30 00:08:21,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:21,518 INFO L432 AbstractCegarLoop]: Abstraction has 188 states and 190 transitions. [2018-01-30 00:08:21,519 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-30 00:08:21,519 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 190 transitions. [2018-01-30 00:08:21,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-01-30 00:08:21,519 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:21,520 INFO L350 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:21,520 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:21,520 INFO L82 PathProgramCache]: Analyzing trace with hash 788138781, now seen corresponding path program 1 times [2018-01-30 00:08:21,520 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:21,520 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:21,521 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:21,521 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:08:21,521 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:21,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:21,538 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:21,961 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-01-30 00:08:21,961 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:08:21,961 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-30 00:08:21,961 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-30 00:08:21,961 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-30 00:08:21,961 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=271, Unknown=0, NotChecked=0, Total=306 [2018-01-30 00:08:21,962 INFO L87 Difference]: Start difference. First operand 188 states and 190 transitions. Second operand 18 states. [2018-01-30 00:08:22,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:22,210 INFO L93 Difference]: Finished difference Result 195 states and 197 transitions. [2018-01-30 00:08:22,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-30 00:08:22,210 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 132 [2018-01-30 00:08:22,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:22,211 INFO L225 Difference]: With dead ends: 195 [2018-01-30 00:08:22,211 INFO L226 Difference]: Without dead ends: 193 [2018-01-30 00:08:22,212 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=59, Invalid=493, Unknown=0, NotChecked=0, Total=552 [2018-01-30 00:08:22,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-01-30 00:08:22,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 186. [2018-01-30 00:08:22,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-30 00:08:22,236 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 188 transitions. [2018-01-30 00:08:22,236 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 188 transitions. Word has length 132 [2018-01-30 00:08:22,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:22,237 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 188 transitions. [2018-01-30 00:08:22,237 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-30 00:08:22,237 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 188 transitions. [2018-01-30 00:08:22,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-01-30 00:08:22,238 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:22,238 INFO L350 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:22,238 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:22,239 INFO L82 PathProgramCache]: Analyzing trace with hash -1488037050, now seen corresponding path program 1 times [2018-01-30 00:08:22,239 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:22,239 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:22,240 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:22,240 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:22,240 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:22,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:22,266 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:22,686 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-01-30 00:08:22,686 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:08:22,687 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-01-30 00:08:22,687 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-30 00:08:22,687 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-30 00:08:22,687 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=505, Unknown=0, NotChecked=0, Total=552 [2018-01-30 00:08:22,687 INFO L87 Difference]: Start difference. First operand 186 states and 188 transitions. Second operand 24 states. [2018-01-30 00:08:23,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:23,156 INFO L93 Difference]: Finished difference Result 193 states and 195 transitions. [2018-01-30 00:08:23,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-30 00:08:23,156 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 151 [2018-01-30 00:08:23,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:23,157 INFO L225 Difference]: With dead ends: 193 [2018-01-30 00:08:23,158 INFO L226 Difference]: Without dead ends: 191 [2018-01-30 00:08:23,158 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=93, Invalid=1029, Unknown=0, NotChecked=0, Total=1122 [2018-01-30 00:08:23,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-01-30 00:08:23,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 184. [2018-01-30 00:08:23,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-01-30 00:08:23,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 186 transitions. [2018-01-30 00:08:23,174 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 186 transitions. Word has length 151 [2018-01-30 00:08:23,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:23,174 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 186 transitions. [2018-01-30 00:08:23,174 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-30 00:08:23,174 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 186 transitions. [2018-01-30 00:08:23,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-01-30 00:08:23,175 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:23,175 INFO L350 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:23,175 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:23,175 INFO L82 PathProgramCache]: Analyzing trace with hash -1488037049, now seen corresponding path program 1 times [2018-01-30 00:08:23,175 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:23,175 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:23,176 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:23,176 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:23,176 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:23,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:23,194 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:23,359 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:23,359 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:08:23,359 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:08:23,364 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:23,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:23,426 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:08:23,444 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:23,464 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:08:23,464 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-01-30 00:08:23,464 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-30 00:08:23,465 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-30 00:08:23,465 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-01-30 00:08:23,465 INFO L87 Difference]: Start difference. First operand 184 states and 186 transitions. Second operand 14 states. [2018-01-30 00:08:23,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:23,544 INFO L93 Difference]: Finished difference Result 312 states and 316 transitions. [2018-01-30 00:08:23,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-30 00:08:23,544 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 151 [2018-01-30 00:08:23,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:23,545 INFO L225 Difference]: With dead ends: 312 [2018-01-30 00:08:23,545 INFO L226 Difference]: Without dead ends: 191 [2018-01-30 00:08:23,545 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 151 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-01-30 00:08:23,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-01-30 00:08:23,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 188. [2018-01-30 00:08:23,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-01-30 00:08:23,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 190 transitions. [2018-01-30 00:08:23,564 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 190 transitions. Word has length 151 [2018-01-30 00:08:23,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:23,565 INFO L432 AbstractCegarLoop]: Abstraction has 188 states and 190 transitions. [2018-01-30 00:08:23,565 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-30 00:08:23,565 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 190 transitions. [2018-01-30 00:08:23,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-01-30 00:08:23,566 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:23,566 INFO L350 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:23,567 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:23,567 INFO L82 PathProgramCache]: Analyzing trace with hash -1465949883, now seen corresponding path program 2 times [2018-01-30 00:08:23,567 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:23,567 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:23,568 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:23,568 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:23,568 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:23,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:23,595 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:23,810 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:23,810 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:08:23,810 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:08:23,818 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:08:23,877 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:08:23,890 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:08:23,899 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:08:23,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:08:23,909 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:08:23,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:08:23,951 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:08:23,967 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:08:23,967 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:08:25,266 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-01-30 00:08:25,286 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:08:25,286 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [14] total 39 [2018-01-30 00:08:25,287 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-30 00:08:25,287 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-30 00:08:25,288 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=1309, Unknown=0, NotChecked=0, Total=1482 [2018-01-30 00:08:25,288 INFO L87 Difference]: Start difference. First operand 188 states and 190 transitions. Second operand 39 states. [2018-01-30 00:08:27,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:27,583 INFO L93 Difference]: Finished difference Result 314 states and 320 transitions. [2018-01-30 00:08:27,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-30 00:08:27,617 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 155 [2018-01-30 00:08:27,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:27,618 INFO L225 Difference]: With dead ends: 314 [2018-01-30 00:08:27,619 INFO L226 Difference]: Without dead ends: 193 [2018-01-30 00:08:27,620 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 192 GetRequests, 126 SyntacticMatches, 5 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 923 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=422, Invalid=3484, Unknown=0, NotChecked=0, Total=3906 [2018-01-30 00:08:27,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-01-30 00:08:27,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 190. [2018-01-30 00:08:27,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-01-30 00:08:27,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 192 transitions. [2018-01-30 00:08:27,645 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 192 transitions. Word has length 155 [2018-01-30 00:08:27,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:27,645 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 192 transitions. [2018-01-30 00:08:27,645 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-30 00:08:27,645 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 192 transitions. [2018-01-30 00:08:27,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-01-30 00:08:27,646 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:27,646 INFO L350 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:27,646 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:27,646 INFO L82 PathProgramCache]: Analyzing trace with hash -1668324186, now seen corresponding path program 1 times [2018-01-30 00:08:27,646 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:27,646 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:27,647 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:27,647 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:08:27,647 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:27,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:27,672 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:27,943 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:27,943 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:08:27,943 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:08:27,949 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:28,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:28,008 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:08:28,030 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:28,050 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:08:28,051 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-01-30 00:08:28,051 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-30 00:08:28,051 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-30 00:08:28,051 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-01-30 00:08:28,052 INFO L87 Difference]: Start difference. First operand 190 states and 192 transitions. Second operand 16 states. [2018-01-30 00:08:28,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:28,177 INFO L93 Difference]: Finished difference Result 316 states and 320 transitions. [2018-01-30 00:08:28,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-30 00:08:28,177 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 164 [2018-01-30 00:08:28,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:28,178 INFO L225 Difference]: With dead ends: 316 [2018-01-30 00:08:28,178 INFO L226 Difference]: Without dead ends: 197 [2018-01-30 00:08:28,179 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 179 GetRequests, 164 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-01-30 00:08:28,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-01-30 00:08:28,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 194. [2018-01-30 00:08:28,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-30 00:08:28,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 196 transitions. [2018-01-30 00:08:28,198 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 196 transitions. Word has length 164 [2018-01-30 00:08:28,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:28,198 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 196 transitions. [2018-01-30 00:08:28,198 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-30 00:08:28,198 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 196 transitions. [2018-01-30 00:08:28,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2018-01-30 00:08:28,198 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:28,199 INFO L350 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:28,199 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:28,199 INFO L82 PathProgramCache]: Analyzing trace with hash 1977387880, now seen corresponding path program 2 times [2018-01-30 00:08:28,199 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:28,199 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:28,200 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:28,200 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:28,200 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:28,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:28,219 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:28,480 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:28,480 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:08:28,480 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:08:28,494 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:08:28,543 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:08:28,550 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:08:28,557 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:08:28,621 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-30 00:08:28,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-30 00:08:28,623 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:08:28,623 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:08:28,624 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:08:28,624 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-01-30 00:08:28,705 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-30 00:08:28,707 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-30 00:08:28,710 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-30 00:08:28,711 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-01-30 00:08:28,713 WARN L1033 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-01-30 00:08:28,719 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-01-30 00:08:28,721 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:08:28,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-01-30 00:08:28,727 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:08:28,727 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:08:28,731 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-01-30 00:08:28,731 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-30 00:08:28,737 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:08:28,753 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:08:28,757 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:08:28,757 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-01-30 00:08:29,179 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:08:29,180 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-01-30 00:08:29,182 INFO L682 Elim1Store]: detected equality via solver [2018-01-30 00:08:29,183 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:08:29,183 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-01-30 00:08:29,184 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:08:29,186 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:08:29,190 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:08:29,190 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-01-30 00:08:29,654 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-01-30 00:08:29,659 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-01-30 00:08:29,659 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:08:29,660 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:08:29,661 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:08:29,661 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-01-30 00:08:29,739 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 276 trivial. 0 not checked. [2018-01-30 00:08:29,770 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:08:29,770 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [46] imperfect sequences [16] total 60 [2018-01-30 00:08:29,771 INFO L409 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-01-30 00:08:29,771 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-01-30 00:08:29,772 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=215, Invalid=3210, Unknown=1, NotChecked=114, Total=3540 [2018-01-30 00:08:29,772 INFO L87 Difference]: Start difference. First operand 194 states and 196 transitions. Second operand 60 states. [2018-01-30 00:08:31,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:31,997 INFO L93 Difference]: Finished difference Result 296 states and 302 transitions. [2018-01-30 00:08:31,997 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2018-01-30 00:08:31,997 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 168 [2018-01-30 00:08:31,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:31,998 INFO L225 Difference]: With dead ends: 296 [2018-01-30 00:08:31,998 INFO L226 Difference]: Without dead ends: 177 [2018-01-30 00:08:32,001 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 125 SyntacticMatches, 0 SemanticMatches, 86 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1365 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=371, Invalid=7114, Unknown=1, NotChecked=170, Total=7656 [2018-01-30 00:08:32,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-01-30 00:08:32,034 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 174. [2018-01-30 00:08:32,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-01-30 00:08:32,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 174 transitions. [2018-01-30 00:08:32,035 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 174 transitions. Word has length 168 [2018-01-30 00:08:32,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:32,036 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 174 transitions. [2018-01-30 00:08:32,036 INFO L433 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-01-30 00:08:32,036 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 174 transitions. [2018-01-30 00:08:32,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2018-01-30 00:08:32,037 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:32,037 INFO L350 BasicCegarLoop]: trace histogram [13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:32,038 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:32,038 INFO L82 PathProgramCache]: Analyzing trace with hash -280388892, now seen corresponding path program 1 times [2018-01-30 00:08:32,038 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:32,038 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:32,039 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:32,039 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:08:32,039 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:32,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:32,077 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:32,381 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:32,381 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:08:32,381 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:08:32,386 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:32,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:32,455 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:08:32,568 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:32,588 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:08:32,589 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-01-30 00:08:32,628 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-30 00:08:32,629 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-30 00:08:32,629 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-01-30 00:08:32,629 INFO L87 Difference]: Start difference. First operand 174 states and 174 transitions. Second operand 18 states. [2018-01-30 00:08:32,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:32,740 INFO L93 Difference]: Finished difference Result 276 states and 276 transitions. [2018-01-30 00:08:32,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-30 00:08:32,741 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 173 [2018-01-30 00:08:32,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:32,741 INFO L225 Difference]: With dead ends: 276 [2018-01-30 00:08:32,741 INFO L226 Difference]: Without dead ends: 181 [2018-01-30 00:08:32,742 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 173 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-01-30 00:08:32,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-01-30 00:08:32,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 178. [2018-01-30 00:08:32,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-30 00:08:32,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 178 transitions. [2018-01-30 00:08:32,762 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 178 transitions. Word has length 173 [2018-01-30 00:08:32,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:32,762 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 178 transitions. [2018-01-30 00:08:32,762 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-30 00:08:32,762 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 178 transitions. [2018-01-30 00:08:32,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2018-01-30 00:08:32,763 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:32,763 INFO L350 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:32,763 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:32,763 INFO L82 PathProgramCache]: Analyzing trace with hash 1125052002, now seen corresponding path program 2 times [2018-01-30 00:08:32,764 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:32,764 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:32,764 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:32,765 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:32,765 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:32,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:32,781 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:33,375 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:33,375 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:08:33,375 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:08:33,381 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:08:33,426 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:08:33,457 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:08:33,459 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:08:33,466 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:08:33,504 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:33,524 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:08:33,525 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-01-30 00:08:33,525 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-30 00:08:33,525 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-30 00:08:33,525 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-30 00:08:33,525 INFO L87 Difference]: Start difference. First operand 178 states and 178 transitions. Second operand 19 states. [2018-01-30 00:08:33,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:33,607 INFO L93 Difference]: Finished difference Result 280 states and 280 transitions. [2018-01-30 00:08:33,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-30 00:08:33,607 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 177 [2018-01-30 00:08:33,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:33,608 INFO L225 Difference]: With dead ends: 280 [2018-01-30 00:08:33,608 INFO L226 Difference]: Without dead ends: 185 [2018-01-30 00:08:33,608 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 177 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-01-30 00:08:33,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-01-30 00:08:33,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 182. [2018-01-30 00:08:33,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-30 00:08:33,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 182 transitions. [2018-01-30 00:08:33,641 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 182 transitions. Word has length 177 [2018-01-30 00:08:33,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:33,642 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 182 transitions. [2018-01-30 00:08:33,642 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-30 00:08:33,642 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 182 transitions. [2018-01-30 00:08:33,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2018-01-30 00:08:33,643 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:33,643 INFO L350 BasicCegarLoop]: trace histogram [15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:33,643 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:33,644 INFO L82 PathProgramCache]: Analyzing trace with hash -991800608, now seen corresponding path program 3 times [2018-01-30 00:08:33,644 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:33,644 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:33,645 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:33,645 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:08:33,645 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:33,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:33,670 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:33,953 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:33,954 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:08:33,954 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:08:33,959 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-30 00:08:33,998 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:08:34,022 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:08:34,060 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:08:34,192 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:08:34,439 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:08:34,954 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:08:35,034 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:08:35,105 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:08:35,209 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:08:35,261 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:08:36,397 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:08:38,006 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:08:39,626 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:08:41,314 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:08:43,650 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:08:50,206 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:08:50,210 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:08:50,222 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:08:50,552 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:50,575 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:08:50,575 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 24] total 41 [2018-01-30 00:08:50,576 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-30 00:08:50,576 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-30 00:08:50,576 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=472, Invalid=1168, Unknown=0, NotChecked=0, Total=1640 [2018-01-30 00:08:50,576 INFO L87 Difference]: Start difference. First operand 182 states and 182 transitions. Second operand 41 states. [2018-01-30 00:08:50,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:50,844 INFO L93 Difference]: Finished difference Result 284 states and 284 transitions. [2018-01-30 00:08:50,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-30 00:08:50,845 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 181 [2018-01-30 00:08:50,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:50,846 INFO L225 Difference]: With dead ends: 284 [2018-01-30 00:08:50,846 INFO L226 Difference]: Without dead ends: 189 [2018-01-30 00:08:50,847 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 160 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 670 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=522, Invalid=1458, Unknown=0, NotChecked=0, Total=1980 [2018-01-30 00:08:50,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-01-30 00:08:50,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 186. [2018-01-30 00:08:50,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-30 00:08:50,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 186 transitions. [2018-01-30 00:08:50,881 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 186 transitions. Word has length 181 [2018-01-30 00:08:50,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:50,882 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 186 transitions. [2018-01-30 00:08:50,882 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-30 00:08:50,882 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 186 transitions. [2018-01-30 00:08:50,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2018-01-30 00:08:50,883 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:50,883 INFO L350 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:50,883 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:50,883 INFO L82 PathProgramCache]: Analyzing trace with hash -1387050914, now seen corresponding path program 4 times [2018-01-30 00:08:50,884 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:50,884 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:50,885 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:50,885 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:08:50,885 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:50,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-30 00:08:51,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-30 00:08:51,065 INFO L409 BasicCegarLoop]: Counterexample might be feasible [2018-01-30 00:08:51,099 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-01-30 00:08:51,106 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-30 00:08:51,130 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 30.01 12:08:51 BoogieIcfgContainer [2018-01-30 00:08:51,130 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-30 00:08:51,131 INFO L168 Benchmark]: Toolchain (without parser) took 57447.06 ms. Allocated memory was 304.6 MB in the beginning and 773.8 MB in the end (delta: 469.2 MB). Free memory was 263.6 MB in the beginning and 598.9 MB in the end (delta: -335.2 MB). Peak memory consumption was 134.0 MB. Max. memory is 5.3 GB. [2018-01-30 00:08:51,132 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 304.6 MB. Free memory is still 270.6 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-30 00:08:51,133 INFO L168 Benchmark]: CACSL2BoogieTranslator took 238.24 ms. Allocated memory is still 304.6 MB. Free memory was 263.6 MB in the beginning and 249.7 MB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 5.3 GB. [2018-01-30 00:08:51,133 INFO L168 Benchmark]: Boogie Preprocessor took 43.30 ms. Allocated memory is still 304.6 MB. Free memory was 249.7 MB in the beginning and 247.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-30 00:08:51,133 INFO L168 Benchmark]: RCFGBuilder took 501.28 ms. Allocated memory is still 304.6 MB. Free memory was 246.7 MB in the beginning and 209.1 MB in the end (delta: 37.6 MB). Peak memory consumption was 37.6 MB. Max. memory is 5.3 GB. [2018-01-30 00:08:51,134 INFO L168 Benchmark]: TraceAbstraction took 56656.38 ms. Allocated memory was 304.6 MB in the beginning and 773.8 MB in the end (delta: 469.2 MB). Free memory was 209.1 MB in the beginning and 598.9 MB in the end (delta: -389.8 MB). Peak memory consumption was 79.4 MB. Max. memory is 5.3 GB. [2018-01-30 00:08:51,135 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 304.6 MB. Free memory is still 270.6 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 238.24 ms. Allocated memory is still 304.6 MB. Free memory was 263.6 MB in the beginning and 249.7 MB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 43.30 ms. Allocated memory is still 304.6 MB. Free memory was 249.7 MB in the beginning and 247.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 501.28 ms. Allocated memory is still 304.6 MB. Free memory was 246.7 MB in the beginning and 209.1 MB in the end (delta: 37.6 MB). Peak memory consumption was 37.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 56656.38 ms. Allocated memory was 304.6 MB in the beginning and 773.8 MB in the end (delta: 469.2 MB). Free memory was 209.1 MB in the beginning and 598.9 MB in the end (delta: -389.8 MB). Peak memory consumption was 79.4 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1443]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1443. Possible FailurePath: [L1444] CALL entry_point() [L1436] struct ldv_kobject *kobj; [L1437] CALL, EXPR ldv_kobject_create() [L1406] struct ldv_kobject *kobj; [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16] [L1073] COND TRUE __VERIFIER_nondet_int() VAL [\old(size)=16, __VERIFIER_nondet_int()=1, size=16] [L1074] EXPR, FCALL malloc(size) VAL [\old(size)=16, malloc(size)={24:0}, size=16] [L1074] RET return malloc(size); VAL [\old(size)=16, \result={24:0}, malloc(size)={24:0}, size=16] [L1408] EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_malloc(sizeof(*kobj))={24:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) VAL [kobj={24:0}, ldv_malloc(sizeof(*kobj))={24:0}] [L1409] COND FALSE !(!kobj) VAL [kobj={24:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={24:0}, memset(kobj, 0, sizeof(*kobj))={24:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={24:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={24:0}, kobj={24:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={24:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={24:0}, kobj={24:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={24:12}] [L1294] RET, FCALL ((&kref->refcount)->counter) = (1) VAL [kref={24:12}, kref={24:12}] [L1382] ldv_kref_init(&kobj->kref) VAL [kobj={24:0}, kobj={24:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [list={24:4}] [L1099] FCALL list->next = list VAL [list={24:4}, list={24:4}] [L1100] FCALL list->prev = list VAL [list={24:4}, list={24:4}] [L1383] RET, FCALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={24:0}, kobj={24:0}] [L1413] ldv_kobject_init(kobj) VAL [kobj={24:0}] [L1414] RET return kobj; VAL [\result={24:0}, kobj={24:0}] [L1437] EXPR ldv_kobject_create() VAL [ldv_kobject_create()={24:0}] [L1437] kobj = ldv_kobject_create() VAL [kobj={24:0}, ldv_kobject_create()={24:0}] [L1438] CALL ldv_kobject_get(kobj) VAL [kobj={24:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={24:0}, kobj={24:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={24:12}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, v={24:12}] [L1255] int temp; VAL [\old(i)=1, i=1, v={24:12}, v={24:12}] [L1256] EXPR, FCALL v->counter VAL [\old(i)=1, i=1, v={24:12}, v={24:12}, v->counter=1] [L1256] temp = v->counter VAL [\old(i)=1, i=1, temp=1, v={24:12}, v={24:12}, v->counter=1] [L1257] temp += i VAL [\old(i)=1, i=1, temp=2, v={24:12}, v={24:12}] [L1258] FCALL v->counter = temp VAL [\old(i)=1, i=1, temp=2, v={24:12}, v={24:12}] [L1259] RET return temp; VAL [\old(i)=1, \result=2, i=1, temp=2, v={24:12}, v={24:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={24:12}, kref={24:12}, ldv_atomic_add_return(1, (&kref->refcount))=2] [L1374] ldv_kref_get(&kobj->kref) VAL [kobj={24:0}, kobj={24:0}] [L1375] RET return kobj; VAL [\result={24:0}, kobj={24:0}, kobj={24:0}] [L1438] ldv_kobject_get(kobj) VAL [kobj={24:0}, ldv_kobject_get(kobj)={24:0}] [L1440] CALL ldv_kobject_put(kobj) VAL [kobj={24:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={24:0}, kobj={24:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={24:12}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={24:12}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, v={24:12}] [L1264] int temp; VAL [\old(i)=1, i=1, v={24:12}, v={24:12}] [L1265] EXPR, FCALL v->counter VAL [\old(i)=1, i=1, v={24:12}, v={24:12}, v->counter=2] [L1265] temp = v->counter VAL [\old(i)=1, i=1, temp=2, v={24:12}, v={24:12}, v->counter=2] [L1266] temp -= i VAL [\old(i)=1, i=1, temp=1, v={24:12}, v={24:12}] [L1267] FCALL v->counter = temp VAL [\old(i)=1, i=1, temp=1, v={24:12}, v={24:12}] [L1268] RET return temp; VAL [\old(i)=1, \result=1, i=1, temp=1, v={24:12}, v={24:12}] [L1281] EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={24:12}, kref={24:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) VAL [\old(count)=1, count=1, kref={24:12}, kref={24:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, release={-1:0}, release={-1:0}] [L1285] RET return 0; VAL [\old(count)=1, \result=0, count=1, kref={24:12}, kref={24:12}, release={-1:0}, release={-1:0}] [L1313] EXPR ldv_kref_sub(kref, 1, release) VAL [kref={24:12}, kref={24:12}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] RET return ldv_kref_sub(kref, 1, release); VAL [\result=0, kref={24:12}, kref={24:12}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1363] ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={24:0}, kobj={24:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1440] FCALL ldv_kobject_put(kobj) - StatisticsResult: Ultimate Automizer benchmark data CFG has 21 procedures, 175 locations, 23 error locations. UNSAFE Result, 56.5s OverallTime, 33 OverallIterations, 16 TraceHistogramMax, 24.6s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4739 SDtfs, 2071 SDslu, 45063 SDs, 0 SdLazy, 13254 SolverSat, 324 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2311 GetRequests, 1680 SyntacticMatches, 11 SemanticMatches, 620 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 4480 ImplicationChecksByTransitivity, 23.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=208occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.6s AutomataMinimizationTime, 32 MinimizatonAttempts, 90 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 17.3s SatisfiabilityAnalysisTime, 12.4s InterpolantComputationTime, 4890 NumberOfCodeBlocks, 4722 NumberOfCodeBlocksAsserted, 64 NumberOfCheckSat, 4658 ConstructedInterpolants, 402 QuantifiedInterpolants, 2561178 SizeOfPredicates, 136 NumberOfNonLiveVariables, 5722 ConjunctsInSsa, 585 ConjunctsInUnsatCore, 47 InterpolantComputations, 23 PerfectInterpolantSequences, 1324/5358 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-30_00-08-51-143.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-30_00-08-51-143.csv Received shutdown request...