java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_2_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-1cceb4a [2018-01-30 00:17:44,748 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-30 00:17:44,750 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-30 00:17:44,766 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-30 00:17:44,766 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-30 00:17:44,767 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-30 00:17:44,768 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-30 00:17:44,770 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-30 00:17:44,772 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-30 00:17:44,773 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-30 00:17:44,774 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-30 00:17:44,774 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-30 00:17:44,775 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-30 00:17:44,776 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-30 00:17:44,777 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-30 00:17:44,780 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-30 00:17:44,782 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-30 00:17:44,784 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-30 00:17:44,786 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-30 00:17:44,787 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-30 00:17:44,789 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-30 00:17:44,790 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-30 00:17:44,790 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-30 00:17:44,792 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-30 00:17:44,793 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-30 00:17:44,794 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-30 00:17:44,794 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-30 00:17:44,795 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-30 00:17:44,795 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-30 00:17:44,795 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-30 00:17:44,796 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-30 00:17:44,796 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-30 00:17:44,804 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-30 00:17:44,805 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-30 00:17:44,805 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-30 00:17:44,806 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-30 00:17:44,806 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-30 00:17:44,806 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-30 00:17:44,806 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-30 00:17:44,806 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-30 00:17:44,807 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-30 00:17:44,807 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-30 00:17:44,807 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-30 00:17:44,807 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-30 00:17:44,807 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-30 00:17:44,807 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-30 00:17:44,807 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-30 00:17:44,807 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-30 00:17:44,808 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-30 00:17:44,808 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-30 00:17:44,808 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-30 00:17:44,808 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-30 00:17:44,808 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-30 00:17:44,808 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-30 00:17:44,808 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-30 00:17:44,809 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-30 00:17:44,809 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-30 00:17:44,809 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-30 00:17:44,809 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-30 00:17:44,809 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-30 00:17:44,810 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-30 00:17:44,810 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-30 00:17:44,810 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-30 00:17:44,810 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-30 00:17:44,811 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-30 00:17:44,811 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-30 00:17:44,843 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-30 00:17:44,853 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-30 00:17:44,857 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-30 00:17:44,858 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-30 00:17:44,858 INFO L276 PluginConnector]: CDTParser initialized [2018-01-30 00:17:44,859 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_2_true-valid-memsafety_true-termination.i [2018-01-30 00:17:45,050 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-30 00:17:45,057 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-30 00:17:45,058 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-30 00:17:45,058 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-30 00:17:45,065 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-30 00:17:45,066 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 30.01 12:17:45" (1/1) ... [2018-01-30 00:17:45,069 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7acb6c35 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:45, skipping insertion in model container [2018-01-30 00:17:45,069 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 30.01 12:17:45" (1/1) ... [2018-01-30 00:17:45,083 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-30 00:17:45,133 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-30 00:17:45,264 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-30 00:17:45,286 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-30 00:17:45,298 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:45 WrapperNode [2018-01-30 00:17:45,299 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-30 00:17:45,299 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-30 00:17:45,300 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-30 00:17:45,300 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-30 00:17:45,316 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:45" (1/1) ... [2018-01-30 00:17:45,316 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:45" (1/1) ... [2018-01-30 00:17:45,328 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:45" (1/1) ... [2018-01-30 00:17:45,328 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:45" (1/1) ... [2018-01-30 00:17:45,334 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:45" (1/1) ... [2018-01-30 00:17:45,336 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:45" (1/1) ... [2018-01-30 00:17:45,338 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:45" (1/1) ... [2018-01-30 00:17:45,341 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-30 00:17:45,342 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-30 00:17:45,342 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-30 00:17:45,342 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-30 00:17:45,343 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:45" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-30 00:17:45,388 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-30 00:17:45,388 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-30 00:17:45,388 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-30 00:17:45,388 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-30 00:17:45,388 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-30 00:17:45,388 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-01-30 00:17:45,389 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-30 00:17:45,389 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-30 00:17:45,389 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-30 00:17:45,389 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-01-30 00:17:45,389 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-30 00:17:45,389 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-30 00:17:45,389 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-30 00:17:45,389 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-30 00:17:45,389 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-01-30 00:17:45,389 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-30 00:17:45,390 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-30 00:17:45,390 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-30 00:17:45,390 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-30 00:17:45,390 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-30 00:17:45,390 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-30 00:17:45,390 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-30 00:17:45,391 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-30 00:17:45,391 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-30 00:17:45,391 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-30 00:17:45,391 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-30 00:17:45,391 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-30 00:17:45,391 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-30 00:17:45,392 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-30 00:17:45,392 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-30 00:17:45,392 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-30 00:17:45,392 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-30 00:17:45,392 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-30 00:17:45,393 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-30 00:17:45,393 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-30 00:17:45,393 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-01-30 00:17:45,393 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-30 00:17:45,393 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-30 00:17:45,393 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-30 00:17:45,393 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-30 00:17:45,393 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-01-30 00:17:45,394 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-30 00:17:45,394 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-30 00:17:45,394 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-30 00:17:45,394 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-30 00:17:45,394 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-01-30 00:17:45,394 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-30 00:17:45,394 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-30 00:17:45,395 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-30 00:17:45,395 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-30 00:17:45,395 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-30 00:17:45,395 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-30 00:17:45,395 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-30 00:17:45,661 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-30 00:17:45,864 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-30 00:17:45,865 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 30.01 12:17:45 BoogieIcfgContainer [2018-01-30 00:17:45,865 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-30 00:17:45,866 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-30 00:17:45,866 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-30 00:17:45,868 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-30 00:17:45,868 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 30.01 12:17:45" (1/3) ... [2018-01-30 00:17:45,869 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@c415e93 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 30.01 12:17:45, skipping insertion in model container [2018-01-30 00:17:45,869 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:45" (2/3) ... [2018-01-30 00:17:45,869 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@c415e93 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 30.01 12:17:45, skipping insertion in model container [2018-01-30 00:17:45,869 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 30.01 12:17:45" (3/3) ... [2018-01-30 00:17:45,871 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_2_true-valid-memsafety_true-termination.i [2018-01-30 00:17:45,877 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-30 00:17:45,885 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-01-30 00:17:45,921 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-30 00:17:45,922 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-30 00:17:45,922 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-30 00:17:45,922 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-30 00:17:45,922 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-30 00:17:45,922 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-30 00:17:45,922 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-30 00:17:45,923 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-30 00:17:45,923 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-30 00:17:45,938 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states. [2018-01-30 00:17:45,943 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-30 00:17:45,943 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:45,944 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:45,944 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:45,948 INFO L82 PathProgramCache]: Analyzing trace with hash -1152760657, now seen corresponding path program 1 times [2018-01-30 00:17:45,949 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:45,949 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:45,995 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:45,995 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:45,995 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:46,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:46,057 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:46,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:46,294 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:46,294 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-30 00:17:46,296 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-30 00:17:46,306 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-30 00:17:46,307 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-30 00:17:46,308 INFO L87 Difference]: Start difference. First operand 176 states. Second operand 5 states. [2018-01-30 00:17:46,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:46,395 INFO L93 Difference]: Finished difference Result 334 states and 351 transitions. [2018-01-30 00:17:46,395 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-30 00:17:46,397 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-30 00:17:46,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:46,408 INFO L225 Difference]: With dead ends: 334 [2018-01-30 00:17:46,408 INFO L226 Difference]: Without dead ends: 180 [2018-01-30 00:17:46,412 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-30 00:17:46,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-01-30 00:17:46,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 178. [2018-01-30 00:17:46,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-30 00:17:46,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 187 transitions. [2018-01-30 00:17:46,456 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 187 transitions. Word has length 22 [2018-01-30 00:17:46,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:46,457 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 187 transitions. [2018-01-30 00:17:46,457 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-30 00:17:46,457 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 187 transitions. [2018-01-30 00:17:46,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-30 00:17:46,458 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:46,458 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:46,459 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:46,459 INFO L82 PathProgramCache]: Analyzing trace with hash -126553328, now seen corresponding path program 1 times [2018-01-30 00:17:46,459 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:46,459 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:46,461 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:46,461 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:46,461 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:46,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:46,484 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:46,546 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:46,547 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:46,547 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-30 00:17:46,549 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-30 00:17:46,549 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-30 00:17:46,549 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-30 00:17:46,549 INFO L87 Difference]: Start difference. First operand 178 states and 187 transitions. Second operand 6 states. [2018-01-30 00:17:46,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:46,768 INFO L93 Difference]: Finished difference Result 181 states and 190 transitions. [2018-01-30 00:17:46,768 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-30 00:17:46,769 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-01-30 00:17:46,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:46,771 INFO L225 Difference]: With dead ends: 181 [2018-01-30 00:17:46,772 INFO L226 Difference]: Without dead ends: 180 [2018-01-30 00:17:46,773 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-30 00:17:46,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-01-30 00:17:46,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 177. [2018-01-30 00:17:46,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-01-30 00:17:46,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 186 transitions. [2018-01-30 00:17:46,790 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 186 transitions. Word has length 23 [2018-01-30 00:17:46,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:46,791 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 186 transitions. [2018-01-30 00:17:46,791 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-30 00:17:46,791 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 186 transitions. [2018-01-30 00:17:46,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-30 00:17:46,792 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:46,792 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:46,792 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:46,792 INFO L82 PathProgramCache]: Analyzing trace with hash -126553327, now seen corresponding path program 1 times [2018-01-30 00:17:46,793 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:46,793 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:46,794 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:46,795 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:46,795 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:46,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:46,816 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:47,063 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:47,063 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:47,063 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-30 00:17:47,064 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-30 00:17:47,064 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-30 00:17:47,064 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-30 00:17:47,064 INFO L87 Difference]: Start difference. First operand 177 states and 186 transitions. Second operand 7 states. [2018-01-30 00:17:47,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:47,336 INFO L93 Difference]: Finished difference Result 180 states and 189 transitions. [2018-01-30 00:17:47,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-30 00:17:47,337 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-01-30 00:17:47,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:47,338 INFO L225 Difference]: With dead ends: 180 [2018-01-30 00:17:47,339 INFO L226 Difference]: Without dead ends: 179 [2018-01-30 00:17:47,339 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-01-30 00:17:47,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-30 00:17:47,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 176. [2018-01-30 00:17:47,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-30 00:17:47,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 185 transitions. [2018-01-30 00:17:47,357 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 185 transitions. Word has length 23 [2018-01-30 00:17:47,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:47,357 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 185 transitions. [2018-01-30 00:17:47,357 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-30 00:17:47,357 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 185 transitions. [2018-01-30 00:17:47,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-30 00:17:47,359 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:47,359 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:47,359 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:47,359 INFO L82 PathProgramCache]: Analyzing trace with hash -1417222794, now seen corresponding path program 1 times [2018-01-30 00:17:47,359 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:47,359 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:47,361 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:47,361 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:47,361 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:47,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:47,381 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:47,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:47,474 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:47,474 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-30 00:17:47,474 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-30 00:17:47,474 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-30 00:17:47,475 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-30 00:17:47,475 INFO L87 Difference]: Start difference. First operand 176 states and 185 transitions. Second operand 7 states. [2018-01-30 00:17:47,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:47,566 INFO L93 Difference]: Finished difference Result 294 states and 309 transitions. [2018-01-30 00:17:47,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-30 00:17:47,607 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-01-30 00:17:47,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:47,610 INFO L225 Difference]: With dead ends: 294 [2018-01-30 00:17:47,610 INFO L226 Difference]: Without dead ends: 194 [2018-01-30 00:17:47,611 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-01-30 00:17:47,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-01-30 00:17:47,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 186. [2018-01-30 00:17:47,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-30 00:17:47,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 195 transitions. [2018-01-30 00:17:47,626 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 195 transitions. Word has length 36 [2018-01-30 00:17:47,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:47,628 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 195 transitions. [2018-01-30 00:17:47,628 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-30 00:17:47,628 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 195 transitions. [2018-01-30 00:17:47,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-30 00:17:47,629 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:47,629 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:47,629 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:47,630 INFO L82 PathProgramCache]: Analyzing trace with hash -1985119748, now seen corresponding path program 1 times [2018-01-30 00:17:47,630 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:47,630 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:47,631 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:47,631 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:47,632 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:47,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:47,651 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:47,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:47,684 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:47,684 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-30 00:17:47,684 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-30 00:17:47,684 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-30 00:17:47,685 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-30 00:17:47,685 INFO L87 Difference]: Start difference. First operand 186 states and 195 transitions. Second operand 4 states. [2018-01-30 00:17:47,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:47,718 INFO L93 Difference]: Finished difference Result 328 states and 344 transitions. [2018-01-30 00:17:47,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-30 00:17:47,719 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2018-01-30 00:17:47,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:47,721 INFO L225 Difference]: With dead ends: 328 [2018-01-30 00:17:47,721 INFO L226 Difference]: Without dead ends: 190 [2018-01-30 00:17:47,722 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-30 00:17:47,723 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-01-30 00:17:47,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 187. [2018-01-30 00:17:47,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-01-30 00:17:47,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 196 transitions. [2018-01-30 00:17:47,741 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 196 transitions. Word has length 39 [2018-01-30 00:17:47,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:47,741 INFO L432 AbstractCegarLoop]: Abstraction has 187 states and 196 transitions. [2018-01-30 00:17:47,742 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-30 00:17:47,742 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 196 transitions. [2018-01-30 00:17:47,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-30 00:17:47,743 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:47,743 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:47,744 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:47,744 INFO L82 PathProgramCache]: Analyzing trace with hash 557553978, now seen corresponding path program 1 times [2018-01-30 00:17:47,744 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:47,744 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:47,745 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:47,745 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:47,745 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:47,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:47,766 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:47,808 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:47,808 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:47,808 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:47,828 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:47,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:47,877 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:47,926 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:47,960 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:17:47,961 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-01-30 00:17:47,961 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-30 00:17:47,962 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-30 00:17:47,962 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-01-30 00:17:47,962 INFO L87 Difference]: Start difference. First operand 187 states and 196 transitions. Second operand 6 states. [2018-01-30 00:17:48,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:48,007 INFO L93 Difference]: Finished difference Result 332 states and 348 transitions. [2018-01-30 00:17:48,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-30 00:17:48,008 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2018-01-30 00:17:48,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:48,010 INFO L225 Difference]: With dead ends: 332 [2018-01-30 00:17:48,010 INFO L226 Difference]: Without dead ends: 194 [2018-01-30 00:17:48,011 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-30 00:17:48,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-01-30 00:17:48,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 191. [2018-01-30 00:17:48,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2018-01-30 00:17:48,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 200 transitions. [2018-01-30 00:17:48,022 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 200 transitions. Word has length 43 [2018-01-30 00:17:48,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:48,022 INFO L432 AbstractCegarLoop]: Abstraction has 191 states and 200 transitions. [2018-01-30 00:17:48,023 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-30 00:17:48,023 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 200 transitions. [2018-01-30 00:17:48,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-30 00:17:48,024 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:48,024 INFO L350 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:48,024 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:48,024 INFO L82 PathProgramCache]: Analyzing trace with hash -99882632, now seen corresponding path program 2 times [2018-01-30 00:17:48,024 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:48,024 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:48,025 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:48,025 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:48,025 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:48,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:48,044 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:48,099 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:48,099 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:48,099 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:48,112 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:17:48,142 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:48,146 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:17:48,152 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:48,188 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:17:48,191 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:17:48,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:17:48,221 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:17:48,253 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:17:48,254 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:17:48,943 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-30 00:17:48,975 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:17:48,975 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-01-30 00:17:48,976 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-30 00:17:48,976 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-30 00:17:48,976 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-01-30 00:17:48,976 INFO L87 Difference]: Start difference. First operand 191 states and 200 transitions. Second operand 19 states. [2018-01-30 00:17:51,183 WARN L143 SmtUtils]: Spent 2056ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-30 00:17:54,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:54,558 INFO L93 Difference]: Finished difference Result 418 states and 439 transitions. [2018-01-30 00:17:54,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-30 00:17:54,559 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-01-30 00:17:54,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:54,561 INFO L225 Difference]: With dead ends: 418 [2018-01-30 00:17:54,561 INFO L226 Difference]: Without dead ends: 280 [2018-01-30 00:17:54,562 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=104, Invalid=652, Unknown=0, NotChecked=0, Total=756 [2018-01-30 00:17:54,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280 states. [2018-01-30 00:17:54,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280 to 194. [2018-01-30 00:17:54,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-30 00:17:54,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 203 transitions. [2018-01-30 00:17:54,577 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 203 transitions. Word has length 47 [2018-01-30 00:17:54,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:54,577 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 203 transitions. [2018-01-30 00:17:54,577 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-30 00:17:54,577 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 203 transitions. [2018-01-30 00:17:54,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-30 00:17:54,579 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:54,579 INFO L350 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:54,580 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:54,580 INFO L82 PathProgramCache]: Analyzing trace with hash -266816363, now seen corresponding path program 1 times [2018-01-30 00:17:54,580 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:54,580 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:54,581 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:54,581 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:17:54,581 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:54,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:54,593 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:54,628 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-30 00:17:54,628 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:54,628 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-30 00:17:54,629 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-30 00:17:54,629 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-30 00:17:54,629 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-30 00:17:54,629 INFO L87 Difference]: Start difference. First operand 194 states and 203 transitions. Second operand 3 states. [2018-01-30 00:17:54,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:54,789 INFO L93 Difference]: Finished difference Result 218 states and 232 transitions. [2018-01-30 00:17:54,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-30 00:17:54,789 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 46 [2018-01-30 00:17:54,790 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:54,791 INFO L225 Difference]: With dead ends: 218 [2018-01-30 00:17:54,792 INFO L226 Difference]: Without dead ends: 214 [2018-01-30 00:17:54,792 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-30 00:17:54,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-01-30 00:17:54,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 214. [2018-01-30 00:17:54,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-01-30 00:17:54,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 228 transitions. [2018-01-30 00:17:54,814 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 228 transitions. Word has length 46 [2018-01-30 00:17:54,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:54,815 INFO L432 AbstractCegarLoop]: Abstraction has 214 states and 228 transitions. [2018-01-30 00:17:54,815 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-30 00:17:54,815 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 228 transitions. [2018-01-30 00:17:54,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-30 00:17:54,816 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:54,817 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:54,817 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:54,817 INFO L82 PathProgramCache]: Analyzing trace with hash -1158135947, now seen corresponding path program 1 times [2018-01-30 00:17:54,817 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:54,817 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:54,818 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:54,819 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:54,819 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:54,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:54,831 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:54,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:54,915 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:54,915 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-30 00:17:54,915 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-30 00:17:54,916 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-30 00:17:54,916 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-30 00:17:54,916 INFO L87 Difference]: Start difference. First operand 214 states and 228 transitions. Second operand 7 states. [2018-01-30 00:17:55,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:55,013 INFO L93 Difference]: Finished difference Result 310 states and 335 transitions. [2018-01-30 00:17:55,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-30 00:17:55,014 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 48 [2018-01-30 00:17:55,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:55,016 INFO L225 Difference]: With dead ends: 310 [2018-01-30 00:17:55,016 INFO L226 Difference]: Without dead ends: 209 [2018-01-30 00:17:55,017 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-01-30 00:17:55,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-01-30 00:17:55,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 194. [2018-01-30 00:17:55,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-30 00:17:55,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 203 transitions. [2018-01-30 00:17:55,040 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 203 transitions. Word has length 48 [2018-01-30 00:17:55,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:55,041 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 203 transitions. [2018-01-30 00:17:55,041 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-30 00:17:55,041 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 203 transitions. [2018-01-30 00:17:55,042 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-30 00:17:55,042 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:55,042 INFO L350 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:55,042 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:55,042 INFO L82 PathProgramCache]: Analyzing trace with hash -1176072202, now seen corresponding path program 1 times [2018-01-30 00:17:55,043 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:55,043 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:55,044 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:55,044 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:55,044 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:55,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:55,055 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:55,093 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-30 00:17:55,094 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:55,094 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-30 00:17:55,094 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-30 00:17:55,094 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-30 00:17:55,094 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-30 00:17:55,095 INFO L87 Difference]: Start difference. First operand 194 states and 203 transitions. Second operand 6 states. [2018-01-30 00:17:55,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:55,134 INFO L93 Difference]: Finished difference Result 198 states and 206 transitions. [2018-01-30 00:17:55,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-30 00:17:55,134 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 47 [2018-01-30 00:17:55,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:55,135 INFO L225 Difference]: With dead ends: 198 [2018-01-30 00:17:55,135 INFO L226 Difference]: Without dead ends: 176 [2018-01-30 00:17:55,136 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-30 00:17:55,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-01-30 00:17:55,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2018-01-30 00:17:55,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-30 00:17:55,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 183 transitions. [2018-01-30 00:17:55,147 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 183 transitions. Word has length 47 [2018-01-30 00:17:55,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:55,147 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 183 transitions. [2018-01-30 00:17:55,147 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-30 00:17:55,147 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 183 transitions. [2018-01-30 00:17:55,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-30 00:17:55,148 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:55,148 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:55,148 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:55,148 INFO L82 PathProgramCache]: Analyzing trace with hash 1436412597, now seen corresponding path program 1 times [2018-01-30 00:17:55,148 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:55,148 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:55,149 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:55,150 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:55,150 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:55,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:55,162 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:55,287 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-30 00:17:55,287 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:55,287 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-30 00:17:55,287 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-30 00:17:55,288 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-30 00:17:55,288 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-01-30 00:17:55,288 INFO L87 Difference]: Start difference. First operand 176 states and 183 transitions. Second operand 12 states. [2018-01-30 00:17:55,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:55,618 INFO L93 Difference]: Finished difference Result 176 states and 183 transitions. [2018-01-30 00:17:55,618 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-30 00:17:55,618 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 51 [2018-01-30 00:17:55,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:55,619 INFO L225 Difference]: With dead ends: 176 [2018-01-30 00:17:55,619 INFO L226 Difference]: Without dead ends: 175 [2018-01-30 00:17:55,620 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2018-01-30 00:17:55,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-01-30 00:17:55,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 175. [2018-01-30 00:17:55,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-01-30 00:17:55,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 182 transitions. [2018-01-30 00:17:55,635 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 182 transitions. Word has length 51 [2018-01-30 00:17:55,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:55,636 INFO L432 AbstractCegarLoop]: Abstraction has 175 states and 182 transitions. [2018-01-30 00:17:55,636 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-30 00:17:55,636 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 182 transitions. [2018-01-30 00:17:55,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-30 00:17:55,637 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:55,637 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:55,637 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:55,638 INFO L82 PathProgramCache]: Analyzing trace with hash 713524960, now seen corresponding path program 1 times [2018-01-30 00:17:55,638 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:55,638 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:55,639 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:55,639 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:55,639 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:55,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:55,657 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:55,786 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-30 00:17:55,787 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:55,787 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-30 00:17:55,787 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-30 00:17:55,787 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-30 00:17:55,788 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-01-30 00:17:55,788 INFO L87 Difference]: Start difference. First operand 175 states and 182 transitions. Second operand 12 states. [2018-01-30 00:17:56,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:56,194 INFO L93 Difference]: Finished difference Result 175 states and 182 transitions. [2018-01-30 00:17:56,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-30 00:17:56,195 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2018-01-30 00:17:56,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:56,196 INFO L225 Difference]: With dead ends: 175 [2018-01-30 00:17:56,196 INFO L226 Difference]: Without dead ends: 173 [2018-01-30 00:17:56,196 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2018-01-30 00:17:56,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-01-30 00:17:56,206 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 173. [2018-01-30 00:17:56,206 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-01-30 00:17:56,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 180 transitions. [2018-01-30 00:17:56,207 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 180 transitions. Word has length 56 [2018-01-30 00:17:56,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:56,207 INFO L432 AbstractCegarLoop]: Abstraction has 173 states and 180 transitions. [2018-01-30 00:17:56,208 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-30 00:17:56,208 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 180 transitions. [2018-01-30 00:17:56,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-30 00:17:56,208 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:56,209 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:56,209 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:56,209 INFO L82 PathProgramCache]: Analyzing trace with hash 713524961, now seen corresponding path program 1 times [2018-01-30 00:17:56,209 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:56,209 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:56,210 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:56,211 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:56,211 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:56,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:56,229 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:56,284 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:56,284 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:56,285 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:56,294 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:56,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:56,322 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:56,335 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:56,357 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:17:56,357 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-01-30 00:17:56,358 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-30 00:17:56,358 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-30 00:17:56,358 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-01-30 00:17:56,358 INFO L87 Difference]: Start difference. First operand 173 states and 180 transitions. Second operand 8 states. [2018-01-30 00:17:56,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:56,410 INFO L93 Difference]: Finished difference Result 314 states and 328 transitions. [2018-01-30 00:17:56,411 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-30 00:17:56,411 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 56 [2018-01-30 00:17:56,411 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:56,412 INFO L225 Difference]: With dead ends: 314 [2018-01-30 00:17:56,412 INFO L226 Difference]: Without dead ends: 180 [2018-01-30 00:17:56,413 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-01-30 00:17:56,414 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-01-30 00:17:56,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 177. [2018-01-30 00:17:56,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-01-30 00:17:56,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 184 transitions. [2018-01-30 00:17:56,428 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 184 transitions. Word has length 56 [2018-01-30 00:17:56,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:56,429 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 184 transitions. [2018-01-30 00:17:56,429 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-30 00:17:56,429 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 184 transitions. [2018-01-30 00:17:56,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-01-30 00:17:56,430 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:56,430 INFO L350 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:56,430 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:56,430 INFO L82 PathProgramCache]: Analyzing trace with hash 644877155, now seen corresponding path program 2 times [2018-01-30 00:17:56,431 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:56,431 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:56,432 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:56,432 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:56,432 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:56,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:56,451 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:56,540 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:56,540 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:56,540 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:56,551 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:17:56,578 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:56,582 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:17:56,587 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:56,605 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:17:56,605 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:17:56,630 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:17:56,631 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:17:56,649 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:17:56,650 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:17:57,554 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-30 00:17:57,577 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:17:57,577 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-01-30 00:17:57,578 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-30 00:17:57,578 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-30 00:17:57,578 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-01-30 00:17:57,578 INFO L87 Difference]: Start difference. First operand 177 states and 184 transitions. Second operand 22 states. [2018-01-30 00:17:58,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:58,918 INFO L93 Difference]: Finished difference Result 316 states and 332 transitions. [2018-01-30 00:17:58,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-30 00:17:58,918 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 60 [2018-01-30 00:17:58,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:58,919 INFO L225 Difference]: With dead ends: 316 [2018-01-30 00:17:58,919 INFO L226 Difference]: Without dead ends: 182 [2018-01-30 00:17:58,920 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 46 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=152, Invalid=904, Unknown=0, NotChecked=0, Total=1056 [2018-01-30 00:17:58,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-01-30 00:17:58,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 179. [2018-01-30 00:17:58,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-01-30 00:17:58,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 186 transitions. [2018-01-30 00:17:58,939 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 186 transitions. Word has length 60 [2018-01-30 00:17:58,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:58,939 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 186 transitions. [2018-01-30 00:17:58,939 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-30 00:17:58,939 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 186 transitions. [2018-01-30 00:17:58,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-01-30 00:17:58,940 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:58,940 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:58,940 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:58,941 INFO L82 PathProgramCache]: Analyzing trace with hash 1076592855, now seen corresponding path program 1 times [2018-01-30 00:17:58,941 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:58,941 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:58,942 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:58,942 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:17:58,942 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:58,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:58,958 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:59,035 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-30 00:17:59,036 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:59,036 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-30 00:17:59,036 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-30 00:17:59,037 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-30 00:17:59,037 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-30 00:17:59,037 INFO L87 Difference]: Start difference. First operand 179 states and 186 transitions. Second operand 8 states. [2018-01-30 00:17:59,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:59,091 INFO L93 Difference]: Finished difference Result 289 states and 300 transitions. [2018-01-30 00:17:59,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-30 00:17:59,091 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 70 [2018-01-30 00:17:59,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:59,092 INFO L225 Difference]: With dead ends: 289 [2018-01-30 00:17:59,092 INFO L226 Difference]: Without dead ends: 179 [2018-01-30 00:17:59,093 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-01-30 00:17:59,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-30 00:17:59,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 179. [2018-01-30 00:17:59,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-01-30 00:17:59,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 185 transitions. [2018-01-30 00:17:59,106 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 185 transitions. Word has length 70 [2018-01-30 00:17:59,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:59,106 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 185 transitions. [2018-01-30 00:17:59,106 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-30 00:17:59,107 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 185 transitions. [2018-01-30 00:17:59,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-01-30 00:17:59,107 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:59,107 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:59,107 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:59,107 INFO L82 PathProgramCache]: Analyzing trace with hash 1113543445, now seen corresponding path program 1 times [2018-01-30 00:17:59,108 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:59,108 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:59,109 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:59,109 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:59,109 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:59,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:59,121 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:59,292 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-30 00:17:59,292 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:59,292 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-30 00:17:59,293 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-30 00:17:59,293 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-30 00:17:59,293 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-30 00:17:59,293 INFO L87 Difference]: Start difference. First operand 179 states and 185 transitions. Second operand 10 states. [2018-01-30 00:17:59,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:59,365 INFO L93 Difference]: Finished difference Result 291 states and 301 transitions. [2018-01-30 00:17:59,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-30 00:17:59,366 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 75 [2018-01-30 00:17:59,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:59,367 INFO L225 Difference]: With dead ends: 291 [2018-01-30 00:17:59,367 INFO L226 Difference]: Without dead ends: 179 [2018-01-30 00:17:59,367 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2018-01-30 00:17:59,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-30 00:17:59,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 179. [2018-01-30 00:17:59,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-01-30 00:17:59,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 184 transitions. [2018-01-30 00:17:59,380 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 184 transitions. Word has length 75 [2018-01-30 00:17:59,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:59,381 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 184 transitions. [2018-01-30 00:17:59,381 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-30 00:17:59,381 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 184 transitions. [2018-01-30 00:17:59,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-01-30 00:17:59,382 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:59,382 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:59,382 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:59,382 INFO L82 PathProgramCache]: Analyzing trace with hash 603467016, now seen corresponding path program 1 times [2018-01-30 00:17:59,382 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:59,382 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:59,383 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:59,383 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:59,383 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:59,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:59,399 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:59,619 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-30 00:17:59,619 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:59,619 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-01-30 00:17:59,620 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-30 00:17:59,620 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-30 00:17:59,620 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-01-30 00:17:59,620 INFO L87 Difference]: Start difference. First operand 179 states and 184 transitions. Second operand 15 states. [2018-01-30 00:17:59,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:59,963 INFO L93 Difference]: Finished difference Result 179 states and 184 transitions. [2018-01-30 00:17:59,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-30 00:17:59,963 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 86 [2018-01-30 00:17:59,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:59,964 INFO L225 Difference]: With dead ends: 179 [2018-01-30 00:17:59,964 INFO L226 Difference]: Without dead ends: 177 [2018-01-30 00:17:59,964 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=55, Invalid=407, Unknown=0, NotChecked=0, Total=462 [2018-01-30 00:17:59,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-01-30 00:17:59,980 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 177. [2018-01-30 00:17:59,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-01-30 00:17:59,981 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 182 transitions. [2018-01-30 00:17:59,982 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 182 transitions. Word has length 86 [2018-01-30 00:17:59,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:59,982 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 182 transitions. [2018-01-30 00:17:59,982 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-30 00:17:59,983 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 182 transitions. [2018-01-30 00:17:59,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-01-30 00:17:59,984 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:59,984 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:59,984 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:59,984 INFO L82 PathProgramCache]: Analyzing trace with hash 603467017, now seen corresponding path program 1 times [2018-01-30 00:17:59,984 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:59,985 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:59,986 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:59,986 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:59,986 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:00,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:00,008 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:18:00,097 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:18:00,097 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:18:00,098 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:18:00,107 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:00,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:00,151 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:18:00,165 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:18:00,187 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:18:00,188 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-01-30 00:18:00,188 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-30 00:18:00,188 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-30 00:18:00,188 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-01-30 00:18:00,188 INFO L87 Difference]: Start difference. First operand 177 states and 182 transitions. Second operand 10 states. [2018-01-30 00:18:00,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:18:00,287 INFO L93 Difference]: Finished difference Result 314 states and 324 transitions. [2018-01-30 00:18:00,287 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-30 00:18:00,287 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 86 [2018-01-30 00:18:00,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:18:00,288 INFO L225 Difference]: With dead ends: 314 [2018-01-30 00:18:00,288 INFO L226 Difference]: Without dead ends: 184 [2018-01-30 00:18:00,289 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 86 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-30 00:18:00,289 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-30 00:18:00,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 181. [2018-01-30 00:18:00,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-01-30 00:18:00,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 186 transitions. [2018-01-30 00:18:00,302 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 186 transitions. Word has length 86 [2018-01-30 00:18:00,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:18:00,302 INFO L432 AbstractCegarLoop]: Abstraction has 181 states and 186 transitions. [2018-01-30 00:18:00,302 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-30 00:18:00,302 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 186 transitions. [2018-01-30 00:18:00,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-01-30 00:18:00,303 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:18:00,303 INFO L350 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:18:00,304 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:18:00,304 INFO L82 PathProgramCache]: Analyzing trace with hash -11050485, now seen corresponding path program 2 times [2018-01-30 00:18:00,304 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:18:00,304 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:18:00,305 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:00,305 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:00,305 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:00,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:00,321 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:18:00,425 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:18:00,426 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:18:00,426 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:18:00,432 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:18:00,463 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:18:00,467 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:18:00,473 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:18:00,485 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:18:00,485 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:00,551 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:18:00,552 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:00,606 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:18:00,606 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:18:01,600 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-01-30 00:18:01,630 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:18:01,630 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [10] total 27 [2018-01-30 00:18:01,630 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-30 00:18:01,631 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-30 00:18:01,631 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=603, Unknown=0, NotChecked=0, Total=702 [2018-01-30 00:18:01,631 INFO L87 Difference]: Start difference. First operand 181 states and 186 transitions. Second operand 27 states. [2018-01-30 00:18:04,018 WARN L143 SmtUtils]: Spent 2025ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-30 00:18:06,150 WARN L143 SmtUtils]: Spent 2020ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-30 00:18:07,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:18:07,156 INFO L93 Difference]: Finished difference Result 316 states and 328 transitions. [2018-01-30 00:18:07,157 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-30 00:18:07,157 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 90 [2018-01-30 00:18:07,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:18:07,157 INFO L225 Difference]: With dead ends: 316 [2018-01-30 00:18:07,158 INFO L226 Difference]: Without dead ends: 186 [2018-01-30 00:18:07,158 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 73 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 356 ImplicationChecksByTransitivity, 5.4s TimeCoverageRelationStatistics Valid=224, Invalid=1498, Unknown=0, NotChecked=0, Total=1722 [2018-01-30 00:18:07,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-01-30 00:18:07,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 183. [2018-01-30 00:18:07,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-01-30 00:18:07,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 188 transitions. [2018-01-30 00:18:07,171 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 188 transitions. Word has length 90 [2018-01-30 00:18:07,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:18:07,171 INFO L432 AbstractCegarLoop]: Abstraction has 183 states and 188 transitions. [2018-01-30 00:18:07,171 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-30 00:18:07,172 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 188 transitions. [2018-01-30 00:18:07,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-01-30 00:18:07,172 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:18:07,173 INFO L350 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:18:07,173 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:18:07,173 INFO L82 PathProgramCache]: Analyzing trace with hash -997535317, now seen corresponding path program 1 times [2018-01-30 00:18:07,173 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:18:07,173 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:18:07,174 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:07,174 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:18:07,174 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:07,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:07,189 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:18:07,334 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 95 trivial. 0 not checked. [2018-01-30 00:18:07,335 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:18:07,335 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-30 00:18:07,335 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-30 00:18:07,335 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-30 00:18:07,335 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-30 00:18:07,336 INFO L87 Difference]: Start difference. First operand 183 states and 188 transitions. Second operand 11 states. [2018-01-30 00:18:07,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:18:07,436 INFO L93 Difference]: Finished difference Result 261 states and 269 transitions. [2018-01-30 00:18:07,437 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-30 00:18:07,437 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 104 [2018-01-30 00:18:07,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:18:07,438 INFO L225 Difference]: With dead ends: 261 [2018-01-30 00:18:07,438 INFO L226 Difference]: Without dead ends: 183 [2018-01-30 00:18:07,439 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2018-01-30 00:18:07,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-01-30 00:18:07,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 183. [2018-01-30 00:18:07,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-01-30 00:18:07,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 187 transitions. [2018-01-30 00:18:07,455 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 187 transitions. Word has length 104 [2018-01-30 00:18:07,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:18:07,455 INFO L432 AbstractCegarLoop]: Abstraction has 183 states and 187 transitions. [2018-01-30 00:18:07,455 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-30 00:18:07,455 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 187 transitions. [2018-01-30 00:18:07,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-01-30 00:18:07,456 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:18:07,457 INFO L350 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:18:07,457 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:18:07,457 INFO L82 PathProgramCache]: Analyzing trace with hash -1728656908, now seen corresponding path program 1 times [2018-01-30 00:18:07,457 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:18:07,457 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:18:07,458 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:07,458 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:07,459 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:07,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:07,482 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:18:07,624 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-01-30 00:18:07,624 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:18:07,624 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:18:07,630 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:07,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:07,678 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:18:07,783 INFO L134 CoverageAnalysis]: Checked inductivity of 95 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-30 00:18:07,816 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:18:07,816 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-01-30 00:18:07,817 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-30 00:18:07,817 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-30 00:18:07,817 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=315, Unknown=0, NotChecked=0, Total=380 [2018-01-30 00:18:07,817 INFO L87 Difference]: Start difference. First operand 183 states and 187 transitions. Second operand 20 states. [2018-01-30 00:18:08,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:18:08,103 INFO L93 Difference]: Finished difference Result 320 states and 329 transitions. [2018-01-30 00:18:08,103 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-30 00:18:08,103 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 122 [2018-01-30 00:18:08,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:18:08,104 INFO L225 Difference]: With dead ends: 320 [2018-01-30 00:18:08,104 INFO L226 Difference]: Without dead ends: 190 [2018-01-30 00:18:08,105 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 114 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=89, Invalid=561, Unknown=0, NotChecked=0, Total=650 [2018-01-30 00:18:08,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-01-30 00:18:08,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 187. [2018-01-30 00:18:08,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 187 states. [2018-01-30 00:18:08,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 187 states to 187 states and 190 transitions. [2018-01-30 00:18:08,118 INFO L78 Accepts]: Start accepts. Automaton has 187 states and 190 transitions. Word has length 122 [2018-01-30 00:18:08,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:18:08,118 INFO L432 AbstractCegarLoop]: Abstraction has 187 states and 190 transitions. [2018-01-30 00:18:08,118 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-30 00:18:08,118 INFO L276 IsEmpty]: Start isEmpty. Operand 187 states and 190 transitions. [2018-01-30 00:18:08,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-01-30 00:18:08,118 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:18:08,119 INFO L350 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:18:08,119 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:18:08,119 INFO L82 PathProgramCache]: Analyzing trace with hash -973611882, now seen corresponding path program 1 times [2018-01-30 00:18:08,119 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:18:08,119 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:18:08,120 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:08,120 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:08,120 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:08,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:08,138 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:18:08,297 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:18:08,297 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:18:08,297 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:18:08,304 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:08,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:08,365 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:18:08,397 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:18:08,432 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:18:08,432 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-01-30 00:18:08,433 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-30 00:18:08,433 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-30 00:18:08,433 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-30 00:18:08,433 INFO L87 Difference]: Start difference. First operand 187 states and 190 transitions. Second operand 13 states. [2018-01-30 00:18:08,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:18:08,714 INFO L93 Difference]: Finished difference Result 322 states and 328 transitions. [2018-01-30 00:18:08,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-30 00:18:08,716 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 128 [2018-01-30 00:18:08,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:18:08,717 INFO L225 Difference]: With dead ends: 322 [2018-01-30 00:18:08,717 INFO L226 Difference]: Without dead ends: 194 [2018-01-30 00:18:08,718 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 128 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=110, Unknown=0, NotChecked=0, Total=182 [2018-01-30 00:18:08,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-01-30 00:18:08,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 191. [2018-01-30 00:18:08,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2018-01-30 00:18:08,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 194 transitions. [2018-01-30 00:18:08,731 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 194 transitions. Word has length 128 [2018-01-30 00:18:08,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:18:08,731 INFO L432 AbstractCegarLoop]: Abstraction has 191 states and 194 transitions. [2018-01-30 00:18:08,731 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-30 00:18:08,731 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 194 transitions. [2018-01-30 00:18:08,732 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-01-30 00:18:08,732 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:18:08,732 INFO L350 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:18:08,732 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:18:08,733 INFO L82 PathProgramCache]: Analyzing trace with hash 1359458072, now seen corresponding path program 2 times [2018-01-30 00:18:08,733 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:18:08,733 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:18:08,733 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:08,733 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:08,734 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:08,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:08,753 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:18:09,019 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:18:09,020 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:18:09,020 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:18:09,040 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:18:09,092 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:18:09,100 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:18:09,107 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:18:09,112 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:18:09,112 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:09,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:18:09,131 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:09,147 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:18:09,147 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:18:10,243 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-01-30 00:18:10,263 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:18:10,264 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [13] total 32 [2018-01-30 00:18:10,264 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-30 00:18:10,264 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-30 00:18:10,265 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=137, Invalid=855, Unknown=0, NotChecked=0, Total=992 [2018-01-30 00:18:10,265 INFO L87 Difference]: Start difference. First operand 191 states and 194 transitions. Second operand 32 states. [2018-01-30 00:18:12,981 WARN L143 SmtUtils]: Spent 2023ms on a formula simplification that was a NOOP. DAG size: 36 [2018-01-30 00:18:13,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:18:13,947 INFO L93 Difference]: Finished difference Result 324 states and 332 transitions. [2018-01-30 00:18:13,948 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-30 00:18:13,948 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 132 [2018-01-30 00:18:13,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:18:13,949 INFO L225 Difference]: With dead ends: 324 [2018-01-30 00:18:13,949 INFO L226 Difference]: Without dead ends: 196 [2018-01-30 00:18:13,951 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 111 SyntacticMatches, 3 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 586 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=331, Invalid=2219, Unknown=0, NotChecked=0, Total=2550 [2018-01-30 00:18:13,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-01-30 00:18:13,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 193. [2018-01-30 00:18:13,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2018-01-30 00:18:13,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 196 transitions. [2018-01-30 00:18:13,976 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 196 transitions. Word has length 132 [2018-01-30 00:18:13,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:18:13,977 INFO L432 AbstractCegarLoop]: Abstraction has 193 states and 196 transitions. [2018-01-30 00:18:13,977 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-30 00:18:13,977 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 196 transitions. [2018-01-30 00:18:13,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-01-30 00:18:13,978 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:18:13,978 INFO L350 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:18:13,979 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:18:13,979 INFO L82 PathProgramCache]: Analyzing trace with hash 1392930969, now seen corresponding path program 1 times [2018-01-30 00:18:13,979 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:18:13,979 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:18:13,980 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:13,980 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:18:13,980 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:14,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:14,005 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:18:14,301 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-01-30 00:18:14,301 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:18:14,301 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-30 00:18:14,302 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-30 00:18:14,302 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-30 00:18:14,302 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=271, Unknown=0, NotChecked=0, Total=306 [2018-01-30 00:18:14,302 INFO L87 Difference]: Start difference. First operand 193 states and 196 transitions. Second operand 18 states. [2018-01-30 00:18:14,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:18:14,701 INFO L93 Difference]: Finished difference Result 228 states and 236 transitions. [2018-01-30 00:18:14,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-30 00:18:14,701 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 136 [2018-01-30 00:18:14,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:18:14,703 INFO L225 Difference]: With dead ends: 228 [2018-01-30 00:18:14,703 INFO L226 Difference]: Without dead ends: 226 [2018-01-30 00:18:14,704 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=59, Invalid=493, Unknown=0, NotChecked=0, Total=552 [2018-01-30 00:18:14,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2018-01-30 00:18:14,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 224. [2018-01-30 00:18:14,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states. [2018-01-30 00:18:14,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 230 transitions. [2018-01-30 00:18:14,733 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 230 transitions. Word has length 136 [2018-01-30 00:18:14,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:18:14,734 INFO L432 AbstractCegarLoop]: Abstraction has 224 states and 230 transitions. [2018-01-30 00:18:14,734 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-30 00:18:14,734 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 230 transitions. [2018-01-30 00:18:14,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-01-30 00:18:14,735 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:18:14,736 INFO L350 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:18:14,736 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:18:14,736 INFO L82 PathProgramCache]: Analyzing trace with hash 1805222194, now seen corresponding path program 1 times [2018-01-30 00:18:14,736 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:18:14,736 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:18:14,737 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:14,737 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:14,737 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:14,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:14,763 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:18:15,203 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-01-30 00:18:15,203 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:18:15,204 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2018-01-30 00:18:15,204 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-30 00:18:15,204 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-30 00:18:15,204 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=463, Unknown=0, NotChecked=0, Total=506 [2018-01-30 00:18:15,204 INFO L87 Difference]: Start difference. First operand 224 states and 230 transitions. Second operand 23 states. [2018-01-30 00:18:15,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:18:15,687 INFO L93 Difference]: Finished difference Result 240 states and 250 transitions. [2018-01-30 00:18:15,688 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-30 00:18:15,688 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 155 [2018-01-30 00:18:15,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:18:15,689 INFO L225 Difference]: With dead ends: 240 [2018-01-30 00:18:15,689 INFO L226 Difference]: Without dead ends: 238 [2018-01-30 00:18:15,690 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=93, Invalid=1029, Unknown=0, NotChecked=0, Total=1122 [2018-01-30 00:18:15,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 238 states. [2018-01-30 00:18:15,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 238 to 233. [2018-01-30 00:18:15,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233 states. [2018-01-30 00:18:15,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233 states to 233 states and 243 transitions. [2018-01-30 00:18:15,722 INFO L78 Accepts]: Start accepts. Automaton has 233 states and 243 transitions. Word has length 155 [2018-01-30 00:18:15,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:18:15,723 INFO L432 AbstractCegarLoop]: Abstraction has 233 states and 243 transitions. [2018-01-30 00:18:15,723 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-30 00:18:15,723 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 243 transitions. [2018-01-30 00:18:15,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-01-30 00:18:15,724 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:18:15,724 INFO L350 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:18:15,724 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:18:15,724 INFO L82 PathProgramCache]: Analyzing trace with hash 1805222195, now seen corresponding path program 1 times [2018-01-30 00:18:15,724 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:18:15,724 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:18:15,725 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:15,725 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:15,725 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:15,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:15,749 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:18:15,954 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:18:15,954 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:18:15,954 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:18:15,962 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:16,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:16,051 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:18:16,118 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:18:16,139 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:18:16,139 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-01-30 00:18:16,139 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-30 00:18:16,139 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-30 00:18:16,140 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-30 00:18:16,140 INFO L87 Difference]: Start difference. First operand 233 states and 243 transitions. Second operand 15 states. [2018-01-30 00:18:16,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:18:16,291 INFO L93 Difference]: Finished difference Result 406 states and 426 transitions. [2018-01-30 00:18:16,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-30 00:18:16,291 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 155 [2018-01-30 00:18:16,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:18:16,292 INFO L225 Difference]: With dead ends: 406 [2018-01-30 00:18:16,292 INFO L226 Difference]: Without dead ends: 240 [2018-01-30 00:18:16,293 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 155 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=97, Invalid=143, Unknown=0, NotChecked=0, Total=240 [2018-01-30 00:18:16,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240 states. [2018-01-30 00:18:16,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240 to 237. [2018-01-30 00:18:16,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237 states. [2018-01-30 00:18:16,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 247 transitions. [2018-01-30 00:18:16,313 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 247 transitions. Word has length 155 [2018-01-30 00:18:16,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:18:16,313 INFO L432 AbstractCegarLoop]: Abstraction has 237 states and 247 transitions. [2018-01-30 00:18:16,313 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-30 00:18:16,314 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 247 transitions. [2018-01-30 00:18:16,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2018-01-30 00:18:16,314 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:18:16,315 INFO L350 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:18:16,315 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:18:16,315 INFO L82 PathProgramCache]: Analyzing trace with hash 828124529, now seen corresponding path program 2 times [2018-01-30 00:18:16,315 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:18:16,315 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:18:16,316 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:16,316 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:16,316 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:16,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:16,334 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:18:16,532 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:18:16,532 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:18:16,532 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:18:16,537 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:18:16,574 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:18:16,580 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:18:16,585 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:18:16,588 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:18:16,589 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:16,600 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:18:16,600 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:16,610 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:18:16,610 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:18:17,862 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 231 trivial. 0 not checked. [2018-01-30 00:18:17,882 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:18:17,882 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [15] total 40 [2018-01-30 00:18:17,882 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-30 00:18:17,882 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-30 00:18:17,883 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=1374, Unknown=0, NotChecked=0, Total=1560 [2018-01-30 00:18:17,883 INFO L87 Difference]: Start difference. First operand 237 states and 247 transitions. Second operand 40 states. [2018-01-30 00:18:19,075 WARN L143 SmtUtils]: Spent 1095ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-30 00:18:21,136 WARN L143 SmtUtils]: Spent 2024ms on a formula simplification that was a NOOP. DAG size: 34 [2018-01-30 00:18:23,405 WARN L143 SmtUtils]: Spent 2022ms on a formula simplification that was a NOOP. DAG size: 35 [2018-01-30 00:18:27,727 WARN L143 SmtUtils]: Spent 4029ms on a formula simplification that was a NOOP. DAG size: 36 [2018-01-30 00:18:29,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:18:29,300 INFO L93 Difference]: Finished difference Result 408 states and 430 transitions. [2018-01-30 00:18:29,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-01-30 00:18:29,300 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 159 [2018-01-30 00:18:29,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:18:29,302 INFO L225 Difference]: With dead ends: 408 [2018-01-30 00:18:29,302 INFO L226 Difference]: Without dead ends: 242 [2018-01-30 00:18:29,304 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 198 GetRequests, 130 SyntacticMatches, 5 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 996 ImplicationChecksByTransitivity, 11.3s TimeCoverageRelationStatistics Valid=462, Invalid=3698, Unknown=0, NotChecked=0, Total=4160 [2018-01-30 00:18:29,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-01-30 00:18:29,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 239. [2018-01-30 00:18:29,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239 states. [2018-01-30 00:18:29,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 248 transitions. [2018-01-30 00:18:29,333 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 248 transitions. Word has length 159 [2018-01-30 00:18:29,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:18:29,333 INFO L432 AbstractCegarLoop]: Abstraction has 239 states and 248 transitions. [2018-01-30 00:18:29,333 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-30 00:18:29,333 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 248 transitions. [2018-01-30 00:18:29,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2018-01-30 00:18:29,334 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:18:29,335 INFO L350 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:18:29,335 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:18:29,335 INFO L82 PathProgramCache]: Analyzing trace with hash -310688389, now seen corresponding path program 1 times [2018-01-30 00:18:29,335 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:18:29,335 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:18:29,336 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:29,336 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:18:29,336 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:29,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:29,362 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:18:29,755 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:18:29,755 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:18:29,756 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:18:29,763 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:29,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:29,830 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:18:29,857 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:18:29,883 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:18:29,883 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2018-01-30 00:18:29,884 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-30 00:18:29,884 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-30 00:18:29,884 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-30 00:18:29,885 INFO L87 Difference]: Start difference. First operand 239 states and 248 transitions. Second operand 17 states. [2018-01-30 00:18:29,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:18:29,992 INFO L93 Difference]: Finished difference Result 410 states and 428 transitions. [2018-01-30 00:18:29,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-30 00:18:29,993 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 168 [2018-01-30 00:18:29,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:18:29,994 INFO L225 Difference]: With dead ends: 410 [2018-01-30 00:18:29,994 INFO L226 Difference]: Without dead ends: 246 [2018-01-30 00:18:29,995 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 168 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=126, Invalid=180, Unknown=0, NotChecked=0, Total=306 [2018-01-30 00:18:29,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-01-30 00:18:30,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 243. [2018-01-30 00:18:30,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 243 states. [2018-01-30 00:18:30,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 243 states to 243 states and 252 transitions. [2018-01-30 00:18:30,033 INFO L78 Accepts]: Start accepts. Automaton has 243 states and 252 transitions. Word has length 168 [2018-01-30 00:18:30,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:18:30,033 INFO L432 AbstractCegarLoop]: Abstraction has 243 states and 252 transitions. [2018-01-30 00:18:30,034 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-30 00:18:30,034 INFO L276 IsEmpty]: Start isEmpty. Operand 243 states and 252 transitions. [2018-01-30 00:18:30,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2018-01-30 00:18:30,035 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:18:30,035 INFO L350 BasicCegarLoop]: trace histogram [13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:18:30,035 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:18:30,035 INFO L82 PathProgramCache]: Analyzing trace with hash -903418371, now seen corresponding path program 2 times [2018-01-30 00:18:30,036 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:18:30,036 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:18:30,036 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:30,037 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:30,037 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:30,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:30,062 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:18:30,604 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:18:30,604 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:18:30,604 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:18:30,611 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:18:30,662 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:18:30,670 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:18:30,679 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:18:30,826 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-30 00:18:30,828 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-30 00:18:30,828 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:30,830 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:30,831 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:30,831 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-01-30 00:18:30,934 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-30 00:18:30,936 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-30 00:18:30,940 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-30 00:18:30,940 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-01-30 00:18:30,942 WARN L1033 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-01-30 00:18:30,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-01-30 00:18:30,953 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:30,956 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-01-30 00:18:30,960 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:30,961 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:30,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-01-30 00:18:30,966 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:30,972 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:30,975 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:30,980 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:30,980 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-01-30 00:18:31,372 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:31,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-01-30 00:18:31,376 INFO L682 Elim1Store]: detected equality via solver [2018-01-30 00:18:31,377 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:31,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-01-30 00:18:31,378 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:31,381 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:31,384 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:31,384 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-01-30 00:18:31,921 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-01-30 00:18:31,923 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-01-30 00:18:31,923 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:31,924 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:31,925 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:31,925 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-01-30 00:18:31,984 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 325 trivial. 0 not checked. [2018-01-30 00:18:32,004 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:18:32,004 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [46] imperfect sequences [17] total 61 [2018-01-30 00:18:32,005 INFO L409 AbstractCegarLoop]: Interpolant automaton has 61 states [2018-01-30 00:18:32,005 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2018-01-30 00:18:32,005 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=230, Invalid=3313, Unknown=1, NotChecked=116, Total=3660 [2018-01-30 00:18:32,006 INFO L87 Difference]: Start difference. First operand 243 states and 252 transitions. Second operand 61 states. [2018-01-30 00:18:34,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:18:34,770 INFO L93 Difference]: Finished difference Result 404 states and 420 transitions. [2018-01-30 00:18:34,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2018-01-30 00:18:34,770 INFO L78 Accepts]: Start accepts. Automaton has 61 states. Word has length 172 [2018-01-30 00:18:34,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:18:34,771 INFO L225 Difference]: With dead ends: 404 [2018-01-30 00:18:34,771 INFO L226 Difference]: Without dead ends: 240 [2018-01-30 00:18:34,773 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 129 SyntacticMatches, 0 SemanticMatches, 87 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1409 ImplicationChecksByTransitivity, 2.3s TimeCoverageRelationStatistics Valid=387, Invalid=7272, Unknown=1, NotChecked=172, Total=7832 [2018-01-30 00:18:34,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240 states. [2018-01-30 00:18:34,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240 to 237. [2018-01-30 00:18:34,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237 states. [2018-01-30 00:18:34,801 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 240 transitions. [2018-01-30 00:18:34,802 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 240 transitions. Word has length 172 [2018-01-30 00:18:34,802 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:18:34,802 INFO L432 AbstractCegarLoop]: Abstraction has 237 states and 240 transitions. [2018-01-30 00:18:34,802 INFO L433 AbstractCegarLoop]: Interpolant automaton has 61 states. [2018-01-30 00:18:34,802 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 240 transitions. [2018-01-30 00:18:34,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2018-01-30 00:18:34,803 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:18:34,803 INFO L350 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:18:34,803 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:18:34,803 INFO L82 PathProgramCache]: Analyzing trace with hash 306840936, now seen corresponding path program 1 times [2018-01-30 00:18:34,803 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:18:34,803 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:18:34,804 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:34,804 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:18:34,804 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:34,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:34,823 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:18:35,054 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 4 proven. 10 refuted. 0 times theorem prover too weak. 378 trivial. 0 not checked. [2018-01-30 00:18:35,054 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:18:35,054 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:18:35,059 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:35,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:35,129 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:18:35,438 INFO L134 CoverageAnalysis]: Checked inductivity of 392 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-01-30 00:18:35,458 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:18:35,458 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 35 [2018-01-30 00:18:35,459 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-30 00:18:35,459 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-30 00:18:35,459 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=174, Invalid=1016, Unknown=0, NotChecked=0, Total=1190 [2018-01-30 00:18:35,459 INFO L87 Difference]: Start difference. First operand 237 states and 240 transitions. Second operand 35 states. [2018-01-30 00:18:36,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:18:36,577 INFO L93 Difference]: Finished difference Result 410 states and 417 transitions. [2018-01-30 00:18:36,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-30 00:18:36,577 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 189 [2018-01-30 00:18:36,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:18:36,578 INFO L225 Difference]: With dead ends: 410 [2018-01-30 00:18:36,578 INFO L226 Difference]: Without dead ends: 256 [2018-01-30 00:18:36,579 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 178 SyntacticMatches, 0 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 526 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=521, Invalid=3639, Unknown=0, NotChecked=0, Total=4160 [2018-01-30 00:18:36,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2018-01-30 00:18:36,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 251. [2018-01-30 00:18:36,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 251 states. [2018-01-30 00:18:36,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 251 states to 251 states and 254 transitions. [2018-01-30 00:18:36,606 INFO L78 Accepts]: Start accepts. Automaton has 251 states and 254 transitions. Word has length 189 [2018-01-30 00:18:36,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:18:36,606 INFO L432 AbstractCegarLoop]: Abstraction has 251 states and 254 transitions. [2018-01-30 00:18:36,606 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-30 00:18:36,607 INFO L276 IsEmpty]: Start isEmpty. Operand 251 states and 254 transitions. [2018-01-30 00:18:36,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2018-01-30 00:18:36,607 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:18:36,608 INFO L350 BasicCegarLoop]: trace histogram [15, 15, 15, 15, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:18:36,608 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:18:36,608 INFO L82 PathProgramCache]: Analyzing trace with hash 1585136261, now seen corresponding path program 1 times [2018-01-30 00:18:36,608 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:18:36,608 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:18:36,609 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:36,609 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:36,609 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:36,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:36,638 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:18:37,171 INFO L134 CoverageAnalysis]: Checked inductivity of 458 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 446 trivial. 0 not checked. [2018-01-30 00:18:37,171 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:18:37,171 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:18:37,176 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:37,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:37,246 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:18:37,703 INFO L134 CoverageAnalysis]: Checked inductivity of 458 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-01-30 00:18:37,723 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:18:37,724 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 19] total 41 [2018-01-30 00:18:37,724 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-30 00:18:37,724 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-30 00:18:37,725 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=199, Invalid=1441, Unknown=0, NotChecked=0, Total=1640 [2018-01-30 00:18:37,725 INFO L87 Difference]: Start difference. First operand 251 states and 254 transitions. Second operand 41 states. [2018-01-30 00:18:39,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:18:39,312 INFO L93 Difference]: Finished difference Result 423 states and 430 transitions. [2018-01-30 00:18:39,313 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-30 00:18:39,313 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 212 [2018-01-30 00:18:39,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:18:39,314 INFO L225 Difference]: With dead ends: 423 [2018-01-30 00:18:39,314 INFO L226 Difference]: Without dead ends: 259 [2018-01-30 00:18:39,315 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 276 GetRequests, 200 SyntacticMatches, 0 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 666 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=617, Invalid=5389, Unknown=0, NotChecked=0, Total=6006 [2018-01-30 00:18:39,316 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259 states. [2018-01-30 00:18:39,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259 to 254. [2018-01-30 00:18:39,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2018-01-30 00:18:39,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 257 transitions. [2018-01-30 00:18:39,347 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 257 transitions. Word has length 212 [2018-01-30 00:18:39,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:18:39,347 INFO L432 AbstractCegarLoop]: Abstraction has 254 states and 257 transitions. [2018-01-30 00:18:39,347 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-30 00:18:39,347 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 257 transitions. [2018-01-30 00:18:39,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2018-01-30 00:18:39,348 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:18:39,349 INFO L350 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:18:39,349 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:18:39,349 INFO L82 PathProgramCache]: Analyzing trace with hash -1494315070, now seen corresponding path program 1 times [2018-01-30 00:18:39,349 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:18:39,349 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:18:39,350 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:39,350 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:39,350 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:18:39,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:39,485 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:18:42,428 WARN L146 SmtUtils]: Spent 125ms on a formula simplification. DAG size of input: 46 DAG size of output 18 [2018-01-30 00:18:42,600 WARN L146 SmtUtils]: Spent 149ms on a formula simplification. DAG size of input: 52 DAG size of output 24 [2018-01-30 00:18:46,897 INFO L134 CoverageAnalysis]: Checked inductivity of 519 backedges. 46 proven. 468 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-01-30 00:18:46,898 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:18:46,898 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:18:46,903 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:18:46,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:18:46,982 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:18:47,119 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-01-30 00:18:47,120 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-01-30 00:18:47,121 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:47,122 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:47,126 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:47,126 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-01-30 00:18:47,268 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-01-30 00:18:47,270 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:47,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-01-30 00:18:47,271 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:47,276 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:47,281 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:47,281 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-01-30 00:18:47,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-01-30 00:18:47,464 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:47,464 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:47,465 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:47,466 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 52 [2018-01-30 00:18:47,466 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:47,474 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:47,482 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-30 00:18:47,482 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:47, output treesize:43 [2018-01-30 00:18:47,736 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-01-30 00:18:47,739 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:47,740 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:47,741 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:47,742 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:47,743 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:47,744 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:47,745 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 85 [2018-01-30 00:18:47,745 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:47,760 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:47,773 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-30 00:18:47,773 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:63, output treesize:59 [2018-01-30 00:18:48,060 WARN L143 SmtUtils]: Spent 140ms on a formula simplification that was a NOOP. DAG size: 32 [2018-01-30 00:18:48,230 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 47 [2018-01-30 00:18:48,233 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,234 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,235 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,237 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,238 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,239 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,239 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,240 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,241 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,242 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,243 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 126 [2018-01-30 00:18:48,243 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:48,263 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:48,278 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-30 00:18:48,278 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:79, output treesize:75 [2018-01-30 00:18:48,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-01-30 00:18:48,587 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,588 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,589 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,590 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,590 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,591 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,592 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,593 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,594 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,595 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,596 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,596 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,597 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,598 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,599 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:48,600 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 175 [2018-01-30 00:18:48,601 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:48,631 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:48,648 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-01-30 00:18:48,649 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:95, output treesize:91 [2018-01-30 00:18:49,065 WARN L143 SmtUtils]: Spent 267ms on a formula simplification that was a NOOP. DAG size: 44 [2018-01-30 00:18:49,272 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-01-30 00:18:49,277 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,307 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,308 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,309 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,310 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,311 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,312 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,313 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,314 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,315 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,316 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,317 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,318 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,319 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,320 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,321 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,322 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,323 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,324 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,325 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,326 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:49,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 232 [2018-01-30 00:18:49,328 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:49,443 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:49,478 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 1 xjuncts. [2018-01-30 00:18:49,478 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:111, output treesize:107 [2018-01-30 00:18:50,380 WARN L143 SmtUtils]: Spent 662ms on a formula simplification that was a NOOP. DAG size: 50 [2018-01-30 00:18:51,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 74 [2018-01-30 00:18:51,210 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,211 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,212 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,213 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,213 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,214 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,215 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,216 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,216 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,217 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,218 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,219 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,219 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,220 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,221 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,222 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,222 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,224 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,225 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,225 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,226 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,227 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,228 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,228 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,229 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,230 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,231 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,231 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:51,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 297 [2018-01-30 00:18:51,233 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:51,297 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:51,326 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 6 dim-0 vars, and 1 xjuncts. [2018-01-30 00:18:51,326 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:127, output treesize:123 [2018-01-30 00:19:00,893 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 83 [2018-01-30 00:19:00,898 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,900 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,901 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,902 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,905 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,906 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,907 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,908 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,909 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,910 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,911 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,912 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,913 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,914 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,915 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,916 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,916 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,917 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,918 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,919 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,920 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,921 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,922 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,923 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,923 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,924 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,925 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,926 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,927 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,928 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,929 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,930 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,931 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,932 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,932 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,933 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:00,935 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 370 [2018-01-30 00:19:00,936 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:19:01,020 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:19:01,053 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 1 dim-2 vars, End of recursive call: 7 dim-0 vars, and 1 xjuncts. [2018-01-30 00:19:01,053 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 8 variables, input treesize:143, output treesize:139 [2018-01-30 00:19:29,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 92 [2018-01-30 00:19:29,869 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,872 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,874 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,876 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,878 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,880 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,882 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,885 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,887 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,889 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,891 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,893 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,895 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,903 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,904 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,906 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,907 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,908 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,909 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,910 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,912 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,913 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,914 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,915 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,916 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,917 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,918 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,919 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,920 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,921 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,923 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,924 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,925 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,926 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,928 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,929 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,930 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,931 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,932 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,934 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,935 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,936 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,937 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,938 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,940 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:29,941 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 451 [2018-01-30 00:19:29,943 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:19:30,065 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:19:30,105 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 1 dim-2 vars, End of recursive call: 8 dim-0 vars, and 1 xjuncts. [2018-01-30 00:19:30,105 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 9 variables, input treesize:159, output treesize:155 [2018-01-30 00:19:49,102 WARN L143 SmtUtils]: Spent 467ms on a formula simplification that was a NOOP. DAG size: 68 Received shutdown request... [2018-01-30 00:19:54,213 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-30 00:19:54,214 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-30 00:19:54,218 WARN L185 ceAbstractionStarter]: Timeout [2018-01-30 00:19:54,218 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 30.01 12:19:54 BoogieIcfgContainer [2018-01-30 00:19:54,218 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-30 00:19:54,219 INFO L168 Benchmark]: Toolchain (without parser) took 129168.49 ms. Allocated memory was 302.5 MB in the beginning and 1.1 GB in the end (delta: 789.1 MB). Free memory was 261.4 MB in the beginning and 441.6 MB in the end (delta: -180.2 MB). Peak memory consumption was 608.9 MB. Max. memory is 5.3 GB. [2018-01-30 00:19:54,220 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 302.5 MB. Free memory is still 267.4 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-30 00:19:54,220 INFO L168 Benchmark]: CACSL2BoogieTranslator took 240.94 ms. Allocated memory is still 302.5 MB. Free memory was 261.4 MB in the beginning and 247.4 MB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 5.3 GB. [2018-01-30 00:19:54,220 INFO L168 Benchmark]: Boogie Preprocessor took 41.95 ms. Allocated memory is still 302.5 MB. Free memory was 247.4 MB in the beginning and 245.4 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-30 00:19:54,221 INFO L168 Benchmark]: RCFGBuilder took 523.25 ms. Allocated memory is still 302.5 MB. Free memory was 243.5 MB in the beginning and 206.5 MB in the end (delta: 36.9 MB). Peak memory consumption was 36.9 MB. Max. memory is 5.3 GB. [2018-01-30 00:19:54,221 INFO L168 Benchmark]: TraceAbstraction took 128352.59 ms. Allocated memory was 302.5 MB in the beginning and 1.1 GB in the end (delta: 789.1 MB). Free memory was 206.5 MB in the beginning and 441.6 MB in the end (delta: -235.0 MB). Peak memory consumption was 554.0 MB. Max. memory is 5.3 GB. [2018-01-30 00:19:54,223 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 302.5 MB. Free memory is still 267.4 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 240.94 ms. Allocated memory is still 302.5 MB. Free memory was 261.4 MB in the beginning and 247.4 MB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 41.95 ms. Allocated memory is still 302.5 MB. Free memory was 247.4 MB in the beginning and 245.4 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 523.25 ms. Allocated memory is still 302.5 MB. Free memory was 243.5 MB in the beginning and 206.5 MB in the end (delta: 36.9 MB). Peak memory consumption was 36.9 MB. Max. memory is 5.3 GB. * TraceAbstraction took 128352.59 ms. Allocated memory was 302.5 MB in the beginning and 1.1 GB in the end (delta: 789.1 MB). Free memory was 206.5 MB in the beginning and 441.6 MB in the end (delta: -235.0 MB). Peak memory consumption was 554.0 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1443]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1443). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 222 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 98 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 21 procedures, 176 locations, 23 error locations. TIMEOUT Result, 128.3s OverallTime, 32 OverallIterations, 16 TraceHistogramMax, 37.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4763 SDtfs, 2385 SDslu, 41693 SDs, 0 SdLazy, 18428 SolverSat, 419 SolverUnsat, 1 SolverUnknown, 0 SolverNotchecked, 11.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2400 GetRequests, 1686 SyntacticMatches, 11 SemanticMatches, 703 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 5086 ImplicationChecksByTransitivity, 32.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=254occurred in iteration=31, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.6s AutomataMinimizationTime, 31 MinimizatonAttempts, 173 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 0.9s SatisfiabilityAnalysisTime, 13.1s InterpolantComputationTime, 4655 NumberOfCodeBlocks, 4475 NumberOfCodeBlocksAsserted, 46 NumberOfCheckSat, 4609 ConstructedInterpolants, 410 QuantifiedInterpolants, 2646401 SizeOfPredicates, 134 NumberOfNonLiveVariables, 5857 ConjunctsInSsa, 565 ConjunctsInUnsatCore, 46 InterpolantComputations, 22 PerfectInterpolantSequences, 2418/5450 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-30_00-19-54-230.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_2_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-30_00-19-54-230.csv Completed graceful shutdown