java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-1cceb4a [2018-01-30 00:08:52,869 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-30 00:08:52,870 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-30 00:08:52,886 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-30 00:08:52,886 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-30 00:08:52,887 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-30 00:08:52,888 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-30 00:08:52,890 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-30 00:08:52,892 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-30 00:08:52,892 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-30 00:08:52,893 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-30 00:08:52,893 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-30 00:08:52,894 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-30 00:08:52,894 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-30 00:08:52,895 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-30 00:08:52,897 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-30 00:08:52,900 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-30 00:08:52,902 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-30 00:08:52,903 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-30 00:08:52,904 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-30 00:08:52,907 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-30 00:08:52,912 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-30 00:08:52,912 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-30 00:08:52,913 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-30 00:08:52,922 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-30 00:08:52,923 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-30 00:08:52,924 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-30 00:08:52,924 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-30 00:08:52,924 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-30 00:08:52,924 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-30 00:08:52,924 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-30 00:08:52,925 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-30 00:08:52,925 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-30 00:08:52,926 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-30 00:08:52,926 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-30 00:08:52,926 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-30 00:08:52,926 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-30 00:08:52,926 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-30 00:08:52,927 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-30 00:08:52,927 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-30 00:08:52,927 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-30 00:08:52,927 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-30 00:08:52,927 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-30 00:08:52,928 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-30 00:08:52,928 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-30 00:08:52,928 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-30 00:08:52,928 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-30 00:08:52,928 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-30 00:08:52,929 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-30 00:08:52,929 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-30 00:08:52,929 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-30 00:08:52,929 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-30 00:08:52,929 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-30 00:08:52,930 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-30 00:08:52,930 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-30 00:08:52,930 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-30 00:08:52,931 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-30 00:08:52,931 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-30 00:08:52,966 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-30 00:08:52,978 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-30 00:08:52,982 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-30 00:08:52,983 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-30 00:08:52,984 INFO L276 PluginConnector]: CDTParser initialized [2018-01-30 00:08:52,984 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-01-30 00:08:53,180 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-30 00:08:53,187 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-30 00:08:53,212 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-30 00:08:53,213 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-30 00:08:53,217 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-30 00:08:53,218 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 30.01 12:08:53" (1/1) ... [2018-01-30 00:08:53,222 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@13f5e0b2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:08:53, skipping insertion in model container [2018-01-30 00:08:53,222 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 30.01 12:08:53" (1/1) ... [2018-01-30 00:08:53,241 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-30 00:08:53,292 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-30 00:08:53,420 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-30 00:08:53,443 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-30 00:08:53,455 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:08:53 WrapperNode [2018-01-30 00:08:53,455 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-30 00:08:53,456 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-30 00:08:53,456 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-30 00:08:53,456 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-30 00:08:53,471 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:08:53" (1/1) ... [2018-01-30 00:08:53,471 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:08:53" (1/1) ... [2018-01-30 00:08:53,482 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:08:53" (1/1) ... [2018-01-30 00:08:53,482 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:08:53" (1/1) ... [2018-01-30 00:08:53,491 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:08:53" (1/1) ... [2018-01-30 00:08:53,495 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:08:53" (1/1) ... [2018-01-30 00:08:53,496 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:08:53" (1/1) ... [2018-01-30 00:08:53,500 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-30 00:08:53,500 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-30 00:08:53,501 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-30 00:08:53,501 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-30 00:08:53,502 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:08:53" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-30 00:08:53,546 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-30 00:08:53,546 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-30 00:08:53,546 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-30 00:08:53,546 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-30 00:08:53,546 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-30 00:08:53,547 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-01-30 00:08:53,547 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-30 00:08:53,547 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-30 00:08:53,547 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-30 00:08:53,547 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-01-30 00:08:53,547 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-30 00:08:53,547 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-30 00:08:53,548 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-30 00:08:53,548 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-30 00:08:53,548 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-01-30 00:08:53,548 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-30 00:08:53,548 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-30 00:08:53,548 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-30 00:08:53,549 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_get [2018-01-30 00:08:53,549 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-30 00:08:53,549 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-30 00:08:53,549 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-30 00:08:53,549 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-30 00:08:53,549 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-30 00:08:53,550 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-30 00:08:53,550 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-30 00:08:53,550 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-30 00:08:53,550 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-30 00:08:53,550 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-30 00:08:53,551 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-30 00:08:53,551 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-30 00:08:53,551 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-30 00:08:53,551 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-30 00:08:53,551 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-30 00:08:53,551 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-30 00:08:53,551 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-30 00:08:53,552 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-01-30 00:08:53,552 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-30 00:08:53,552 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-30 00:08:53,552 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-30 00:08:53,552 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-30 00:08:53,552 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-01-30 00:08:53,553 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-30 00:08:53,553 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-30 00:08:53,553 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-30 00:08:53,553 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-30 00:08:53,553 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-01-30 00:08:53,553 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-30 00:08:53,553 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-30 00:08:53,553 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-30 00:08:53,554 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_get [2018-01-30 00:08:53,554 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-30 00:08:53,554 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-30 00:08:53,554 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-30 00:08:53,554 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-30 00:08:53,801 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-30 00:08:54,003 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-30 00:08:54,004 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 30.01 12:08:54 BoogieIcfgContainer [2018-01-30 00:08:54,004 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-30 00:08:54,005 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-30 00:08:54,005 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-30 00:08:54,008 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-30 00:08:54,008 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 30.01 12:08:53" (1/3) ... [2018-01-30 00:08:54,008 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@721f9bfa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 30.01 12:08:54, skipping insertion in model container [2018-01-30 00:08:54,009 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:08:53" (2/3) ... [2018-01-30 00:08:54,009 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@721f9bfa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 30.01 12:08:54, skipping insertion in model container [2018-01-30 00:08:54,009 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 30.01 12:08:54" (3/3) ... [2018-01-30 00:08:54,010 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-01-30 00:08:54,017 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-30 00:08:54,023 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-01-30 00:08:54,069 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-30 00:08:54,070 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-30 00:08:54,070 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-30 00:08:54,070 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-30 00:08:54,070 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-30 00:08:54,070 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-30 00:08:54,071 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-30 00:08:54,071 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-30 00:08:54,072 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-30 00:08:54,090 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states. [2018-01-30 00:08:54,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-30 00:08:54,095 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:54,096 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:54,096 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:54,101 INFO L82 PathProgramCache]: Analyzing trace with hash -1920728985, now seen corresponding path program 1 times [2018-01-30 00:08:54,103 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:54,104 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:54,151 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:54,151 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:54,152 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:54,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:54,216 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:54,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:54,426 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:08:54,427 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-30 00:08:54,429 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-30 00:08:54,441 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-30 00:08:54,441 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-30 00:08:54,444 INFO L87 Difference]: Start difference. First operand 179 states. Second operand 5 states. [2018-01-30 00:08:54,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:54,539 INFO L93 Difference]: Finished difference Result 340 states and 355 transitions. [2018-01-30 00:08:54,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-30 00:08:54,541 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-30 00:08:54,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:54,553 INFO L225 Difference]: With dead ends: 340 [2018-01-30 00:08:54,553 INFO L226 Difference]: Without dead ends: 183 [2018-01-30 00:08:54,556 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-30 00:08:54,569 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-01-30 00:08:54,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 181. [2018-01-30 00:08:54,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-01-30 00:08:54,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 189 transitions. [2018-01-30 00:08:54,596 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 189 transitions. Word has length 22 [2018-01-30 00:08:54,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:54,597 INFO L432 AbstractCegarLoop]: Abstraction has 181 states and 189 transitions. [2018-01-30 00:08:54,597 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-30 00:08:54,597 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 189 transitions. [2018-01-30 00:08:54,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-30 00:08:54,598 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:54,598 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:54,598 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:54,598 INFO L82 PathProgramCache]: Analyzing trace with hash 1723562718, now seen corresponding path program 1 times [2018-01-30 00:08:54,599 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:54,599 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:54,601 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:54,602 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:54,602 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:54,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:54,626 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:54,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:54,709 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:08:54,709 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-30 00:08:54,714 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-30 00:08:54,714 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-30 00:08:54,714 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-30 00:08:54,715 INFO L87 Difference]: Start difference. First operand 181 states and 189 transitions. Second operand 6 states. [2018-01-30 00:08:54,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:54,959 INFO L93 Difference]: Finished difference Result 184 states and 192 transitions. [2018-01-30 00:08:54,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-30 00:08:54,960 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-01-30 00:08:54,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:54,963 INFO L225 Difference]: With dead ends: 184 [2018-01-30 00:08:54,963 INFO L226 Difference]: Without dead ends: 183 [2018-01-30 00:08:54,964 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-30 00:08:54,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-01-30 00:08:54,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 180. [2018-01-30 00:08:54,980 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-01-30 00:08:54,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 188 transitions. [2018-01-30 00:08:54,982 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 188 transitions. Word has length 23 [2018-01-30 00:08:54,982 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:54,983 INFO L432 AbstractCegarLoop]: Abstraction has 180 states and 188 transitions. [2018-01-30 00:08:54,983 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-30 00:08:54,983 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 188 transitions. [2018-01-30 00:08:54,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-30 00:08:54,984 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:54,984 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:54,984 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:54,984 INFO L82 PathProgramCache]: Analyzing trace with hash 1723562719, now seen corresponding path program 1 times [2018-01-30 00:08:54,984 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:54,985 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:54,986 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:54,986 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:54,987 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:55,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:55,007 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:55,338 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:55,339 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:08:55,339 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-30 00:08:55,339 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-30 00:08:55,339 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-30 00:08:55,340 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-30 00:08:55,340 INFO L87 Difference]: Start difference. First operand 180 states and 188 transitions. Second operand 7 states. [2018-01-30 00:08:55,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:55,647 INFO L93 Difference]: Finished difference Result 183 states and 191 transitions. [2018-01-30 00:08:55,648 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-30 00:08:55,648 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-01-30 00:08:55,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:55,650 INFO L225 Difference]: With dead ends: 183 [2018-01-30 00:08:55,651 INFO L226 Difference]: Without dead ends: 182 [2018-01-30 00:08:55,651 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-01-30 00:08:55,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-01-30 00:08:55,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 179. [2018-01-30 00:08:55,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-01-30 00:08:55,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 187 transitions. [2018-01-30 00:08:55,665 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 187 transitions. Word has length 23 [2018-01-30 00:08:55,665 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:55,665 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 187 transitions. [2018-01-30 00:08:55,665 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-30 00:08:55,666 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 187 transitions. [2018-01-30 00:08:55,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-30 00:08:55,667 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:55,667 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:55,667 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:55,668 INFO L82 PathProgramCache]: Analyzing trace with hash 47541349, now seen corresponding path program 1 times [2018-01-30 00:08:55,668 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:55,668 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:55,670 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:55,670 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:55,670 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:55,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:55,693 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:55,836 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:55,836 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:08:55,836 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-30 00:08:55,837 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-30 00:08:55,837 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-30 00:08:55,837 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-01-30 00:08:55,837 INFO L87 Difference]: Start difference. First operand 179 states and 187 transitions. Second operand 9 states. [2018-01-30 00:08:55,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:55,974 INFO L93 Difference]: Finished difference Result 301 states and 313 transitions. [2018-01-30 00:08:55,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-30 00:08:55,974 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 38 [2018-01-30 00:08:55,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:55,977 INFO L225 Difference]: With dead ends: 301 [2018-01-30 00:08:55,977 INFO L226 Difference]: Without dead ends: 200 [2018-01-30 00:08:55,978 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-01-30 00:08:55,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2018-01-30 00:08:55,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 194. [2018-01-30 00:08:55,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-30 00:08:55,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 202 transitions. [2018-01-30 00:08:55,996 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 202 transitions. Word has length 38 [2018-01-30 00:08:55,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:55,996 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 202 transitions. [2018-01-30 00:08:55,996 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-30 00:08:55,996 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 202 transitions. [2018-01-30 00:08:55,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-30 00:08:55,997 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:55,997 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:55,997 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:55,998 INFO L82 PathProgramCache]: Analyzing trace with hash -123092145, now seen corresponding path program 1 times [2018-01-30 00:08:55,998 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:55,998 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:55,999 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:55,999 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:55,999 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:56,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:56,020 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:56,107 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:56,107 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:08:56,108 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-30 00:08:56,108 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-30 00:08:56,108 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-30 00:08:56,108 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-30 00:08:56,109 INFO L87 Difference]: Start difference. First operand 194 states and 202 transitions. Second operand 10 states. [2018-01-30 00:08:56,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:56,369 INFO L93 Difference]: Finished difference Result 194 states and 202 transitions. [2018-01-30 00:08:56,370 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-30 00:08:56,370 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 39 [2018-01-30 00:08:56,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:56,372 INFO L225 Difference]: With dead ends: 194 [2018-01-30 00:08:56,372 INFO L226 Difference]: Without dead ends: 193 [2018-01-30 00:08:56,373 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-30 00:08:56,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-01-30 00:08:56,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 193. [2018-01-30 00:08:56,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2018-01-30 00:08:56,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 201 transitions. [2018-01-30 00:08:56,384 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 201 transitions. Word has length 39 [2018-01-30 00:08:56,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:56,385 INFO L432 AbstractCegarLoop]: Abstraction has 193 states and 201 transitions. [2018-01-30 00:08:56,385 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-30 00:08:56,385 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 201 transitions. [2018-01-30 00:08:56,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-30 00:08:56,386 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:56,386 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:56,386 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:56,387 INFO L82 PathProgramCache]: Analyzing trace with hash -123092144, now seen corresponding path program 1 times [2018-01-30 00:08:56,387 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:56,387 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:56,388 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:56,388 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:56,388 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:56,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:56,408 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:56,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:56,442 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:08:56,442 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-30 00:08:56,442 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-30 00:08:56,442 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-30 00:08:56,443 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-30 00:08:56,443 INFO L87 Difference]: Start difference. First operand 193 states and 201 transitions. Second operand 4 states. [2018-01-30 00:08:56,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:56,483 INFO L93 Difference]: Finished difference Result 337 states and 351 transitions. [2018-01-30 00:08:56,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-30 00:08:56,485 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2018-01-30 00:08:56,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:56,486 INFO L225 Difference]: With dead ends: 337 [2018-01-30 00:08:56,487 INFO L226 Difference]: Without dead ends: 197 [2018-01-30 00:08:56,488 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-30 00:08:56,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-01-30 00:08:56,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 194. [2018-01-30 00:08:56,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-30 00:08:56,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 202 transitions. [2018-01-30 00:08:56,501 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 202 transitions. Word has length 39 [2018-01-30 00:08:56,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:56,501 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 202 transitions. [2018-01-30 00:08:56,501 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-30 00:08:56,501 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 202 transitions. [2018-01-30 00:08:56,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-30 00:08:56,502 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:56,502 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:56,502 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:56,503 INFO L82 PathProgramCache]: Analyzing trace with hash 802130446, now seen corresponding path program 1 times [2018-01-30 00:08:56,503 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:56,503 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:56,504 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:56,504 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:56,504 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:56,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:56,521 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:56,582 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:56,582 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:08:56,582 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:08:56,596 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:56,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:56,647 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:08:56,688 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:56,709 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:08:56,710 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-01-30 00:08:56,710 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-30 00:08:56,710 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-30 00:08:56,711 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-01-30 00:08:56,711 INFO L87 Difference]: Start difference. First operand 194 states and 202 transitions. Second operand 6 states. [2018-01-30 00:08:56,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:56,765 INFO L93 Difference]: Finished difference Result 341 states and 355 transitions. [2018-01-30 00:08:56,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-30 00:08:56,766 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2018-01-30 00:08:56,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:56,768 INFO L225 Difference]: With dead ends: 341 [2018-01-30 00:08:56,768 INFO L226 Difference]: Without dead ends: 201 [2018-01-30 00:08:56,769 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-30 00:08:56,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2018-01-30 00:08:56,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 198. [2018-01-30 00:08:56,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-01-30 00:08:56,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 206 transitions. [2018-01-30 00:08:56,784 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 206 transitions. Word has length 43 [2018-01-30 00:08:56,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:56,784 INFO L432 AbstractCegarLoop]: Abstraction has 198 states and 206 transitions. [2018-01-30 00:08:56,784 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-30 00:08:56,785 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 206 transitions. [2018-01-30 00:08:56,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-30 00:08:56,786 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:56,787 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:56,787 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:56,787 INFO L82 PathProgramCache]: Analyzing trace with hash -810591901, now seen corresponding path program 1 times [2018-01-30 00:08:56,787 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:56,787 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:56,789 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:56,789 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:56,789 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:56,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:56,804 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:56,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:56,850 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:08:56,850 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-30 00:08:56,850 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-30 00:08:56,851 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-30 00:08:56,851 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-30 00:08:56,851 INFO L87 Difference]: Start difference. First operand 198 states and 206 transitions. Second operand 3 states. [2018-01-30 00:08:57,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:57,115 INFO L93 Difference]: Finished difference Result 220 states and 230 transitions. [2018-01-30 00:08:57,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-30 00:08:57,116 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 45 [2018-01-30 00:08:57,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:57,117 INFO L225 Difference]: With dead ends: 220 [2018-01-30 00:08:57,118 INFO L226 Difference]: Without dead ends: 216 [2018-01-30 00:08:57,118 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-30 00:08:57,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-01-30 00:08:57,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 216. [2018-01-30 00:08:57,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 216 states. [2018-01-30 00:08:57,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 216 states to 216 states and 226 transitions. [2018-01-30 00:08:57,132 INFO L78 Accepts]: Start accepts. Automaton has 216 states and 226 transitions. Word has length 45 [2018-01-30 00:08:57,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:57,133 INFO L432 AbstractCegarLoop]: Abstraction has 216 states and 226 transitions. [2018-01-30 00:08:57,133 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-30 00:08:57,133 INFO L276 IsEmpty]: Start isEmpty. Operand 216 states and 226 transitions. [2018-01-30 00:08:57,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-30 00:08:57,134 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:57,135 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:57,135 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:57,135 INFO L82 PathProgramCache]: Analyzing trace with hash 1801980172, now seen corresponding path program 1 times [2018-01-30 00:08:57,135 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:57,135 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:57,136 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:57,136 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:57,136 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:57,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:57,148 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:57,194 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:57,194 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:08:57,194 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-30 00:08:57,194 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-30 00:08:57,195 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-30 00:08:57,195 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-30 00:08:57,195 INFO L87 Difference]: Start difference. First operand 216 states and 226 transitions. Second operand 6 states. [2018-01-30 00:08:57,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:08:57,261 INFO L93 Difference]: Finished difference Result 310 states and 321 transitions. [2018-01-30 00:08:57,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-30 00:08:57,262 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 46 [2018-01-30 00:08:57,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:08:57,264 INFO L225 Difference]: With dead ends: 310 [2018-01-30 00:08:57,264 INFO L226 Difference]: Without dead ends: 210 [2018-01-30 00:08:57,265 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-30 00:08:57,265 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2018-01-30 00:08:57,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 210. [2018-01-30 00:08:57,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 210 states. [2018-01-30 00:08:57,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 210 states to 210 states and 218 transitions. [2018-01-30 00:08:57,280 INFO L78 Accepts]: Start accepts. Automaton has 210 states and 218 transitions. Word has length 46 [2018-01-30 00:08:57,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:08:57,280 INFO L432 AbstractCegarLoop]: Abstraction has 210 states and 218 transitions. [2018-01-30 00:08:57,281 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-30 00:08:57,281 INFO L276 IsEmpty]: Start isEmpty. Operand 210 states and 218 transitions. [2018-01-30 00:08:57,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-30 00:08:57,282 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:08:57,282 INFO L350 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:08:57,282 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:08:57,283 INFO L82 PathProgramCache]: Analyzing trace with hash 1024967116, now seen corresponding path program 2 times [2018-01-30 00:08:57,283 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:08:57,283 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:08:57,284 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:57,284 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:08:57,284 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:08:57,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:08:57,300 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:08:57,365 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:08:57,365 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:08:57,366 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:08:57,378 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:08:57,402 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:08:57,404 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:08:57,409 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:08:57,438 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:08:57,440 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:08:57,477 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:08:57,477 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:08:57,494 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:08:57,495 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:08:58,389 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-30 00:08:58,411 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:08:58,411 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-01-30 00:08:58,411 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-30 00:08:58,411 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-30 00:08:58,412 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-01-30 00:08:58,412 INFO L87 Difference]: Start difference. First operand 210 states and 218 transitions. Second operand 19 states. [2018-01-30 00:09:02,863 WARN L143 SmtUtils]: Spent 4046ms on a formula simplification that was a NOOP. DAG size: 32 [2018-01-30 00:09:05,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:05,756 INFO L93 Difference]: Finished difference Result 447 states and 463 transitions. [2018-01-30 00:09:05,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-30 00:09:05,756 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-01-30 00:09:05,757 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:05,758 INFO L225 Difference]: With dead ends: 447 [2018-01-30 00:09:05,758 INFO L226 Difference]: Without dead ends: 283 [2018-01-30 00:09:05,759 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=104, Invalid=652, Unknown=0, NotChecked=0, Total=756 [2018-01-30 00:09:05,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 283 states. [2018-01-30 00:09:05,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 283 to 247. [2018-01-30 00:09:05,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247 states. [2018-01-30 00:09:05,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 262 transitions. [2018-01-30 00:09:05,779 INFO L78 Accepts]: Start accepts. Automaton has 247 states and 262 transitions. Word has length 47 [2018-01-30 00:09:05,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:05,779 INFO L432 AbstractCegarLoop]: Abstraction has 247 states and 262 transitions. [2018-01-30 00:09:05,779 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-30 00:09:05,779 INFO L276 IsEmpty]: Start isEmpty. Operand 247 states and 262 transitions. [2018-01-30 00:09:05,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-30 00:09:05,780 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:05,780 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:05,780 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:05,781 INFO L82 PathProgramCache]: Analyzing trace with hash -202905466, now seen corresponding path program 1 times [2018-01-30 00:09:05,781 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:05,781 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:05,782 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:05,782 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:09:05,782 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:05,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:05,791 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:05,942 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:05,942 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:09:05,942 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-30 00:09:05,942 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-30 00:09:05,943 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-30 00:09:05,943 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-30 00:09:05,943 INFO L87 Difference]: Start difference. First operand 247 states and 262 transitions. Second operand 7 states. [2018-01-30 00:09:05,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:05,996 INFO L93 Difference]: Finished difference Result 274 states and 281 transitions. [2018-01-30 00:09:05,996 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-30 00:09:05,996 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2018-01-30 00:09:06,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:06,005 INFO L225 Difference]: With dead ends: 274 [2018-01-30 00:09:06,005 INFO L226 Difference]: Without dead ends: 180 [2018-01-30 00:09:06,006 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-01-30 00:09:06,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-01-30 00:09:06,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 178. [2018-01-30 00:09:06,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-30 00:09:06,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 184 transitions. [2018-01-30 00:09:06,018 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 184 transitions. Word has length 52 [2018-01-30 00:09:06,019 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:06,019 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 184 transitions. [2018-01-30 00:09:06,019 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-30 00:09:06,019 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 184 transitions. [2018-01-30 00:09:06,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-30 00:09:06,019 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:06,019 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:06,020 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:06,020 INFO L82 PathProgramCache]: Analyzing trace with hash -2020467638, now seen corresponding path program 1 times [2018-01-30 00:09:06,020 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:06,020 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:06,021 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:06,021 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:06,021 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:06,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:06,035 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:06,283 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-30 00:09:06,284 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:09:06,284 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-30 00:09:06,284 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-30 00:09:06,284 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-30 00:09:06,284 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-01-30 00:09:06,285 INFO L87 Difference]: Start difference. First operand 178 states and 184 transitions. Second operand 12 states. [2018-01-30 00:09:06,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:06,682 INFO L93 Difference]: Finished difference Result 178 states and 184 transitions. [2018-01-30 00:09:06,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-30 00:09:06,683 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2018-01-30 00:09:06,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:06,684 INFO L225 Difference]: With dead ends: 178 [2018-01-30 00:09:06,684 INFO L226 Difference]: Without dead ends: 176 [2018-01-30 00:09:06,685 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2018-01-30 00:09:06,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-01-30 00:09:06,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2018-01-30 00:09:06,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-30 00:09:06,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 182 transitions. [2018-01-30 00:09:06,700 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 182 transitions. Word has length 56 [2018-01-30 00:09:06,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:06,701 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 182 transitions. [2018-01-30 00:09:06,701 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-30 00:09:06,701 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 182 transitions. [2018-01-30 00:09:06,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-30 00:09:06,701 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:06,702 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:06,702 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:06,702 INFO L82 PathProgramCache]: Analyzing trace with hash -2020467637, now seen corresponding path program 1 times [2018-01-30 00:09:06,702 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:06,702 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:06,703 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:06,703 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:06,704 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:06,719 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:06,720 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:06,768 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:06,768 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:09:06,768 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:09:06,782 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:06,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:06,818 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:09:06,835 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:06,868 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:09:06,868 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-01-30 00:09:06,869 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-30 00:09:06,869 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-30 00:09:06,869 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-01-30 00:09:06,869 INFO L87 Difference]: Start difference. First operand 176 states and 182 transitions. Second operand 8 states. [2018-01-30 00:09:06,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:06,952 INFO L93 Difference]: Finished difference Result 320 states and 332 transitions. [2018-01-30 00:09:06,952 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-30 00:09:06,953 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 56 [2018-01-30 00:09:06,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:06,954 INFO L225 Difference]: With dead ends: 320 [2018-01-30 00:09:06,954 INFO L226 Difference]: Without dead ends: 183 [2018-01-30 00:09:06,955 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-01-30 00:09:06,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 183 states. [2018-01-30 00:09:06,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 183 to 180. [2018-01-30 00:09:06,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-01-30 00:09:06,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 186 transitions. [2018-01-30 00:09:06,972 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 186 transitions. Word has length 56 [2018-01-30 00:09:06,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:06,973 INFO L432 AbstractCegarLoop]: Abstraction has 180 states and 186 transitions. [2018-01-30 00:09:06,973 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-30 00:09:06,973 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 186 transitions. [2018-01-30 00:09:06,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-01-30 00:09:06,974 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:06,974 INFO L350 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:06,974 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:06,974 INFO L82 PathProgramCache]: Analyzing trace with hash -1741231795, now seen corresponding path program 2 times [2018-01-30 00:09:06,974 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:06,974 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:06,975 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:06,976 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:06,976 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:06,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:06,992 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:07,055 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:07,055 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:09:07,055 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:09:07,066 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:09:07,100 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:09:07,104 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:09:07,110 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:09:07,128 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:09:07,128 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:09:07,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:09:07,149 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:09:07,185 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:09:07,185 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:09:07,861 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-30 00:09:07,880 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:09:07,881 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-01-30 00:09:07,881 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-30 00:09:07,881 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-30 00:09:07,881 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-01-30 00:09:07,881 INFO L87 Difference]: Start difference. First operand 180 states and 186 transitions. Second operand 22 states. [2018-01-30 00:09:10,064 WARN L143 SmtUtils]: Spent 2040ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-30 00:09:11,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:11,183 INFO L93 Difference]: Finished difference Result 322 states and 336 transitions. [2018-01-30 00:09:11,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-30 00:09:11,183 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 60 [2018-01-30 00:09:11,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:11,184 INFO L225 Difference]: With dead ends: 322 [2018-01-30 00:09:11,185 INFO L226 Difference]: Without dead ends: 185 [2018-01-30 00:09:11,186 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 46 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=152, Invalid=904, Unknown=0, NotChecked=0, Total=1056 [2018-01-30 00:09:11,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-01-30 00:09:11,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 182. [2018-01-30 00:09:11,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-30 00:09:11,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 188 transitions. [2018-01-30 00:09:11,207 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 188 transitions. Word has length 60 [2018-01-30 00:09:11,207 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:11,207 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 188 transitions. [2018-01-30 00:09:11,207 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-30 00:09:11,207 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 188 transitions. [2018-01-30 00:09:11,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-01-30 00:09:11,208 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:11,208 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:11,208 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:11,209 INFO L82 PathProgramCache]: Analyzing trace with hash 190511670, now seen corresponding path program 1 times [2018-01-30 00:09:11,209 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:11,209 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:11,210 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:11,210 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:09:11,210 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:11,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:11,227 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:11,330 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-30 00:09:11,330 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:09:11,330 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-30 00:09:11,330 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-30 00:09:11,331 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-30 00:09:11,331 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-30 00:09:11,331 INFO L87 Difference]: Start difference. First operand 182 states and 188 transitions. Second operand 8 states. [2018-01-30 00:09:11,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:11,432 INFO L93 Difference]: Finished difference Result 295 states and 304 transitions. [2018-01-30 00:09:11,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-30 00:09:11,433 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 72 [2018-01-30 00:09:11,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:11,434 INFO L225 Difference]: With dead ends: 295 [2018-01-30 00:09:11,434 INFO L226 Difference]: Without dead ends: 182 [2018-01-30 00:09:11,434 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-01-30 00:09:11,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-01-30 00:09:11,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 182. [2018-01-30 00:09:11,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-30 00:09:11,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 187 transitions. [2018-01-30 00:09:11,449 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 187 transitions. Word has length 72 [2018-01-30 00:09:11,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:11,449 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 187 transitions. [2018-01-30 00:09:11,450 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-30 00:09:11,450 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 187 transitions. [2018-01-30 00:09:11,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-01-30 00:09:11,450 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:11,450 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:11,450 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:11,451 INFO L82 PathProgramCache]: Analyzing trace with hash 2000820890, now seen corresponding path program 1 times [2018-01-30 00:09:11,451 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:11,451 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:11,452 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:11,452 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:11,452 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:11,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:11,463 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:11,656 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-30 00:09:11,656 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:09:11,656 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-30 00:09:11,657 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-30 00:09:11,657 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-30 00:09:11,657 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-30 00:09:11,657 INFO L87 Difference]: Start difference. First operand 182 states and 187 transitions. Second operand 10 states. [2018-01-30 00:09:11,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:11,739 INFO L93 Difference]: Finished difference Result 297 states and 305 transitions. [2018-01-30 00:09:11,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-30 00:09:11,739 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 77 [2018-01-30 00:09:11,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:11,740 INFO L225 Difference]: With dead ends: 297 [2018-01-30 00:09:11,740 INFO L226 Difference]: Without dead ends: 182 [2018-01-30 00:09:11,741 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2018-01-30 00:09:11,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-01-30 00:09:11,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 182. [2018-01-30 00:09:11,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-30 00:09:11,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 186 transitions. [2018-01-30 00:09:11,762 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 186 transitions. Word has length 77 [2018-01-30 00:09:11,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:11,763 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 186 transitions. [2018-01-30 00:09:11,763 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-30 00:09:11,763 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 186 transitions. [2018-01-30 00:09:11,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-30 00:09:11,764 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:11,764 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:11,764 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:11,764 INFO L82 PathProgramCache]: Analyzing trace with hash 281004515, now seen corresponding path program 1 times [2018-01-30 00:09:11,764 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:11,765 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:11,766 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:11,766 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:11,766 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:11,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:11,786 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:12,185 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-30 00:09:12,186 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:09:12,186 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2018-01-30 00:09:12,186 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-30 00:09:12,187 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-30 00:09:12,187 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=241, Unknown=0, NotChecked=0, Total=272 [2018-01-30 00:09:12,187 INFO L87 Difference]: Start difference. First operand 182 states and 186 transitions. Second operand 17 states. [2018-01-30 00:09:13,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:13,063 INFO L93 Difference]: Finished difference Result 182 states and 186 transitions. [2018-01-30 00:09:13,063 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-30 00:09:13,063 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 88 [2018-01-30 00:09:13,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:13,064 INFO L225 Difference]: With dead ends: 182 [2018-01-30 00:09:13,065 INFO L226 Difference]: Without dead ends: 180 [2018-01-30 00:09:13,065 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=63, Invalid=537, Unknown=0, NotChecked=0, Total=600 [2018-01-30 00:09:13,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-01-30 00:09:13,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2018-01-30 00:09:13,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-01-30 00:09:13,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 184 transitions. [2018-01-30 00:09:13,086 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 184 transitions. Word has length 88 [2018-01-30 00:09:13,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:13,087 INFO L432 AbstractCegarLoop]: Abstraction has 180 states and 184 transitions. [2018-01-30 00:09:13,087 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-30 00:09:13,087 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 184 transitions. [2018-01-30 00:09:13,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-30 00:09:13,088 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:13,088 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:13,088 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:13,088 INFO L82 PathProgramCache]: Analyzing trace with hash 281004516, now seen corresponding path program 1 times [2018-01-30 00:09:13,088 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:13,089 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:13,090 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:13,090 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:13,090 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:13,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:13,110 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:13,196 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:13,196 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:09:13,196 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:09:13,205 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:13,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:13,247 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:09:13,262 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:13,299 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:09:13,299 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-01-30 00:09:13,300 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-30 00:09:13,300 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-30 00:09:13,300 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-01-30 00:09:13,300 INFO L87 Difference]: Start difference. First operand 180 states and 184 transitions. Second operand 10 states. [2018-01-30 00:09:13,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:13,399 INFO L93 Difference]: Finished difference Result 320 states and 328 transitions. [2018-01-30 00:09:13,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-30 00:09:13,399 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 88 [2018-01-30 00:09:13,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:13,401 INFO L225 Difference]: With dead ends: 320 [2018-01-30 00:09:13,402 INFO L226 Difference]: Without dead ends: 187 [2018-01-30 00:09:13,402 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-30 00:09:13,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-01-30 00:09:13,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 184. [2018-01-30 00:09:13,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-01-30 00:09:13,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 188 transitions. [2018-01-30 00:09:13,422 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 188 transitions. Word has length 88 [2018-01-30 00:09:13,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:13,423 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 188 transitions. [2018-01-30 00:09:13,423 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-30 00:09:13,423 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 188 transitions. [2018-01-30 00:09:13,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-01-30 00:09:13,424 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:13,424 INFO L350 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:13,424 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:13,425 INFO L82 PathProgramCache]: Analyzing trace with hash 1319112422, now seen corresponding path program 2 times [2018-01-30 00:09:13,425 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:13,425 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:13,426 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:13,426 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:13,426 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:13,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:13,451 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:13,582 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:13,582 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:09:13,583 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:09:13,595 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:09:13,638 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:09:13,644 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:09:13,675 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:09:13,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:09:13,681 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:09:13,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:09:13,695 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:09:13,708 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:09:13,708 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:09:14,737 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-01-30 00:09:14,758 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:09:14,758 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [10] total 29 [2018-01-30 00:09:14,759 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-30 00:09:14,759 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-30 00:09:14,760 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=705, Unknown=0, NotChecked=0, Total=812 [2018-01-30 00:09:14,760 INFO L87 Difference]: Start difference. First operand 184 states and 188 transitions. Second operand 29 states. [2018-01-30 00:09:16,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:16,526 INFO L93 Difference]: Finished difference Result 322 states and 332 transitions. [2018-01-30 00:09:16,526 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-30 00:09:16,526 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 92 [2018-01-30 00:09:16,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:16,527 INFO L225 Difference]: With dead ends: 322 [2018-01-30 00:09:16,528 INFO L226 Difference]: Without dead ends: 189 [2018-01-30 00:09:16,529 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 73 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 410 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=238, Invalid=1742, Unknown=0, NotChecked=0, Total=1980 [2018-01-30 00:09:16,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-01-30 00:09:16,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 186. [2018-01-30 00:09:16,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-30 00:09:16,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 190 transitions. [2018-01-30 00:09:16,551 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 190 transitions. Word has length 92 [2018-01-30 00:09:16,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:16,551 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 190 transitions. [2018-01-30 00:09:16,552 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-30 00:09:16,552 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 190 transitions. [2018-01-30 00:09:16,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-01-30 00:09:16,553 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:16,553 INFO L350 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:16,553 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:16,553 INFO L82 PathProgramCache]: Analyzing trace with hash 1119276193, now seen corresponding path program 1 times [2018-01-30 00:09:16,553 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:16,554 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:16,555 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:16,555 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:09:16,555 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:16,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:16,575 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:16,792 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-01-30 00:09:16,793 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:09:16,793 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-01-30 00:09:16,793 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-30 00:09:16,793 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-30 00:09:16,793 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-01-30 00:09:16,794 INFO L87 Difference]: Start difference. First operand 186 states and 190 transitions. Second operand 13 states. [2018-01-30 00:09:16,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:16,911 INFO L93 Difference]: Finished difference Result 265 states and 271 transitions. [2018-01-30 00:09:16,912 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-30 00:09:16,912 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 103 [2018-01-30 00:09:16,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:16,913 INFO L225 Difference]: With dead ends: 265 [2018-01-30 00:09:16,913 INFO L226 Difference]: Without dead ends: 186 [2018-01-30 00:09:16,913 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=47, Invalid=295, Unknown=0, NotChecked=0, Total=342 [2018-01-30 00:09:16,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-01-30 00:09:16,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 186. [2018-01-30 00:09:16,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-30 00:09:16,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 189 transitions. [2018-01-30 00:09:16,927 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 189 transitions. Word has length 103 [2018-01-30 00:09:16,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:16,927 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 189 transitions. [2018-01-30 00:09:16,927 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-30 00:09:16,927 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 189 transitions. [2018-01-30 00:09:16,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-01-30 00:09:16,928 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:16,928 INFO L350 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:16,928 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:16,928 INFO L82 PathProgramCache]: Analyzing trace with hash 1846686008, now seen corresponding path program 1 times [2018-01-30 00:09:16,928 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:16,928 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:16,929 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:16,929 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:16,929 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:16,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:16,946 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:17,271 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-01-30 00:09:17,271 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:09:17,272 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-30 00:09:17,272 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-30 00:09:17,272 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-30 00:09:17,272 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-30 00:09:17,273 INFO L87 Difference]: Start difference. First operand 186 states and 189 transitions. Second operand 11 states. [2018-01-30 00:09:17,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:17,520 INFO L93 Difference]: Finished difference Result 192 states and 194 transitions. [2018-01-30 00:09:17,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-30 00:09:17,521 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 121 [2018-01-30 00:09:17,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:17,522 INFO L225 Difference]: With dead ends: 192 [2018-01-30 00:09:17,522 INFO L226 Difference]: Without dead ends: 186 [2018-01-30 00:09:17,522 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2018-01-30 00:09:17,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-01-30 00:09:17,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 186. [2018-01-30 00:09:17,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-30 00:09:17,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 188 transitions. [2018-01-30 00:09:17,536 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 188 transitions. Word has length 121 [2018-01-30 00:09:17,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:17,536 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 188 transitions. [2018-01-30 00:09:17,536 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-30 00:09:17,536 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 188 transitions. [2018-01-30 00:09:17,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-01-30 00:09:17,537 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:17,537 INFO L350 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:17,537 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:17,537 INFO L82 PathProgramCache]: Analyzing trace with hash 1313834769, now seen corresponding path program 1 times [2018-01-30 00:09:17,538 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:17,538 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:17,538 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:17,539 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:17,539 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:17,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:17,558 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:17,680 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:17,681 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:09:17,681 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:09:17,690 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:17,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:17,747 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:09:17,789 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:17,823 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:09:17,823 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-01-30 00:09:17,823 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-30 00:09:17,823 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-30 00:09:17,824 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-01-30 00:09:17,824 INFO L87 Difference]: Start difference. First operand 186 states and 188 transitions. Second operand 12 states. [2018-01-30 00:09:17,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:17,892 INFO L93 Difference]: Finished difference Result 324 states and 328 transitions. [2018-01-30 00:09:17,892 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-30 00:09:17,892 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 128 [2018-01-30 00:09:17,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:17,894 INFO L225 Difference]: With dead ends: 324 [2018-01-30 00:09:17,894 INFO L226 Difference]: Without dead ends: 193 [2018-01-30 00:09:17,895 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 128 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-01-30 00:09:17,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-01-30 00:09:17,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 190. [2018-01-30 00:09:17,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-01-30 00:09:17,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 192 transitions. [2018-01-30 00:09:17,917 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 192 transitions. Word has length 128 [2018-01-30 00:09:17,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:17,917 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 192 transitions. [2018-01-30 00:09:17,917 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-30 00:09:17,918 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 192 transitions. [2018-01-30 00:09:17,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-01-30 00:09:17,918 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:17,919 INFO L350 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:17,919 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:17,919 INFO L82 PathProgramCache]: Analyzing trace with hash 1896292883, now seen corresponding path program 2 times [2018-01-30 00:09:17,919 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:17,919 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:17,920 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:17,920 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:17,920 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:17,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:17,948 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:18,187 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:18,188 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:09:18,188 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:09:18,195 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:09:18,253 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:09:18,262 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:09:18,269 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:09:18,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:09:18,278 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:09:18,301 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:09:18,301 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:09:18,320 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:09:18,320 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:09:19,551 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-01-30 00:09:19,571 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:09:19,572 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [12] total 31 [2018-01-30 00:09:19,572 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-30 00:09:19,572 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-30 00:09:19,573 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=804, Unknown=0, NotChecked=0, Total=930 [2018-01-30 00:09:19,573 INFO L87 Difference]: Start difference. First operand 190 states and 192 transitions. Second operand 31 states. [2018-01-30 00:09:21,648 WARN L143 SmtUtils]: Spent 2035ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-30 00:09:23,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:23,272 INFO L93 Difference]: Finished difference Result 326 states and 332 transitions. [2018-01-30 00:09:23,273 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-30 00:09:23,273 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 132 [2018-01-30 00:09:23,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:23,274 INFO L225 Difference]: With dead ends: 326 [2018-01-30 00:09:23,275 INFO L226 Difference]: Without dead ends: 195 [2018-01-30 00:09:23,276 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 111 SyntacticMatches, 3 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 533 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=297, Invalid=2055, Unknown=0, NotChecked=0, Total=2352 [2018-01-30 00:09:23,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-01-30 00:09:23,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 192. [2018-01-30 00:09:23,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-01-30 00:09:23,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 194 transitions. [2018-01-30 00:09:23,304 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 194 transitions. Word has length 132 [2018-01-30 00:09:23,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:23,304 INFO L432 AbstractCegarLoop]: Abstraction has 192 states and 194 transitions. [2018-01-30 00:09:23,304 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-30 00:09:23,304 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 194 transitions. [2018-01-30 00:09:23,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-01-30 00:09:23,305 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:23,305 INFO L350 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:23,305 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:23,306 INFO L82 PathProgramCache]: Analyzing trace with hash -392860652, now seen corresponding path program 1 times [2018-01-30 00:09:23,306 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:23,306 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:23,307 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:23,307 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:09:23,307 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:23,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:23,337 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:23,722 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-01-30 00:09:23,722 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:09:23,757 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-01-30 00:09:23,758 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-30 00:09:23,758 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-30 00:09:23,758 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=341, Unknown=0, NotChecked=0, Total=380 [2018-01-30 00:09:23,758 INFO L87 Difference]: Start difference. First operand 192 states and 194 transitions. Second operand 20 states. [2018-01-30 00:09:24,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:24,146 INFO L93 Difference]: Finished difference Result 199 states and 201 transitions. [2018-01-30 00:09:24,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-30 00:09:24,146 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 136 [2018-01-30 00:09:24,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:24,147 INFO L225 Difference]: With dead ends: 199 [2018-01-30 00:09:24,147 INFO L226 Difference]: Without dead ends: 197 [2018-01-30 00:09:24,147 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=67, Invalid=635, Unknown=0, NotChecked=0, Total=702 [2018-01-30 00:09:24,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-01-30 00:09:24,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 190. [2018-01-30 00:09:24,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-01-30 00:09:24,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 192 transitions. [2018-01-30 00:09:24,165 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 192 transitions. Word has length 136 [2018-01-30 00:09:24,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:24,166 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 192 transitions. [2018-01-30 00:09:24,166 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-30 00:09:24,166 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 192 transitions. [2018-01-30 00:09:24,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-01-30 00:09:24,166 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:24,166 INFO L350 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:24,167 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:24,167 INFO L82 PathProgramCache]: Analyzing trace with hash -607993699, now seen corresponding path program 1 times [2018-01-30 00:09:24,167 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:24,167 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:24,168 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:24,168 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:24,168 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:24,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:24,186 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:24,614 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 153 trivial. 0 not checked. [2018-01-30 00:09:24,614 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:09:24,614 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2018-01-30 00:09:24,614 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-30 00:09:24,614 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-30 00:09:24,615 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=599, Unknown=0, NotChecked=0, Total=650 [2018-01-30 00:09:24,615 INFO L87 Difference]: Start difference. First operand 190 states and 192 transitions. Second operand 26 states. [2018-01-30 00:09:25,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:25,129 INFO L93 Difference]: Finished difference Result 197 states and 199 transitions. [2018-01-30 00:09:25,129 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-30 00:09:25,129 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 155 [2018-01-30 00:09:25,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:25,130 INFO L225 Difference]: With dead ends: 197 [2018-01-30 00:09:25,131 INFO L226 Difference]: Without dead ends: 195 [2018-01-30 00:09:25,131 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=101, Invalid=1231, Unknown=0, NotChecked=0, Total=1332 [2018-01-30 00:09:25,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-01-30 00:09:25,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 188. [2018-01-30 00:09:25,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-01-30 00:09:25,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 190 transitions. [2018-01-30 00:09:25,148 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 190 transitions. Word has length 155 [2018-01-30 00:09:25,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:25,149 INFO L432 AbstractCegarLoop]: Abstraction has 188 states and 190 transitions. [2018-01-30 00:09:25,149 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-30 00:09:25,149 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 190 transitions. [2018-01-30 00:09:25,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-01-30 00:09:25,149 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:25,150 INFO L350 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:25,150 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:25,150 INFO L82 PathProgramCache]: Analyzing trace with hash -607993698, now seen corresponding path program 1 times [2018-01-30 00:09:25,150 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:25,150 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:25,151 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:25,151 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:25,151 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:25,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:25,169 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:25,580 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:25,580 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:09:25,580 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:09:25,588 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:25,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:25,681 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:09:25,735 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:25,768 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:09:25,768 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-01-30 00:09:25,768 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-30 00:09:25,768 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-30 00:09:25,769 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-01-30 00:09:25,769 INFO L87 Difference]: Start difference. First operand 188 states and 190 transitions. Second operand 14 states. [2018-01-30 00:09:25,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:25,876 INFO L93 Difference]: Finished difference Result 320 states and 324 transitions. [2018-01-30 00:09:25,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-30 00:09:25,877 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 155 [2018-01-30 00:09:25,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:25,878 INFO L225 Difference]: With dead ends: 320 [2018-01-30 00:09:25,878 INFO L226 Difference]: Without dead ends: 195 [2018-01-30 00:09:25,878 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 155 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-01-30 00:09:25,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-01-30 00:09:25,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 192. [2018-01-30 00:09:25,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-01-30 00:09:25,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 194 transitions. [2018-01-30 00:09:25,896 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 194 transitions. Word has length 155 [2018-01-30 00:09:25,897 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:25,897 INFO L432 AbstractCegarLoop]: Abstraction has 192 states and 194 transitions. [2018-01-30 00:09:25,897 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-30 00:09:25,897 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 194 transitions. [2018-01-30 00:09:25,898 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2018-01-30 00:09:25,898 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:25,898 INFO L350 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:25,898 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:25,899 INFO L82 PathProgramCache]: Analyzing trace with hash 801395804, now seen corresponding path program 2 times [2018-01-30 00:09:25,899 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:25,899 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:25,900 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:25,900 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:25,900 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:25,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:25,919 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:26,096 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:26,096 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:09:26,096 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:09:26,104 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:09:26,153 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:09:26,159 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:09:26,166 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:09:26,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:09:26,171 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:09:26,193 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:09:26,194 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:09:26,207 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:09:26,208 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:09:27,562 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 190 trivial. 0 not checked. [2018-01-30 00:09:27,583 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:09:27,583 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [14] total 39 [2018-01-30 00:09:27,584 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-30 00:09:27,584 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-30 00:09:27,584 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=1309, Unknown=0, NotChecked=0, Total=1482 [2018-01-30 00:09:27,585 INFO L87 Difference]: Start difference. First operand 192 states and 194 transitions. Second operand 39 states. [2018-01-30 00:09:29,664 WARN L143 SmtUtils]: Spent 2035ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-30 00:09:29,831 WARN L143 SmtUtils]: Spent 112ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-30 00:09:32,095 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:32,095 INFO L93 Difference]: Finished difference Result 322 states and 328 transitions. [2018-01-30 00:09:32,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-30 00:09:32,095 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 159 [2018-01-30 00:09:32,096 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:32,097 INFO L225 Difference]: With dead ends: 322 [2018-01-30 00:09:32,097 INFO L226 Difference]: Without dead ends: 197 [2018-01-30 00:09:32,098 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 130 SyntacticMatches, 5 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 923 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=422, Invalid=3484, Unknown=0, NotChecked=0, Total=3906 [2018-01-30 00:09:32,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-01-30 00:09:32,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 194. [2018-01-30 00:09:32,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-30 00:09:32,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 196 transitions. [2018-01-30 00:09:32,131 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 196 transitions. Word has length 159 [2018-01-30 00:09:32,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:32,131 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 196 transitions. [2018-01-30 00:09:32,131 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-30 00:09:32,131 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 196 transitions. [2018-01-30 00:09:32,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2018-01-30 00:09:32,133 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:32,133 INFO L350 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:32,133 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:32,133 INFO L82 PathProgramCache]: Analyzing trace with hash 443425390, now seen corresponding path program 1 times [2018-01-30 00:09:32,133 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:32,134 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:32,134 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:32,135 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:09:32,135 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:32,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:32,162 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:32,484 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:32,485 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:09:32,485 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:09:32,496 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:32,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:32,585 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:09:32,616 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:32,652 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:09:32,653 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-01-30 00:09:32,653 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-30 00:09:32,653 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-30 00:09:32,654 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-01-30 00:09:32,654 INFO L87 Difference]: Start difference. First operand 194 states and 196 transitions. Second operand 16 states. [2018-01-30 00:09:32,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:32,804 INFO L93 Difference]: Finished difference Result 324 states and 328 transitions. [2018-01-30 00:09:32,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-30 00:09:32,804 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 168 [2018-01-30 00:09:32,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:32,805 INFO L225 Difference]: With dead ends: 324 [2018-01-30 00:09:32,805 INFO L226 Difference]: Without dead ends: 201 [2018-01-30 00:09:32,806 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 183 GetRequests, 168 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-01-30 00:09:32,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2018-01-30 00:09:32,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 198. [2018-01-30 00:09:32,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-01-30 00:09:32,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 200 transitions. [2018-01-30 00:09:32,842 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 200 transitions. Word has length 168 [2018-01-30 00:09:32,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:32,842 INFO L432 AbstractCegarLoop]: Abstraction has 198 states and 200 transitions. [2018-01-30 00:09:32,842 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-30 00:09:32,843 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 200 transitions. [2018-01-30 00:09:32,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2018-01-30 00:09:32,844 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:32,844 INFO L350 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:32,844 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:32,845 INFO L82 PathProgramCache]: Analyzing trace with hash 225383280, now seen corresponding path program 2 times [2018-01-30 00:09:32,845 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:32,845 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:32,846 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:32,846 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:32,846 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:32,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:32,874 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:33,156 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:33,156 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:09:33,156 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:09:33,164 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:09:33,220 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:09:33,228 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:09:33,238 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:09:33,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-30 00:09:33,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-30 00:09:33,327 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:09:33,328 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:09:33,329 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:09:33,329 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-01-30 00:09:33,420 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-30 00:09:33,426 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-30 00:09:33,442 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-30 00:09:33,442 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-01-30 00:09:33,445 WARN L1033 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-01-30 00:09:33,454 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-01-30 00:09:33,458 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:09:33,462 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-01-30 00:09:33,465 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:09:33,466 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:09:33,471 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-01-30 00:09:33,472 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-30 00:09:33,488 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:09:33,492 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:09:33,498 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:09:33,499 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-01-30 00:09:34,081 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:09:34,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 38 [2018-01-30 00:09:34,084 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:09:34,084 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 9 [2018-01-30 00:09:34,085 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:09:34,086 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:09:34,089 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:09:34,089 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:13 [2018-01-30 00:09:34,653 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-01-30 00:09:34,654 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-01-30 00:09:34,655 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:09:34,656 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:09:34,657 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:09:34,657 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-01-30 00:09:34,738 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 276 trivial. 0 not checked. [2018-01-30 00:09:34,760 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:09:34,760 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [48] imperfect sequences [16] total 62 [2018-01-30 00:09:34,761 INFO L409 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-01-30 00:09:34,761 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-01-30 00:09:34,762 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=220, Invalid=3443, Unknown=1, NotChecked=118, Total=3782 [2018-01-30 00:09:34,762 INFO L87 Difference]: Start difference. First operand 198 states and 200 transitions. Second operand 62 states. [2018-01-30 00:09:37,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:37,147 INFO L93 Difference]: Finished difference Result 304 states and 310 transitions. [2018-01-30 00:09:37,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2018-01-30 00:09:37,148 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 172 [2018-01-30 00:09:37,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:37,148 INFO L225 Difference]: With dead ends: 304 [2018-01-30 00:09:37,148 INFO L226 Difference]: Without dead ends: 181 [2018-01-30 00:09:37,150 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 127 SyntacticMatches, 0 SemanticMatches, 88 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1428 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=376, Invalid=7459, Unknown=1, NotChecked=174, Total=8010 [2018-01-30 00:09:37,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-01-30 00:09:37,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 178. [2018-01-30 00:09:37,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-30 00:09:37,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 178 transitions. [2018-01-30 00:09:37,186 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 178 transitions. Word has length 172 [2018-01-30 00:09:37,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:37,187 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 178 transitions. [2018-01-30 00:09:37,187 INFO L433 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-01-30 00:09:37,187 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 178 transitions. [2018-01-30 00:09:37,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2018-01-30 00:09:37,188 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:37,189 INFO L350 BasicCegarLoop]: trace histogram [13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:37,189 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:37,189 INFO L82 PathProgramCache]: Analyzing trace with hash -1540672566, now seen corresponding path program 1 times [2018-01-30 00:09:37,189 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:37,189 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:37,190 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:37,190 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:09:37,190 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:37,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:37,209 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:37,437 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:37,437 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:09:37,437 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:09:37,443 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:37,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:37,508 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:09:37,543 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:37,564 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:09:37,564 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-01-30 00:09:37,564 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-30 00:09:37,565 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-30 00:09:37,565 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-01-30 00:09:37,565 INFO L87 Difference]: Start difference. First operand 178 states and 178 transitions. Second operand 18 states. [2018-01-30 00:09:37,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:37,686 INFO L93 Difference]: Finished difference Result 284 states and 284 transitions. [2018-01-30 00:09:37,687 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-30 00:09:37,687 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 177 [2018-01-30 00:09:37,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:37,688 INFO L225 Difference]: With dead ends: 284 [2018-01-30 00:09:37,688 INFO L226 Difference]: Without dead ends: 185 [2018-01-30 00:09:37,688 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 194 GetRequests, 177 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-01-30 00:09:37,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-01-30 00:09:37,711 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 182. [2018-01-30 00:09:37,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-30 00:09:37,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 182 transitions. [2018-01-30 00:09:37,711 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 182 transitions. Word has length 177 [2018-01-30 00:09:37,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:37,712 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 182 transitions. [2018-01-30 00:09:37,712 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-30 00:09:37,712 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 182 transitions. [2018-01-30 00:09:37,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2018-01-30 00:09:37,712 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:37,713 INFO L350 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:37,713 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:37,713 INFO L82 PathProgramCache]: Analyzing trace with hash 490489096, now seen corresponding path program 2 times [2018-01-30 00:09:37,713 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:37,713 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:37,714 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:37,714 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:09:37,714 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:37,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:37,739 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:38,122 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:38,122 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:09:38,122 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:09:38,129 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:09:38,176 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:09:38,213 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:09:38,216 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:09:38,222 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:09:38,265 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:38,287 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:09:38,287 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-01-30 00:09:38,287 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-30 00:09:38,288 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-30 00:09:38,288 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-30 00:09:38,288 INFO L87 Difference]: Start difference. First operand 182 states and 182 transitions. Second operand 19 states. [2018-01-30 00:09:38,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:09:38,393 INFO L93 Difference]: Finished difference Result 288 states and 288 transitions. [2018-01-30 00:09:38,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-30 00:09:38,393 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 181 [2018-01-30 00:09:38,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:09:38,394 INFO L225 Difference]: With dead ends: 288 [2018-01-30 00:09:38,394 INFO L226 Difference]: Without dead ends: 189 [2018-01-30 00:09:38,395 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 181 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-01-30 00:09:38,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-01-30 00:09:38,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 186. [2018-01-30 00:09:38,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-30 00:09:38,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 186 transitions. [2018-01-30 00:09:38,416 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 186 transitions. Word has length 181 [2018-01-30 00:09:38,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:09:38,416 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 186 transitions. [2018-01-30 00:09:38,417 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-30 00:09:38,417 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 186 transitions. [2018-01-30 00:09:38,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2018-01-30 00:09:38,418 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:09:38,418 INFO L350 BasicCegarLoop]: trace histogram [15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:09:38,418 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:09:38,418 INFO L82 PathProgramCache]: Analyzing trace with hash -1731819706, now seen corresponding path program 3 times [2018-01-30 00:09:38,418 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:09:38,419 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:09:38,419 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:38,419 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:09:38,420 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:09:38,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:09:38,438 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:09:38,861 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:09:38,862 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:09:38,862 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:09:38,869 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-30 00:09:38,918 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:09:38,943 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:09:38,998 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:09:39,103 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:09:39,178 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:09:39,248 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:09:39,422 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:09:39,536 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:09:40,156 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:09:40,852 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:09:42,734 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:09:44,923 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:09:47,312 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:09:50,720 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:09:54,527 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:10:01,046 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:10:01,051 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:10:01,064 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:10:01,413 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:10:01,437 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:10:01,437 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 24] total 41 [2018-01-30 00:10:01,438 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-30 00:10:01,438 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-30 00:10:01,439 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=472, Invalid=1168, Unknown=0, NotChecked=0, Total=1640 [2018-01-30 00:10:01,439 INFO L87 Difference]: Start difference. First operand 186 states and 186 transitions. Second operand 41 states. [2018-01-30 00:10:01,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:10:01,760 INFO L93 Difference]: Finished difference Result 292 states and 292 transitions. [2018-01-30 00:10:01,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-30 00:10:01,761 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 185 [2018-01-30 00:10:01,761 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:10:01,762 INFO L225 Difference]: With dead ends: 292 [2018-01-30 00:10:01,762 INFO L226 Difference]: Without dead ends: 193 [2018-01-30 00:10:01,763 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 207 GetRequests, 164 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 670 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=522, Invalid=1458, Unknown=0, NotChecked=0, Total=1980 [2018-01-30 00:10:01,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-01-30 00:10:01,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 190. [2018-01-30 00:10:01,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-01-30 00:10:01,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 190 transitions. [2018-01-30 00:10:01,803 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 190 transitions. Word has length 185 [2018-01-30 00:10:01,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:10:01,804 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 190 transitions. [2018-01-30 00:10:01,804 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-30 00:10:01,804 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 190 transitions. [2018-01-30 00:10:01,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2018-01-30 00:10:01,805 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:10:01,806 INFO L350 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:10:01,806 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:10:01,806 INFO L82 PathProgramCache]: Analyzing trace with hash -456557948, now seen corresponding path program 4 times [2018-01-30 00:10:01,806 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:10:01,806 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:10:01,807 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:10:01,807 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:10:01,807 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:10:01,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-30 00:10:01,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-30 00:10:02,030 INFO L409 BasicCegarLoop]: Counterexample might be feasible [2018-01-30 00:10:02,072 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-01-30 00:10:02,082 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-30 00:10:02,108 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 30.01 12:10:02 BoogieIcfgContainer [2018-01-30 00:10:02,108 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-30 00:10:02,109 INFO L168 Benchmark]: Toolchain (without parser) took 68927.88 ms. Allocated memory was 303.0 MB in the beginning and 808.5 MB in the end (delta: 505.4 MB). Free memory was 262.1 MB in the beginning and 741.9 MB in the end (delta: -479.8 MB). Peak memory consumption was 25.6 MB. Max. memory is 5.3 GB. [2018-01-30 00:10:02,110 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 303.0 MB. Free memory is still 268.1 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-30 00:10:02,110 INFO L168 Benchmark]: CACSL2BoogieTranslator took 243.34 ms. Allocated memory is still 303.0 MB. Free memory was 262.1 MB in the beginning and 248.1 MB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 5.3 GB. [2018-01-30 00:10:02,111 INFO L168 Benchmark]: Boogie Preprocessor took 44.08 ms. Allocated memory is still 303.0 MB. Free memory was 248.1 MB in the beginning and 244.1 MB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 5.3 GB. [2018-01-30 00:10:02,111 INFO L168 Benchmark]: RCFGBuilder took 503.70 ms. Allocated memory is still 303.0 MB. Free memory was 244.1 MB in the beginning and 205.6 MB in the end (delta: 38.5 MB). Peak memory consumption was 38.5 MB. Max. memory is 5.3 GB. [2018-01-30 00:10:02,111 INFO L168 Benchmark]: TraceAbstraction took 68103.24 ms. Allocated memory was 303.0 MB in the beginning and 808.5 MB in the end (delta: 505.4 MB). Free memory was 205.6 MB in the beginning and 741.9 MB in the end (delta: -536.3 MB). There was no memory consumed. Max. memory is 5.3 GB. [2018-01-30 00:10:02,113 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 303.0 MB. Free memory is still 268.1 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 243.34 ms. Allocated memory is still 303.0 MB. Free memory was 262.1 MB in the beginning and 248.1 MB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 44.08 ms. Allocated memory is still 303.0 MB. Free memory was 248.1 MB in the beginning and 244.1 MB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 503.70 ms. Allocated memory is still 303.0 MB. Free memory was 244.1 MB in the beginning and 205.6 MB in the end (delta: 38.5 MB). Peak memory consumption was 38.5 MB. Max. memory is 5.3 GB. * TraceAbstraction took 68103.24 ms. Allocated memory was 303.0 MB in the beginning and 808.5 MB in the end (delta: 505.4 MB). Free memory was 205.6 MB in the beginning and 741.9 MB in the end (delta: -536.3 MB). There was no memory consumed. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1452]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1452. Possible FailurePath: [L1453] CALL entry_point() [L1445] struct ldv_kobject *kobj; [L1446] CALL, EXPR ldv_kobject_create() [L1406] struct ldv_kobject *kobj; [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16] [L1073] COND TRUE __VERIFIER_nondet_int() VAL [\old(size)=16, __VERIFIER_nondet_int()=1, size=16] [L1074] EXPR, FCALL malloc(size) VAL [\old(size)=16, malloc(size)={22:0}, size=16] [L1074] RET return malloc(size); VAL [\old(size)=16, \result={22:0}, malloc(size)={22:0}, size=16] [L1408] EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_malloc(sizeof(*kobj))={22:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) VAL [kobj={22:0}, ldv_malloc(sizeof(*kobj))={22:0}] [L1409] COND FALSE !(!kobj) VAL [kobj={22:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={22:0}, memset(kobj, 0, sizeof(*kobj))={22:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={22:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={22:0}, kobj={22:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={22:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={22:0}, kobj={22:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={22:12}] [L1294] RET, FCALL ((&kref->refcount)->counter) = (1) VAL [kref={22:12}, kref={22:12}] [L1382] ldv_kref_init(&kobj->kref) VAL [kobj={22:0}, kobj={22:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [list={22:4}] [L1099] FCALL list->next = list VAL [list={22:4}, list={22:4}] [L1100] FCALL list->prev = list VAL [list={22:4}, list={22:4}] [L1383] RET, FCALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={22:0}, kobj={22:0}] [L1413] ldv_kobject_init(kobj) VAL [kobj={22:0}] [L1414] RET return kobj; VAL [\result={22:0}, kobj={22:0}] [L1446] EXPR ldv_kobject_create() VAL [ldv_kobject_create()={22:0}] [L1446] kobj = ldv_kobject_create() VAL [kobj={22:0}, ldv_kobject_create()={22:0}] [L1447] CALL f_22_get(kobj) VAL [kobj={22:0}] [L1437] CALL ldv_kobject_get(kobj) VAL [kobj={22:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={22:0}, kobj={22:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={22:12}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, v={22:12}] [L1255] int temp; VAL [\old(i)=1, i=1, v={22:12}, v={22:12}] [L1256] EXPR, FCALL v->counter VAL [\old(i)=1, i=1, v={22:12}, v={22:12}, v->counter=1] [L1256] temp = v->counter VAL [\old(i)=1, i=1, temp=1, v={22:12}, v={22:12}, v->counter=1] [L1257] temp += i VAL [\old(i)=1, i=1, temp=2, v={22:12}, v={22:12}] [L1258] FCALL v->counter = temp VAL [\old(i)=1, i=1, temp=2, v={22:12}, v={22:12}] [L1259] RET return temp; VAL [\old(i)=1, \result=2, i=1, temp=2, v={22:12}, v={22:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={22:12}, kref={22:12}, ldv_atomic_add_return(1, (&kref->refcount))=2] [L1374] ldv_kref_get(&kobj->kref) VAL [kobj={22:0}, kobj={22:0}] [L1375] RET return kobj; VAL [\result={22:0}, kobj={22:0}, kobj={22:0}] [L1437] RET ldv_kobject_get(kobj) VAL [kobj={22:0}, kobj={22:0}, ldv_kobject_get(kobj)={22:0}] [L1447] f_22_get(kobj) VAL [kobj={22:0}] [L1449] CALL ldv_kobject_put(kobj) VAL [kobj={22:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={22:0}, kobj={22:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={22:12}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={22:12}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, v={22:12}] [L1264] int temp; VAL [\old(i)=1, i=1, v={22:12}, v={22:12}] [L1265] EXPR, FCALL v->counter VAL [\old(i)=1, i=1, v={22:12}, v={22:12}, v->counter=2] [L1265] temp = v->counter VAL [\old(i)=1, i=1, temp=2, v={22:12}, v={22:12}, v->counter=2] [L1266] temp -= i VAL [\old(i)=1, i=1, temp=1, v={22:12}, v={22:12}] [L1267] FCALL v->counter = temp VAL [\old(i)=1, i=1, temp=1, v={22:12}, v={22:12}] [L1268] RET return temp; VAL [\old(i)=1, \result=1, i=1, temp=1, v={22:12}, v={22:12}] [L1281] EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={22:12}, kref={22:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) VAL [\old(count)=1, count=1, kref={22:12}, kref={22:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, release={-1:0}, release={-1:0}] [L1285] RET return 0; VAL [\old(count)=1, \result=0, count=1, kref={22:12}, kref={22:12}, release={-1:0}, release={-1:0}] [L1313] EXPR ldv_kref_sub(kref, 1, release) VAL [kref={22:12}, kref={22:12}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] RET return ldv_kref_sub(kref, 1, release); VAL [\result=0, kref={22:12}, kref={22:12}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1363] ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={22:0}, kobj={22:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1449] FCALL ldv_kobject_put(kobj) - StatisticsResult: Ultimate Automizer benchmark data CFG has 22 procedures, 179 locations, 23 error locations. UNSAFE Result, 68.0s OverallTime, 33 OverallIterations, 16 TraceHistogramMax, 28.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4951 SDtfs, 1996 SDslu, 47144 SDs, 0 SdLazy, 14133 SolverSat, 312 SolverUnsat, 1 SolverUnknown, 0 SolverNotchecked, 11.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2367 GetRequests, 1716 SyntacticMatches, 11 SemanticMatches, 640 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 4633 ImplicationChecksByTransitivity, 25.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=247occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.6s AutomataMinimizationTime, 32 MinimizatonAttempts, 111 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 23.3s SatisfiabilityAnalysisTime, 13.9s InterpolantComputationTime, 5010 NumberOfCodeBlocks, 4842 NumberOfCodeBlocksAsserted, 64 NumberOfCheckSat, 4774 ConstructedInterpolants, 412 QuantifiedInterpolants, 2678783 SizeOfPredicates, 140 NumberOfNonLiveVariables, 5894 ConjunctsInSsa, 603 ConjunctsInUnsatCore, 47 InterpolantComputations, 23 PerfectInterpolantSequences, 1324/5358 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_4_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-30_00-10-02-120.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_4_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-30_00-10-02-120.csv Received shutdown request...