java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-Reach-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/array-examples/standard_init3_true-unreach-call_ground.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-1cceb4a-m [2018-01-29 23:39:56,901 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-29 23:39:56,902 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-29 23:39:56,911 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-29 23:39:56,911 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-29 23:39:56,912 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-29 23:39:56,912 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-29 23:39:56,913 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-29 23:39:56,914 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-29 23:39:56,915 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-29 23:39:56,915 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-29 23:39:56,915 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-29 23:39:56,916 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-29 23:39:56,917 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-29 23:39:56,917 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-29 23:39:56,919 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-29 23:39:56,920 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-29 23:39:56,921 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-29 23:39:56,921 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-29 23:39:56,922 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-29 23:39:56,924 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-29 23:39:56,924 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-29 23:39:56,924 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-29 23:39:56,924 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-29 23:39:56,925 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-29 23:39:56,926 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-29 23:39:56,926 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-29 23:39:56,926 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-29 23:39:56,926 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-29 23:39:56,926 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-29 23:39:56,927 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-29 23:39:56,927 INFO L98 SettingsManager]: Beginning loading settings from /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-Reach-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-29 23:39:56,932 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-29 23:39:56,932 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-29 23:39:56,932 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-29 23:39:56,932 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-29 23:39:56,933 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-29 23:39:56,933 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-29 23:39:56,933 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-29 23:39:56,933 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-29 23:39:56,933 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-29 23:39:56,933 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-29 23:39:56,933 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-29 23:39:56,934 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-29 23:39:56,934 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-29 23:39:56,934 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-29 23:39:56,934 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-29 23:39:56,934 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-29 23:39:56,934 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-29 23:39:56,934 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-29 23:39:56,934 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-29 23:39:56,934 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-29 23:39:56,934 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-29 23:39:56,935 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-29 23:39:56,935 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-29 23:39:56,935 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-29 23:39:56,935 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-29 23:39:56,935 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-29 23:39:56,935 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-29 23:39:56,935 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-29 23:39:56,935 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-29 23:39:56,935 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-29 23:39:56,935 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-29 23:39:56,936 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-29 23:39:56,936 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-29 23:39:56,936 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-29 23:39:56,954 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-29 23:39:56,960 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-29 23:39:56,962 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-29 23:39:56,963 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-29 23:39:56,963 INFO L276 PluginConnector]: CDTParser initialized [2018-01-29 23:39:56,963 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/standard_init3_true-unreach-call_ground.i [2018-01-29 23:39:57,027 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-29 23:39:57,028 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-29 23:39:57,029 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-29 23:39:57,029 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-29 23:39:57,032 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-29 23:39:57,033 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.01 11:39:57" (1/1) ... [2018-01-29 23:39:57,034 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@9c9c7d5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:39:57, skipping insertion in model container [2018-01-29 23:39:57,035 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.01 11:39:57" (1/1) ... [2018-01-29 23:39:57,043 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-29 23:39:57,052 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-29 23:39:57,120 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-29 23:39:57,128 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-29 23:39:57,130 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:39:57 WrapperNode [2018-01-29 23:39:57,131 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-29 23:39:57,131 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-29 23:39:57,131 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-29 23:39:57,131 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-29 23:39:57,139 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:39:57" (1/1) ... [2018-01-29 23:39:57,139 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:39:57" (1/1) ... [2018-01-29 23:39:57,144 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:39:57" (1/1) ... [2018-01-29 23:39:57,144 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:39:57" (1/1) ... [2018-01-29 23:39:57,145 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:39:57" (1/1) ... [2018-01-29 23:39:57,150 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:39:57" (1/1) ... [2018-01-29 23:39:57,150 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:39:57" (1/1) ... [2018-01-29 23:39:57,151 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-29 23:39:57,151 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-29 23:39:57,151 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-29 23:39:57,151 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-29 23:39:57,152 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:39:57" (1/1) ... No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-29 23:39:57,192 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-29 23:39:57,192 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-29 23:39:57,192 INFO L136 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-01-29 23:39:57,192 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-29 23:39:57,192 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-01-29 23:39:57,193 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-01-29 23:39:57,193 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-29 23:39:57,193 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-29 23:39:57,193 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-29 23:39:57,441 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-29 23:39:57,442 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.01 11:39:57 BoogieIcfgContainer [2018-01-29 23:39:57,442 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-29 23:39:57,442 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-29 23:39:57,442 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-29 23:39:57,444 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-29 23:39:57,444 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 29.01 11:39:57" (1/3) ... [2018-01-29 23:39:57,445 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@214ba7cc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 29.01 11:39:57, skipping insertion in model container [2018-01-29 23:39:57,445 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:39:57" (2/3) ... [2018-01-29 23:39:57,445 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@214ba7cc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 29.01 11:39:57, skipping insertion in model container [2018-01-29 23:39:57,445 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.01 11:39:57" (3/3) ... [2018-01-29 23:39:57,446 INFO L107 eAbstractionObserver]: Analyzing ICFG standard_init3_true-unreach-call_ground.i [2018-01-29 23:39:57,451 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-29 23:39:57,455 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-01-29 23:39:57,479 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-29 23:39:57,479 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-29 23:39:57,479 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-29 23:39:57,479 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-29 23:39:57,479 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-29 23:39:57,479 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-29 23:39:57,479 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-29 23:39:57,480 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-29 23:39:57,480 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-29 23:39:57,492 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states. [2018-01-29 23:39:57,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-29 23:39:57,495 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:57,496 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:57,496 INFO L371 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:57,499 INFO L82 PathProgramCache]: Analyzing trace with hash 1563627066, now seen corresponding path program 1 times [2018-01-29 23:39:57,500 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:57,500 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:57,527 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:57,528 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:39:57,528 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:57,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:57,547 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:57,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-29 23:39:57,564 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-29 23:39:57,564 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-29 23:39:57,565 INFO L409 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-01-29 23:39:57,572 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-01-29 23:39:57,573 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-29 23:39:57,574 INFO L87 Difference]: Start difference. First operand 39 states. Second operand 2 states. [2018-01-29 23:39:57,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:57,586 INFO L93 Difference]: Finished difference Result 68 states and 82 transitions. [2018-01-29 23:39:57,586 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-01-29 23:39:57,587 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 19 [2018-01-29 23:39:57,587 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:57,593 INFO L225 Difference]: With dead ends: 68 [2018-01-29 23:39:57,593 INFO L226 Difference]: Without dead ends: 34 [2018-01-29 23:39:57,595 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-29 23:39:57,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-29 23:39:57,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-29 23:39:57,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-29 23:39:57,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 38 transitions. [2018-01-29 23:39:57,616 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 38 transitions. Word has length 19 [2018-01-29 23:39:57,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:57,616 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 38 transitions. [2018-01-29 23:39:57,616 INFO L433 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-01-29 23:39:57,616 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 38 transitions. [2018-01-29 23:39:57,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-29 23:39:57,617 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:57,617 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:57,617 INFO L371 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:57,617 INFO L82 PathProgramCache]: Analyzing trace with hash 1148876731, now seen corresponding path program 1 times [2018-01-29 23:39:57,617 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:57,617 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:57,618 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:57,618 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:39:57,618 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:57,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:57,623 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:57,641 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-29 23:39:57,641 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-29 23:39:57,641 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-29 23:39:57,642 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-29 23:39:57,643 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-29 23:39:57,643 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-29 23:39:57,643 INFO L87 Difference]: Start difference. First operand 34 states and 38 transitions. Second operand 3 states. [2018-01-29 23:39:57,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:57,766 INFO L93 Difference]: Finished difference Result 70 states and 80 transitions. [2018-01-29 23:39:57,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-29 23:39:57,766 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 22 [2018-01-29 23:39:57,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:57,767 INFO L225 Difference]: With dead ends: 70 [2018-01-29 23:39:57,767 INFO L226 Difference]: Without dead ends: 46 [2018-01-29 23:39:57,767 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-29 23:39:57,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-29 23:39:57,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 40. [2018-01-29 23:39:57,770 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-29 23:39:57,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 44 transitions. [2018-01-29 23:39:57,771 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 44 transitions. Word has length 22 [2018-01-29 23:39:57,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:57,771 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 44 transitions. [2018-01-29 23:39:57,771 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-29 23:39:57,771 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 44 transitions. [2018-01-29 23:39:57,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-29 23:39:57,771 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:57,771 INFO L350 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:57,772 INFO L371 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:57,772 INFO L82 PathProgramCache]: Analyzing trace with hash -1491453438, now seen corresponding path program 1 times [2018-01-29 23:39:57,772 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:57,772 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:57,772 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:57,773 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:39:57,773 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:57,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:57,781 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:57,834 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-29 23:39:57,834 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:57,835 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:57,848 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:39:57,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:57,923 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:57,935 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-29 23:39:57,951 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:57,952 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-01-29 23:39:57,952 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-29 23:39:57,952 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-29 23:39:57,952 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-01-29 23:39:57,952 INFO L87 Difference]: Start difference. First operand 40 states and 44 transitions. Second operand 4 states. [2018-01-29 23:39:58,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:58,160 INFO L93 Difference]: Finished difference Result 86 states and 96 transitions. [2018-01-29 23:39:58,160 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-29 23:39:58,160 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-01-29 23:39:58,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:58,161 INFO L225 Difference]: With dead ends: 86 [2018-01-29 23:39:58,161 INFO L226 Difference]: Without dead ends: 58 [2018-01-29 23:39:58,161 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-01-29 23:39:58,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-01-29 23:39:58,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 52. [2018-01-29 23:39:58,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-29 23:39:58,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 56 transitions. [2018-01-29 23:39:58,165 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 56 transitions. Word has length 34 [2018-01-29 23:39:58,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:58,165 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 56 transitions. [2018-01-29 23:39:58,165 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-29 23:39:58,165 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 56 transitions. [2018-01-29 23:39:58,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-29 23:39:58,166 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:58,166 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:58,166 INFO L371 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:58,166 INFO L82 PathProgramCache]: Analyzing trace with hash 2122451401, now seen corresponding path program 2 times [2018-01-29 23:39:58,166 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:58,167 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:58,167 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:58,167 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:39:58,167 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:58,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:58,177 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:58,237 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-01-29 23:39:58,238 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:58,238 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:58,247 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:39:58,255 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:58,266 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:58,266 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:58,268 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:58,271 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-01-29 23:39:58,288 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:58,288 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-01-29 23:39:58,288 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-29 23:39:58,288 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-29 23:39:58,288 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-01-29 23:39:58,289 INFO L87 Difference]: Start difference. First operand 52 states and 56 transitions. Second operand 5 states. [2018-01-29 23:39:58,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:58,418 INFO L93 Difference]: Finished difference Result 106 states and 116 transitions. [2018-01-29 23:39:58,418 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-29 23:39:58,418 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 46 [2018-01-29 23:39:58,419 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:58,419 INFO L225 Difference]: With dead ends: 106 [2018-01-29 23:39:58,419 INFO L226 Difference]: Without dead ends: 70 [2018-01-29 23:39:58,420 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-01-29 23:39:58,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-01-29 23:39:58,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 64. [2018-01-29 23:39:58,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-01-29 23:39:58,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 68 transitions. [2018-01-29 23:39:58,423 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 68 transitions. Word has length 46 [2018-01-29 23:39:58,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:58,424 INFO L432 AbstractCegarLoop]: Abstraction has 64 states and 68 transitions. [2018-01-29 23:39:58,424 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-29 23:39:58,424 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 68 transitions. [2018-01-29 23:39:58,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-01-29 23:39:58,424 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:58,424 INFO L350 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:58,424 INFO L371 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:58,425 INFO L82 PathProgramCache]: Analyzing trace with hash -767514864, now seen corresponding path program 3 times [2018-01-29 23:39:58,425 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:58,425 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:58,425 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:58,425 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:58,425 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:58,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:58,434 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:58,524 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-29 23:39:58,524 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:58,524 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:58,543 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:39:58,547 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:58,555 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:58,557 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:58,559 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:58,560 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:58,561 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:58,570 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-29 23:39:58,586 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:58,586 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-01-29 23:39:58,587 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-29 23:39:58,587 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-29 23:39:58,587 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-01-29 23:39:58,587 INFO L87 Difference]: Start difference. First operand 64 states and 68 transitions. Second operand 6 states. [2018-01-29 23:39:58,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:58,807 INFO L93 Difference]: Finished difference Result 126 states and 136 transitions. [2018-01-29 23:39:58,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-29 23:39:58,808 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2018-01-29 23:39:58,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:58,808 INFO L225 Difference]: With dead ends: 126 [2018-01-29 23:39:58,808 INFO L226 Difference]: Without dead ends: 82 [2018-01-29 23:39:58,809 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-01-29 23:39:58,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-01-29 23:39:58,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 76. [2018-01-29 23:39:58,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-01-29 23:39:58,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 80 transitions. [2018-01-29 23:39:58,813 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 80 transitions. Word has length 58 [2018-01-29 23:39:58,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:58,813 INFO L432 AbstractCegarLoop]: Abstraction has 76 states and 80 transitions. [2018-01-29 23:39:58,813 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-29 23:39:58,813 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 80 transitions. [2018-01-29 23:39:58,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-01-29 23:39:58,814 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:58,814 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:58,814 INFO L371 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:58,814 INFO L82 PathProgramCache]: Analyzing trace with hash 256168407, now seen corresponding path program 4 times [2018-01-29 23:39:58,814 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:58,815 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:58,815 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:58,815 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:58,815 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:58,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:58,831 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:59,096 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2018-01-29 23:39:59,096 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:59,096 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:59,101 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-29 23:39:59,121 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:59,123 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:59,129 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2018-01-29 23:39:59,145 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:59,145 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2018-01-29 23:39:59,146 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-29 23:39:59,146 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-29 23:39:59,146 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-01-29 23:39:59,146 INFO L87 Difference]: Start difference. First operand 76 states and 80 transitions. Second operand 7 states. [2018-01-29 23:39:59,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:59,326 INFO L93 Difference]: Finished difference Result 146 states and 156 transitions. [2018-01-29 23:39:59,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-29 23:39:59,326 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 70 [2018-01-29 23:39:59,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:59,326 INFO L225 Difference]: With dead ends: 146 [2018-01-29 23:39:59,326 INFO L226 Difference]: Without dead ends: 94 [2018-01-29 23:39:59,327 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 71 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-01-29 23:39:59,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-01-29 23:39:59,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 88. [2018-01-29 23:39:59,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-01-29 23:39:59,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 92 transitions. [2018-01-29 23:39:59,332 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 92 transitions. Word has length 70 [2018-01-29 23:39:59,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:59,332 INFO L432 AbstractCegarLoop]: Abstraction has 88 states and 92 transitions. [2018-01-29 23:39:59,332 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-29 23:39:59,333 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 92 transitions. [2018-01-29 23:39:59,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-01-29 23:39:59,333 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:59,333 INFO L350 BasicCegarLoop]: trace histogram [6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:59,333 INFO L371 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:59,333 INFO L82 PathProgramCache]: Analyzing trace with hash 937249310, now seen corresponding path program 5 times [2018-01-29 23:39:59,334 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:59,334 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:59,334 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:59,334 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:59,334 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:59,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:59,344 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:59,431 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-01-29 23:39:59,431 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:59,431 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:59,437 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-29 23:39:59,443 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:59,452 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:59,453 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:59,455 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:59,457 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:59,462 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:59,463 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:59,465 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:59,471 INFO L134 CoverageAnalysis]: Checked inductivity of 150 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-01-29 23:39:59,489 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:59,489 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2018-01-29 23:39:59,490 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-29 23:39:59,490 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-29 23:39:59,490 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-01-29 23:39:59,490 INFO L87 Difference]: Start difference. First operand 88 states and 92 transitions. Second operand 8 states. [2018-01-29 23:39:59,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:59,564 INFO L93 Difference]: Finished difference Result 166 states and 176 transitions. [2018-01-29 23:39:59,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-29 23:39:59,565 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 82 [2018-01-29 23:39:59,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:59,565 INFO L225 Difference]: With dead ends: 166 [2018-01-29 23:39:59,565 INFO L226 Difference]: Without dead ends: 106 [2018-01-29 23:39:59,566 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-01-29 23:39:59,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-01-29 23:39:59,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 100. [2018-01-29 23:39:59,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-01-29 23:39:59,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 104 transitions. [2018-01-29 23:39:59,569 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 104 transitions. Word has length 82 [2018-01-29 23:39:59,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:59,570 INFO L432 AbstractCegarLoop]: Abstraction has 100 states and 104 transitions. [2018-01-29 23:39:59,570 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-29 23:39:59,570 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 104 transitions. [2018-01-29 23:39:59,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-01-29 23:39:59,570 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:59,570 INFO L350 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:59,570 INFO L371 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:59,571 INFO L82 PathProgramCache]: Analyzing trace with hash 330878949, now seen corresponding path program 6 times [2018-01-29 23:39:59,571 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:59,571 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:59,571 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:59,571 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:59,571 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:59,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:59,582 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:59,678 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-01-29 23:39:59,678 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:59,678 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:59,682 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-29 23:39:59,687 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:59,690 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:59,695 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:59,699 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:59,701 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:59,710 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:59,712 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:59,713 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:59,714 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:59,721 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 144 trivial. 0 not checked. [2018-01-29 23:39:59,738 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:59,738 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 9 [2018-01-29 23:39:59,738 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-29 23:39:59,738 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-29 23:39:59,738 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-01-29 23:39:59,739 INFO L87 Difference]: Start difference. First operand 100 states and 104 transitions. Second operand 9 states. [2018-01-29 23:39:59,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:59,920 INFO L93 Difference]: Finished difference Result 186 states and 196 transitions. [2018-01-29 23:39:59,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-29 23:39:59,920 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 94 [2018-01-29 23:39:59,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:59,921 INFO L225 Difference]: With dead ends: 186 [2018-01-29 23:39:59,921 INFO L226 Difference]: Without dead ends: 118 [2018-01-29 23:39:59,921 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 95 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-01-29 23:39:59,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-01-29 23:39:59,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 112. [2018-01-29 23:39:59,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-01-29 23:39:59,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 116 transitions. [2018-01-29 23:39:59,925 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 116 transitions. Word has length 94 [2018-01-29 23:39:59,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:59,926 INFO L432 AbstractCegarLoop]: Abstraction has 112 states and 116 transitions. [2018-01-29 23:39:59,926 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-29 23:39:59,926 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 116 transitions. [2018-01-29 23:39:59,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-01-29 23:39:59,927 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:59,927 INFO L350 BasicCegarLoop]: trace histogram [8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:59,927 INFO L371 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:59,927 INFO L82 PathProgramCache]: Analyzing trace with hash 1608917804, now seen corresponding path program 7 times [2018-01-29 23:39:59,927 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:59,927 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:59,928 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:59,928 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:59,928 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:59,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:59,938 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:00,129 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 196 trivial. 0 not checked. [2018-01-29 23:40:00,130 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:00,130 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:00,137 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:40:00,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:00,155 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:00,166 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 196 trivial. 0 not checked. [2018-01-29 23:40:00,183 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:00,183 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 10 [2018-01-29 23:40:00,183 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-29 23:40:00,183 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-29 23:40:00,186 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-01-29 23:40:00,186 INFO L87 Difference]: Start difference. First operand 112 states and 116 transitions. Second operand 10 states. [2018-01-29 23:40:00,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:00,334 INFO L93 Difference]: Finished difference Result 206 states and 216 transitions. [2018-01-29 23:40:00,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-29 23:40:00,335 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 106 [2018-01-29 23:40:00,335 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:00,335 INFO L225 Difference]: With dead ends: 206 [2018-01-29 23:40:00,335 INFO L226 Difference]: Without dead ends: 130 [2018-01-29 23:40:00,336 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 107 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-01-29 23:40:00,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-01-29 23:40:00,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 124. [2018-01-29 23:40:00,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-01-29 23:40:00,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 128 transitions. [2018-01-29 23:40:00,341 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 128 transitions. Word has length 106 [2018-01-29 23:40:00,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:00,341 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 128 transitions. [2018-01-29 23:40:00,342 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-29 23:40:00,342 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 128 transitions. [2018-01-29 23:40:00,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2018-01-29 23:40:00,343 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:00,343 INFO L350 BasicCegarLoop]: trace histogram [9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:00,343 INFO L371 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:00,343 INFO L82 PathProgramCache]: Analyzing trace with hash -19659789, now seen corresponding path program 8 times [2018-01-29 23:40:00,343 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:00,343 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:00,344 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:00,344 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:40:00,344 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:00,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:00,353 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:00,496 INFO L134 CoverageAnalysis]: Checked inductivity of 384 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 256 trivial. 0 not checked. [2018-01-29 23:40:00,496 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:00,496 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:00,502 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:40:00,517 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:00,531 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:00,546 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:00,548 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:00,564 INFO L134 CoverageAnalysis]: Checked inductivity of 384 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 256 trivial. 0 not checked. [2018-01-29 23:40:00,581 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:00,581 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-01-29 23:40:00,581 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-29 23:40:00,581 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-29 23:40:00,581 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-01-29 23:40:00,581 INFO L87 Difference]: Start difference. First operand 124 states and 128 transitions. Second operand 11 states. [2018-01-29 23:40:00,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:00,787 INFO L93 Difference]: Finished difference Result 226 states and 236 transitions. [2018-01-29 23:40:00,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-29 23:40:00,788 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 118 [2018-01-29 23:40:00,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:00,788 INFO L225 Difference]: With dead ends: 226 [2018-01-29 23:40:00,788 INFO L226 Difference]: Without dead ends: 142 [2018-01-29 23:40:00,789 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 119 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-01-29 23:40:00,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-01-29 23:40:00,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 136. [2018-01-29 23:40:00,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-29 23:40:00,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 140 transitions. [2018-01-29 23:40:00,792 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 140 transitions. Word has length 118 [2018-01-29 23:40:00,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:00,792 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 140 transitions. [2018-01-29 23:40:00,792 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-29 23:40:00,792 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 140 transitions. [2018-01-29 23:40:00,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2018-01-29 23:40:00,795 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:00,795 INFO L350 BasicCegarLoop]: trace histogram [10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:00,795 INFO L371 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:00,795 INFO L82 PathProgramCache]: Analyzing trace with hash 676409914, now seen corresponding path program 9 times [2018-01-29 23:40:00,796 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:00,796 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:00,796 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:00,796 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:00,796 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:00,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:00,809 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:00,930 INFO L134 CoverageAnalysis]: Checked inductivity of 486 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 324 trivial. 0 not checked. [2018-01-29 23:40:00,930 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:00,930 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:00,935 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:40:00,946 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:00,948 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:00,949 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:00,951 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:00,952 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:00,954 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:00,957 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:00,959 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:00,963 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:00,966 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:00,966 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:00,968 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:00,981 INFO L134 CoverageAnalysis]: Checked inductivity of 486 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 324 trivial. 0 not checked. [2018-01-29 23:40:00,998 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:00,999 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 12 [2018-01-29 23:40:00,999 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-29 23:40:00,999 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-29 23:40:00,999 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-01-29 23:40:00,999 INFO L87 Difference]: Start difference. First operand 136 states and 140 transitions. Second operand 12 states. [2018-01-29 23:40:01,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:01,166 INFO L93 Difference]: Finished difference Result 246 states and 256 transitions. [2018-01-29 23:40:01,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-29 23:40:01,167 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 130 [2018-01-29 23:40:01,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:01,168 INFO L225 Difference]: With dead ends: 246 [2018-01-29 23:40:01,168 INFO L226 Difference]: Without dead ends: 154 [2018-01-29 23:40:01,168 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 131 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-01-29 23:40:01,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-01-29 23:40:01,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 148. [2018-01-29 23:40:01,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-01-29 23:40:01,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 152 transitions. [2018-01-29 23:40:01,171 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 152 transitions. Word has length 130 [2018-01-29 23:40:01,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:01,171 INFO L432 AbstractCegarLoop]: Abstraction has 148 states and 152 transitions. [2018-01-29 23:40:01,171 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-29 23:40:01,171 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 152 transitions. [2018-01-29 23:40:01,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-01-29 23:40:01,172 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:01,172 INFO L350 BasicCegarLoop]: trace histogram [11, 11, 11, 10, 10, 10, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:01,172 INFO L371 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:01,172 INFO L82 PathProgramCache]: Analyzing trace with hash -1718850047, now seen corresponding path program 10 times [2018-01-29 23:40:01,172 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:01,173 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:01,173 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:01,173 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:01,173 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:01,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:01,183 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:01,272 INFO L134 CoverageAnalysis]: Checked inductivity of 600 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 400 trivial. 0 not checked. [2018-01-29 23:40:01,273 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:01,273 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:01,277 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-29 23:40:01,290 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:01,292 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:01,303 INFO L134 CoverageAnalysis]: Checked inductivity of 600 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 400 trivial. 0 not checked. [2018-01-29 23:40:01,319 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:01,319 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 13 [2018-01-29 23:40:01,319 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-29 23:40:01,320 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-29 23:40:01,320 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-01-29 23:40:01,320 INFO L87 Difference]: Start difference. First operand 148 states and 152 transitions. Second operand 13 states. [2018-01-29 23:40:01,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:01,424 INFO L93 Difference]: Finished difference Result 266 states and 276 transitions. [2018-01-29 23:40:01,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-29 23:40:01,426 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 142 [2018-01-29 23:40:01,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:01,426 INFO L225 Difference]: With dead ends: 266 [2018-01-29 23:40:01,426 INFO L226 Difference]: Without dead ends: 166 [2018-01-29 23:40:01,427 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 143 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-01-29 23:40:01,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-01-29 23:40:01,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 160. [2018-01-29 23:40:01,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-01-29 23:40:01,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 164 transitions. [2018-01-29 23:40:01,430 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 164 transitions. Word has length 142 [2018-01-29 23:40:01,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:01,430 INFO L432 AbstractCegarLoop]: Abstraction has 160 states and 164 transitions. [2018-01-29 23:40:01,430 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-29 23:40:01,430 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 164 transitions. [2018-01-29 23:40:01,431 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2018-01-29 23:40:01,431 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:01,431 INFO L350 BasicCegarLoop]: trace histogram [12, 12, 12, 11, 11, 11, 11, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:01,431 INFO L371 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:01,431 INFO L82 PathProgramCache]: Analyzing trace with hash -988514488, now seen corresponding path program 11 times [2018-01-29 23:40:01,431 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:01,431 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:01,432 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:01,432 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:01,432 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:01,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:01,441 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:01,567 INFO L134 CoverageAnalysis]: Checked inductivity of 726 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 484 trivial. 0 not checked. [2018-01-29 23:40:01,568 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:01,568 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:01,573 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-29 23:40:01,577 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:01,579 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:01,580 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:01,581 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:01,583 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:01,585 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:01,587 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:01,590 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:01,592 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:01,595 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:01,599 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:01,619 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:01,620 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:01,622 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:01,633 INFO L134 CoverageAnalysis]: Checked inductivity of 726 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 484 trivial. 0 not checked. [2018-01-29 23:40:01,664 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:01,665 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 14 [2018-01-29 23:40:01,665 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-29 23:40:01,665 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-29 23:40:01,665 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-01-29 23:40:01,665 INFO L87 Difference]: Start difference. First operand 160 states and 164 transitions. Second operand 14 states. [2018-01-29 23:40:01,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:01,920 INFO L93 Difference]: Finished difference Result 286 states and 296 transitions. [2018-01-29 23:40:01,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-29 23:40:01,920 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 154 [2018-01-29 23:40:01,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:01,921 INFO L225 Difference]: With dead ends: 286 [2018-01-29 23:40:01,921 INFO L226 Difference]: Without dead ends: 178 [2018-01-29 23:40:01,922 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 155 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-01-29 23:40:01,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-01-29 23:40:01,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 172. [2018-01-29 23:40:01,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-01-29 23:40:01,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 176 transitions. [2018-01-29 23:40:01,924 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 176 transitions. Word has length 154 [2018-01-29 23:40:01,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:01,925 INFO L432 AbstractCegarLoop]: Abstraction has 172 states and 176 transitions. [2018-01-29 23:40:01,925 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-29 23:40:01,925 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 176 transitions. [2018-01-29 23:40:01,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2018-01-29 23:40:01,925 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:01,926 INFO L350 BasicCegarLoop]: trace histogram [13, 13, 13, 12, 12, 12, 12, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:01,926 INFO L371 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:01,926 INFO L82 PathProgramCache]: Analyzing trace with hash 47713807, now seen corresponding path program 12 times [2018-01-29 23:40:01,926 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:01,926 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:01,926 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:01,926 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:01,926 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:01,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:01,948 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:02,095 INFO L134 CoverageAnalysis]: Checked inductivity of 864 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 576 trivial. 0 not checked. [2018-01-29 23:40:02,095 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:02,095 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:02,100 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-29 23:40:02,106 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:02,113 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:02,117 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:02,118 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:02,120 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:02,121 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:02,123 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:02,124 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:02,126 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:02,128 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:02,144 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:02,154 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:02,160 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:02,161 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:02,162 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:02,175 INFO L134 CoverageAnalysis]: Checked inductivity of 864 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 576 trivial. 0 not checked. [2018-01-29 23:40:02,193 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:02,193 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 15 [2018-01-29 23:40:02,193 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-29 23:40:02,193 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-29 23:40:02,193 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=105, Unknown=0, NotChecked=0, Total=210 [2018-01-29 23:40:02,193 INFO L87 Difference]: Start difference. First operand 172 states and 176 transitions. Second operand 15 states. [2018-01-29 23:40:02,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:02,342 INFO L93 Difference]: Finished difference Result 306 states and 316 transitions. [2018-01-29 23:40:02,342 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-29 23:40:02,342 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 166 [2018-01-29 23:40:02,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:02,343 INFO L225 Difference]: With dead ends: 306 [2018-01-29 23:40:02,343 INFO L226 Difference]: Without dead ends: 190 [2018-01-29 23:40:02,343 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 167 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=105, Invalid=105, Unknown=0, NotChecked=0, Total=210 [2018-01-29 23:40:02,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-01-29 23:40:02,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 184. [2018-01-29 23:40:02,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-01-29 23:40:02,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 188 transitions. [2018-01-29 23:40:02,346 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 188 transitions. Word has length 166 [2018-01-29 23:40:02,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:02,346 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 188 transitions. [2018-01-29 23:40:02,346 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-29 23:40:02,346 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 188 transitions. [2018-01-29 23:40:02,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2018-01-29 23:40:02,347 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:02,347 INFO L350 BasicCegarLoop]: trace histogram [14, 14, 14, 13, 13, 13, 13, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:02,347 INFO L371 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:02,347 INFO L82 PathProgramCache]: Analyzing trace with hash -1071254954, now seen corresponding path program 13 times [2018-01-29 23:40:02,347 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:02,347 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:02,347 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:02,348 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:02,348 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:02,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:02,357 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:02,496 INFO L134 CoverageAnalysis]: Checked inductivity of 1014 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2018-01-29 23:40:02,496 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:02,496 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:02,502 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:40:02,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:02,530 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:02,548 INFO L134 CoverageAnalysis]: Checked inductivity of 1014 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 676 trivial. 0 not checked. [2018-01-29 23:40:02,565 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:02,565 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 16 [2018-01-29 23:40:02,565 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-29 23:40:02,565 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-29 23:40:02,565 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-01-29 23:40:02,565 INFO L87 Difference]: Start difference. First operand 184 states and 188 transitions. Second operand 16 states. [2018-01-29 23:40:02,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:02,733 INFO L93 Difference]: Finished difference Result 326 states and 336 transitions. [2018-01-29 23:40:02,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-29 23:40:02,733 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 178 [2018-01-29 23:40:02,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:02,734 INFO L225 Difference]: With dead ends: 326 [2018-01-29 23:40:02,734 INFO L226 Difference]: Without dead ends: 202 [2018-01-29 23:40:02,735 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 193 GetRequests, 179 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-01-29 23:40:02,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2018-01-29 23:40:02,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 196. [2018-01-29 23:40:02,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2018-01-29 23:40:02,740 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 200 transitions. [2018-01-29 23:40:02,740 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 200 transitions. Word has length 178 [2018-01-29 23:40:02,740 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:02,740 INFO L432 AbstractCegarLoop]: Abstraction has 196 states and 200 transitions. [2018-01-29 23:40:02,740 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-29 23:40:02,741 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 200 transitions. [2018-01-29 23:40:02,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2018-01-29 23:40:02,741 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:02,741 INFO L350 BasicCegarLoop]: trace histogram [15, 15, 15, 14, 14, 14, 14, 14, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:02,741 INFO L371 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:02,741 INFO L82 PathProgramCache]: Analyzing trace with hash -1347623907, now seen corresponding path program 14 times [2018-01-29 23:40:02,741 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:02,741 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:02,742 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:02,742 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:40:02,742 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:02,754 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:02,754 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:03,015 INFO L134 CoverageAnalysis]: Checked inductivity of 1176 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 784 trivial. 0 not checked. [2018-01-29 23:40:03,016 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:03,016 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:03,021 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:40:03,028 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:03,043 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:03,053 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:03,054 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:03,071 INFO L134 CoverageAnalysis]: Checked inductivity of 1176 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 784 trivial. 0 not checked. [2018-01-29 23:40:03,088 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:03,088 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 17 [2018-01-29 23:40:03,088 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-29 23:40:03,089 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-29 23:40:03,089 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2018-01-29 23:40:03,089 INFO L87 Difference]: Start difference. First operand 196 states and 200 transitions. Second operand 17 states. [2018-01-29 23:40:03,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:03,228 INFO L93 Difference]: Finished difference Result 346 states and 356 transitions. [2018-01-29 23:40:03,233 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-29 23:40:03,233 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 190 [2018-01-29 23:40:03,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:03,234 INFO L225 Difference]: With dead ends: 346 [2018-01-29 23:40:03,234 INFO L226 Difference]: Without dead ends: 214 [2018-01-29 23:40:03,235 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 191 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2018-01-29 23:40:03,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-01-29 23:40:03,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 208. [2018-01-29 23:40:03,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-01-29 23:40:03,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 212 transitions. [2018-01-29 23:40:03,237 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 212 transitions. Word has length 190 [2018-01-29 23:40:03,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:03,238 INFO L432 AbstractCegarLoop]: Abstraction has 208 states and 212 transitions. [2018-01-29 23:40:03,238 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-29 23:40:03,238 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 212 transitions. [2018-01-29 23:40:03,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2018-01-29 23:40:03,238 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:03,238 INFO L350 BasicCegarLoop]: trace histogram [16, 16, 16, 15, 15, 15, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:03,238 INFO L371 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:03,239 INFO L82 PathProgramCache]: Analyzing trace with hash -109337756, now seen corresponding path program 15 times [2018-01-29 23:40:03,239 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:03,239 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:03,239 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:03,239 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:03,239 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:03,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:03,247 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:03,716 INFO L134 CoverageAnalysis]: Checked inductivity of 1350 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 900 trivial. 0 not checked. [2018-01-29 23:40:03,716 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:03,716 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:03,726 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:40:03,735 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:03,736 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:03,737 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:03,739 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:03,740 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:03,742 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:03,744 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:03,747 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:03,751 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:03,754 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:03,758 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:03,764 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:03,768 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:03,773 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:03,779 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:03,786 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:03,787 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:03,789 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:03,809 INFO L134 CoverageAnalysis]: Checked inductivity of 1350 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 900 trivial. 0 not checked. [2018-01-29 23:40:03,827 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:03,827 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 18 [2018-01-29 23:40:03,827 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-29 23:40:03,827 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-29 23:40:03,827 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-01-29 23:40:03,828 INFO L87 Difference]: Start difference. First operand 208 states and 212 transitions. Second operand 18 states. [2018-01-29 23:40:04,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:04,385 INFO L93 Difference]: Finished difference Result 366 states and 376 transitions. [2018-01-29 23:40:04,385 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-29 23:40:04,385 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 202 [2018-01-29 23:40:04,385 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:04,386 INFO L225 Difference]: With dead ends: 366 [2018-01-29 23:40:04,386 INFO L226 Difference]: Without dead ends: 226 [2018-01-29 23:40:04,386 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 203 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-01-29 23:40:04,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2018-01-29 23:40:04,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 220. [2018-01-29 23:40:04,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2018-01-29 23:40:04,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 224 transitions. [2018-01-29 23:40:04,389 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 224 transitions. Word has length 202 [2018-01-29 23:40:04,389 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:04,389 INFO L432 AbstractCegarLoop]: Abstraction has 220 states and 224 transitions. [2018-01-29 23:40:04,389 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-29 23:40:04,389 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 224 transitions. [2018-01-29 23:40:04,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 215 [2018-01-29 23:40:04,390 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:04,390 INFO L350 BasicCegarLoop]: trace histogram [17, 17, 17, 16, 16, 16, 16, 16, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:04,390 INFO L371 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:04,390 INFO L82 PathProgramCache]: Analyzing trace with hash 1795223595, now seen corresponding path program 16 times [2018-01-29 23:40:04,390 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:04,390 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:04,391 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:04,391 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:04,391 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:04,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:04,399 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:04,642 INFO L134 CoverageAnalysis]: Checked inductivity of 1536 backedges. 0 proven. 512 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2018-01-29 23:40:04,642 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:04,642 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:04,647 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-29 23:40:04,679 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:04,681 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:04,699 INFO L134 CoverageAnalysis]: Checked inductivity of 1536 backedges. 0 proven. 512 refuted. 0 times theorem prover too weak. 1024 trivial. 0 not checked. [2018-01-29 23:40:04,716 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:04,716 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 19 [2018-01-29 23:40:04,717 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-29 23:40:04,717 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-29 23:40:04,717 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-01-29 23:40:04,717 INFO L87 Difference]: Start difference. First operand 220 states and 224 transitions. Second operand 19 states. [2018-01-29 23:40:04,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:04,860 INFO L93 Difference]: Finished difference Result 386 states and 396 transitions. [2018-01-29 23:40:04,860 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-29 23:40:04,861 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 214 [2018-01-29 23:40:04,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:04,861 INFO L225 Difference]: With dead ends: 386 [2018-01-29 23:40:04,861 INFO L226 Difference]: Without dead ends: 238 [2018-01-29 23:40:04,862 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 232 GetRequests, 215 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-01-29 23:40:04,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 238 states. [2018-01-29 23:40:04,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 238 to 232. [2018-01-29 23:40:04,864 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states. [2018-01-29 23:40:04,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 236 transitions. [2018-01-29 23:40:04,864 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 236 transitions. Word has length 214 [2018-01-29 23:40:04,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:04,864 INFO L432 AbstractCegarLoop]: Abstraction has 232 states and 236 transitions. [2018-01-29 23:40:04,864 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-29 23:40:04,864 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 236 transitions. [2018-01-29 23:40:04,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2018-01-29 23:40:04,865 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:04,865 INFO L350 BasicCegarLoop]: trace histogram [18, 18, 18, 17, 17, 17, 17, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:04,865 INFO L371 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:04,865 INFO L82 PathProgramCache]: Analyzing trace with hash -1492415886, now seen corresponding path program 17 times [2018-01-29 23:40:04,865 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:04,865 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:04,866 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:04,866 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:04,866 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:04,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:04,877 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:05,450 INFO L134 CoverageAnalysis]: Checked inductivity of 1734 backedges. 0 proven. 578 refuted. 0 times theorem prover too weak. 1156 trivial. 0 not checked. [2018-01-29 23:40:05,450 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:05,450 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:05,456 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-29 23:40:05,462 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,463 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,465 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,466 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,468 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,470 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,472 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,474 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,477 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,480 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,483 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,487 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,492 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,497 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,503 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,509 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,517 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,905 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:05,907 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:05,910 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:05,929 INFO L134 CoverageAnalysis]: Checked inductivity of 1734 backedges. 0 proven. 578 refuted. 0 times theorem prover too weak. 1156 trivial. 0 not checked. [2018-01-29 23:40:05,947 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:05,947 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 20 [2018-01-29 23:40:05,948 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-29 23:40:05,948 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-29 23:40:05,948 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-01-29 23:40:05,948 INFO L87 Difference]: Start difference. First operand 232 states and 236 transitions. Second operand 20 states. [2018-01-29 23:40:06,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:06,221 INFO L93 Difference]: Finished difference Result 406 states and 416 transitions. [2018-01-29 23:40:06,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-29 23:40:06,223 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 226 [2018-01-29 23:40:06,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:06,223 INFO L225 Difference]: With dead ends: 406 [2018-01-29 23:40:06,223 INFO L226 Difference]: Without dead ends: 250 [2018-01-29 23:40:06,224 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 227 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-01-29 23:40:06,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 250 states. [2018-01-29 23:40:06,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 250 to 244. [2018-01-29 23:40:06,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 244 states. [2018-01-29 23:40:06,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 248 transitions. [2018-01-29 23:40:06,227 INFO L78 Accepts]: Start accepts. Automaton has 244 states and 248 transitions. Word has length 226 [2018-01-29 23:40:06,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:06,228 INFO L432 AbstractCegarLoop]: Abstraction has 244 states and 248 transitions. [2018-01-29 23:40:06,228 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-29 23:40:06,228 INFO L276 IsEmpty]: Start isEmpty. Operand 244 states and 248 transitions. [2018-01-29 23:40:06,228 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 239 [2018-01-29 23:40:06,228 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:06,229 INFO L350 BasicCegarLoop]: trace histogram [19, 19, 19, 18, 18, 18, 18, 18, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:06,229 INFO L371 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:06,229 INFO L82 PathProgramCache]: Analyzing trace with hash 1439314489, now seen corresponding path program 18 times [2018-01-29 23:40:06,229 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:06,229 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:06,229 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:06,230 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:06,230 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:06,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:06,238 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:06,714 INFO L134 CoverageAnalysis]: Checked inductivity of 1944 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 1296 trivial. 0 not checked. [2018-01-29 23:40:06,714 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:06,714 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:06,720 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-29 23:40:06,726 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,728 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,729 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,730 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,731 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,733 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,734 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,736 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,738 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,740 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,743 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,746 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,750 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,754 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,758 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,762 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,863 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,882 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,890 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:06,890 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:06,893 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:06,921 INFO L134 CoverageAnalysis]: Checked inductivity of 1944 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 1296 trivial. 0 not checked. [2018-01-29 23:40:06,938 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:06,938 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 21 [2018-01-29 23:40:06,939 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-29 23:40:06,939 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-29 23:40:06,939 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=210, Invalid=210, Unknown=0, NotChecked=0, Total=420 [2018-01-29 23:40:06,939 INFO L87 Difference]: Start difference. First operand 244 states and 248 transitions. Second operand 21 states. [2018-01-29 23:40:07,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:07,071 INFO L93 Difference]: Finished difference Result 426 states and 436 transitions. [2018-01-29 23:40:07,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-29 23:40:07,072 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 238 [2018-01-29 23:40:07,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:07,073 INFO L225 Difference]: With dead ends: 426 [2018-01-29 23:40:07,073 INFO L226 Difference]: Without dead ends: 262 [2018-01-29 23:40:07,073 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 258 GetRequests, 239 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=210, Invalid=210, Unknown=0, NotChecked=0, Total=420 [2018-01-29 23:40:07,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262 states. [2018-01-29 23:40:07,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262 to 256. [2018-01-29 23:40:07,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 256 states. [2018-01-29 23:40:07,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 256 states to 256 states and 260 transitions. [2018-01-29 23:40:07,076 INFO L78 Accepts]: Start accepts. Automaton has 256 states and 260 transitions. Word has length 238 [2018-01-29 23:40:07,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:07,076 INFO L432 AbstractCegarLoop]: Abstraction has 256 states and 260 transitions. [2018-01-29 23:40:07,078 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-29 23:40:07,078 INFO L276 IsEmpty]: Start isEmpty. Operand 256 states and 260 transitions. [2018-01-29 23:40:07,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 251 [2018-01-29 23:40:07,079 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:07,079 INFO L350 BasicCegarLoop]: trace histogram [20, 20, 20, 19, 19, 19, 19, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:07,079 INFO L371 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:07,079 INFO L82 PathProgramCache]: Analyzing trace with hash 1422632832, now seen corresponding path program 19 times [2018-01-29 23:40:07,079 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:07,079 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:07,080 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:07,080 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:07,080 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:07,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:07,095 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:07,677 INFO L134 CoverageAnalysis]: Checked inductivity of 2166 backedges. 0 proven. 722 refuted. 0 times theorem prover too weak. 1444 trivial. 0 not checked. [2018-01-29 23:40:07,678 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:07,678 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:07,683 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:40:07,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:07,718 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:07,751 INFO L134 CoverageAnalysis]: Checked inductivity of 2166 backedges. 0 proven. 722 refuted. 0 times theorem prover too weak. 1444 trivial. 0 not checked. [2018-01-29 23:40:07,768 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:07,769 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 22 [2018-01-29 23:40:07,769 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-29 23:40:07,769 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-29 23:40:07,769 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-01-29 23:40:07,769 INFO L87 Difference]: Start difference. First operand 256 states and 260 transitions. Second operand 22 states. [2018-01-29 23:40:07,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:07,994 INFO L93 Difference]: Finished difference Result 446 states and 456 transitions. [2018-01-29 23:40:07,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-29 23:40:07,994 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 250 [2018-01-29 23:40:07,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:07,995 INFO L225 Difference]: With dead ends: 446 [2018-01-29 23:40:07,995 INFO L226 Difference]: Without dead ends: 274 [2018-01-29 23:40:07,995 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 271 GetRequests, 251 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-01-29 23:40:07,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274 states. [2018-01-29 23:40:07,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274 to 268. [2018-01-29 23:40:07,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 268 states. [2018-01-29 23:40:07,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 272 transitions. [2018-01-29 23:40:07,999 INFO L78 Accepts]: Start accepts. Automaton has 268 states and 272 transitions. Word has length 250 [2018-01-29 23:40:07,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:07,999 INFO L432 AbstractCegarLoop]: Abstraction has 268 states and 272 transitions. [2018-01-29 23:40:07,999 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-29 23:40:07,999 INFO L276 IsEmpty]: Start isEmpty. Operand 268 states and 272 transitions. [2018-01-29 23:40:08,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 263 [2018-01-29 23:40:08,000 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:08,000 INFO L350 BasicCegarLoop]: trace histogram [21, 21, 21, 20, 20, 20, 20, 20, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:08,000 INFO L371 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:08,000 INFO L82 PathProgramCache]: Analyzing trace with hash -419517881, now seen corresponding path program 20 times [2018-01-29 23:40:08,000 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:08,000 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:08,001 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:08,001 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:40:08,001 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:08,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:08,010 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:08,325 INFO L134 CoverageAnalysis]: Checked inductivity of 2400 backedges. 0 proven. 800 refuted. 0 times theorem prover too weak. 1600 trivial. 0 not checked. [2018-01-29 23:40:08,325 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:08,325 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:08,330 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:40:08,383 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:08,404 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:08,416 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:08,418 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:08,442 INFO L134 CoverageAnalysis]: Checked inductivity of 2400 backedges. 0 proven. 800 refuted. 0 times theorem prover too weak. 1600 trivial. 0 not checked. [2018-01-29 23:40:08,459 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:08,459 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 23 [2018-01-29 23:40:08,460 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-29 23:40:08,460 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-29 23:40:08,460 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=253, Unknown=0, NotChecked=0, Total=506 [2018-01-29 23:40:08,460 INFO L87 Difference]: Start difference. First operand 268 states and 272 transitions. Second operand 23 states. [2018-01-29 23:40:08,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:08,984 INFO L93 Difference]: Finished difference Result 466 states and 476 transitions. [2018-01-29 23:40:08,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-29 23:40:08,986 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 262 [2018-01-29 23:40:08,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:08,986 INFO L225 Difference]: With dead ends: 466 [2018-01-29 23:40:08,986 INFO L226 Difference]: Without dead ends: 286 [2018-01-29 23:40:08,987 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 284 GetRequests, 263 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=253, Invalid=253, Unknown=0, NotChecked=0, Total=506 [2018-01-29 23:40:08,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 286 states. [2018-01-29 23:40:08,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 286 to 280. [2018-01-29 23:40:08,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 280 states. [2018-01-29 23:40:08,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 280 states to 280 states and 284 transitions. [2018-01-29 23:40:08,996 INFO L78 Accepts]: Start accepts. Automaton has 280 states and 284 transitions. Word has length 262 [2018-01-29 23:40:08,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:08,996 INFO L432 AbstractCegarLoop]: Abstraction has 280 states and 284 transitions. [2018-01-29 23:40:08,996 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-29 23:40:08,996 INFO L276 IsEmpty]: Start isEmpty. Operand 280 states and 284 transitions. [2018-01-29 23:40:08,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 275 [2018-01-29 23:40:08,997 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:08,997 INFO L350 BasicCegarLoop]: trace histogram [22, 22, 22, 21, 21, 21, 21, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:08,997 INFO L371 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:08,997 INFO L82 PathProgramCache]: Analyzing trace with hash -458098034, now seen corresponding path program 21 times [2018-01-29 23:40:08,998 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:08,998 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:09,003 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:09,003 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:09,003 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:09,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:09,015 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:09,755 INFO L134 CoverageAnalysis]: Checked inductivity of 2646 backedges. 0 proven. 882 refuted. 0 times theorem prover too weak. 1764 trivial. 0 not checked. [2018-01-29 23:40:09,756 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:09,756 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:09,760 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:40:09,766 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,768 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,769 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,770 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,774 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,776 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,778 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,780 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,784 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,787 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,791 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,794 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,800 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,805 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,810 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,817 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,824 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,832 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,842 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,853 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,864 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,876 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:09,876 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:09,879 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:09,905 INFO L134 CoverageAnalysis]: Checked inductivity of 2646 backedges. 0 proven. 882 refuted. 0 times theorem prover too weak. 1764 trivial. 0 not checked. [2018-01-29 23:40:09,923 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:09,924 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 24 [2018-01-29 23:40:09,924 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-29 23:40:09,924 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-29 23:40:09,924 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-01-29 23:40:09,924 INFO L87 Difference]: Start difference. First operand 280 states and 284 transitions. Second operand 24 states. [2018-01-29 23:40:10,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:10,685 INFO L93 Difference]: Finished difference Result 486 states and 496 transitions. [2018-01-29 23:40:10,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-29 23:40:10,685 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 274 [2018-01-29 23:40:10,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:10,686 INFO L225 Difference]: With dead ends: 486 [2018-01-29 23:40:10,686 INFO L226 Difference]: Without dead ends: 298 [2018-01-29 23:40:10,687 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 297 GetRequests, 275 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-01-29 23:40:10,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 298 states. [2018-01-29 23:40:10,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 298 to 292. [2018-01-29 23:40:10,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 292 states. [2018-01-29 23:40:10,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 292 states to 292 states and 296 transitions. [2018-01-29 23:40:10,690 INFO L78 Accepts]: Start accepts. Automaton has 292 states and 296 transitions. Word has length 274 [2018-01-29 23:40:10,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:10,691 INFO L432 AbstractCegarLoop]: Abstraction has 292 states and 296 transitions. [2018-01-29 23:40:10,691 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-29 23:40:10,691 INFO L276 IsEmpty]: Start isEmpty. Operand 292 states and 296 transitions. [2018-01-29 23:40:10,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 287 [2018-01-29 23:40:10,692 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:10,692 INFO L350 BasicCegarLoop]: trace histogram [23, 23, 23, 22, 22, 22, 22, 22, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:10,692 INFO L371 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:10,692 INFO L82 PathProgramCache]: Analyzing trace with hash -342599595, now seen corresponding path program 22 times [2018-01-29 23:40:10,692 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:10,692 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:10,693 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:10,693 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:10,693 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:10,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:10,702 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:11,152 INFO L134 CoverageAnalysis]: Checked inductivity of 2904 backedges. 0 proven. 968 refuted. 0 times theorem prover too weak. 1936 trivial. 0 not checked. [2018-01-29 23:40:11,152 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:11,152 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:11,157 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-29 23:40:11,180 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:11,182 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:11,213 INFO L134 CoverageAnalysis]: Checked inductivity of 2904 backedges. 0 proven. 968 refuted. 0 times theorem prover too weak. 1936 trivial. 0 not checked. [2018-01-29 23:40:11,229 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:11,230 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 25 [2018-01-29 23:40:11,230 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-29 23:40:11,230 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-29 23:40:11,230 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2018-01-29 23:40:11,230 INFO L87 Difference]: Start difference. First operand 292 states and 296 transitions. Second operand 25 states. [2018-01-29 23:40:11,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:11,404 INFO L93 Difference]: Finished difference Result 506 states and 516 transitions. [2018-01-29 23:40:11,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-29 23:40:11,404 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 286 [2018-01-29 23:40:11,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:11,405 INFO L225 Difference]: With dead ends: 506 [2018-01-29 23:40:11,405 INFO L226 Difference]: Without dead ends: 310 [2018-01-29 23:40:11,405 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 310 GetRequests, 287 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2018-01-29 23:40:11,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 310 states. [2018-01-29 23:40:11,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 310 to 304. [2018-01-29 23:40:11,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 304 states. [2018-01-29 23:40:11,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 304 states to 304 states and 308 transitions. [2018-01-29 23:40:11,408 INFO L78 Accepts]: Start accepts. Automaton has 304 states and 308 transitions. Word has length 286 [2018-01-29 23:40:11,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:11,408 INFO L432 AbstractCegarLoop]: Abstraction has 304 states and 308 transitions. [2018-01-29 23:40:11,408 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-29 23:40:11,408 INFO L276 IsEmpty]: Start isEmpty. Operand 304 states and 308 transitions. [2018-01-29 23:40:11,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 299 [2018-01-29 23:40:11,409 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:11,409 INFO L350 BasicCegarLoop]: trace histogram [24, 24, 24, 23, 23, 23, 23, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:11,409 INFO L371 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:11,409 INFO L82 PathProgramCache]: Analyzing trace with hash -1900772452, now seen corresponding path program 23 times [2018-01-29 23:40:11,410 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:11,410 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:11,410 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:11,410 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:11,410 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:11,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:11,419 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:11,858 INFO L134 CoverageAnalysis]: Checked inductivity of 3174 backedges. 0 proven. 1058 refuted. 0 times theorem prover too weak. 2116 trivial. 0 not checked. [2018-01-29 23:40:11,858 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:11,858 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:11,862 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-29 23:40:11,868 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,870 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,871 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,872 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,874 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,875 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,877 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,880 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,882 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,885 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,889 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,893 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,897 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,903 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,908 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,915 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,923 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,931 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,940 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,951 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,963 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,977 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:11,993 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:12,128 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:12,130 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:12,134 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:12,173 INFO L134 CoverageAnalysis]: Checked inductivity of 3174 backedges. 0 proven. 1058 refuted. 0 times theorem prover too weak. 2116 trivial. 0 not checked. [2018-01-29 23:40:12,193 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:12,193 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 26 [2018-01-29 23:40:12,193 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-29 23:40:12,194 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-29 23:40:12,194 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-01-29 23:40:12,194 INFO L87 Difference]: Start difference. First operand 304 states and 308 transitions. Second operand 26 states. [2018-01-29 23:40:12,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:12,398 INFO L93 Difference]: Finished difference Result 526 states and 536 transitions. [2018-01-29 23:40:12,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-29 23:40:12,399 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 298 [2018-01-29 23:40:12,399 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:12,399 INFO L225 Difference]: With dead ends: 526 [2018-01-29 23:40:12,400 INFO L226 Difference]: Without dead ends: 322 [2018-01-29 23:40:12,400 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 323 GetRequests, 299 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-01-29 23:40:12,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 322 states. [2018-01-29 23:40:12,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 322 to 316. [2018-01-29 23:40:12,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 316 states. [2018-01-29 23:40:12,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316 states to 316 states and 320 transitions. [2018-01-29 23:40:12,403 INFO L78 Accepts]: Start accepts. Automaton has 316 states and 320 transitions. Word has length 298 [2018-01-29 23:40:12,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:12,403 INFO L432 AbstractCegarLoop]: Abstraction has 316 states and 320 transitions. [2018-01-29 23:40:12,403 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-29 23:40:12,403 INFO L276 IsEmpty]: Start isEmpty. Operand 316 states and 320 transitions. [2018-01-29 23:40:12,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 311 [2018-01-29 23:40:12,404 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:12,404 INFO L350 BasicCegarLoop]: trace histogram [25, 25, 25, 24, 24, 24, 24, 24, 24, 24, 24, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:12,404 INFO L371 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:12,405 INFO L82 PathProgramCache]: Analyzing trace with hash -2038350749, now seen corresponding path program 24 times [2018-01-29 23:40:12,405 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:12,405 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:12,405 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:12,405 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:12,405 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:12,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:12,414 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:12,834 INFO L134 CoverageAnalysis]: Checked inductivity of 3456 backedges. 0 proven. 1152 refuted. 0 times theorem prover too weak. 2304 trivial. 0 not checked. [2018-01-29 23:40:12,834 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:12,834 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:12,839 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-29 23:40:12,846 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,847 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,848 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,849 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,851 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,852 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,854 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,855 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,857 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,859 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,863 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,865 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,868 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,872 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,877 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,880 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,884 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,888 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,894 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,899 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,905 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,912 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:12,919 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:13,115 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:13,191 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:13,192 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:13,195 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:13,232 INFO L134 CoverageAnalysis]: Checked inductivity of 3456 backedges. 0 proven. 1152 refuted. 0 times theorem prover too weak. 2304 trivial. 0 not checked. [2018-01-29 23:40:13,249 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:13,249 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27] total 27 [2018-01-29 23:40:13,250 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-29 23:40:13,250 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-29 23:40:13,250 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=351, Invalid=351, Unknown=0, NotChecked=0, Total=702 [2018-01-29 23:40:13,250 INFO L87 Difference]: Start difference. First operand 316 states and 320 transitions. Second operand 27 states. [2018-01-29 23:40:13,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:13,461 INFO L93 Difference]: Finished difference Result 546 states and 556 transitions. [2018-01-29 23:40:13,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-29 23:40:13,461 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 310 [2018-01-29 23:40:13,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:13,462 INFO L225 Difference]: With dead ends: 546 [2018-01-29 23:40:13,462 INFO L226 Difference]: Without dead ends: 334 [2018-01-29 23:40:13,463 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 336 GetRequests, 311 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=351, Invalid=351, Unknown=0, NotChecked=0, Total=702 [2018-01-29 23:40:13,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 334 states. [2018-01-29 23:40:13,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 334 to 328. [2018-01-29 23:40:13,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 328 states. [2018-01-29 23:40:13,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 332 transitions. [2018-01-29 23:40:13,465 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 332 transitions. Word has length 310 [2018-01-29 23:40:13,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:13,466 INFO L432 AbstractCegarLoop]: Abstraction has 328 states and 332 transitions. [2018-01-29 23:40:13,466 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-29 23:40:13,466 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 332 transitions. [2018-01-29 23:40:13,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 323 [2018-01-29 23:40:13,467 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:13,467 INFO L350 BasicCegarLoop]: trace histogram [26, 26, 26, 25, 25, 25, 25, 25, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:13,467 INFO L371 AbstractCegarLoop]: === Iteration 27 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:13,467 INFO L82 PathProgramCache]: Analyzing trace with hash -523681110, now seen corresponding path program 25 times [2018-01-29 23:40:13,467 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:13,467 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:13,467 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:13,467 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:13,467 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:13,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:13,476 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:14,169 INFO L134 CoverageAnalysis]: Checked inductivity of 3750 backedges. 0 proven. 1250 refuted. 0 times theorem prover too weak. 2500 trivial. 0 not checked. [2018-01-29 23:40:14,169 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:14,169 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:14,175 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:40:14,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:14,201 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:14,243 INFO L134 CoverageAnalysis]: Checked inductivity of 3750 backedges. 0 proven. 1250 refuted. 0 times theorem prover too weak. 2500 trivial. 0 not checked. [2018-01-29 23:40:14,267 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:14,267 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28] total 28 [2018-01-29 23:40:14,268 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-29 23:40:14,269 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-29 23:40:14,269 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-01-29 23:40:14,269 INFO L87 Difference]: Start difference. First operand 328 states and 332 transitions. Second operand 28 states. [2018-01-29 23:40:14,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:14,480 INFO L93 Difference]: Finished difference Result 566 states and 576 transitions. [2018-01-29 23:40:14,480 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-29 23:40:14,480 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 322 [2018-01-29 23:40:14,480 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:14,481 INFO L225 Difference]: With dead ends: 566 [2018-01-29 23:40:14,481 INFO L226 Difference]: Without dead ends: 346 [2018-01-29 23:40:14,482 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 349 GetRequests, 323 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-01-29 23:40:14,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346 states. [2018-01-29 23:40:14,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346 to 340. [2018-01-29 23:40:14,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 340 states. [2018-01-29 23:40:14,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 344 transitions. [2018-01-29 23:40:14,484 INFO L78 Accepts]: Start accepts. Automaton has 340 states and 344 transitions. Word has length 322 [2018-01-29 23:40:14,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:14,485 INFO L432 AbstractCegarLoop]: Abstraction has 340 states and 344 transitions. [2018-01-29 23:40:14,485 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-29 23:40:14,485 INFO L276 IsEmpty]: Start isEmpty. Operand 340 states and 344 transitions. [2018-01-29 23:40:14,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 335 [2018-01-29 23:40:14,486 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:14,486 INFO L350 BasicCegarLoop]: trace histogram [27, 27, 27, 26, 26, 26, 26, 26, 26, 26, 26, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:14,486 INFO L371 AbstractCegarLoop]: === Iteration 28 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:14,486 INFO L82 PathProgramCache]: Analyzing trace with hash 817583729, now seen corresponding path program 26 times [2018-01-29 23:40:14,486 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:14,486 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:14,487 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:14,487 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:40:14,487 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:14,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:14,495 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:15,238 INFO L134 CoverageAnalysis]: Checked inductivity of 4056 backedges. 0 proven. 1352 refuted. 0 times theorem prover too weak. 2704 trivial. 0 not checked. [2018-01-29 23:40:15,238 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:15,238 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:15,243 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:40:15,251 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:15,265 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:15,269 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:15,271 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:15,314 INFO L134 CoverageAnalysis]: Checked inductivity of 4056 backedges. 0 proven. 1352 refuted. 0 times theorem prover too weak. 2704 trivial. 0 not checked. [2018-01-29 23:40:15,331 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:15,331 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29] total 29 [2018-01-29 23:40:15,331 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-29 23:40:15,332 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-29 23:40:15,332 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=406, Invalid=406, Unknown=0, NotChecked=0, Total=812 [2018-01-29 23:40:15,332 INFO L87 Difference]: Start difference. First operand 340 states and 344 transitions. Second operand 29 states. [2018-01-29 23:40:15,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:15,554 INFO L93 Difference]: Finished difference Result 586 states and 596 transitions. [2018-01-29 23:40:15,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-29 23:40:15,554 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 334 [2018-01-29 23:40:15,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:15,555 INFO L225 Difference]: With dead ends: 586 [2018-01-29 23:40:15,555 INFO L226 Difference]: Without dead ends: 358 [2018-01-29 23:40:15,556 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 362 GetRequests, 335 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=406, Invalid=406, Unknown=0, NotChecked=0, Total=812 [2018-01-29 23:40:15,556 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 358 states. [2018-01-29 23:40:15,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 358 to 352. [2018-01-29 23:40:15,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 352 states. [2018-01-29 23:40:15,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 352 states to 352 states and 356 transitions. [2018-01-29 23:40:15,559 INFO L78 Accepts]: Start accepts. Automaton has 352 states and 356 transitions. Word has length 334 [2018-01-29 23:40:15,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:15,559 INFO L432 AbstractCegarLoop]: Abstraction has 352 states and 356 transitions. [2018-01-29 23:40:15,559 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-29 23:40:15,559 INFO L276 IsEmpty]: Start isEmpty. Operand 352 states and 356 transitions. [2018-01-29 23:40:15,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 347 [2018-01-29 23:40:15,560 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:15,560 INFO L350 BasicCegarLoop]: trace histogram [28, 28, 28, 27, 27, 27, 27, 27, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:15,560 INFO L371 AbstractCegarLoop]: === Iteration 29 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:15,560 INFO L82 PathProgramCache]: Analyzing trace with hash -1092208712, now seen corresponding path program 27 times [2018-01-29 23:40:15,560 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:15,560 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:15,561 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:15,561 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:15,561 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:15,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:15,570 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:15,970 INFO L134 CoverageAnalysis]: Checked inductivity of 4374 backedges. 0 proven. 1458 refuted. 0 times theorem prover too weak. 2916 trivial. 0 not checked. [2018-01-29 23:40:15,970 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:15,970 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:15,975 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:40:15,989 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:15,993 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:15,998 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,000 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,001 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,003 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,006 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,008 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,012 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,014 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,019 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,023 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,028 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,033 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,039 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,045 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,052 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,060 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,070 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,082 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,092 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,104 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,118 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,137 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,156 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,175 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,196 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,223 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:16,225 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:16,228 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:16,273 INFO L134 CoverageAnalysis]: Checked inductivity of 4374 backedges. 0 proven. 1458 refuted. 0 times theorem prover too weak. 2916 trivial. 0 not checked. [2018-01-29 23:40:16,291 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:16,291 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30] total 30 [2018-01-29 23:40:16,292 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-29 23:40:16,292 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-29 23:40:16,292 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2018-01-29 23:40:16,292 INFO L87 Difference]: Start difference. First operand 352 states and 356 transitions. Second operand 30 states. [2018-01-29 23:40:16,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:16,989 INFO L93 Difference]: Finished difference Result 606 states and 616 transitions. [2018-01-29 23:40:16,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-29 23:40:16,989 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 346 [2018-01-29 23:40:16,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:16,990 INFO L225 Difference]: With dead ends: 606 [2018-01-29 23:40:16,990 INFO L226 Difference]: Without dead ends: 370 [2018-01-29 23:40:16,990 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 375 GetRequests, 347 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2018-01-29 23:40:16,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 370 states. [2018-01-29 23:40:16,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 370 to 364. [2018-01-29 23:40:16,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 364 states. [2018-01-29 23:40:16,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 368 transitions. [2018-01-29 23:40:16,994 INFO L78 Accepts]: Start accepts. Automaton has 364 states and 368 transitions. Word has length 346 [2018-01-29 23:40:16,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:16,994 INFO L432 AbstractCegarLoop]: Abstraction has 364 states and 368 transitions. [2018-01-29 23:40:16,994 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-29 23:40:16,994 INFO L276 IsEmpty]: Start isEmpty. Operand 364 states and 368 transitions. [2018-01-29 23:40:16,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 359 [2018-01-29 23:40:16,995 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:16,995 INFO L350 BasicCegarLoop]: trace histogram [29, 29, 29, 28, 28, 28, 28, 28, 28, 28, 28, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:16,995 INFO L371 AbstractCegarLoop]: === Iteration 30 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:16,995 INFO L82 PathProgramCache]: Analyzing trace with hash -1187469697, now seen corresponding path program 28 times [2018-01-29 23:40:16,995 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:16,995 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:16,996 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:16,996 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:16,996 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:17,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:17,005 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:17,878 INFO L134 CoverageAnalysis]: Checked inductivity of 4704 backedges. 0 proven. 1568 refuted. 0 times theorem prover too weak. 3136 trivial. 0 not checked. [2018-01-29 23:40:17,878 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:17,878 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:17,884 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-29 23:40:17,922 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:17,924 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:17,980 INFO L134 CoverageAnalysis]: Checked inductivity of 4704 backedges. 0 proven. 1568 refuted. 0 times theorem prover too weak. 3136 trivial. 0 not checked. [2018-01-29 23:40:17,997 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:17,997 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31] total 31 [2018-01-29 23:40:17,997 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-29 23:40:17,997 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-29 23:40:17,998 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=465, Invalid=465, Unknown=0, NotChecked=0, Total=930 [2018-01-29 23:40:17,998 INFO L87 Difference]: Start difference. First operand 364 states and 368 transitions. Second operand 31 states. [2018-01-29 23:40:18,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:18,219 INFO L93 Difference]: Finished difference Result 626 states and 636 transitions. [2018-01-29 23:40:18,219 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-29 23:40:18,219 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 358 [2018-01-29 23:40:18,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:18,220 INFO L225 Difference]: With dead ends: 626 [2018-01-29 23:40:18,220 INFO L226 Difference]: Without dead ends: 382 [2018-01-29 23:40:18,220 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 388 GetRequests, 359 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=465, Invalid=465, Unknown=0, NotChecked=0, Total=930 [2018-01-29 23:40:18,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 382 states. [2018-01-29 23:40:18,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 382 to 376. [2018-01-29 23:40:18,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 376 states. [2018-01-29 23:40:18,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 376 states to 376 states and 380 transitions. [2018-01-29 23:40:18,230 INFO L78 Accepts]: Start accepts. Automaton has 376 states and 380 transitions. Word has length 358 [2018-01-29 23:40:18,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:18,230 INFO L432 AbstractCegarLoop]: Abstraction has 376 states and 380 transitions. [2018-01-29 23:40:18,230 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-29 23:40:18,230 INFO L276 IsEmpty]: Start isEmpty. Operand 376 states and 380 transitions. [2018-01-29 23:40:18,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 371 [2018-01-29 23:40:18,231 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:18,232 INFO L350 BasicCegarLoop]: trace histogram [30, 30, 30, 29, 29, 29, 29, 29, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:18,232 INFO L371 AbstractCegarLoop]: === Iteration 31 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:18,232 INFO L82 PathProgramCache]: Analyzing trace with hash 1661035206, now seen corresponding path program 29 times [2018-01-29 23:40:18,232 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:18,232 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:18,232 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:18,232 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:18,232 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:18,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:18,242 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:18,786 INFO L134 CoverageAnalysis]: Checked inductivity of 5046 backedges. 0 proven. 1682 refuted. 0 times theorem prover too weak. 3364 trivial. 0 not checked. [2018-01-29 23:40:18,786 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:18,786 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:18,819 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-29 23:40:18,826 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,840 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,844 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,846 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,847 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,849 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,851 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,853 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,856 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,859 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,862 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,867 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,871 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,877 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,883 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,890 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,897 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,906 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,916 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,926 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,939 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,953 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,969 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:18,987 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:19,007 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:19,029 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:19,054 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:19,081 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:19,113 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:20,022 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:20,025 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:20,030 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:20,078 INFO L134 CoverageAnalysis]: Checked inductivity of 5046 backedges. 0 proven. 1682 refuted. 0 times theorem prover too weak. 3364 trivial. 0 not checked. [2018-01-29 23:40:20,101 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:20,101 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 32 [2018-01-29 23:40:20,101 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-29 23:40:20,101 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-29 23:40:20,101 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-01-29 23:40:20,102 INFO L87 Difference]: Start difference. First operand 376 states and 380 transitions. Second operand 32 states. [2018-01-29 23:40:20,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:20,379 INFO L93 Difference]: Finished difference Result 646 states and 656 transitions. [2018-01-29 23:40:20,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-29 23:40:20,379 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 370 [2018-01-29 23:40:20,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:20,380 INFO L225 Difference]: With dead ends: 646 [2018-01-29 23:40:20,380 INFO L226 Difference]: Without dead ends: 394 [2018-01-29 23:40:20,381 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 401 GetRequests, 371 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-01-29 23:40:20,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 394 states. [2018-01-29 23:40:20,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 394 to 388. [2018-01-29 23:40:20,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 388 states. [2018-01-29 23:40:20,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 388 states to 388 states and 392 transitions. [2018-01-29 23:40:20,384 INFO L78 Accepts]: Start accepts. Automaton has 388 states and 392 transitions. Word has length 370 [2018-01-29 23:40:20,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:20,384 INFO L432 AbstractCegarLoop]: Abstraction has 388 states and 392 transitions. [2018-01-29 23:40:20,384 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-29 23:40:20,384 INFO L276 IsEmpty]: Start isEmpty. Operand 388 states and 392 transitions. [2018-01-29 23:40:20,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 383 [2018-01-29 23:40:20,385 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:20,385 INFO L350 BasicCegarLoop]: trace histogram [31, 31, 31, 30, 30, 30, 30, 30, 30, 30, 30, 30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:20,385 INFO L371 AbstractCegarLoop]: === Iteration 32 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:20,386 INFO L82 PathProgramCache]: Analyzing trace with hash 1156525197, now seen corresponding path program 30 times [2018-01-29 23:40:20,386 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:20,386 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:20,386 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:20,386 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:20,386 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:20,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:20,395 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:21,010 INFO L134 CoverageAnalysis]: Checked inductivity of 5400 backedges. 0 proven. 1800 refuted. 0 times theorem prover too weak. 3600 trivial. 0 not checked. [2018-01-29 23:40:21,011 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:21,011 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:21,024 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-29 23:40:21,032 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,039 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,049 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,058 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,068 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,069 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,071 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,073 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,075 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,077 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,079 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,082 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,085 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,089 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,094 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,097 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,101 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,105 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,110 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,116 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,122 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,129 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,136 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,143 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,150 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,158 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,168 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,185 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,198 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,211 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,255 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:21,266 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:21,270 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:21,325 INFO L134 CoverageAnalysis]: Checked inductivity of 5400 backedges. 0 proven. 1800 refuted. 0 times theorem prover too weak. 3600 trivial. 0 not checked. [2018-01-29 23:40:21,344 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:21,344 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33] total 33 [2018-01-29 23:40:21,344 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-29 23:40:21,345 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-29 23:40:21,345 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=528, Invalid=528, Unknown=0, NotChecked=0, Total=1056 [2018-01-29 23:40:21,345 INFO L87 Difference]: Start difference. First operand 388 states and 392 transitions. Second operand 33 states. [2018-01-29 23:40:21,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:21,819 INFO L93 Difference]: Finished difference Result 666 states and 676 transitions. [2018-01-29 23:40:21,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-29 23:40:21,819 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 382 [2018-01-29 23:40:21,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:21,820 INFO L225 Difference]: With dead ends: 666 [2018-01-29 23:40:21,820 INFO L226 Difference]: Without dead ends: 406 [2018-01-29 23:40:21,820 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 414 GetRequests, 383 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=528, Invalid=528, Unknown=0, NotChecked=0, Total=1056 [2018-01-29 23:40:21,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 406 states. [2018-01-29 23:40:21,823 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 406 to 400. [2018-01-29 23:40:21,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 400 states. [2018-01-29 23:40:21,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 400 states to 400 states and 404 transitions. [2018-01-29 23:40:21,824 INFO L78 Accepts]: Start accepts. Automaton has 400 states and 404 transitions. Word has length 382 [2018-01-29 23:40:21,824 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:21,824 INFO L432 AbstractCegarLoop]: Abstraction has 400 states and 404 transitions. [2018-01-29 23:40:21,824 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-29 23:40:21,824 INFO L276 IsEmpty]: Start isEmpty. Operand 400 states and 404 transitions. [2018-01-29 23:40:21,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 395 [2018-01-29 23:40:21,825 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:21,825 INFO L350 BasicCegarLoop]: trace histogram [32, 32, 32, 31, 31, 31, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:21,825 INFO L371 AbstractCegarLoop]: === Iteration 33 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:21,826 INFO L82 PathProgramCache]: Analyzing trace with hash 1561379796, now seen corresponding path program 31 times [2018-01-29 23:40:21,826 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:21,826 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:21,826 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:21,826 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:21,826 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:21,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:21,835 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:22,523 INFO L134 CoverageAnalysis]: Checked inductivity of 5766 backedges. 0 proven. 1922 refuted. 0 times theorem prover too weak. 3844 trivial. 0 not checked. [2018-01-29 23:40:22,523 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:22,523 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:22,528 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:40:22,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:22,559 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:22,607 INFO L134 CoverageAnalysis]: Checked inductivity of 5766 backedges. 0 proven. 1922 refuted. 0 times theorem prover too weak. 3844 trivial. 0 not checked. [2018-01-29 23:40:22,626 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:22,626 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34] total 34 [2018-01-29 23:40:22,627 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-29 23:40:22,627 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-29 23:40:22,627 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2018-01-29 23:40:22,627 INFO L87 Difference]: Start difference. First operand 400 states and 404 transitions. Second operand 34 states. [2018-01-29 23:40:22,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:22,863 INFO L93 Difference]: Finished difference Result 686 states and 696 transitions. [2018-01-29 23:40:22,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-29 23:40:22,863 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 394 [2018-01-29 23:40:22,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:22,864 INFO L225 Difference]: With dead ends: 686 [2018-01-29 23:40:22,864 INFO L226 Difference]: Without dead ends: 418 [2018-01-29 23:40:22,865 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 427 GetRequests, 395 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2018-01-29 23:40:22,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 418 states. [2018-01-29 23:40:22,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 418 to 412. [2018-01-29 23:40:22,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 412 states. [2018-01-29 23:40:22,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 412 states to 412 states and 416 transitions. [2018-01-29 23:40:22,868 INFO L78 Accepts]: Start accepts. Automaton has 412 states and 416 transitions. Word has length 394 [2018-01-29 23:40:22,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:22,868 INFO L432 AbstractCegarLoop]: Abstraction has 412 states and 416 transitions. [2018-01-29 23:40:22,868 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-29 23:40:22,868 INFO L276 IsEmpty]: Start isEmpty. Operand 412 states and 416 transitions. [2018-01-29 23:40:22,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 407 [2018-01-29 23:40:22,869 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:22,869 INFO L350 BasicCegarLoop]: trace histogram [33, 33, 33, 32, 32, 32, 32, 32, 32, 32, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:22,869 INFO L371 AbstractCegarLoop]: === Iteration 34 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:22,869 INFO L82 PathProgramCache]: Analyzing trace with hash 1322576027, now seen corresponding path program 32 times [2018-01-29 23:40:22,869 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:22,870 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:22,870 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:22,870 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:40:22,870 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:22,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:22,879 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:24,255 INFO L134 CoverageAnalysis]: Checked inductivity of 6144 backedges. 0 proven. 2048 refuted. 0 times theorem prover too weak. 4096 trivial. 0 not checked. [2018-01-29 23:40:24,255 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:24,255 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:24,260 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:40:24,269 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:24,295 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:24,299 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:24,301 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:24,351 INFO L134 CoverageAnalysis]: Checked inductivity of 6144 backedges. 0 proven. 2048 refuted. 0 times theorem prover too weak. 4096 trivial. 0 not checked. [2018-01-29 23:40:24,369 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:24,370 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35] total 35 [2018-01-29 23:40:24,370 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-29 23:40:24,370 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-29 23:40:24,370 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=595, Invalid=595, Unknown=0, NotChecked=0, Total=1190 [2018-01-29 23:40:24,370 INFO L87 Difference]: Start difference. First operand 412 states and 416 transitions. Second operand 35 states. [2018-01-29 23:40:24,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:24,642 INFO L93 Difference]: Finished difference Result 706 states and 716 transitions. [2018-01-29 23:40:24,642 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-29 23:40:24,642 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 406 [2018-01-29 23:40:24,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:24,643 INFO L225 Difference]: With dead ends: 706 [2018-01-29 23:40:24,643 INFO L226 Difference]: Without dead ends: 430 [2018-01-29 23:40:24,644 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 440 GetRequests, 407 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=595, Invalid=595, Unknown=0, NotChecked=0, Total=1190 [2018-01-29 23:40:24,644 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states. [2018-01-29 23:40:24,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 424. [2018-01-29 23:40:24,646 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 424 states. [2018-01-29 23:40:24,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 424 states to 424 states and 428 transitions. [2018-01-29 23:40:24,647 INFO L78 Accepts]: Start accepts. Automaton has 424 states and 428 transitions. Word has length 406 [2018-01-29 23:40:24,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:24,647 INFO L432 AbstractCegarLoop]: Abstraction has 424 states and 428 transitions. [2018-01-29 23:40:24,647 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-29 23:40:24,647 INFO L276 IsEmpty]: Start isEmpty. Operand 424 states and 428 transitions. [2018-01-29 23:40:24,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 419 [2018-01-29 23:40:24,648 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:24,648 INFO L350 BasicCegarLoop]: trace histogram [34, 34, 34, 33, 33, 33, 33, 33, 33, 33, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:24,648 INFO L371 AbstractCegarLoop]: === Iteration 35 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:24,649 INFO L82 PathProgramCache]: Analyzing trace with hash -1828037918, now seen corresponding path program 33 times [2018-01-29 23:40:24,649 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:24,649 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:24,649 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:24,649 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:24,649 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:24,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:24,659 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:25,440 INFO L134 CoverageAnalysis]: Checked inductivity of 6534 backedges. 0 proven. 2178 refuted. 0 times theorem prover too weak. 4356 trivial. 0 not checked. [2018-01-29 23:40:25,440 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:25,440 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:25,444 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:40:25,452 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,453 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,454 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,455 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,457 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,459 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,461 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,463 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,467 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,470 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,474 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,478 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,482 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,488 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,494 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,502 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,511 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,519 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,528 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,538 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,550 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,562 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,576 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,594 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,612 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,632 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,652 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,679 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,705 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,733 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,767 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,802 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,844 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,886 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:25,888 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:25,891 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:25,950 INFO L134 CoverageAnalysis]: Checked inductivity of 6534 backedges. 0 proven. 2178 refuted. 0 times theorem prover too weak. 4356 trivial. 0 not checked. [2018-01-29 23:40:25,969 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:25,970 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36] total 36 [2018-01-29 23:40:25,970 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-29 23:40:25,970 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-29 23:40:25,970 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2018-01-29 23:40:25,970 INFO L87 Difference]: Start difference. First operand 424 states and 428 transitions. Second operand 36 states. [2018-01-29 23:40:26,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:26,325 INFO L93 Difference]: Finished difference Result 726 states and 736 transitions. [2018-01-29 23:40:26,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-29 23:40:26,326 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 418 [2018-01-29 23:40:26,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:26,327 INFO L225 Difference]: With dead ends: 726 [2018-01-29 23:40:26,327 INFO L226 Difference]: Without dead ends: 442 [2018-01-29 23:40:26,327 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 453 GetRequests, 419 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2018-01-29 23:40:26,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 442 states. [2018-01-29 23:40:26,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 442 to 436. [2018-01-29 23:40:26,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 436 states. [2018-01-29 23:40:26,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 436 states to 436 states and 440 transitions. [2018-01-29 23:40:26,331 INFO L78 Accepts]: Start accepts. Automaton has 436 states and 440 transitions. Word has length 418 [2018-01-29 23:40:26,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:26,331 INFO L432 AbstractCegarLoop]: Abstraction has 436 states and 440 transitions. [2018-01-29 23:40:26,331 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-29 23:40:26,331 INFO L276 IsEmpty]: Start isEmpty. Operand 436 states and 440 transitions. [2018-01-29 23:40:26,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 431 [2018-01-29 23:40:26,332 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:26,332 INFO L350 BasicCegarLoop]: trace histogram [35, 35, 35, 34, 34, 34, 34, 34, 34, 34, 34, 34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:26,333 INFO L371 AbstractCegarLoop]: === Iteration 36 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:26,333 INFO L82 PathProgramCache]: Analyzing trace with hash -1478501719, now seen corresponding path program 34 times [2018-01-29 23:40:26,333 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:26,333 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:26,334 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:26,334 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:26,334 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:26,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:26,343 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:27,012 INFO L134 CoverageAnalysis]: Checked inductivity of 6936 backedges. 0 proven. 2312 refuted. 0 times theorem prover too weak. 4624 trivial. 0 not checked. [2018-01-29 23:40:27,012 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:27,012 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:27,017 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-29 23:40:27,049 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:27,052 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:27,118 INFO L134 CoverageAnalysis]: Checked inductivity of 6936 backedges. 0 proven. 2312 refuted. 0 times theorem prover too weak. 4624 trivial. 0 not checked. [2018-01-29 23:40:27,136 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:27,136 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37] total 37 [2018-01-29 23:40:27,137 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-29 23:40:27,137 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-29 23:40:27,137 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=666, Invalid=666, Unknown=0, NotChecked=0, Total=1332 [2018-01-29 23:40:27,137 INFO L87 Difference]: Start difference. First operand 436 states and 440 transitions. Second operand 37 states. [2018-01-29 23:40:27,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:27,774 INFO L93 Difference]: Finished difference Result 746 states and 756 transitions. [2018-01-29 23:40:27,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-29 23:40:27,774 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 430 [2018-01-29 23:40:27,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:27,775 INFO L225 Difference]: With dead ends: 746 [2018-01-29 23:40:27,775 INFO L226 Difference]: Without dead ends: 454 [2018-01-29 23:40:27,776 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 466 GetRequests, 431 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=666, Invalid=666, Unknown=0, NotChecked=0, Total=1332 [2018-01-29 23:40:27,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 454 states. [2018-01-29 23:40:27,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 454 to 448. [2018-01-29 23:40:27,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 448 states. [2018-01-29 23:40:27,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 448 states to 448 states and 452 transitions. [2018-01-29 23:40:27,779 INFO L78 Accepts]: Start accepts. Automaton has 448 states and 452 transitions. Word has length 430 [2018-01-29 23:40:27,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:27,780 INFO L432 AbstractCegarLoop]: Abstraction has 448 states and 452 transitions. [2018-01-29 23:40:27,780 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-29 23:40:27,780 INFO L276 IsEmpty]: Start isEmpty. Operand 448 states and 452 transitions. [2018-01-29 23:40:27,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 443 [2018-01-29 23:40:27,781 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:27,781 INFO L350 BasicCegarLoop]: trace histogram [36, 36, 36, 35, 35, 35, 35, 35, 35, 35, 35, 35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:27,781 INFO L371 AbstractCegarLoop]: === Iteration 37 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:27,781 INFO L82 PathProgramCache]: Analyzing trace with hash 1088694256, now seen corresponding path program 35 times [2018-01-29 23:40:27,781 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:27,781 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:27,782 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:27,782 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:27,782 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:27,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:27,791 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:28,574 INFO L134 CoverageAnalysis]: Checked inductivity of 7350 backedges. 0 proven. 2450 refuted. 0 times theorem prover too weak. 4900 trivial. 0 not checked. [2018-01-29 23:40:28,575 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:28,575 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:28,579 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-29 23:40:28,587 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,588 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,590 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,591 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,593 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,594 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,596 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,598 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,601 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,604 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,608 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,612 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,616 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,622 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,627 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,634 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,642 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,650 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,660 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,670 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,683 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,697 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,713 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,731 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,751 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,772 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,797 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,824 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,855 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,889 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,927 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:28,970 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:29,016 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:29,066 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:29,120 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:29,587 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:29,590 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:29,595 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:29,652 INFO L134 CoverageAnalysis]: Checked inductivity of 7350 backedges. 0 proven. 2450 refuted. 0 times theorem prover too weak. 4900 trivial. 0 not checked. [2018-01-29 23:40:29,676 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:29,676 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38] total 38 [2018-01-29 23:40:29,677 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-29 23:40:29,677 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-29 23:40:29,677 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-01-29 23:40:29,677 INFO L87 Difference]: Start difference. First operand 448 states and 452 transitions. Second operand 38 states. [2018-01-29 23:40:29,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:29,944 INFO L93 Difference]: Finished difference Result 766 states and 776 transitions. [2018-01-29 23:40:29,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-29 23:40:29,946 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 442 [2018-01-29 23:40:29,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:29,947 INFO L225 Difference]: With dead ends: 766 [2018-01-29 23:40:29,947 INFO L226 Difference]: Without dead ends: 466 [2018-01-29 23:40:29,948 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 479 GetRequests, 443 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-01-29 23:40:29,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 466 states. [2018-01-29 23:40:29,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 466 to 460. [2018-01-29 23:40:29,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 460 states. [2018-01-29 23:40:29,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 460 states to 460 states and 464 transitions. [2018-01-29 23:40:29,951 INFO L78 Accepts]: Start accepts. Automaton has 460 states and 464 transitions. Word has length 442 [2018-01-29 23:40:29,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:29,951 INFO L432 AbstractCegarLoop]: Abstraction has 460 states and 464 transitions. [2018-01-29 23:40:29,951 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-29 23:40:29,951 INFO L276 IsEmpty]: Start isEmpty. Operand 460 states and 464 transitions. [2018-01-29 23:40:29,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 455 [2018-01-29 23:40:29,953 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:29,953 INFO L350 BasicCegarLoop]: trace histogram [37, 37, 37, 36, 36, 36, 36, 36, 36, 36, 36, 36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:29,953 INFO L371 AbstractCegarLoop]: === Iteration 38 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:29,953 INFO L82 PathProgramCache]: Analyzing trace with hash 1996882615, now seen corresponding path program 36 times [2018-01-29 23:40:29,953 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:29,953 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:29,953 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:29,953 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:29,954 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:29,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:29,963 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:30,643 INFO L134 CoverageAnalysis]: Checked inductivity of 7776 backedges. 0 proven. 2592 refuted. 0 times theorem prover too weak. 5184 trivial. 0 not checked. [2018-01-29 23:40:30,643 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:30,643 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:30,649 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-29 23:40:30,658 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,659 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,661 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,662 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,663 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,665 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,666 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,668 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,670 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,672 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,676 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,678 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,682 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,685 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,690 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,693 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,697 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,701 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,707 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,712 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,718 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,725 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,732 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,739 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,746 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,754 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,764 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,773 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,783 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,796 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,809 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,822 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,836 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,851 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,867 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,886 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,937 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:30,938 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:30,942 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:31,003 INFO L134 CoverageAnalysis]: Checked inductivity of 7776 backedges. 0 proven. 2592 refuted. 0 times theorem prover too weak. 5184 trivial. 0 not checked. [2018-01-29 23:40:31,023 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:31,023 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39] total 39 [2018-01-29 23:40:31,023 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-29 23:40:31,023 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-29 23:40:31,024 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=741, Invalid=741, Unknown=0, NotChecked=0, Total=1482 [2018-01-29 23:40:31,024 INFO L87 Difference]: Start difference. First operand 460 states and 464 transitions. Second operand 39 states. [2018-01-29 23:40:32,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:32,000 INFO L93 Difference]: Finished difference Result 786 states and 796 transitions. [2018-01-29 23:40:32,000 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-29 23:40:32,000 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 454 [2018-01-29 23:40:32,000 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:32,001 INFO L225 Difference]: With dead ends: 786 [2018-01-29 23:40:32,001 INFO L226 Difference]: Without dead ends: 478 [2018-01-29 23:40:32,002 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 492 GetRequests, 455 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=741, Invalid=741, Unknown=0, NotChecked=0, Total=1482 [2018-01-29 23:40:32,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 478 states. [2018-01-29 23:40:32,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 478 to 472. [2018-01-29 23:40:32,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 472 states. [2018-01-29 23:40:32,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 472 states to 472 states and 476 transitions. [2018-01-29 23:40:32,005 INFO L78 Accepts]: Start accepts. Automaton has 472 states and 476 transitions. Word has length 454 [2018-01-29 23:40:32,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:32,005 INFO L432 AbstractCegarLoop]: Abstraction has 472 states and 476 transitions. [2018-01-29 23:40:32,005 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-29 23:40:32,005 INFO L276 IsEmpty]: Start isEmpty. Operand 472 states and 476 transitions. [2018-01-29 23:40:32,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 467 [2018-01-29 23:40:32,007 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:32,007 INFO L350 BasicCegarLoop]: trace histogram [38, 38, 38, 37, 37, 37, 37, 37, 37, 37, 37, 37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:32,007 INFO L371 AbstractCegarLoop]: === Iteration 39 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:32,007 INFO L82 PathProgramCache]: Analyzing trace with hash -124507394, now seen corresponding path program 37 times [2018-01-29 23:40:32,007 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:32,007 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:32,008 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:32,008 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:32,008 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:32,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:32,017 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:32,770 INFO L134 CoverageAnalysis]: Checked inductivity of 8214 backedges. 0 proven. 2738 refuted. 0 times theorem prover too weak. 5476 trivial. 0 not checked. [2018-01-29 23:40:32,770 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:32,770 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:32,775 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:40:32,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:32,812 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:32,875 INFO L134 CoverageAnalysis]: Checked inductivity of 8214 backedges. 0 proven. 2738 refuted. 0 times theorem prover too weak. 5476 trivial. 0 not checked. [2018-01-29 23:40:32,891 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:32,891 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40] total 40 [2018-01-29 23:40:32,892 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-29 23:40:32,892 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-29 23:40:32,892 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-01-29 23:40:32,892 INFO L87 Difference]: Start difference. First operand 472 states and 476 transitions. Second operand 40 states. [2018-01-29 23:40:33,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:33,192 INFO L93 Difference]: Finished difference Result 806 states and 816 transitions. [2018-01-29 23:40:33,192 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-29 23:40:33,192 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 466 [2018-01-29 23:40:33,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:33,193 INFO L225 Difference]: With dead ends: 806 [2018-01-29 23:40:33,193 INFO L226 Difference]: Without dead ends: 490 [2018-01-29 23:40:33,194 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 505 GetRequests, 467 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-01-29 23:40:33,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 490 states. [2018-01-29 23:40:33,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 490 to 484. [2018-01-29 23:40:33,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 484 states. [2018-01-29 23:40:33,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 484 states to 484 states and 488 transitions. [2018-01-29 23:40:33,197 INFO L78 Accepts]: Start accepts. Automaton has 484 states and 488 transitions. Word has length 466 [2018-01-29 23:40:33,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:33,197 INFO L432 AbstractCegarLoop]: Abstraction has 484 states and 488 transitions. [2018-01-29 23:40:33,197 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-29 23:40:33,197 INFO L276 IsEmpty]: Start isEmpty. Operand 484 states and 488 transitions. [2018-01-29 23:40:33,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 479 [2018-01-29 23:40:33,199 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:33,199 INFO L350 BasicCegarLoop]: trace histogram [39, 39, 39, 38, 38, 38, 38, 38, 38, 38, 38, 38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:33,199 INFO L371 AbstractCegarLoop]: === Iteration 40 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:33,199 INFO L82 PathProgramCache]: Analyzing trace with hash 960323781, now seen corresponding path program 38 times [2018-01-29 23:40:33,199 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:33,199 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:33,200 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:33,200 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:40:33,200 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:33,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:33,209 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:34,027 INFO L134 CoverageAnalysis]: Checked inductivity of 8664 backedges. 0 proven. 2888 refuted. 0 times theorem prover too weak. 5776 trivial. 0 not checked. [2018-01-29 23:40:34,027 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:34,027 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:34,038 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:40:34,048 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:34,081 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:34,087 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:34,089 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:34,161 INFO L134 CoverageAnalysis]: Checked inductivity of 8664 backedges. 0 proven. 2888 refuted. 0 times theorem prover too weak. 5776 trivial. 0 not checked. [2018-01-29 23:40:34,179 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:34,179 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41] total 41 [2018-01-29 23:40:34,179 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-29 23:40:34,180 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-29 23:40:34,180 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=820, Invalid=820, Unknown=0, NotChecked=0, Total=1640 [2018-01-29 23:40:34,180 INFO L87 Difference]: Start difference. First operand 484 states and 488 transitions. Second operand 41 states. [2018-01-29 23:40:34,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:34,494 INFO L93 Difference]: Finished difference Result 826 states and 836 transitions. [2018-01-29 23:40:34,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-29 23:40:34,494 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 478 [2018-01-29 23:40:34,494 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:34,495 INFO L225 Difference]: With dead ends: 826 [2018-01-29 23:40:34,495 INFO L226 Difference]: Without dead ends: 502 [2018-01-29 23:40:34,496 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 518 GetRequests, 479 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=820, Invalid=820, Unknown=0, NotChecked=0, Total=1640 [2018-01-29 23:40:34,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 502 states. [2018-01-29 23:40:34,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 502 to 496. [2018-01-29 23:40:34,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 496 states. [2018-01-29 23:40:34,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 496 states to 496 states and 500 transitions. [2018-01-29 23:40:34,499 INFO L78 Accepts]: Start accepts. Automaton has 496 states and 500 transitions. Word has length 478 [2018-01-29 23:40:34,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:34,499 INFO L432 AbstractCegarLoop]: Abstraction has 496 states and 500 transitions. [2018-01-29 23:40:34,499 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-29 23:40:34,499 INFO L276 IsEmpty]: Start isEmpty. Operand 496 states and 500 transitions. [2018-01-29 23:40:34,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 491 [2018-01-29 23:40:34,507 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:34,508 INFO L350 BasicCegarLoop]: trace histogram [40, 40, 40, 39, 39, 39, 39, 39, 39, 39, 39, 39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:34,508 INFO L371 AbstractCegarLoop]: === Iteration 41 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:34,508 INFO L82 PathProgramCache]: Analyzing trace with hash -1575984116, now seen corresponding path program 39 times [2018-01-29 23:40:34,508 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:34,508 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:34,508 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:34,508 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:34,508 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:34,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:34,520 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:35,453 INFO L134 CoverageAnalysis]: Checked inductivity of 9126 backedges. 0 proven. 3042 refuted. 0 times theorem prover too weak. 6084 trivial. 0 not checked. [2018-01-29 23:40:35,454 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:35,454 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:35,458 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:40:35,468 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,469 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,470 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,471 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,473 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,474 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,477 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,479 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,483 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,485 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,490 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,494 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,499 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,504 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,510 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,516 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,523 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,531 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,541 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,553 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,563 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,575 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,589 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,608 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,631 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,653 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,674 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,699 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,727 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,756 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,789 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,827 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,868 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,910 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:35,959 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:36,014 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:36,067 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:36,125 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:36,189 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:36,260 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:36,262 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:36,267 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:36,336 INFO L134 CoverageAnalysis]: Checked inductivity of 9126 backedges. 0 proven. 3042 refuted. 0 times theorem prover too weak. 6084 trivial. 0 not checked. [2018-01-29 23:40:36,355 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:36,355 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42] total 42 [2018-01-29 23:40:36,356 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-29 23:40:36,356 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-29 23:40:36,356 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-01-29 23:40:36,356 INFO L87 Difference]: Start difference. First operand 496 states and 500 transitions. Second operand 42 states. [2018-01-29 23:40:36,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:36,665 INFO L93 Difference]: Finished difference Result 846 states and 856 transitions. [2018-01-29 23:40:36,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-01-29 23:40:36,665 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 490 [2018-01-29 23:40:36,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:36,666 INFO L225 Difference]: With dead ends: 846 [2018-01-29 23:40:36,666 INFO L226 Difference]: Without dead ends: 514 [2018-01-29 23:40:36,667 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 531 GetRequests, 491 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-01-29 23:40:36,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 514 states. [2018-01-29 23:40:36,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 514 to 508. [2018-01-29 23:40:36,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 508 states. [2018-01-29 23:40:36,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 508 states to 508 states and 512 transitions. [2018-01-29 23:40:36,670 INFO L78 Accepts]: Start accepts. Automaton has 508 states and 512 transitions. Word has length 490 [2018-01-29 23:40:36,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:36,670 INFO L432 AbstractCegarLoop]: Abstraction has 508 states and 512 transitions. [2018-01-29 23:40:36,670 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-29 23:40:36,670 INFO L276 IsEmpty]: Start isEmpty. Operand 508 states and 512 transitions. [2018-01-29 23:40:36,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 503 [2018-01-29 23:40:36,672 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:36,672 INFO L350 BasicCegarLoop]: trace histogram [41, 41, 41, 40, 40, 40, 40, 40, 40, 40, 40, 40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:36,672 INFO L371 AbstractCegarLoop]: === Iteration 42 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:36,672 INFO L82 PathProgramCache]: Analyzing trace with hash -1048841005, now seen corresponding path program 40 times [2018-01-29 23:40:36,672 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:36,672 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:36,673 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:36,673 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:36,673 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:36,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:36,682 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:37,541 INFO L134 CoverageAnalysis]: Checked inductivity of 9600 backedges. 0 proven. 3200 refuted. 0 times theorem prover too weak. 6400 trivial. 0 not checked. [2018-01-29 23:40:37,541 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:37,541 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:37,546 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-29 23:40:37,584 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:37,587 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:37,659 INFO L134 CoverageAnalysis]: Checked inductivity of 9600 backedges. 0 proven. 3200 refuted. 0 times theorem prover too weak. 6400 trivial. 0 not checked. [2018-01-29 23:40:37,676 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:37,676 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 43] total 43 [2018-01-29 23:40:37,677 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-01-29 23:40:37,677 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-01-29 23:40:37,677 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=903, Invalid=903, Unknown=0, NotChecked=0, Total=1806 [2018-01-29 23:40:37,677 INFO L87 Difference]: Start difference. First operand 508 states and 512 transitions. Second operand 43 states. [2018-01-29 23:40:38,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:38,004 INFO L93 Difference]: Finished difference Result 866 states and 876 transitions. [2018-01-29 23:40:38,005 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-01-29 23:40:38,005 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 502 [2018-01-29 23:40:38,005 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:38,006 INFO L225 Difference]: With dead ends: 866 [2018-01-29 23:40:38,006 INFO L226 Difference]: Without dead ends: 526 [2018-01-29 23:40:38,006 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 544 GetRequests, 503 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=903, Invalid=903, Unknown=0, NotChecked=0, Total=1806 [2018-01-29 23:40:38,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 526 states. [2018-01-29 23:40:38,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 526 to 520. [2018-01-29 23:40:38,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 520 states. [2018-01-29 23:40:38,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 520 states to 520 states and 524 transitions. [2018-01-29 23:40:38,011 INFO L78 Accepts]: Start accepts. Automaton has 520 states and 524 transitions. Word has length 502 [2018-01-29 23:40:38,011 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:38,012 INFO L432 AbstractCegarLoop]: Abstraction has 520 states and 524 transitions. [2018-01-29 23:40:38,012 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-01-29 23:40:38,012 INFO L276 IsEmpty]: Start isEmpty. Operand 520 states and 524 transitions. [2018-01-29 23:40:38,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 515 [2018-01-29 23:40:38,013 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:38,013 INFO L350 BasicCegarLoop]: trace histogram [42, 42, 42, 41, 41, 41, 41, 41, 41, 41, 41, 41, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:38,013 INFO L371 AbstractCegarLoop]: === Iteration 43 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:38,013 INFO L82 PathProgramCache]: Analyzing trace with hash 2068763418, now seen corresponding path program 41 times [2018-01-29 23:40:38,014 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:38,014 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:38,014 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:38,014 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:38,014 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:38,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:38,024 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:38,912 INFO L134 CoverageAnalysis]: Checked inductivity of 10086 backedges. 0 proven. 3362 refuted. 0 times theorem prover too weak. 6724 trivial. 0 not checked. [2018-01-29 23:40:38,913 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:38,913 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:38,918 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-29 23:40:38,926 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,927 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,929 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,930 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,932 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,933 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,935 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,938 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,940 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,943 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,947 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,951 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,956 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,961 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,967 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,973 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,981 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,989 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:38,999 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,009 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,022 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,036 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,052 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,070 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,089 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,111 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,136 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,163 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,194 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,229 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,267 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,310 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,357 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,407 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,460 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,519 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,583 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,653 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,727 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,809 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:39,896 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:43,718 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:43,723 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:43,730 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:43,805 INFO L134 CoverageAnalysis]: Checked inductivity of 10086 backedges. 0 proven. 3362 refuted. 0 times theorem prover too weak. 6724 trivial. 0 not checked. [2018-01-29 23:40:43,829 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:43,829 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44] total 44 [2018-01-29 23:40:43,829 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-29 23:40:43,829 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-29 23:40:43,830 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-01-29 23:40:43,830 INFO L87 Difference]: Start difference. First operand 520 states and 524 transitions. Second operand 44 states. [2018-01-29 23:40:44,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:44,117 INFO L93 Difference]: Finished difference Result 886 states and 896 transitions. [2018-01-29 23:40:44,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-01-29 23:40:44,118 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 514 [2018-01-29 23:40:44,118 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:44,119 INFO L225 Difference]: With dead ends: 886 [2018-01-29 23:40:44,119 INFO L226 Difference]: Without dead ends: 538 [2018-01-29 23:40:44,120 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 557 GetRequests, 515 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-01-29 23:40:44,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 538 states. [2018-01-29 23:40:44,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 538 to 532. [2018-01-29 23:40:44,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 532 states. [2018-01-29 23:40:44,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 532 states to 532 states and 536 transitions. [2018-01-29 23:40:44,123 INFO L78 Accepts]: Start accepts. Automaton has 532 states and 536 transitions. Word has length 514 [2018-01-29 23:40:44,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:44,123 INFO L432 AbstractCegarLoop]: Abstraction has 532 states and 536 transitions. [2018-01-29 23:40:44,123 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-29 23:40:44,123 INFO L276 IsEmpty]: Start isEmpty. Operand 532 states and 536 transitions. [2018-01-29 23:40:44,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 527 [2018-01-29 23:40:44,125 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:44,126 INFO L350 BasicCegarLoop]: trace histogram [43, 43, 43, 42, 42, 42, 42, 42, 42, 42, 42, 42, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:44,126 INFO L371 AbstractCegarLoop]: === Iteration 44 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:44,126 INFO L82 PathProgramCache]: Analyzing trace with hash 951566049, now seen corresponding path program 42 times [2018-01-29 23:40:44,126 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:44,126 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:44,126 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:44,126 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:44,127 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:44,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:44,137 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:45,042 INFO L134 CoverageAnalysis]: Checked inductivity of 10584 backedges. 0 proven. 3528 refuted. 0 times theorem prover too weak. 7056 trivial. 0 not checked. [2018-01-29 23:40:45,042 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:45,042 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:45,047 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-29 23:40:45,056 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,058 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,059 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,060 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,061 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,063 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,064 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,066 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,068 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,070 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,073 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,076 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,078 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,083 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,087 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,090 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,094 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,098 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,103 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,110 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,116 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,122 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,129 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,137 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,144 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,152 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,162 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,171 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,182 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,195 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,208 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,222 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,235 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,251 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,269 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,287 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,306 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,326 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,349 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,371 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,475 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,633 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,705 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:40:45,707 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:45,713 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:45,805 INFO L134 CoverageAnalysis]: Checked inductivity of 10584 backedges. 0 proven. 3528 refuted. 0 times theorem prover too weak. 7056 trivial. 0 not checked. [2018-01-29 23:40:45,823 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:45,824 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45] total 45 [2018-01-29 23:40:45,824 INFO L409 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-01-29 23:40:45,824 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-01-29 23:40:45,824 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=990, Invalid=990, Unknown=0, NotChecked=0, Total=1980 [2018-01-29 23:40:45,825 INFO L87 Difference]: Start difference. First operand 532 states and 536 transitions. Second operand 45 states. [2018-01-29 23:40:46,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:46,168 INFO L93 Difference]: Finished difference Result 906 states and 916 transitions. [2018-01-29 23:40:46,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-01-29 23:40:46,168 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 526 [2018-01-29 23:40:46,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:46,169 INFO L225 Difference]: With dead ends: 906 [2018-01-29 23:40:46,170 INFO L226 Difference]: Without dead ends: 550 [2018-01-29 23:40:46,170 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 570 GetRequests, 527 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=990, Invalid=990, Unknown=0, NotChecked=0, Total=1980 [2018-01-29 23:40:46,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 550 states. [2018-01-29 23:40:46,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 550 to 544. [2018-01-29 23:40:46,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 544 states. [2018-01-29 23:40:46,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 544 states to 544 states and 548 transitions. [2018-01-29 23:40:46,173 INFO L78 Accepts]: Start accepts. Automaton has 544 states and 548 transitions. Word has length 526 [2018-01-29 23:40:46,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:46,174 INFO L432 AbstractCegarLoop]: Abstraction has 544 states and 548 transitions. [2018-01-29 23:40:46,174 INFO L433 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-01-29 23:40:46,174 INFO L276 IsEmpty]: Start isEmpty. Operand 544 states and 548 transitions. [2018-01-29 23:40:46,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 539 [2018-01-29 23:40:46,175 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:46,175 INFO L350 BasicCegarLoop]: trace histogram [44, 44, 44, 43, 43, 43, 43, 43, 43, 43, 43, 43, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:46,175 INFO L371 AbstractCegarLoop]: === Iteration 45 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:46,176 INFO L82 PathProgramCache]: Analyzing trace with hash 407205928, now seen corresponding path program 43 times [2018-01-29 23:40:46,176 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:46,176 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:46,176 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:46,176 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:46,176 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:46,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:46,186 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:47,143 INFO L134 CoverageAnalysis]: Checked inductivity of 11094 backedges. 0 proven. 3698 refuted. 0 times theorem prover too weak. 7396 trivial. 0 not checked. [2018-01-29 23:40:47,143 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:47,143 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:47,147 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:40:47,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:47,188 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:47,269 INFO L134 CoverageAnalysis]: Checked inductivity of 11094 backedges. 0 proven. 3698 refuted. 0 times theorem prover too weak. 7396 trivial. 0 not checked. [2018-01-29 23:40:47,286 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:47,286 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46] total 46 [2018-01-29 23:40:47,286 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-01-29 23:40:47,286 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-01-29 23:40:47,287 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-01-29 23:40:47,287 INFO L87 Difference]: Start difference. First operand 544 states and 548 transitions. Second operand 46 states. [2018-01-29 23:40:47,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:47,614 INFO L93 Difference]: Finished difference Result 926 states and 936 transitions. [2018-01-29 23:40:47,614 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-01-29 23:40:47,614 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 538 [2018-01-29 23:40:47,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:47,615 INFO L225 Difference]: With dead ends: 926 [2018-01-29 23:40:47,615 INFO L226 Difference]: Without dead ends: 562 [2018-01-29 23:40:47,616 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 583 GetRequests, 539 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-01-29 23:40:47,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 562 states. [2018-01-29 23:40:47,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 562 to 556. [2018-01-29 23:40:47,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 556 states. [2018-01-29 23:40:47,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 560 transitions. [2018-01-29 23:40:47,619 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 560 transitions. Word has length 538 [2018-01-29 23:40:47,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:47,619 INFO L432 AbstractCegarLoop]: Abstraction has 556 states and 560 transitions. [2018-01-29 23:40:47,619 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-01-29 23:40:47,619 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 560 transitions. [2018-01-29 23:40:47,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 551 [2018-01-29 23:40:47,621 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:47,621 INFO L350 BasicCegarLoop]: trace histogram [45, 45, 45, 44, 44, 44, 44, 44, 44, 44, 44, 44, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:47,621 INFO L371 AbstractCegarLoop]: === Iteration 46 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:47,621 INFO L82 PathProgramCache]: Analyzing trace with hash 501661423, now seen corresponding path program 44 times [2018-01-29 23:40:47,621 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:47,621 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:47,621 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:47,622 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:40:47,622 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:47,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:47,632 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:48,673 INFO L134 CoverageAnalysis]: Checked inductivity of 11616 backedges. 0 proven. 3872 refuted. 0 times theorem prover too weak. 7744 trivial. 0 not checked. [2018-01-29 23:40:48,673 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:48,673 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:48,677 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:40:48,687 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:48,714 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:48,719 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:48,722 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:48,807 INFO L134 CoverageAnalysis]: Checked inductivity of 11616 backedges. 0 proven. 3872 refuted. 0 times theorem prover too weak. 7744 trivial. 0 not checked. [2018-01-29 23:40:48,824 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:48,824 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47] total 47 [2018-01-29 23:40:48,824 INFO L409 AbstractCegarLoop]: Interpolant automaton has 47 states [2018-01-29 23:40:48,824 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2018-01-29 23:40:48,825 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1081, Invalid=1081, Unknown=0, NotChecked=0, Total=2162 [2018-01-29 23:40:48,825 INFO L87 Difference]: Start difference. First operand 556 states and 560 transitions. Second operand 47 states. [2018-01-29 23:40:49,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:49,185 INFO L93 Difference]: Finished difference Result 946 states and 956 transitions. [2018-01-29 23:40:49,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-01-29 23:40:49,186 INFO L78 Accepts]: Start accepts. Automaton has 47 states. Word has length 550 [2018-01-29 23:40:49,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:49,187 INFO L225 Difference]: With dead ends: 946 [2018-01-29 23:40:49,187 INFO L226 Difference]: Without dead ends: 574 [2018-01-29 23:40:49,187 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 596 GetRequests, 551 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=1081, Invalid=1081, Unknown=0, NotChecked=0, Total=2162 [2018-01-29 23:40:49,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 574 states. [2018-01-29 23:40:49,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 574 to 568. [2018-01-29 23:40:49,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 568 states. [2018-01-29 23:40:49,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 568 states to 568 states and 572 transitions. [2018-01-29 23:40:49,191 INFO L78 Accepts]: Start accepts. Automaton has 568 states and 572 transitions. Word has length 550 [2018-01-29 23:40:49,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:49,191 INFO L432 AbstractCegarLoop]: Abstraction has 568 states and 572 transitions. [2018-01-29 23:40:49,191 INFO L433 AbstractCegarLoop]: Interpolant automaton has 47 states. [2018-01-29 23:40:49,191 INFO L276 IsEmpty]: Start isEmpty. Operand 568 states and 572 transitions. [2018-01-29 23:40:49,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 563 [2018-01-29 23:40:49,193 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:49,193 INFO L350 BasicCegarLoop]: trace histogram [46, 46, 46, 45, 45, 45, 45, 45, 45, 45, 45, 45, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:49,193 INFO L371 AbstractCegarLoop]: === Iteration 47 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:49,193 INFO L82 PathProgramCache]: Analyzing trace with hash 1659523894, now seen corresponding path program 45 times [2018-01-29 23:40:49,193 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:49,193 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:49,194 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:49,194 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:49,194 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:49,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:49,205 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:50,270 INFO L134 CoverageAnalysis]: Checked inductivity of 12150 backedges. 0 proven. 4050 refuted. 0 times theorem prover too weak. 8100 trivial. 0 not checked. [2018-01-29 23:40:50,270 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:50,270 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:50,276 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:40:50,286 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,288 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,289 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,290 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,292 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,293 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,296 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,298 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,302 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,305 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,308 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,312 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,317 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,322 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,328 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,335 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,343 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,351 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,360 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,371 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,381 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,393 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,410 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,426 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,446 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,465 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,487 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,510 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,539 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,567 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,601 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,637 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,675 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,719 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,769 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,823 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,877 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:50,938 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:51,004 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:51,074 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:51,146 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:51,225 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:51,311 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:51,402 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:51,499 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:51,604 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:40:51,606 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:51,612 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:51,709 INFO L134 CoverageAnalysis]: Checked inductivity of 12150 backedges. 0 proven. 4050 refuted. 0 times theorem prover too weak. 8100 trivial. 0 not checked. [2018-01-29 23:40:51,728 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:51,729 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48] total 48 [2018-01-29 23:40:51,729 INFO L409 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-01-29 23:40:51,729 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-01-29 23:40:51,729 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-01-29 23:40:51,730 INFO L87 Difference]: Start difference. First operand 568 states and 572 transitions. Second operand 48 states. [2018-01-29 23:40:52,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:52,026 INFO L93 Difference]: Finished difference Result 966 states and 976 transitions. [2018-01-29 23:40:52,026 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-01-29 23:40:52,026 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 562 [2018-01-29 23:40:52,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:52,027 INFO L225 Difference]: With dead ends: 966 [2018-01-29 23:40:52,027 INFO L226 Difference]: Without dead ends: 586 [2018-01-29 23:40:52,028 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 609 GetRequests, 563 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-01-29 23:40:52,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 586 states. [2018-01-29 23:40:52,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 586 to 580. [2018-01-29 23:40:52,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 580 states. [2018-01-29 23:40:52,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 580 states to 580 states and 584 transitions. [2018-01-29 23:40:52,031 INFO L78 Accepts]: Start accepts. Automaton has 580 states and 584 transitions. Word has length 562 [2018-01-29 23:40:52,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:52,031 INFO L432 AbstractCegarLoop]: Abstraction has 580 states and 584 transitions. [2018-01-29 23:40:52,031 INFO L433 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-01-29 23:40:52,031 INFO L276 IsEmpty]: Start isEmpty. Operand 580 states and 584 transitions. [2018-01-29 23:40:52,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 575 [2018-01-29 23:40:52,033 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:52,033 INFO L350 BasicCegarLoop]: trace histogram [47, 47, 47, 46, 46, 46, 46, 46, 46, 46, 46, 46, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:52,033 INFO L371 AbstractCegarLoop]: === Iteration 48 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:52,033 INFO L82 PathProgramCache]: Analyzing trace with hash 1174336765, now seen corresponding path program 46 times [2018-01-29 23:40:52,033 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:52,033 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:52,034 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:52,034 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:52,034 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:52,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:52,045 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:53,147 INFO L134 CoverageAnalysis]: Checked inductivity of 12696 backedges. 0 proven. 4232 refuted. 0 times theorem prover too weak. 8464 trivial. 0 not checked. [2018-01-29 23:40:53,147 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:53,147 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:53,152 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-29 23:40:53,194 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:40:53,197 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:40:53,290 INFO L134 CoverageAnalysis]: Checked inductivity of 12696 backedges. 0 proven. 4232 refuted. 0 times theorem prover too weak. 8464 trivial. 0 not checked. [2018-01-29 23:40:53,307 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:40:53,307 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49] total 49 [2018-01-29 23:40:53,308 INFO L409 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-01-29 23:40:53,308 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-01-29 23:40:53,308 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2018-01-29 23:40:53,308 INFO L87 Difference]: Start difference. First operand 580 states and 584 transitions. Second operand 49 states. [2018-01-29 23:40:53,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:40:53,643 INFO L93 Difference]: Finished difference Result 986 states and 996 transitions. [2018-01-29 23:40:53,644 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-01-29 23:40:53,644 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 574 [2018-01-29 23:40:53,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:40:53,645 INFO L225 Difference]: With dead ends: 986 [2018-01-29 23:40:53,645 INFO L226 Difference]: Without dead ends: 598 [2018-01-29 23:40:53,645 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 622 GetRequests, 575 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2018-01-29 23:40:53,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 598 states. [2018-01-29 23:40:53,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 598 to 592. [2018-01-29 23:40:53,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 592 states. [2018-01-29 23:40:53,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 592 states to 592 states and 596 transitions. [2018-01-29 23:40:53,649 INFO L78 Accepts]: Start accepts. Automaton has 592 states and 596 transitions. Word has length 574 [2018-01-29 23:40:53,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:40:53,649 INFO L432 AbstractCegarLoop]: Abstraction has 592 states and 596 transitions. [2018-01-29 23:40:53,649 INFO L433 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-01-29 23:40:53,649 INFO L276 IsEmpty]: Start isEmpty. Operand 592 states and 596 transitions. [2018-01-29 23:40:53,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 587 [2018-01-29 23:40:53,651 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:40:53,651 INFO L350 BasicCegarLoop]: trace histogram [48, 48, 48, 47, 47, 47, 47, 47, 47, 47, 47, 47, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:40:53,651 INFO L371 AbstractCegarLoop]: === Iteration 49 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:40:53,651 INFO L82 PathProgramCache]: Analyzing trace with hash -1691130812, now seen corresponding path program 47 times [2018-01-29 23:40:53,651 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:40:53,651 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:40:53,652 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:53,652 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:40:53,652 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:40:53,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:40:53,663 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:40:54,819 INFO L134 CoverageAnalysis]: Checked inductivity of 13254 backedges. 0 proven. 4418 refuted. 0 times theorem prover too weak. 8836 trivial. 0 not checked. [2018-01-29 23:40:54,819 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:40:54,819 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:40:54,824 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-29 23:40:54,833 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,835 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,836 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,837 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,839 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,840 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,842 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,844 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,847 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,850 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,854 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,858 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,862 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,867 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,873 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,880 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,887 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,896 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,905 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,916 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,928 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,942 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,959 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,977 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:54,996 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,018 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,042 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,070 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,100 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,135 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,173 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,216 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,263 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,312 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,366 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,423 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,487 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,556 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,631 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,712 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,799 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,895 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:55,996 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:56,110 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:56,230 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:56,359 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:40:56,495 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command Received shutdown request... [2018-01-29 23:41:08,511 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:41:08,516 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:41:08,523 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:41:08,525 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-29 23:41:08,526 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-29 23:41:08,528 WARN L185 ceAbstractionStarter]: Timeout [2018-01-29 23:41:08,528 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 29.01 11:41:08 BoogieIcfgContainer [2018-01-29 23:41:08,529 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-29 23:41:08,529 INFO L168 Benchmark]: Toolchain (without parser) took 71501.23 ms. Allocated memory was 151.0 MB in the beginning and 1.5 GB in the end (delta: 1.4 GB). Free memory was 115.9 MB in the beginning and 824.0 MB in the end (delta: -708.1 MB). Peak memory consumption was 661.9 MB. Max. memory is 5.3 GB. [2018-01-29 23:41:08,530 INFO L168 Benchmark]: CDTParser took 0.09 ms. Allocated memory is still 151.0 MB. Free memory is still 120.8 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-29 23:41:08,530 INFO L168 Benchmark]: CACSL2BoogieTranslator took 102.12 ms. Allocated memory is still 151.0 MB. Free memory was 115.9 MB in the beginning and 107.5 MB in the end (delta: 8.4 MB). Peak memory consumption was 8.4 MB. Max. memory is 5.3 GB. [2018-01-29 23:41:08,530 INFO L168 Benchmark]: Boogie Preprocessor took 19.75 ms. Allocated memory is still 151.0 MB. Free memory was 107.5 MB in the beginning and 106.2 MB in the end (delta: 1.4 MB). Peak memory consumption was 1.4 MB. Max. memory is 5.3 GB. [2018-01-29 23:41:08,530 INFO L168 Benchmark]: RCFGBuilder took 290.86 ms. Allocated memory is still 151.0 MB. Free memory was 106.2 MB in the beginning and 94.0 MB in the end (delta: 12.1 MB). Peak memory consumption was 12.1 MB. Max. memory is 5.3 GB. [2018-01-29 23:41:08,530 INFO L168 Benchmark]: TraceAbstraction took 71086.29 ms. Allocated memory was 151.0 MB in the beginning and 1.5 GB in the end (delta: 1.4 GB). Free memory was 94.0 MB in the beginning and 824.0 MB in the end (delta: -730.0 MB). Peak memory consumption was 640.0 MB. Max. memory is 5.3 GB. [2018-01-29 23:41:08,531 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09 ms. Allocated memory is still 151.0 MB. Free memory is still 120.8 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 102.12 ms. Allocated memory is still 151.0 MB. Free memory was 115.9 MB in the beginning and 107.5 MB in the end (delta: 8.4 MB). Peak memory consumption was 8.4 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 19.75 ms. Allocated memory is still 151.0 MB. Free memory was 107.5 MB in the beginning and 106.2 MB in the end (delta: 1.4 MB). Peak memory consumption was 1.4 MB. Max. memory is 5.3 GB. * RCFGBuilder took 290.86 ms. Allocated memory is still 151.0 MB. Free memory was 106.2 MB in the beginning and 94.0 MB in the end (delta: 12.1 MB). Peak memory consumption was 12.1 MB. Max. memory is 5.3 GB. * TraceAbstraction took 71086.29 ms. Allocated memory was 151.0 MB in the beginning and 1.5 GB in the end (delta: 1.4 GB). Free memory was 94.0 MB in the beginning and 824.0 MB in the end (delta: -730.0 MB). Peak memory consumption was 640.0 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 2]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 2). Cancelled while BasicCegarLoop was analyzing trace of length 587 with TraceHistMax 48, while TraceCheckSpWp was constructing forward predicates, while XnfDer was eliminating 1 quantified variables from 2 xjuncts. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 39 locations, 1 error locations. TIMEOUT Result, 71.0s OverallTime, 49 OverallIterations, 48 TraceHistogramMax, 13.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1406 SDtfs, 11617 SDslu, 16644 SDs, 0 SdLazy, 12564 SolverSat, 2983 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 10.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 15162 GetRequests, 14034 SyntacticMatches, 0 SemanticMatches, 1128 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 15.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=592occurred in iteration=48, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 48 MinimizatonAttempts, 282 StatesRemovedByMinimization, 47 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 13.5s SatisfiabilityAnalysisTime, 25.3s InterpolantComputationTime, 28009 NumberOfCodeBlocks, 28009 NumberOfCodeBlocksAsserted, 631 NumberOfCheckSat, 27915 ConstructedInterpolants, 0 QuantifiedInterpolants, 17691069 SizeOfPredicates, 46 NumberOfNonLiveVariables, 17917 ConjunctsInSsa, 1173 ConjunctsInUnsatCore, 94 InterpolantComputations, 2 PerfectInterpolantSequences, 268088/402132 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_init3_true-unreach-call_ground.i_svcomp-Reach-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-29_23-41-08-535.csv Written .csv to /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_init3_true-unreach-call_ground.i_svcomp-Reach-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-29_23-41-08-535.csv Completed graceful shutdown