java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-Reach-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/array-examples/standard_copyInit_true-unreach-call_ground.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-1cceb4a-m [2018-01-30 03:28:27,376 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-30 03:28:27,379 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-30 03:28:27,392 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-30 03:28:27,393 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-30 03:28:27,393 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-30 03:28:27,394 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-30 03:28:27,395 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-30 03:28:27,397 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-30 03:28:27,397 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-30 03:28:27,397 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-30 03:28:27,397 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-30 03:28:27,398 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-30 03:28:27,399 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-30 03:28:27,399 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-30 03:28:27,400 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-30 03:28:27,402 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-30 03:28:27,403 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-30 03:28:27,404 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-30 03:28:27,404 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-30 03:28:27,405 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-30 03:28:27,406 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-30 03:28:27,406 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-30 03:28:27,406 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-30 03:28:27,407 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-30 03:28:27,407 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-30 03:28:27,407 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-30 03:28:27,408 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-30 03:28:27,408 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-30 03:28:27,408 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-30 03:28:27,409 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-30 03:28:27,409 INFO L98 SettingsManager]: Beginning loading settings from /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-Reach-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-30 03:28:27,421 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-30 03:28:27,421 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-30 03:28:27,422 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-30 03:28:27,422 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-30 03:28:27,422 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-30 03:28:27,422 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-30 03:28:27,422 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-30 03:28:27,423 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-30 03:28:27,423 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-30 03:28:27,423 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-30 03:28:27,423 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-30 03:28:27,423 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-30 03:28:27,423 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-30 03:28:27,423 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-30 03:28:27,423 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-30 03:28:27,423 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-30 03:28:27,423 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-30 03:28:27,424 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-30 03:28:27,424 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-30 03:28:27,424 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-30 03:28:27,424 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-30 03:28:27,424 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-30 03:28:27,424 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-30 03:28:27,424 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-30 03:28:27,424 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-30 03:28:27,424 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-30 03:28:27,424 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-30 03:28:27,429 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-30 03:28:27,429 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-30 03:28:27,429 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-30 03:28:27,429 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-30 03:28:27,429 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-30 03:28:27,430 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-30 03:28:27,430 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-30 03:28:27,449 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-30 03:28:27,455 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-30 03:28:27,457 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-30 03:28:27,458 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-30 03:28:27,458 INFO L276 PluginConnector]: CDTParser initialized [2018-01-30 03:28:27,459 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/standard_copyInit_true-unreach-call_ground.i [2018-01-30 03:28:27,520 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-30 03:28:27,521 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-01-30 03:28:27,522 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-30 03:28:27,522 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-30 03:28:27,525 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-30 03:28:27,526 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 30.01 03:28:27" (1/1) ... [2018-01-30 03:28:27,527 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@76f0dab1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 03:28:27, skipping insertion in model container [2018-01-30 03:28:27,527 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 30.01 03:28:27" (1/1) ... [2018-01-30 03:28:27,545 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-30 03:28:27,554 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-30 03:28:27,621 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-30 03:28:27,629 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-30 03:28:27,632 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 03:28:27 WrapperNode [2018-01-30 03:28:27,632 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-30 03:28:27,632 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-30 03:28:27,632 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-30 03:28:27,633 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-30 03:28:27,640 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 03:28:27" (1/1) ... [2018-01-30 03:28:27,641 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 03:28:27" (1/1) ... [2018-01-30 03:28:27,645 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 03:28:27" (1/1) ... [2018-01-30 03:28:27,645 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 03:28:27" (1/1) ... [2018-01-30 03:28:27,646 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 03:28:27" (1/1) ... [2018-01-30 03:28:27,648 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 03:28:27" (1/1) ... [2018-01-30 03:28:27,649 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 03:28:27" (1/1) ... [2018-01-30 03:28:27,649 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-30 03:28:27,649 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-30 03:28:27,650 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-30 03:28:27,650 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-30 03:28:27,650 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 03:28:27" (1/1) ... No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-30 03:28:27,691 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-30 03:28:27,692 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-30 03:28:27,692 INFO L136 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-01-30 03:28:27,692 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-30 03:28:27,692 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-01-30 03:28:27,692 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-01-30 03:28:27,692 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-30 03:28:27,692 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-30 03:28:27,692 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-30 03:28:28,030 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-30 03:28:28,030 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 30.01 03:28:28 BoogieIcfgContainer [2018-01-30 03:28:28,030 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-30 03:28:28,030 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2018-01-30 03:28:28,030 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2018-01-30 03:28:28,031 INFO L276 PluginConnector]: IcfgTransformer initialized [2018-01-30 03:28:28,033 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 30.01 03:28:28" (1/1) ... [2018-01-30 03:28:28,036 WARN L213 ansformationObserver]: HeapSeparator: input icfg has no '#valid' array -- returning unchanged Icfg! [2018-01-30 03:28:28,042 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 30.01 03:28:28 BasicIcfg [2018-01-30 03:28:28,042 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2018-01-30 03:28:28,043 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-30 03:28:28,043 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-30 03:28:28,045 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-30 03:28:28,045 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 30.01 03:28:27" (1/4) ... [2018-01-30 03:28:28,045 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3ac9061e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 30.01 03:28:28, skipping insertion in model container [2018-01-30 03:28:28,045 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 03:28:27" (2/4) ... [2018-01-30 03:28:28,046 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3ac9061e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 30.01 03:28:28, skipping insertion in model container [2018-01-30 03:28:28,046 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 30.01 03:28:28" (3/4) ... [2018-01-30 03:28:28,046 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3ac9061e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 30.01 03:28:28, skipping insertion in model container [2018-01-30 03:28:28,046 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 30.01 03:28:28" (4/4) ... [2018-01-30 03:28:28,047 INFO L107 eAbstractionObserver]: Analyzing ICFG standard_copyInit_true-unreach-call_ground.ileft_unchanged_by_heapseparator [2018-01-30 03:28:28,052 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-30 03:28:28,057 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-01-30 03:28:28,081 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-30 03:28:28,081 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-30 03:28:28,081 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-30 03:28:28,081 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-30 03:28:28,081 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-30 03:28:28,081 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-30 03:28:28,081 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-30 03:28:28,081 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-30 03:28:28,082 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-30 03:28:28,091 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states. [2018-01-30 03:28:28,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-30 03:28:28,094 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:28,095 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:28,095 INFO L371 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:28,098 INFO L82 PathProgramCache]: Analyzing trace with hash 1052267310, now seen corresponding path program 1 times [2018-01-30 03:28:28,099 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:28,099 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:28,127 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:28,128 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:28:28,128 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:28,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:28,148 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:28,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 03:28:28,165 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 03:28:28,165 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-30 03:28:28,166 INFO L409 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-01-30 03:28:28,173 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-01-30 03:28:28,174 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-30 03:28:28,175 INFO L87 Difference]: Start difference. First operand 37 states. Second operand 2 states. [2018-01-30 03:28:28,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:28,188 INFO L93 Difference]: Finished difference Result 63 states and 73 transitions. [2018-01-30 03:28:28,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-01-30 03:28:28,189 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 18 [2018-01-30 03:28:28,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:28,194 INFO L225 Difference]: With dead ends: 63 [2018-01-30 03:28:28,195 INFO L226 Difference]: Without dead ends: 32 [2018-01-30 03:28:28,196 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-30 03:28:28,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-30 03:28:28,216 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-30 03:28:28,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-30 03:28:28,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 35 transitions. [2018-01-30 03:28:28,219 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 35 transitions. Word has length 18 [2018-01-30 03:28:28,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:28,219 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 35 transitions. [2018-01-30 03:28:28,219 INFO L433 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-01-30 03:28:28,219 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 35 transitions. [2018-01-30 03:28:28,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-30 03:28:28,220 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:28,220 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:28,220 INFO L371 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:28,220 INFO L82 PathProgramCache]: Analyzing trace with hash -1247281201, now seen corresponding path program 1 times [2018-01-30 03:28:28,220 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:28,220 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:28,221 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:28,221 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:28:28,221 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:28,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:28,227 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:28,285 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 03:28:28,285 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 03:28:28,285 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-30 03:28:28,286 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-30 03:28:28,286 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-30 03:28:28,287 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-30 03:28:28,287 INFO L87 Difference]: Start difference. First operand 32 states and 35 transitions. Second operand 3 states. [2018-01-30 03:28:28,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:28,407 INFO L93 Difference]: Finished difference Result 62 states and 69 transitions. [2018-01-30 03:28:28,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-30 03:28:28,407 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2018-01-30 03:28:28,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:28,408 INFO L225 Difference]: With dead ends: 62 [2018-01-30 03:28:28,408 INFO L226 Difference]: Without dead ends: 41 [2018-01-30 03:28:28,408 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-30 03:28:28,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-30 03:28:28,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 36. [2018-01-30 03:28:28,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-30 03:28:28,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 39 transitions. [2018-01-30 03:28:28,411 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 39 transitions. Word has length 20 [2018-01-30 03:28:28,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:28,412 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 39 transitions. [2018-01-30 03:28:28,412 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-30 03:28:28,412 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 39 transitions. [2018-01-30 03:28:28,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-30 03:28:28,412 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:28,412 INFO L350 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:28,412 INFO L371 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:28,413 INFO L82 PathProgramCache]: Analyzing trace with hash 1021946099, now seen corresponding path program 1 times [2018-01-30 03:28:28,413 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:28,413 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:28,413 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:28,413 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:28:28,414 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:28,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:28,422 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:28,478 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-30 03:28:28,478 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:28,478 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:28,496 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:28:28,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:28,530 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:28,541 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-30 03:28:28,558 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:28,558 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-01-30 03:28:28,558 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-30 03:28:28,558 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-30 03:28:28,558 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-01-30 03:28:28,559 INFO L87 Difference]: Start difference. First operand 36 states and 39 transitions. Second operand 4 states. [2018-01-30 03:28:28,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:28,702 INFO L93 Difference]: Finished difference Result 68 states and 74 transitions. [2018-01-30 03:28:28,702 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-30 03:28:28,702 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2018-01-30 03:28:28,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:28,702 INFO L225 Difference]: With dead ends: 68 [2018-01-30 03:28:28,703 INFO L226 Difference]: Without dead ends: 45 [2018-01-30 03:28:28,703 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-01-30 03:28:28,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-30 03:28:28,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 40. [2018-01-30 03:28:28,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-30 03:28:28,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 43 transitions. [2018-01-30 03:28:28,707 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 43 transitions. Word has length 30 [2018-01-30 03:28:28,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:28,707 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 43 transitions. [2018-01-30 03:28:28,707 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-30 03:28:28,707 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 43 transitions. [2018-01-30 03:28:28,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-30 03:28:28,708 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:28,708 INFO L350 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:28,708 INFO L371 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:28,708 INFO L82 PathProgramCache]: Analyzing trace with hash 1178187021, now seen corresponding path program 2 times [2018-01-30 03:28:28,708 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:28,708 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:28,709 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:28,709 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:28:28,709 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:28,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:28,717 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:28,863 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-30 03:28:28,863 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:28,863 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:28,873 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 03:28:28,879 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:28,883 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:28,888 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:28,889 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:28,893 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-30 03:28:28,909 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:28,909 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-01-30 03:28:28,910 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-30 03:28:28,910 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-30 03:28:28,910 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-01-30 03:28:28,910 INFO L87 Difference]: Start difference. First operand 40 states and 43 transitions. Second operand 5 states. [2018-01-30 03:28:28,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:28,960 INFO L93 Difference]: Finished difference Result 72 states and 78 transitions. [2018-01-30 03:28:28,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-30 03:28:28,960 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2018-01-30 03:28:28,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:28,961 INFO L225 Difference]: With dead ends: 72 [2018-01-30 03:28:28,961 INFO L226 Difference]: Without dead ends: 49 [2018-01-30 03:28:28,961 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-01-30 03:28:28,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-30 03:28:28,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 44. [2018-01-30 03:28:28,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-30 03:28:28,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 47 transitions. [2018-01-30 03:28:28,965 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 47 transitions. Word has length 34 [2018-01-30 03:28:28,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:28,965 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 47 transitions. [2018-01-30 03:28:28,965 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-30 03:28:28,965 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 47 transitions. [2018-01-30 03:28:28,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-30 03:28:28,965 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:28,965 INFO L350 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:28,966 INFO L371 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:28,966 INFO L82 PathProgramCache]: Analyzing trace with hash -770563033, now seen corresponding path program 3 times [2018-01-30 03:28:28,966 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:28,966 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:28,966 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:28,966 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:28,967 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:28,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:28,974 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:29,036 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-30 03:28:29,036 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:29,036 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:29,049 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-30 03:28:29,056 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:29,064 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:29,073 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:29,075 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:29,110 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-01-30 03:28:29,126 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:29,127 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5] total 7 [2018-01-30 03:28:29,127 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-30 03:28:29,127 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-30 03:28:29,127 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-01-30 03:28:29,127 INFO L87 Difference]: Start difference. First operand 44 states and 47 transitions. Second operand 7 states. [2018-01-30 03:28:29,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:29,242 INFO L93 Difference]: Finished difference Result 82 states and 89 transitions. [2018-01-30 03:28:29,242 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-30 03:28:29,242 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 38 [2018-01-30 03:28:29,242 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:29,243 INFO L225 Difference]: With dead ends: 82 [2018-01-30 03:28:29,243 INFO L226 Difference]: Without dead ends: 59 [2018-01-30 03:28:29,243 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 38 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=41, Unknown=0, NotChecked=0, Total=72 [2018-01-30 03:28:29,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-01-30 03:28:29,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 54. [2018-01-30 03:28:29,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-30 03:28:29,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 57 transitions. [2018-01-30 03:28:29,247 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 57 transitions. Word has length 38 [2018-01-30 03:28:29,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:29,247 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 57 transitions. [2018-01-30 03:28:29,247 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-30 03:28:29,247 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 57 transitions. [2018-01-30 03:28:29,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-30 03:28:29,249 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:29,249 INFO L350 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:29,249 INFO L371 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:29,249 INFO L82 PathProgramCache]: Analyzing trace with hash -758982453, now seen corresponding path program 4 times [2018-01-30 03:28:29,249 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:29,249 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:29,250 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:29,250 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:29,250 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:29,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:29,258 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:29,322 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-30 03:28:29,322 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:29,322 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:29,330 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-30 03:28:29,343 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:29,344 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:29,348 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-30 03:28:29,364 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:29,365 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2018-01-30 03:28:29,365 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-30 03:28:29,365 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-30 03:28:29,365 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-01-30 03:28:29,365 INFO L87 Difference]: Start difference. First operand 54 states and 57 transitions. Second operand 7 states. [2018-01-30 03:28:29,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:29,575 INFO L93 Difference]: Finished difference Result 89 states and 95 transitions. [2018-01-30 03:28:29,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-30 03:28:29,576 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 48 [2018-01-30 03:28:29,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:29,577 INFO L225 Difference]: With dead ends: 89 [2018-01-30 03:28:29,577 INFO L226 Difference]: Without dead ends: 60 [2018-01-30 03:28:29,577 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-01-30 03:28:29,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-01-30 03:28:29,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 58. [2018-01-30 03:28:29,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-01-30 03:28:29,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 61 transitions. [2018-01-30 03:28:29,580 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 61 transitions. Word has length 48 [2018-01-30 03:28:29,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:29,580 INFO L432 AbstractCegarLoop]: Abstraction has 58 states and 61 transitions. [2018-01-30 03:28:29,580 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-30 03:28:29,580 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 61 transitions. [2018-01-30 03:28:29,581 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-30 03:28:29,581 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:29,581 INFO L350 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:29,581 INFO L371 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:29,581 INFO L82 PathProgramCache]: Analyzing trace with hash 133550693, now seen corresponding path program 5 times [2018-01-30 03:28:29,581 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:29,581 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:29,583 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:29,583 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:29,583 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:29,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:29,597 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:29,674 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-30 03:28:29,674 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:29,674 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:29,679 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-30 03:28:29,682 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:29,683 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:29,683 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:29,685 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:29,689 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:29,691 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:29,699 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:29,701 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:29,715 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-01-30 03:28:29,731 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:29,731 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 10 [2018-01-30 03:28:29,732 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-30 03:28:29,732 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-30 03:28:29,732 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-30 03:28:29,732 INFO L87 Difference]: Start difference. First operand 58 states and 61 transitions. Second operand 10 states. [2018-01-30 03:28:29,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:29,972 INFO L93 Difference]: Finished difference Result 102 states and 109 transitions. [2018-01-30 03:28:29,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-30 03:28:29,972 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 52 [2018-01-30 03:28:29,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:29,973 INFO L225 Difference]: With dead ends: 102 [2018-01-30 03:28:29,973 INFO L226 Difference]: Without dead ends: 73 [2018-01-30 03:28:29,973 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 51 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=109, Unknown=0, NotChecked=0, Total=182 [2018-01-30 03:28:29,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-01-30 03:28:29,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 68. [2018-01-30 03:28:29,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-01-30 03:28:29,978 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 71 transitions. [2018-01-30 03:28:29,978 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 71 transitions. Word has length 52 [2018-01-30 03:28:29,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:29,978 INFO L432 AbstractCegarLoop]: Abstraction has 68 states and 71 transitions. [2018-01-30 03:28:29,978 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-30 03:28:29,978 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 71 transitions. [2018-01-30 03:28:29,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-01-30 03:28:29,979 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:29,979 INFO L350 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:29,979 INFO L371 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:29,979 INFO L82 PathProgramCache]: Analyzing trace with hash 436062985, now seen corresponding path program 6 times [2018-01-30 03:28:29,979 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:29,979 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:29,980 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:29,980 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:29,980 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:29,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:29,987 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:30,043 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-30 03:28:30,043 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:30,043 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:30,054 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-30 03:28:30,078 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:30,079 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:30,080 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:30,085 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:30,092 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:30,093 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:30,095 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:30,099 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:30,100 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:30,105 INFO L134 CoverageAnalysis]: Checked inductivity of 96 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-30 03:28:30,124 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:30,124 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 9 [2018-01-30 03:28:30,124 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-30 03:28:30,124 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-30 03:28:30,124 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-01-30 03:28:30,125 INFO L87 Difference]: Start difference. First operand 68 states and 71 transitions. Second operand 9 states. [2018-01-30 03:28:30,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:30,195 INFO L93 Difference]: Finished difference Result 109 states and 115 transitions. [2018-01-30 03:28:30,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-30 03:28:30,195 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 62 [2018-01-30 03:28:30,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:30,195 INFO L225 Difference]: With dead ends: 109 [2018-01-30 03:28:30,196 INFO L226 Difference]: Without dead ends: 74 [2018-01-30 03:28:30,196 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-01-30 03:28:30,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states. [2018-01-30 03:28:30,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 72. [2018-01-30 03:28:30,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 72 states. [2018-01-30 03:28:30,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72 states to 72 states and 75 transitions. [2018-01-30 03:28:30,199 INFO L78 Accepts]: Start accepts. Automaton has 72 states and 75 transitions. Word has length 62 [2018-01-30 03:28:30,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:30,199 INFO L432 AbstractCegarLoop]: Abstraction has 72 states and 75 transitions. [2018-01-30 03:28:30,199 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-30 03:28:30,199 INFO L276 IsEmpty]: Start isEmpty. Operand 72 states and 75 transitions. [2018-01-30 03:28:30,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-01-30 03:28:30,200 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:30,200 INFO L350 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:30,200 INFO L371 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:30,200 INFO L82 PathProgramCache]: Analyzing trace with hash -939069661, now seen corresponding path program 7 times [2018-01-30 03:28:30,200 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:30,200 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:30,201 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:30,201 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:30,201 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:30,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:30,208 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:30,620 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-30 03:28:30,620 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:30,620 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:30,631 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:28:30,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:30,645 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:30,650 INFO L134 CoverageAnalysis]: Checked inductivity of 122 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-30 03:28:30,667 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:30,667 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 10 [2018-01-30 03:28:30,667 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-30 03:28:30,667 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-30 03:28:30,668 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-01-30 03:28:30,668 INFO L87 Difference]: Start difference. First operand 72 states and 75 transitions. Second operand 10 states. [2018-01-30 03:28:30,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:30,721 INFO L93 Difference]: Finished difference Result 113 states and 119 transitions. [2018-01-30 03:28:30,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-30 03:28:30,721 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2018-01-30 03:28:30,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:30,722 INFO L225 Difference]: With dead ends: 113 [2018-01-30 03:28:30,722 INFO L226 Difference]: Without dead ends: 78 [2018-01-30 03:28:30,722 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 67 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-01-30 03:28:30,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-01-30 03:28:30,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 76. [2018-01-30 03:28:30,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-01-30 03:28:30,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 79 transitions. [2018-01-30 03:28:30,725 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 79 transitions. Word has length 66 [2018-01-30 03:28:30,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:30,725 INFO L432 AbstractCegarLoop]: Abstraction has 76 states and 79 transitions. [2018-01-30 03:28:30,725 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-30 03:28:30,726 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 79 transitions. [2018-01-30 03:28:30,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-01-30 03:28:30,726 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:30,726 INFO L350 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:30,726 INFO L371 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:30,726 INFO L82 PathProgramCache]: Analyzing trace with hash 1179416125, now seen corresponding path program 8 times [2018-01-30 03:28:30,726 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:30,726 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:30,727 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:30,727 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:28:30,727 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:30,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:30,736 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:30,819 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-30 03:28:30,819 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:30,819 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:30,826 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 03:28:30,834 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:30,843 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:30,844 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:30,845 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:30,852 INFO L134 CoverageAnalysis]: Checked inductivity of 152 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-30 03:28:30,869 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:30,869 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-01-30 03:28:30,869 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-30 03:28:30,869 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-30 03:28:30,869 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-01-30 03:28:30,869 INFO L87 Difference]: Start difference. First operand 76 states and 79 transitions. Second operand 11 states. [2018-01-30 03:28:30,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:30,991 INFO L93 Difference]: Finished difference Result 117 states and 123 transitions. [2018-01-30 03:28:30,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-30 03:28:30,992 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 70 [2018-01-30 03:28:30,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:30,992 INFO L225 Difference]: With dead ends: 117 [2018-01-30 03:28:30,992 INFO L226 Difference]: Without dead ends: 82 [2018-01-30 03:28:30,992 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 71 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-01-30 03:28:30,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-01-30 03:28:30,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 80. [2018-01-30 03:28:30,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-01-30 03:28:30,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 83 transitions. [2018-01-30 03:28:30,996 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 83 transitions. Word has length 70 [2018-01-30 03:28:30,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:30,996 INFO L432 AbstractCegarLoop]: Abstraction has 80 states and 83 transitions. [2018-01-30 03:28:30,996 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-30 03:28:30,996 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 83 transitions. [2018-01-30 03:28:30,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-01-30 03:28:30,997 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:30,997 INFO L350 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 4, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:30,997 INFO L371 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:30,997 INFO L82 PathProgramCache]: Analyzing trace with hash -1981489065, now seen corresponding path program 9 times [2018-01-30 03:28:30,997 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:30,997 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:30,997 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:30,997 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:30,998 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:31,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:31,005 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:31,088 INFO L134 CoverageAnalysis]: Checked inductivity of 186 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-30 03:28:31,088 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:31,088 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:31,095 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-30 03:28:31,107 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:31,111 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:31,112 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:31,128 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:31,138 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:31,139 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:31,174 INFO L134 CoverageAnalysis]: Checked inductivity of 186 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-01-30 03:28:31,191 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:31,191 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9] total 15 [2018-01-30 03:28:31,191 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-30 03:28:31,192 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-30 03:28:31,192 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=135, Unknown=0, NotChecked=0, Total=210 [2018-01-30 03:28:31,192 INFO L87 Difference]: Start difference. First operand 80 states and 83 transitions. Second operand 15 states. [2018-01-30 03:28:31,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:31,309 INFO L93 Difference]: Finished difference Result 130 states and 137 transitions. [2018-01-30 03:28:31,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-30 03:28:31,309 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 74 [2018-01-30 03:28:31,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:31,310 INFO L225 Difference]: With dead ends: 130 [2018-01-30 03:28:31,310 INFO L226 Difference]: Without dead ends: 95 [2018-01-30 03:28:31,310 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 72 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=165, Invalid=255, Unknown=0, NotChecked=0, Total=420 [2018-01-30 03:28:31,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-01-30 03:28:31,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 90. [2018-01-30 03:28:31,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-01-30 03:28:31,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 93 transitions. [2018-01-30 03:28:31,313 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 93 transitions. Word has length 74 [2018-01-30 03:28:31,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:31,313 INFO L432 AbstractCegarLoop]: Abstraction has 90 states and 93 transitions. [2018-01-30 03:28:31,313 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-30 03:28:31,313 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 93 transitions. [2018-01-30 03:28:31,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-01-30 03:28:31,315 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:31,315 INFO L350 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:31,315 INFO L371 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:31,315 INFO L82 PathProgramCache]: Analyzing trace with hash 1946545147, now seen corresponding path program 10 times [2018-01-30 03:28:31,315 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:31,315 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:31,316 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:31,316 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:31,316 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:31,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:31,322 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:31,449 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-01-30 03:28:31,449 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:31,449 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:31,458 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-30 03:28:31,491 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:31,496 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:31,511 INFO L134 CoverageAnalysis]: Checked inductivity of 244 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-01-30 03:28:31,531 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:31,531 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 13 [2018-01-30 03:28:31,532 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-30 03:28:31,532 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-30 03:28:31,532 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-01-30 03:28:31,532 INFO L87 Difference]: Start difference. First operand 90 states and 93 transitions. Second operand 13 states. [2018-01-30 03:28:31,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:31,731 INFO L93 Difference]: Finished difference Result 137 states and 143 transitions. [2018-01-30 03:28:31,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-30 03:28:31,731 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 84 [2018-01-30 03:28:31,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:31,732 INFO L225 Difference]: With dead ends: 137 [2018-01-30 03:28:31,732 INFO L226 Difference]: Without dead ends: 96 [2018-01-30 03:28:31,732 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 85 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-01-30 03:28:31,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-01-30 03:28:31,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 94. [2018-01-30 03:28:31,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-01-30 03:28:31,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 97 transitions. [2018-01-30 03:28:31,735 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 97 transitions. Word has length 84 [2018-01-30 03:28:31,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:31,735 INFO L432 AbstractCegarLoop]: Abstraction has 94 states and 97 transitions. [2018-01-30 03:28:31,735 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-30 03:28:31,735 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 97 transitions. [2018-01-30 03:28:31,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-30 03:28:31,736 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:31,736 INFO L350 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:31,736 INFO L371 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:31,736 INFO L82 PathProgramCache]: Analyzing trace with hash -2014994283, now seen corresponding path program 11 times [2018-01-30 03:28:31,736 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:31,736 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:31,737 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:31,737 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:31,737 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:31,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:31,743 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:31,845 INFO L134 CoverageAnalysis]: Checked inductivity of 286 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-01-30 03:28:31,846 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:31,846 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:31,851 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-30 03:28:31,854 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:31,865 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:31,875 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:31,884 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:31,889 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:31,890 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:31,891 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:31,893 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:31,894 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:31,896 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:31,898 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:31,902 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:31,902 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:31,904 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:31,911 INFO L134 CoverageAnalysis]: Checked inductivity of 286 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-01-30 03:28:31,928 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:31,928 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 14 [2018-01-30 03:28:31,928 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-30 03:28:31,928 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-30 03:28:31,928 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-01-30 03:28:31,928 INFO L87 Difference]: Start difference. First operand 94 states and 97 transitions. Second operand 14 states. [2018-01-30 03:28:32,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:32,022 INFO L93 Difference]: Finished difference Result 141 states and 147 transitions. [2018-01-30 03:28:32,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-30 03:28:32,023 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 88 [2018-01-30 03:28:32,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:32,023 INFO L225 Difference]: With dead ends: 141 [2018-01-30 03:28:32,023 INFO L226 Difference]: Without dead ends: 100 [2018-01-30 03:28:32,024 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-01-30 03:28:32,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-01-30 03:28:32,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 98. [2018-01-30 03:28:32,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-01-30 03:28:32,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 101 transitions. [2018-01-30 03:28:32,026 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 101 transitions. Word has length 88 [2018-01-30 03:28:32,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:32,026 INFO L432 AbstractCegarLoop]: Abstraction has 98 states and 101 transitions. [2018-01-30 03:28:32,026 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-30 03:28:32,026 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 101 transitions. [2018-01-30 03:28:32,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-01-30 03:28:32,027 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:32,027 INFO L350 BasicCegarLoop]: trace histogram [13, 12, 12, 12, 5, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:32,027 INFO L371 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:32,027 INFO L82 PathProgramCache]: Analyzing trace with hash -2059044817, now seen corresponding path program 12 times [2018-01-30 03:28:32,027 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:32,027 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:32,028 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:32,028 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:32,028 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:32,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:32,035 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:32,146 INFO L134 CoverageAnalysis]: Checked inductivity of 332 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-01-30 03:28:32,146 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:32,146 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:32,151 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-30 03:28:32,155 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:32,157 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:32,158 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:32,159 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:32,160 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:32,161 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:32,162 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:32,163 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:32,165 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:32,165 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:32,166 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:32,205 INFO L134 CoverageAnalysis]: Checked inductivity of 332 backedges. 0 proven. 44 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-30 03:28:32,221 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:32,221 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 11] total 19 [2018-01-30 03:28:32,222 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-30 03:28:32,222 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-30 03:28:32,222 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=223, Unknown=0, NotChecked=0, Total=342 [2018-01-30 03:28:32,222 INFO L87 Difference]: Start difference. First operand 98 states and 101 transitions. Second operand 19 states. [2018-01-30 03:28:32,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:32,383 INFO L93 Difference]: Finished difference Result 154 states and 161 transitions. [2018-01-30 03:28:32,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-30 03:28:32,389 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 92 [2018-01-30 03:28:32,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:32,390 INFO L225 Difference]: With dead ends: 154 [2018-01-30 03:28:32,390 INFO L226 Difference]: Without dead ends: 113 [2018-01-30 03:28:32,391 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=271, Invalid=431, Unknown=0, NotChecked=0, Total=702 [2018-01-30 03:28:32,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-01-30 03:28:32,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 108. [2018-01-30 03:28:32,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-01-30 03:28:32,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 111 transitions. [2018-01-30 03:28:32,393 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 111 transitions. Word has length 92 [2018-01-30 03:28:32,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:32,393 INFO L432 AbstractCegarLoop]: Abstraction has 108 states and 111 transitions. [2018-01-30 03:28:32,393 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-30 03:28:32,393 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 111 transitions. [2018-01-30 03:28:32,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-01-30 03:28:32,394 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:32,394 INFO L350 BasicCegarLoop]: trace histogram [14, 13, 13, 13, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:32,394 INFO L371 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:32,394 INFO L82 PathProgramCache]: Analyzing trace with hash 370659155, now seen corresponding path program 13 times [2018-01-30 03:28:32,394 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:32,394 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:32,395 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:32,395 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:32,395 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:32,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:32,401 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:32,577 INFO L134 CoverageAnalysis]: Checked inductivity of 408 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-01-30 03:28:32,577 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:32,578 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:32,583 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:28:32,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:32,600 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:32,610 INFO L134 CoverageAnalysis]: Checked inductivity of 408 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-01-30 03:28:32,627 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:32,627 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 16 [2018-01-30 03:28:32,627 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-30 03:28:32,627 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-30 03:28:32,627 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-01-30 03:28:32,627 INFO L87 Difference]: Start difference. First operand 108 states and 111 transitions. Second operand 16 states. [2018-01-30 03:28:32,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:32,701 INFO L93 Difference]: Finished difference Result 161 states and 167 transitions. [2018-01-30 03:28:32,702 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-30 03:28:32,703 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 102 [2018-01-30 03:28:32,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:32,703 INFO L225 Difference]: With dead ends: 161 [2018-01-30 03:28:32,703 INFO L226 Difference]: Without dead ends: 114 [2018-01-30 03:28:32,703 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 103 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-01-30 03:28:32,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-01-30 03:28:32,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 112. [2018-01-30 03:28:32,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-01-30 03:28:32,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 115 transitions. [2018-01-30 03:28:32,706 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 115 transitions. Word has length 102 [2018-01-30 03:28:32,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:32,706 INFO L432 AbstractCegarLoop]: Abstraction has 112 states and 115 transitions. [2018-01-30 03:28:32,707 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-30 03:28:32,707 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 115 transitions. [2018-01-30 03:28:32,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-01-30 03:28:32,710 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:32,710 INFO L350 BasicCegarLoop]: trace histogram [15, 14, 14, 14, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:32,710 INFO L371 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:32,710 INFO L82 PathProgramCache]: Analyzing trace with hash 359747949, now seen corresponding path program 14 times [2018-01-30 03:28:32,710 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:32,710 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:32,711 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:32,711 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:28:32,711 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:32,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:32,717 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:32,865 INFO L134 CoverageAnalysis]: Checked inductivity of 462 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-01-30 03:28:32,865 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:32,865 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:32,870 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 03:28:32,875 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:32,881 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:32,883 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:32,884 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:32,893 INFO L134 CoverageAnalysis]: Checked inductivity of 462 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-01-30 03:28:32,925 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:32,925 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 17 [2018-01-30 03:28:32,925 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-30 03:28:32,925 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-30 03:28:32,925 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2018-01-30 03:28:32,925 INFO L87 Difference]: Start difference. First operand 112 states and 115 transitions. Second operand 17 states. [2018-01-30 03:28:33,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:33,221 INFO L93 Difference]: Finished difference Result 165 states and 171 transitions. [2018-01-30 03:28:33,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-30 03:28:33,221 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 106 [2018-01-30 03:28:33,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:33,222 INFO L225 Difference]: With dead ends: 165 [2018-01-30 03:28:33,222 INFO L226 Difference]: Without dead ends: 118 [2018-01-30 03:28:33,222 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 107 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2018-01-30 03:28:33,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-01-30 03:28:33,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 116. [2018-01-30 03:28:33,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-01-30 03:28:33,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 119 transitions. [2018-01-30 03:28:33,229 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 119 transitions. Word has length 106 [2018-01-30 03:28:33,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:33,229 INFO L432 AbstractCegarLoop]: Abstraction has 116 states and 119 transitions. [2018-01-30 03:28:33,229 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-30 03:28:33,229 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 119 transitions. [2018-01-30 03:28:33,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-01-30 03:28:33,229 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:33,229 INFO L350 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 6, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:33,230 INFO L371 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:33,230 INFO L82 PathProgramCache]: Analyzing trace with hash -374851961, now seen corresponding path program 15 times [2018-01-30 03:28:33,230 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:33,230 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:33,230 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:33,230 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:33,230 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:33,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:33,240 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:33,362 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-01-30 03:28:33,362 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:33,362 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:33,367 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-30 03:28:33,372 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:33,373 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:33,374 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:33,376 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:33,377 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:33,378 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:33,379 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:33,380 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:33,418 INFO L134 CoverageAnalysis]: Checked inductivity of 520 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 450 trivial. 0 not checked. [2018-01-30 03:28:33,435 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:33,435 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 13] total 23 [2018-01-30 03:28:33,436 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-30 03:28:33,436 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-30 03:28:33,436 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=333, Unknown=0, NotChecked=0, Total=506 [2018-01-30 03:28:33,436 INFO L87 Difference]: Start difference. First operand 116 states and 119 transitions. Second operand 23 states. [2018-01-30 03:28:33,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:33,637 INFO L93 Difference]: Finished difference Result 178 states and 185 transitions. [2018-01-30 03:28:33,638 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-30 03:28:33,638 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 110 [2018-01-30 03:28:33,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:33,638 INFO L225 Difference]: With dead ends: 178 [2018-01-30 03:28:33,638 INFO L226 Difference]: Without dead ends: 131 [2018-01-30 03:28:33,639 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 106 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=403, Invalid=653, Unknown=0, NotChecked=0, Total=1056 [2018-01-30 03:28:33,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-30 03:28:33,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 126. [2018-01-30 03:28:33,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-01-30 03:28:33,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 129 transitions. [2018-01-30 03:28:33,641 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 129 transitions. Word has length 110 [2018-01-30 03:28:33,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:33,641 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 129 transitions. [2018-01-30 03:28:33,641 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-30 03:28:33,641 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 129 transitions. [2018-01-30 03:28:33,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-01-30 03:28:33,642 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:33,642 INFO L350 BasicCegarLoop]: trace histogram [17, 16, 16, 16, 7, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:33,642 INFO L371 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:33,642 INFO L82 PathProgramCache]: Analyzing trace with hash -1113810645, now seen corresponding path program 16 times [2018-01-30 03:28:33,642 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:33,642 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:33,643 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:33,643 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:33,643 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:33,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:33,649 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:33,785 INFO L134 CoverageAnalysis]: Checked inductivity of 614 backedges. 0 proven. 512 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2018-01-30 03:28:33,785 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:33,785 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:33,793 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-30 03:28:33,825 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:33,826 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:33,841 INFO L134 CoverageAnalysis]: Checked inductivity of 614 backedges. 0 proven. 512 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2018-01-30 03:28:33,858 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:33,858 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 19 [2018-01-30 03:28:33,858 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-30 03:28:33,858 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-30 03:28:33,858 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-01-30 03:28:33,858 INFO L87 Difference]: Start difference. First operand 126 states and 129 transitions. Second operand 19 states. [2018-01-30 03:28:33,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:33,961 INFO L93 Difference]: Finished difference Result 185 states and 191 transitions. [2018-01-30 03:28:33,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-30 03:28:33,975 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 120 [2018-01-30 03:28:33,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:33,975 INFO L225 Difference]: With dead ends: 185 [2018-01-30 03:28:33,975 INFO L226 Difference]: Without dead ends: 132 [2018-01-30 03:28:33,976 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 121 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-01-30 03:28:33,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-01-30 03:28:33,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 130. [2018-01-30 03:28:33,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-01-30 03:28:33,977 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 133 transitions. [2018-01-30 03:28:33,978 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 133 transitions. Word has length 120 [2018-01-30 03:28:33,978 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:33,978 INFO L432 AbstractCegarLoop]: Abstraction has 130 states and 133 transitions. [2018-01-30 03:28:33,978 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-30 03:28:33,978 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 133 transitions. [2018-01-30 03:28:33,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-01-30 03:28:33,978 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:33,978 INFO L350 BasicCegarLoop]: trace histogram [18, 17, 17, 17, 7, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:33,978 INFO L371 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:33,978 INFO L82 PathProgramCache]: Analyzing trace with hash 1638369477, now seen corresponding path program 17 times [2018-01-30 03:28:33,978 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:33,979 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:33,979 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:33,979 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:33,979 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:33,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:33,990 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:34,106 INFO L134 CoverageAnalysis]: Checked inductivity of 680 backedges. 0 proven. 578 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2018-01-30 03:28:34,107 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:34,107 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:34,118 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-30 03:28:34,122 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,122 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,123 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,124 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,125 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,131 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,132 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,133 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,135 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,136 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,138 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,140 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,142 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,144 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,147 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,150 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,154 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,161 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:34,161 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:34,163 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:34,215 INFO L134 CoverageAnalysis]: Checked inductivity of 680 backedges. 0 proven. 102 refuted. 0 times theorem prover too weak. 578 trivial. 0 not checked. [2018-01-30 03:28:34,232 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:34,232 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 15] total 26 [2018-01-30 03:28:34,232 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-30 03:28:34,232 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-30 03:28:34,232 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=217, Invalid=433, Unknown=0, NotChecked=0, Total=650 [2018-01-30 03:28:34,233 INFO L87 Difference]: Start difference. First operand 130 states and 133 transitions. Second operand 26 states. [2018-01-30 03:28:34,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:34,416 INFO L93 Difference]: Finished difference Result 198 states and 205 transitions. [2018-01-30 03:28:34,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-30 03:28:34,417 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 124 [2018-01-30 03:28:34,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:34,418 INFO L225 Difference]: With dead ends: 198 [2018-01-30 03:28:34,418 INFO L226 Difference]: Without dead ends: 145 [2018-01-30 03:28:34,418 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 119 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 168 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=529, Invalid=877, Unknown=0, NotChecked=0, Total=1406 [2018-01-30 03:28:34,418 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-01-30 03:28:34,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 140. [2018-01-30 03:28:34,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-01-30 03:28:34,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 143 transitions. [2018-01-30 03:28:34,421 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 143 transitions. Word has length 124 [2018-01-30 03:28:34,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:34,421 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 143 transitions. [2018-01-30 03:28:34,421 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-30 03:28:34,421 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 143 transitions. [2018-01-30 03:28:34,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-01-30 03:28:34,422 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:34,422 INFO L350 BasicCegarLoop]: trace histogram [19, 18, 18, 18, 8, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:34,422 INFO L371 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:34,422 INFO L82 PathProgramCache]: Analyzing trace with hash 21081961, now seen corresponding path program 18 times [2018-01-30 03:28:34,422 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:34,422 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:34,422 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:34,423 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:34,423 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:34,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:34,428 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:34,629 INFO L134 CoverageAnalysis]: Checked inductivity of 788 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 140 trivial. 0 not checked. [2018-01-30 03:28:34,629 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:34,629 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:34,634 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-30 03:28:34,638 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:34,639 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:34,640 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:34,641 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:34,642 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:34,643 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:34,644 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:34,651 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:34,660 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:34,672 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:34,679 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:34,686 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:34,688 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:34,690 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:34,692 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:34,692 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:34,694 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:34,774 INFO L134 CoverageAnalysis]: Checked inductivity of 788 backedges. 0 proven. 140 refuted. 0 times theorem prover too weak. 648 trivial. 0 not checked. [2018-01-30 03:28:34,793 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:34,793 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 17] total 28 [2018-01-30 03:28:34,793 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-30 03:28:34,793 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-30 03:28:34,794 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=245, Invalid=511, Unknown=0, NotChecked=0, Total=756 [2018-01-30 03:28:34,794 INFO L87 Difference]: Start difference. First operand 140 states and 143 transitions. Second operand 28 states. [2018-01-30 03:28:34,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:34,999 INFO L93 Difference]: Finished difference Result 214 states and 221 transitions. [2018-01-30 03:28:34,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-30 03:28:34,999 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 134 [2018-01-30 03:28:34,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:34,999 INFO L225 Difference]: With dead ends: 214 [2018-01-30 03:28:34,999 INFO L226 Difference]: Without dead ends: 155 [2018-01-30 03:28:35,000 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 128 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 217 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=637, Invalid=1085, Unknown=0, NotChecked=0, Total=1722 [2018-01-30 03:28:35,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2018-01-30 03:28:35,001 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 150. [2018-01-30 03:28:35,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-01-30 03:28:35,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 153 transitions. [2018-01-30 03:28:35,002 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 153 transitions. Word has length 134 [2018-01-30 03:28:35,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:35,002 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 153 transitions. [2018-01-30 03:28:35,002 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-30 03:28:35,002 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 153 transitions. [2018-01-30 03:28:35,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2018-01-30 03:28:35,003 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:35,003 INFO L350 BasicCegarLoop]: trace histogram [20, 19, 19, 19, 9, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:35,003 INFO L371 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:35,003 INFO L82 PathProgramCache]: Analyzing trace with hash -35212659, now seen corresponding path program 19 times [2018-01-30 03:28:35,003 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:35,003 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:35,003 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:35,003 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:35,004 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:35,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:35,009 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:35,209 INFO L134 CoverageAnalysis]: Checked inductivity of 906 backedges. 0 proven. 722 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2018-01-30 03:28:35,209 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:35,209 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:35,213 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:28:35,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:35,227 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:35,239 INFO L134 CoverageAnalysis]: Checked inductivity of 906 backedges. 0 proven. 722 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2018-01-30 03:28:35,255 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:35,256 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 22 [2018-01-30 03:28:35,256 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-30 03:28:35,256 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-30 03:28:35,256 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-01-30 03:28:35,256 INFO L87 Difference]: Start difference. First operand 150 states and 153 transitions. Second operand 22 states. [2018-01-30 03:28:35,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:35,323 INFO L93 Difference]: Finished difference Result 221 states and 227 transitions. [2018-01-30 03:28:35,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-30 03:28:35,324 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 144 [2018-01-30 03:28:35,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:35,324 INFO L225 Difference]: With dead ends: 221 [2018-01-30 03:28:35,324 INFO L226 Difference]: Without dead ends: 156 [2018-01-30 03:28:35,325 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 145 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-01-30 03:28:35,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-01-30 03:28:35,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 154. [2018-01-30 03:28:35,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-01-30 03:28:35,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 157 transitions. [2018-01-30 03:28:35,327 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 157 transitions. Word has length 144 [2018-01-30 03:28:35,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:35,327 INFO L432 AbstractCegarLoop]: Abstraction has 154 states and 157 transitions. [2018-01-30 03:28:35,327 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-30 03:28:35,327 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 157 transitions. [2018-01-30 03:28:35,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2018-01-30 03:28:35,328 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:35,328 INFO L350 BasicCegarLoop]: trace histogram [21, 20, 20, 20, 9, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:35,328 INFO L371 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:35,328 INFO L82 PathProgramCache]: Analyzing trace with hash 1088615463, now seen corresponding path program 20 times [2018-01-30 03:28:35,328 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:35,328 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:35,328 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:35,328 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:28:35,328 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:35,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:35,334 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:35,836 INFO L134 CoverageAnalysis]: Checked inductivity of 984 backedges. 0 proven. 800 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2018-01-30 03:28:35,836 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:35,836 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:35,844 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 03:28:35,848 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:35,864 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:35,875 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:35,876 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:35,889 INFO L134 CoverageAnalysis]: Checked inductivity of 984 backedges. 0 proven. 800 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2018-01-30 03:28:35,905 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:35,906 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 23 [2018-01-30 03:28:35,906 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-30 03:28:35,906 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-30 03:28:35,906 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=253, Unknown=0, NotChecked=0, Total=506 [2018-01-30 03:28:35,906 INFO L87 Difference]: Start difference. First operand 154 states and 157 transitions. Second operand 23 states. [2018-01-30 03:28:35,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:35,986 INFO L93 Difference]: Finished difference Result 225 states and 231 transitions. [2018-01-30 03:28:35,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-30 03:28:35,986 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 148 [2018-01-30 03:28:35,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:35,987 INFO L225 Difference]: With dead ends: 225 [2018-01-30 03:28:35,987 INFO L226 Difference]: Without dead ends: 160 [2018-01-30 03:28:35,987 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 149 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=253, Invalid=253, Unknown=0, NotChecked=0, Total=506 [2018-01-30 03:28:35,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-01-30 03:28:35,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 158. [2018-01-30 03:28:35,989 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-01-30 03:28:35,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 161 transitions. [2018-01-30 03:28:35,990 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 161 transitions. Word has length 148 [2018-01-30 03:28:35,990 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:35,990 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 161 transitions. [2018-01-30 03:28:35,990 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-30 03:28:35,990 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 161 transitions. [2018-01-30 03:28:35,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-01-30 03:28:35,990 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:35,990 INFO L350 BasicCegarLoop]: trace histogram [22, 21, 21, 21, 9, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:35,990 INFO L371 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:35,990 INFO L82 PathProgramCache]: Analyzing trace with hash 1112594625, now seen corresponding path program 21 times [2018-01-30 03:28:35,991 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:35,991 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:35,993 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:35,993 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:35,993 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:36,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:36,005 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:36,224 INFO L134 CoverageAnalysis]: Checked inductivity of 1066 backedges. 0 proven. 882 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2018-01-30 03:28:36,225 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:36,225 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:36,230 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-30 03:28:36,238 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:36,239 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:36,240 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:36,246 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:36,248 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:36,249 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:36,251 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:36,253 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:36,255 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:36,256 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:36,257 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:36,367 INFO L134 CoverageAnalysis]: Checked inductivity of 1066 backedges. 0 proven. 184 refuted. 0 times theorem prover too weak. 882 trivial. 0 not checked. [2018-01-30 03:28:36,384 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:36,384 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 19] total 32 [2018-01-30 03:28:36,384 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-30 03:28:36,385 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-30 03:28:36,385 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=320, Invalid=672, Unknown=0, NotChecked=0, Total=992 [2018-01-30 03:28:36,385 INFO L87 Difference]: Start difference. First operand 158 states and 161 transitions. Second operand 32 states. [2018-01-30 03:28:36,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:36,838 INFO L93 Difference]: Finished difference Result 238 states and 245 transitions. [2018-01-30 03:28:36,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-30 03:28:36,840 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 152 [2018-01-30 03:28:36,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:36,840 INFO L225 Difference]: With dead ends: 238 [2018-01-30 03:28:36,840 INFO L226 Difference]: Without dead ends: 173 [2018-01-30 03:28:36,841 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 145 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 288 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=832, Invalid=1424, Unknown=0, NotChecked=0, Total=2256 [2018-01-30 03:28:36,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-01-30 03:28:36,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 168. [2018-01-30 03:28:36,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-01-30 03:28:36,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 171 transitions. [2018-01-30 03:28:36,850 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 171 transitions. Word has length 152 [2018-01-30 03:28:36,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:36,850 INFO L432 AbstractCegarLoop]: Abstraction has 168 states and 171 transitions. [2018-01-30 03:28:36,850 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-30 03:28:36,850 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 171 transitions. [2018-01-30 03:28:36,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2018-01-30 03:28:36,850 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:36,850 INFO L350 BasicCegarLoop]: trace histogram [23, 22, 22, 22, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:36,850 INFO L371 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:36,851 INFO L82 PathProgramCache]: Analyzing trace with hash -2012559515, now seen corresponding path program 22 times [2018-01-30 03:28:36,851 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:36,851 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:36,851 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:36,851 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:36,851 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:36,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:36,871 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:37,580 INFO L134 CoverageAnalysis]: Checked inductivity of 1202 backedges. 0 proven. 968 refuted. 0 times theorem prover too weak. 234 trivial. 0 not checked. [2018-01-30 03:28:37,580 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:37,580 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:37,585 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-30 03:28:37,600 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:37,602 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:37,618 INFO L134 CoverageAnalysis]: Checked inductivity of 1202 backedges. 0 proven. 968 refuted. 0 times theorem prover too weak. 234 trivial. 0 not checked. [2018-01-30 03:28:37,634 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:37,635 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 25 [2018-01-30 03:28:37,635 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-30 03:28:37,635 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-30 03:28:37,635 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2018-01-30 03:28:37,635 INFO L87 Difference]: Start difference. First operand 168 states and 171 transitions. Second operand 25 states. [2018-01-30 03:28:38,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:38,136 INFO L93 Difference]: Finished difference Result 245 states and 251 transitions. [2018-01-30 03:28:38,137 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-30 03:28:38,137 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 162 [2018-01-30 03:28:38,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:38,137 INFO L225 Difference]: With dead ends: 245 [2018-01-30 03:28:38,137 INFO L226 Difference]: Without dead ends: 174 [2018-01-30 03:28:38,138 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 163 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2018-01-30 03:28:38,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-01-30 03:28:38,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 172. [2018-01-30 03:28:38,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-01-30 03:28:38,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 175 transitions. [2018-01-30 03:28:38,140 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 175 transitions. Word has length 162 [2018-01-30 03:28:38,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:38,140 INFO L432 AbstractCegarLoop]: Abstraction has 172 states and 175 transitions. [2018-01-30 03:28:38,140 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-30 03:28:38,140 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 175 transitions. [2018-01-30 03:28:38,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2018-01-30 03:28:38,141 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:38,141 INFO L350 BasicCegarLoop]: trace histogram [24, 23, 23, 23, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:38,141 INFO L371 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:38,141 INFO L82 PathProgramCache]: Analyzing trace with hash 2136446591, now seen corresponding path program 23 times [2018-01-30 03:28:38,141 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:38,141 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:38,142 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:38,142 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:38,142 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:38,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:38,148 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:38,561 INFO L134 CoverageAnalysis]: Checked inductivity of 1292 backedges. 0 proven. 1058 refuted. 0 times theorem prover too weak. 234 trivial. 0 not checked. [2018-01-30 03:28:38,561 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:38,561 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:38,566 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-30 03:28:38,570 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,571 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,571 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,572 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,573 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,574 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,574 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,575 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,577 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,578 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,579 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,581 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,583 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,585 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,587 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,590 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,593 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,597 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,601 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,606 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,611 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,617 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,623 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,637 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:38,638 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:38,639 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:38,654 INFO L134 CoverageAnalysis]: Checked inductivity of 1292 backedges. 0 proven. 1058 refuted. 0 times theorem prover too weak. 234 trivial. 0 not checked. [2018-01-30 03:28:38,671 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:38,671 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 26 [2018-01-30 03:28:38,671 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-30 03:28:38,671 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-30 03:28:38,671 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-01-30 03:28:38,671 INFO L87 Difference]: Start difference. First operand 172 states and 175 transitions. Second operand 26 states. [2018-01-30 03:28:38,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:38,741 INFO L93 Difference]: Finished difference Result 249 states and 255 transitions. [2018-01-30 03:28:38,742 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-30 03:28:38,742 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 166 [2018-01-30 03:28:38,742 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:38,742 INFO L225 Difference]: With dead ends: 249 [2018-01-30 03:28:38,742 INFO L226 Difference]: Without dead ends: 178 [2018-01-30 03:28:38,743 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 167 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-01-30 03:28:38,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-01-30 03:28:38,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 176. [2018-01-30 03:28:38,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-30 03:28:38,745 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 179 transitions. [2018-01-30 03:28:38,745 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 179 transitions. Word has length 166 [2018-01-30 03:28:38,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:38,745 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 179 transitions. [2018-01-30 03:28:38,745 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-30 03:28:38,745 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 179 transitions. [2018-01-30 03:28:38,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2018-01-30 03:28:38,745 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:38,745 INFO L350 BasicCegarLoop]: trace histogram [25, 24, 24, 24, 10, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:38,746 INFO L371 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:38,746 INFO L82 PathProgramCache]: Analyzing trace with hash 1460881561, now seen corresponding path program 24 times [2018-01-30 03:28:38,746 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:38,746 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:38,746 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:38,746 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:38,746 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:38,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:38,752 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:39,247 INFO L134 CoverageAnalysis]: Checked inductivity of 1386 backedges. 0 proven. 1152 refuted. 0 times theorem prover too weak. 234 trivial. 0 not checked. [2018-01-30 03:28:39,248 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:39,248 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:39,252 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-30 03:28:39,257 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,258 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,259 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,260 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,264 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,265 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,267 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,268 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,269 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,270 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,272 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,273 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,282 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,284 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,286 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,288 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,291 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,294 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,297 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:39,297 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:39,299 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:39,393 INFO L134 CoverageAnalysis]: Checked inductivity of 1386 backedges. 0 proven. 234 refuted. 0 times theorem prover too weak. 1152 trivial. 0 not checked. [2018-01-30 03:28:39,409 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:39,409 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 21] total 36 [2018-01-30 03:28:39,410 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-30 03:28:39,410 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-30 03:28:39,410 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=405, Invalid=855, Unknown=0, NotChecked=0, Total=1260 [2018-01-30 03:28:39,410 INFO L87 Difference]: Start difference. First operand 176 states and 179 transitions. Second operand 36 states. [2018-01-30 03:28:40,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:40,036 INFO L93 Difference]: Finished difference Result 262 states and 269 transitions. [2018-01-30 03:28:40,037 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-01-30 03:28:40,037 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 170 [2018-01-30 03:28:40,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:40,037 INFO L225 Difference]: With dead ends: 262 [2018-01-30 03:28:40,037 INFO L226 Difference]: Without dead ends: 191 [2018-01-30 03:28:40,038 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 214 GetRequests, 162 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 369 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1053, Invalid=1809, Unknown=0, NotChecked=0, Total=2862 [2018-01-30 03:28:40,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-01-30 03:28:40,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 186. [2018-01-30 03:28:40,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-30 03:28:40,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 189 transitions. [2018-01-30 03:28:40,040 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 189 transitions. Word has length 170 [2018-01-30 03:28:40,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:40,041 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 189 transitions. [2018-01-30 03:28:40,041 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-30 03:28:40,041 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 189 transitions. [2018-01-30 03:28:40,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2018-01-30 03:28:40,041 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:40,041 INFO L350 BasicCegarLoop]: trace histogram [26, 25, 25, 25, 11, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:40,041 INFO L371 AbstractCegarLoop]: === Iteration 27 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:40,041 INFO L82 PathProgramCache]: Analyzing trace with hash -1463098691, now seen corresponding path program 25 times [2018-01-30 03:28:40,041 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:40,041 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:40,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:40,042 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:40,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:40,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:40,048 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:40,336 INFO L134 CoverageAnalysis]: Checked inductivity of 1540 backedges. 0 proven. 1250 refuted. 0 times theorem prover too weak. 290 trivial. 0 not checked. [2018-01-30 03:28:40,336 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:40,336 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:40,342 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:28:40,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:40,370 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:40,386 INFO L134 CoverageAnalysis]: Checked inductivity of 1540 backedges. 0 proven. 1250 refuted. 0 times theorem prover too weak. 290 trivial. 0 not checked. [2018-01-30 03:28:40,402 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:40,402 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28] total 28 [2018-01-30 03:28:40,403 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-30 03:28:40,403 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-30 03:28:40,403 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-01-30 03:28:40,403 INFO L87 Difference]: Start difference. First operand 186 states and 189 transitions. Second operand 28 states. [2018-01-30 03:28:40,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:40,532 INFO L93 Difference]: Finished difference Result 269 states and 275 transitions. [2018-01-30 03:28:40,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-30 03:28:40,532 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 180 [2018-01-30 03:28:40,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:40,533 INFO L225 Difference]: With dead ends: 269 [2018-01-30 03:28:40,533 INFO L226 Difference]: Without dead ends: 192 [2018-01-30 03:28:40,533 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 207 GetRequests, 181 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-01-30 03:28:40,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2018-01-30 03:28:40,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 190. [2018-01-30 03:28:40,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-01-30 03:28:40,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 193 transitions. [2018-01-30 03:28:40,536 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 193 transitions. Word has length 180 [2018-01-30 03:28:40,536 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:40,536 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 193 transitions. [2018-01-30 03:28:40,536 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-30 03:28:40,536 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 193 transitions. [2018-01-30 03:28:40,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2018-01-30 03:28:40,536 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:40,537 INFO L350 BasicCegarLoop]: trace histogram [27, 26, 26, 26, 11, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:40,537 INFO L371 AbstractCegarLoop]: === Iteration 28 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:40,537 INFO L82 PathProgramCache]: Analyzing trace with hash -1922048169, now seen corresponding path program 26 times [2018-01-30 03:28:40,537 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:40,537 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:40,537 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:40,537 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:28:40,537 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:40,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:40,543 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:40,982 INFO L134 CoverageAnalysis]: Checked inductivity of 1642 backedges. 0 proven. 1352 refuted. 0 times theorem prover too weak. 290 trivial. 0 not checked. [2018-01-30 03:28:40,982 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:40,982 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:40,987 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 03:28:40,992 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:41,001 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:41,003 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:41,005 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:41,021 INFO L134 CoverageAnalysis]: Checked inductivity of 1642 backedges. 0 proven. 1352 refuted. 0 times theorem prover too weak. 290 trivial. 0 not checked. [2018-01-30 03:28:41,039 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:41,039 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29] total 29 [2018-01-30 03:28:41,039 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-30 03:28:41,039 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-30 03:28:41,039 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=406, Invalid=406, Unknown=0, NotChecked=0, Total=812 [2018-01-30 03:28:41,040 INFO L87 Difference]: Start difference. First operand 190 states and 193 transitions. Second operand 29 states. [2018-01-30 03:28:41,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:41,131 INFO L93 Difference]: Finished difference Result 273 states and 279 transitions. [2018-01-30 03:28:41,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-30 03:28:41,131 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 184 [2018-01-30 03:28:41,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:41,131 INFO L225 Difference]: With dead ends: 273 [2018-01-30 03:28:41,132 INFO L226 Difference]: Without dead ends: 196 [2018-01-30 03:28:41,132 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 212 GetRequests, 185 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=406, Invalid=406, Unknown=0, NotChecked=0, Total=812 [2018-01-30 03:28:41,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-01-30 03:28:41,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 194. [2018-01-30 03:28:41,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-30 03:28:41,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 197 transitions. [2018-01-30 03:28:41,134 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 197 transitions. Word has length 184 [2018-01-30 03:28:41,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:41,134 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 197 transitions. [2018-01-30 03:28:41,134 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-30 03:28:41,134 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 197 transitions. [2018-01-30 03:28:41,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 189 [2018-01-30 03:28:41,135 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:41,135 INFO L350 BasicCegarLoop]: trace histogram [28, 27, 27, 27, 11, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:41,135 INFO L371 AbstractCegarLoop]: === Iteration 29 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:41,135 INFO L82 PathProgramCache]: Analyzing trace with hash 1739652849, now seen corresponding path program 27 times [2018-01-30 03:28:41,135 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:41,135 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:41,136 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:41,136 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:41,136 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:41,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:41,141 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:41,725 INFO L134 CoverageAnalysis]: Checked inductivity of 1748 backedges. 0 proven. 1458 refuted. 0 times theorem prover too weak. 290 trivial. 0 not checked. [2018-01-30 03:28:41,725 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:41,725 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:41,730 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-30 03:28:41,735 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:41,742 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:41,743 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:41,744 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:41,746 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:41,747 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:41,749 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:41,751 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:41,753 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:41,756 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:41,758 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:41,759 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:41,760 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:41,867 INFO L134 CoverageAnalysis]: Checked inductivity of 1748 backedges. 0 proven. 290 refuted. 0 times theorem prover too weak. 1458 trivial. 0 not checked. [2018-01-30 03:28:41,883 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:41,883 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 23] total 40 [2018-01-30 03:28:41,884 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-30 03:28:41,884 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-30 03:28:41,884 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=500, Invalid=1060, Unknown=0, NotChecked=0, Total=1560 [2018-01-30 03:28:41,884 INFO L87 Difference]: Start difference. First operand 194 states and 197 transitions. Second operand 40 states. [2018-01-30 03:28:42,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:42,279 INFO L93 Difference]: Finished difference Result 286 states and 293 transitions. [2018-01-30 03:28:42,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-01-30 03:28:42,279 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 188 [2018-01-30 03:28:42,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:42,280 INFO L225 Difference]: With dead ends: 286 [2018-01-30 03:28:42,280 INFO L226 Difference]: Without dead ends: 209 [2018-01-30 03:28:42,281 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 237 GetRequests, 179 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 460 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1300, Invalid=2240, Unknown=0, NotChecked=0, Total=3540 [2018-01-30 03:28:42,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-01-30 03:28:42,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 204. [2018-01-30 03:28:42,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-01-30 03:28:42,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 207 transitions. [2018-01-30 03:28:42,283 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 207 transitions. Word has length 188 [2018-01-30 03:28:42,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:42,283 INFO L432 AbstractCegarLoop]: Abstraction has 204 states and 207 transitions. [2018-01-30 03:28:42,283 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-30 03:28:42,283 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 207 transitions. [2018-01-30 03:28:42,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2018-01-30 03:28:42,284 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:42,284 INFO L350 BasicCegarLoop]: trace histogram [29, 28, 28, 28, 12, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:42,284 INFO L371 AbstractCegarLoop]: === Iteration 30 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:42,284 INFO L82 PathProgramCache]: Analyzing trace with hash 531039381, now seen corresponding path program 28 times [2018-01-30 03:28:42,284 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:42,284 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:42,285 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:42,285 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:42,285 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:42,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:42,291 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:42,860 INFO L134 CoverageAnalysis]: Checked inductivity of 1920 backedges. 0 proven. 1568 refuted. 0 times theorem prover too weak. 352 trivial. 0 not checked. [2018-01-30 03:28:42,860 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:42,860 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:42,865 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-30 03:28:42,901 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:42,903 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:42,922 INFO L134 CoverageAnalysis]: Checked inductivity of 1920 backedges. 0 proven. 1568 refuted. 0 times theorem prover too weak. 352 trivial. 0 not checked. [2018-01-30 03:28:42,942 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:42,942 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31] total 31 [2018-01-30 03:28:42,942 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-30 03:28:42,942 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-30 03:28:42,942 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=465, Invalid=465, Unknown=0, NotChecked=0, Total=930 [2018-01-30 03:28:42,943 INFO L87 Difference]: Start difference. First operand 204 states and 207 transitions. Second operand 31 states. [2018-01-30 03:28:43,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:43,308 INFO L93 Difference]: Finished difference Result 293 states and 299 transitions. [2018-01-30 03:28:43,308 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-30 03:28:43,308 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 198 [2018-01-30 03:28:43,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:43,309 INFO L225 Difference]: With dead ends: 293 [2018-01-30 03:28:43,309 INFO L226 Difference]: Without dead ends: 210 [2018-01-30 03:28:43,309 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 228 GetRequests, 199 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=465, Invalid=465, Unknown=0, NotChecked=0, Total=930 [2018-01-30 03:28:43,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2018-01-30 03:28:43,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 208. [2018-01-30 03:28:43,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-01-30 03:28:43,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 211 transitions. [2018-01-30 03:28:43,312 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 211 transitions. Word has length 198 [2018-01-30 03:28:43,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:43,312 INFO L432 AbstractCegarLoop]: Abstraction has 208 states and 211 transitions. [2018-01-30 03:28:43,312 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-30 03:28:43,312 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 211 transitions. [2018-01-30 03:28:43,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2018-01-30 03:28:43,313 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:43,313 INFO L350 BasicCegarLoop]: trace histogram [30, 29, 29, 29, 12, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:43,313 INFO L371 AbstractCegarLoop]: === Iteration 31 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:43,313 INFO L82 PathProgramCache]: Analyzing trace with hash 335793839, now seen corresponding path program 29 times [2018-01-30 03:28:43,313 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:43,313 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:43,313 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:43,313 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:43,314 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:43,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:43,321 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:43,995 INFO L134 CoverageAnalysis]: Checked inductivity of 2034 backedges. 0 proven. 1682 refuted. 0 times theorem prover too weak. 352 trivial. 0 not checked. [2018-01-30 03:28:43,995 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:43,995 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:43,999 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-30 03:28:44,003 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,005 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,006 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,006 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,007 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,008 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,009 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,010 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,011 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,012 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,014 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,015 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,017 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,019 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,021 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,024 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,026 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,030 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,033 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,037 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,042 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,047 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,053 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,060 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,067 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,076 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,085 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,096 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,107 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,129 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:44,130 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:44,132 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:44,151 INFO L134 CoverageAnalysis]: Checked inductivity of 2034 backedges. 0 proven. 1682 refuted. 0 times theorem prover too weak. 352 trivial. 0 not checked. [2018-01-30 03:28:44,171 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:44,172 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 32 [2018-01-30 03:28:44,172 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-30 03:28:44,172 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-30 03:28:44,172 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-01-30 03:28:44,172 INFO L87 Difference]: Start difference. First operand 208 states and 211 transitions. Second operand 32 states. [2018-01-30 03:28:45,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:45,143 INFO L93 Difference]: Finished difference Result 297 states and 303 transitions. [2018-01-30 03:28:45,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-30 03:28:45,143 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 202 [2018-01-30 03:28:45,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:45,144 INFO L225 Difference]: With dead ends: 297 [2018-01-30 03:28:45,144 INFO L226 Difference]: Without dead ends: 214 [2018-01-30 03:28:45,145 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 233 GetRequests, 203 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-01-30 03:28:45,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-01-30 03:28:45,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 212. [2018-01-30 03:28:45,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212 states. [2018-01-30 03:28:45,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 215 transitions. [2018-01-30 03:28:45,147 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 215 transitions. Word has length 202 [2018-01-30 03:28:45,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:45,147 INFO L432 AbstractCegarLoop]: Abstraction has 212 states and 215 transitions. [2018-01-30 03:28:45,147 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-30 03:28:45,147 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 215 transitions. [2018-01-30 03:28:45,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 207 [2018-01-30 03:28:45,148 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:45,148 INFO L350 BasicCegarLoop]: trace histogram [31, 30, 30, 30, 12, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:45,148 INFO L371 AbstractCegarLoop]: === Iteration 32 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:45,148 INFO L82 PathProgramCache]: Analyzing trace with hash -1705378871, now seen corresponding path program 30 times [2018-01-30 03:28:45,148 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:45,148 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:45,149 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:45,149 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:45,149 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:45,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:45,156 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:45,626 INFO L134 CoverageAnalysis]: Checked inductivity of 2152 backedges. 0 proven. 1800 refuted. 0 times theorem prover too weak. 352 trivial. 0 not checked. [2018-01-30 03:28:45,626 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:45,626 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:45,632 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-30 03:28:45,644 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,648 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,652 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,660 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,672 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,676 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,677 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,678 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,679 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,680 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,682 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,683 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,685 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,687 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,689 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,691 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,694 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,696 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,699 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,702 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,705 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,709 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,713 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:45,714 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:45,716 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:45,868 INFO L134 CoverageAnalysis]: Checked inductivity of 2152 backedges. 0 proven. 352 refuted. 0 times theorem prover too weak. 1800 trivial. 0 not checked. [2018-01-30 03:28:45,885 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:45,885 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 25] total 44 [2018-01-30 03:28:45,885 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-30 03:28:45,885 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-30 03:28:45,886 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=605, Invalid=1287, Unknown=0, NotChecked=0, Total=1892 [2018-01-30 03:28:45,886 INFO L87 Difference]: Start difference. First operand 212 states and 215 transitions. Second operand 44 states. [2018-01-30 03:28:46,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:46,184 INFO L93 Difference]: Finished difference Result 310 states and 317 transitions. [2018-01-30 03:28:46,184 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-01-30 03:28:46,184 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 206 [2018-01-30 03:28:46,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:46,185 INFO L225 Difference]: With dead ends: 310 [2018-01-30 03:28:46,185 INFO L226 Difference]: Without dead ends: 227 [2018-01-30 03:28:46,186 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 260 GetRequests, 196 SyntacticMatches, 0 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 561 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1573, Invalid=2717, Unknown=0, NotChecked=0, Total=4290 [2018-01-30 03:28:46,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2018-01-30 03:28:46,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 222. [2018-01-30 03:28:46,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222 states. [2018-01-30 03:28:46,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 225 transitions. [2018-01-30 03:28:46,188 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 225 transitions. Word has length 206 [2018-01-30 03:28:46,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:46,188 INFO L432 AbstractCegarLoop]: Abstraction has 222 states and 225 transitions. [2018-01-30 03:28:46,188 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-30 03:28:46,188 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 225 transitions. [2018-01-30 03:28:46,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 217 [2018-01-30 03:28:46,189 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:46,189 INFO L350 BasicCegarLoop]: trace histogram [32, 31, 31, 31, 13, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:46,189 INFO L371 AbstractCegarLoop]: === Iteration 33 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:46,189 INFO L82 PathProgramCache]: Analyzing trace with hash 1579625709, now seen corresponding path program 31 times [2018-01-30 03:28:46,189 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:46,189 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:46,190 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:46,190 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:46,190 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:46,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:46,196 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:46,780 INFO L134 CoverageAnalysis]: Checked inductivity of 2342 backedges. 0 proven. 1922 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-01-30 03:28:46,780 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:46,780 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:46,785 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:28:46,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:46,805 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:46,826 INFO L134 CoverageAnalysis]: Checked inductivity of 2342 backedges. 0 proven. 1922 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-01-30 03:28:46,843 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:46,843 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34] total 34 [2018-01-30 03:28:46,844 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-30 03:28:46,844 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-30 03:28:46,844 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2018-01-30 03:28:46,844 INFO L87 Difference]: Start difference. First operand 222 states and 225 transitions. Second operand 34 states. [2018-01-30 03:28:46,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:46,955 INFO L93 Difference]: Finished difference Result 317 states and 323 transitions. [2018-01-30 03:28:46,956 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-30 03:28:46,956 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 216 [2018-01-30 03:28:46,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:46,956 INFO L225 Difference]: With dead ends: 317 [2018-01-30 03:28:46,956 INFO L226 Difference]: Without dead ends: 228 [2018-01-30 03:28:46,957 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 249 GetRequests, 217 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2018-01-30 03:28:46,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228 states. [2018-01-30 03:28:46,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228 to 226. [2018-01-30 03:28:46,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 226 states. [2018-01-30 03:28:46,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 229 transitions. [2018-01-30 03:28:46,959 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 229 transitions. Word has length 216 [2018-01-30 03:28:46,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:46,959 INFO L432 AbstractCegarLoop]: Abstraction has 226 states and 229 transitions. [2018-01-30 03:28:46,959 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-30 03:28:46,959 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 229 transitions. [2018-01-30 03:28:46,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 221 [2018-01-30 03:28:46,960 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:46,960 INFO L350 BasicCegarLoop]: trace histogram [33, 32, 32, 32, 13, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:46,960 INFO L371 AbstractCegarLoop]: === Iteration 34 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:46,960 INFO L82 PathProgramCache]: Analyzing trace with hash -940350329, now seen corresponding path program 32 times [2018-01-30 03:28:46,960 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:46,960 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:46,961 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:46,961 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:28:46,961 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:46,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:46,967 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:47,506 INFO L134 CoverageAnalysis]: Checked inductivity of 2468 backedges. 0 proven. 2048 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-01-30 03:28:47,506 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:47,506 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:47,511 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 03:28:47,519 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:47,529 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:47,531 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:47,533 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:47,555 INFO L134 CoverageAnalysis]: Checked inductivity of 2468 backedges. 0 proven. 2048 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-01-30 03:28:47,571 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:47,571 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35] total 35 [2018-01-30 03:28:47,572 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-30 03:28:47,572 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-30 03:28:47,572 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=595, Invalid=595, Unknown=0, NotChecked=0, Total=1190 [2018-01-30 03:28:47,572 INFO L87 Difference]: Start difference. First operand 226 states and 229 transitions. Second operand 35 states. [2018-01-30 03:28:47,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:47,686 INFO L93 Difference]: Finished difference Result 321 states and 327 transitions. [2018-01-30 03:28:47,686 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-30 03:28:47,686 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 220 [2018-01-30 03:28:47,686 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:47,687 INFO L225 Difference]: With dead ends: 321 [2018-01-30 03:28:47,687 INFO L226 Difference]: Without dead ends: 232 [2018-01-30 03:28:47,687 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 254 GetRequests, 221 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=595, Invalid=595, Unknown=0, NotChecked=0, Total=1190 [2018-01-30 03:28:47,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2018-01-30 03:28:47,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 230. [2018-01-30 03:28:47,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230 states. [2018-01-30 03:28:47,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230 states to 230 states and 233 transitions. [2018-01-30 03:28:47,689 INFO L78 Accepts]: Start accepts. Automaton has 230 states and 233 transitions. Word has length 220 [2018-01-30 03:28:47,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:47,690 INFO L432 AbstractCegarLoop]: Abstraction has 230 states and 233 transitions. [2018-01-30 03:28:47,690 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-30 03:28:47,690 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 233 transitions. [2018-01-30 03:28:47,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2018-01-30 03:28:47,690 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:47,690 INFO L350 BasicCegarLoop]: trace histogram [34, 33, 33, 33, 13, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:47,690 INFO L371 AbstractCegarLoop]: === Iteration 35 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:47,691 INFO L82 PathProgramCache]: Analyzing trace with hash 2068201249, now seen corresponding path program 33 times [2018-01-30 03:28:47,691 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:47,691 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:47,691 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:47,691 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:47,691 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:47,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:47,697 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:48,134 INFO L134 CoverageAnalysis]: Checked inductivity of 2598 backedges. 0 proven. 2178 refuted. 0 times theorem prover too weak. 420 trivial. 0 not checked. [2018-01-30 03:28:48,134 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:48,134 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:48,138 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-30 03:28:48,144 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:48,145 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:48,147 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:48,148 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:48,149 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:48,150 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:48,152 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:48,154 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:48,156 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:48,159 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:48,161 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:48,164 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:48,168 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:48,168 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:48,170 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:48,360 INFO L134 CoverageAnalysis]: Checked inductivity of 2598 backedges. 0 proven. 420 refuted. 0 times theorem prover too weak. 2178 trivial. 0 not checked. [2018-01-30 03:28:48,378 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:48,378 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 27] total 48 [2018-01-30 03:28:48,378 INFO L409 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-01-30 03:28:48,378 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-01-30 03:28:48,379 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=720, Invalid=1536, Unknown=0, NotChecked=0, Total=2256 [2018-01-30 03:28:48,379 INFO L87 Difference]: Start difference. First operand 230 states and 233 transitions. Second operand 48 states. [2018-01-30 03:28:50,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:50,277 INFO L93 Difference]: Finished difference Result 334 states and 341 transitions. [2018-01-30 03:28:50,277 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 60 states. [2018-01-30 03:28:50,277 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 224 [2018-01-30 03:28:50,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:50,278 INFO L225 Difference]: With dead ends: 334 [2018-01-30 03:28:50,278 INFO L226 Difference]: Without dead ends: 245 [2018-01-30 03:28:50,279 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 283 GetRequests, 213 SyntacticMatches, 0 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 672 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=1872, Invalid=3240, Unknown=0, NotChecked=0, Total=5112 [2018-01-30 03:28:50,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245 states. [2018-01-30 03:28:50,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245 to 240. [2018-01-30 03:28:50,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 240 states. [2018-01-30 03:28:50,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 240 states to 240 states and 243 transitions. [2018-01-30 03:28:50,282 INFO L78 Accepts]: Start accepts. Automaton has 240 states and 243 transitions. Word has length 224 [2018-01-30 03:28:50,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:50,283 INFO L432 AbstractCegarLoop]: Abstraction has 240 states and 243 transitions. [2018-01-30 03:28:50,283 INFO L433 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-01-30 03:28:50,283 INFO L276 IsEmpty]: Start isEmpty. Operand 240 states and 243 transitions. [2018-01-30 03:28:50,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2018-01-30 03:28:50,283 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:50,284 INFO L350 BasicCegarLoop]: trace histogram [35, 34, 34, 34, 14, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:50,284 INFO L371 AbstractCegarLoop]: === Iteration 36 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:50,284 INFO L82 PathProgramCache]: Analyzing trace with hash 1876646853, now seen corresponding path program 34 times [2018-01-30 03:28:50,284 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:50,284 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:50,284 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:50,285 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:50,285 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:50,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:50,291 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:51,259 INFO L134 CoverageAnalysis]: Checked inductivity of 2806 backedges. 0 proven. 2312 refuted. 0 times theorem prover too weak. 494 trivial. 0 not checked. [2018-01-30 03:28:51,260 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:51,260 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:51,264 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-30 03:28:51,295 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:51,297 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:51,320 INFO L134 CoverageAnalysis]: Checked inductivity of 2806 backedges. 0 proven. 2312 refuted. 0 times theorem prover too weak. 494 trivial. 0 not checked. [2018-01-30 03:28:51,337 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:51,337 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37] total 37 [2018-01-30 03:28:51,337 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-30 03:28:51,337 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-30 03:28:51,337 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=666, Invalid=666, Unknown=0, NotChecked=0, Total=1332 [2018-01-30 03:28:51,338 INFO L87 Difference]: Start difference. First operand 240 states and 243 transitions. Second operand 37 states. [2018-01-30 03:28:51,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:51,502 INFO L93 Difference]: Finished difference Result 341 states and 347 transitions. [2018-01-30 03:28:51,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-30 03:28:51,502 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 234 [2018-01-30 03:28:51,503 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:51,503 INFO L225 Difference]: With dead ends: 341 [2018-01-30 03:28:51,503 INFO L226 Difference]: Without dead ends: 246 [2018-01-30 03:28:51,503 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 270 GetRequests, 235 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=666, Invalid=666, Unknown=0, NotChecked=0, Total=1332 [2018-01-30 03:28:51,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-01-30 03:28:51,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 244. [2018-01-30 03:28:51,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 244 states. [2018-01-30 03:28:51,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 247 transitions. [2018-01-30 03:28:51,505 INFO L78 Accepts]: Start accepts. Automaton has 244 states and 247 transitions. Word has length 234 [2018-01-30 03:28:51,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:51,506 INFO L432 AbstractCegarLoop]: Abstraction has 244 states and 247 transitions. [2018-01-30 03:28:51,506 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-30 03:28:51,506 INFO L276 IsEmpty]: Start isEmpty. Operand 244 states and 247 transitions. [2018-01-30 03:28:51,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 239 [2018-01-30 03:28:51,506 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:51,506 INFO L350 BasicCegarLoop]: trace histogram [36, 35, 35, 35, 14, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:51,506 INFO L371 AbstractCegarLoop]: === Iteration 37 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:51,507 INFO L82 PathProgramCache]: Analyzing trace with hash -769220385, now seen corresponding path program 35 times [2018-01-30 03:28:51,507 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:51,507 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:51,507 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:51,507 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:51,507 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:51,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:51,513 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:52,005 INFO L134 CoverageAnalysis]: Checked inductivity of 2944 backedges. 0 proven. 2450 refuted. 0 times theorem prover too weak. 494 trivial. 0 not checked. [2018-01-30 03:28:52,005 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:52,005 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:52,010 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-30 03:28:52,014 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,015 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,015 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,016 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,017 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,017 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,018 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,019 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,020 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,022 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,023 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,025 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,027 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,029 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,031 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,033 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,036 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,039 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,043 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,046 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,050 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,055 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,061 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,067 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,074 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,082 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,091 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,100 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,111 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,122 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,135 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,150 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,166 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,183 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,204 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,240 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:52,242 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:52,244 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:52,270 INFO L134 CoverageAnalysis]: Checked inductivity of 2944 backedges. 0 proven. 2450 refuted. 0 times theorem prover too weak. 494 trivial. 0 not checked. [2018-01-30 03:28:52,287 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:52,287 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38] total 38 [2018-01-30 03:28:52,288 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-30 03:28:52,288 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-30 03:28:52,288 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-01-30 03:28:52,288 INFO L87 Difference]: Start difference. First operand 244 states and 247 transitions. Second operand 38 states. [2018-01-30 03:28:52,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:52,428 INFO L93 Difference]: Finished difference Result 345 states and 351 transitions. [2018-01-30 03:28:52,429 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-30 03:28:52,429 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 238 [2018-01-30 03:28:52,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:52,430 INFO L225 Difference]: With dead ends: 345 [2018-01-30 03:28:52,430 INFO L226 Difference]: Without dead ends: 250 [2018-01-30 03:28:52,430 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 275 GetRequests, 239 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-01-30 03:28:52,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 250 states. [2018-01-30 03:28:52,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 250 to 248. [2018-01-30 03:28:52,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 248 states. [2018-01-30 03:28:52,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 251 transitions. [2018-01-30 03:28:52,434 INFO L78 Accepts]: Start accepts. Automaton has 248 states and 251 transitions. Word has length 238 [2018-01-30 03:28:52,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:52,434 INFO L432 AbstractCegarLoop]: Abstraction has 248 states and 251 transitions. [2018-01-30 03:28:52,435 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-30 03:28:52,435 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 251 transitions. [2018-01-30 03:28:52,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 243 [2018-01-30 03:28:52,435 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:52,435 INFO L350 BasicCegarLoop]: trace histogram [37, 36, 36, 36, 14, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:52,435 INFO L371 AbstractCegarLoop]: === Iteration 38 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:52,435 INFO L82 PathProgramCache]: Analyzing trace with hash -457848583, now seen corresponding path program 36 times [2018-01-30 03:28:52,436 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:52,436 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:52,436 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:52,436 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:52,436 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:52,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:52,456 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:52,958 INFO L134 CoverageAnalysis]: Checked inductivity of 3086 backedges. 0 proven. 2592 refuted. 0 times theorem prover too weak. 494 trivial. 0 not checked. [2018-01-30 03:28:52,958 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:52,958 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:52,967 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-30 03:28:52,973 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:52,973 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:52,974 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:52,975 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:52,976 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:52,977 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:52,979 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:52,980 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:52,981 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:52,983 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:52,984 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:52,986 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:52,988 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:52,990 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:52,993 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:52,995 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:52,997 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:53,000 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:53,003 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:53,006 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:53,009 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:53,013 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:53,017 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:53,021 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:53,026 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:53,031 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:53,036 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:28:53,037 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:53,038 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:53,405 INFO L134 CoverageAnalysis]: Checked inductivity of 3086 backedges. 0 proven. 494 refuted. 0 times theorem prover too weak. 2592 trivial. 0 not checked. [2018-01-30 03:28:53,421 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:53,422 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 29] total 52 [2018-01-30 03:28:53,422 INFO L409 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-01-30 03:28:53,422 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-01-30 03:28:53,423 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=845, Invalid=1807, Unknown=0, NotChecked=0, Total=2652 [2018-01-30 03:28:53,423 INFO L87 Difference]: Start difference. First operand 248 states and 251 transitions. Second operand 52 states. [2018-01-30 03:28:53,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:53,808 INFO L93 Difference]: Finished difference Result 358 states and 365 transitions. [2018-01-30 03:28:53,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2018-01-30 03:28:53,808 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 242 [2018-01-30 03:28:53,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:53,809 INFO L225 Difference]: With dead ends: 358 [2018-01-30 03:28:53,809 INFO L226 Difference]: Without dead ends: 263 [2018-01-30 03:28:53,809 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 306 GetRequests, 230 SyntacticMatches, 0 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 793 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=2197, Invalid=3809, Unknown=0, NotChecked=0, Total=6006 [2018-01-30 03:28:53,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 263 states. [2018-01-30 03:28:53,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 263 to 258. [2018-01-30 03:28:53,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 258 states. [2018-01-30 03:28:53,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 258 states to 258 states and 261 transitions. [2018-01-30 03:28:53,812 INFO L78 Accepts]: Start accepts. Automaton has 258 states and 261 transitions. Word has length 242 [2018-01-30 03:28:53,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:53,812 INFO L432 AbstractCegarLoop]: Abstraction has 258 states and 261 transitions. [2018-01-30 03:28:53,812 INFO L433 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-01-30 03:28:53,812 INFO L276 IsEmpty]: Start isEmpty. Operand 258 states and 261 transitions. [2018-01-30 03:28:53,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 253 [2018-01-30 03:28:53,813 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:53,813 INFO L350 BasicCegarLoop]: trace histogram [38, 37, 37, 37, 15, 14, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:53,813 INFO L371 AbstractCegarLoop]: === Iteration 39 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:53,813 INFO L82 PathProgramCache]: Analyzing trace with hash 1650168093, now seen corresponding path program 37 times [2018-01-30 03:28:53,813 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:53,813 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:53,813 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:53,813 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:53,813 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:53,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:53,820 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:54,614 INFO L134 CoverageAnalysis]: Checked inductivity of 3312 backedges. 0 proven. 2738 refuted. 0 times theorem prover too weak. 574 trivial. 0 not checked. [2018-01-30 03:28:54,614 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:54,614 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:54,619 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:28:54,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:54,640 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:54,675 INFO L134 CoverageAnalysis]: Checked inductivity of 3312 backedges. 0 proven. 2738 refuted. 0 times theorem prover too weak. 574 trivial. 0 not checked. [2018-01-30 03:28:54,693 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:54,693 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40] total 40 [2018-01-30 03:28:54,693 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-30 03:28:54,694 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-30 03:28:54,694 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-01-30 03:28:54,694 INFO L87 Difference]: Start difference. First operand 258 states and 261 transitions. Second operand 40 states. [2018-01-30 03:28:54,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:54,837 INFO L93 Difference]: Finished difference Result 365 states and 371 transitions. [2018-01-30 03:28:54,837 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-30 03:28:54,837 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 252 [2018-01-30 03:28:54,838 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:54,838 INFO L225 Difference]: With dead ends: 365 [2018-01-30 03:28:54,838 INFO L226 Difference]: Without dead ends: 264 [2018-01-30 03:28:54,838 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 291 GetRequests, 253 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-01-30 03:28:54,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 264 states. [2018-01-30 03:28:54,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 264 to 262. [2018-01-30 03:28:54,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 262 states. [2018-01-30 03:28:54,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 262 states to 262 states and 265 transitions. [2018-01-30 03:28:54,841 INFO L78 Accepts]: Start accepts. Automaton has 262 states and 265 transitions. Word has length 252 [2018-01-30 03:28:54,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:54,841 INFO L432 AbstractCegarLoop]: Abstraction has 262 states and 265 transitions. [2018-01-30 03:28:54,841 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-30 03:28:54,841 INFO L276 IsEmpty]: Start isEmpty. Operand 262 states and 265 transitions. [2018-01-30 03:28:54,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 257 [2018-01-30 03:28:54,841 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:54,842 INFO L350 BasicCegarLoop]: trace histogram [39, 38, 38, 38, 15, 14, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:54,842 INFO L371 AbstractCegarLoop]: === Iteration 40 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:54,842 INFO L82 PathProgramCache]: Analyzing trace with hash -1215462473, now seen corresponding path program 38 times [2018-01-30 03:28:54,842 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:54,842 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:54,842 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:54,842 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:28:54,842 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:54,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:54,848 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:55,533 INFO L134 CoverageAnalysis]: Checked inductivity of 3462 backedges. 0 proven. 2888 refuted. 0 times theorem prover too weak. 574 trivial. 0 not checked. [2018-01-30 03:28:55,534 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:55,534 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:55,538 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 03:28:55,544 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:55,556 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:28:55,558 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:55,560 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:55,587 INFO L134 CoverageAnalysis]: Checked inductivity of 3462 backedges. 0 proven. 2888 refuted. 0 times theorem prover too weak. 574 trivial. 0 not checked. [2018-01-30 03:28:55,604 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:55,604 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41] total 41 [2018-01-30 03:28:55,604 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-30 03:28:55,604 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-30 03:28:55,604 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=820, Invalid=820, Unknown=0, NotChecked=0, Total=1640 [2018-01-30 03:28:55,605 INFO L87 Difference]: Start difference. First operand 262 states and 265 transitions. Second operand 41 states. [2018-01-30 03:28:55,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:55,764 INFO L93 Difference]: Finished difference Result 369 states and 375 transitions. [2018-01-30 03:28:55,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-30 03:28:55,764 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 256 [2018-01-30 03:28:55,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:55,765 INFO L225 Difference]: With dead ends: 369 [2018-01-30 03:28:55,765 INFO L226 Difference]: Without dead ends: 268 [2018-01-30 03:28:55,765 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 296 GetRequests, 257 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=820, Invalid=820, Unknown=0, NotChecked=0, Total=1640 [2018-01-30 03:28:55,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 268 states. [2018-01-30 03:28:55,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 268 to 266. [2018-01-30 03:28:55,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 266 states. [2018-01-30 03:28:55,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 266 states to 266 states and 269 transitions. [2018-01-30 03:28:55,768 INFO L78 Accepts]: Start accepts. Automaton has 266 states and 269 transitions. Word has length 256 [2018-01-30 03:28:55,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:55,768 INFO L432 AbstractCegarLoop]: Abstraction has 266 states and 269 transitions. [2018-01-30 03:28:55,768 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-30 03:28:55,768 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 269 transitions. [2018-01-30 03:28:55,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 261 [2018-01-30 03:28:55,769 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:55,769 INFO L350 BasicCegarLoop]: trace histogram [40, 39, 39, 39, 15, 14, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:55,769 INFO L371 AbstractCegarLoop]: === Iteration 41 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:55,769 INFO L82 PathProgramCache]: Analyzing trace with hash 1727043921, now seen corresponding path program 39 times [2018-01-30 03:28:55,769 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:55,769 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:55,769 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:55,769 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:55,769 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:55,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:55,776 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:56,306 INFO L134 CoverageAnalysis]: Checked inductivity of 3616 backedges. 0 proven. 3042 refuted. 0 times theorem prover too weak. 574 trivial. 0 not checked. [2018-01-30 03:28:56,307 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:56,307 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:56,312 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-30 03:28:56,317 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:56,318 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:56,319 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:56,320 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:56,322 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:56,323 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:56,327 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:56,329 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:56,371 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:56,382 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:56,395 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:56,402 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:56,416 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:56,429 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:56,442 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:28:56,455 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:56,456 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:56,970 INFO L134 CoverageAnalysis]: Checked inductivity of 3616 backedges. 0 proven. 574 refuted. 0 times theorem prover too weak. 3042 trivial. 0 not checked. [2018-01-30 03:28:56,986 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:56,987 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 31] total 56 [2018-01-30 03:28:56,987 INFO L409 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-01-30 03:28:56,987 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-01-30 03:28:56,987 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=980, Invalid=2100, Unknown=0, NotChecked=0, Total=3080 [2018-01-30 03:28:56,988 INFO L87 Difference]: Start difference. First operand 266 states and 269 transitions. Second operand 56 states. [2018-01-30 03:28:57,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:57,420 INFO L93 Difference]: Finished difference Result 382 states and 389 transitions. [2018-01-30 03:28:57,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2018-01-30 03:28:57,420 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 260 [2018-01-30 03:28:57,420 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:57,421 INFO L225 Difference]: With dead ends: 382 [2018-01-30 03:28:57,421 INFO L226 Difference]: Without dead ends: 281 [2018-01-30 03:28:57,422 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 329 GetRequests, 247 SyntacticMatches, 0 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 924 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=2548, Invalid=4424, Unknown=0, NotChecked=0, Total=6972 [2018-01-30 03:28:57,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 281 states. [2018-01-30 03:28:57,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 281 to 276. [2018-01-30 03:28:57,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 276 states. [2018-01-30 03:28:57,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 276 states to 276 states and 279 transitions. [2018-01-30 03:28:57,424 INFO L78 Accepts]: Start accepts. Automaton has 276 states and 279 transitions. Word has length 260 [2018-01-30 03:28:57,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:57,424 INFO L432 AbstractCegarLoop]: Abstraction has 276 states and 279 transitions. [2018-01-30 03:28:57,424 INFO L433 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-01-30 03:28:57,424 INFO L276 IsEmpty]: Start isEmpty. Operand 276 states and 279 transitions. [2018-01-30 03:28:57,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 271 [2018-01-30 03:28:57,425 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:57,425 INFO L350 BasicCegarLoop]: trace histogram [41, 40, 40, 40, 16, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:57,425 INFO L371 AbstractCegarLoop]: === Iteration 42 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:57,425 INFO L82 PathProgramCache]: Analyzing trace with hash 759680245, now seen corresponding path program 40 times [2018-01-30 03:28:57,426 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:57,426 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:57,427 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:57,427 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:57,427 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:57,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:57,433 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:28:57,989 INFO L134 CoverageAnalysis]: Checked inductivity of 3860 backedges. 0 proven. 3200 refuted. 0 times theorem prover too weak. 660 trivial. 0 not checked. [2018-01-30 03:28:57,989 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:28:57,989 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:28:57,993 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-30 03:28:58,019 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:28:58,021 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:28:59,011 INFO L134 CoverageAnalysis]: Checked inductivity of 3860 backedges. 0 proven. 660 refuted. 0 times theorem prover too weak. 3200 trivial. 0 not checked. [2018-01-30 03:28:59,028 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:28:59,028 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 33] total 58 [2018-01-30 03:28:59,029 INFO L409 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-01-30 03:28:59,029 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-01-30 03:28:59,029 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1038, Invalid=2268, Unknown=0, NotChecked=0, Total=3306 [2018-01-30 03:28:59,029 INFO L87 Difference]: Start difference. First operand 276 states and 279 transitions. Second operand 58 states. [2018-01-30 03:28:59,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:28:59,827 INFO L93 Difference]: Finished difference Result 398 states and 405 transitions. [2018-01-30 03:28:59,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 73 states. [2018-01-30 03:28:59,827 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 270 [2018-01-30 03:28:59,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:28:59,828 INFO L225 Difference]: With dead ends: 398 [2018-01-30 03:28:59,828 INFO L226 Difference]: Without dead ends: 291 [2018-01-30 03:28:59,828 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 342 GetRequests, 256 SyntacticMatches, 0 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1035 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2778, Invalid=4878, Unknown=0, NotChecked=0, Total=7656 [2018-01-30 03:28:59,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2018-01-30 03:28:59,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 286. [2018-01-30 03:28:59,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 286 states. [2018-01-30 03:28:59,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 286 states to 286 states and 289 transitions. [2018-01-30 03:28:59,831 INFO L78 Accepts]: Start accepts. Automaton has 286 states and 289 transitions. Word has length 270 [2018-01-30 03:28:59,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:28:59,831 INFO L432 AbstractCegarLoop]: Abstraction has 286 states and 289 transitions. [2018-01-30 03:28:59,831 INFO L433 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-01-30 03:28:59,831 INFO L276 IsEmpty]: Start isEmpty. Operand 286 states and 289 transitions. [2018-01-30 03:28:59,832 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 281 [2018-01-30 03:28:59,832 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:28:59,832 INFO L350 BasicCegarLoop]: trace histogram [42, 41, 41, 41, 17, 16, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:28:59,832 INFO L371 AbstractCegarLoop]: === Iteration 43 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:28:59,832 INFO L82 PathProgramCache]: Analyzing trace with hash 869571865, now seen corresponding path program 41 times [2018-01-30 03:28:59,832 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:28:59,832 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:28:59,833 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:59,833 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:28:59,833 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:28:59,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:28:59,839 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:00,418 INFO L134 CoverageAnalysis]: Checked inductivity of 4114 backedges. 0 proven. 3362 refuted. 0 times theorem prover too weak. 752 trivial. 0 not checked. [2018-01-30 03:29:00,419 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:00,419 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:00,423 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-30 03:29:00,428 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,429 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,429 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,430 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,432 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,433 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,434 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,435 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,436 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,437 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,439 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,440 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,442 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,444 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,446 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,449 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,452 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,455 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,458 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,462 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,466 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,471 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,476 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,482 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,488 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,496 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,504 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,514 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,524 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,535 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,547 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,561 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,576 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,593 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,612 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,633 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,656 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,680 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,706 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,735 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,766 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,847 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:00,849 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:29:00,852 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:00,883 INFO L134 CoverageAnalysis]: Checked inductivity of 4114 backedges. 0 proven. 3362 refuted. 0 times theorem prover too weak. 752 trivial. 0 not checked. [2018-01-30 03:29:00,902 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:00,902 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44] total 44 [2018-01-30 03:29:00,902 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-30 03:29:00,903 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-30 03:29:00,903 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-01-30 03:29:00,903 INFO L87 Difference]: Start difference. First operand 286 states and 289 transitions. Second operand 44 states. [2018-01-30 03:29:01,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:01,064 INFO L93 Difference]: Finished difference Result 405 states and 411 transitions. [2018-01-30 03:29:01,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-01-30 03:29:01,065 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 280 [2018-01-30 03:29:01,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:01,065 INFO L225 Difference]: With dead ends: 405 [2018-01-30 03:29:01,066 INFO L226 Difference]: Without dead ends: 292 [2018-01-30 03:29:01,066 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 323 GetRequests, 281 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-01-30 03:29:01,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states. [2018-01-30 03:29:01,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 290. [2018-01-30 03:29:01,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 290 states. [2018-01-30 03:29:01,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 293 transitions. [2018-01-30 03:29:01,077 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 293 transitions. Word has length 280 [2018-01-30 03:29:01,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:01,077 INFO L432 AbstractCegarLoop]: Abstraction has 290 states and 293 transitions. [2018-01-30 03:29:01,077 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-30 03:29:01,077 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 293 transitions. [2018-01-30 03:29:01,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 285 [2018-01-30 03:29:01,077 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:01,078 INFO L350 BasicCegarLoop]: trace histogram [43, 42, 42, 42, 17, 16, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:01,078 INFO L371 AbstractCegarLoop]: === Iteration 44 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:01,078 INFO L82 PathProgramCache]: Analyzing trace with hash 630654131, now seen corresponding path program 42 times [2018-01-30 03:29:01,078 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:01,078 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:01,078 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:01,078 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:29:01,078 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:01,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:01,085 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:01,716 INFO L134 CoverageAnalysis]: Checked inductivity of 4280 backedges. 0 proven. 3528 refuted. 0 times theorem prover too weak. 752 trivial. 0 not checked. [2018-01-30 03:29:01,717 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:01,717 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:01,721 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-30 03:29:01,728 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,745 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,751 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,752 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,753 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,754 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,755 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,756 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,757 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,758 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,760 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,761 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,763 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,765 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,767 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,769 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,772 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,775 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,778 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,781 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,784 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,788 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,792 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,796 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,801 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,806 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,811 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,817 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,824 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,831 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,839 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,846 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,854 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:01,855 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:29:01,857 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:02,108 INFO L134 CoverageAnalysis]: Checked inductivity of 4280 backedges. 0 proven. 752 refuted. 0 times theorem prover too weak. 3528 trivial. 0 not checked. [2018-01-30 03:29:02,125 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:02,126 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 35] total 61 [2018-01-30 03:29:02,126 INFO L409 AbstractCegarLoop]: Interpolant automaton has 61 states [2018-01-30 03:29:02,126 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2018-01-30 03:29:02,126 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1142, Invalid=2518, Unknown=0, NotChecked=0, Total=3660 [2018-01-30 03:29:02,126 INFO L87 Difference]: Start difference. First operand 290 states and 293 transitions. Second operand 61 states. [2018-01-30 03:29:02,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:02,608 INFO L93 Difference]: Finished difference Result 418 states and 425 transitions. [2018-01-30 03:29:02,608 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 77 states. [2018-01-30 03:29:02,608 INFO L78 Accepts]: Start accepts. Automaton has 61 states. Word has length 284 [2018-01-30 03:29:02,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:02,609 INFO L225 Difference]: With dead ends: 418 [2018-01-30 03:29:02,609 INFO L226 Difference]: Without dead ends: 305 [2018-01-30 03:29:02,610 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 360 GetRequests, 269 SyntacticMatches, 0 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1168 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=3094, Invalid=5462, Unknown=0, NotChecked=0, Total=8556 [2018-01-30 03:29:02,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 305 states. [2018-01-30 03:29:02,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 305 to 300. [2018-01-30 03:29:02,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 300 states. [2018-01-30 03:29:02,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 300 states to 300 states and 303 transitions. [2018-01-30 03:29:02,612 INFO L78 Accepts]: Start accepts. Automaton has 300 states and 303 transitions. Word has length 284 [2018-01-30 03:29:02,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:02,613 INFO L432 AbstractCegarLoop]: Abstraction has 300 states and 303 transitions. [2018-01-30 03:29:02,613 INFO L433 AbstractCegarLoop]: Interpolant automaton has 61 states. [2018-01-30 03:29:02,613 INFO L276 IsEmpty]: Start isEmpty. Operand 300 states and 303 transitions. [2018-01-30 03:29:02,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 295 [2018-01-30 03:29:02,613 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:02,613 INFO L350 BasicCegarLoop]: trace histogram [44, 43, 43, 43, 18, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:02,613 INFO L371 AbstractCegarLoop]: === Iteration 45 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:02,614 INFO L82 PathProgramCache]: Analyzing trace with hash -1422559017, now seen corresponding path program 43 times [2018-01-30 03:29:02,614 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:02,614 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:02,614 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:02,614 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:29:02,614 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:02,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:02,621 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:03,298 INFO L134 CoverageAnalysis]: Checked inductivity of 4548 backedges. 0 proven. 3698 refuted. 0 times theorem prover too weak. 850 trivial. 0 not checked. [2018-01-30 03:29:03,298 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:03,298 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:03,303 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:29:03,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:03,331 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:03,374 INFO L134 CoverageAnalysis]: Checked inductivity of 4548 backedges. 0 proven. 3698 refuted. 0 times theorem prover too weak. 850 trivial. 0 not checked. [2018-01-30 03:29:03,391 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:03,392 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46] total 46 [2018-01-30 03:29:03,392 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-01-30 03:29:03,392 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-01-30 03:29:03,392 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-01-30 03:29:03,392 INFO L87 Difference]: Start difference. First operand 300 states and 303 transitions. Second operand 46 states. [2018-01-30 03:29:03,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:03,546 INFO L93 Difference]: Finished difference Result 425 states and 431 transitions. [2018-01-30 03:29:03,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-01-30 03:29:03,546 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 294 [2018-01-30 03:29:03,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:03,547 INFO L225 Difference]: With dead ends: 425 [2018-01-30 03:29:03,547 INFO L226 Difference]: Without dead ends: 306 [2018-01-30 03:29:03,547 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 339 GetRequests, 295 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-01-30 03:29:03,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 306 states. [2018-01-30 03:29:03,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 306 to 304. [2018-01-30 03:29:03,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 304 states. [2018-01-30 03:29:03,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 304 states to 304 states and 307 transitions. [2018-01-30 03:29:03,550 INFO L78 Accepts]: Start accepts. Automaton has 304 states and 307 transitions. Word has length 294 [2018-01-30 03:29:03,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:03,550 INFO L432 AbstractCegarLoop]: Abstraction has 304 states and 307 transitions. [2018-01-30 03:29:03,550 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-01-30 03:29:03,550 INFO L276 IsEmpty]: Start isEmpty. Operand 304 states and 307 transitions. [2018-01-30 03:29:03,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 299 [2018-01-30 03:29:03,551 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:03,551 INFO L350 BasicCegarLoop]: trace histogram [45, 44, 44, 44, 18, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:03,551 INFO L371 AbstractCegarLoop]: === Iteration 46 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:03,551 INFO L82 PathProgramCache]: Analyzing trace with hash -1221227791, now seen corresponding path program 44 times [2018-01-30 03:29:03,551 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:03,551 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:03,552 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:03,552 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:29:03,552 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:03,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:03,559 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:04,281 INFO L134 CoverageAnalysis]: Checked inductivity of 4722 backedges. 0 proven. 3872 refuted. 0 times theorem prover too weak. 850 trivial. 0 not checked. [2018-01-30 03:29:04,281 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:04,282 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:04,286 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 03:29:04,292 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:04,305 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:04,308 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:29:04,310 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:04,346 INFO L134 CoverageAnalysis]: Checked inductivity of 4722 backedges. 0 proven. 3872 refuted. 0 times theorem prover too weak. 850 trivial. 0 not checked. [2018-01-30 03:29:04,365 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:04,365 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47] total 47 [2018-01-30 03:29:04,365 INFO L409 AbstractCegarLoop]: Interpolant automaton has 47 states [2018-01-30 03:29:04,365 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2018-01-30 03:29:04,366 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1081, Invalid=1081, Unknown=0, NotChecked=0, Total=2162 [2018-01-30 03:29:04,366 INFO L87 Difference]: Start difference. First operand 304 states and 307 transitions. Second operand 47 states. [2018-01-30 03:29:04,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:04,808 INFO L93 Difference]: Finished difference Result 429 states and 435 transitions. [2018-01-30 03:29:04,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-01-30 03:29:04,808 INFO L78 Accepts]: Start accepts. Automaton has 47 states. Word has length 298 [2018-01-30 03:29:04,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:04,809 INFO L225 Difference]: With dead ends: 429 [2018-01-30 03:29:04,809 INFO L226 Difference]: Without dead ends: 310 [2018-01-30 03:29:04,809 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 344 GetRequests, 299 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1081, Invalid=1081, Unknown=0, NotChecked=0, Total=2162 [2018-01-30 03:29:04,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 310 states. [2018-01-30 03:29:04,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 310 to 308. [2018-01-30 03:29:04,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 308 states. [2018-01-30 03:29:04,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 311 transitions. [2018-01-30 03:29:04,812 INFO L78 Accepts]: Start accepts. Automaton has 308 states and 311 transitions. Word has length 298 [2018-01-30 03:29:04,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:04,812 INFO L432 AbstractCegarLoop]: Abstraction has 308 states and 311 transitions. [2018-01-30 03:29:04,812 INFO L433 AbstractCegarLoop]: Interpolant automaton has 47 states. [2018-01-30 03:29:04,812 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 311 transitions. [2018-01-30 03:29:04,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 303 [2018-01-30 03:29:04,813 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:04,813 INFO L350 BasicCegarLoop]: trace histogram [46, 45, 45, 45, 18, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:04,813 INFO L371 AbstractCegarLoop]: === Iteration 47 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:04,813 INFO L82 PathProgramCache]: Analyzing trace with hash -1035272181, now seen corresponding path program 45 times [2018-01-30 03:29:04,813 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:04,813 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:04,813 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:04,814 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:29:04,814 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:04,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:04,821 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:05,562 INFO L134 CoverageAnalysis]: Checked inductivity of 4900 backedges. 0 proven. 4050 refuted. 0 times theorem prover too weak. 850 trivial. 0 not checked. [2018-01-30 03:29:05,562 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:05,562 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:05,567 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-30 03:29:05,573 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,575 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,576 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,577 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,578 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,580 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,581 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,583 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,585 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,588 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,590 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,594 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,597 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,601 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,606 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,612 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,618 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,625 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:05,625 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:29:05,627 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:05,918 INFO L134 CoverageAnalysis]: Checked inductivity of 4900 backedges. 0 proven. 850 refuted. 0 times theorem prover too weak. 4050 trivial. 0 not checked. [2018-01-30 03:29:05,935 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:05,935 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 37] total 65 [2018-01-30 03:29:05,935 INFO L409 AbstractCegarLoop]: Interpolant automaton has 65 states [2018-01-30 03:29:05,936 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2018-01-30 03:29:05,936 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1298, Invalid=2862, Unknown=0, NotChecked=0, Total=4160 [2018-01-30 03:29:05,936 INFO L87 Difference]: Start difference. First operand 308 states and 311 transitions. Second operand 65 states. [2018-01-30 03:29:06,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:06,483 INFO L93 Difference]: Finished difference Result 442 states and 449 transitions. [2018-01-30 03:29:06,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 82 states. [2018-01-30 03:29:06,486 INFO L78 Accepts]: Start accepts. Automaton has 65 states. Word has length 302 [2018-01-30 03:29:06,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:06,487 INFO L225 Difference]: With dead ends: 442 [2018-01-30 03:29:06,487 INFO L226 Difference]: Without dead ends: 323 [2018-01-30 03:29:06,488 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 383 GetRequests, 286 SyntacticMatches, 0 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1326 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=3508, Invalid=6194, Unknown=0, NotChecked=0, Total=9702 [2018-01-30 03:29:06,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 323 states. [2018-01-30 03:29:06,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 323 to 318. [2018-01-30 03:29:06,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 318 states. [2018-01-30 03:29:06,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 318 states to 318 states and 321 transitions. [2018-01-30 03:29:06,491 INFO L78 Accepts]: Start accepts. Automaton has 318 states and 321 transitions. Word has length 302 [2018-01-30 03:29:06,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:06,491 INFO L432 AbstractCegarLoop]: Abstraction has 318 states and 321 transitions. [2018-01-30 03:29:06,491 INFO L433 AbstractCegarLoop]: Interpolant automaton has 65 states. [2018-01-30 03:29:06,491 INFO L276 IsEmpty]: Start isEmpty. Operand 318 states and 321 transitions. [2018-01-30 03:29:06,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 313 [2018-01-30 03:29:06,495 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:06,495 INFO L350 BasicCegarLoop]: trace histogram [47, 46, 46, 46, 19, 18, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:06,495 INFO L371 AbstractCegarLoop]: === Iteration 48 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:06,495 INFO L82 PathProgramCache]: Analyzing trace with hash 2112208815, now seen corresponding path program 46 times [2018-01-30 03:29:06,495 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:06,495 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:06,496 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:06,496 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:29:06,496 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:06,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:06,505 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:07,245 INFO L134 CoverageAnalysis]: Checked inductivity of 5186 backedges. 0 proven. 4232 refuted. 0 times theorem prover too weak. 954 trivial. 0 not checked. [2018-01-30 03:29:07,245 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:07,245 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:07,250 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-30 03:29:07,282 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:29:07,284 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:07,322 INFO L134 CoverageAnalysis]: Checked inductivity of 5186 backedges. 0 proven. 4232 refuted. 0 times theorem prover too weak. 954 trivial. 0 not checked. [2018-01-30 03:29:07,346 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:07,346 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49] total 49 [2018-01-30 03:29:07,346 INFO L409 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-01-30 03:29:07,346 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-01-30 03:29:07,347 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2018-01-30 03:29:07,347 INFO L87 Difference]: Start difference. First operand 318 states and 321 transitions. Second operand 49 states. [2018-01-30 03:29:07,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:07,503 INFO L93 Difference]: Finished difference Result 449 states and 455 transitions. [2018-01-30 03:29:07,503 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-01-30 03:29:07,503 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 312 [2018-01-30 03:29:07,503 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:07,504 INFO L225 Difference]: With dead ends: 449 [2018-01-30 03:29:07,504 INFO L226 Difference]: Without dead ends: 324 [2018-01-30 03:29:07,504 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 360 GetRequests, 313 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2018-01-30 03:29:07,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324 states. [2018-01-30 03:29:07,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324 to 322. [2018-01-30 03:29:07,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 322 states. [2018-01-30 03:29:07,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 322 states to 322 states and 325 transitions. [2018-01-30 03:29:07,507 INFO L78 Accepts]: Start accepts. Automaton has 322 states and 325 transitions. Word has length 312 [2018-01-30 03:29:07,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:07,507 INFO L432 AbstractCegarLoop]: Abstraction has 322 states and 325 transitions. [2018-01-30 03:29:07,507 INFO L433 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-01-30 03:29:07,507 INFO L276 IsEmpty]: Start isEmpty. Operand 322 states and 325 transitions. [2018-01-30 03:29:07,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 317 [2018-01-30 03:29:07,508 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:07,508 INFO L350 BasicCegarLoop]: trace histogram [48, 47, 47, 47, 19, 18, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:07,508 INFO L371 AbstractCegarLoop]: === Iteration 49 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:07,508 INFO L82 PathProgramCache]: Analyzing trace with hash 1746091849, now seen corresponding path program 47 times [2018-01-30 03:29:07,508 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:07,508 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:07,509 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:07,509 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:29:07,509 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:07,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:07,516 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:08,272 INFO L134 CoverageAnalysis]: Checked inductivity of 5372 backedges. 0 proven. 4418 refuted. 0 times theorem prover too weak. 954 trivial. 0 not checked. [2018-01-30 03:29:08,272 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:08,272 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:08,277 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-30 03:29:08,282 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,283 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,284 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,284 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,285 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,286 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,287 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,288 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,289 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,290 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,292 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,293 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,295 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,297 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,299 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,302 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,304 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,308 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,311 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,315 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,319 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,323 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,329 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,334 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,340 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,348 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,355 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,364 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,374 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,385 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,396 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,410 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,424 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,440 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,458 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,478 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,500 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,524 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,549 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,576 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,606 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,637 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,672 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,709 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,750 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,794 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,841 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,904 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:08,906 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:29:08,909 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:09,243 INFO L134 CoverageAnalysis]: Checked inductivity of 5372 backedges. 0 proven. 954 refuted. 0 times theorem prover too weak. 4418 trivial. 0 not checked. [2018-01-30 03:29:09,261 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:09,261 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 39] total 68 [2018-01-30 03:29:09,262 INFO L409 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-01-30 03:29:09,262 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-01-30 03:29:09,262 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1414, Invalid=3142, Unknown=0, NotChecked=0, Total=4556 [2018-01-30 03:29:09,262 INFO L87 Difference]: Start difference. First operand 322 states and 325 transitions. Second operand 68 states. [2018-01-30 03:29:09,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:09,825 INFO L93 Difference]: Finished difference Result 462 states and 469 transitions. [2018-01-30 03:29:09,826 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 86 states. [2018-01-30 03:29:09,826 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 316 [2018-01-30 03:29:09,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:09,827 INFO L225 Difference]: With dead ends: 462 [2018-01-30 03:29:09,827 INFO L226 Difference]: Without dead ends: 337 [2018-01-30 03:29:09,827 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 401 GetRequests, 299 SyntacticMatches, 0 SemanticMatches, 102 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1476 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=3862, Invalid=6850, Unknown=0, NotChecked=0, Total=10712 [2018-01-30 03:29:09,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 337 states. [2018-01-30 03:29:09,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 337 to 332. [2018-01-30 03:29:09,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 332 states. [2018-01-30 03:29:09,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 332 states to 332 states and 335 transitions. [2018-01-30 03:29:09,830 INFO L78 Accepts]: Start accepts. Automaton has 332 states and 335 transitions. Word has length 316 [2018-01-30 03:29:09,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:09,830 INFO L432 AbstractCegarLoop]: Abstraction has 332 states and 335 transitions. [2018-01-30 03:29:09,830 INFO L433 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-01-30 03:29:09,831 INFO L276 IsEmpty]: Start isEmpty. Operand 332 states and 335 transitions. [2018-01-30 03:29:09,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 327 [2018-01-30 03:29:09,831 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:09,831 INFO L350 BasicCegarLoop]: trace histogram [49, 48, 48, 48, 20, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:09,832 INFO L371 AbstractCegarLoop]: === Iteration 50 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:09,832 INFO L82 PathProgramCache]: Analyzing trace with hash 1752302317, now seen corresponding path program 48 times [2018-01-30 03:29:09,832 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:09,832 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:09,832 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:09,832 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:29:09,832 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:09,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:09,840 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:10,776 INFO L134 CoverageAnalysis]: Checked inductivity of 5672 backedges. 0 proven. 4608 refuted. 0 times theorem prover too weak. 1064 trivial. 0 not checked. [2018-01-30 03:29:10,776 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:10,776 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:10,780 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-30 03:29:10,787 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,788 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,789 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,790 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,791 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,792 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,793 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,794 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,796 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,797 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,802 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,803 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,805 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,807 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,809 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,812 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,814 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,817 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,820 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,823 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,826 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,830 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,834 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,838 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,842 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,847 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,853 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,859 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,865 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,873 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,880 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,888 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,896 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,905 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,915 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,925 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,936 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,948 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,961 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:10,962 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:29:10,964 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:11,293 INFO L134 CoverageAnalysis]: Checked inductivity of 5672 backedges. 0 proven. 1064 refuted. 0 times theorem prover too weak. 4608 trivial. 0 not checked. [2018-01-30 03:29:11,311 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:11,311 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 41] total 70 [2018-01-30 03:29:11,311 INFO L409 AbstractCegarLoop]: Interpolant automaton has 70 states [2018-01-30 03:29:11,312 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2018-01-30 03:29:11,312 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1484, Invalid=3346, Unknown=0, NotChecked=0, Total=4830 [2018-01-30 03:29:11,312 INFO L87 Difference]: Start difference. First operand 332 states and 335 transitions. Second operand 70 states. [2018-01-30 03:29:12,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:12,006 INFO L93 Difference]: Finished difference Result 478 states and 485 transitions. [2018-01-30 03:29:12,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 89 states. [2018-01-30 03:29:12,006 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 326 [2018-01-30 03:29:12,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:12,007 INFO L225 Difference]: With dead ends: 478 [2018-01-30 03:29:12,007 INFO L226 Difference]: Without dead ends: 347 [2018-01-30 03:29:12,008 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 414 GetRequests, 308 SyntacticMatches, 0 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1615 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=4144, Invalid=7412, Unknown=0, NotChecked=0, Total=11556 [2018-01-30 03:29:12,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2018-01-30 03:29:12,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 342. [2018-01-30 03:29:12,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 342 states. [2018-01-30 03:29:12,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 342 states to 342 states and 345 transitions. [2018-01-30 03:29:12,021 INFO L78 Accepts]: Start accepts. Automaton has 342 states and 345 transitions. Word has length 326 [2018-01-30 03:29:12,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:12,021 INFO L432 AbstractCegarLoop]: Abstraction has 342 states and 345 transitions. [2018-01-30 03:29:12,021 INFO L433 AbstractCegarLoop]: Interpolant automaton has 70 states. [2018-01-30 03:29:12,021 INFO L276 IsEmpty]: Start isEmpty. Operand 342 states and 345 transitions. [2018-01-30 03:29:12,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 337 [2018-01-30 03:29:12,022 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:12,022 INFO L350 BasicCegarLoop]: trace histogram [50, 49, 49, 49, 21, 20, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:12,022 INFO L371 AbstractCegarLoop]: === Iteration 51 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:12,022 INFO L82 PathProgramCache]: Analyzing trace with hash 406709009, now seen corresponding path program 49 times [2018-01-30 03:29:12,022 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:12,022 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:12,023 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:12,023 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:29:12,023 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:12,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:12,037 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:12,940 INFO L134 CoverageAnalysis]: Checked inductivity of 5982 backedges. 0 proven. 4802 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-01-30 03:29:12,940 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:12,941 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:12,945 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:29:12,970 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:12,972 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:13,014 INFO L134 CoverageAnalysis]: Checked inductivity of 5982 backedges. 0 proven. 4802 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-01-30 03:29:13,030 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:13,031 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [52, 52] total 52 [2018-01-30 03:29:13,031 INFO L409 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-01-30 03:29:13,031 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-01-30 03:29:13,031 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-01-30 03:29:13,031 INFO L87 Difference]: Start difference. First operand 342 states and 345 transitions. Second operand 52 states. [2018-01-30 03:29:13,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:13,242 INFO L93 Difference]: Finished difference Result 485 states and 491 transitions. [2018-01-30 03:29:13,242 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-01-30 03:29:13,243 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 336 [2018-01-30 03:29:13,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:13,244 INFO L225 Difference]: With dead ends: 485 [2018-01-30 03:29:13,244 INFO L226 Difference]: Without dead ends: 348 [2018-01-30 03:29:13,244 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 387 GetRequests, 337 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-01-30 03:29:13,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 348 states. [2018-01-30 03:29:13,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 348 to 346. [2018-01-30 03:29:13,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 346 states. [2018-01-30 03:29:13,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 346 states to 346 states and 349 transitions. [2018-01-30 03:29:13,259 INFO L78 Accepts]: Start accepts. Automaton has 346 states and 349 transitions. Word has length 336 [2018-01-30 03:29:13,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:13,259 INFO L432 AbstractCegarLoop]: Abstraction has 346 states and 349 transitions. [2018-01-30 03:29:13,259 INFO L433 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-01-30 03:29:13,259 INFO L276 IsEmpty]: Start isEmpty. Operand 346 states and 349 transitions. [2018-01-30 03:29:13,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 341 [2018-01-30 03:29:13,260 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:13,260 INFO L350 BasicCegarLoop]: trace histogram [51, 50, 50, 50, 21, 20, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:13,260 INFO L371 AbstractCegarLoop]: === Iteration 52 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:13,260 INFO L82 PathProgramCache]: Analyzing trace with hash 111981739, now seen corresponding path program 50 times [2018-01-30 03:29:13,260 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:13,260 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:13,261 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:13,261 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:29:13,261 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:13,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:13,276 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:14,130 INFO L134 CoverageAnalysis]: Checked inductivity of 6180 backedges. 0 proven. 5000 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-01-30 03:29:14,130 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:14,130 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:14,135 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 03:29:14,141 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:14,157 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:14,160 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:29:14,162 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:14,206 INFO L134 CoverageAnalysis]: Checked inductivity of 6180 backedges. 0 proven. 5000 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-01-30 03:29:14,223 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:14,223 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [53, 53] total 53 [2018-01-30 03:29:14,224 INFO L409 AbstractCegarLoop]: Interpolant automaton has 53 states [2018-01-30 03:29:14,224 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2018-01-30 03:29:14,224 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1378, Invalid=1378, Unknown=0, NotChecked=0, Total=2756 [2018-01-30 03:29:14,224 INFO L87 Difference]: Start difference. First operand 346 states and 349 transitions. Second operand 53 states. [2018-01-30 03:29:14,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:14,358 INFO L93 Difference]: Finished difference Result 489 states and 495 transitions. [2018-01-30 03:29:14,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-01-30 03:29:14,359 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 340 [2018-01-30 03:29:14,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:14,359 INFO L225 Difference]: With dead ends: 489 [2018-01-30 03:29:14,360 INFO L226 Difference]: Without dead ends: 352 [2018-01-30 03:29:14,360 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 392 GetRequests, 341 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1378, Invalid=1378, Unknown=0, NotChecked=0, Total=2756 [2018-01-30 03:29:14,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 352 states. [2018-01-30 03:29:14,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 352 to 350. [2018-01-30 03:29:14,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 350 states. [2018-01-30 03:29:14,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 350 states to 350 states and 353 transitions. [2018-01-30 03:29:14,362 INFO L78 Accepts]: Start accepts. Automaton has 350 states and 353 transitions. Word has length 340 [2018-01-30 03:29:14,363 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:14,363 INFO L432 AbstractCegarLoop]: Abstraction has 350 states and 353 transitions. [2018-01-30 03:29:14,363 INFO L433 AbstractCegarLoop]: Interpolant automaton has 53 states. [2018-01-30 03:29:14,363 INFO L276 IsEmpty]: Start isEmpty. Operand 350 states and 353 transitions. [2018-01-30 03:29:14,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 345 [2018-01-30 03:29:14,364 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:14,364 INFO L350 BasicCegarLoop]: trace histogram [52, 51, 51, 51, 21, 20, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:14,364 INFO L371 AbstractCegarLoop]: === Iteration 53 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:14,364 INFO L82 PathProgramCache]: Analyzing trace with hash -1748686523, now seen corresponding path program 51 times [2018-01-30 03:29:14,364 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:14,364 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:14,364 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:14,364 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:29:14,364 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:14,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:14,372 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:15,263 INFO L134 CoverageAnalysis]: Checked inductivity of 6382 backedges. 0 proven. 5202 refuted. 0 times theorem prover too weak. 1180 trivial. 0 not checked. [2018-01-30 03:29:15,263 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:15,263 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:15,269 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-30 03:29:15,278 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,279 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,280 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,281 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,283 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,284 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,286 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,288 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,290 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,292 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,295 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,298 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,302 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,306 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,311 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,316 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,322 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,329 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,337 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,346 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,357 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:15,358 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:29:15,360 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:15,752 INFO L134 CoverageAnalysis]: Checked inductivity of 6382 backedges. 0 proven. 1180 refuted. 0 times theorem prover too weak. 5202 trivial. 0 not checked. [2018-01-30 03:29:15,771 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:15,771 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 43] total 74 [2018-01-30 03:29:15,771 INFO L409 AbstractCegarLoop]: Interpolant automaton has 74 states [2018-01-30 03:29:15,772 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2018-01-30 03:29:15,772 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1661, Invalid=3741, Unknown=0, NotChecked=0, Total=5402 [2018-01-30 03:29:15,772 INFO L87 Difference]: Start difference. First operand 350 states and 353 transitions. Second operand 74 states. [2018-01-30 03:29:16,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:16,484 INFO L93 Difference]: Finished difference Result 502 states and 509 transitions. [2018-01-30 03:29:16,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2018-01-30 03:29:16,484 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 344 [2018-01-30 03:29:16,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:16,485 INFO L225 Difference]: With dead ends: 502 [2018-01-30 03:29:16,485 INFO L226 Difference]: Without dead ends: 365 [2018-01-30 03:29:16,486 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 437 GetRequests, 325 SyntacticMatches, 0 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1800 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=4621, Invalid=8261, Unknown=0, NotChecked=0, Total=12882 [2018-01-30 03:29:16,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 365 states. [2018-01-30 03:29:16,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 365 to 360. [2018-01-30 03:29:16,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 360 states. [2018-01-30 03:29:16,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 360 states to 360 states and 363 transitions. [2018-01-30 03:29:16,489 INFO L78 Accepts]: Start accepts. Automaton has 360 states and 363 transitions. Word has length 344 [2018-01-30 03:29:16,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:16,489 INFO L432 AbstractCegarLoop]: Abstraction has 360 states and 363 transitions. [2018-01-30 03:29:16,489 INFO L433 AbstractCegarLoop]: Interpolant automaton has 74 states. [2018-01-30 03:29:16,489 INFO L276 IsEmpty]: Start isEmpty. Operand 360 states and 363 transitions. [2018-01-30 03:29:16,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 355 [2018-01-30 03:29:16,490 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:16,490 INFO L350 BasicCegarLoop]: trace histogram [53, 52, 52, 52, 22, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:16,490 INFO L371 AbstractCegarLoop]: === Iteration 54 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:16,490 INFO L82 PathProgramCache]: Analyzing trace with hash 1466971369, now seen corresponding path program 52 times [2018-01-30 03:29:16,490 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:16,490 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:16,491 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:16,491 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:29:16,491 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:16,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:16,499 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:17,419 INFO L134 CoverageAnalysis]: Checked inductivity of 6710 backedges. 0 proven. 5408 refuted. 0 times theorem prover too weak. 1302 trivial. 0 not checked. [2018-01-30 03:29:17,419 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:17,419 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:17,424 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-30 03:29:17,460 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:29:17,462 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:17,509 INFO L134 CoverageAnalysis]: Checked inductivity of 6710 backedges. 0 proven. 5408 refuted. 0 times theorem prover too weak. 1302 trivial. 0 not checked. [2018-01-30 03:29:17,532 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:17,532 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [55, 55] total 55 [2018-01-30 03:29:17,532 INFO L409 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-01-30 03:29:17,533 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-01-30 03:29:17,533 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1485, Invalid=1485, Unknown=0, NotChecked=0, Total=2970 [2018-01-30 03:29:17,533 INFO L87 Difference]: Start difference. First operand 360 states and 363 transitions. Second operand 55 states. [2018-01-30 03:29:17,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:17,719 INFO L93 Difference]: Finished difference Result 509 states and 515 transitions. [2018-01-30 03:29:17,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-01-30 03:29:17,720 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 354 [2018-01-30 03:29:17,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:17,720 INFO L225 Difference]: With dead ends: 509 [2018-01-30 03:29:17,720 INFO L226 Difference]: Without dead ends: 366 [2018-01-30 03:29:17,721 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 408 GetRequests, 355 SyntacticMatches, 0 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1485, Invalid=1485, Unknown=0, NotChecked=0, Total=2970 [2018-01-30 03:29:17,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366 states. [2018-01-30 03:29:17,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366 to 364. [2018-01-30 03:29:17,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 364 states. [2018-01-30 03:29:17,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 364 states to 364 states and 367 transitions. [2018-01-30 03:29:17,723 INFO L78 Accepts]: Start accepts. Automaton has 364 states and 367 transitions. Word has length 354 [2018-01-30 03:29:17,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:17,723 INFO L432 AbstractCegarLoop]: Abstraction has 364 states and 367 transitions. [2018-01-30 03:29:17,723 INFO L433 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-01-30 03:29:17,723 INFO L276 IsEmpty]: Start isEmpty. Operand 364 states and 367 transitions. [2018-01-30 03:29:17,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 359 [2018-01-30 03:29:17,724 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:17,724 INFO L350 BasicCegarLoop]: trace histogram [54, 53, 53, 53, 22, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:17,724 INFO L371 AbstractCegarLoop]: === Iteration 55 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:17,725 INFO L82 PathProgramCache]: Analyzing trace with hash -1733585917, now seen corresponding path program 53 times [2018-01-30 03:29:17,725 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:17,725 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:17,725 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:17,725 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:29:17,725 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:17,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:17,733 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:18,744 INFO L134 CoverageAnalysis]: Checked inductivity of 6920 backedges. 0 proven. 5618 refuted. 0 times theorem prover too weak. 1302 trivial. 0 not checked. [2018-01-30 03:29:18,744 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:18,744 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:18,749 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-30 03:29:18,755 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,755 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,756 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,757 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,757 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,758 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,759 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,760 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,761 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,763 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,764 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,766 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,767 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,769 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,772 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,774 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,777 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,780 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,783 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,787 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,791 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,796 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,801 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,807 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,813 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,820 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,828 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,837 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,847 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,857 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,869 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,881 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,895 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,911 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,928 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,947 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,968 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:18,991 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:19,016 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:19,043 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:19,072 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:19,103 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:19,136 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:19,172 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:19,211 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:19,253 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:19,299 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:19,348 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:19,401 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:19,459 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:19,521 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:19,588 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:19,660 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:19,888 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:19,891 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:29:19,895 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:19,942 INFO L134 CoverageAnalysis]: Checked inductivity of 6920 backedges. 0 proven. 5618 refuted. 0 times theorem prover too weak. 1302 trivial. 0 not checked. [2018-01-30 03:29:19,962 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:19,962 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [56, 56] total 56 [2018-01-30 03:29:19,962 INFO L409 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-01-30 03:29:19,962 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-01-30 03:29:19,963 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1540, Invalid=1540, Unknown=0, NotChecked=0, Total=3080 [2018-01-30 03:29:19,963 INFO L87 Difference]: Start difference. First operand 364 states and 367 transitions. Second operand 56 states. [2018-01-30 03:29:20,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:20,216 INFO L93 Difference]: Finished difference Result 513 states and 519 transitions. [2018-01-30 03:29:20,216 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2018-01-30 03:29:20,216 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 358 [2018-01-30 03:29:20,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:20,217 INFO L225 Difference]: With dead ends: 513 [2018-01-30 03:29:20,217 INFO L226 Difference]: Without dead ends: 370 [2018-01-30 03:29:20,217 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 413 GetRequests, 359 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1540, Invalid=1540, Unknown=0, NotChecked=0, Total=3080 [2018-01-30 03:29:20,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 370 states. [2018-01-30 03:29:20,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 370 to 368. [2018-01-30 03:29:20,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 368 states. [2018-01-30 03:29:20,220 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 368 states to 368 states and 371 transitions. [2018-01-30 03:29:20,220 INFO L78 Accepts]: Start accepts. Automaton has 368 states and 371 transitions. Word has length 358 [2018-01-30 03:29:20,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:20,220 INFO L432 AbstractCegarLoop]: Abstraction has 368 states and 371 transitions. [2018-01-30 03:29:20,220 INFO L433 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-01-30 03:29:20,220 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states and 371 transitions. [2018-01-30 03:29:20,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 363 [2018-01-30 03:29:20,221 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:20,221 INFO L350 BasicCegarLoop]: trace histogram [55, 54, 54, 54, 22, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:20,221 INFO L371 AbstractCegarLoop]: === Iteration 56 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:20,221 INFO L82 PathProgramCache]: Analyzing trace with hash 9295389, now seen corresponding path program 54 times [2018-01-30 03:29:20,221 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:20,221 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:20,222 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:20,222 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:29:20,222 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:20,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:20,230 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:21,194 INFO L134 CoverageAnalysis]: Checked inductivity of 7134 backedges. 0 proven. 5832 refuted. 0 times theorem prover too weak. 1302 trivial. 0 not checked. [2018-01-30 03:29:21,194 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:21,194 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:21,199 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-30 03:29:21,206 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,207 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,208 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,209 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,211 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,212 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,213 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,214 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,215 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,217 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,218 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,220 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,222 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,224 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,226 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,228 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,231 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,234 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,237 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,240 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,243 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,247 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,251 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,255 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,260 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,265 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,271 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,277 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,283 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,290 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,298 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,306 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,314 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,323 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,333 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,343 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,354 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,366 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,379 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,393 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,408 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,425 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,443 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:21,444 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:29:21,447 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:21,942 INFO L134 CoverageAnalysis]: Checked inductivity of 7134 backedges. 0 proven. 1302 refuted. 0 times theorem prover too weak. 5832 trivial. 0 not checked. [2018-01-30 03:29:21,959 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:21,959 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [57, 45] total 78 [2018-01-30 03:29:21,960 INFO L409 AbstractCegarLoop]: Interpolant automaton has 78 states [2018-01-30 03:29:21,960 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2018-01-30 03:29:21,960 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1848, Invalid=4158, Unknown=0, NotChecked=0, Total=6006 [2018-01-30 03:29:21,960 INFO L87 Difference]: Start difference. First operand 368 states and 371 transitions. Second operand 78 states. [2018-01-30 03:29:22,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:22,688 INFO L93 Difference]: Finished difference Result 526 states and 533 transitions. [2018-01-30 03:29:22,688 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 99 states. [2018-01-30 03:29:22,688 INFO L78 Accepts]: Start accepts. Automaton has 78 states. Word has length 362 [2018-01-30 03:29:22,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:22,689 INFO L225 Difference]: With dead ends: 526 [2018-01-30 03:29:22,689 INFO L226 Difference]: Without dead ends: 383 [2018-01-30 03:29:22,690 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 460 GetRequests, 342 SyntacticMatches, 0 SemanticMatches, 118 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1995 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=5124, Invalid=9156, Unknown=0, NotChecked=0, Total=14280 [2018-01-30 03:29:22,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 383 states. [2018-01-30 03:29:22,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 383 to 378. [2018-01-30 03:29:22,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 378 states. [2018-01-30 03:29:22,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 378 states to 378 states and 381 transitions. [2018-01-30 03:29:22,692 INFO L78 Accepts]: Start accepts. Automaton has 378 states and 381 transitions. Word has length 362 [2018-01-30 03:29:22,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:22,693 INFO L432 AbstractCegarLoop]: Abstraction has 378 states and 381 transitions. [2018-01-30 03:29:22,693 INFO L433 AbstractCegarLoop]: Interpolant automaton has 78 states. [2018-01-30 03:29:22,693 INFO L276 IsEmpty]: Start isEmpty. Operand 378 states and 381 transitions. [2018-01-30 03:29:22,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 373 [2018-01-30 03:29:22,694 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:22,694 INFO L350 BasicCegarLoop]: trace histogram [56, 55, 55, 55, 23, 22, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:22,694 INFO L371 AbstractCegarLoop]: === Iteration 57 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:22,694 INFO L82 PathProgramCache]: Analyzing trace with hash -1588540095, now seen corresponding path program 55 times [2018-01-30 03:29:22,694 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:22,694 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:22,694 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:22,695 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:29:22,695 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:22,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:22,703 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:23,767 INFO L134 CoverageAnalysis]: Checked inductivity of 7480 backedges. 0 proven. 6050 refuted. 0 times theorem prover too weak. 1430 trivial. 0 not checked. [2018-01-30 03:29:23,767 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:23,767 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:23,773 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:29:23,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:23,801 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:23,853 INFO L134 CoverageAnalysis]: Checked inductivity of 7480 backedges. 0 proven. 6050 refuted. 0 times theorem prover too weak. 1430 trivial. 0 not checked. [2018-01-30 03:29:23,872 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:23,872 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [58, 58] total 58 [2018-01-30 03:29:23,873 INFO L409 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-01-30 03:29:23,873 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-01-30 03:29:23,873 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1653, Invalid=1653, Unknown=0, NotChecked=0, Total=3306 [2018-01-30 03:29:23,873 INFO L87 Difference]: Start difference. First operand 378 states and 381 transitions. Second operand 58 states. [2018-01-30 03:29:24,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:24,043 INFO L93 Difference]: Finished difference Result 533 states and 539 transitions. [2018-01-30 03:29:24,043 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2018-01-30 03:29:24,043 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 372 [2018-01-30 03:29:24,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:24,044 INFO L225 Difference]: With dead ends: 533 [2018-01-30 03:29:24,044 INFO L226 Difference]: Without dead ends: 384 [2018-01-30 03:29:24,044 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 429 GetRequests, 373 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1653, Invalid=1653, Unknown=0, NotChecked=0, Total=3306 [2018-01-30 03:29:24,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 384 states. [2018-01-30 03:29:24,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 384 to 382. [2018-01-30 03:29:24,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 382 states. [2018-01-30 03:29:24,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 382 states to 382 states and 385 transitions. [2018-01-30 03:29:24,047 INFO L78 Accepts]: Start accepts. Automaton has 382 states and 385 transitions. Word has length 372 [2018-01-30 03:29:24,047 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:24,047 INFO L432 AbstractCegarLoop]: Abstraction has 382 states and 385 transitions. [2018-01-30 03:29:24,047 INFO L433 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-01-30 03:29:24,047 INFO L276 IsEmpty]: Start isEmpty. Operand 382 states and 385 transitions. [2018-01-30 03:29:24,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 377 [2018-01-30 03:29:24,048 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:24,048 INFO L350 BasicCegarLoop]: trace histogram [57, 56, 56, 56, 23, 22, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:24,049 INFO L371 AbstractCegarLoop]: === Iteration 58 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:24,049 INFO L82 PathProgramCache]: Analyzing trace with hash 1197496795, now seen corresponding path program 56 times [2018-01-30 03:29:24,049 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:24,049 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:24,049 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:24,049 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 03:29:24,049 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:24,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:24,058 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:25,089 INFO L134 CoverageAnalysis]: Checked inductivity of 7702 backedges. 0 proven. 6272 refuted. 0 times theorem prover too weak. 1430 trivial. 0 not checked. [2018-01-30 03:29:25,089 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:25,089 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:25,096 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 03:29:25,103 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:25,121 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:25,125 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:29:25,127 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:25,179 INFO L134 CoverageAnalysis]: Checked inductivity of 7702 backedges. 0 proven. 6272 refuted. 0 times theorem prover too weak. 1430 trivial. 0 not checked. [2018-01-30 03:29:25,195 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:25,195 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [59, 59] total 59 [2018-01-30 03:29:25,196 INFO L409 AbstractCegarLoop]: Interpolant automaton has 59 states [2018-01-30 03:29:25,196 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2018-01-30 03:29:25,196 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1711, Invalid=1711, Unknown=0, NotChecked=0, Total=3422 [2018-01-30 03:29:25,196 INFO L87 Difference]: Start difference. First operand 382 states and 385 transitions. Second operand 59 states. [2018-01-30 03:29:25,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:25,328 INFO L93 Difference]: Finished difference Result 537 states and 543 transitions. [2018-01-30 03:29:25,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-01-30 03:29:25,329 INFO L78 Accepts]: Start accepts. Automaton has 59 states. Word has length 376 [2018-01-30 03:29:25,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:25,330 INFO L225 Difference]: With dead ends: 537 [2018-01-30 03:29:25,330 INFO L226 Difference]: Without dead ends: 388 [2018-01-30 03:29:25,330 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 434 GetRequests, 377 SyntacticMatches, 0 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1711, Invalid=1711, Unknown=0, NotChecked=0, Total=3422 [2018-01-30 03:29:25,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 388 states. [2018-01-30 03:29:25,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 388 to 386. [2018-01-30 03:29:25,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 386 states. [2018-01-30 03:29:25,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 386 states to 386 states and 389 transitions. [2018-01-30 03:29:25,333 INFO L78 Accepts]: Start accepts. Automaton has 386 states and 389 transitions. Word has length 376 [2018-01-30 03:29:25,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:25,333 INFO L432 AbstractCegarLoop]: Abstraction has 386 states and 389 transitions. [2018-01-30 03:29:25,333 INFO L433 AbstractCegarLoop]: Interpolant automaton has 59 states. [2018-01-30 03:29:25,333 INFO L276 IsEmpty]: Start isEmpty. Operand 386 states and 389 transitions. [2018-01-30 03:29:25,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 381 [2018-01-30 03:29:25,334 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:25,334 INFO L350 BasicCegarLoop]: trace histogram [58, 57, 57, 57, 23, 22, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:25,334 INFO L371 AbstractCegarLoop]: === Iteration 59 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:25,334 INFO L82 PathProgramCache]: Analyzing trace with hash 189008245, now seen corresponding path program 57 times [2018-01-30 03:29:25,334 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:25,334 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:25,335 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:25,338 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:29:25,338 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:25,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:25,348 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:26,442 INFO L134 CoverageAnalysis]: Checked inductivity of 7928 backedges. 0 proven. 6498 refuted. 0 times theorem prover too weak. 1430 trivial. 0 not checked. [2018-01-30 03:29:26,443 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:26,443 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:26,448 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-30 03:29:26,456 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,457 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,458 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,459 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,460 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,462 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,463 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,465 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,468 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,470 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,473 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,476 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,480 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,484 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,489 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,494 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,500 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,507 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,515 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,525 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,536 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,548 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,561 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 03:29:26,561 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:29:26,564 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:27,021 INFO L134 CoverageAnalysis]: Checked inductivity of 7928 backedges. 0 proven. 1430 refuted. 0 times theorem prover too weak. 6498 trivial. 0 not checked. [2018-01-30 03:29:27,041 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:27,041 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [60, 47] total 82 [2018-01-30 03:29:27,042 INFO L409 AbstractCegarLoop]: Interpolant automaton has 82 states [2018-01-30 03:29:27,042 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 82 interpolants. [2018-01-30 03:29:27,042 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2045, Invalid=4597, Unknown=0, NotChecked=0, Total=6642 [2018-01-30 03:29:27,042 INFO L87 Difference]: Start difference. First operand 386 states and 389 transitions. Second operand 82 states. [2018-01-30 03:29:27,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:27,879 INFO L93 Difference]: Finished difference Result 550 states and 557 transitions. [2018-01-30 03:29:27,879 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 104 states. [2018-01-30 03:29:27,879 INFO L78 Accepts]: Start accepts. Automaton has 82 states. Word has length 380 [2018-01-30 03:29:27,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:27,880 INFO L225 Difference]: With dead ends: 550 [2018-01-30 03:29:27,880 INFO L226 Difference]: Without dead ends: 401 [2018-01-30 03:29:27,881 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 483 GetRequests, 359 SyntacticMatches, 0 SemanticMatches, 124 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2200 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=5653, Invalid=10097, Unknown=0, NotChecked=0, Total=15750 [2018-01-30 03:29:27,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 401 states. [2018-01-30 03:29:27,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 401 to 396. [2018-01-30 03:29:27,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 396 states. [2018-01-30 03:29:27,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 399 transitions. [2018-01-30 03:29:27,884 INFO L78 Accepts]: Start accepts. Automaton has 396 states and 399 transitions. Word has length 380 [2018-01-30 03:29:27,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:27,884 INFO L432 AbstractCegarLoop]: Abstraction has 396 states and 399 transitions. [2018-01-30 03:29:27,884 INFO L433 AbstractCegarLoop]: Interpolant automaton has 82 states. [2018-01-30 03:29:27,884 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 399 transitions. [2018-01-30 03:29:27,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 391 [2018-01-30 03:29:27,885 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:27,885 INFO L350 BasicCegarLoop]: trace histogram [59, 58, 58, 58, 24, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:27,885 INFO L371 AbstractCegarLoop]: === Iteration 60 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:27,885 INFO L82 PathProgramCache]: Analyzing trace with hash 967814169, now seen corresponding path program 58 times [2018-01-30 03:29:27,885 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:27,885 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:27,886 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:27,886 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:29:27,886 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:27,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:27,895 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:29,065 INFO L134 CoverageAnalysis]: Checked inductivity of 8292 backedges. 0 proven. 6728 refuted. 0 times theorem prover too weak. 1564 trivial. 0 not checked. [2018-01-30 03:29:29,065 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:29,065 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:29,069 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-30 03:29:29,111 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:29:29,113 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:29,168 INFO L134 CoverageAnalysis]: Checked inductivity of 8292 backedges. 0 proven. 6728 refuted. 0 times theorem prover too weak. 1564 trivial. 0 not checked. [2018-01-30 03:29:29,185 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:29,186 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [61, 61] total 61 [2018-01-30 03:29:29,186 INFO L409 AbstractCegarLoop]: Interpolant automaton has 61 states [2018-01-30 03:29:29,186 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 61 interpolants. [2018-01-30 03:29:29,186 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1830, Invalid=1830, Unknown=0, NotChecked=0, Total=3660 [2018-01-30 03:29:29,186 INFO L87 Difference]: Start difference. First operand 396 states and 399 transitions. Second operand 61 states. [2018-01-30 03:29:29,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:29,355 INFO L93 Difference]: Finished difference Result 557 states and 563 transitions. [2018-01-30 03:29:29,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-01-30 03:29:29,355 INFO L78 Accepts]: Start accepts. Automaton has 61 states. Word has length 390 [2018-01-30 03:29:29,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:29,356 INFO L225 Difference]: With dead ends: 557 [2018-01-30 03:29:29,356 INFO L226 Difference]: Without dead ends: 402 [2018-01-30 03:29:29,357 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 450 GetRequests, 391 SyntacticMatches, 0 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1830, Invalid=1830, Unknown=0, NotChecked=0, Total=3660 [2018-01-30 03:29:29,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 402 states. [2018-01-30 03:29:29,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 402 to 400. [2018-01-30 03:29:29,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 400 states. [2018-01-30 03:29:29,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 400 states to 400 states and 403 transitions. [2018-01-30 03:29:29,359 INFO L78 Accepts]: Start accepts. Automaton has 400 states and 403 transitions. Word has length 390 [2018-01-30 03:29:29,359 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:29,359 INFO L432 AbstractCegarLoop]: Abstraction has 400 states and 403 transitions. [2018-01-30 03:29:29,359 INFO L433 AbstractCegarLoop]: Interpolant automaton has 61 states. [2018-01-30 03:29:29,359 INFO L276 IsEmpty]: Start isEmpty. Operand 400 states and 403 transitions. [2018-01-30 03:29:29,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 395 [2018-01-30 03:29:29,360 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:29,361 INFO L350 BasicCegarLoop]: trace histogram [60, 59, 59, 59, 24, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:29,361 INFO L371 AbstractCegarLoop]: === Iteration 61 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:29,361 INFO L82 PathProgramCache]: Analyzing trace with hash -850381, now seen corresponding path program 59 times [2018-01-30 03:29:29,361 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:29,361 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:29,361 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:29,361 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:29:29,361 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:29,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:29,370 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:30,632 INFO L134 CoverageAnalysis]: Checked inductivity of 8526 backedges. 0 proven. 6962 refuted. 0 times theorem prover too weak. 1564 trivial. 0 not checked. [2018-01-30 03:29:30,632 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:30,633 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:30,637 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-30 03:29:30,643 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,644 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,645 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,645 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,646 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,647 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,648 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,649 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,650 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,651 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,653 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,654 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,656 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,658 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,660 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,663 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,666 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,669 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,672 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,676 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,680 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,685 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,690 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,695 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,702 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,709 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,717 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,725 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,735 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,745 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,757 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,769 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,783 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,798 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,814 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,832 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,852 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,874 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,898 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,924 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,952 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:30,981 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:31,013 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:31,047 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:31,084 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:31,124 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:31,168 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:31,213 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:31,271 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:31,327 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:31,386 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:31,448 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:31,516 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:31,589 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:31,664 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:31,742 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:31,825 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:31,911 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:32,004 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:32,168 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 03:29:32,170 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:29:32,175 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:32,235 INFO L134 CoverageAnalysis]: Checked inductivity of 8526 backedges. 0 proven. 6962 refuted. 0 times theorem prover too weak. 1564 trivial. 0 not checked. [2018-01-30 03:29:32,257 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:32,257 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [62, 62] total 62 [2018-01-30 03:29:32,258 INFO L409 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-01-30 03:29:32,258 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-01-30 03:29:32,258 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1891, Invalid=1891, Unknown=0, NotChecked=0, Total=3782 [2018-01-30 03:29:32,258 INFO L87 Difference]: Start difference. First operand 400 states and 403 transitions. Second operand 62 states. [2018-01-30 03:29:32,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 03:29:32,443 INFO L93 Difference]: Finished difference Result 561 states and 567 transitions. [2018-01-30 03:29:32,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-01-30 03:29:32,443 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 394 [2018-01-30 03:29:32,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 03:29:32,444 INFO L225 Difference]: With dead ends: 561 [2018-01-30 03:29:32,444 INFO L226 Difference]: Without dead ends: 406 [2018-01-30 03:29:32,444 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 455 GetRequests, 395 SyntacticMatches, 0 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1891, Invalid=1891, Unknown=0, NotChecked=0, Total=3782 [2018-01-30 03:29:32,444 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 406 states. [2018-01-30 03:29:32,446 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 406 to 404. [2018-01-30 03:29:32,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 404 states. [2018-01-30 03:29:32,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 404 states to 404 states and 407 transitions. [2018-01-30 03:29:32,447 INFO L78 Accepts]: Start accepts. Automaton has 404 states and 407 transitions. Word has length 394 [2018-01-30 03:29:32,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 03:29:32,447 INFO L432 AbstractCegarLoop]: Abstraction has 404 states and 407 transitions. [2018-01-30 03:29:32,447 INFO L433 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-01-30 03:29:32,447 INFO L276 IsEmpty]: Start isEmpty. Operand 404 states and 407 transitions. [2018-01-30 03:29:32,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 399 [2018-01-30 03:29:32,448 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 03:29:32,448 INFO L350 BasicCegarLoop]: trace histogram [61, 60, 60, 60, 24, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 03:29:32,448 INFO L371 AbstractCegarLoop]: === Iteration 62 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-30 03:29:32,448 INFO L82 PathProgramCache]: Analyzing trace with hash -496516275, now seen corresponding path program 60 times [2018-01-30 03:29:32,448 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 03:29:32,448 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 03:29:32,449 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:32,449 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 03:29:32,449 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 03:29:32,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 03:29:32,458 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 03:29:33,637 INFO L134 CoverageAnalysis]: Checked inductivity of 8764 backedges. 0 proven. 7200 refuted. 0 times theorem prover too weak. 1564 trivial. 0 not checked. [2018-01-30 03:29:33,637 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 03:29:33,637 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 03:29:33,642 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-30 03:29:33,650 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,651 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,652 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,652 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,653 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,654 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,656 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,657 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,658 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,659 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,661 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,662 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,664 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,666 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,668 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,670 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,673 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,676 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,679 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,682 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,685 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,689 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,693 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,697 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,702 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,707 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,712 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,718 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,725 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,732 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,740 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,748 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,756 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,765 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,774 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,785 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,796 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,808 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,821 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,835 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,850 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,866 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,884 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,901 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,921 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,941 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,962 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 03:29:33,963 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 03:29:33,966 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 03:29:34,460 INFO L134 CoverageAnalysis]: Checked inductivity of 8764 backedges. 0 proven. 1564 refuted. 0 times theorem prover too weak. 7200 trivial. 0 not checked. [2018-01-30 03:29:34,480 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 03:29:34,480 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [63, 49] total 86 [2018-01-30 03:29:34,480 INFO L409 AbstractCegarLoop]: Interpolant automaton has 86 states [2018-01-30 03:29:34,480 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 86 interpolants. [2018-01-30 03:29:34,481 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2252, Invalid=5058, Unknown=0, NotChecked=0, Total=7310 [2018-01-30 03:29:34,481 INFO L87 Difference]: Start difference. First operand 404 states and 407 transitions. Second operand 86 states. Received shutdown request... [2018-01-30 03:29:34,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2018-01-30 03:29:34,686 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-30 03:29:34,690 WARN L185 ceAbstractionStarter]: Timeout [2018-01-30 03:29:34,690 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 30.01 03:29:34 BasicIcfg [2018-01-30 03:29:34,690 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-30 03:29:34,690 INFO L168 Benchmark]: Toolchain (without parser) took 67169.64 ms. Allocated memory was 149.9 MB in the beginning and 1.2 GB in the end (delta: 1.1 GB). Free memory was 113.7 MB in the beginning and 881.0 MB in the end (delta: -767.3 MB). Peak memory consumption was 309.6 MB. Max. memory is 5.3 GB. [2018-01-30 03:29:34,691 INFO L168 Benchmark]: CDTParser took 0.09 ms. Allocated memory is still 149.9 MB. Free memory is still 118.4 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-30 03:29:34,691 INFO L168 Benchmark]: CACSL2BoogieTranslator took 110.47 ms. Allocated memory is still 149.9 MB. Free memory was 113.5 MB in the beginning and 105.3 MB in the end (delta: 8.1 MB). Peak memory consumption was 8.1 MB. Max. memory is 5.3 GB. [2018-01-30 03:29:34,691 INFO L168 Benchmark]: Boogie Preprocessor took 16.85 ms. Allocated memory is still 149.9 MB. Free memory was 105.3 MB in the beginning and 104.0 MB in the end (delta: 1.4 MB). Peak memory consumption was 1.4 MB. Max. memory is 5.3 GB. [2018-01-30 03:29:34,692 INFO L168 Benchmark]: RCFGBuilder took 380.73 ms. Allocated memory is still 149.9 MB. Free memory was 103.8 MB in the beginning and 92.3 MB in the end (delta: 11.4 MB). Peak memory consumption was 11.4 MB. Max. memory is 5.3 GB. [2018-01-30 03:29:34,692 INFO L168 Benchmark]: IcfgTransformer took 12.11 ms. Allocated memory is still 149.9 MB. Free memory was 92.3 MB in the beginning and 91.2 MB in the end (delta: 1.1 MB). Peak memory consumption was 1.1 MB. Max. memory is 5.3 GB. [2018-01-30 03:29:34,692 INFO L168 Benchmark]: TraceAbstraction took 66647.09 ms. Allocated memory was 149.9 MB in the beginning and 1.2 GB in the end (delta: 1.1 GB). Free memory was 91.0 MB in the beginning and 881.0 MB in the end (delta: -790.0 MB). Peak memory consumption was 286.9 MB. Max. memory is 5.3 GB. [2018-01-30 03:29:34,693 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09 ms. Allocated memory is still 149.9 MB. Free memory is still 118.4 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 110.47 ms. Allocated memory is still 149.9 MB. Free memory was 113.5 MB in the beginning and 105.3 MB in the end (delta: 8.1 MB). Peak memory consumption was 8.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 16.85 ms. Allocated memory is still 149.9 MB. Free memory was 105.3 MB in the beginning and 104.0 MB in the end (delta: 1.4 MB). Peak memory consumption was 1.4 MB. Max. memory is 5.3 GB. * RCFGBuilder took 380.73 ms. Allocated memory is still 149.9 MB. Free memory was 103.8 MB in the beginning and 92.3 MB in the end (delta: 11.4 MB). Peak memory consumption was 11.4 MB. Max. memory is 5.3 GB. * IcfgTransformer took 12.11 ms. Allocated memory is still 149.9 MB. Free memory was 92.3 MB in the beginning and 91.2 MB in the end (delta: 1.1 MB). Peak memory consumption was 1.1 MB. Max. memory is 5.3 GB. * TraceAbstraction took 66647.09 ms. Allocated memory was 149.9 MB in the beginning and 1.2 GB in the end (delta: 1.1 GB). Free memory was 91.0 MB in the beginning and 881.0 MB in the end (delta: -790.0 MB). Peak memory consumption was 286.9 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 2]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 2). Cancelled while BasicCegarLoop was constructing difference of abstraction (404states) and interpolant automaton (currently 70 states, 86 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 7. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 37 locations, 1 error locations. TIMEOUT Result, 66.6s OverallTime, 62 OverallIterations, 61 TraceHistogramMax, 18.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1770 SDtfs, 5826 SDslu, 34222 SDs, 0 SdLazy, 15300 SolverSat, 978 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 9.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 15231 GetRequests, 12550 SyntacticMatches, 0 SemanticMatches, 2680 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18733 ImplicationChecksByTransitivity, 35.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=404occurred in iteration=61, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 61 MinimizatonAttempts, 195 StatesRemovedByMinimization, 60 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 6.8s SatisfiabilityAnalysisTime, 37.9s InterpolantComputationTime, 25562 NumberOfCodeBlocks, 24498 NumberOfCodeBlocksAsserted, 826 NumberOfCheckSat, 25440 ConstructedInterpolants, 0 QuantifiedInterpolants, 14260742 SizeOfPredicates, 612 NumberOfNonLiveVariables, 15516 ConjunctsInSsa, 1769 ConjunctsInUnsatCore, 122 InterpolantComputations, 2 PerfectInterpolantSequences, 112270/360372 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_copyInit_true-unreach-call_ground.i_svcomp-Reach-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-Benchmark-0-2018-01-30_03-29-34-697.csv Written .csv to /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_copyInit_true-unreach-call_ground.i_svcomp-Reach-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-30_03-29-34-697.csv Completed graceful shutdown