java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/memsafety/20051113-1.c_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-5f7ec6e [2018-01-31 09:05:45,652 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-31 09:05:45,654 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-31 09:05:45,676 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-31 09:05:45,676 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-31 09:05:45,677 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-31 09:05:45,678 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-31 09:05:45,682 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-31 09:05:45,684 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-31 09:05:45,693 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-31 09:05:45,694 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-31 09:05:45,694 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-31 09:05:45,695 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-31 09:05:45,696 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-31 09:05:45,697 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-31 09:05:45,702 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-31 09:05:45,704 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-31 09:05:45,708 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-31 09:05:45,709 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-31 09:05:45,710 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-31 09:05:45,714 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-31 09:05:45,714 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-31 09:05:45,714 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-31 09:05:45,715 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-31 09:05:45,717 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-31 09:05:45,718 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-31 09:05:45,718 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-31 09:05:45,719 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-31 09:05:45,719 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-31 09:05:45,719 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-31 09:05:45,720 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-31 09:05:45,720 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-31 09:05:45,730 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-31 09:05:45,730 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-31 09:05:45,731 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-31 09:05:45,731 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-31 09:05:45,732 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-31 09:05:45,732 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-31 09:05:45,734 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-31 09:05:45,735 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-31 09:05:45,735 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-31 09:05:45,735 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-31 09:05:45,735 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-31 09:05:45,735 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-31 09:05:45,735 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-31 09:05:45,736 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-31 09:05:45,736 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-31 09:05:45,736 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-31 09:05:45,736 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-31 09:05:45,736 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-31 09:05:45,736 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-31 09:05:45,737 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-31 09:05:45,737 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-31 09:05:45,738 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-31 09:05:45,738 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-31 09:05:45,739 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-31 09:05:45,739 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-31 09:05:45,739 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-31 09:05:45,739 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-31 09:05:45,739 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-31 09:05:45,740 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-31 09:05:45,740 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-31 09:05:45,740 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-31 09:05:45,740 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-31 09:05:45,741 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-31 09:05:45,741 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-31 09:05:45,782 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-31 09:05:45,794 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-31 09:05:45,797 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-31 09:05:45,798 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-31 09:05:45,798 INFO L276 PluginConnector]: CDTParser initialized [2018-01-31 09:05:45,799 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety/20051113-1.c_false-valid-memtrack.i [2018-01-31 09:05:46,007 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-31 09:05:46,014 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-31 09:05:46,015 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-31 09:05:46,015 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-31 09:05:46,022 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-31 09:05:46,023 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.01 09:05:45" (1/1) ... [2018-01-31 09:05:46,027 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@21155711 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.01 09:05:46, skipping insertion in model container [2018-01-31 09:05:46,027 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 31.01 09:05:45" (1/1) ... [2018-01-31 09:05:46,045 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-31 09:05:46,097 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-31 09:05:46,258 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-31 09:05:46,306 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-31 09:05:46,320 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.01 09:05:46 WrapperNode [2018-01-31 09:05:46,320 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-31 09:05:46,321 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-31 09:05:46,321 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-31 09:05:46,321 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-31 09:05:46,337 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.01 09:05:46" (1/1) ... [2018-01-31 09:05:46,338 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.01 09:05:46" (1/1) ... [2018-01-31 09:05:46,351 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.01 09:05:46" (1/1) ... [2018-01-31 09:05:46,351 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.01 09:05:46" (1/1) ... [2018-01-31 09:05:46,358 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.01 09:05:46" (1/1) ... [2018-01-31 09:05:46,370 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.01 09:05:46" (1/1) ... [2018-01-31 09:05:46,373 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.01 09:05:46" (1/1) ... [2018-01-31 09:05:46,375 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-31 09:05:46,382 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-31 09:05:46,382 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-31 09:05:46,382 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-31 09:05:46,383 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.01 09:05:46" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-31 09:05:46,461 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-31 09:05:46,461 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-31 09:05:46,461 INFO L136 BoogieDeclarations]: Found implementation of procedure Sum [2018-01-31 09:05:46,461 INFO L136 BoogieDeclarations]: Found implementation of procedure Sum2 [2018-01-31 09:05:46,461 INFO L136 BoogieDeclarations]: Found implementation of procedure dummy_abort [2018-01-31 09:05:46,461 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-31 09:05:46,462 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-31 09:05:46,462 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-31 09:05:46,462 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-31 09:05:46,462 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-31 09:05:46,462 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-31 09:05:46,462 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-31 09:05:46,462 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-31 09:05:46,463 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-31 09:05:46,463 INFO L128 BoogieDeclarations]: Found specification of procedure Sum [2018-01-31 09:05:46,465 INFO L128 BoogieDeclarations]: Found specification of procedure Sum2 [2018-01-31 09:05:46,465 INFO L128 BoogieDeclarations]: Found specification of procedure dummy_abort [2018-01-31 09:05:46,465 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-31 09:05:46,465 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-31 09:05:46,465 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-31 09:05:46,806 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-31 09:05:47,137 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-31 09:05:47,141 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.01 09:05:47 BoogieIcfgContainer [2018-01-31 09:05:47,157 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-31 09:05:47,158 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-31 09:05:47,158 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-31 09:05:47,161 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-31 09:05:47,161 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 31.01 09:05:45" (1/3) ... [2018-01-31 09:05:47,162 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7dba6cd7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 31.01 09:05:47, skipping insertion in model container [2018-01-31 09:05:47,162 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 31.01 09:05:46" (2/3) ... [2018-01-31 09:05:47,162 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7dba6cd7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 31.01 09:05:47, skipping insertion in model container [2018-01-31 09:05:47,163 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.01 09:05:47" (3/3) ... [2018-01-31 09:05:47,165 INFO L107 eAbstractionObserver]: Analyzing ICFG 20051113-1.c_false-valid-memtrack.i [2018-01-31 09:05:47,174 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-31 09:05:47,180 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 25 error locations. [2018-01-31 09:05:47,220 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-31 09:05:47,220 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-31 09:05:47,220 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-31 09:05:47,220 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-31 09:05:47,220 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-31 09:05:47,220 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-31 09:05:47,221 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-31 09:05:47,221 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-31 09:05:47,221 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-31 09:05:47,246 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states. [2018-01-31 09:05:47,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-01-31 09:05:47,254 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:05:47,256 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:05:47,256 INFO L371 AbstractCegarLoop]: === Iteration 1 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:05:47,264 INFO L82 PathProgramCache]: Analyzing trace with hash 205931100, now seen corresponding path program 1 times [2018-01-31 09:05:47,266 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:05:47,267 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:05:47,325 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:47,325 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:05:47,325 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:47,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:05:47,392 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:05:47,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-31 09:05:47,597 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-31 09:05:47,597 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-31 09:05:47,599 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-31 09:05:47,610 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-31 09:05:47,610 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-31 09:05:47,612 INFO L87 Difference]: Start difference. First operand 105 states. Second operand 4 states. [2018-01-31 09:05:48,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:05:48,301 INFO L93 Difference]: Finished difference Result 149 states and 161 transitions. [2018-01-31 09:05:48,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-31 09:05:48,302 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 9 [2018-01-31 09:05:48,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:05:48,313 INFO L225 Difference]: With dead ends: 149 [2018-01-31 09:05:48,313 INFO L226 Difference]: Without dead ends: 94 [2018-01-31 09:05:48,317 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-31 09:05:48,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-01-31 09:05:48,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 94. [2018-01-31 09:05:48,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-01-31 09:05:48,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 99 transitions. [2018-01-31 09:05:48,359 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 99 transitions. Word has length 9 [2018-01-31 09:05:48,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:05:48,360 INFO L432 AbstractCegarLoop]: Abstraction has 94 states and 99 transitions. [2018-01-31 09:05:48,360 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-31 09:05:48,360 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 99 transitions. [2018-01-31 09:05:48,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-01-31 09:05:48,361 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:05:48,361 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:05:48,361 INFO L371 AbstractCegarLoop]: === Iteration 2 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:05:48,361 INFO L82 PathProgramCache]: Analyzing trace with hash 205931101, now seen corresponding path program 1 times [2018-01-31 09:05:48,362 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:05:48,362 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:05:48,363 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:48,363 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:05:48,363 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:48,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:05:48,378 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:05:48,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-31 09:05:48,566 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-31 09:05:48,566 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-31 09:05:48,567 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-31 09:05:48,568 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-31 09:05:48,568 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-31 09:05:48,568 INFO L87 Difference]: Start difference. First operand 94 states and 99 transitions. Second operand 4 states. [2018-01-31 09:05:48,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:05:48,810 INFO L93 Difference]: Finished difference Result 94 states and 99 transitions. [2018-01-31 09:05:48,810 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-31 09:05:48,811 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 9 [2018-01-31 09:05:48,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:05:48,812 INFO L225 Difference]: With dead ends: 94 [2018-01-31 09:05:48,813 INFO L226 Difference]: Without dead ends: 86 [2018-01-31 09:05:48,814 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-31 09:05:48,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-01-31 09:05:48,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 86. [2018-01-31 09:05:48,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-01-31 09:05:48,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 91 transitions. [2018-01-31 09:05:48,825 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 91 transitions. Word has length 9 [2018-01-31 09:05:48,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:05:48,825 INFO L432 AbstractCegarLoop]: Abstraction has 86 states and 91 transitions. [2018-01-31 09:05:48,825 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-31 09:05:48,825 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 91 transitions. [2018-01-31 09:05:48,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-31 09:05:48,826 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:05:48,827 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:05:48,827 INFO L371 AbstractCegarLoop]: === Iteration 3 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:05:48,827 INFO L82 PathProgramCache]: Analyzing trace with hash -335392502, now seen corresponding path program 1 times [2018-01-31 09:05:48,827 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:05:48,827 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:05:48,828 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:48,829 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:05:48,829 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:48,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:05:48,860 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:05:48,990 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-31 09:05:48,990 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-31 09:05:48,991 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-31 09:05:48,991 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-31 09:05:48,991 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-31 09:05:48,991 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-31 09:05:48,992 INFO L87 Difference]: Start difference. First operand 86 states and 91 transitions. Second operand 5 states. [2018-01-31 09:05:49,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:05:49,499 INFO L93 Difference]: Finished difference Result 86 states and 91 transitions. [2018-01-31 09:05:49,499 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-31 09:05:49,500 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-01-31 09:05:49,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:05:49,501 INFO L225 Difference]: With dead ends: 86 [2018-01-31 09:05:49,501 INFO L226 Difference]: Without dead ends: 84 [2018-01-31 09:05:49,502 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-31 09:05:49,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2018-01-31 09:05:49,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 84. [2018-01-31 09:05:49,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-01-31 09:05:49,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 89 transitions. [2018-01-31 09:05:49,513 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 89 transitions. Word has length 30 [2018-01-31 09:05:49,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:05:49,513 INFO L432 AbstractCegarLoop]: Abstraction has 84 states and 89 transitions. [2018-01-31 09:05:49,513 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-31 09:05:49,514 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 89 transitions. [2018-01-31 09:05:49,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-31 09:05:49,515 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:05:49,515 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:05:49,515 INFO L371 AbstractCegarLoop]: === Iteration 4 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:05:49,515 INFO L82 PathProgramCache]: Analyzing trace with hash -335392501, now seen corresponding path program 1 times [2018-01-31 09:05:49,515 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:05:49,515 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:05:49,516 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:49,517 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:05:49,517 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:49,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:05:49,538 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:05:49,690 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-31 09:05:49,691 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-31 09:05:49,691 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-31 09:05:49,691 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-31 09:05:49,692 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-31 09:05:49,692 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-31 09:05:49,692 INFO L87 Difference]: Start difference. First operand 84 states and 89 transitions. Second operand 6 states. [2018-01-31 09:05:49,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:05:49,862 INFO L93 Difference]: Finished difference Result 84 states and 89 transitions. [2018-01-31 09:05:49,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-31 09:05:49,863 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-01-31 09:05:49,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:05:49,864 INFO L225 Difference]: With dead ends: 84 [2018-01-31 09:05:49,864 INFO L226 Difference]: Without dead ends: 83 [2018-01-31 09:05:49,865 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-31 09:05:49,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-01-31 09:05:49,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2018-01-31 09:05:49,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2018-01-31 09:05:49,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 88 transitions. [2018-01-31 09:05:49,875 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 88 transitions. Word has length 30 [2018-01-31 09:05:49,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:05:49,876 INFO L432 AbstractCegarLoop]: Abstraction has 83 states and 88 transitions. [2018-01-31 09:05:49,876 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-31 09:05:49,876 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 88 transitions. [2018-01-31 09:05:49,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-31 09:05:49,877 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:05:49,877 INFO L351 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:05:49,877 INFO L371 AbstractCegarLoop]: === Iteration 5 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:05:49,878 INFO L82 PathProgramCache]: Analyzing trace with hash -1584065769, now seen corresponding path program 1 times [2018-01-31 09:05:49,878 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:05:49,878 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:05:49,879 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:49,879 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:05:49,879 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:49,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:05:49,905 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:05:50,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-31 09:05:50,708 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-31 09:05:50,708 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-31 09:05:50,708 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-31 09:05:50,708 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-31 09:05:50,709 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-31 09:05:50,709 INFO L87 Difference]: Start difference. First operand 83 states and 88 transitions. Second operand 10 states. [2018-01-31 09:05:51,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:05:51,198 INFO L93 Difference]: Finished difference Result 135 states and 144 transitions. [2018-01-31 09:05:51,198 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-31 09:05:51,198 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 33 [2018-01-31 09:05:51,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:05:51,199 INFO L225 Difference]: With dead ends: 135 [2018-01-31 09:05:51,199 INFO L226 Difference]: Without dead ends: 92 [2018-01-31 09:05:51,200 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 6 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2018-01-31 09:05:51,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2018-01-31 09:05:51,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 88. [2018-01-31 09:05:51,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-01-31 09:05:51,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 93 transitions. [2018-01-31 09:05:51,213 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 93 transitions. Word has length 33 [2018-01-31 09:05:51,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:05:51,213 INFO L432 AbstractCegarLoop]: Abstraction has 88 states and 93 transitions. [2018-01-31 09:05:51,214 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-31 09:05:51,214 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 93 transitions. [2018-01-31 09:05:51,215 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-31 09:05:51,215 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:05:51,215 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:05:51,215 INFO L371 AbstractCegarLoop]: === Iteration 6 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:05:51,216 INFO L82 PathProgramCache]: Analyzing trace with hash 1459052207, now seen corresponding path program 1 times [2018-01-31 09:05:51,216 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:05:51,216 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:05:51,217 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:51,217 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:05:51,217 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:51,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:05:51,238 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:05:51,440 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-31 09:05:51,440 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:05:51,440 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:05:51,448 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:05:51,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:05:51,519 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:05:51,572 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-01-31 09:05:51,604 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-31 09:05:51,604 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [8] total 11 [2018-01-31 09:05:51,605 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-31 09:05:51,605 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-31 09:05:51,605 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2018-01-31 09:05:51,606 INFO L87 Difference]: Start difference. First operand 88 states and 93 transitions. Second operand 11 states. [2018-01-31 09:05:52,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:05:52,307 INFO L93 Difference]: Finished difference Result 182 states and 194 transitions. [2018-01-31 09:05:52,323 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-31 09:05:52,323 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 43 [2018-01-31 09:05:52,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:05:52,326 INFO L225 Difference]: With dead ends: 182 [2018-01-31 09:05:52,326 INFO L226 Difference]: Without dead ends: 109 [2018-01-31 09:05:52,327 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=62, Invalid=244, Unknown=0, NotChecked=0, Total=306 [2018-01-31 09:05:52,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-01-31 09:05:52,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 99. [2018-01-31 09:05:52,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-01-31 09:05:52,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 105 transitions. [2018-01-31 09:05:52,337 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 105 transitions. Word has length 43 [2018-01-31 09:05:52,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:05:52,338 INFO L432 AbstractCegarLoop]: Abstraction has 99 states and 105 transitions. [2018-01-31 09:05:52,338 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-31 09:05:52,338 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 105 transitions. [2018-01-31 09:05:52,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-01-31 09:05:52,340 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:05:52,340 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:05:52,340 INFO L371 AbstractCegarLoop]: === Iteration 7 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:05:52,340 INFO L82 PathProgramCache]: Analyzing trace with hash 55536356, now seen corresponding path program 1 times [2018-01-31 09:05:52,340 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:05:52,341 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:05:52,342 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:52,342 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:05:52,342 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:52,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:05:52,363 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:05:52,473 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-31 09:05:52,473 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-31 09:05:52,473 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-31 09:05:52,474 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-31 09:05:52,474 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-31 09:05:52,474 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-31 09:05:52,474 INFO L87 Difference]: Start difference. First operand 99 states and 105 transitions. Second operand 5 states. [2018-01-31 09:05:52,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:05:52,563 INFO L93 Difference]: Finished difference Result 99 states and 105 transitions. [2018-01-31 09:05:52,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-31 09:05:52,564 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 57 [2018-01-31 09:05:52,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:05:52,565 INFO L225 Difference]: With dead ends: 99 [2018-01-31 09:05:52,565 INFO L226 Difference]: Without dead ends: 97 [2018-01-31 09:05:52,565 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-31 09:05:52,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-01-31 09:05:52,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2018-01-31 09:05:52,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-01-31 09:05:52,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 103 transitions. [2018-01-31 09:05:52,574 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 103 transitions. Word has length 57 [2018-01-31 09:05:52,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:05:52,575 INFO L432 AbstractCegarLoop]: Abstraction has 97 states and 103 transitions. [2018-01-31 09:05:52,575 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-31 09:05:52,575 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 103 transitions. [2018-01-31 09:05:52,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-01-31 09:05:52,577 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:05:52,577 INFO L351 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:05:52,577 INFO L371 AbstractCegarLoop]: === Iteration 8 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:05:52,578 INFO L82 PathProgramCache]: Analyzing trace with hash 55536357, now seen corresponding path program 1 times [2018-01-31 09:05:52,578 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:05:52,578 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:05:52,579 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:52,579 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:05:52,579 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:52,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:05:52,610 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:05:53,013 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-01-31 09:05:53,013 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:05:53,013 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:05:53,019 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:05:53,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:05:53,065 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:05:53,428 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-31 09:05:53,454 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:05:53,454 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 5] total 14 [2018-01-31 09:05:53,455 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-31 09:05:53,455 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-31 09:05:53,455 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=148, Unknown=0, NotChecked=0, Total=182 [2018-01-31 09:05:53,455 INFO L87 Difference]: Start difference. First operand 97 states and 103 transitions. Second operand 14 states. [2018-01-31 09:05:53,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:05:53,894 INFO L93 Difference]: Finished difference Result 191 states and 203 transitions. [2018-01-31 09:05:53,895 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-31 09:05:53,895 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 57 [2018-01-31 09:05:53,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:05:53,896 INFO L225 Difference]: With dead ends: 191 [2018-01-31 09:05:53,896 INFO L226 Difference]: Without dead ends: 106 [2018-01-31 09:05:53,896 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 55 SyntacticMatches, 6 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=82, Invalid=338, Unknown=0, NotChecked=0, Total=420 [2018-01-31 09:05:53,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-01-31 09:05:53,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 100. [2018-01-31 09:05:53,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-01-31 09:05:53,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 105 transitions. [2018-01-31 09:05:53,904 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 105 transitions. Word has length 57 [2018-01-31 09:05:53,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:05:53,905 INFO L432 AbstractCegarLoop]: Abstraction has 100 states and 105 transitions. [2018-01-31 09:05:53,905 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-31 09:05:53,905 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 105 transitions. [2018-01-31 09:05:53,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-01-31 09:05:53,906 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:05:53,906 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:05:53,906 INFO L371 AbstractCegarLoop]: === Iteration 9 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:05:53,907 INFO L82 PathProgramCache]: Analyzing trace with hash -899742681, now seen corresponding path program 1 times [2018-01-31 09:05:53,907 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:05:53,907 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:05:53,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:53,908 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:05:53,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:53,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:05:53,925 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:05:54,529 WARN L146 SmtUtils]: Spent 107ms on a formula simplification. DAG size of input: 21 DAG size of output 18 [2018-01-31 09:05:54,955 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 3 proven. 17 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2018-01-31 09:05:54,955 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:05:54,955 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:05:54,967 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:05:55,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:05:55,003 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:05:55,071 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-01-31 09:05:55,093 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:05:55,093 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 6] total 20 [2018-01-31 09:05:55,094 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-31 09:05:55,094 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-31 09:05:55,094 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=333, Unknown=0, NotChecked=0, Total=380 [2018-01-31 09:05:55,094 INFO L87 Difference]: Start difference. First operand 100 states and 105 transitions. Second operand 20 states. [2018-01-31 09:05:56,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:05:56,331 INFO L93 Difference]: Finished difference Result 189 states and 200 transitions. [2018-01-31 09:05:56,331 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-31 09:05:56,332 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 59 [2018-01-31 09:05:56,332 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:05:56,332 INFO L225 Difference]: With dead ends: 189 [2018-01-31 09:05:56,333 INFO L226 Difference]: Without dead ends: 108 [2018-01-31 09:05:56,334 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 56 SyntacticMatches, 6 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 183 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=178, Invalid=1082, Unknown=0, NotChecked=0, Total=1260 [2018-01-31 09:05:56,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2018-01-31 09:05:56,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 100. [2018-01-31 09:05:56,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-01-31 09:05:56,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 105 transitions. [2018-01-31 09:05:56,341 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 105 transitions. Word has length 59 [2018-01-31 09:05:56,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:05:56,341 INFO L432 AbstractCegarLoop]: Abstraction has 100 states and 105 transitions. [2018-01-31 09:05:56,341 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-31 09:05:56,342 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 105 transitions. [2018-01-31 09:05:56,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-01-31 09:05:56,343 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:05:56,343 INFO L351 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:05:56,343 INFO L371 AbstractCegarLoop]: === Iteration 10 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:05:56,343 INFO L82 PathProgramCache]: Analyzing trace with hash 1515320429, now seen corresponding path program 2 times [2018-01-31 09:05:56,344 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:05:56,344 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:05:56,345 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:56,345 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:05:56,345 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:56,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:05:56,361 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:05:57,170 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-01-31 09:05:57,171 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:05:57,171 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:05:57,176 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-31 09:05:57,192 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:05:57,195 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:05:57,199 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:05:57,222 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-31 09:05:57,224 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-31 09:05:57,270 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-31 09:05:57,270 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-31 09:05:58,435 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-31 09:05:58,455 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-31 09:05:58,456 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [13] total 19 [2018-01-31 09:05:58,456 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-31 09:05:58,456 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-31 09:05:58,457 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=288, Unknown=0, NotChecked=0, Total=342 [2018-01-31 09:05:58,457 INFO L87 Difference]: Start difference. First operand 100 states and 105 transitions. Second operand 19 states. [2018-01-31 09:05:59,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:05:59,295 INFO L93 Difference]: Finished difference Result 155 states and 165 transitions. [2018-01-31 09:05:59,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-31 09:05:59,295 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 73 [2018-01-31 09:05:59,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:05:59,296 INFO L225 Difference]: With dead ends: 155 [2018-01-31 09:05:59,297 INFO L226 Difference]: Without dead ends: 115 [2018-01-31 09:05:59,297 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 65 SyntacticMatches, 9 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 231 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=214, Invalid=976, Unknown=0, NotChecked=0, Total=1190 [2018-01-31 09:05:59,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-01-31 09:05:59,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 109. [2018-01-31 09:05:59,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2018-01-31 09:05:59,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 114 transitions. [2018-01-31 09:05:59,306 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 114 transitions. Word has length 73 [2018-01-31 09:05:59,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:05:59,307 INFO L432 AbstractCegarLoop]: Abstraction has 109 states and 114 transitions. [2018-01-31 09:05:59,307 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-31 09:05:59,307 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 114 transitions. [2018-01-31 09:05:59,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-01-31 09:05:59,308 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:05:59,308 INFO L351 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:05:59,308 INFO L371 AbstractCegarLoop]: === Iteration 11 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:05:59,309 INFO L82 PathProgramCache]: Analyzing trace with hash 371973440, now seen corresponding path program 1 times [2018-01-31 09:05:59,309 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:05:59,309 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:05:59,310 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:59,310 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:05:59,310 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:05:59,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:05:59,331 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:05:59,967 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2018-01-31 09:05:59,967 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:05:59,967 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:05:59,972 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:06:00,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:00,021 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:00,145 INFO L134 CoverageAnalysis]: Checked inductivity of 51 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2018-01-31 09:06:00,168 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:00,168 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 7] total 18 [2018-01-31 09:06:00,169 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-31 09:06:00,169 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-31 09:06:00,169 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=260, Unknown=0, NotChecked=0, Total=306 [2018-01-31 09:06:00,169 INFO L87 Difference]: Start difference. First operand 109 states and 114 transitions. Second operand 18 states. [2018-01-31 09:06:00,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:00,515 INFO L93 Difference]: Finished difference Result 214 states and 226 transitions. [2018-01-31 09:06:00,515 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-31 09:06:00,516 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 86 [2018-01-31 09:06:00,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:00,517 INFO L225 Difference]: With dead ends: 214 [2018-01-31 09:06:00,517 INFO L226 Difference]: Without dead ends: 127 [2018-01-31 09:06:00,518 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 82 SyntacticMatches, 8 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=81, Invalid=471, Unknown=0, NotChecked=0, Total=552 [2018-01-31 09:06:00,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-01-31 09:06:00,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 117. [2018-01-31 09:06:00,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-01-31 09:06:00,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 123 transitions. [2018-01-31 09:06:00,531 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 123 transitions. Word has length 86 [2018-01-31 09:06:00,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:00,532 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 123 transitions. [2018-01-31 09:06:00,532 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-31 09:06:00,532 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 123 transitions. [2018-01-31 09:06:00,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-01-31 09:06:00,540 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:00,540 INFO L351 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:00,540 INFO L371 AbstractCegarLoop]: === Iteration 12 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:00,540 INFO L82 PathProgramCache]: Analyzing trace with hash -45147985, now seen corresponding path program 1 times [2018-01-31 09:06:00,540 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:00,540 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:00,541 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:00,541 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:06:00,541 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:00,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:00,565 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:00,663 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2018-01-31 09:06:00,663 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-31 09:06:00,664 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-31 09:06:00,664 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-31 09:06:00,664 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-31 09:06:00,664 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-31 09:06:00,665 INFO L87 Difference]: Start difference. First operand 117 states and 123 transitions. Second operand 5 states. [2018-01-31 09:06:00,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:00,933 INFO L93 Difference]: Finished difference Result 130 states and 136 transitions. [2018-01-31 09:06:00,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-31 09:06:00,933 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 97 [2018-01-31 09:06:00,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:00,934 INFO L225 Difference]: With dead ends: 130 [2018-01-31 09:06:00,934 INFO L226 Difference]: Without dead ends: 125 [2018-01-31 09:06:00,934 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-31 09:06:00,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-01-31 09:06:00,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 123. [2018-01-31 09:06:00,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-31 09:06:00,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 129 transitions. [2018-01-31 09:06:00,943 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 129 transitions. Word has length 97 [2018-01-31 09:06:00,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:00,945 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 129 transitions. [2018-01-31 09:06:00,945 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-31 09:06:00,945 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 129 transitions. [2018-01-31 09:06:00,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-01-31 09:06:00,947 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:00,947 INFO L351 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:00,947 INFO L371 AbstractCegarLoop]: === Iteration 13 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:00,947 INFO L82 PathProgramCache]: Analyzing trace with hash 509296931, now seen corresponding path program 1 times [2018-01-31 09:06:00,947 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:00,947 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:00,949 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:00,949 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:06:00,949 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:00,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:00,973 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:01,297 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 61 trivial. 0 not checked. [2018-01-31 09:06:01,298 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:01,298 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:01,303 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:06:01,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:01,350 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:01,548 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 22 refuted. 0 times theorem prover too weak. 44 trivial. 0 not checked. [2018-01-31 09:06:01,568 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:01,569 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 15 [2018-01-31 09:06:01,569 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-31 09:06:01,569 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-31 09:06:01,570 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 [2018-01-31 09:06:01,570 INFO L87 Difference]: Start difference. First operand 123 states and 129 transitions. Second operand 15 states. [2018-01-31 09:06:01,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:01,808 INFO L93 Difference]: Finished difference Result 244 states and 258 transitions. [2018-01-31 09:06:01,809 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-31 09:06:01,809 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 99 [2018-01-31 09:06:01,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:01,810 INFO L225 Difference]: With dead ends: 244 [2018-01-31 09:06:01,810 INFO L226 Difference]: Without dead ends: 146 [2018-01-31 09:06:01,810 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=80, Invalid=382, Unknown=0, NotChecked=0, Total=462 [2018-01-31 09:06:01,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-01-31 09:06:01,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 136. [2018-01-31 09:06:01,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-31 09:06:01,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 143 transitions. [2018-01-31 09:06:01,819 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 143 transitions. Word has length 99 [2018-01-31 09:06:01,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:01,819 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 143 transitions. [2018-01-31 09:06:01,819 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-31 09:06:01,819 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 143 transitions. [2018-01-31 09:06:01,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-01-31 09:06:01,820 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:01,820 INFO L351 BasicCegarLoop]: trace histogram [5, 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:01,821 INFO L371 AbstractCegarLoop]: === Iteration 14 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:01,821 INFO L82 PathProgramCache]: Analyzing trace with hash 508619111, now seen corresponding path program 1 times [2018-01-31 09:06:01,821 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:01,821 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:01,822 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:01,822 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:06:01,822 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:01,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:01,837 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:02,146 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2018-01-31 09:06:02,146 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:02,146 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:02,151 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:06:02,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:02,182 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:02,358 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 39 trivial. 0 not checked. [2018-01-31 09:06:02,378 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:02,378 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 9] total 15 [2018-01-31 09:06:02,379 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-31 09:06:02,379 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-31 09:06:02,379 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=167, Unknown=0, NotChecked=0, Total=210 [2018-01-31 09:06:02,380 INFO L87 Difference]: Start difference. First operand 136 states and 143 transitions. Second operand 15 states. [2018-01-31 09:06:02,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:02,558 INFO L93 Difference]: Finished difference Result 247 states and 261 transitions. [2018-01-31 09:06:02,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-31 09:06:02,559 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 103 [2018-01-31 09:06:02,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:02,559 INFO L225 Difference]: With dead ends: 247 [2018-01-31 09:06:02,560 INFO L226 Difference]: Without dead ends: 135 [2018-01-31 09:06:02,560 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 98 SyntacticMatches, 6 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=65, Invalid=277, Unknown=0, NotChecked=0, Total=342 [2018-01-31 09:06:02,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-31 09:06:02,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 133. [2018-01-31 09:06:02,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-01-31 09:06:02,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 139 transitions. [2018-01-31 09:06:02,572 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 139 transitions. Word has length 103 [2018-01-31 09:06:02,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:02,572 INFO L432 AbstractCegarLoop]: Abstraction has 133 states and 139 transitions. [2018-01-31 09:06:02,572 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-31 09:06:02,572 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 139 transitions. [2018-01-31 09:06:02,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-01-31 09:06:02,574 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:02,574 INFO L351 BasicCegarLoop]: trace histogram [6, 6, 6, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:02,574 INFO L371 AbstractCegarLoop]: === Iteration 15 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:02,575 INFO L82 PathProgramCache]: Analyzing trace with hash 1922516743, now seen corresponding path program 1 times [2018-01-31 09:06:02,575 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:02,575 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:02,576 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:02,576 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:06:02,576 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:02,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:02,595 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:03,143 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-01-31 09:06:03,143 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:03,143 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:03,148 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:06:03,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:03,182 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:03,279 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 51 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2018-01-31 09:06:03,310 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:03,310 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 10] total 20 [2018-01-31 09:06:03,311 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-31 09:06:03,311 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-31 09:06:03,311 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=314, Unknown=0, NotChecked=0, Total=380 [2018-01-31 09:06:03,311 INFO L87 Difference]: Start difference. First operand 133 states and 139 transitions. Second operand 20 states. [2018-01-31 09:06:03,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:03,709 INFO L93 Difference]: Finished difference Result 248 states and 260 transitions. [2018-01-31 09:06:03,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-31 09:06:03,746 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 113 [2018-01-31 09:06:03,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:03,747 INFO L225 Difference]: With dead ends: 248 [2018-01-31 09:06:03,747 INFO L226 Difference]: Without dead ends: 142 [2018-01-31 09:06:03,747 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 107 SyntacticMatches, 6 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 83 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=114, Invalid=588, Unknown=0, NotChecked=0, Total=702 [2018-01-31 09:06:03,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-01-31 09:06:03,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 136. [2018-01-31 09:06:03,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-31 09:06:03,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 141 transitions. [2018-01-31 09:06:03,759 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 141 transitions. Word has length 113 [2018-01-31 09:06:03,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:03,759 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 141 transitions. [2018-01-31 09:06:03,759 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-31 09:06:03,759 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 141 transitions. [2018-01-31 09:06:03,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2018-01-31 09:06:03,760 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:03,760 INFO L351 BasicCegarLoop]: trace histogram [7, 7, 7, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:03,760 INFO L371 AbstractCegarLoop]: === Iteration 16 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:03,760 INFO L82 PathProgramCache]: Analyzing trace with hash 636913648, now seen corresponding path program 2 times [2018-01-31 09:06:03,761 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:03,761 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:03,761 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:03,761 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:06:03,762 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:03,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:03,780 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:04,490 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 3 proven. 20 refuted. 0 times theorem prover too weak. 106 trivial. 0 not checked. [2018-01-31 09:06:04,491 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:04,491 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:04,506 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-31 09:06:04,524 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:04,539 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:04,541 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:04,543 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:04,680 INFO L134 CoverageAnalysis]: Checked inductivity of 129 backedges. 0 proven. 70 refuted. 0 times theorem prover too weak. 59 trivial. 0 not checked. [2018-01-31 09:06:04,699 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:04,699 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 11] total 26 [2018-01-31 09:06:04,700 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-31 09:06:04,700 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-31 09:06:04,700 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=566, Unknown=0, NotChecked=0, Total=650 [2018-01-31 09:06:04,700 INFO L87 Difference]: Start difference. First operand 136 states and 141 transitions. Second operand 26 states. [2018-01-31 09:06:05,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:05,677 INFO L93 Difference]: Finished difference Result 246 states and 257 transitions. [2018-01-31 09:06:05,677 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-31 09:06:05,677 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 118 [2018-01-31 09:06:05,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:05,678 INFO L225 Difference]: With dead ends: 246 [2018-01-31 09:06:05,678 INFO L226 Difference]: Without dead ends: 144 [2018-01-31 09:06:05,679 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 111 SyntacticMatches, 6 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 214 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=215, Invalid=1507, Unknown=0, NotChecked=0, Total=1722 [2018-01-31 09:06:05,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-01-31 09:06:05,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 136. [2018-01-31 09:06:05,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-31 09:06:05,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 141 transitions. [2018-01-31 09:06:05,688 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 141 transitions. Word has length 118 [2018-01-31 09:06:05,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:05,689 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 141 transitions. [2018-01-31 09:06:05,689 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-31 09:06:05,689 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 141 transitions. [2018-01-31 09:06:05,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-01-31 09:06:05,690 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:05,690 INFO L351 BasicCegarLoop]: trace histogram [8, 8, 8, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:05,690 INFO L371 AbstractCegarLoop]: === Iteration 17 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:05,690 INFO L82 PathProgramCache]: Analyzing trace with hash 1690281823, now seen corresponding path program 2 times [2018-01-31 09:06:05,691 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:05,691 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:05,692 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:05,693 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:05,693 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:05,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:05,718 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:06,360 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 0 proven. 19 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-31 09:06:06,360 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:06,360 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:06,366 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-31 09:06:06,384 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:06,401 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:06,403 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:06,406 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:06,566 INFO L134 CoverageAnalysis]: Checked inductivity of 147 backedges. 0 proven. 92 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-01-31 09:06:06,599 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:06,599 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 22 [2018-01-31 09:06:06,600 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-31 09:06:06,600 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-31 09:06:06,600 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=376, Unknown=0, NotChecked=0, Total=462 [2018-01-31 09:06:06,600 INFO L87 Difference]: Start difference. First operand 136 states and 141 transitions. Second operand 22 states. [2018-01-31 09:06:06,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:06,992 INFO L93 Difference]: Finished difference Result 260 states and 271 transitions. [2018-01-31 09:06:06,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-31 09:06:06,992 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 129 [2018-01-31 09:06:06,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:06,993 INFO L225 Difference]: With dead ends: 260 [2018-01-31 09:06:06,993 INFO L226 Difference]: Without dead ends: 157 [2018-01-31 09:06:06,994 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 121 SyntacticMatches, 6 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 155 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=156, Invalid=836, Unknown=0, NotChecked=0, Total=992 [2018-01-31 09:06:06,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-01-31 09:06:07,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 149. [2018-01-31 09:06:07,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-01-31 09:06:07,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 154 transitions. [2018-01-31 09:06:07,002 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 154 transitions. Word has length 129 [2018-01-31 09:06:07,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:07,002 INFO L432 AbstractCegarLoop]: Abstraction has 149 states and 154 transitions. [2018-01-31 09:06:07,002 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-31 09:06:07,002 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 154 transitions. [2018-01-31 09:06:07,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-01-31 09:06:07,003 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:07,003 INFO L351 BasicCegarLoop]: trace histogram [9, 9, 9, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:07,004 INFO L371 AbstractCegarLoop]: === Iteration 18 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:07,004 INFO L82 PathProgramCache]: Analyzing trace with hash -1188075188, now seen corresponding path program 3 times [2018-01-31 09:06:07,004 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:07,004 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:07,005 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:07,005 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:07,005 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:07,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:07,030 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:07,347 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:07,347 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:07,347 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:07,352 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-31 09:06:07,373 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:07,382 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:07,397 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:07,409 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:07,418 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:07,426 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:07,432 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:07,446 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:07,458 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:07,509 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:07,510 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:07,513 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:07,594 INFO L134 CoverageAnalysis]: Checked inductivity of 195 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:07,614 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:07,614 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 24 [2018-01-31 09:06:07,614 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-31 09:06:07,614 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-31 09:06:07,615 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=218, Invalid=334, Unknown=0, NotChecked=0, Total=552 [2018-01-31 09:06:07,615 INFO L87 Difference]: Start difference. First operand 149 states and 154 transitions. Second operand 24 states. [2018-01-31 09:06:07,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:07,679 INFO L93 Difference]: Finished difference Result 263 states and 273 transitions. [2018-01-31 09:06:07,680 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-31 09:06:07,680 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 142 [2018-01-31 09:06:07,681 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:07,681 INFO L225 Difference]: With dead ends: 263 [2018-01-31 09:06:07,682 INFO L226 Difference]: Without dead ends: 154 [2018-01-31 09:06:07,682 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 132 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 220 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=232, Invalid=368, Unknown=0, NotChecked=0, Total=600 [2018-01-31 09:06:07,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-01-31 09:06:07,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 152. [2018-01-31 09:06:07,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-01-31 09:06:07,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 157 transitions. [2018-01-31 09:06:07,693 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 157 transitions. Word has length 142 [2018-01-31 09:06:07,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:07,694 INFO L432 AbstractCegarLoop]: Abstraction has 152 states and 157 transitions. [2018-01-31 09:06:07,694 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-31 09:06:07,694 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 157 transitions. [2018-01-31 09:06:07,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2018-01-31 09:06:07,695 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:07,696 INFO L351 BasicCegarLoop]: trace histogram [10, 10, 10, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:07,696 INFO L371 AbstractCegarLoop]: === Iteration 19 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:07,696 INFO L82 PathProgramCache]: Analyzing trace with hash -1775126089, now seen corresponding path program 4 times [2018-01-31 09:06:07,696 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:07,696 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:07,697 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:07,697 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:07,697 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:07,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:07,720 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:07,949 INFO L134 CoverageAnalysis]: Checked inductivity of 223 backedges. 0 proven. 145 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:07,949 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:07,949 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:07,954 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-31 09:06:08,038 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:08,042 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:08,127 INFO L134 CoverageAnalysis]: Checked inductivity of 223 backedges. 0 proven. 145 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:08,147 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:08,147 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 26 [2018-01-31 09:06:08,148 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-31 09:06:08,148 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-31 09:06:08,148 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=256, Invalid=394, Unknown=0, NotChecked=0, Total=650 [2018-01-31 09:06:08,149 INFO L87 Difference]: Start difference. First operand 152 states and 157 transitions. Second operand 26 states. [2018-01-31 09:06:08,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:08,215 INFO L93 Difference]: Finished difference Result 266 states and 276 transitions. [2018-01-31 09:06:08,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-31 09:06:08,218 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 145 [2018-01-31 09:06:08,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:08,219 INFO L225 Difference]: With dead ends: 266 [2018-01-31 09:06:08,219 INFO L226 Difference]: Without dead ends: 157 [2018-01-31 09:06:08,220 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 134 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=271, Invalid=431, Unknown=0, NotChecked=0, Total=702 [2018-01-31 09:06:08,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-01-31 09:06:08,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 155. [2018-01-31 09:06:08,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-01-31 09:06:08,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 160 transitions. [2018-01-31 09:06:08,229 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 160 transitions. Word has length 145 [2018-01-31 09:06:08,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:08,229 INFO L432 AbstractCegarLoop]: Abstraction has 155 states and 160 transitions. [2018-01-31 09:06:08,229 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-31 09:06:08,230 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 160 transitions. [2018-01-31 09:06:08,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2018-01-31 09:06:08,231 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:08,231 INFO L351 BasicCegarLoop]: trace histogram [11, 11, 11, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:08,231 INFO L371 AbstractCegarLoop]: === Iteration 20 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:08,231 INFO L82 PathProgramCache]: Analyzing trace with hash -1501688468, now seen corresponding path program 5 times [2018-01-31 09:06:08,231 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:08,232 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:08,232 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:08,232 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:08,233 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:08,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:08,255 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:08,492 INFO L134 CoverageAnalysis]: Checked inductivity of 254 backedges. 0 proven. 176 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:08,492 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:08,492 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:08,497 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-31 09:06:08,509 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:08,518 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:08,519 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:08,520 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:08,521 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:08,523 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:08,525 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:08,528 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:08,535 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:08,544 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:08,554 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:08,569 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:08,571 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:08,574 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:08,705 INFO L134 CoverageAnalysis]: Checked inductivity of 254 backedges. 0 proven. 176 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:08,725 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:08,725 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 28 [2018-01-31 09:06:08,757 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-31 09:06:08,758 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-31 09:06:08,758 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=297, Invalid=459, Unknown=0, NotChecked=0, Total=756 [2018-01-31 09:06:08,758 INFO L87 Difference]: Start difference. First operand 155 states and 160 transitions. Second operand 28 states. [2018-01-31 09:06:08,924 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:08,924 INFO L93 Difference]: Finished difference Result 269 states and 279 transitions. [2018-01-31 09:06:08,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-31 09:06:08,924 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 148 [2018-01-31 09:06:08,925 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:08,925 INFO L225 Difference]: With dead ends: 269 [2018-01-31 09:06:08,925 INFO L226 Difference]: Without dead ends: 160 [2018-01-31 09:06:08,926 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 136 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 314 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=313, Invalid=499, Unknown=0, NotChecked=0, Total=812 [2018-01-31 09:06:08,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-01-31 09:06:08,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 158. [2018-01-31 09:06:08,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-01-31 09:06:08,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 163 transitions. [2018-01-31 09:06:08,936 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 163 transitions. Word has length 148 [2018-01-31 09:06:08,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:08,936 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 163 transitions. [2018-01-31 09:06:08,936 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-31 09:06:08,936 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 163 transitions. [2018-01-31 09:06:08,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-01-31 09:06:08,937 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:08,938 INFO L351 BasicCegarLoop]: trace histogram [12, 12, 12, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:08,938 INFO L371 AbstractCegarLoop]: === Iteration 21 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:08,938 INFO L82 PathProgramCache]: Analyzing trace with hash 1220485527, now seen corresponding path program 6 times [2018-01-31 09:06:08,938 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:08,938 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:08,939 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:08,939 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:08,939 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:08,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:08,966 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:09,298 INFO L134 CoverageAnalysis]: Checked inductivity of 288 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:09,298 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:09,298 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:09,304 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-31 09:06:09,324 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:09,331 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:09,339 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:09,348 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:09,370 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:09,377 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:09,387 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:09,404 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:09,427 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:09,467 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:09,476 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:09,496 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:09,535 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:09,536 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:09,540 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:09,668 INFO L134 CoverageAnalysis]: Checked inductivity of 288 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:09,688 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:09,688 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 30 [2018-01-31 09:06:09,688 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-31 09:06:09,689 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-31 09:06:09,689 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=341, Invalid=529, Unknown=0, NotChecked=0, Total=870 [2018-01-31 09:06:09,689 INFO L87 Difference]: Start difference. First operand 158 states and 163 transitions. Second operand 30 states. [2018-01-31 09:06:09,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:09,769 INFO L93 Difference]: Finished difference Result 272 states and 282 transitions. [2018-01-31 09:06:09,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-31 09:06:09,771 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 151 [2018-01-31 09:06:09,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:09,772 INFO L225 Difference]: With dead ends: 272 [2018-01-31 09:06:09,773 INFO L226 Difference]: Without dead ends: 163 [2018-01-31 09:06:09,773 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 138 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 367 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=358, Invalid=572, Unknown=0, NotChecked=0, Total=930 [2018-01-31 09:06:09,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-01-31 09:06:09,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 161. [2018-01-31 09:06:09,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-01-31 09:06:09,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 166 transitions. [2018-01-31 09:06:09,783 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 166 transitions. Word has length 151 [2018-01-31 09:06:09,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:09,783 INFO L432 AbstractCegarLoop]: Abstraction has 161 states and 166 transitions. [2018-01-31 09:06:09,783 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-31 09:06:09,783 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 166 transitions. [2018-01-31 09:06:09,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 155 [2018-01-31 09:06:09,784 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:09,784 INFO L351 BasicCegarLoop]: trace histogram [13, 13, 13, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:09,785 INFO L371 AbstractCegarLoop]: === Iteration 22 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:09,785 INFO L82 PathProgramCache]: Analyzing trace with hash -66512500, now seen corresponding path program 7 times [2018-01-31 09:06:09,785 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:09,785 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:09,786 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:09,787 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:09,787 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:09,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:09,809 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:10,282 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 247 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:10,282 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:10,282 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:10,287 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:06:10,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:10,325 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:10,450 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 247 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:10,470 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:10,470 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 32 [2018-01-31 09:06:10,471 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-31 09:06:10,471 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-31 09:06:10,471 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=388, Invalid=604, Unknown=0, NotChecked=0, Total=992 [2018-01-31 09:06:10,471 INFO L87 Difference]: Start difference. First operand 161 states and 166 transitions. Second operand 32 states. [2018-01-31 09:06:10,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:10,548 INFO L93 Difference]: Finished difference Result 275 states and 285 transitions. [2018-01-31 09:06:10,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-31 09:06:10,549 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 154 [2018-01-31 09:06:10,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:10,550 INFO L225 Difference]: With dead ends: 275 [2018-01-31 09:06:10,551 INFO L226 Difference]: Without dead ends: 166 [2018-01-31 09:06:10,551 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 140 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 424 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=406, Invalid=650, Unknown=0, NotChecked=0, Total=1056 [2018-01-31 09:06:10,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-01-31 09:06:10,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 164. [2018-01-31 09:06:10,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-01-31 09:06:10,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 169 transitions. [2018-01-31 09:06:10,561 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 169 transitions. Word has length 154 [2018-01-31 09:06:10,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:10,561 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 169 transitions. [2018-01-31 09:06:10,561 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-31 09:06:10,561 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 169 transitions. [2018-01-31 09:06:10,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2018-01-31 09:06:10,562 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:10,563 INFO L351 BasicCegarLoop]: trace histogram [14, 14, 14, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:10,563 INFO L371 AbstractCegarLoop]: === Iteration 23 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:10,563 INFO L82 PathProgramCache]: Analyzing trace with hash 148316535, now seen corresponding path program 8 times [2018-01-31 09:06:10,563 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:10,563 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:10,564 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:10,564 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:06:10,564 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:10,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:10,585 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:12,221 INFO L134 CoverageAnalysis]: Checked inductivity of 365 backedges. 0 proven. 287 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:12,221 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:12,222 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:12,226 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-31 09:06:12,246 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:12,268 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:12,271 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:12,274 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:12,411 INFO L134 CoverageAnalysis]: Checked inductivity of 365 backedges. 0 proven. 287 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:12,445 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:12,445 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 34 [2018-01-31 09:06:12,445 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-31 09:06:12,446 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-31 09:06:12,446 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=438, Invalid=684, Unknown=0, NotChecked=0, Total=1122 [2018-01-31 09:06:12,446 INFO L87 Difference]: Start difference. First operand 164 states and 169 transitions. Second operand 34 states. [2018-01-31 09:06:12,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:12,607 INFO L93 Difference]: Finished difference Result 278 states and 288 transitions. [2018-01-31 09:06:12,608 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-31 09:06:12,608 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 157 [2018-01-31 09:06:12,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:12,608 INFO L225 Difference]: With dead ends: 278 [2018-01-31 09:06:12,608 INFO L226 Difference]: Without dead ends: 169 [2018-01-31 09:06:12,609 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 142 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 485 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=457, Invalid=733, Unknown=0, NotChecked=0, Total=1190 [2018-01-31 09:06:12,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-01-31 09:06:12,616 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 167. [2018-01-31 09:06:12,616 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-01-31 09:06:12,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 172 transitions. [2018-01-31 09:06:12,617 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 172 transitions. Word has length 157 [2018-01-31 09:06:12,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:12,618 INFO L432 AbstractCegarLoop]: Abstraction has 167 states and 172 transitions. [2018-01-31 09:06:12,618 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-31 09:06:12,618 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 172 transitions. [2018-01-31 09:06:12,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2018-01-31 09:06:12,619 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:12,619 INFO L351 BasicCegarLoop]: trace histogram [15, 15, 15, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:12,619 INFO L371 AbstractCegarLoop]: === Iteration 24 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:12,620 INFO L82 PathProgramCache]: Analyzing trace with hash 618827180, now seen corresponding path program 9 times [2018-01-31 09:06:12,620 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:12,620 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:12,620 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:12,621 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:12,621 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:12,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:12,656 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:13,411 INFO L134 CoverageAnalysis]: Checked inductivity of 408 backedges. 0 proven. 330 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:13,411 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:13,411 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:13,416 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-31 09:06:13,441 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:13,461 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:13,472 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:13,482 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:13,496 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:13,503 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:13,513 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:13,525 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:13,537 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:13,597 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:13,626 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:13,645 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:13,669 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:13,689 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:13,716 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:13,739 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:13,740 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:13,772 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:13,942 INFO L134 CoverageAnalysis]: Checked inductivity of 408 backedges. 0 proven. 330 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:13,963 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:13,963 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 36 [2018-01-31 09:06:13,963 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-31 09:06:13,963 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-31 09:06:13,964 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=491, Invalid=769, Unknown=0, NotChecked=0, Total=1260 [2018-01-31 09:06:13,964 INFO L87 Difference]: Start difference. First operand 167 states and 172 transitions. Second operand 36 states. [2018-01-31 09:06:14,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:14,079 INFO L93 Difference]: Finished difference Result 281 states and 291 transitions. [2018-01-31 09:06:14,082 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-31 09:06:14,082 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 160 [2018-01-31 09:06:14,083 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:14,083 INFO L225 Difference]: With dead ends: 281 [2018-01-31 09:06:14,083 INFO L226 Difference]: Without dead ends: 172 [2018-01-31 09:06:14,084 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 179 GetRequests, 144 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 550 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=511, Invalid=821, Unknown=0, NotChecked=0, Total=1332 [2018-01-31 09:06:14,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-01-31 09:06:14,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 170. [2018-01-31 09:06:14,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-01-31 09:06:14,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 175 transitions. [2018-01-31 09:06:14,093 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 175 transitions. Word has length 160 [2018-01-31 09:06:14,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:14,093 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 175 transitions. [2018-01-31 09:06:14,093 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-31 09:06:14,093 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 175 transitions. [2018-01-31 09:06:14,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2018-01-31 09:06:14,094 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:14,095 INFO L351 BasicCegarLoop]: trace histogram [16, 16, 16, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:14,095 INFO L371 AbstractCegarLoop]: === Iteration 25 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:14,095 INFO L82 PathProgramCache]: Analyzing trace with hash -1171801769, now seen corresponding path program 10 times [2018-01-31 09:06:14,095 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:14,095 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:14,097 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:14,097 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:14,097 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:14,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:14,117 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:14,717 INFO L134 CoverageAnalysis]: Checked inductivity of 454 backedges. 0 proven. 376 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:14,717 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:14,717 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:14,724 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-31 09:06:14,899 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:14,903 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:16,293 INFO L134 CoverageAnalysis]: Checked inductivity of 454 backedges. 0 proven. 376 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:16,313 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:16,313 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 38 [2018-01-31 09:06:16,313 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-31 09:06:16,314 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-31 09:06:16,314 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=547, Invalid=859, Unknown=0, NotChecked=0, Total=1406 [2018-01-31 09:06:16,314 INFO L87 Difference]: Start difference. First operand 170 states and 175 transitions. Second operand 38 states. [2018-01-31 09:06:16,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:16,409 INFO L93 Difference]: Finished difference Result 284 states and 294 transitions. [2018-01-31 09:06:16,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-31 09:06:16,410 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 163 [2018-01-31 09:06:16,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:16,411 INFO L225 Difference]: With dead ends: 284 [2018-01-31 09:06:16,411 INFO L226 Difference]: Without dead ends: 175 [2018-01-31 09:06:16,412 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 183 GetRequests, 146 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 619 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=568, Invalid=914, Unknown=0, NotChecked=0, Total=1482 [2018-01-31 09:06:16,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-01-31 09:06:16,419 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 173. [2018-01-31 09:06:16,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-01-31 09:06:16,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 178 transitions. [2018-01-31 09:06:16,420 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 178 transitions. Word has length 163 [2018-01-31 09:06:16,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:16,421 INFO L432 AbstractCegarLoop]: Abstraction has 173 states and 178 transitions. [2018-01-31 09:06:16,421 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-31 09:06:16,421 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 178 transitions. [2018-01-31 09:06:16,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2018-01-31 09:06:16,422 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:16,422 INFO L351 BasicCegarLoop]: trace histogram [17, 17, 17, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:16,422 INFO L371 AbstractCegarLoop]: === Iteration 26 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:16,422 INFO L82 PathProgramCache]: Analyzing trace with hash 1989962188, now seen corresponding path program 11 times [2018-01-31 09:06:16,422 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:16,423 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:16,423 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:16,423 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:16,423 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:16,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:16,448 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:16,790 INFO L134 CoverageAnalysis]: Checked inductivity of 503 backedges. 0 proven. 425 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:16,790 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:16,790 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:16,795 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-31 09:06:16,805 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,809 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,810 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,811 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,813 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,814 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,817 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,820 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,824 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,829 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,833 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,838 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,851 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,856 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,865 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,877 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,892 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,915 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:16,918 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:16,921 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:17,087 INFO L134 CoverageAnalysis]: Checked inductivity of 503 backedges. 0 proven. 425 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:17,108 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:17,108 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 40 [2018-01-31 09:06:17,108 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-31 09:06:17,109 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-31 09:06:17,109 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=606, Invalid=954, Unknown=0, NotChecked=0, Total=1560 [2018-01-31 09:06:17,109 INFO L87 Difference]: Start difference. First operand 173 states and 178 transitions. Second operand 40 states. [2018-01-31 09:06:17,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:17,206 INFO L93 Difference]: Finished difference Result 287 states and 297 transitions. [2018-01-31 09:06:17,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-31 09:06:17,207 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 166 [2018-01-31 09:06:17,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:17,207 INFO L225 Difference]: With dead ends: 287 [2018-01-31 09:06:17,207 INFO L226 Difference]: Without dead ends: 178 [2018-01-31 09:06:17,208 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 187 GetRequests, 148 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 692 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=628, Invalid=1012, Unknown=0, NotChecked=0, Total=1640 [2018-01-31 09:06:17,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-01-31 09:06:17,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 176. [2018-01-31 09:06:17,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-31 09:06:17,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 181 transitions. [2018-01-31 09:06:17,216 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 181 transitions. Word has length 166 [2018-01-31 09:06:17,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:17,217 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 181 transitions. [2018-01-31 09:06:17,217 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-31 09:06:17,217 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 181 transitions. [2018-01-31 09:06:17,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2018-01-31 09:06:17,218 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:17,218 INFO L351 BasicCegarLoop]: trace histogram [18, 18, 18, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:17,218 INFO L371 AbstractCegarLoop]: === Iteration 27 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:17,218 INFO L82 PathProgramCache]: Analyzing trace with hash 1172236599, now seen corresponding path program 12 times [2018-01-31 09:06:17,218 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:17,219 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:17,219 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:17,219 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:17,219 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:17,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:17,240 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:17,686 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 477 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:17,686 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:17,687 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:17,693 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-31 09:06:17,718 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:17,730 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:17,737 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:17,746 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:17,766 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:17,776 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:17,784 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:17,805 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:17,836 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:17,882 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:17,909 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:17,936 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:17,965 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:18,088 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:18,161 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:18,237 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:18,407 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:18,932 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:19,184 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:19,186 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:19,191 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:19,367 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 477 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:19,389 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:19,389 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 42 [2018-01-31 09:06:19,389 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-31 09:06:19,389 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-31 09:06:19,390 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=668, Invalid=1054, Unknown=0, NotChecked=0, Total=1722 [2018-01-31 09:06:19,390 INFO L87 Difference]: Start difference. First operand 176 states and 181 transitions. Second operand 42 states. [2018-01-31 09:06:19,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:19,500 INFO L93 Difference]: Finished difference Result 290 states and 300 transitions. [2018-01-31 09:06:19,500 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-31 09:06:19,500 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 169 [2018-01-31 09:06:19,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:19,501 INFO L225 Difference]: With dead ends: 290 [2018-01-31 09:06:19,501 INFO L226 Difference]: Without dead ends: 181 [2018-01-31 09:06:19,502 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 150 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 769 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=691, Invalid=1115, Unknown=0, NotChecked=0, Total=1806 [2018-01-31 09:06:19,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-01-31 09:06:19,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 179. [2018-01-31 09:06:19,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-01-31 09:06:19,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 184 transitions. [2018-01-31 09:06:19,509 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 184 transitions. Word has length 169 [2018-01-31 09:06:19,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:19,509 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 184 transitions. [2018-01-31 09:06:19,509 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-31 09:06:19,509 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 184 transitions. [2018-01-31 09:06:19,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2018-01-31 09:06:19,510 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:19,510 INFO L351 BasicCegarLoop]: trace histogram [19, 19, 19, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:19,510 INFO L371 AbstractCegarLoop]: === Iteration 28 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:19,510 INFO L82 PathProgramCache]: Analyzing trace with hash 1363717612, now seen corresponding path program 13 times [2018-01-31 09:06:19,510 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:19,510 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:19,511 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:19,511 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:19,511 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:19,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:19,537 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:19,955 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 532 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:19,955 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:19,955 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:19,960 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:06:19,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:19,999 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:20,220 INFO L134 CoverageAnalysis]: Checked inductivity of 610 backedges. 0 proven. 532 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:20,239 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:20,239 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 44 [2018-01-31 09:06:20,240 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-31 09:06:20,240 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-31 09:06:20,241 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=733, Invalid=1159, Unknown=0, NotChecked=0, Total=1892 [2018-01-31 09:06:20,241 INFO L87 Difference]: Start difference. First operand 179 states and 184 transitions. Second operand 44 states. [2018-01-31 09:06:20,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:20,517 INFO L93 Difference]: Finished difference Result 293 states and 303 transitions. [2018-01-31 09:06:20,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-31 09:06:20,517 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 172 [2018-01-31 09:06:20,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:20,518 INFO L225 Difference]: With dead ends: 293 [2018-01-31 09:06:20,518 INFO L226 Difference]: Without dead ends: 184 [2018-01-31 09:06:20,519 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 152 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 850 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=757, Invalid=1223, Unknown=0, NotChecked=0, Total=1980 [2018-01-31 09:06:20,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-31 09:06:20,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 182. [2018-01-31 09:06:20,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-31 09:06:20,528 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 187 transitions. [2018-01-31 09:06:20,528 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 187 transitions. Word has length 172 [2018-01-31 09:06:20,528 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:20,528 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 187 transitions. [2018-01-31 09:06:20,528 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-31 09:06:20,529 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 187 transitions. [2018-01-31 09:06:20,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2018-01-31 09:06:20,530 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:20,530 INFO L351 BasicCegarLoop]: trace histogram [20, 20, 20, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:20,530 INFO L371 AbstractCegarLoop]: === Iteration 29 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:20,530 INFO L82 PathProgramCache]: Analyzing trace with hash 2058006807, now seen corresponding path program 14 times [2018-01-31 09:06:20,530 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:20,530 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:20,532 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:20,532 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:06:20,532 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:20,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:20,557 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:21,110 INFO L134 CoverageAnalysis]: Checked inductivity of 668 backedges. 0 proven. 590 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:21,110 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:21,110 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:21,115 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-31 09:06:21,134 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:21,155 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:21,158 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:21,161 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:21,422 INFO L134 CoverageAnalysis]: Checked inductivity of 668 backedges. 0 proven. 590 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:21,454 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:21,454 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 46 [2018-01-31 09:06:21,455 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-01-31 09:06:21,456 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-01-31 09:06:21,456 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=801, Invalid=1269, Unknown=0, NotChecked=0, Total=2070 [2018-01-31 09:06:21,456 INFO L87 Difference]: Start difference. First operand 182 states and 187 transitions. Second operand 46 states. [2018-01-31 09:06:21,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:21,632 INFO L93 Difference]: Finished difference Result 296 states and 306 transitions. [2018-01-31 09:06:21,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-31 09:06:21,633 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 175 [2018-01-31 09:06:21,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:21,634 INFO L225 Difference]: With dead ends: 296 [2018-01-31 09:06:21,634 INFO L226 Difference]: Without dead ends: 187 [2018-01-31 09:06:21,635 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 154 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 935 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=826, Invalid=1336, Unknown=0, NotChecked=0, Total=2162 [2018-01-31 09:06:21,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-01-31 09:06:21,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 185. [2018-01-31 09:06:21,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-01-31 09:06:21,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 190 transitions. [2018-01-31 09:06:21,644 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 190 transitions. Word has length 175 [2018-01-31 09:06:21,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:21,644 INFO L432 AbstractCegarLoop]: Abstraction has 185 states and 190 transitions. [2018-01-31 09:06:21,644 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-01-31 09:06:21,644 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 190 transitions. [2018-01-31 09:06:21,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2018-01-31 09:06:21,645 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:21,646 INFO L351 BasicCegarLoop]: trace histogram [21, 21, 21, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:21,646 INFO L371 AbstractCegarLoop]: === Iteration 30 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:21,646 INFO L82 PathProgramCache]: Analyzing trace with hash 1064917516, now seen corresponding path program 15 times [2018-01-31 09:06:21,646 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:21,646 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:21,647 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:21,647 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:21,647 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:21,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:21,676 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:22,375 INFO L134 CoverageAnalysis]: Checked inductivity of 729 backedges. 0 proven. 651 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:22,375 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:22,375 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:22,380 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-31 09:06:22,408 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:22,427 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:22,440 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:22,449 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:22,460 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:22,477 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:22,494 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:22,538 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:22,567 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:22,581 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:22,617 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:22,677 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:22,704 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:22,733 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:22,796 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:22,867 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:22,910 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:23,017 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:23,132 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:23,835 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:24,038 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:24,858 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:24,860 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:24,866 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:25,246 INFO L134 CoverageAnalysis]: Checked inductivity of 729 backedges. 0 proven. 651 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:25,268 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:25,268 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 48 [2018-01-31 09:06:25,268 INFO L409 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-01-31 09:06:25,269 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-01-31 09:06:25,269 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=872, Invalid=1384, Unknown=0, NotChecked=0, Total=2256 [2018-01-31 09:06:25,269 INFO L87 Difference]: Start difference. First operand 185 states and 190 transitions. Second operand 48 states. [2018-01-31 09:06:25,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:25,397 INFO L93 Difference]: Finished difference Result 299 states and 309 transitions. [2018-01-31 09:06:25,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-31 09:06:25,397 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 178 [2018-01-31 09:06:25,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:25,398 INFO L225 Difference]: With dead ends: 299 [2018-01-31 09:06:25,398 INFO L226 Difference]: Without dead ends: 190 [2018-01-31 09:06:25,399 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 156 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1024 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=898, Invalid=1454, Unknown=0, NotChecked=0, Total=2352 [2018-01-31 09:06:25,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-01-31 09:06:25,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 188. [2018-01-31 09:06:25,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2018-01-31 09:06:25,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 193 transitions. [2018-01-31 09:06:25,405 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 193 transitions. Word has length 178 [2018-01-31 09:06:25,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:25,406 INFO L432 AbstractCegarLoop]: Abstraction has 188 states and 193 transitions. [2018-01-31 09:06:25,406 INFO L433 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-01-31 09:06:25,406 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 193 transitions. [2018-01-31 09:06:25,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2018-01-31 09:06:25,407 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:25,408 INFO L351 BasicCegarLoop]: trace histogram [22, 22, 22, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:25,408 INFO L371 AbstractCegarLoop]: === Iteration 31 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:25,408 INFO L82 PathProgramCache]: Analyzing trace with hash -323415817, now seen corresponding path program 16 times [2018-01-31 09:06:25,408 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:25,408 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:25,409 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:25,409 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:25,409 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:25,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:25,434 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:26,420 INFO L134 CoverageAnalysis]: Checked inductivity of 793 backedges. 0 proven. 715 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:26,421 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:26,421 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:26,427 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-31 09:06:27,109 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:27,114 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:27,364 INFO L134 CoverageAnalysis]: Checked inductivity of 793 backedges. 0 proven. 715 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:27,385 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:27,385 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 50 [2018-01-31 09:06:27,385 INFO L409 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-01-31 09:06:27,386 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-01-31 09:06:27,386 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=946, Invalid=1504, Unknown=0, NotChecked=0, Total=2450 [2018-01-31 09:06:27,386 INFO L87 Difference]: Start difference. First operand 188 states and 193 transitions. Second operand 50 states. [2018-01-31 09:06:27,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:27,500 INFO L93 Difference]: Finished difference Result 302 states and 312 transitions. [2018-01-31 09:06:27,500 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-31 09:06:27,500 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 181 [2018-01-31 09:06:27,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:27,501 INFO L225 Difference]: With dead ends: 302 [2018-01-31 09:06:27,501 INFO L226 Difference]: Without dead ends: 193 [2018-01-31 09:06:27,502 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 207 GetRequests, 158 SyntacticMatches, 0 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1117 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=973, Invalid=1577, Unknown=0, NotChecked=0, Total=2550 [2018-01-31 09:06:27,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-01-31 09:06:27,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 191. [2018-01-31 09:06:27,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2018-01-31 09:06:27,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 196 transitions. [2018-01-31 09:06:27,511 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 196 transitions. Word has length 181 [2018-01-31 09:06:27,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:27,511 INFO L432 AbstractCegarLoop]: Abstraction has 191 states and 196 transitions. [2018-01-31 09:06:27,511 INFO L433 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-01-31 09:06:27,511 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 196 transitions. [2018-01-31 09:06:27,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 185 [2018-01-31 09:06:27,512 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:27,513 INFO L351 BasicCegarLoop]: trace histogram [23, 23, 23, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:27,513 INFO L371 AbstractCegarLoop]: === Iteration 32 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:27,514 INFO L82 PathProgramCache]: Analyzing trace with hash 373321260, now seen corresponding path program 17 times [2018-01-31 09:06:27,514 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:27,514 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:27,515 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:27,515 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:27,515 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:27,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:27,543 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:28,107 INFO L134 CoverageAnalysis]: Checked inductivity of 860 backedges. 0 proven. 782 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:28,108 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:28,108 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:28,114 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-31 09:06:28,123 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,124 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,125 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,126 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,128 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,129 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,131 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,134 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,138 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,143 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,147 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,152 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,164 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,175 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,185 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,194 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,208 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,220 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,243 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,251 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,265 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,297 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,342 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,458 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:28,461 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:28,466 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:28,742 INFO L134 CoverageAnalysis]: Checked inductivity of 860 backedges. 0 proven. 782 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:28,762 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:28,763 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27] total 52 [2018-01-31 09:06:28,763 INFO L409 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-01-31 09:06:28,763 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-01-31 09:06:28,764 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1023, Invalid=1629, Unknown=0, NotChecked=0, Total=2652 [2018-01-31 09:06:28,764 INFO L87 Difference]: Start difference. First operand 191 states and 196 transitions. Second operand 52 states. [2018-01-31 09:06:28,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:28,877 INFO L93 Difference]: Finished difference Result 305 states and 315 transitions. [2018-01-31 09:06:28,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-31 09:06:28,877 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 184 [2018-01-31 09:06:28,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:28,878 INFO L225 Difference]: With dead ends: 305 [2018-01-31 09:06:28,878 INFO L226 Difference]: Without dead ends: 196 [2018-01-31 09:06:28,879 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 160 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1214 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1051, Invalid=1705, Unknown=0, NotChecked=0, Total=2756 [2018-01-31 09:06:28,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-01-31 09:06:28,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 194. [2018-01-31 09:06:28,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-31 09:06:28,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 199 transitions. [2018-01-31 09:06:28,891 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 199 transitions. Word has length 184 [2018-01-31 09:06:28,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:28,891 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 199 transitions. [2018-01-31 09:06:28,891 INFO L433 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-01-31 09:06:28,892 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 199 transitions. [2018-01-31 09:06:28,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 188 [2018-01-31 09:06:28,892 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:28,892 INFO L351 BasicCegarLoop]: trace histogram [24, 24, 24, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:28,893 INFO L371 AbstractCegarLoop]: === Iteration 33 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:28,893 INFO L82 PathProgramCache]: Analyzing trace with hash -709359401, now seen corresponding path program 18 times [2018-01-31 09:06:28,893 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:28,893 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:28,893 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:28,894 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:28,894 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:28,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:28,932 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:29,655 INFO L134 CoverageAnalysis]: Checked inductivity of 930 backedges. 0 proven. 852 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:29,656 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:29,656 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:29,661 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-31 09:06:29,680 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:29,689 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:29,696 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:29,714 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:29,737 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:29,743 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:29,767 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:29,793 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:29,810 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:29,849 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:29,877 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:29,989 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:30,029 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:30,112 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:30,265 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:30,716 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:31,011 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:31,402 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:32,549 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:33,165 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:34,247 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:34,808 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:34,955 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:35,210 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:36,971 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:36,975 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:36,986 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:37,260 INFO L134 CoverageAnalysis]: Checked inductivity of 930 backedges. 0 proven. 852 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:37,282 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:37,283 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28] total 54 [2018-01-31 09:06:37,283 INFO L409 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-01-31 09:06:37,283 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-01-31 09:06:37,284 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1103, Invalid=1759, Unknown=0, NotChecked=0, Total=2862 [2018-01-31 09:06:37,284 INFO L87 Difference]: Start difference. First operand 194 states and 199 transitions. Second operand 54 states. [2018-01-31 09:06:37,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:37,426 INFO L93 Difference]: Finished difference Result 308 states and 318 transitions. [2018-01-31 09:06:37,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-31 09:06:37,426 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 187 [2018-01-31 09:06:37,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:37,427 INFO L225 Difference]: With dead ends: 308 [2018-01-31 09:06:37,427 INFO L226 Difference]: Without dead ends: 199 [2018-01-31 09:06:37,428 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 162 SyntacticMatches, 0 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1315 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1132, Invalid=1838, Unknown=0, NotChecked=0, Total=2970 [2018-01-31 09:06:37,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 199 states. [2018-01-31 09:06:37,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 199 to 197. [2018-01-31 09:06:37,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-01-31 09:06:37,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 202 transitions. [2018-01-31 09:06:37,434 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 202 transitions. Word has length 187 [2018-01-31 09:06:37,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:37,434 INFO L432 AbstractCegarLoop]: Abstraction has 197 states and 202 transitions. [2018-01-31 09:06:37,434 INFO L433 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-01-31 09:06:37,434 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 202 transitions. [2018-01-31 09:06:37,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 191 [2018-01-31 09:06:37,435 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:37,435 INFO L351 BasicCegarLoop]: trace histogram [25, 25, 25, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:37,435 INFO L371 AbstractCegarLoop]: === Iteration 34 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:37,435 INFO L82 PathProgramCache]: Analyzing trace with hash 355461708, now seen corresponding path program 19 times [2018-01-31 09:06:37,435 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:37,435 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:37,436 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:37,436 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:37,436 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:37,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:37,458 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:37,953 INFO L134 CoverageAnalysis]: Checked inductivity of 1003 backedges. 0 proven. 925 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:37,953 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:37,953 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:37,958 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:06:37,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:38,000 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:38,366 INFO L134 CoverageAnalysis]: Checked inductivity of 1003 backedges. 0 proven. 925 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:38,386 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:38,386 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29] total 56 [2018-01-31 09:06:38,386 INFO L409 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-01-31 09:06:38,386 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-01-31 09:06:38,387 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1186, Invalid=1894, Unknown=0, NotChecked=0, Total=3080 [2018-01-31 09:06:38,387 INFO L87 Difference]: Start difference. First operand 197 states and 202 transitions. Second operand 56 states. [2018-01-31 09:06:38,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:38,784 INFO L93 Difference]: Finished difference Result 311 states and 321 transitions. [2018-01-31 09:06:38,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-31 09:06:38,784 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 190 [2018-01-31 09:06:38,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:38,785 INFO L225 Difference]: With dead ends: 311 [2018-01-31 09:06:38,785 INFO L226 Difference]: Without dead ends: 202 [2018-01-31 09:06:38,786 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 164 SyntacticMatches, 0 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1420 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1216, Invalid=1976, Unknown=0, NotChecked=0, Total=3192 [2018-01-31 09:06:38,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2018-01-31 09:06:38,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 200. [2018-01-31 09:06:38,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states. [2018-01-31 09:06:38,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 205 transitions. [2018-01-31 09:06:38,791 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 205 transitions. Word has length 190 [2018-01-31 09:06:38,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:38,792 INFO L432 AbstractCegarLoop]: Abstraction has 200 states and 205 transitions. [2018-01-31 09:06:38,792 INFO L433 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-01-31 09:06:38,792 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 205 transitions. [2018-01-31 09:06:38,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-01-31 09:06:38,793 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:38,793 INFO L351 BasicCegarLoop]: trace histogram [26, 26, 26, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:38,793 INFO L371 AbstractCegarLoop]: === Iteration 35 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:38,794 INFO L82 PathProgramCache]: Analyzing trace with hash -187328329, now seen corresponding path program 20 times [2018-01-31 09:06:38,794 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:38,794 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:38,794 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:38,795 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:06:38,795 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:38,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:38,820 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:39,848 INFO L134 CoverageAnalysis]: Checked inductivity of 1079 backedges. 0 proven. 1001 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:39,849 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:39,849 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:39,854 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-31 09:06:39,874 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:39,898 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:39,903 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:39,906 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:40,254 INFO L134 CoverageAnalysis]: Checked inductivity of 1079 backedges. 0 proven. 1001 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:40,277 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:40,278 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30] total 58 [2018-01-31 09:06:40,278 INFO L409 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-01-31 09:06:40,278 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-01-31 09:06:40,279 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1272, Invalid=2034, Unknown=0, NotChecked=0, Total=3306 [2018-01-31 09:06:40,279 INFO L87 Difference]: Start difference. First operand 200 states and 205 transitions. Second operand 58 states. [2018-01-31 09:06:40,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:40,449 INFO L93 Difference]: Finished difference Result 314 states and 324 transitions. [2018-01-31 09:06:40,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-31 09:06:40,451 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 193 [2018-01-31 09:06:40,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:40,453 INFO L225 Difference]: With dead ends: 314 [2018-01-31 09:06:40,453 INFO L226 Difference]: Without dead ends: 205 [2018-01-31 09:06:40,454 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 223 GetRequests, 166 SyntacticMatches, 0 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1529 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1303, Invalid=2119, Unknown=0, NotChecked=0, Total=3422 [2018-01-31 09:06:40,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-01-31 09:06:40,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 203. [2018-01-31 09:06:40,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203 states. [2018-01-31 09:06:40,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203 states to 203 states and 208 transitions. [2018-01-31 09:06:40,464 INFO L78 Accepts]: Start accepts. Automaton has 203 states and 208 transitions. Word has length 193 [2018-01-31 09:06:40,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:40,465 INFO L432 AbstractCegarLoop]: Abstraction has 203 states and 208 transitions. [2018-01-31 09:06:40,466 INFO L433 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-01-31 09:06:40,466 INFO L276 IsEmpty]: Start isEmpty. Operand 203 states and 208 transitions. [2018-01-31 09:06:40,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 197 [2018-01-31 09:06:40,467 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:40,467 INFO L351 BasicCegarLoop]: trace histogram [27, 27, 27, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:40,467 INFO L371 AbstractCegarLoop]: === Iteration 36 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:40,467 INFO L82 PathProgramCache]: Analyzing trace with hash 106548844, now seen corresponding path program 21 times [2018-01-31 09:06:40,467 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:40,468 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:40,468 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:40,468 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:40,468 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:40,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:40,492 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:41,222 INFO L134 CoverageAnalysis]: Checked inductivity of 1158 backedges. 0 proven. 1080 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:41,223 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:41,223 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:41,228 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-31 09:06:41,247 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,259 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,272 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,282 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,293 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,308 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,317 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,331 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,342 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,350 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,366 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,376 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,423 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,502 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,527 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,544 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,597 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,617 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,719 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,840 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:41,860 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:42,019 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:42,700 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:43,126 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:44,164 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:44,889 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:46,841 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:48,307 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:06:48,309 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:48,319 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:48,785 INFO L134 CoverageAnalysis]: Checked inductivity of 1158 backedges. 0 proven. 1080 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:48,807 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:48,807 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31] total 60 [2018-01-31 09:06:48,808 INFO L409 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-01-31 09:06:48,808 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-01-31 09:06:48,809 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1361, Invalid=2179, Unknown=0, NotChecked=0, Total=3540 [2018-01-31 09:06:48,809 INFO L87 Difference]: Start difference. First operand 203 states and 208 transitions. Second operand 60 states. [2018-01-31 09:06:48,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:48,963 INFO L93 Difference]: Finished difference Result 317 states and 327 transitions. [2018-01-31 09:06:48,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-31 09:06:48,964 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 196 [2018-01-31 09:06:48,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:48,965 INFO L225 Difference]: With dead ends: 317 [2018-01-31 09:06:48,965 INFO L226 Difference]: Without dead ends: 208 [2018-01-31 09:06:48,966 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 227 GetRequests, 168 SyntacticMatches, 0 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1642 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1393, Invalid=2267, Unknown=0, NotChecked=0, Total=3660 [2018-01-31 09:06:48,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208 states. [2018-01-31 09:06:48,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208 to 206. [2018-01-31 09:06:48,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-01-31 09:06:48,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 211 transitions. [2018-01-31 09:06:48,973 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 211 transitions. Word has length 196 [2018-01-31 09:06:48,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:48,973 INFO L432 AbstractCegarLoop]: Abstraction has 206 states and 211 transitions. [2018-01-31 09:06:48,973 INFO L433 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-01-31 09:06:48,973 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 211 transitions. [2018-01-31 09:06:48,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 200 [2018-01-31 09:06:48,974 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:48,974 INFO L351 BasicCegarLoop]: trace histogram [28, 28, 28, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:48,974 INFO L371 AbstractCegarLoop]: === Iteration 37 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:48,974 INFO L82 PathProgramCache]: Analyzing trace with hash 1858060439, now seen corresponding path program 22 times [2018-01-31 09:06:48,974 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:48,974 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:48,975 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:48,975 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:48,975 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:48,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:48,997 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:49,620 INFO L134 CoverageAnalysis]: Checked inductivity of 1240 backedges. 0 proven. 1162 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:49,620 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:49,620 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:49,625 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-31 09:06:50,293 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:50,299 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:50,712 INFO L134 CoverageAnalysis]: Checked inductivity of 1240 backedges. 0 proven. 1162 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:50,733 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:50,734 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 62 [2018-01-31 09:06:50,734 INFO L409 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-01-31 09:06:50,734 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-01-31 09:06:50,735 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1453, Invalid=2329, Unknown=0, NotChecked=0, Total=3782 [2018-01-31 09:06:50,735 INFO L87 Difference]: Start difference. First operand 206 states and 211 transitions. Second operand 62 states. [2018-01-31 09:06:50,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:50,888 INFO L93 Difference]: Finished difference Result 320 states and 330 transitions. [2018-01-31 09:06:50,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-31 09:06:50,888 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 199 [2018-01-31 09:06:50,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:50,889 INFO L225 Difference]: With dead ends: 320 [2018-01-31 09:06:50,890 INFO L226 Difference]: Without dead ends: 211 [2018-01-31 09:06:50,890 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 170 SyntacticMatches, 0 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1759 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1486, Invalid=2420, Unknown=0, NotChecked=0, Total=3906 [2018-01-31 09:06:50,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2018-01-31 09:06:50,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 209. [2018-01-31 09:06:50,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2018-01-31 09:06:50,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 214 transitions. [2018-01-31 09:06:50,901 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 214 transitions. Word has length 199 [2018-01-31 09:06:50,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:50,902 INFO L432 AbstractCegarLoop]: Abstraction has 209 states and 214 transitions. [2018-01-31 09:06:50,902 INFO L433 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-01-31 09:06:50,902 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 214 transitions. [2018-01-31 09:06:50,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2018-01-31 09:06:50,903 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:50,904 INFO L351 BasicCegarLoop]: trace histogram [29, 29, 29, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:50,904 INFO L371 AbstractCegarLoop]: === Iteration 38 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:50,904 INFO L82 PathProgramCache]: Analyzing trace with hash 1582307980, now seen corresponding path program 23 times [2018-01-31 09:06:50,904 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:50,904 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:50,905 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:50,907 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:50,907 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:50,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:50,931 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:51,599 INFO L134 CoverageAnalysis]: Checked inductivity of 1325 backedges. 0 proven. 1247 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:51,599 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:51,599 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:51,604 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-31 09:06:51,614 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,615 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,616 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,617 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,619 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,620 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,623 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,625 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,630 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,634 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,637 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,644 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,651 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,659 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,667 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,681 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,689 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,701 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,714 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,738 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,751 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,778 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,822 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,837 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,933 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:51,987 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:52,021 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:52,087 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:52,178 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:52,279 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:06:52,282 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:06:52,287 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:06:52,716 INFO L134 CoverageAnalysis]: Checked inductivity of 1325 backedges. 0 proven. 1247 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:52,737 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:06:52,737 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33] total 64 [2018-01-31 09:06:52,737 INFO L409 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-01-31 09:06:52,738 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-01-31 09:06:52,738 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1548, Invalid=2484, Unknown=0, NotChecked=0, Total=4032 [2018-01-31 09:06:52,738 INFO L87 Difference]: Start difference. First operand 209 states and 214 transitions. Second operand 64 states. [2018-01-31 09:06:52,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:06:52,903 INFO L93 Difference]: Finished difference Result 323 states and 333 transitions. [2018-01-31 09:06:52,903 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-31 09:06:52,903 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 202 [2018-01-31 09:06:52,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:06:52,904 INFO L225 Difference]: With dead ends: 323 [2018-01-31 09:06:52,904 INFO L226 Difference]: Without dead ends: 214 [2018-01-31 09:06:52,905 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 235 GetRequests, 172 SyntacticMatches, 0 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1880 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1582, Invalid=2578, Unknown=0, NotChecked=0, Total=4160 [2018-01-31 09:06:52,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-01-31 09:06:52,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 212. [2018-01-31 09:06:52,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212 states. [2018-01-31 09:06:52,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 217 transitions. [2018-01-31 09:06:52,915 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 217 transitions. Word has length 202 [2018-01-31 09:06:52,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:06:52,915 INFO L432 AbstractCegarLoop]: Abstraction has 212 states and 217 transitions. [2018-01-31 09:06:52,915 INFO L433 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-01-31 09:06:52,915 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 217 transitions. [2018-01-31 09:06:52,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2018-01-31 09:06:52,917 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:06:52,917 INFO L351 BasicCegarLoop]: trace histogram [30, 30, 30, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:06:52,917 INFO L371 AbstractCegarLoop]: === Iteration 39 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:06:52,917 INFO L82 PathProgramCache]: Analyzing trace with hash -1381728137, now seen corresponding path program 24 times [2018-01-31 09:06:52,917 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:06:52,917 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:06:52,918 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:52,918 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:06:52,918 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:06:52,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:06:52,949 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:06:53,672 INFO L134 CoverageAnalysis]: Checked inductivity of 1413 backedges. 0 proven. 1335 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:06:53,672 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:06:53,672 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-01-31 09:06:53,685 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:06:53,706 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:53,714 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:53,722 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:53,745 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:53,764 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:53,778 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:53,799 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:53,856 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:53,890 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:54,039 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:54,140 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:54,170 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:54,453 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:54,603 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:54,820 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:54,920 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:55,022 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:55,345 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:55,808 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:56,228 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:56,608 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:57,631 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:58,409 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:06:59,734 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:07:02,554 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:07:06,398 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:07:09,272 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:07:13,287 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:07:16,449 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:07:17,623 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:07:24,572 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:07:24,580 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:07:24,604 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:07:25,338 INFO L134 CoverageAnalysis]: Checked inductivity of 1413 backedges. 0 proven. 1335 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:07:25,365 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:07:25,366 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34] total 66 [2018-01-31 09:07:25,366 INFO L409 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-01-31 09:07:25,366 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-01-31 09:07:25,367 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1646, Invalid=2644, Unknown=0, NotChecked=0, Total=4290 [2018-01-31 09:07:25,367 INFO L87 Difference]: Start difference. First operand 212 states and 217 transitions. Second operand 66 states. [2018-01-31 09:07:25,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:07:25,541 INFO L93 Difference]: Finished difference Result 326 states and 336 transitions. [2018-01-31 09:07:25,541 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-31 09:07:25,541 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 205 [2018-01-31 09:07:25,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:07:25,542 INFO L225 Difference]: With dead ends: 326 [2018-01-31 09:07:25,542 INFO L226 Difference]: Without dead ends: 217 [2018-01-31 09:07:25,543 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 239 GetRequests, 174 SyntacticMatches, 0 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2005 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=1681, Invalid=2741, Unknown=0, NotChecked=0, Total=4422 [2018-01-31 09:07:25,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217 states. [2018-01-31 09:07:25,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217 to 215. [2018-01-31 09:07:25,551 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 215 states. [2018-01-31 09:07:25,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 215 states to 215 states and 220 transitions. [2018-01-31 09:07:25,552 INFO L78 Accepts]: Start accepts. Automaton has 215 states and 220 transitions. Word has length 205 [2018-01-31 09:07:25,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:07:25,552 INFO L432 AbstractCegarLoop]: Abstraction has 215 states and 220 transitions. [2018-01-31 09:07:25,552 INFO L433 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-01-31 09:07:25,552 INFO L276 IsEmpty]: Start isEmpty. Operand 215 states and 220 transitions. [2018-01-31 09:07:25,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 209 [2018-01-31 09:07:25,553 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:07:25,554 INFO L351 BasicCegarLoop]: trace histogram [31, 31, 31, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:07:25,554 INFO L371 AbstractCegarLoop]: === Iteration 40 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:07:25,554 INFO L82 PathProgramCache]: Analyzing trace with hash 1545916076, now seen corresponding path program 25 times [2018-01-31 09:07:25,554 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:07:25,554 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:07:25,555 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:07:25,557 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:07:25,558 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:07:25,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:07:25,581 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:07:26,747 INFO L134 CoverageAnalysis]: Checked inductivity of 1504 backedges. 0 proven. 1426 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:07:26,747 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:07:26,747 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:07:26,752 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:07:26,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:07:26,796 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:07:27,404 INFO L134 CoverageAnalysis]: Checked inductivity of 1504 backedges. 0 proven. 1426 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:07:27,429 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:07:27,429 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35] total 68 [2018-01-31 09:07:27,430 INFO L409 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-01-31 09:07:27,430 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-01-31 09:07:27,430 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1747, Invalid=2809, Unknown=0, NotChecked=0, Total=4556 [2018-01-31 09:07:27,431 INFO L87 Difference]: Start difference. First operand 215 states and 220 transitions. Second operand 68 states. [2018-01-31 09:07:27,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:07:27,598 INFO L93 Difference]: Finished difference Result 329 states and 339 transitions. [2018-01-31 09:07:27,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-31 09:07:27,598 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 208 [2018-01-31 09:07:27,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:07:27,599 INFO L225 Difference]: With dead ends: 329 [2018-01-31 09:07:27,599 INFO L226 Difference]: Without dead ends: 220 [2018-01-31 09:07:27,600 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 243 GetRequests, 176 SyntacticMatches, 0 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2134 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=1783, Invalid=2909, Unknown=0, NotChecked=0, Total=4692 [2018-01-31 09:07:27,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-01-31 09:07:27,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 218. [2018-01-31 09:07:27,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 218 states. [2018-01-31 09:07:27,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 223 transitions. [2018-01-31 09:07:27,610 INFO L78 Accepts]: Start accepts. Automaton has 218 states and 223 transitions. Word has length 208 [2018-01-31 09:07:27,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:07:27,611 INFO L432 AbstractCegarLoop]: Abstraction has 218 states and 223 transitions. [2018-01-31 09:07:27,611 INFO L433 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-01-31 09:07:27,612 INFO L276 IsEmpty]: Start isEmpty. Operand 218 states and 223 transitions. [2018-01-31 09:07:27,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 212 [2018-01-31 09:07:27,613 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:07:27,613 INFO L351 BasicCegarLoop]: trace histogram [32, 32, 32, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:07:27,613 INFO L371 AbstractCegarLoop]: === Iteration 41 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:07:27,613 INFO L82 PathProgramCache]: Analyzing trace with hash 1093785687, now seen corresponding path program 26 times [2018-01-31 09:07:27,614 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:07:27,614 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:07:27,614 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:07:27,614 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-31 09:07:27,615 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:07:27,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:07:27,642 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:07:28,341 INFO L134 CoverageAnalysis]: Checked inductivity of 1598 backedges. 0 proven. 1520 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:07:28,341 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:07:28,341 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:07:28,346 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-31 09:07:28,366 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:28,397 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:28,410 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:07:28,415 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:07:29,123 INFO L134 CoverageAnalysis]: Checked inductivity of 1598 backedges. 0 proven. 1520 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:07:29,143 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:07:29,143 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36] total 70 [2018-01-31 09:07:29,143 INFO L409 AbstractCegarLoop]: Interpolant automaton has 70 states [2018-01-31 09:07:29,144 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2018-01-31 09:07:29,144 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1851, Invalid=2979, Unknown=0, NotChecked=0, Total=4830 [2018-01-31 09:07:29,144 INFO L87 Difference]: Start difference. First operand 218 states and 223 transitions. Second operand 70 states. [2018-01-31 09:07:29,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:07:29,303 INFO L93 Difference]: Finished difference Result 332 states and 342 transitions. [2018-01-31 09:07:29,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-31 09:07:29,306 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 211 [2018-01-31 09:07:29,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:07:29,307 INFO L225 Difference]: With dead ends: 332 [2018-01-31 09:07:29,307 INFO L226 Difference]: Without dead ends: 223 [2018-01-31 09:07:29,307 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 247 GetRequests, 178 SyntacticMatches, 0 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2267 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1888, Invalid=3082, Unknown=0, NotChecked=0, Total=4970 [2018-01-31 09:07:29,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-01-31 09:07:29,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 221. [2018-01-31 09:07:29,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221 states. [2018-01-31 09:07:29,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 226 transitions. [2018-01-31 09:07:29,317 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 226 transitions. Word has length 211 [2018-01-31 09:07:29,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:07:29,317 INFO L432 AbstractCegarLoop]: Abstraction has 221 states and 226 transitions. [2018-01-31 09:07:29,317 INFO L433 AbstractCegarLoop]: Interpolant automaton has 70 states. [2018-01-31 09:07:29,317 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 226 transitions. [2018-01-31 09:07:29,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 215 [2018-01-31 09:07:29,319 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:07:29,319 INFO L351 BasicCegarLoop]: trace histogram [33, 33, 33, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:07:29,319 INFO L371 AbstractCegarLoop]: === Iteration 42 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:07:29,319 INFO L82 PathProgramCache]: Analyzing trace with hash 694807244, now seen corresponding path program 27 times [2018-01-31 09:07:29,319 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:07:29,319 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:07:29,320 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:07:29,321 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:07:29,321 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:07:29,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:07:29,348 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:07:30,198 INFO L134 CoverageAnalysis]: Checked inductivity of 1695 backedges. 0 proven. 1617 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:07:30,198 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:07:30,198 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:07:30,203 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-31 09:07:30,224 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,235 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,248 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,257 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,265 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,273 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,286 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,299 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,310 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,321 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,344 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,384 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,431 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,464 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,522 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,633 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,709 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,731 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,790 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:30,896 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:31,080 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:31,868 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:33,032 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:33,929 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:35,510 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:36,177 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:37,771 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:38,467 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:38,799 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:41,263 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:43,683 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:46,383 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:49,687 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:51,021 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-31 09:07:51,025 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:07:51,041 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:07:51,650 INFO L134 CoverageAnalysis]: Checked inductivity of 1695 backedges. 0 proven. 1617 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:07:51,674 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:07:51,675 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 39] total 74 [2018-01-31 09:07:51,675 INFO L409 AbstractCegarLoop]: Interpolant automaton has 74 states [2018-01-31 09:07:51,675 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2018-01-31 09:07:51,676 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1962, Invalid=3440, Unknown=0, NotChecked=0, Total=5402 [2018-01-31 09:07:51,676 INFO L87 Difference]: Start difference. First operand 221 states and 226 transitions. Second operand 74 states. [2018-01-31 09:07:52,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:07:52,043 INFO L93 Difference]: Finished difference Result 335 states and 345 transitions. [2018-01-31 09:07:52,043 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-31 09:07:52,043 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 214 [2018-01-31 09:07:52,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:07:52,044 INFO L225 Difference]: With dead ends: 335 [2018-01-31 09:07:52,044 INFO L226 Difference]: Without dead ends: 226 [2018-01-31 09:07:52,044 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 253 GetRequests, 179 SyntacticMatches, 0 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2509 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=2004, Invalid=3696, Unknown=0, NotChecked=0, Total=5700 [2018-01-31 09:07:52,045 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2018-01-31 09:07:52,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 224. [2018-01-31 09:07:52,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states. [2018-01-31 09:07:52,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 229 transitions. [2018-01-31 09:07:52,056 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 229 transitions. Word has length 214 [2018-01-31 09:07:52,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:07:52,056 INFO L432 AbstractCegarLoop]: Abstraction has 224 states and 229 transitions. [2018-01-31 09:07:52,056 INFO L433 AbstractCegarLoop]: Interpolant automaton has 74 states. [2018-01-31 09:07:52,056 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 229 transitions. [2018-01-31 09:07:52,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2018-01-31 09:07:52,057 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:07:52,058 INFO L351 BasicCegarLoop]: trace histogram [34, 34, 34, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:07:52,058 INFO L371 AbstractCegarLoop]: === Iteration 43 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:07:52,058 INFO L82 PathProgramCache]: Analyzing trace with hash -1097480137, now seen corresponding path program 28 times [2018-01-31 09:07:52,058 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:07:52,058 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:07:52,059 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:07:52,059 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:07:52,059 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:07:52,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:07:52,089 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:07:53,012 INFO L134 CoverageAnalysis]: Checked inductivity of 1795 backedges. 0 proven. 1717 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:07:53,012 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:07:53,012 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:07:53,018 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-31 09:07:54,090 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:07:54,097 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:07:56,145 INFO L134 CoverageAnalysis]: Checked inductivity of 1795 backedges. 0 proven. 1717 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:07:56,167 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:07:56,167 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38] total 74 [2018-01-31 09:07:56,168 INFO L409 AbstractCegarLoop]: Interpolant automaton has 74 states [2018-01-31 09:07:56,168 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2018-01-31 09:07:56,169 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2068, Invalid=3334, Unknown=0, NotChecked=0, Total=5402 [2018-01-31 09:07:56,169 INFO L87 Difference]: Start difference. First operand 224 states and 229 transitions. Second operand 74 states. [2018-01-31 09:07:56,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:07:56,324 INFO L93 Difference]: Finished difference Result 338 states and 348 transitions. [2018-01-31 09:07:56,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-31 09:07:56,324 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 217 [2018-01-31 09:07:56,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:07:56,325 INFO L225 Difference]: With dead ends: 338 [2018-01-31 09:07:56,325 INFO L226 Difference]: Without dead ends: 229 [2018-01-31 09:07:56,326 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 255 GetRequests, 182 SyntacticMatches, 0 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2545 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=2107, Invalid=3443, Unknown=0, NotChecked=0, Total=5550 [2018-01-31 09:07:56,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-01-31 09:07:56,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 227. [2018-01-31 09:07:56,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 227 states. [2018-01-31 09:07:56,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227 states to 227 states and 232 transitions. [2018-01-31 09:07:56,336 INFO L78 Accepts]: Start accepts. Automaton has 227 states and 232 transitions. Word has length 217 [2018-01-31 09:07:56,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:07:56,337 INFO L432 AbstractCegarLoop]: Abstraction has 227 states and 232 transitions. [2018-01-31 09:07:56,337 INFO L433 AbstractCegarLoop]: Interpolant automaton has 74 states. [2018-01-31 09:07:56,337 INFO L276 IsEmpty]: Start isEmpty. Operand 227 states and 232 transitions. [2018-01-31 09:07:56,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 221 [2018-01-31 09:07:56,341 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:07:56,341 INFO L351 BasicCegarLoop]: trace histogram [35, 35, 35, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:07:56,341 INFO L371 AbstractCegarLoop]: === Iteration 44 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:07:56,341 INFO L82 PathProgramCache]: Analyzing trace with hash -97423636, now seen corresponding path program 29 times [2018-01-31 09:07:56,341 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:07:56,342 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:07:56,342 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:07:56,342 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:07:56,342 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:07:56,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:07:56,370 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:07:57,330 INFO L134 CoverageAnalysis]: Checked inductivity of 1898 backedges. 0 proven. 1820 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:07:57,330 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:07:57,330 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:07:57,335 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-31 09:07:57,346 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,349 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,350 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,351 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,353 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,355 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,357 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,360 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,363 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,371 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,377 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,381 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,388 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,403 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,418 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,436 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,459 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,467 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,476 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,489 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,499 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,539 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,563 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,576 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,614 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,628 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,654 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,773 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,799 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,832 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:57,968 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:58,014 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:58,052 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:58,204 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:58,262 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:58,343 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-31 09:07:58,347 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-31 09:07:58,353 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-31 09:07:58,894 INFO L134 CoverageAnalysis]: Checked inductivity of 1898 backedges. 0 proven. 1820 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:07:58,916 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-31 09:07:58,917 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39] total 76 [2018-01-31 09:07:58,917 INFO L409 AbstractCegarLoop]: Interpolant automaton has 76 states [2018-01-31 09:07:58,918 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2018-01-31 09:07:58,918 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2181, Invalid=3519, Unknown=0, NotChecked=0, Total=5700 [2018-01-31 09:07:58,918 INFO L87 Difference]: Start difference. First operand 227 states and 232 transitions. Second operand 76 states. [2018-01-31 09:07:59,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-31 09:07:59,081 INFO L93 Difference]: Finished difference Result 341 states and 351 transitions. [2018-01-31 09:07:59,081 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-31 09:07:59,081 INFO L78 Accepts]: Start accepts. Automaton has 76 states. Word has length 220 [2018-01-31 09:07:59,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-31 09:07:59,082 INFO L225 Difference]: With dead ends: 341 [2018-01-31 09:07:59,082 INFO L226 Difference]: Without dead ends: 232 [2018-01-31 09:07:59,082 INFO L554 BasicCegarLoop]: 0 DeclaredPredicates, 259 GetRequests, 184 SyntacticMatches, 0 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2690 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2221, Invalid=3631, Unknown=0, NotChecked=0, Total=5852 [2018-01-31 09:07:59,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2018-01-31 09:07:59,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 230. [2018-01-31 09:07:59,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230 states. [2018-01-31 09:07:59,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230 states to 230 states and 235 transitions. [2018-01-31 09:07:59,091 INFO L78 Accepts]: Start accepts. Automaton has 230 states and 235 transitions. Word has length 220 [2018-01-31 09:07:59,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-31 09:07:59,092 INFO L432 AbstractCegarLoop]: Abstraction has 230 states and 235 transitions. [2018-01-31 09:07:59,092 INFO L433 AbstractCegarLoop]: Interpolant automaton has 76 states. [2018-01-31 09:07:59,092 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 235 transitions. [2018-01-31 09:07:59,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 224 [2018-01-31 09:07:59,093 INFO L343 BasicCegarLoop]: Found error trace [2018-01-31 09:07:59,094 INFO L351 BasicCegarLoop]: trace histogram [36, 36, 36, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-31 09:07:59,094 INFO L371 AbstractCegarLoop]: === Iteration 45 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-31 09:07:59,094 INFO L82 PathProgramCache]: Analyzing trace with hash -1602334697, now seen corresponding path program 30 times [2018-01-31 09:07:59,094 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-31 09:07:59,094 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-31 09:07:59,096 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:07:59,097 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-31 09:07:59,097 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-31 09:07:59,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-31 09:07:59,135 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-31 09:08:00,343 INFO L134 CoverageAnalysis]: Checked inductivity of 2004 backedges. 0 proven. 1926 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-31 09:08:00,371 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-31 09:08:00,371 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-31 09:08:00,376 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-31 09:08:00,397 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:00,407 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:00,417 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:00,430 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:00,439 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:00,465 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:00,499 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:00,517 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:00,541 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:00,569 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:00,587 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:00,605 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:00,694 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:00,728 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:00,744 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:00,827 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:00,908 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:00,958 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:01,687 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:03,589 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:04,983 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command Received shutdown request... [2018-01-31 09:08:06,138 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:07,566 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-31 09:08:09,784 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command Cannot interrupt operation gracefully because timeout expired. Forcing shutdown