java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/memsafety-ext2/length_test03_true-valid-memsafety.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-d4a2356 [2018-03-23 11:48:27,767 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-03-23 11:48:27,769 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-03-23 11:48:27,786 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-03-23 11:48:27,786 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-03-23 11:48:27,787 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-03-23 11:48:27,788 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-03-23 11:48:27,790 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-03-23 11:48:27,792 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-03-23 11:48:27,793 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-03-23 11:48:27,794 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-03-23 11:48:27,794 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-03-23 11:48:27,795 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-03-23 11:48:27,797 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-03-23 11:48:27,798 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-03-23 11:48:27,800 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-03-23 11:48:27,802 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-03-23 11:48:27,804 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-03-23 11:48:27,806 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-03-23 11:48:27,807 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-03-23 11:48:27,809 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-03-23 11:48:27,810 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-03-23 11:48:27,810 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-03-23 11:48:27,811 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-03-23 11:48:27,812 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-03-23 11:48:27,813 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-03-23 11:48:27,813 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-03-23 11:48:27,814 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-03-23 11:48:27,814 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-03-23 11:48:27,815 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-03-23 11:48:27,815 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-03-23 11:48:27,816 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-03-23 11:48:27,825 INFO L110 SettingsManager]: Loading preferences was successful [2018-03-23 11:48:27,825 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-03-23 11:48:27,826 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-03-23 11:48:27,826 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-03-23 11:48:27,826 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-03-23 11:48:27,826 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-03-23 11:48:27,827 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-03-23 11:48:27,827 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-03-23 11:48:27,827 INFO L133 SettingsManager]: * sizeof long=4 [2018-03-23 11:48:27,828 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-03-23 11:48:27,828 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-03-23 11:48:27,828 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-03-23 11:48:27,828 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-03-23 11:48:27,828 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-03-23 11:48:27,828 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-03-23 11:48:27,829 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-03-23 11:48:27,829 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-03-23 11:48:27,829 INFO L133 SettingsManager]: * sizeof long double=12 [2018-03-23 11:48:27,829 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-03-23 11:48:27,829 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-03-23 11:48:27,830 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-03-23 11:48:27,830 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-03-23 11:48:27,830 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-03-23 11:48:27,830 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-03-23 11:48:27,830 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-03-23 11:48:27,830 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-03-23 11:48:27,831 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-03-23 11:48:27,831 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-03-23 11:48:27,831 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-03-23 11:48:27,831 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-03-23 11:48:27,831 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-23 11:48:27,832 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-03-23 11:48:27,832 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-03-23 11:48:27,833 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-03-23 11:48:27,867 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-03-23 11:48:27,880 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-03-23 11:48:27,884 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-03-23 11:48:27,886 INFO L271 PluginConnector]: Initializing CDTParser... [2018-03-23 11:48:27,886 INFO L276 PluginConnector]: CDTParser initialized [2018-03-23 11:48:27,887 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety-ext2/length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,213 INFO L228 CDTParser]: Created temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG1e9777e41 [2018-03-23 11:48:28,397 INFO L291 CDTParser]: IsIndexed: true [2018-03-23 11:48:28,397 INFO L292 CDTParser]: Found 1 translation units. [2018-03-23 11:48:28,397 INFO L171 CDTParser]: Scanning length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,408 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-03-23 11:48:28,408 INFO L215 ultiparseSymbolTable]: [2018-03-23 11:48:28,408 INFO L218 ultiparseSymbolTable]: Function table: [2018-03-23 11:48:28,409 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_flength_test___true_valid_memsafety_i__append ('append') in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,409 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_flength_test___true_valid_memsafety_i____bswap_64 ('__bswap_64') in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,409 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,409 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_flength_test___true_valid_memsafety_i____bswap_32 ('__bswap_32') in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,409 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-03-23 11:48:28,409 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__nlink_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,409 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____fd_mask in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,409 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__wchar_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,410 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__pthread_attr_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,410 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____sig_atomic_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,410 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__pthread_once_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,410 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__u_int8_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,410 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__dev_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,410 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__pthread_condattr_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,410 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__id_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,410 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____u_int in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,410 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__pthread_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,411 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____clock_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,411 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__timer_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,411 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__clockid_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,411 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__fsid_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,411 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____int8_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,411 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__pthread_spinlock_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,411 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____nlink_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,411 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____sigset_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,411 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__suseconds_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,412 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____blkcnt64_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,412 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____uint64_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,412 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__gid_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,412 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__ssize_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,412 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__fd_mask in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,412 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__u_short in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,412 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__uint in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,412 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__u_long in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,413 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____uid_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,413 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__pid_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,413 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____fsword_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,413 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____ino64_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,413 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____uint16_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,413 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__int8_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,413 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__daddr_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,413 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__clock_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,413 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____syscall_slong_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,414 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____loff_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,414 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____blkcnt_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,414 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__register_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,414 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__int64_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,414 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____daddr_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,414 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____fsfilcnt_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,414 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__pthread_barrierattr_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,414 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__ldiv_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,415 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__u_quad_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,415 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__ushort in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,415 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__pthread_mutex_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,415 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____time_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,415 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__u_int64_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,415 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____useconds_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,415 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____fsfilcnt64_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,415 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__loff_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,416 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____key_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,416 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__ino_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,416 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____uint8_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,416 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____int64_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,416 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____qaddr_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,416 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__int16_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,416 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__blksize_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,416 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____u_char in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,416 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____blksize_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,417 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__pthread_key_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,417 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__pthread_rwlock_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,417 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__lldiv_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,417 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____dev_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,417 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____fsblkcnt_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,417 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__uid_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,417 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____rlim64_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,417 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____uint32_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,417 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__fsblkcnt_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,417 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__time_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,418 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__div_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,418 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____int32_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,418 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____id_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,418 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____syscall_ulong_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,418 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__ulong in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,418 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__mode_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,418 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__sigset_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,418 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____pthread_slist_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,418 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__u_int32_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,418 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____u_short in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,418 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__caddr_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,418 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__key_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,418 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__pthread_rwlockattr_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,418 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____caddr_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,419 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__fd_set in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,419 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____off_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,419 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____quad_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,419 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____mode_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,419 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__fsfilcnt_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,419 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____fsid_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,419 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____gid_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,419 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__int32_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,419 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____pid_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,419 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____ssize_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,419 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____socklen_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,419 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__pthread_mutexattr_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,419 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____ino_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,419 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__off_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,419 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____timer_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,420 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____u_long in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,420 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__pthread_cond_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,420 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____int16_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,420 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__size_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,420 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____intptr_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,420 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__u_int16_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,420 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__blkcnt_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,420 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____rlim_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,420 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____clockid_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,420 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__u_char in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,420 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__u_int in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,420 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__quad_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,420 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____fsblkcnt64_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,421 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____off64_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,421 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____suseconds_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,421 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i__pthread_barrier_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,421 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flength_test___true_valid_memsafety_i____u_quad_t in length_test03_true-valid-memsafety.i [2018-03-23 11:48:28,440 INFO L334 CDTParser]: Deleted temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG1e9777e41 [2018-03-23 11:48:28,444 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-03-23 11:48:28,445 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-03-23 11:48:28,446 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-03-23 11:48:28,446 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-03-23 11:48:28,451 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-03-23 11:48:28,452 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.03 11:48:28" (1/1) ... [2018-03-23 11:48:28,455 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5553da4c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:28, skipping insertion in model container [2018-03-23 11:48:28,455 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.03 11:48:28" (1/1) ... [2018-03-23 11:48:28,471 INFO L167 Dispatcher]: Using SV-COMP mode [2018-03-23 11:48:28,504 INFO L167 Dispatcher]: Using SV-COMP mode [2018-03-23 11:48:28,697 INFO L175 PostProcessor]: Settings: Checked method=main [2018-03-23 11:48:28,752 INFO L175 PostProcessor]: Settings: Checked method=main [2018-03-23 11:48:28,759 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 119 non ball SCCs. Number of states in SCCs 119. [2018-03-23 11:48:28,811 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:28 WrapperNode [2018-03-23 11:48:28,811 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-03-23 11:48:28,812 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-03-23 11:48:28,812 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-03-23 11:48:28,812 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-03-23 11:48:28,823 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:28" (1/1) ... [2018-03-23 11:48:28,823 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:28" (1/1) ... [2018-03-23 11:48:28,840 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:28" (1/1) ... [2018-03-23 11:48:28,841 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:28" (1/1) ... [2018-03-23 11:48:28,856 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:28" (1/1) ... [2018-03-23 11:48:28,861 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:28" (1/1) ... [2018-03-23 11:48:28,865 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:28" (1/1) ... [2018-03-23 11:48:28,870 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-03-23 11:48:28,871 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-03-23 11:48:28,871 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-03-23 11:48:28,871 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-03-23 11:48:28,872 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:28" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-03-23 11:48:28,990 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-03-23 11:48:28,991 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-03-23 11:48:28,991 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_flength_test___true_valid_memsafety_i____bswap_32 [2018-03-23 11:48:28,991 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_flength_test___true_valid_memsafety_i____bswap_64 [2018-03-23 11:48:28,991 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_flength_test___true_valid_memsafety_i__append [2018-03-23 11:48:28,991 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-03-23 11:48:28,991 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-03-23 11:48:28,991 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-03-23 11:48:28,992 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-03-23 11:48:28,992 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-03-23 11:48:28,992 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-03-23 11:48:28,992 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-03-23 11:48:28,992 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-03-23 11:48:28,992 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-03-23 11:48:28,992 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-03-23 11:48:28,993 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-03-23 11:48:28,993 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-03-23 11:48:28,993 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-03-23 11:48:28,993 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-03-23 11:48:28,993 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-03-23 11:48:28,993 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-03-23 11:48:28,994 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-03-23 11:48:28,994 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-03-23 11:48:28,994 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_flength_test___true_valid_memsafety_i____bswap_32 [2018-03-23 11:48:28,994 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_flength_test___true_valid_memsafety_i____bswap_64 [2018-03-23 11:48:28,994 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-03-23 11:48:28,994 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-03-23 11:48:28,995 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-03-23 11:48:28,995 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-03-23 11:48:28,995 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-03-23 11:48:28,995 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-03-23 11:48:28,995 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-03-23 11:48:28,995 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-03-23 11:48:28,995 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-03-23 11:48:28,995 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-03-23 11:48:28,995 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-03-23 11:48:28,995 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-03-23 11:48:28,996 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-03-23 11:48:28,996 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-03-23 11:48:28,996 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-03-23 11:48:28,996 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-03-23 11:48:28,996 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-03-23 11:48:28,996 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-03-23 11:48:28,996 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-03-23 11:48:28,996 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-03-23 11:48:28,996 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-03-23 11:48:28,996 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-03-23 11:48:28,997 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-03-23 11:48:28,997 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-03-23 11:48:28,997 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-03-23 11:48:28,997 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-03-23 11:48:28,997 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-03-23 11:48:28,997 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-03-23 11:48:28,997 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-03-23 11:48:28,997 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-03-23 11:48:28,997 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-03-23 11:48:28,997 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-03-23 11:48:28,998 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-03-23 11:48:28,998 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-03-23 11:48:28,998 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-03-23 11:48:28,998 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-03-23 11:48:28,998 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-03-23 11:48:28,998 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-03-23 11:48:28,998 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-03-23 11:48:28,998 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-03-23 11:48:28,998 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-03-23 11:48:28,998 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-03-23 11:48:28,998 INFO L128 BoogieDeclarations]: Found specification of procedure aligned_alloc [2018-03-23 11:48:28,998 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-03-23 11:48:28,999 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-03-23 11:48:28,999 INFO L128 BoogieDeclarations]: Found specification of procedure at_quick_exit [2018-03-23 11:48:28,999 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-03-23 11:48:28,999 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-03-23 11:48:28,999 INFO L128 BoogieDeclarations]: Found specification of procedure quick_exit [2018-03-23 11:48:28,999 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-03-23 11:48:28,999 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-03-23 11:48:28,999 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-03-23 11:48:28,999 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-03-23 11:48:29,000 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-03-23 11:48:29,000 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-03-23 11:48:29,000 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-03-23 11:48:29,000 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-03-23 11:48:29,000 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-03-23 11:48:29,000 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-03-23 11:48:29,000 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-03-23 11:48:29,000 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-03-23 11:48:29,000 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-03-23 11:48:29,000 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-03-23 11:48:29,000 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-03-23 11:48:29,000 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-03-23 11:48:29,001 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-03-23 11:48:29,001 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-03-23 11:48:29,001 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-03-23 11:48:29,001 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-03-23 11:48:29,001 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-03-23 11:48:29,001 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-03-23 11:48:29,001 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-03-23 11:48:29,002 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-03-23 11:48:29,002 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-03-23 11:48:29,002 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-03-23 11:48:29,002 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-03-23 11:48:29,002 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-03-23 11:48:29,002 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-03-23 11:48:29,002 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-03-23 11:48:29,002 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-03-23 11:48:29,002 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-03-23 11:48:29,002 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-03-23 11:48:29,002 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-03-23 11:48:29,003 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-03-23 11:48:29,003 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-03-23 11:48:29,003 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-03-23 11:48:29,003 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-03-23 11:48:29,003 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_char [2018-03-23 11:48:29,003 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-03-23 11:48:29,003 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_flength_test___true_valid_memsafety_i__append [2018-03-23 11:48:29,003 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-03-23 11:48:29,004 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-03-23 11:48:29,004 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-03-23 11:48:29,004 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-03-23 11:48:29,004 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-03-23 11:48:29,004 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-03-23 11:48:29,004 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-03-23 11:48:29,004 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-03-23 11:48:29,004 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-03-23 11:48:29,005 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-03-23 11:48:29,612 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-03-23 11:48:29,613 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.03 11:48:29 BoogieIcfgContainer [2018-03-23 11:48:29,613 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-03-23 11:48:29,615 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-03-23 11:48:29,615 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-03-23 11:48:29,618 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-03-23 11:48:29,619 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.03 11:48:28" (1/3) ... [2018-03-23 11:48:29,619 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7c2b3a5d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.03 11:48:29, skipping insertion in model container [2018-03-23 11:48:29,620 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:28" (2/3) ... [2018-03-23 11:48:29,620 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7c2b3a5d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.03 11:48:29, skipping insertion in model container [2018-03-23 11:48:29,620 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.03 11:48:29" (3/3) ... [2018-03-23 11:48:29,623 INFO L107 eAbstractionObserver]: Analyzing ICFG length_test03_true-valid-memsafety.i [2018-03-23 11:48:29,633 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-03-23 11:48:29,643 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 55 error locations. [2018-03-23 11:48:29,696 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-03-23 11:48:29,697 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-03-23 11:48:29,697 INFO L370 AbstractCegarLoop]: Hoare is true [2018-03-23 11:48:29,697 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-03-23 11:48:29,697 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-03-23 11:48:29,698 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-03-23 11:48:29,698 INFO L374 AbstractCegarLoop]: Difference is false [2018-03-23 11:48:29,698 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-03-23 11:48:29,698 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-03-23 11:48:29,699 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-03-23 11:48:29,715 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states. [2018-03-23 11:48:29,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-03-23 11:48:29,719 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:29,720 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:29,720 INFO L408 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:29,723 INFO L82 PathProgramCache]: Analyzing trace with hash -383327672, now seen corresponding path program 1 times [2018-03-23 11:48:29,725 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:29,725 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:29,764 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:29,764 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:29,764 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:29,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:29,806 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:29,879 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:29,882 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:29,882 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:48:29,884 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-23 11:48:29,899 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-23 11:48:29,900 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:48:29,903 INFO L87 Difference]: Start difference. First operand 170 states. Second operand 4 states. [2018-03-23 11:48:30,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:30,223 INFO L93 Difference]: Finished difference Result 356 states and 379 transitions. [2018-03-23 11:48:30,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-03-23 11:48:30,225 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 9 [2018-03-23 11:48:30,225 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:30,238 INFO L225 Difference]: With dead ends: 356 [2018-03-23 11:48:30,238 INFO L226 Difference]: Without dead ends: 213 [2018-03-23 11:48:30,242 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:48:30,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-03-23 11:48:30,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 165. [2018-03-23 11:48:30,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-03-23 11:48:30,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 171 transitions. [2018-03-23 11:48:30,286 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 171 transitions. Word has length 9 [2018-03-23 11:48:30,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:30,286 INFO L459 AbstractCegarLoop]: Abstraction has 165 states and 171 transitions. [2018-03-23 11:48:30,286 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-23 11:48:30,286 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 171 transitions. [2018-03-23 11:48:30,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-03-23 11:48:30,287 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:30,287 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:30,287 INFO L408 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:30,287 INFO L82 PathProgramCache]: Analyzing trace with hash -383327671, now seen corresponding path program 1 times [2018-03-23 11:48:30,287 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:30,287 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:30,288 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:30,288 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:30,288 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:30,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:30,299 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:30,352 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:30,352 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:30,352 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:48:30,354 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-23 11:48:30,354 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-23 11:48:30,354 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:48:30,355 INFO L87 Difference]: Start difference. First operand 165 states and 171 transitions. Second operand 4 states. [2018-03-23 11:48:30,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:30,512 INFO L93 Difference]: Finished difference Result 170 states and 177 transitions. [2018-03-23 11:48:30,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-03-23 11:48:30,512 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 9 [2018-03-23 11:48:30,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:30,513 INFO L225 Difference]: With dead ends: 170 [2018-03-23 11:48:30,513 INFO L226 Difference]: Without dead ends: 168 [2018-03-23 11:48:30,514 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:48:30,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-03-23 11:48:30,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 163. [2018-03-23 11:48:30,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-03-23 11:48:30,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 169 transitions. [2018-03-23 11:48:30,522 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 169 transitions. Word has length 9 [2018-03-23 11:48:30,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:30,523 INFO L459 AbstractCegarLoop]: Abstraction has 163 states and 169 transitions. [2018-03-23 11:48:30,523 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-23 11:48:30,523 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 169 transitions. [2018-03-23 11:48:30,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-03-23 11:48:30,523 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:30,523 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:30,524 INFO L408 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:30,524 INFO L82 PathProgramCache]: Analyzing trace with hash 1523848588, now seen corresponding path program 1 times [2018-03-23 11:48:30,524 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:30,524 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:30,525 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:30,525 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:30,525 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:30,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:30,536 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:30,560 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:30,560 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:30,560 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:48:30,561 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-23 11:48:30,561 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-23 11:48:30,561 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:48:30,561 INFO L87 Difference]: Start difference. First operand 163 states and 169 transitions. Second operand 4 states. [2018-03-23 11:48:30,658 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:30,658 INFO L93 Difference]: Finished difference Result 188 states and 196 transitions. [2018-03-23 11:48:30,659 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-03-23 11:48:30,659 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2018-03-23 11:48:30,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:30,660 INFO L225 Difference]: With dead ends: 188 [2018-03-23 11:48:30,661 INFO L226 Difference]: Without dead ends: 185 [2018-03-23 11:48:30,661 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:48:30,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-03-23 11:48:30,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 168. [2018-03-23 11:48:30,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168 states. [2018-03-23 11:48:30,670 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168 states to 168 states and 176 transitions. [2018-03-23 11:48:30,670 INFO L78 Accepts]: Start accepts. Automaton has 168 states and 176 transitions. Word has length 13 [2018-03-23 11:48:30,671 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:30,671 INFO L459 AbstractCegarLoop]: Abstraction has 168 states and 176 transitions. [2018-03-23 11:48:30,671 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-23 11:48:30,671 INFO L276 IsEmpty]: Start isEmpty. Operand 168 states and 176 transitions. [2018-03-23 11:48:30,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-03-23 11:48:30,671 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:30,671 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:30,671 INFO L408 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:30,671 INFO L82 PathProgramCache]: Analyzing trace with hash 1523848589, now seen corresponding path program 1 times [2018-03-23 11:48:30,672 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:30,672 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:30,672 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:30,673 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:30,673 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:30,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:30,688 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:30,744 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:30,745 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:30,745 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:48:30,745 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-23 11:48:30,745 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-23 11:48:30,746 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:48:30,746 INFO L87 Difference]: Start difference. First operand 168 states and 176 transitions. Second operand 4 states. [2018-03-23 11:48:30,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:30,834 INFO L93 Difference]: Finished difference Result 173 states and 182 transitions. [2018-03-23 11:48:30,834 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-03-23 11:48:30,834 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2018-03-23 11:48:30,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:30,836 INFO L225 Difference]: With dead ends: 173 [2018-03-23 11:48:30,836 INFO L226 Difference]: Without dead ends: 171 [2018-03-23 11:48:30,836 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:48:30,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-03-23 11:48:30,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 166. [2018-03-23 11:48:30,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-03-23 11:48:30,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 174 transitions. [2018-03-23 11:48:30,847 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 174 transitions. Word has length 13 [2018-03-23 11:48:30,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:30,848 INFO L459 AbstractCegarLoop]: Abstraction has 166 states and 174 transitions. [2018-03-23 11:48:30,848 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-23 11:48:30,848 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 174 transitions. [2018-03-23 11:48:30,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-03-23 11:48:30,849 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:30,849 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:30,849 INFO L408 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:30,849 INFO L82 PathProgramCache]: Analyzing trace with hash 1964962700, now seen corresponding path program 1 times [2018-03-23 11:48:30,849 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:30,849 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:30,850 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:30,850 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:30,851 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:30,871 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:30,872 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:30,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:30,905 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:30,905 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:48:30,905 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-23 11:48:30,905 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-23 11:48:30,905 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:48:30,906 INFO L87 Difference]: Start difference. First operand 166 states and 174 transitions. Second operand 4 states. [2018-03-23 11:48:31,017 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:31,017 INFO L93 Difference]: Finished difference Result 166 states and 174 transitions. [2018-03-23 11:48:31,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-03-23 11:48:31,017 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2018-03-23 11:48:31,018 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:31,019 INFO L225 Difference]: With dead ends: 166 [2018-03-23 11:48:31,019 INFO L226 Difference]: Without dead ends: 161 [2018-03-23 11:48:31,019 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:48:31,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-03-23 11:48:31,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 161. [2018-03-23 11:48:31,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-03-23 11:48:31,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 169 transitions. [2018-03-23 11:48:31,028 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 169 transitions. Word has length 25 [2018-03-23 11:48:31,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:31,028 INFO L459 AbstractCegarLoop]: Abstraction has 161 states and 169 transitions. [2018-03-23 11:48:31,028 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-23 11:48:31,028 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 169 transitions. [2018-03-23 11:48:31,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-03-23 11:48:31,029 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:31,029 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:31,029 INFO L408 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:31,030 INFO L82 PathProgramCache]: Analyzing trace with hash 1964962701, now seen corresponding path program 1 times [2018-03-23 11:48:31,030 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:31,030 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:31,031 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:31,031 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:31,031 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:31,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:31,050 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:31,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:31,092 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:31,092 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:48:31,092 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-23 11:48:31,092 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-23 11:48:31,092 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:48:31,093 INFO L87 Difference]: Start difference. First operand 161 states and 169 transitions. Second operand 4 states. [2018-03-23 11:48:31,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:31,166 INFO L93 Difference]: Finished difference Result 161 states and 169 transitions. [2018-03-23 11:48:31,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-03-23 11:48:31,167 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2018-03-23 11:48:31,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:31,168 INFO L225 Difference]: With dead ends: 161 [2018-03-23 11:48:31,168 INFO L226 Difference]: Without dead ends: 156 [2018-03-23 11:48:31,168 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:48:31,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-03-23 11:48:31,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 156. [2018-03-23 11:48:31,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-03-23 11:48:31,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 164 transitions. [2018-03-23 11:48:31,174 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 164 transitions. Word has length 25 [2018-03-23 11:48:31,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:31,174 INFO L459 AbstractCegarLoop]: Abstraction has 156 states and 164 transitions. [2018-03-23 11:48:31,174 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-23 11:48:31,174 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 164 transitions. [2018-03-23 11:48:31,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-03-23 11:48:31,175 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:31,175 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:31,175 INFO L408 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:31,175 INFO L82 PathProgramCache]: Analyzing trace with hash 784301688, now seen corresponding path program 1 times [2018-03-23 11:48:31,175 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:31,175 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:31,176 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:31,176 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:31,176 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:31,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:31,192 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:31,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:31,279 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:31,279 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-03-23 11:48:31,280 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-03-23 11:48:31,280 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-03-23 11:48:31,280 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-03-23 11:48:31,280 INFO L87 Difference]: Start difference. First operand 156 states and 164 transitions. Second operand 8 states. [2018-03-23 11:48:31,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:31,575 INFO L93 Difference]: Finished difference Result 253 states and 273 transitions. [2018-03-23 11:48:31,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-03-23 11:48:31,575 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 26 [2018-03-23 11:48:31,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:31,577 INFO L225 Difference]: With dead ends: 253 [2018-03-23 11:48:31,577 INFO L226 Difference]: Without dead ends: 245 [2018-03-23 11:48:31,577 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:48:31,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245 states. [2018-03-23 11:48:31,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245 to 184. [2018-03-23 11:48:31,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-03-23 11:48:31,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 204 transitions. [2018-03-23 11:48:31,583 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 204 transitions. Word has length 26 [2018-03-23 11:48:31,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:31,584 INFO L459 AbstractCegarLoop]: Abstraction has 184 states and 204 transitions. [2018-03-23 11:48:31,584 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-03-23 11:48:31,584 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 204 transitions. [2018-03-23 11:48:31,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-03-23 11:48:31,584 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:31,584 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:31,584 INFO L408 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:31,585 INFO L82 PathProgramCache]: Analyzing trace with hash 784301689, now seen corresponding path program 1 times [2018-03-23 11:48:31,585 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:31,585 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:31,585 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:31,585 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:31,586 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:31,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:31,604 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:31,746 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:31,746 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:31,747 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-03-23 11:48:31,747 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-03-23 11:48:31,747 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-03-23 11:48:31,747 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-03-23 11:48:31,748 INFO L87 Difference]: Start difference. First operand 184 states and 204 transitions. Second operand 8 states. [2018-03-23 11:48:32,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:32,062 INFO L93 Difference]: Finished difference Result 229 states and 251 transitions. [2018-03-23 11:48:32,062 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-03-23 11:48:32,062 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 26 [2018-03-23 11:48:32,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:32,063 INFO L225 Difference]: With dead ends: 229 [2018-03-23 11:48:32,063 INFO L226 Difference]: Without dead ends: 222 [2018-03-23 11:48:32,064 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2018-03-23 11:48:32,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-03-23 11:48:32,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 220. [2018-03-23 11:48:32,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2018-03-23 11:48:32,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 244 transitions. [2018-03-23 11:48:32,073 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 244 transitions. Word has length 26 [2018-03-23 11:48:32,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:32,073 INFO L459 AbstractCegarLoop]: Abstraction has 220 states and 244 transitions. [2018-03-23 11:48:32,073 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-03-23 11:48:32,073 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 244 transitions. [2018-03-23 11:48:32,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-03-23 11:48:32,074 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:32,074 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:32,074 INFO L408 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:32,074 INFO L82 PathProgramCache]: Analyzing trace with hash 938846954, now seen corresponding path program 1 times [2018-03-23 11:48:32,074 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:32,074 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:32,075 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:32,075 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:32,075 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:32,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:32,096 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:32,341 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:32,341 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:32,341 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-03-23 11:48:32,341 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-03-23 11:48:32,341 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-03-23 11:48:32,341 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:48:32,342 INFO L87 Difference]: Start difference. First operand 220 states and 244 transitions. Second operand 10 states. [2018-03-23 11:48:32,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:32,808 INFO L93 Difference]: Finished difference Result 410 states and 457 transitions. [2018-03-23 11:48:32,809 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-03-23 11:48:32,809 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 38 [2018-03-23 11:48:32,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:32,811 INFO L225 Difference]: With dead ends: 410 [2018-03-23 11:48:32,811 INFO L226 Difference]: Without dead ends: 220 [2018-03-23 11:48:32,814 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=57, Invalid=183, Unknown=0, NotChecked=0, Total=240 [2018-03-23 11:48:32,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-03-23 11:48:32,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 220. [2018-03-23 11:48:32,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 220 states. [2018-03-23 11:48:32,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 220 states to 220 states and 243 transitions. [2018-03-23 11:48:32,822 INFO L78 Accepts]: Start accepts. Automaton has 220 states and 243 transitions. Word has length 38 [2018-03-23 11:48:32,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:32,823 INFO L459 AbstractCegarLoop]: Abstraction has 220 states and 243 transitions. [2018-03-23 11:48:32,823 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-03-23 11:48:32,823 INFO L276 IsEmpty]: Start isEmpty. Operand 220 states and 243 transitions. [2018-03-23 11:48:32,823 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-03-23 11:48:32,823 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:32,824 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:32,824 INFO L408 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:32,824 INFO L82 PathProgramCache]: Analyzing trace with hash -1705971385, now seen corresponding path program 1 times [2018-03-23 11:48:32,824 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:32,824 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:32,825 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:32,825 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:32,825 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:32,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:32,848 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:33,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:33,154 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:33,154 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-03-23 11:48:33,155 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-03-23 11:48:33,155 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-03-23 11:48:33,155 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2018-03-23 11:48:33,155 INFO L87 Difference]: Start difference. First operand 220 states and 243 transitions. Second operand 13 states. [2018-03-23 11:48:33,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:33,476 INFO L93 Difference]: Finished difference Result 432 states and 478 transitions. [2018-03-23 11:48:33,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-03-23 11:48:33,477 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 40 [2018-03-23 11:48:33,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:33,478 INFO L225 Difference]: With dead ends: 432 [2018-03-23 11:48:33,478 INFO L226 Difference]: Without dead ends: 250 [2018-03-23 11:48:33,480 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 70 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=100, Invalid=362, Unknown=0, NotChecked=0, Total=462 [2018-03-23 11:48:33,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 250 states. [2018-03-23 11:48:33,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 250 to 208. [2018-03-23 11:48:33,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 208 states. [2018-03-23 11:48:33,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 208 states to 208 states and 228 transitions. [2018-03-23 11:48:33,490 INFO L78 Accepts]: Start accepts. Automaton has 208 states and 228 transitions. Word has length 40 [2018-03-23 11:48:33,490 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:33,490 INFO L459 AbstractCegarLoop]: Abstraction has 208 states and 228 transitions. [2018-03-23 11:48:33,491 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-03-23 11:48:33,491 INFO L276 IsEmpty]: Start isEmpty. Operand 208 states and 228 transitions. [2018-03-23 11:48:33,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-03-23 11:48:33,492 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:33,492 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:33,492 INFO L408 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:33,493 INFO L82 PathProgramCache]: Analyzing trace with hash 1496757513, now seen corresponding path program 1 times [2018-03-23 11:48:33,493 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:33,493 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:33,494 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:33,494 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:33,494 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:33,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:33,513 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:33,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:33,562 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:33,562 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:48:33,562 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-03-23 11:48:33,563 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-03-23 11:48:33,563 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-03-23 11:48:33,563 INFO L87 Difference]: Start difference. First operand 208 states and 228 transitions. Second operand 3 states. [2018-03-23 11:48:33,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:33,608 INFO L93 Difference]: Finished difference Result 292 states and 314 transitions. [2018-03-23 11:48:33,608 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-03-23 11:48:33,608 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2018-03-23 11:48:33,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:33,610 INFO L225 Difference]: With dead ends: 292 [2018-03-23 11:48:33,610 INFO L226 Difference]: Without dead ends: 221 [2018-03-23 11:48:33,611 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-03-23 11:48:33,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-03-23 11:48:33,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 202. [2018-03-23 11:48:33,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202 states. [2018-03-23 11:48:33,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 218 transitions. [2018-03-23 11:48:33,618 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 218 transitions. Word has length 49 [2018-03-23 11:48:33,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:33,619 INFO L459 AbstractCegarLoop]: Abstraction has 202 states and 218 transitions. [2018-03-23 11:48:33,619 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-03-23 11:48:33,619 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 218 transitions. [2018-03-23 11:48:33,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-03-23 11:48:33,620 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:33,620 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:33,620 INFO L408 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:33,621 INFO L82 PathProgramCache]: Analyzing trace with hash 279949331, now seen corresponding path program 1 times [2018-03-23 11:48:33,621 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:33,621 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:33,622 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:33,622 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:33,622 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:33,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:33,640 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:33,907 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:33,907 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:48:33,907 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:48:33,914 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:33,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:33,972 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:48:34,165 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:34,165 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:34,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-03-23 11:48:34,171 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:34,187 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-03-23 11:48:34,187 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:34,224 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:34,224 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:25, output treesize:18 [2018-03-23 11:48:34,287 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:34,310 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:48:34,310 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12] total 21 [2018-03-23 11:48:34,311 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-03-23 11:48:34,311 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-03-23 11:48:34,311 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=397, Unknown=0, NotChecked=0, Total=462 [2018-03-23 11:48:34,312 INFO L87 Difference]: Start difference. First operand 202 states and 218 transitions. Second operand 22 states. [2018-03-23 11:48:34,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:34,970 INFO L93 Difference]: Finished difference Result 262 states and 273 transitions. [2018-03-23 11:48:34,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-03-23 11:48:34,970 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 54 [2018-03-23 11:48:34,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:34,972 INFO L225 Difference]: With dead ends: 262 [2018-03-23 11:48:34,972 INFO L226 Difference]: Without dead ends: 255 [2018-03-23 11:48:34,973 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 181 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=141, Invalid=671, Unknown=0, NotChecked=0, Total=812 [2018-03-23 11:48:34,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 255 states. [2018-03-23 11:48:34,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 255 to 202. [2018-03-23 11:48:34,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202 states. [2018-03-23 11:48:34,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 211 transitions. [2018-03-23 11:48:34,985 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 211 transitions. Word has length 54 [2018-03-23 11:48:34,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:34,986 INFO L459 AbstractCegarLoop]: Abstraction has 202 states and 211 transitions. [2018-03-23 11:48:34,986 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-03-23 11:48:34,986 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 211 transitions. [2018-03-23 11:48:34,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-03-23 11:48:34,987 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:34,987 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:34,987 INFO L408 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:34,987 INFO L82 PathProgramCache]: Analyzing trace with hash -1546292785, now seen corresponding path program 1 times [2018-03-23 11:48:34,987 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:34,988 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:34,989 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:34,989 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:34,989 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:35,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:35,013 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:35,240 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:35,240 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:48:35,240 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:48:35,249 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:35,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:35,293 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:48:35,317 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|__U_MULTI_flength_test___true_valid_memsafety_i__append_#t~malloc2.base| Int)) (and (= 0 (select |c_old(#valid)| |__U_MULTI_flength_test___true_valid_memsafety_i__append_#t~malloc2.base|)) (= |c_#valid| (store |c_old(#valid)| |__U_MULTI_flength_test___true_valid_memsafety_i__append_#t~malloc2.base| 1)))) is different from true [2018-03-23 11:48:35,340 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:35,342 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:35,343 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-03-23 11:48:35,343 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:35,367 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:35,367 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-03-23 11:48:35,426 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 20 [2018-03-23 11:48:35,426 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:35,432 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:35,433 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:21, output treesize:20 [2018-03-23 11:48:35,519 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-03-23 11:48:35,541 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:48:35,541 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10] total 16 [2018-03-23 11:48:35,542 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-03-23 11:48:35,542 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-03-23 11:48:35,542 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=193, Unknown=1, NotChecked=28, Total=272 [2018-03-23 11:48:35,542 INFO L87 Difference]: Start difference. First operand 202 states and 211 transitions. Second operand 17 states. [2018-03-23 11:48:35,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:35,995 INFO L93 Difference]: Finished difference Result 259 states and 268 transitions. [2018-03-23 11:48:35,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-03-23 11:48:35,995 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 58 [2018-03-23 11:48:35,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:35,997 INFO L225 Difference]: With dead ends: 259 [2018-03-23 11:48:35,997 INFO L226 Difference]: Without dead ends: 257 [2018-03-23 11:48:35,998 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 51 SyntacticMatches, 4 SemanticMatches, 21 ConstructedPredicates, 1 IntricatePredicates, 1 DeprecatedPredicates, 90 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=115, Invalid=350, Unknown=1, NotChecked=40, Total=506 [2018-03-23 11:48:35,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2018-03-23 11:48:36,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 204. [2018-03-23 11:48:36,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-03-23 11:48:36,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 215 transitions. [2018-03-23 11:48:36,012 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 215 transitions. Word has length 58 [2018-03-23 11:48:36,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:36,012 INFO L459 AbstractCegarLoop]: Abstraction has 204 states and 215 transitions. [2018-03-23 11:48:36,012 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-03-23 11:48:36,012 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 215 transitions. [2018-03-23 11:48:36,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-03-23 11:48:36,013 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:36,013 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:36,013 INFO L408 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:36,014 INFO L82 PathProgramCache]: Analyzing trace with hash -1546292784, now seen corresponding path program 1 times [2018-03-23 11:48:36,014 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:36,014 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:36,015 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:36,015 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:36,015 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:36,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:36,035 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:36,225 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:36,226 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:48:36,226 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:48:36,234 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:36,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:36,275 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:48:36,356 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|__U_MULTI_flength_test___true_valid_memsafety_i__append_#t~malloc2.base| Int)) (= |c_#length| (store |c_old(#length)| |__U_MULTI_flength_test___true_valid_memsafety_i__append_#t~malloc2.base| 9))) is different from true [2018-03-23 11:48:36,372 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 14 treesize of output 20 [2018-03-23 11:48:36,373 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-03-23 11:48:36,382 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:36,382 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:20, output treesize:19 [2018-03-23 11:48:36,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 33 [2018-03-23 11:48:36,494 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 4 xjuncts. [2018-03-23 11:48:36,515 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-03-23 11:48:36,515 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:25, output treesize:47 [2018-03-23 11:48:36,557 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-03-23 11:48:36,578 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:48:36,578 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 20 [2018-03-23 11:48:36,579 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-03-23 11:48:36,579 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-03-23 11:48:36,579 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=329, Unknown=1, NotChecked=36, Total=420 [2018-03-23 11:48:36,579 INFO L87 Difference]: Start difference. First operand 204 states and 215 transitions. Second operand 21 states. [2018-03-23 11:48:37,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:37,671 INFO L93 Difference]: Finished difference Result 262 states and 277 transitions. [2018-03-23 11:48:37,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-03-23 11:48:37,671 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 58 [2018-03-23 11:48:37,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:37,673 INFO L225 Difference]: With dead ends: 262 [2018-03-23 11:48:37,673 INFO L226 Difference]: Without dead ends: 254 [2018-03-23 11:48:37,674 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 50 SyntacticMatches, 3 SemanticMatches, 30 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 186 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=144, Invalid=789, Unknown=1, NotChecked=58, Total=992 [2018-03-23 11:48:37,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254 states. [2018-03-23 11:48:37,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254 to 244. [2018-03-23 11:48:37,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 244 states. [2018-03-23 11:48:37,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 260 transitions. [2018-03-23 11:48:37,686 INFO L78 Accepts]: Start accepts. Automaton has 244 states and 260 transitions. Word has length 58 [2018-03-23 11:48:37,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:37,686 INFO L459 AbstractCegarLoop]: Abstraction has 244 states and 260 transitions. [2018-03-23 11:48:37,686 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-03-23 11:48:37,686 INFO L276 IsEmpty]: Start isEmpty. Operand 244 states and 260 transitions. [2018-03-23 11:48:37,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-03-23 11:48:37,687 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:37,688 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:37,688 INFO L408 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:37,688 INFO L82 PathProgramCache]: Analyzing trace with hash 1089881476, now seen corresponding path program 1 times [2018-03-23 11:48:37,688 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:37,688 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:37,689 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:37,689 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:37,689 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:37,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:37,712 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:38,354 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:38,354 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:48:38,355 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:48:38,361 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:38,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:38,396 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:48:38,496 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-03-23 11:48:38,496 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:38,500 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:38,501 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:14 [2018-03-23 11:48:38,671 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-03-23 11:48:38,672 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:48:38,673 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:38,674 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:38,682 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:38,682 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-03-23 11:48:38,730 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 23 treesize of output 35 [2018-03-23 11:48:38,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 30 [2018-03-23 11:48:38,742 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-03-23 11:48:38,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-03-23 11:48:38,762 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:38,774 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:48:38,790 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-03-23 11:48:38,790 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 2 variables, input treesize:44, output treesize:77 [2018-03-23 11:48:38,883 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 74 treesize of output 71 [2018-03-23 11:48:38,889 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:38,890 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 82 [2018-03-23 11:48:38,891 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:38,935 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:38,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 45 treesize of output 60 [2018-03-23 11:48:38,945 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-03-23 11:48:38,976 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:48:39,015 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 36 [2018-03-23 11:48:39,017 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:39,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-03-23 11:48:39,018 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:39,027 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:39,059 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 4 dim-0 vars, and 3 xjuncts. [2018-03-23 11:48:39,059 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 5 variables, input treesize:116, output treesize:141 [2018-03-23 11:48:39,535 WARN L148 SmtUtils]: Spent 416ms on a formula simplification that was a NOOP. DAG size: 61 [2018-03-23 11:48:39,544 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-03-23 11:48:39,544 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:39,563 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:39,564 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:39,564 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 10 [2018-03-23 11:48:39,565 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:39,584 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:39,584 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:165, output treesize:66 [2018-03-23 11:48:39,748 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:39,749 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:39,749 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:39,750 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 52 [2018-03-23 11:48:39,751 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:39,767 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:39,767 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:77, output treesize:85 [2018-03-23 11:48:39,878 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 73 [2018-03-23 11:48:39,881 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:48:39,881 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:39,890 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:39,906 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:39,907 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:98, output treesize:85 [2018-03-23 11:48:39,959 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 73 [2018-03-23 11:48:39,962 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:48:39,962 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:39,977 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:39,994 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:39,994 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:98, output treesize:94 [2018-03-23 11:48:40,070 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 4 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-03-23 11:48:40,073 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-03-23 11:48:40,073 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:40,083 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:48:40,084 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 21 [2018-03-23 11:48:40,084 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:40,093 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:40,094 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:48:40,094 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:40,100 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:40,110 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:40,111 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 7 variables, input treesize:103, output treesize:28 [2018-03-23 11:48:40,175 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:40,196 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:48:40,197 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 22] total 38 [2018-03-23 11:48:40,197 INFO L442 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-03-23 11:48:40,197 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-03-23 11:48:40,198 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=1360, Unknown=0, NotChecked=0, Total=1482 [2018-03-23 11:48:40,198 INFO L87 Difference]: Start difference. First operand 244 states and 260 transitions. Second operand 39 states. [2018-03-23 11:48:41,125 WARN L151 SmtUtils]: Spent 208ms on a formula simplification. DAG size of input: 105 DAG size of output 78 [2018-03-23 11:48:54,766 WARN L151 SmtUtils]: Spent 1168ms on a formula simplification. DAG size of input: 109 DAG size of output 80 [2018-03-23 11:48:55,190 WARN L151 SmtUtils]: Spent 239ms on a formula simplification. DAG size of input: 118 DAG size of output 83 [2018-03-23 11:48:56,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:56,671 INFO L93 Difference]: Finished difference Result 356 states and 382 transitions. [2018-03-23 11:48:56,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-03-23 11:48:56,671 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 66 [2018-03-23 11:48:56,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:56,673 INFO L225 Difference]: With dead ends: 356 [2018-03-23 11:48:56,673 INFO L226 Difference]: Without dead ends: 355 [2018-03-23 11:48:56,675 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 47 SyntacticMatches, 6 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1456 ImplicationChecksByTransitivity, 7.0s TimeCoverageRelationStatistics Valid=735, Invalid=4963, Unknown=2, NotChecked=0, Total=5700 [2018-03-23 11:48:56,675 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 355 states. [2018-03-23 11:48:56,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 355 to 244. [2018-03-23 11:48:56,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 244 states. [2018-03-23 11:48:56,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 259 transitions. [2018-03-23 11:48:56,692 INFO L78 Accepts]: Start accepts. Automaton has 244 states and 259 transitions. Word has length 66 [2018-03-23 11:48:56,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:56,692 INFO L459 AbstractCegarLoop]: Abstraction has 244 states and 259 transitions. [2018-03-23 11:48:56,692 INFO L460 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-03-23 11:48:56,692 INFO L276 IsEmpty]: Start isEmpty. Operand 244 states and 259 transitions. [2018-03-23 11:48:56,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-03-23 11:48:56,694 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:56,694 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:56,694 INFO L408 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:56,694 INFO L82 PathProgramCache]: Analyzing trace with hash 1089881477, now seen corresponding path program 1 times [2018-03-23 11:48:56,694 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:56,694 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:56,695 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:56,695 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:56,696 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:56,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:56,732 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:57,570 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:57,610 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:48:57,611 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:48:57,616 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:57,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:57,652 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:48:57,736 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-03-23 11:48:57,737 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:57,740 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:57,740 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:14 [2018-03-23 11:48:57,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-03-23 11:48:57,854 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:57,859 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:57,859 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:17 [2018-03-23 11:48:57,947 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-03-23 11:48:57,948 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:48:57,949 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:57,950 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:57,961 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-03-23 11:48:57,963 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:48:57,963 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:57,965 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:57,974 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:57,974 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:48, output treesize:40 [2018-03-23 11:48:58,040 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 23 treesize of output 35 [2018-03-23 11:48:58,043 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 23 [2018-03-23 11:48:58,044 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:58,066 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 30 [2018-03-23 11:48:58,067 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-03-23 11:48:58,079 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:48:58,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 23 treesize of output 35 [2018-03-23 11:48:58,118 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 23 [2018-03-23 11:48:58,118 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:58,146 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 30 [2018-03-23 11:48:58,146 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-03-23 11:48:58,162 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:48:58,196 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 4 xjuncts. [2018-03-23 11:48:58,197 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:66, output treesize:212 [2018-03-23 11:48:58,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 168 treesize of output 157 [2018-03-23 11:48:58,332 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:58,335 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:58,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 144 treesize of output 166 [2018-03-23 11:48:58,348 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-03-23 11:48:58,472 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:58,473 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 151 treesize of output 178 [2018-03-23 11:48:58,473 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:58,541 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:48:58,627 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 158 treesize of output 158 [2018-03-23 11:48:58,636 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:58,641 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:58,653 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 2 case distinctions, treesize of input 138 treesize of output 164 [2018-03-23 11:48:58,655 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-03-23 11:48:58,748 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:58,749 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 141 treesize of output 168 [2018-03-23 11:48:58,749 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:58,808 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:48:58,812 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 112 treesize of output 95 [2018-03-23 11:48:58,815 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:58,816 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:48:58,818 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 49 [2018-03-23 11:48:58,819 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:58,835 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:58,973 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 4 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-03-23 11:48:58,973 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 6 variables, input treesize:249, output treesize:210 [2018-03-23 11:48:59,065 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:59,066 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:59,067 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 156 treesize of output 150 [2018-03-23 11:48:59,067 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:59,109 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:59,110 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:226, output treesize:150 [2018-03-23 11:48:59,328 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 26 [2018-03-23 11:48:59,329 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:59,360 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:59,361 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:59,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-03-23 11:48:59,361 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:59,383 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:59,383 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:161, output treesize:144 [2018-03-23 11:48:59,573 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 118 treesize of output 148 [2018-03-23 11:48:59,578 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 139 treesize of output 138 [2018-03-23 11:48:59,579 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:59,651 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:59,672 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 108 treesize of output 159 [2018-03-23 11:48:59,673 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 4 xjuncts. [2018-03-23 11:48:59,739 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-03-23 11:48:59,822 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 143 treesize of output 124 [2018-03-23 11:48:59,825 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:59,826 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:59,827 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:48:59,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 78 [2018-03-23 11:48:59,829 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:59,847 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:59,869 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 148 treesize of output 159 [2018-03-23 11:48:59,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 159 treesize of output 158 [2018-03-23 11:48:59,873 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:59,962 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:59,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 117 treesize of output 168 [2018-03-23 11:48:59,981 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 4 xjuncts. [2018-03-23 11:49:00,065 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-03-23 11:49:00,074 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 143 treesize of output 124 [2018-03-23 11:49:00,077 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:00,077 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:00,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 64 [2018-03-23 11:49:00,080 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:00,097 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:00,176 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 3 dim-0 vars, and 3 xjuncts. [2018-03-23 11:49:00,177 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 5 variables, input treesize:170, output treesize:327 [2018-03-23 11:49:00,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 155 treesize of output 138 [2018-03-23 11:49:00,331 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:00,332 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 63 [2018-03-23 11:49:00,333 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:00,368 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:00,576 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 170 treesize of output 177 [2018-03-23 11:49:00,580 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 177 treesize of output 176 [2018-03-23 11:49:00,580 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:00,662 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:00,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 166 treesize of output 182 [2018-03-23 11:49:00,842 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 173 treesize of output 172 [2018-03-23 11:49:00,843 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:00,916 INFO L267 ElimStorePlain]: Start of recursive call 6: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,023 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 145 treesize of output 131 [2018-03-23 11:49:01,026 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:01,027 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 63 [2018-03-23 11:49:01,028 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,051 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,131 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:01,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 155 treesize of output 138 [2018-03-23 11:49:01,135 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 21 [2018-03-23 11:49:01,135 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,150 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,216 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:01,218 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 110 [2018-03-23 11:49:01,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 21 [2018-03-23 11:49:01,220 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,236 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,293 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 6 dim-2 vars, End of recursive call: 5 dim-0 vars, and 3 xjuncts. [2018-03-23 11:49:01,293 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 11 variables, input treesize:481, output treesize:391 [2018-03-23 11:49:01,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 111 treesize of output 102 [2018-03-23 11:49:01,461 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:01,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 32 [2018-03-23 11:49:01,462 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,479 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 1 [2018-03-23 11:49:01,480 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,495 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,533 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 57 [2018-03-23 11:49:01,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-03-23 11:49:01,536 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,547 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:01,547 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 16 [2018-03-23 11:49:01,547 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,555 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,588 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 153 treesize of output 133 [2018-03-23 11:49:01,591 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:01,592 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 60 [2018-03-23 11:49:01,592 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,612 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:01,613 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:49:01,613 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,627 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,654 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 67 [2018-03-23 11:49:01,656 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:01,657 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 17 [2018-03-23 11:49:01,657 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,669 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:01,670 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:49:01,670 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,678 INFO L267 ElimStorePlain]: Start of recursive call 11: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,697 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 4 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:01,697 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 10 variables, input treesize:265, output treesize:14 [2018-03-23 11:49:01,764 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 5 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:49:01,786 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:49:01,787 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 22] total 38 [2018-03-23 11:49:01,787 INFO L442 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-03-23 11:49:01,787 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-03-23 11:49:01,787 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=100, Invalid=1382, Unknown=0, NotChecked=0, Total=1482 [2018-03-23 11:49:01,788 INFO L87 Difference]: Start difference. First operand 244 states and 259 transitions. Second operand 39 states. [2018-03-23 11:49:02,705 WARN L151 SmtUtils]: Spent 100ms on a formula simplification. DAG size of input: 93 DAG size of output 65 [2018-03-23 11:49:02,902 WARN L151 SmtUtils]: Spent 121ms on a formula simplification. DAG size of input: 119 DAG size of output 101 [2018-03-23 11:49:03,512 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 151 DAG size of output 98 [2018-03-23 11:49:03,963 WARN L151 SmtUtils]: Spent 136ms on a formula simplification. DAG size of input: 194 DAG size of output 93 [2018-03-23 11:49:04,351 WARN L151 SmtUtils]: Spent 146ms on a formula simplification. DAG size of input: 197 DAG size of output 76 [2018-03-23 11:49:04,637 WARN L151 SmtUtils]: Spent 160ms on a formula simplification. DAG size of input: 199 DAG size of output 96 [2018-03-23 11:49:06,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:49:06,115 INFO L93 Difference]: Finished difference Result 329 states and 352 transitions. [2018-03-23 11:49:06,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-03-23 11:49:06,116 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 66 [2018-03-23 11:49:06,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:49:06,118 INFO L225 Difference]: With dead ends: 329 [2018-03-23 11:49:06,118 INFO L226 Difference]: Without dead ends: 328 [2018-03-23 11:49:06,119 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 47 SyntacticMatches, 3 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 746 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=519, Invalid=4037, Unknown=0, NotChecked=0, Total=4556 [2018-03-23 11:49:06,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 328 states. [2018-03-23 11:49:06,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 328 to 244. [2018-03-23 11:49:06,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 244 states. [2018-03-23 11:49:06,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 258 transitions. [2018-03-23 11:49:06,132 INFO L78 Accepts]: Start accepts. Automaton has 244 states and 258 transitions. Word has length 66 [2018-03-23 11:49:06,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:49:06,133 INFO L459 AbstractCegarLoop]: Abstraction has 244 states and 258 transitions. [2018-03-23 11:49:06,133 INFO L460 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-03-23 11:49:06,133 INFO L276 IsEmpty]: Start isEmpty. Operand 244 states and 258 transitions. [2018-03-23 11:49:06,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-03-23 11:49:06,134 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:49:06,134 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:49:06,134 INFO L408 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:49:06,134 INFO L82 PathProgramCache]: Analyzing trace with hash 591287233, now seen corresponding path program 1 times [2018-03-23 11:49:06,135 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:49:06,135 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:49:06,135 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:06,136 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:49:06,136 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:06,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:06,162 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:49:07,058 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:49:07,058 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:49:07,058 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:49:07,065 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:49:07,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:07,094 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:49:07,099 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:07,100 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:07,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-03-23 11:49:07,101 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,102 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,102 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:11, output treesize:4 [2018-03-23 11:49:07,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:49:07,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:49:07,108 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,109 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:49:07,117 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:49:07,117 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,118 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,122 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,123 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:32, output treesize:24 [2018-03-23 11:49:07,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-03-23 11:49:07,132 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:07,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-03-23 11:49:07,133 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,137 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,147 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-03-23 11:49:07,149 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:07,150 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-03-23 11:49:07,150 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,154 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,161 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,162 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:50, output treesize:42 [2018-03-23 11:49:07,439 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_flength_test___true_valid_memsafety_i__append_~head.offset Int) (__U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.base Int) (__U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.offset Int)) (let ((.cse1 (+ __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.offset 1)) (.cse2 (+ __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.offset 5)) (.cse3 (+ __U_MULTI_flength_test___true_valid_memsafety_i__append_~head.offset 4))) (and (= (select |c_old(#valid)| __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.base) 0) (= |c_#memory_$Pointer$.offset| (let ((.cse0 (store |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_flength_test___true_valid_memsafety_i__append_#in~head.base| (store (store (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_flength_test___true_valid_memsafety_i__append_#in~head.base|) __U_MULTI_flength_test___true_valid_memsafety_i__append_~head.offset __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.offset) .cse3 __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.offset)))) (store .cse0 __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.base (store (store (select .cse0 __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.base) .cse1 0) .cse2 0)))) (= |c_#memory_$Pointer$.base| (let ((.cse4 (store |c_old(#memory_$Pointer$.base)| |c___U_MULTI_flength_test___true_valid_memsafety_i__append_#in~head.base| (store (store (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_flength_test___true_valid_memsafety_i__append_#in~head.base|) __U_MULTI_flength_test___true_valid_memsafety_i__append_~head.offset __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.base) .cse3 __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.base)))) (store .cse4 __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.base (store (store (select .cse4 __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.base) .cse1 0) .cse2 0))))))) is different from true [2018-03-23 11:49:07,597 WARN L148 SmtUtils]: Spent 152ms on a formula simplification that was a NOOP. DAG size: 70 [2018-03-23 11:49:07,606 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:07,611 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:07,612 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-03-23 11:49:07,612 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,759 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 61 [2018-03-23 11:49:07,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 37 [2018-03-23 11:49:07,767 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:07,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 41 [2018-03-23 11:49:07,768 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,779 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,815 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-03-23 11:49:07,818 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:07,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 28 treesize of output 50 [2018-03-23 11:49:07,841 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:07,847 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:07,865 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 6 case distinctions, treesize of input 36 treesize of output 55 [2018-03-23 11:49:07,866 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-03-23 11:49:07,925 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:07,926 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:07,928 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 39 [2018-03-23 11:49:07,928 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,012 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,013 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,014 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,016 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 53 [2018-03-23 11:49:08,017 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,064 INFO L267 ElimStorePlain]: Start of recursive call 7: 4 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-03-23 11:49:08,111 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-03-23 11:49:08,201 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-03-23 11:49:08,219 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 60 [2018-03-23 11:49:08,222 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 16 [2018-03-23 11:49:08,226 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,226 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-03-23 11:49:08,226 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,234 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 60 [2018-03-23 11:49:08,281 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-03-23 11:49:08,284 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,285 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-03-23 11:49:08,285 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,291 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,307 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,327 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,450 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 61 [2018-03-23 11:49:08,453 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 37 [2018-03-23 11:49:08,456 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,457 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 41 [2018-03-23 11:49:08,457 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,465 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,484 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 48 [2018-03-23 11:49:08,491 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,509 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 28 treesize of output 50 [2018-03-23 11:49:08,512 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,513 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,514 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 59 [2018-03-23 11:49:08,516 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,570 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,573 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 6 case distinctions, treesize of input 30 treesize of output 55 [2018-03-23 11:49:08,589 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 2 xjuncts. [2018-03-23 11:49:08,626 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,626 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:08,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 39 [2018-03-23 11:49:08,629 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,657 INFO L267 ElimStorePlain]: Start of recursive call 21: 4 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-03-23 11:49:08,688 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-03-23 11:49:08,729 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-03-23 11:49:08,741 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 60 [2018-03-23 11:49:08,744 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 16 [2018-03-23 11:49:08,747 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,747 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-03-23 11:49:08,747 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,753 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,776 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 60 [2018-03-23 11:49:08,779 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-03-23 11:49:08,781 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-03-23 11:49:08,782 INFO L267 ElimStorePlain]: Start of recursive call 30: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,786 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,797 INFO L267 ElimStorePlain]: Start of recursive call 28: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,807 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,921 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 26 dim-0 vars, and 13 xjuncts. [2018-03-23 11:49:08,921 INFO L202 ElimStorePlain]: Needed 30 recursive calls to eliminate 7 variables, input treesize:135, output treesize:1296 [2018-03-23 11:49:26,349 WARN L151 SmtUtils]: Spent 15099ms on a formula simplification. DAG size of input: 334 DAG size of output 38 [2018-03-23 11:49:26,480 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 36 [2018-03-23 11:49:26,483 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:26,483 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-03-23 11:49:26,484 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:26,492 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:26,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:49:26,492 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:26,495 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:26,506 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 36 [2018-03-23 11:49:26,508 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:26,509 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-03-23 11:49:26,509 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:26,515 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:26,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:49:26,516 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:26,519 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:26,522 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:26,522 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 6 variables, input treesize:87, output treesize:7 [2018-03-23 11:49:26,611 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 1 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:49:26,631 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:49:26,631 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 20] total 34 [2018-03-23 11:49:26,631 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-03-23 11:49:26,632 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-03-23 11:49:26,632 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=953, Unknown=18, NotChecked=62, Total=1122 [2018-03-23 11:49:26,632 INFO L87 Difference]: Start difference. First operand 244 states and 258 transitions. Second operand 34 states. [2018-03-23 11:49:28,187 WARN L148 SmtUtils]: Spent 121ms on a formula simplification that was a NOOP. DAG size: 65 [2018-03-23 11:49:28,960 WARN L151 SmtUtils]: Spent 110ms on a formula simplification. DAG size of input: 121 DAG size of output 78 [2018-03-23 11:49:31,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:49:31,473 INFO L93 Difference]: Finished difference Result 476 states and 510 transitions. [2018-03-23 11:49:31,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-03-23 11:49:31,473 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 70 [2018-03-23 11:49:31,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:49:31,474 INFO L225 Difference]: With dead ends: 476 [2018-03-23 11:49:31,475 INFO L226 Difference]: Without dead ends: 339 [2018-03-23 11:49:31,476 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 60 SyntacticMatches, 4 SemanticMatches, 55 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 461 ImplicationChecksByTransitivity, 20.8s TimeCoverageRelationStatistics Valid=362, Invalid=2649, Unknown=73, NotChecked=108, Total=3192 [2018-03-23 11:49:31,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 339 states. [2018-03-23 11:49:31,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 339 to 286. [2018-03-23 11:49:31,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 286 states. [2018-03-23 11:49:31,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 286 states to 286 states and 308 transitions. [2018-03-23 11:49:31,491 INFO L78 Accepts]: Start accepts. Automaton has 286 states and 308 transitions. Word has length 70 [2018-03-23 11:49:31,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:49:31,491 INFO L459 AbstractCegarLoop]: Abstraction has 286 states and 308 transitions. [2018-03-23 11:49:31,491 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-03-23 11:49:31,491 INFO L276 IsEmpty]: Start isEmpty. Operand 286 states and 308 transitions. [2018-03-23 11:49:31,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-03-23 11:49:31,492 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:49:31,492 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:49:31,492 INFO L408 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:49:31,492 INFO L82 PathProgramCache]: Analyzing trace with hash -703414178, now seen corresponding path program 1 times [2018-03-23 11:49:31,492 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:49:31,492 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:49:31,493 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:31,493 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:49:31,493 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:31,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:31,516 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:49:32,165 WARN L151 SmtUtils]: Spent 155ms on a formula simplification. DAG size of input: 31 DAG size of output 25 [2018-03-23 11:49:33,153 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:49:33,153 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:49:33,154 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:49:33,161 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:49:33,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:33,202 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:49:33,253 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:33,253 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:33,254 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-03-23 11:49:33,254 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:33,257 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:33,257 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:8 [2018-03-23 11:49:33,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-03-23 11:49:33,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:49:33,374 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:33,376 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:33,389 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-03-23 11:49:33,391 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:49:33,392 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:33,394 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:33,403 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:33,403 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:39, output treesize:31 [2018-03-23 11:49:33,801 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_flength_test___true_valid_memsafety_i__append_~head.offset Int) (__U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.base Int) (__U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.offset Int)) (let ((.cse1 (+ __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.offset 1)) (.cse2 (+ __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.offset 5)) (.cse3 (+ __U_MULTI_flength_test___true_valid_memsafety_i__append_~head.offset 4))) (and (= (select |c_old(#valid)| __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.base) 0) (= |c_#memory_$Pointer$.offset| (let ((.cse0 (store |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_flength_test___true_valid_memsafety_i__append_#in~head.base| (store (store (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_flength_test___true_valid_memsafety_i__append_#in~head.base|) __U_MULTI_flength_test___true_valid_memsafety_i__append_~head.offset __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.offset) .cse3 __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.offset)))) (store .cse0 __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.base (store (store (select .cse0 __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.base) .cse1 0) .cse2 0)))) (= |c_#memory_$Pointer$.base| (let ((.cse4 (store |c_old(#memory_$Pointer$.base)| |c___U_MULTI_flength_test___true_valid_memsafety_i__append_#in~head.base| (store (store (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_flength_test___true_valid_memsafety_i__append_#in~head.base|) __U_MULTI_flength_test___true_valid_memsafety_i__append_~head.offset __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.base) .cse3 __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.base)))) (store .cse4 __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.base (store (store (select .cse4 __U_MULTI_flength_test___true_valid_memsafety_i__append_~node~0.base) .cse1 0) .cse2 0))))))) is different from true [2018-03-23 11:49:33,968 WARN L148 SmtUtils]: Spent 163ms on a formula simplification that was a NOOP. DAG size: 67 [2018-03-23 11:49:33,979 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:33,982 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:33,983 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-03-23 11:49:33,983 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:34,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 54 [2018-03-23 11:49:34,119 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 37 [2018-03-23 11:49:34,122 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,122 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 41 [2018-03-23 11:49:34,122 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:34,132 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:34,162 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 41 [2018-03-23 11:49:34,171 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,193 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 28 treesize of output 50 [2018-03-23 11:49:34,196 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-03-23 11:49:34,196 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:34,238 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,245 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,263 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 6 case distinctions, treesize of input 30 treesize of output 55 [2018-03-23 11:49:34,263 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-03-23 11:49:34,316 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,316 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:34,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 39 [2018-03-23 11:49:34,319 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:34,366 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,367 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,368 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 53 [2018-03-23 11:49:34,371 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:34,419 INFO L267 ElimStorePlain]: Start of recursive call 7: 4 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-03-23 11:49:34,463 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-03-23 11:49:34,544 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-03-23 11:49:34,561 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 53 [2018-03-23 11:49:34,564 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 16 [2018-03-23 11:49:34,568 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,568 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-03-23 11:49:34,568 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:34,576 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:34,613 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 53 [2018-03-23 11:49:34,616 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-03-23 11:49:34,619 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,619 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-03-23 11:49:34,620 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:34,626 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:34,640 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:34,657 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:34,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 54 [2018-03-23 11:49:34,810 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 37 [2018-03-23 11:49:34,813 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 41 [2018-03-23 11:49:34,813 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:34,823 INFO L267 ElimStorePlain]: Start of recursive call 19: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:34,842 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 41 [2018-03-23 11:49:34,846 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,863 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 4 case distinctions, treesize of input 28 treesize of output 50 [2018-03-23 11:49:34,867 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,868 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,868 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 59 [2018-03-23 11:49:34,871 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:34,906 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,906 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:34,908 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 39 [2018-03-23 11:49:34,909 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:34,954 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,959 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:34,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 6 case distinctions, treesize of input 30 treesize of output 55 [2018-03-23 11:49:34,976 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 2 xjuncts. [2018-03-23 11:49:35,009 INFO L267 ElimStorePlain]: Start of recursive call 22: 4 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-03-23 11:49:35,041 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-03-23 11:49:35,078 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-03-23 11:49:35,090 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 53 [2018-03-23 11:49:35,093 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 16 [2018-03-23 11:49:35,096 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:35,096 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-03-23 11:49:35,096 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:35,102 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:35,123 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 53 [2018-03-23 11:49:35,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-03-23 11:49:35,128 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:35,128 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-03-23 11:49:35,129 INFO L267 ElimStorePlain]: Start of recursive call 31: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:35,133 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:35,143 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:35,152 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:35,246 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 20 dim-0 vars, and 10 xjuncts. [2018-03-23 11:49:35,246 INFO L202 ElimStorePlain]: Needed 31 recursive calls to eliminate 7 variables, input treesize:124, output treesize:877 [2018-03-23 11:49:54,916 WARN L151 SmtUtils]: Spent 13027ms on a formula simplification. DAG size of input: 258 DAG size of output 35 [2018-03-23 11:49:55,162 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-03-23 11:49:55,165 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:55,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-03-23 11:49:55,166 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:55,173 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:55,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:49:55,174 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:55,177 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:55,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 33 [2018-03-23 11:49:55,193 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:55,193 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:49:55,193 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:55,199 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:55,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-03-23 11:49:55,200 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:55,202 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:55,208 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:55,209 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 7 variables, input treesize:86, output treesize:7 [2018-03-23 11:49:55,314 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:49:55,335 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:49:55,336 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 21] total 42 [2018-03-23 11:49:55,336 INFO L442 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-03-23 11:49:55,336 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-03-23 11:49:55,337 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=121, Invalid=1503, Unknown=20, NotChecked=78, Total=1722 [2018-03-23 11:49:55,337 INFO L87 Difference]: Start difference. First operand 286 states and 308 transitions. Second operand 42 states. [2018-03-23 11:49:57,607 WARN L148 SmtUtils]: Spent 142ms on a formula simplification that was a NOOP. DAG size: 65 [2018-03-23 11:50:01,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:50:01,476 INFO L93 Difference]: Finished difference Result 477 states and 505 transitions. [2018-03-23 11:50:01,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-03-23 11:50:01,477 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 72 [2018-03-23 11:50:01,477 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:50:01,478 INFO L225 Difference]: With dead ends: 477 [2018-03-23 11:50:01,478 INFO L226 Difference]: Without dead ends: 346 [2018-03-23 11:50:01,480 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 55 SyntacticMatches, 4 SemanticMatches, 67 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 934 ImplicationChecksByTransitivity, 24.6s TimeCoverageRelationStatistics Valid=471, Invalid=4013, Unknown=76, NotChecked=132, Total=4692 [2018-03-23 11:50:01,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346 states. [2018-03-23 11:50:01,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346 to 276. [2018-03-23 11:50:01,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 276 states. [2018-03-23 11:50:01,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 276 states to 276 states and 295 transitions. [2018-03-23 11:50:01,499 INFO L78 Accepts]: Start accepts. Automaton has 276 states and 295 transitions. Word has length 72 [2018-03-23 11:50:01,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:50:01,500 INFO L459 AbstractCegarLoop]: Abstraction has 276 states and 295 transitions. [2018-03-23 11:50:01,500 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-03-23 11:50:01,500 INFO L276 IsEmpty]: Start isEmpty. Operand 276 states and 295 transitions. [2018-03-23 11:50:01,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-03-23 11:50:01,501 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:50:01,501 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:50:01,501 INFO L408 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:50:01,502 INFO L82 PathProgramCache]: Analyzing trace with hash -1331381045, now seen corresponding path program 1 times [2018-03-23 11:50:01,502 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:50:01,502 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:50:01,502 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:01,503 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:01,503 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:01,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:01,518 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:50:01,601 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-03-23 11:50:01,601 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:50:01,601 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:50:01,616 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:01,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:01,662 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:50:01,678 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2018-03-23 11:50:01,716 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:50:01,716 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 7 [2018-03-23 11:50:01,717 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-03-23 11:50:01,717 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-03-23 11:50:01,717 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:50:01,717 INFO L87 Difference]: Start difference. First operand 276 states and 295 transitions. Second operand 7 states. [2018-03-23 11:50:01,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:50:01,806 INFO L93 Difference]: Finished difference Result 385 states and 416 transitions. [2018-03-23 11:50:01,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-03-23 11:50:01,807 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 78 [2018-03-23 11:50:01,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:50:01,809 INFO L225 Difference]: With dead ends: 385 [2018-03-23 11:50:01,809 INFO L226 Difference]: Without dead ends: 315 [2018-03-23 11:50:01,809 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-03-23 11:50:01,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2018-03-23 11:50:01,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 290. [2018-03-23 11:50:01,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 290 states. [2018-03-23 11:50:01,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 311 transitions. [2018-03-23 11:50:01,832 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 311 transitions. Word has length 78 [2018-03-23 11:50:01,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:50:01,833 INFO L459 AbstractCegarLoop]: Abstraction has 290 states and 311 transitions. [2018-03-23 11:50:01,833 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-03-23 11:50:01,833 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 311 transitions. [2018-03-23 11:50:01,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-03-23 11:50:01,834 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:50:01,834 INFO L353 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:50:01,834 INFO L408 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:50:01,835 INFO L82 PathProgramCache]: Analyzing trace with hash -715278403, now seen corresponding path program 1 times [2018-03-23 11:50:01,835 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:50:01,835 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:50:01,835 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:01,836 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:01,836 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:01,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:01,853 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:50:01,876 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 29 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-03-23 11:50:01,877 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:50:01,877 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:50:01,877 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-03-23 11:50:01,877 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-03-23 11:50:01,877 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-03-23 11:50:01,878 INFO L87 Difference]: Start difference. First operand 290 states and 311 transitions. Second operand 3 states. [2018-03-23 11:50:01,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:50:01,904 INFO L93 Difference]: Finished difference Result 510 states and 558 transitions. [2018-03-23 11:50:01,904 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-03-23 11:50:01,904 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 87 [2018-03-23 11:50:01,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:50:01,906 INFO L225 Difference]: With dead ends: 510 [2018-03-23 11:50:01,906 INFO L226 Difference]: Without dead ends: 292 [2018-03-23 11:50:01,907 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-03-23 11:50:01,907 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states. [2018-03-23 11:50:01,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 292. [2018-03-23 11:50:01,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 292 states. [2018-03-23 11:50:01,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 292 states to 292 states and 313 transitions. [2018-03-23 11:50:01,929 INFO L78 Accepts]: Start accepts. Automaton has 292 states and 313 transitions. Word has length 87 [2018-03-23 11:50:01,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:50:01,929 INFO L459 AbstractCegarLoop]: Abstraction has 292 states and 313 transitions. [2018-03-23 11:50:01,929 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-03-23 11:50:01,929 INFO L276 IsEmpty]: Start isEmpty. Operand 292 states and 313 transitions. [2018-03-23 11:50:01,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-03-23 11:50:01,931 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:50:01,931 INFO L353 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:50:01,931 INFO L408 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:50:01,931 INFO L82 PathProgramCache]: Analyzing trace with hash -475321344, now seen corresponding path program 1 times [2018-03-23 11:50:01,931 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:50:01,931 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:50:01,932 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:01,932 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:01,932 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:01,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:01,951 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:50:02,528 WARN L151 SmtUtils]: Spent 217ms on a formula simplification. DAG size of input: 40 DAG size of output 28 [2018-03-23 11:50:02,721 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 23 proven. 22 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:50:02,741 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:50:02,741 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:50:02,747 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:02,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:02,781 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:50:02,795 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-03-23 11:50:02,795 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:02,797 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:02,798 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-03-23 11:50:02,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:50:02,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:50:02,909 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:02,910 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:02,916 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:02,916 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:27, output treesize:23 [2018-03-23 11:50:02,942 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-03-23 11:50:02,944 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:02,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-03-23 11:50:02,945 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:02,948 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:02,953 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:02,953 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:30, output treesize:26 [2018-03-23 11:50:02,991 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 30 treesize of output 40 [2018-03-23 11:50:02,995 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:02,997 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:03,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 26 treesize of output 53 [2018-03-23 11:50:03,009 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-03-23 11:50:03,057 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 26 [2018-03-23 11:50:03,057 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:03,081 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-03-23 11:50:03,102 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-03-23 11:50:03,102 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:39, output treesize:108 [2018-03-23 11:50:03,157 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 32 [2018-03-23 11:50:03,159 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:03,160 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:03,161 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:03,161 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:03,162 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 60 [2018-03-23 11:50:03,162 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:03,175 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:03,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 65 treesize of output 64 [2018-03-23 11:50:03,227 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:03,227 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 79 [2018-03-23 11:50:03,228 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:03,255 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:03,258 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:03,258 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:03,265 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 47 treesize of output 86 [2018-03-23 11:50:03,265 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-03-23 11:50:03,301 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:50:03,343 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:03,344 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 40 [2018-03-23 11:50:03,345 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 27 [2018-03-23 11:50:03,345 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:03,351 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:03,383 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 3 dim-2 vars, End of recursive call: 1 dim-0 vars, and 4 xjuncts. [2018-03-23 11:50:03,383 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 4 variables, input treesize:144, output treesize:168 [2018-03-23 11:50:03,452 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:03,453 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:03,454 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 60 [2018-03-23 11:50:03,454 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:03,488 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 4 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:50:03,488 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:188, output treesize:60 [2018-03-23 11:50:03,600 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 20 proven. 25 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:50:03,621 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:50:03,621 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 19] total 32 [2018-03-23 11:50:03,621 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-03-23 11:50:03,622 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-03-23 11:50:03,622 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=896, Unknown=0, NotChecked=0, Total=992 [2018-03-23 11:50:03,622 INFO L87 Difference]: Start difference. First operand 292 states and 313 transitions. Second operand 32 states. [2018-03-23 11:50:04,631 WARN L151 SmtUtils]: Spent 137ms on a formula simplification. DAG size of input: 94 DAG size of output 84 [2018-03-23 11:50:06,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:50:06,057 INFO L93 Difference]: Finished difference Result 551 states and 591 transitions. [2018-03-23 11:50:06,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-03-23 11:50:06,057 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 89 [2018-03-23 11:50:06,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:50:06,059 INFO L225 Difference]: With dead ends: 551 [2018-03-23 11:50:06,059 INFO L226 Difference]: Without dead ends: 306 [2018-03-23 11:50:06,060 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 75 SyntacticMatches, 4 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1125 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=556, Invalid=3866, Unknown=0, NotChecked=0, Total=4422 [2018-03-23 11:50:06,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 306 states. [2018-03-23 11:50:06,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 306 to 251. [2018-03-23 11:50:06,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 251 states. [2018-03-23 11:50:06,074 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 251 states to 251 states and 265 transitions. [2018-03-23 11:50:06,074 INFO L78 Accepts]: Start accepts. Automaton has 251 states and 265 transitions. Word has length 89 [2018-03-23 11:50:06,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:50:06,074 INFO L459 AbstractCegarLoop]: Abstraction has 251 states and 265 transitions. [2018-03-23 11:50:06,074 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-03-23 11:50:06,075 INFO L276 IsEmpty]: Start isEmpty. Operand 251 states and 265 transitions. [2018-03-23 11:50:06,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-03-23 11:50:06,076 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:50:06,076 INFO L353 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:50:06,076 INFO L408 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:50:06,076 INFO L82 PathProgramCache]: Analyzing trace with hash 2058324124, now seen corresponding path program 1 times [2018-03-23 11:50:06,076 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:50:06,076 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:50:06,077 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:06,077 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:06,077 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:06,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:06,089 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:50:06,322 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 35 proven. 8 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-03-23 11:50:06,322 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:50:06,322 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:50:06,327 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:06,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:06,360 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:50:06,466 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:06,467 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-03-23 11:50:06,468 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:06,477 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:06,478 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:06,478 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-03-23 11:50:06,478 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:06,484 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:06,484 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:25, output treesize:18 [2018-03-23 11:50:06,557 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 35 proven. 8 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-03-23 11:50:06,593 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:50:06,593 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12] total 22 [2018-03-23 11:50:06,594 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-03-23 11:50:06,594 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-03-23 11:50:06,594 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=438, Unknown=0, NotChecked=0, Total=506 [2018-03-23 11:50:06,594 INFO L87 Difference]: Start difference. First operand 251 states and 265 transitions. Second operand 23 states. [2018-03-23 11:50:07,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:50:07,158 INFO L93 Difference]: Finished difference Result 318 states and 331 transitions. [2018-03-23 11:50:07,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-03-23 11:50:07,158 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 90 [2018-03-23 11:50:07,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:50:07,160 INFO L225 Difference]: With dead ends: 318 [2018-03-23 11:50:07,160 INFO L226 Difference]: Without dead ends: 312 [2018-03-23 11:50:07,160 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 186 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=135, Invalid=677, Unknown=0, NotChecked=0, Total=812 [2018-03-23 11:50:07,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states. [2018-03-23 11:50:07,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 283. [2018-03-23 11:50:07,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 283 states. [2018-03-23 11:50:07,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 283 states to 283 states and 298 transitions. [2018-03-23 11:50:07,179 INFO L78 Accepts]: Start accepts. Automaton has 283 states and 298 transitions. Word has length 90 [2018-03-23 11:50:07,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:50:07,179 INFO L459 AbstractCegarLoop]: Abstraction has 283 states and 298 transitions. [2018-03-23 11:50:07,180 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-03-23 11:50:07,180 INFO L276 IsEmpty]: Start isEmpty. Operand 283 states and 298 transitions. [2018-03-23 11:50:07,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-03-23 11:50:07,181 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:50:07,181 INFO L353 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:50:07,181 INFO L408 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:50:07,181 INFO L82 PathProgramCache]: Analyzing trace with hash 194694523, now seen corresponding path program 1 times [2018-03-23 11:50:07,181 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:50:07,182 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:50:07,182 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:07,182 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:07,182 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:07,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:07,209 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:50:07,574 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:50:07,574 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:50:07,574 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:50:07,589 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:07,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:07,639 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:50:07,721 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|__U_MULTI_flength_test___true_valid_memsafety_i__append_#t~malloc2.base| Int)) (and (= |c_#length| (store |c_old(#length)| |__U_MULTI_flength_test___true_valid_memsafety_i__append_#t~malloc2.base| 9)) (= 0 (select |c_old(#valid)| |__U_MULTI_flength_test___true_valid_memsafety_i__append_#t~malloc2.base|)))) is different from true [2018-03-23 11:50:07,729 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:07,758 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:07,759 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-03-23 11:50:07,759 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:07,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 17 [2018-03-23 11:50:07,766 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:07,770 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:50:07,770 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:27, output treesize:20 [2018-03-23 11:50:07,833 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 31 [2018-03-23 11:50:07,834 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-03-23 11:50:07,848 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-03-23 11:50:07,849 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:33, output treesize:27 [2018-03-23 11:50:07,956 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 29 [2018-03-23 11:50:07,957 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-03-23 11:50:07,971 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:50:07,971 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:26, output treesize:25 [2018-03-23 11:50:08,074 INFO L134 CoverageAnalysis]: Checked inductivity of 35 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 2 trivial. 12 not checked. [2018-03-23 11:50:08,095 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:50:08,095 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 28 [2018-03-23 11:50:08,095 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-03-23 11:50:08,096 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-03-23 11:50:08,096 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=665, Unknown=3, NotChecked=52, Total=812 [2018-03-23 11:50:08,096 INFO L87 Difference]: Start difference. First operand 283 states and 298 transitions. Second operand 29 states. [2018-03-23 11:50:09,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:50:09,107 INFO L93 Difference]: Finished difference Result 299 states and 315 transitions. [2018-03-23 11:50:09,107 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-03-23 11:50:09,107 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 91 [2018-03-23 11:50:09,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:50:09,108 INFO L225 Difference]: With dead ends: 299 [2018-03-23 11:50:09,108 INFO L226 Difference]: Without dead ends: 293 [2018-03-23 11:50:09,109 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 78 SyntacticMatches, 5 SemanticMatches, 38 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 406 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=215, Invalid=1268, Unknown=3, NotChecked=74, Total=1560 [2018-03-23 11:50:09,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2018-03-23 11:50:09,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 277. [2018-03-23 11:50:09,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 277 states. [2018-03-23 11:50:09,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 277 states to 277 states and 292 transitions. [2018-03-23 11:50:09,123 INFO L78 Accepts]: Start accepts. Automaton has 277 states and 292 transitions. Word has length 91 [2018-03-23 11:50:09,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:50:09,123 INFO L459 AbstractCegarLoop]: Abstraction has 277 states and 292 transitions. [2018-03-23 11:50:09,123 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-03-23 11:50:09,124 INFO L276 IsEmpty]: Start isEmpty. Operand 277 states and 292 transitions. [2018-03-23 11:50:09,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-03-23 11:50:09,124 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:50:09,124 INFO L353 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:50:09,124 INFO L408 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:50:09,124 INFO L82 PathProgramCache]: Analyzing trace with hash -167634625, now seen corresponding path program 1 times [2018-03-23 11:50:09,125 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:50:09,125 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:50:09,125 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:09,125 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:09,125 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:09,159 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:09,160 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:50:09,891 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 6 proven. 37 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-03-23 11:50:09,891 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:50:09,891 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:50:09,897 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:09,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:09,943 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:50:10,046 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-03-23 11:50:10,046 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:10,048 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:50:10,048 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:11 [2018-03-23 11:50:10,200 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-03-23 11:50:10,202 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:50:10,202 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:10,203 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:10,208 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:10,208 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-03-23 11:50:10,252 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 23 treesize of output 35 [2018-03-23 11:50:10,254 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 23 [2018-03-23 11:50:10,254 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:10,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 30 [2018-03-23 11:50:10,275 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-03-23 11:50:10,286 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:50:10,299 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:50:10,299 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:38, output treesize:70 [2018-03-23 11:50:10,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 28 [2018-03-23 11:50:10,372 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:10,372 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-03-23 11:50:10,373 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:10,378 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:10,410 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 68 treesize of output 65 [2018-03-23 11:50:10,413 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:10,413 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 76 [2018-03-23 11:50:10,414 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:10,447 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:10,455 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 47 treesize of output 53 [2018-03-23 11:50:10,456 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-03-23 11:50:10,480 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:50:10,503 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 3 xjuncts. [2018-03-23 11:50:10,503 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 3 variables, input treesize:102, output treesize:115 [2018-03-23 11:50:10,572 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-03-23 11:50:10,573 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:10,585 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:10,585 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:10,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 10 [2018-03-23 11:50:10,586 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:10,598 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 3 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:50:10,599 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:130, output treesize:57 [2018-03-23 11:50:10,737 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:10,738 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:10,739 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:10,739 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 58 [2018-03-23 11:50:10,739 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:10,750 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:50:10,751 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:68, output treesize:76 [2018-03-23 11:50:10,879 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 73 [2018-03-23 11:50:10,881 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:50:10,882 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:10,891 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:10,903 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:50:10,903 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:89, output treesize:76 [2018-03-23 11:50:10,963 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 73 [2018-03-23 11:50:10,965 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:50:10,965 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:10,975 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:10,988 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-03-23 11:50:10,988 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:89, output treesize:85 [2018-03-23 11:50:11,061 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 58 [2018-03-23 11:50:11,063 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:11,063 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:50:11,063 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:11,072 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-03-23 11:50:11,072 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:11,078 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 14 [2018-03-23 11:50:11,078 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:11,082 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:11,088 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-03-23 11:50:11,088 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:94, output treesize:28 [2018-03-23 11:50:11,168 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 8 proven. 16 refuted. 19 times theorem prover too weak. 1 trivial. 0 not checked. [2018-03-23 11:50:11,189 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:50:11,189 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 21] total 44 [2018-03-23 11:50:11,189 INFO L442 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-03-23 11:50:11,189 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-03-23 11:50:11,190 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=132, Invalid=1823, Unknown=25, NotChecked=0, Total=1980 [2018-03-23 11:50:11,190 INFO L87 Difference]: Start difference. First operand 277 states and 292 transitions. Second operand 45 states. [2018-03-23 11:50:14,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:50:14,179 INFO L93 Difference]: Finished difference Result 406 states and 426 transitions. [2018-03-23 11:50:14,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-03-23 11:50:14,179 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 99 [2018-03-23 11:50:14,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:50:14,181 INFO L225 Difference]: With dead ends: 406 [2018-03-23 11:50:14,181 INFO L226 Difference]: Without dead ends: 405 [2018-03-23 11:50:14,183 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 82 SyntacticMatches, 3 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1378 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=704, Invalid=4968, Unknown=28, NotChecked=0, Total=5700 [2018-03-23 11:50:14,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 405 states. [2018-03-23 11:50:14,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 405 to 277. [2018-03-23 11:50:14,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 277 states. [2018-03-23 11:50:14,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 277 states to 277 states and 291 transitions. [2018-03-23 11:50:14,210 INFO L78 Accepts]: Start accepts. Automaton has 277 states and 291 transitions. Word has length 99 [2018-03-23 11:50:14,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:50:14,210 INFO L459 AbstractCegarLoop]: Abstraction has 277 states and 291 transitions. [2018-03-23 11:50:14,210 INFO L460 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-03-23 11:50:14,210 INFO L276 IsEmpty]: Start isEmpty. Operand 277 states and 291 transitions. [2018-03-23 11:50:14,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-03-23 11:50:14,211 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:50:14,211 INFO L353 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:50:14,212 INFO L408 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_flength_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr23RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr18RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr9RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr12RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr21RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr22RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr15RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr25RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr14RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr19RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr8RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr11RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr24RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr16RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr13RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr17RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr20RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr5RequiresViolation, __U_MULTI_flength_test___true_valid_memsafety_i__appendErr10RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr25AssertViolationMEMORY_FREE, mainErr14AssertViolationMEMORY_FREE, mainErr18RequiresViolation, mainErr0RequiresViolation, mainErr21RequiresViolation, mainErr3RequiresViolation, mainErr28EnsuresViolationMEMORY_LEAK, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr19RequiresViolation, mainErr24AssertViolationMEMORY_FREE, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr23AssertViolationMEMORY_FREE, mainErr9RequiresViolation, mainErr22AssertViolationMEMORY_FREE, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr11RequiresViolation, mainErr26AssertViolationMEMORY_FREE, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr4RequiresViolation, mainErr15AssertViolationMEMORY_FREE, mainErr27AssertViolationMEMORY_FREE]=== [2018-03-23 11:50:14,212 INFO L82 PathProgramCache]: Analyzing trace with hash -167634624, now seen corresponding path program 1 times [2018-03-23 11:50:14,212 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:50:14,212 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:50:14,213 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:14,213 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:14,213 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:14,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:14,244 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:50:15,196 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 0 proven. 43 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-03-23 11:50:15,196 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:50:15,196 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:50:15,201 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:15,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:15,242 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:50:15,393 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: var is still there: |v_old(#valid)_AFTER_CALL_31| term size 17 at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:270) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:243) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:445) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:198) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:283) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:237) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:185) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.MultiTrackRefinementStrategy.getTraceCheck(MultiTrackRefinementStrategy.java:222) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:231) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:205) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:69) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:406) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:417) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:363) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:304) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:118) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:119) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:324) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.runToolchainDefault(DefaultToolchainJob.java:221) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.BasicToolchainJob.run(BasicToolchainJob.java:134) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-03-23 11:50:15,396 INFO L168 Benchmark]: Toolchain (without parser) took 106951.87 ms. Allocated memory was 308.8 MB in the beginning and 650.1 MB in the end (delta: 341.3 MB). Free memory was 248.4 MB in the beginning and 367.7 MB in the end (delta: -119.4 MB). Peak memory consumption was 222.0 MB. Max. memory is 5.3 GB. [2018-03-23 11:50:15,397 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 308.8 MB. Free memory is still 274.5 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-03-23 11:50:15,397 INFO L168 Benchmark]: CACSL2BoogieTranslator took 365.65 ms. Allocated memory is still 308.8 MB. Free memory was 248.4 MB in the beginning and 221.5 MB in the end (delta: 26.9 MB). Peak memory consumption was 26.9 MB. Max. memory is 5.3 GB. [2018-03-23 11:50:15,398 INFO L168 Benchmark]: Boogie Preprocessor took 58.22 ms. Allocated memory is still 308.8 MB. Free memory was 221.5 MB in the beginning and 219.5 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-03-23 11:50:15,398 INFO L168 Benchmark]: RCFGBuilder took 742.66 ms. Allocated memory was 308.8 MB in the beginning and 471.3 MB in the end (delta: 162.5 MB). Free memory was 219.5 MB in the beginning and 387.1 MB in the end (delta: -167.6 MB). Peak memory consumption was 22.8 MB. Max. memory is 5.3 GB. [2018-03-23 11:50:15,398 INFO L168 Benchmark]: TraceAbstraction took 105780.52 ms. Allocated memory was 471.3 MB in the beginning and 650.1 MB in the end (delta: 178.8 MB). Free memory was 387.1 MB in the beginning and 367.7 MB in the end (delta: 19.3 MB). Peak memory consumption was 198.1 MB. Max. memory is 5.3 GB. [2018-03-23 11:50:15,400 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 308.8 MB. Free memory is still 274.5 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 365.65 ms. Allocated memory is still 308.8 MB. Free memory was 248.4 MB in the beginning and 221.5 MB in the end (delta: 26.9 MB). Peak memory consumption was 26.9 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 58.22 ms. Allocated memory is still 308.8 MB. Free memory was 221.5 MB in the beginning and 219.5 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 742.66 ms. Allocated memory was 308.8 MB in the beginning and 471.3 MB in the end (delta: 162.5 MB). Free memory was 219.5 MB in the beginning and 387.1 MB in the end (delta: -167.6 MB). Peak memory consumption was 22.8 MB. Max. memory is 5.3 GB. * TraceAbstraction took 105780.52 ms. Allocated memory was 471.3 MB in the beginning and 650.1 MB in the end (delta: 178.8 MB). Free memory was 387.1 MB in the beginning and 367.7 MB in the end (delta: 19.3 MB). Peak memory consumption was 198.1 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: var is still there: |v_old(#valid)_AFTER_CALL_31| term size 17 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: var is still there: |v_old(#valid)_AFTER_CALL_31| term size 17: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) RESULT: Ultimate could not prove your program: Toolchain returned no result. Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/length_test03_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-Benchmark-0-2018-03-23_11-50-15-406.csv Received shutdown request...