java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-d4a2356 [2018-03-23 11:47:12,497 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-03-23 11:47:12,500 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-03-23 11:47:12,517 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-03-23 11:47:12,517 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-03-23 11:47:12,519 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-03-23 11:47:12,519 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-03-23 11:47:12,521 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-03-23 11:47:12,524 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-03-23 11:47:12,525 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-03-23 11:47:12,526 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-03-23 11:47:12,526 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-03-23 11:47:12,527 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-03-23 11:47:12,528 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-03-23 11:47:12,529 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-03-23 11:47:12,532 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-03-23 11:47:12,534 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-03-23 11:47:12,536 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-03-23 11:47:12,538 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-03-23 11:47:12,539 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-03-23 11:47:12,542 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-03-23 11:47:12,542 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-03-23 11:47:12,542 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-03-23 11:47:12,544 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-03-23 11:47:12,545 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-03-23 11:47:12,546 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-03-23 11:47:12,546 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-03-23 11:47:12,547 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-03-23 11:47:12,548 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 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[2018-03-23 11:47:12,549 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-03-23 11:47:12,558 INFO L110 SettingsManager]: Loading preferences was successful [2018-03-23 11:47:12,558 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-03-23 11:47:12,559 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-03-23 11:47:12,559 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-03-23 11:47:12,559 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-03-23 11:47:12,559 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-03-23 11:47:12,559 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-03-23 11:47:12,560 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-03-23 11:47:12,560 INFO L133 SettingsManager]: * sizeof long=4 [2018-03-23 11:47:12,560 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-03-23 11:47:12,560 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-03-23 11:47:12,560 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-03-23 11:47:12,561 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-03-23 11:47:12,561 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-03-23 11:47:12,561 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-03-23 11:47:12,561 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-03-23 11:47:12,561 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-03-23 11:47:12,561 INFO L133 SettingsManager]: * sizeof long double=12 [2018-03-23 11:47:12,561 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-03-23 11:47:12,561 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-03-23 11:47:12,562 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-03-23 11:47:12,562 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-03-23 11:47:12,562 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-03-23 11:47:12,562 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-03-23 11:47:12,562 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-03-23 11:47:12,562 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-03-23 11:47:12,563 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-03-23 11:47:12,563 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-03-23 11:47:12,563 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-03-23 11:47:12,563 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-03-23 11:47:12,563 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-23 11:47:12,563 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-03-23 11:47:12,564 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-03-23 11:47:12,564 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-03-23 11:47:12,595 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-03-23 11:47:12,606 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-03-23 11:47:12,609 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-03-23 11:47:12,610 INFO L271 PluginConnector]: Initializing CDTParser... [2018-03-23 11:47:12,611 INFO L276 PluginConnector]: CDTParser initialized [2018-03-23 11:47:12,611 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:12,921 INFO L228 CDTParser]: Created temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGd7533ea96 [2018-03-23 11:47:13,102 INFO L291 CDTParser]: IsIndexed: true [2018-03-23 11:47:13,103 INFO L292 CDTParser]: Found 1 translation units. [2018-03-23 11:47:13,103 INFO L171 CDTParser]: Scanning optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,114 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-03-23 11:47:13,115 INFO L215 ultiparseSymbolTable]: [2018-03-23 11:47:13,115 INFO L218 ultiparseSymbolTable]: Function table: [2018-03-23 11:47:13,115 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append ('append') in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,115 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeData ('freeData') in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,115 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_64 ('__bswap_64') in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,115 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,116 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_32 ('__bswap_32') in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,116 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data ('create_data') in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,116 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-03-23 11:47:13,116 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____int8_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,116 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__register_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,116 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____uint64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,116 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsword_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,116 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_once_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,116 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__off_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,117 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_attr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,117 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____nlink_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,117 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____socklen_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,117 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____sig_atomic_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,117 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__timer_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,117 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____ssize_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,117 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__fsfilcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,117 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____mode_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,117 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__nlink_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,118 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__uint in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,118 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__int32_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,118 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____intptr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,118 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,118 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____blkcnt64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,118 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__gid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,118 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__dev_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,118 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_short in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,118 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____uid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,118 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__ssize_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,118 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__id_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,118 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__mode_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,118 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__fsid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,119 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__int64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,119 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____key_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,119 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____blkcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,119 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_mutex_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,119 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____clock_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,119 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____u_int in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,119 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____useconds_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,119 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__time_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,119 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____u_short in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,119 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____loff_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,119 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__suseconds_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,119 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____syscall_slong_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,119 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____blksize_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,120 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__int8_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,120 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__daddr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,120 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____qaddr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,120 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____uint16_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,120 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsfilcnt64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,120 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____int64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,120 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_condattr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,120 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__ldiv_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,120 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__ino_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,120 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__ushort in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,120 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____rlim64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,120 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____time_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,120 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____uint8_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,121 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_quad_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,121 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_int64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,121 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__loff_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,121 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____daddr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,121 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsfilcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,121 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_barrierattr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,121 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__sigset_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,121 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__blkcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,121 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__ulong in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,121 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_char in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,122 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____u_long in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,122 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____int16_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,122 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_int32_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,122 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____dev_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,122 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsblkcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,122 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__Data in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,122 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____off_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,122 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_key_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,123 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_rwlock_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,123 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__clock_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,123 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,123 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__blksize_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,123 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_long in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,123 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____uint32_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,123 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____caddr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,123 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__fd_set in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,123 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_rwlockattr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,124 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____ino_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,124 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____ino64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,124 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____sigset_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,124 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__quad_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,124 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__caddr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,124 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____rlim_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,124 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_cond_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,124 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_spinlock_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,125 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_int in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,125 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_int16_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,125 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____int32_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,125 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__fd_mask in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,125 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__div_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,125 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__size_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,125 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__u_int8_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,125 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__uid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,125 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__key_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,126 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____pthread_slist_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,126 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____clockid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,126 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__clockid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,126 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fd_mask in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,126 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__int16_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,126 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__lldiv_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,126 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____quad_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,126 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,127 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____gid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,127 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__wchar_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,127 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____u_char in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,127 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____u_quad_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,127 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____syscall_ulong_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,127 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____id_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,127 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_barrier_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,127 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__pthread_mutexattr_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,128 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__fsblkcnt_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,128 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____timer_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,128 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____off64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,128 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____suseconds_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,128 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____fsblkcnt64_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,128 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____pid_t in optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:13,146 INFO L334 CDTParser]: Deleted temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGd7533ea96 [2018-03-23 11:47:13,151 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-03-23 11:47:13,153 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-03-23 11:47:13,154 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-03-23 11:47:13,154 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-03-23 11:47:13,159 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-03-23 11:47:13,159 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.03 11:47:13" (1/1) ... [2018-03-23 11:47:13,161 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@38ed7bb9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:47:13, skipping insertion in model container [2018-03-23 11:47:13,162 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.03 11:47:13" (1/1) ... [2018-03-23 11:47:13,176 INFO L167 Dispatcher]: Using SV-COMP mode [2018-03-23 11:47:13,208 INFO L167 Dispatcher]: Using SV-COMP mode [2018-03-23 11:47:13,399 INFO L175 PostProcessor]: Settings: Checked method=main [2018-03-23 11:47:13,450 INFO L175 PostProcessor]: Settings: Checked method=main [2018-03-23 11:47:13,457 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 120 non ball SCCs. Number of states in SCCs 120. [2018-03-23 11:47:13,514 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:47:13 WrapperNode [2018-03-23 11:47:13,514 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-03-23 11:47:13,515 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-03-23 11:47:13,515 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-03-23 11:47:13,515 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-03-23 11:47:13,530 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:47:13" (1/1) ... [2018-03-23 11:47:13,530 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:47:13" (1/1) ... [2018-03-23 11:47:13,549 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:47:13" (1/1) ... [2018-03-23 11:47:13,550 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:47:13" (1/1) ... [2018-03-23 11:47:13,565 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:47:13" (1/1) ... [2018-03-23 11:47:13,570 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:47:13" (1/1) ... [2018-03-23 11:47:13,574 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:47:13" (1/1) ... [2018-03-23 11:47:13,579 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-03-23 11:47:13,579 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-03-23 11:47:13,579 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-03-23 11:47:13,579 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-03-23 11:47:13,580 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:47:13" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-03-23 11:47:13,701 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-03-23 11:47:13,701 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-03-23 11:47:13,701 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_32 [2018-03-23 11:47:13,701 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_64 [2018-03-23 11:47:13,702 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data [2018-03-23 11:47:13,702 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeData [2018-03-23 11:47:13,702 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append [2018-03-23 11:47:13,702 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-03-23 11:47:13,702 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-03-23 11:47:13,702 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-03-23 11:47:13,702 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-03-23 11:47:13,702 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-03-23 11:47:13,702 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-03-23 11:47:13,703 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-03-23 11:47:13,703 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-03-23 11:47:13,703 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-03-23 11:47:13,703 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-03-23 11:47:13,703 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-03-23 11:47:13,703 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-03-23 11:47:13,704 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-03-23 11:47:13,704 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-03-23 11:47:13,704 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-03-23 11:47:13,704 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-03-23 11:47:13,704 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-03-23 11:47:13,704 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-03-23 11:47:13,705 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_32 [2018-03-23 11:47:13,705 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i____bswap_64 [2018-03-23 11:47:13,705 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-03-23 11:47:13,705 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-03-23 11:47:13,705 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-03-23 11:47:13,705 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-03-23 11:47:13,706 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-03-23 11:47:13,706 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-03-23 11:47:13,706 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-03-23 11:47:13,706 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-03-23 11:47:13,706 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-03-23 11:47:13,706 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-03-23 11:47:13,706 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-03-23 11:47:13,706 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-03-23 11:47:13,707 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-03-23 11:47:13,707 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-03-23 11:47:13,707 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-03-23 11:47:13,707 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-03-23 11:47:13,707 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-03-23 11:47:13,707 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-03-23 11:47:13,707 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-03-23 11:47:13,708 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-03-23 11:47:13,708 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-03-23 11:47:13,708 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-03-23 11:47:13,708 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-03-23 11:47:13,708 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-03-23 11:47:13,708 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-03-23 11:47:13,708 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-03-23 11:47:13,708 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-03-23 11:47:13,709 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-03-23 11:47:13,709 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-03-23 11:47:13,709 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-03-23 11:47:13,709 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-03-23 11:47:13,709 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-03-23 11:47:13,709 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-03-23 11:47:13,709 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-03-23 11:47:13,709 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-03-23 11:47:13,710 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-03-23 11:47:13,710 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-03-23 11:47:13,710 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-03-23 11:47:13,710 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-03-23 11:47:13,710 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-03-23 11:47:13,710 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-03-23 11:47:13,710 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-03-23 11:47:13,710 INFO L128 BoogieDeclarations]: Found specification of procedure aligned_alloc [2018-03-23 11:47:13,711 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-03-23 11:47:13,711 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-03-23 11:47:13,711 INFO L128 BoogieDeclarations]: Found specification of procedure at_quick_exit [2018-03-23 11:47:13,711 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-03-23 11:47:13,711 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-03-23 11:47:13,711 INFO L128 BoogieDeclarations]: Found specification of procedure quick_exit [2018-03-23 11:47:13,711 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-03-23 11:47:13,711 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-03-23 11:47:13,712 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-03-23 11:47:13,712 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-03-23 11:47:13,712 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-03-23 11:47:13,712 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-03-23 11:47:13,712 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-03-23 11:47:13,712 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-03-23 11:47:13,712 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-03-23 11:47:13,712 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-03-23 11:47:13,713 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-03-23 11:47:13,713 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-03-23 11:47:13,713 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-03-23 11:47:13,713 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-03-23 11:47:13,713 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-03-23 11:47:13,713 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-03-23 11:47:13,713 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-03-23 11:47:13,713 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-03-23 11:47:13,714 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-03-23 11:47:13,714 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-03-23 11:47:13,714 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-03-23 11:47:13,714 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-03-23 11:47:13,714 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-03-23 11:47:13,714 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-03-23 11:47:13,714 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-03-23 11:47:13,715 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-03-23 11:47:13,715 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-03-23 11:47:13,715 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-03-23 11:47:13,715 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-03-23 11:47:13,715 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-03-23 11:47:13,715 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-03-23 11:47:13,715 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-03-23 11:47:13,715 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-03-23 11:47:13,716 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-03-23 11:47:13,716 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-03-23 11:47:13,716 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-03-23 11:47:13,716 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-03-23 11:47:13,716 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-03-23 11:47:13,716 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-03-23 11:47:13,716 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_data [2018-03-23 11:47:13,716 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-03-23 11:47:13,717 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-03-23 11:47:13,717 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-03-23 11:47:13,717 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-03-23 11:47:13,717 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeData [2018-03-23 11:47:13,717 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-03-23 11:47:13,717 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append [2018-03-23 11:47:13,717 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-03-23 11:47:13,717 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-03-23 11:47:13,717 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-03-23 11:47:13,718 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-03-23 11:47:13,718 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-03-23 11:47:14,261 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-03-23 11:47:14,262 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.03 11:47:14 BoogieIcfgContainer [2018-03-23 11:47:14,262 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-03-23 11:47:14,263 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-03-23 11:47:14,263 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-03-23 11:47:14,266 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-03-23 11:47:14,267 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.03 11:47:13" (1/3) ... [2018-03-23 11:47:14,268 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4abc5f3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.03 11:47:14, skipping insertion in model container [2018-03-23 11:47:14,268 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:47:13" (2/3) ... [2018-03-23 11:47:14,268 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4abc5f3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.03 11:47:14, skipping insertion in model container [2018-03-23 11:47:14,269 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.03 11:47:14" (3/3) ... [2018-03-23 11:47:14,271 INFO L107 eAbstractionObserver]: Analyzing ICFG optional_data_creation_test04_false-valid-memtrack.i [2018-03-23 11:47:14,280 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-03-23 11:47:14,289 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 45 error locations. [2018-03-23 11:47:14,338 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-03-23 11:47:14,338 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-03-23 11:47:14,339 INFO L370 AbstractCegarLoop]: Hoare is true [2018-03-23 11:47:14,339 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-03-23 11:47:14,339 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-03-23 11:47:14,339 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-03-23 11:47:14,339 INFO L374 AbstractCegarLoop]: Difference is false [2018-03-23 11:47:14,339 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-03-23 11:47:14,339 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-03-23 11:47:14,340 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-03-23 11:47:14,357 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states. [2018-03-23 11:47:14,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-03-23 11:47:14,361 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:14,362 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:14,362 INFO L408 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:14,366 INFO L82 PathProgramCache]: Analyzing trace with hash -443245745, now seen corresponding path program 1 times [2018-03-23 11:47:14,367 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:14,367 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:14,406 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:14,406 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:14,407 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:14,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:14,450 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:14,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:14,507 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:14,507 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-03-23 11:47:14,509 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-03-23 11:47:14,525 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-03-23 11:47:14,525 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-03-23 11:47:14,528 INFO L87 Difference]: Start difference. First operand 148 states. Second operand 3 states. [2018-03-23 11:47:14,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:14,715 INFO L93 Difference]: Finished difference Result 288 states and 315 transitions. [2018-03-23 11:47:14,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-03-23 11:47:14,717 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-03-23 11:47:14,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:14,728 INFO L225 Difference]: With dead ends: 288 [2018-03-23 11:47:14,728 INFO L226 Difference]: Without dead ends: 147 [2018-03-23 11:47:14,733 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-03-23 11:47:14,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-03-23 11:47:14,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 144. [2018-03-23 11:47:14,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-03-23 11:47:14,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 151 transitions. [2018-03-23 11:47:14,776 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 151 transitions. Word has length 8 [2018-03-23 11:47:14,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:14,776 INFO L459 AbstractCegarLoop]: Abstraction has 144 states and 151 transitions. [2018-03-23 11:47:14,776 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-03-23 11:47:14,776 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 151 transitions. [2018-03-23 11:47:14,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-03-23 11:47:14,777 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:14,777 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:14,777 INFO L408 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:14,777 INFO L82 PathProgramCache]: Analyzing trace with hash -443245744, now seen corresponding path program 1 times [2018-03-23 11:47:14,777 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:14,777 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:14,778 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:14,778 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:14,779 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:14,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:14,795 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:14,839 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:14,840 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:14,840 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-03-23 11:47:14,841 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-03-23 11:47:14,842 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-03-23 11:47:14,842 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-03-23 11:47:14,842 INFO L87 Difference]: Start difference. First operand 144 states and 151 transitions. Second operand 3 states. [2018-03-23 11:47:14,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:14,997 INFO L93 Difference]: Finished difference Result 146 states and 154 transitions. [2018-03-23 11:47:14,997 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-03-23 11:47:14,997 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-03-23 11:47:14,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:14,999 INFO L225 Difference]: With dead ends: 146 [2018-03-23 11:47:15,000 INFO L226 Difference]: Without dead ends: 145 [2018-03-23 11:47:15,001 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-03-23 11:47:15,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-03-23 11:47:15,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 143. [2018-03-23 11:47:15,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-03-23 11:47:15,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 150 transitions. [2018-03-23 11:47:15,013 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 150 transitions. Word has length 8 [2018-03-23 11:47:15,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:15,013 INFO L459 AbstractCegarLoop]: Abstraction has 143 states and 150 transitions. [2018-03-23 11:47:15,013 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-03-23 11:47:15,013 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 150 transitions. [2018-03-23 11:47:15,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-03-23 11:47:15,014 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:15,014 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:15,014 INFO L408 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:15,014 INFO L82 PathProgramCache]: Analyzing trace with hash 2106245209, now seen corresponding path program 1 times [2018-03-23 11:47:15,015 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:15,015 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:15,015 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:15,016 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:15,016 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:15,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:15,035 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:15,111 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:15,111 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:15,111 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-03-23 11:47:15,112 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-03-23 11:47:15,112 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-03-23 11:47:15,112 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:47:15,113 INFO L87 Difference]: Start difference. First operand 143 states and 150 transitions. Second operand 5 states. [2018-03-23 11:47:15,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:15,325 INFO L93 Difference]: Finished difference Result 157 states and 165 transitions. [2018-03-23 11:47:15,325 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-03-23 11:47:15,326 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 15 [2018-03-23 11:47:15,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:15,327 INFO L225 Difference]: With dead ends: 157 [2018-03-23 11:47:15,327 INFO L226 Difference]: Without dead ends: 156 [2018-03-23 11:47:15,327 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-03-23 11:47:15,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-03-23 11:47:15,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 149. [2018-03-23 11:47:15,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-03-23 11:47:15,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 158 transitions. [2018-03-23 11:47:15,337 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 158 transitions. Word has length 15 [2018-03-23 11:47:15,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:15,337 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 158 transitions. [2018-03-23 11:47:15,338 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-03-23 11:47:15,338 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 158 transitions. [2018-03-23 11:47:15,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-03-23 11:47:15,338 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:15,339 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:15,339 INFO L408 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:15,339 INFO L82 PathProgramCache]: Analyzing trace with hash 2106245210, now seen corresponding path program 1 times [2018-03-23 11:47:15,339 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:15,339 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:15,340 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:15,341 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:15,341 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:15,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:15,356 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:15,499 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:15,499 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:15,499 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-03-23 11:47:15,500 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-03-23 11:47:15,501 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-03-23 11:47:15,501 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:47:15,501 INFO L87 Difference]: Start difference. First operand 149 states and 158 transitions. Second operand 7 states. [2018-03-23 11:47:15,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:15,711 INFO L93 Difference]: Finished difference Result 155 states and 164 transitions. [2018-03-23 11:47:15,711 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-03-23 11:47:15,711 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 15 [2018-03-23 11:47:15,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:15,713 INFO L225 Difference]: With dead ends: 155 [2018-03-23 11:47:15,713 INFO L226 Difference]: Without dead ends: 154 [2018-03-23 11:47:15,713 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-03-23 11:47:15,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-03-23 11:47:15,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 149. [2018-03-23 11:47:15,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-03-23 11:47:15,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 157 transitions. [2018-03-23 11:47:15,726 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 157 transitions. Word has length 15 [2018-03-23 11:47:15,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:15,726 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 157 transitions. [2018-03-23 11:47:15,726 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-03-23 11:47:15,726 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 157 transitions. [2018-03-23 11:47:15,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-03-23 11:47:15,727 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:15,727 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:15,727 INFO L408 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:15,727 INFO L82 PathProgramCache]: Analyzing trace with hash 869092046, now seen corresponding path program 1 times [2018-03-23 11:47:15,728 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:15,728 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:15,729 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:15,729 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:15,729 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:15,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:15,742 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:15,772 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:15,772 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:15,772 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:47:15,773 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-23 11:47:15,773 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-23 11:47:15,773 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:47:15,773 INFO L87 Difference]: Start difference. First operand 149 states and 157 transitions. Second operand 4 states. [2018-03-23 11:47:15,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:15,871 INFO L93 Difference]: Finished difference Result 149 states and 157 transitions. [2018-03-23 11:47:15,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-03-23 11:47:15,871 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-03-23 11:47:15,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:15,872 INFO L225 Difference]: With dead ends: 149 [2018-03-23 11:47:15,872 INFO L226 Difference]: Without dead ends: 148 [2018-03-23 11:47:15,873 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:47:15,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-03-23 11:47:15,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 148. [2018-03-23 11:47:15,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-03-23 11:47:15,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 156 transitions. [2018-03-23 11:47:15,884 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 156 transitions. Word has length 16 [2018-03-23 11:47:15,884 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:15,884 INFO L459 AbstractCegarLoop]: Abstraction has 148 states and 156 transitions. [2018-03-23 11:47:15,884 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-23 11:47:15,884 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 156 transitions. [2018-03-23 11:47:15,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-03-23 11:47:15,885 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:15,885 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:15,885 INFO L408 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:15,885 INFO L82 PathProgramCache]: Analyzing trace with hash 869092047, now seen corresponding path program 1 times [2018-03-23 11:47:15,885 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:15,886 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:15,886 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:15,886 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:15,886 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:15,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:15,898 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:15,932 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:15,933 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:15,933 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:47:15,933 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-23 11:47:15,933 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-23 11:47:15,933 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:47:15,933 INFO L87 Difference]: Start difference. First operand 148 states and 156 transitions. Second operand 4 states. [2018-03-23 11:47:16,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:16,011 INFO L93 Difference]: Finished difference Result 148 states and 156 transitions. [2018-03-23 11:47:16,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-03-23 11:47:16,011 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-03-23 11:47:16,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:16,012 INFO L225 Difference]: With dead ends: 148 [2018-03-23 11:47:16,012 INFO L226 Difference]: Without dead ends: 147 [2018-03-23 11:47:16,012 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:47:16,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-03-23 11:47:16,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 147. [2018-03-23 11:47:16,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-03-23 11:47:16,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 155 transitions. [2018-03-23 11:47:16,020 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 155 transitions. Word has length 16 [2018-03-23 11:47:16,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:16,020 INFO L459 AbstractCegarLoop]: Abstraction has 147 states and 155 transitions. [2018-03-23 11:47:16,020 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-23 11:47:16,020 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 155 transitions. [2018-03-23 11:47:16,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-03-23 11:47:16,021 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:16,021 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:16,021 INFO L408 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:16,021 INFO L82 PathProgramCache]: Analyzing trace with hash 492332787, now seen corresponding path program 1 times [2018-03-23 11:47:16,021 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:16,021 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:16,022 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:16,022 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:16,022 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:16,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:16,034 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:16,062 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:16,063 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:16,063 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-03-23 11:47:16,063 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-03-23 11:47:16,064 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-03-23 11:47:16,064 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:47:16,064 INFO L87 Difference]: Start difference. First operand 147 states and 155 transitions. Second operand 5 states. [2018-03-23 11:47:16,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:16,228 INFO L93 Difference]: Finished difference Result 165 states and 174 transitions. [2018-03-23 11:47:16,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-03-23 11:47:16,228 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-03-23 11:47:16,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:16,230 INFO L225 Difference]: With dead ends: 165 [2018-03-23 11:47:16,230 INFO L226 Difference]: Without dead ends: 164 [2018-03-23 11:47:16,230 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-03-23 11:47:16,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-03-23 11:47:16,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 150. [2018-03-23 11:47:16,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-03-23 11:47:16,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 159 transitions. [2018-03-23 11:47:16,239 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 159 transitions. Word has length 25 [2018-03-23 11:47:16,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:16,240 INFO L459 AbstractCegarLoop]: Abstraction has 150 states and 159 transitions. [2018-03-23 11:47:16,240 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-03-23 11:47:16,240 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 159 transitions. [2018-03-23 11:47:16,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-03-23 11:47:16,241 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:16,241 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:16,242 INFO L408 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:16,242 INFO L82 PathProgramCache]: Analyzing trace with hash 492332788, now seen corresponding path program 1 times [2018-03-23 11:47:16,242 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:16,242 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:16,243 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:16,243 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:16,243 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:16,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:16,264 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:16,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:16,326 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:16,326 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-03-23 11:47:16,327 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-03-23 11:47:16,327 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-03-23 11:47:16,327 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:47:16,327 INFO L87 Difference]: Start difference. First operand 150 states and 159 transitions. Second operand 5 states. [2018-03-23 11:47:16,499 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:16,500 INFO L93 Difference]: Finished difference Result 157 states and 166 transitions. [2018-03-23 11:47:16,500 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-03-23 11:47:16,500 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-03-23 11:47:16,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:16,501 INFO L225 Difference]: With dead ends: 157 [2018-03-23 11:47:16,501 INFO L226 Difference]: Without dead ends: 156 [2018-03-23 11:47:16,501 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-03-23 11:47:16,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-03-23 11:47:16,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 150. [2018-03-23 11:47:16,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-03-23 11:47:16,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 158 transitions. [2018-03-23 11:47:16,507 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 158 transitions. Word has length 25 [2018-03-23 11:47:16,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:16,507 INFO L459 AbstractCegarLoop]: Abstraction has 150 states and 158 transitions. [2018-03-23 11:47:16,508 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-03-23 11:47:16,508 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 158 transitions. [2018-03-23 11:47:16,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-03-23 11:47:16,508 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:16,508 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:16,508 INFO L408 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:16,508 INFO L82 PathProgramCache]: Analyzing trace with hash 685406229, now seen corresponding path program 1 times [2018-03-23 11:47:16,509 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:16,509 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:16,509 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:16,509 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:16,509 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:16,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:16,523 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:16,611 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:16,612 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:16,612 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-03-23 11:47:16,612 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-03-23 11:47:16,612 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-03-23 11:47:16,612 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:47:16,613 INFO L87 Difference]: Start difference. First operand 150 states and 158 transitions. Second operand 7 states. [2018-03-23 11:47:16,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:16,835 INFO L93 Difference]: Finished difference Result 154 states and 162 transitions. [2018-03-23 11:47:16,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-03-23 11:47:16,836 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-03-23 11:47:16,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:16,837 INFO L225 Difference]: With dead ends: 154 [2018-03-23 11:47:16,838 INFO L226 Difference]: Without dead ends: 153 [2018-03-23 11:47:16,838 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2018-03-23 11:47:16,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-03-23 11:47:16,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 152. [2018-03-23 11:47:16,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-03-23 11:47:16,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 161 transitions. [2018-03-23 11:47:16,847 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 161 transitions. Word has length 27 [2018-03-23 11:47:16,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:16,847 INFO L459 AbstractCegarLoop]: Abstraction has 152 states and 161 transitions. [2018-03-23 11:47:16,847 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-03-23 11:47:16,848 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 161 transitions. [2018-03-23 11:47:16,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-03-23 11:47:16,848 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:16,849 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:16,849 INFO L408 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:16,849 INFO L82 PathProgramCache]: Analyzing trace with hash 685406228, now seen corresponding path program 1 times [2018-03-23 11:47:16,849 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:16,849 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:16,850 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:16,850 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:16,850 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:16,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:16,864 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:16,899 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:16,900 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:16,900 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:47:16,900 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-23 11:47:16,900 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-23 11:47:16,900 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:47:16,900 INFO L87 Difference]: Start difference. First operand 152 states and 161 transitions. Second operand 4 states. [2018-03-23 11:47:17,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:17,085 INFO L93 Difference]: Finished difference Result 160 states and 168 transitions. [2018-03-23 11:47:17,085 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-03-23 11:47:17,085 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-03-23 11:47:17,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:17,086 INFO L225 Difference]: With dead ends: 160 [2018-03-23 11:47:17,087 INFO L226 Difference]: Without dead ends: 159 [2018-03-23 11:47:17,087 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:47:17,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-03-23 11:47:17,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 152. [2018-03-23 11:47:17,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-03-23 11:47:17,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 160 transitions. [2018-03-23 11:47:17,095 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 160 transitions. Word has length 27 [2018-03-23 11:47:17,095 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:17,095 INFO L459 AbstractCegarLoop]: Abstraction has 152 states and 160 transitions. [2018-03-23 11:47:17,095 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-23 11:47:17,096 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 160 transitions. [2018-03-23 11:47:17,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-03-23 11:47:17,096 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:17,097 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:17,097 INFO L408 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:17,097 INFO L82 PathProgramCache]: Analyzing trace with hash 24532193, now seen corresponding path program 1 times [2018-03-23 11:47:17,097 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:17,097 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:17,098 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:17,098 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:17,098 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:17,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:17,109 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:17,145 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:17,146 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:17,146 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:47:17,146 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-23 11:47:17,146 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-23 11:47:17,146 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:47:17,147 INFO L87 Difference]: Start difference. First operand 152 states and 160 transitions. Second operand 4 states. [2018-03-23 11:47:17,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:17,268 INFO L93 Difference]: Finished difference Result 152 states and 160 transitions. [2018-03-23 11:47:17,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-03-23 11:47:17,268 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-03-23 11:47:17,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:17,269 INFO L225 Difference]: With dead ends: 152 [2018-03-23 11:47:17,269 INFO L226 Difference]: Without dead ends: 148 [2018-03-23 11:47:17,270 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:47:17,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-03-23 11:47:17,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 148. [2018-03-23 11:47:17,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-03-23 11:47:17,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 156 transitions. [2018-03-23 11:47:17,275 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 156 transitions. Word has length 27 [2018-03-23 11:47:17,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:17,275 INFO L459 AbstractCegarLoop]: Abstraction has 148 states and 156 transitions. [2018-03-23 11:47:17,275 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-23 11:47:17,276 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 156 transitions. [2018-03-23 11:47:17,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-03-23 11:47:17,276 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:17,276 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:17,277 INFO L408 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:17,277 INFO L82 PathProgramCache]: Analyzing trace with hash 24532194, now seen corresponding path program 1 times [2018-03-23 11:47:17,277 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:17,277 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:17,278 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:17,278 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:17,278 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:17,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:17,289 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:17,361 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:17,361 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:17,362 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:47:17,362 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-23 11:47:17,362 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-23 11:47:17,362 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:47:17,362 INFO L87 Difference]: Start difference. First operand 148 states and 156 transitions. Second operand 4 states. [2018-03-23 11:47:17,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:17,634 INFO L93 Difference]: Finished difference Result 155 states and 163 transitions. [2018-03-23 11:47:17,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-03-23 11:47:17,635 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-03-23 11:47:17,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:17,636 INFO L225 Difference]: With dead ends: 155 [2018-03-23 11:47:17,636 INFO L226 Difference]: Without dead ends: 153 [2018-03-23 11:47:17,636 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:47:17,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-03-23 11:47:17,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 149. [2018-03-23 11:47:17,643 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-03-23 11:47:17,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 157 transitions. [2018-03-23 11:47:17,644 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 157 transitions. Word has length 27 [2018-03-23 11:47:17,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:17,644 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 157 transitions. [2018-03-23 11:47:17,644 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-23 11:47:17,644 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 157 transitions. [2018-03-23 11:47:17,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-03-23 11:47:17,645 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:17,645 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:17,645 INFO L408 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:17,646 INFO L82 PathProgramCache]: Analyzing trace with hash 759451479, now seen corresponding path program 1 times [2018-03-23 11:47:17,646 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:17,646 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:17,647 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:17,647 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:17,647 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:17,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:17,661 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:17,746 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:17,746 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:17,747 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-03-23 11:47:17,747 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-03-23 11:47:17,747 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-03-23 11:47:17,747 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:47:17,747 INFO L87 Difference]: Start difference. First operand 149 states and 157 transitions. Second operand 5 states. [2018-03-23 11:47:17,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:17,926 INFO L93 Difference]: Finished difference Result 149 states and 157 transitions. [2018-03-23 11:47:17,926 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-03-23 11:47:17,926 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2018-03-23 11:47:17,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:17,928 INFO L225 Difference]: With dead ends: 149 [2018-03-23 11:47:17,928 INFO L226 Difference]: Without dead ends: 146 [2018-03-23 11:47:17,928 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-03-23 11:47:17,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-03-23 11:47:17,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 144. [2018-03-23 11:47:17,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-03-23 11:47:17,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 152 transitions. [2018-03-23 11:47:17,938 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 152 transitions. Word has length 28 [2018-03-23 11:47:17,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:17,939 INFO L459 AbstractCegarLoop]: Abstraction has 144 states and 152 transitions. [2018-03-23 11:47:17,939 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-03-23 11:47:17,939 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 152 transitions. [2018-03-23 11:47:17,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-03-23 11:47:17,942 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:17,942 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:17,942 INFO L408 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:17,942 INFO L82 PathProgramCache]: Analyzing trace with hash -879499811, now seen corresponding path program 1 times [2018-03-23 11:47:17,943 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:17,943 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:17,943 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:17,943 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:17,944 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:17,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:17,955 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:17,996 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:17,997 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:17,997 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-03-23 11:47:17,997 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-03-23 11:47:17,998 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-03-23 11:47:17,998 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:47:17,998 INFO L87 Difference]: Start difference. First operand 144 states and 152 transitions. Second operand 5 states. [2018-03-23 11:47:18,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:18,220 INFO L93 Difference]: Finished difference Result 144 states and 152 transitions. [2018-03-23 11:47:18,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-03-23 11:47:18,220 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2018-03-23 11:47:18,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:18,221 INFO L225 Difference]: With dead ends: 144 [2018-03-23 11:47:18,222 INFO L226 Difference]: Without dead ends: 142 [2018-03-23 11:47:18,222 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-03-23 11:47:18,222 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-03-23 11:47:18,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 140. [2018-03-23 11:47:18,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-03-23 11:47:18,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 147 transitions. [2018-03-23 11:47:18,230 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 147 transitions. Word has length 34 [2018-03-23 11:47:18,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:18,230 INFO L459 AbstractCegarLoop]: Abstraction has 140 states and 147 transitions. [2018-03-23 11:47:18,230 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-03-23 11:47:18,230 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 147 transitions. [2018-03-23 11:47:18,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-03-23 11:47:18,231 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:18,231 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:18,231 INFO L408 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:18,232 INFO L82 PathProgramCache]: Analyzing trace with hash -879499810, now seen corresponding path program 1 times [2018-03-23 11:47:18,232 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:18,232 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:18,233 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:18,233 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:18,233 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:18,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:18,246 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:18,386 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:18,386 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:18,386 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-03-23 11:47:18,386 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-03-23 11:47:18,387 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-03-23 11:47:18,387 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-03-23 11:47:18,387 INFO L87 Difference]: Start difference. First operand 140 states and 147 transitions. Second operand 6 states. [2018-03-23 11:47:18,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:18,673 INFO L93 Difference]: Finished difference Result 154 states and 163 transitions. [2018-03-23 11:47:18,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-03-23 11:47:18,673 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2018-03-23 11:47:18,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:18,675 INFO L225 Difference]: With dead ends: 154 [2018-03-23 11:47:18,675 INFO L226 Difference]: Without dead ends: 149 [2018-03-23 11:47:18,676 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:47:18,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-03-23 11:47:18,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 141. [2018-03-23 11:47:18,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-03-23 11:47:18,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 149 transitions. [2018-03-23 11:47:18,685 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 149 transitions. Word has length 34 [2018-03-23 11:47:18,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:18,685 INFO L459 AbstractCegarLoop]: Abstraction has 141 states and 149 transitions. [2018-03-23 11:47:18,685 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-03-23 11:47:18,685 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 149 transitions. [2018-03-23 11:47:18,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-03-23 11:47:18,686 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:18,686 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:18,687 INFO L408 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:18,687 INFO L82 PathProgramCache]: Analyzing trace with hash -1587044576, now seen corresponding path program 1 times [2018-03-23 11:47:18,687 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:18,687 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:18,688 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:18,688 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:18,688 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:18,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:18,699 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:18,786 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:18,786 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:18,786 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-03-23 11:47:18,787 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-03-23 11:47:18,787 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-03-23 11:47:18,787 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:47:18,787 INFO L87 Difference]: Start difference. First operand 141 states and 149 transitions. Second operand 7 states. [2018-03-23 11:47:19,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:19,046 INFO L93 Difference]: Finished difference Result 159 states and 168 transitions. [2018-03-23 11:47:19,047 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-03-23 11:47:19,047 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2018-03-23 11:47:19,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:19,048 INFO L225 Difference]: With dead ends: 159 [2018-03-23 11:47:19,048 INFO L226 Difference]: Without dead ends: 158 [2018-03-23 11:47:19,049 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:47:19,049 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-03-23 11:47:19,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 148. [2018-03-23 11:47:19,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-03-23 11:47:19,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 157 transitions. [2018-03-23 11:47:19,059 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 157 transitions. Word has length 34 [2018-03-23 11:47:19,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:19,059 INFO L459 AbstractCegarLoop]: Abstraction has 148 states and 157 transitions. [2018-03-23 11:47:19,059 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-03-23 11:47:19,059 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 157 transitions. [2018-03-23 11:47:19,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-03-23 11:47:19,060 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:19,061 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:19,061 INFO L408 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:19,061 INFO L82 PathProgramCache]: Analyzing trace with hash -1587044575, now seen corresponding path program 1 times [2018-03-23 11:47:19,061 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:19,061 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:19,062 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:19,062 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:19,062 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:19,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:19,076 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:19,204 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:19,204 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:19,204 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-03-23 11:47:19,204 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-03-23 11:47:19,205 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-03-23 11:47:19,205 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:47:19,205 INFO L87 Difference]: Start difference. First operand 148 states and 157 transitions. Second operand 7 states. [2018-03-23 11:47:19,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:19,482 INFO L93 Difference]: Finished difference Result 157 states and 167 transitions. [2018-03-23 11:47:19,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-03-23 11:47:19,482 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2018-03-23 11:47:19,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:19,483 INFO L225 Difference]: With dead ends: 157 [2018-03-23 11:47:19,483 INFO L226 Difference]: Without dead ends: 156 [2018-03-23 11:47:19,483 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:47:19,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-03-23 11:47:19,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 148. [2018-03-23 11:47:19,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-03-23 11:47:19,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 156 transitions. [2018-03-23 11:47:19,491 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 156 transitions. Word has length 34 [2018-03-23 11:47:19,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:19,491 INFO L459 AbstractCegarLoop]: Abstraction has 148 states and 156 transitions. [2018-03-23 11:47:19,491 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-03-23 11:47:19,491 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 156 transitions. [2018-03-23 11:47:19,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-03-23 11:47:19,492 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:19,492 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:19,492 INFO L408 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:19,492 INFO L82 PathProgramCache]: Analyzing trace with hash 574528584, now seen corresponding path program 1 times [2018-03-23 11:47:19,492 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:19,492 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:19,493 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:19,493 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:19,493 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:19,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:19,502 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:19,535 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:19,535 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:19,535 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-03-23 11:47:19,536 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-03-23 11:47:19,536 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-03-23 11:47:19,536 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:47:19,536 INFO L87 Difference]: Start difference. First operand 148 states and 156 transitions. Second operand 5 states. [2018-03-23 11:47:19,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:19,643 INFO L93 Difference]: Finished difference Result 148 states and 156 transitions. [2018-03-23 11:47:19,644 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-03-23 11:47:19,644 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 35 [2018-03-23 11:47:19,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:19,645 INFO L225 Difference]: With dead ends: 148 [2018-03-23 11:47:19,645 INFO L226 Difference]: Without dead ends: 147 [2018-03-23 11:47:19,645 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:47:19,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-03-23 11:47:19,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 147. [2018-03-23 11:47:19,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-03-23 11:47:19,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 155 transitions. [2018-03-23 11:47:19,651 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 155 transitions. Word has length 35 [2018-03-23 11:47:19,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:19,651 INFO L459 AbstractCegarLoop]: Abstraction has 147 states and 155 transitions. [2018-03-23 11:47:19,651 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-03-23 11:47:19,652 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 155 transitions. [2018-03-23 11:47:19,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-03-23 11:47:19,652 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:19,652 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:19,652 INFO L408 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:19,652 INFO L82 PathProgramCache]: Analyzing trace with hash 574528585, now seen corresponding path program 1 times [2018-03-23 11:47:19,652 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:19,652 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:19,653 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:19,653 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:19,653 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:19,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:19,663 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:19,769 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:19,769 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:19,769 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-03-23 11:47:19,769 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-03-23 11:47:19,769 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-03-23 11:47:19,770 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-03-23 11:47:19,770 INFO L87 Difference]: Start difference. First operand 147 states and 155 transitions. Second operand 6 states. [2018-03-23 11:47:19,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:19,930 INFO L93 Difference]: Finished difference Result 288 states and 308 transitions. [2018-03-23 11:47:19,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-03-23 11:47:19,930 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-03-23 11:47:19,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:19,931 INFO L225 Difference]: With dead ends: 288 [2018-03-23 11:47:19,931 INFO L226 Difference]: Without dead ends: 156 [2018-03-23 11:47:19,932 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-03-23 11:47:19,933 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-03-23 11:47:19,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 152. [2018-03-23 11:47:19,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-03-23 11:47:19,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 160 transitions. [2018-03-23 11:47:19,940 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 160 transitions. Word has length 35 [2018-03-23 11:47:19,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:19,941 INFO L459 AbstractCegarLoop]: Abstraction has 152 states and 160 transitions. [2018-03-23 11:47:19,941 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-03-23 11:47:19,941 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 160 transitions. [2018-03-23 11:47:19,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-03-23 11:47:19,941 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:19,942 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:19,942 INFO L408 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:19,942 INFO L82 PathProgramCache]: Analyzing trace with hash -436446974, now seen corresponding path program 1 times [2018-03-23 11:47:19,942 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:19,942 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:19,943 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:19,943 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:19,943 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:19,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:19,954 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:20,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:20,233 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:20,273 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-03-23 11:47:20,273 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-03-23 11:47:20,273 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-03-23 11:47:20,273 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:47:20,274 INFO L87 Difference]: Start difference. First operand 152 states and 160 transitions. Second operand 10 states. [2018-03-23 11:47:20,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:20,719 INFO L93 Difference]: Finished difference Result 183 states and 193 transitions. [2018-03-23 11:47:20,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-03-23 11:47:20,720 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-03-23 11:47:20,720 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:20,721 INFO L225 Difference]: With dead ends: 183 [2018-03-23 11:47:20,721 INFO L226 Difference]: Without dead ends: 182 [2018-03-23 11:47:20,722 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=75, Invalid=231, Unknown=0, NotChecked=0, Total=306 [2018-03-23 11:47:20,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-03-23 11:47:20,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 166. [2018-03-23 11:47:20,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-03-23 11:47:20,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 181 transitions. [2018-03-23 11:47:20,734 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 181 transitions. Word has length 36 [2018-03-23 11:47:20,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:20,734 INFO L459 AbstractCegarLoop]: Abstraction has 166 states and 181 transitions. [2018-03-23 11:47:20,735 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-03-23 11:47:20,735 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 181 transitions. [2018-03-23 11:47:20,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-03-23 11:47:20,735 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:20,735 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:20,735 INFO L408 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:20,736 INFO L82 PathProgramCache]: Analyzing trace with hash -436446975, now seen corresponding path program 1 times [2018-03-23 11:47:20,736 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:20,736 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:20,737 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:20,737 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:20,737 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:20,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:20,748 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:20,856 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:20,856 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:20,856 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-03-23 11:47:20,857 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-03-23 11:47:20,857 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-03-23 11:47:20,857 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-03-23 11:47:20,857 INFO L87 Difference]: Start difference. First operand 166 states and 181 transitions. Second operand 8 states. [2018-03-23 11:47:21,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:21,246 INFO L93 Difference]: Finished difference Result 181 states and 196 transitions. [2018-03-23 11:47:21,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-03-23 11:47:21,246 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 36 [2018-03-23 11:47:21,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:21,248 INFO L225 Difference]: With dead ends: 181 [2018-03-23 11:47:21,248 INFO L226 Difference]: Without dead ends: 180 [2018-03-23 11:47:21,248 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-03-23 11:47:21,249 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-03-23 11:47:21,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 165. [2018-03-23 11:47:21,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-03-23 11:47:21,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 180 transitions. [2018-03-23 11:47:21,260 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 180 transitions. Word has length 36 [2018-03-23 11:47:21,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:21,261 INFO L459 AbstractCegarLoop]: Abstraction has 165 states and 180 transitions. [2018-03-23 11:47:21,261 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-03-23 11:47:21,261 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 180 transitions. [2018-03-23 11:47:21,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-03-23 11:47:21,262 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:21,262 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:21,262 INFO L408 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:21,262 INFO L82 PathProgramCache]: Analyzing trace with hash 851286021, now seen corresponding path program 1 times [2018-03-23 11:47:21,262 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:21,262 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:21,263 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:21,263 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:21,263 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:21,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:21,276 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:21,525 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:21,525 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:47:21,525 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:47:21,537 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:21,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:21,589 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:47:21,828 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:47:21,841 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-03-23 11:47:21,842 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:21,852 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:47:21,853 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:47:21,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-03-23 11:47:21,854 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:21,860 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:47:21,860 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:18 [2018-03-23 11:47:21,888 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:21,910 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:47:21,911 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 15 [2018-03-23 11:47:21,911 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-03-23 11:47:21,911 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-03-23 11:47:21,911 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2018-03-23 11:47:21,912 INFO L87 Difference]: Start difference. First operand 165 states and 180 transitions. Second operand 16 states. [2018-03-23 11:47:22,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:22,776 INFO L93 Difference]: Finished difference Result 183 states and 198 transitions. [2018-03-23 11:47:22,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-03-23 11:47:22,780 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 38 [2018-03-23 11:47:22,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:22,781 INFO L225 Difference]: With dead ends: 183 [2018-03-23 11:47:22,781 INFO L226 Difference]: Without dead ends: 180 [2018-03-23 11:47:22,782 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 30 SyntacticMatches, 5 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=85, Invalid=335, Unknown=0, NotChecked=0, Total=420 [2018-03-23 11:47:22,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-03-23 11:47:22,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 163. [2018-03-23 11:47:22,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-03-23 11:47:22,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 177 transitions. [2018-03-23 11:47:22,794 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 177 transitions. Word has length 38 [2018-03-23 11:47:22,794 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:22,794 INFO L459 AbstractCegarLoop]: Abstraction has 163 states and 177 transitions. [2018-03-23 11:47:22,794 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-03-23 11:47:22,794 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 177 transitions. [2018-03-23 11:47:22,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-03-23 11:47:22,795 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:22,795 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:22,795 INFO L408 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:22,795 INFO L82 PathProgramCache]: Analyzing trace with hash 1902140065, now seen corresponding path program 1 times [2018-03-23 11:47:22,795 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:22,796 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:22,796 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:22,796 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:22,797 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:22,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:22,808 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:22,890 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:22,890 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:22,890 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-03-23 11:47:22,891 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-03-23 11:47:22,891 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-03-23 11:47:22,891 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:47:22,891 INFO L87 Difference]: Start difference. First operand 163 states and 177 transitions. Second operand 7 states. [2018-03-23 11:47:23,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:23,120 INFO L93 Difference]: Finished difference Result 182 states and 199 transitions. [2018-03-23 11:47:23,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-03-23 11:47:23,121 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 38 [2018-03-23 11:47:23,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:23,122 INFO L225 Difference]: With dead ends: 182 [2018-03-23 11:47:23,122 INFO L226 Difference]: Without dead ends: 181 [2018-03-23 11:47:23,123 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:47:23,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-03-23 11:47:23,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 169. [2018-03-23 11:47:23,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-03-23 11:47:23,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 185 transitions. [2018-03-23 11:47:23,136 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 185 transitions. Word has length 38 [2018-03-23 11:47:23,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:23,136 INFO L459 AbstractCegarLoop]: Abstraction has 169 states and 185 transitions. [2018-03-23 11:47:23,136 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-03-23 11:47:23,136 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 185 transitions. [2018-03-23 11:47:23,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-03-23 11:47:23,137 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:23,137 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:23,137 INFO L408 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:23,137 INFO L82 PathProgramCache]: Analyzing trace with hash 1902140066, now seen corresponding path program 1 times [2018-03-23 11:47:23,137 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:23,137 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:23,138 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:23,138 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:23,138 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:23,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:23,148 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:23,278 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:23,279 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:23,279 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-03-23 11:47:23,279 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-03-23 11:47:23,279 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-03-23 11:47:23,279 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-03-23 11:47:23,280 INFO L87 Difference]: Start difference. First operand 169 states and 185 transitions. Second operand 9 states. [2018-03-23 11:47:23,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:23,962 INFO L93 Difference]: Finished difference Result 221 states and 243 transitions. [2018-03-23 11:47:23,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-03-23 11:47:23,963 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 38 [2018-03-23 11:47:23,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:23,964 INFO L225 Difference]: With dead ends: 221 [2018-03-23 11:47:23,964 INFO L226 Difference]: Without dead ends: 220 [2018-03-23 11:47:23,965 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-03-23 11:47:23,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-03-23 11:47:23,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 185. [2018-03-23 11:47:23,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-03-23 11:47:23,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 203 transitions. [2018-03-23 11:47:23,975 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 203 transitions. Word has length 38 [2018-03-23 11:47:23,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:23,975 INFO L459 AbstractCegarLoop]: Abstraction has 185 states and 203 transitions. [2018-03-23 11:47:23,975 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-03-23 11:47:23,976 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 203 transitions. [2018-03-23 11:47:23,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-03-23 11:47:23,976 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:23,976 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:23,976 INFO L408 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:23,976 INFO L82 PathProgramCache]: Analyzing trace with hash -1787107616, now seen corresponding path program 1 times [2018-03-23 11:47:23,976 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:23,976 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:23,977 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:23,977 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:23,977 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:23,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:23,986 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:24,205 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:24,206 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:24,206 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-03-23 11:47:24,206 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-03-23 11:47:24,206 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-03-23 11:47:24,206 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-03-23 11:47:24,207 INFO L87 Difference]: Start difference. First operand 185 states and 203 transitions. Second operand 8 states. [2018-03-23 11:47:24,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:24,374 INFO L93 Difference]: Finished difference Result 215 states and 233 transitions. [2018-03-23 11:47:24,375 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-03-23 11:47:24,375 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 40 [2018-03-23 11:47:24,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:24,376 INFO L225 Difference]: With dead ends: 215 [2018-03-23 11:47:24,376 INFO L226 Difference]: Without dead ends: 209 [2018-03-23 11:47:24,376 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-03-23 11:47:24,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2018-03-23 11:47:24,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 185. [2018-03-23 11:47:24,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-03-23 11:47:24,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 201 transitions. [2018-03-23 11:47:24,385 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 201 transitions. Word has length 40 [2018-03-23 11:47:24,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:24,385 INFO L459 AbstractCegarLoop]: Abstraction has 185 states and 201 transitions. [2018-03-23 11:47:24,385 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-03-23 11:47:24,385 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 201 transitions. [2018-03-23 11:47:24,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-03-23 11:47:24,385 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:24,385 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:24,386 INFO L408 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:24,386 INFO L82 PathProgramCache]: Analyzing trace with hash 359750984, now seen corresponding path program 1 times [2018-03-23 11:47:24,386 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:24,386 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:24,386 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:24,386 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:24,387 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:24,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:24,395 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:24,448 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:24,448 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:24,449 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-03-23 11:47:24,449 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-03-23 11:47:24,449 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-03-23 11:47:24,449 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:47:24,449 INFO L87 Difference]: Start difference. First operand 185 states and 201 transitions. Second operand 5 states. [2018-03-23 11:47:24,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:24,886 INFO L93 Difference]: Finished difference Result 185 states and 201 transitions. [2018-03-23 11:47:24,887 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-03-23 11:47:24,887 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2018-03-23 11:47:24,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:24,888 INFO L225 Difference]: With dead ends: 185 [2018-03-23 11:47:24,888 INFO L226 Difference]: Without dead ends: 184 [2018-03-23 11:47:24,888 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:47:24,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-03-23 11:47:24,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 184. [2018-03-23 11:47:24,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-03-23 11:47:24,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 200 transitions. [2018-03-23 11:47:24,896 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 200 transitions. Word has length 43 [2018-03-23 11:47:24,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:24,896 INFO L459 AbstractCegarLoop]: Abstraction has 184 states and 200 transitions. [2018-03-23 11:47:24,896 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-03-23 11:47:24,896 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 200 transitions. [2018-03-23 11:47:24,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-03-23 11:47:24,897 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:24,897 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:24,897 INFO L408 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:24,897 INFO L82 PathProgramCache]: Analyzing trace with hash 359750985, now seen corresponding path program 1 times [2018-03-23 11:47:24,897 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:24,897 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:24,898 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:24,898 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:24,898 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:24,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:24,907 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:25,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:25,332 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:25,362 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-03-23 11:47:25,362 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-03-23 11:47:25,363 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-03-23 11:47:25,363 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:47:25,363 INFO L87 Difference]: Start difference. First operand 184 states and 200 transitions. Second operand 10 states. [2018-03-23 11:47:25,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:25,777 INFO L93 Difference]: Finished difference Result 214 states and 234 transitions. [2018-03-23 11:47:25,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-03-23 11:47:25,777 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2018-03-23 11:47:25,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:25,779 INFO L225 Difference]: With dead ends: 214 [2018-03-23 11:47:25,779 INFO L226 Difference]: Without dead ends: 213 [2018-03-23 11:47:25,779 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=57, Invalid=215, Unknown=0, NotChecked=0, Total=272 [2018-03-23 11:47:25,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-03-23 11:47:25,790 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 189. [2018-03-23 11:47:25,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 189 states. [2018-03-23 11:47:25,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 189 states to 189 states and 205 transitions. [2018-03-23 11:47:25,791 INFO L78 Accepts]: Start accepts. Automaton has 189 states and 205 transitions. Word has length 43 [2018-03-23 11:47:25,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:25,792 INFO L459 AbstractCegarLoop]: Abstraction has 189 states and 205 transitions. [2018-03-23 11:47:25,792 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-03-23 11:47:25,792 INFO L276 IsEmpty]: Start isEmpty. Operand 189 states and 205 transitions. [2018-03-23 11:47:25,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-03-23 11:47:25,793 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:25,793 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:25,793 INFO L408 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:25,793 INFO L82 PathProgramCache]: Analyzing trace with hash -459585797, now seen corresponding path program 1 times [2018-03-23 11:47:25,793 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:25,793 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:25,794 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:25,794 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:25,794 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:25,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:25,807 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:26,034 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:26,034 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:47:26,034 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:47:26,046 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:26,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:26,081 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:47:26,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-03-23 11:47:26,086 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:26,099 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:26,099 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-03-23 11:47:26,123 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-03-23 11:47:26,126 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:47:26,126 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:26,129 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:26,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-03-23 11:47:26,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:47:26,149 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:26,151 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:26,160 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:26,188 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:35, output treesize:21 [2018-03-23 11:47:26,357 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-03-23 11:47:26,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-03-23 11:47:26,361 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:26,364 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:26,383 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 22 [2018-03-23 11:47:26,388 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 7 [2018-03-23 11:47:26,389 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:26,392 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:26,402 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:26,402 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:51, output treesize:15 [2018-03-23 11:47:26,423 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:26,445 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:47:26,445 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 9] total 14 [2018-03-23 11:47:26,445 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-03-23 11:47:26,446 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-03-23 11:47:26,446 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=164, Unknown=0, NotChecked=0, Total=210 [2018-03-23 11:47:26,446 INFO L87 Difference]: Start difference. First operand 189 states and 205 transitions. Second operand 15 states. [2018-03-23 11:47:26,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:26,730 INFO L93 Difference]: Finished difference Result 366 states and 400 transitions. [2018-03-23 11:47:26,730 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-03-23 11:47:26,730 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 45 [2018-03-23 11:47:26,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:26,731 INFO L225 Difference]: With dead ends: 366 [2018-03-23 11:47:26,732 INFO L226 Difference]: Without dead ends: 203 [2018-03-23 11:47:26,732 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 37 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=116, Invalid=346, Unknown=0, NotChecked=0, Total=462 [2018-03-23 11:47:26,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203 states. [2018-03-23 11:47:26,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203 to 199. [2018-03-23 11:47:26,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2018-03-23 11:47:26,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 215 transitions. [2018-03-23 11:47:26,745 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 215 transitions. Word has length 45 [2018-03-23 11:47:26,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:26,745 INFO L459 AbstractCegarLoop]: Abstraction has 199 states and 215 transitions. [2018-03-23 11:47:26,745 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-03-23 11:47:26,745 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 215 transitions. [2018-03-23 11:47:26,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-03-23 11:47:26,746 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:26,746 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:26,746 INFO L408 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:26,747 INFO L82 PathProgramCache]: Analyzing trace with hash 398406975, now seen corresponding path program 1 times [2018-03-23 11:47:26,747 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:26,747 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:26,748 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:26,748 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:26,748 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:26,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:26,763 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:27,121 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:27,122 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:27,122 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-03-23 11:47:27,122 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-03-23 11:47:27,122 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-03-23 11:47:27,122 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2018-03-23 11:47:27,122 INFO L87 Difference]: Start difference. First operand 199 states and 215 transitions. Second operand 17 states. [2018-03-23 11:47:27,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:27,907 INFO L93 Difference]: Finished difference Result 304 states and 327 transitions. [2018-03-23 11:47:27,907 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-03-23 11:47:27,907 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 47 [2018-03-23 11:47:27,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:27,908 INFO L225 Difference]: With dead ends: 304 [2018-03-23 11:47:27,908 INFO L226 Difference]: Without dead ends: 242 [2018-03-23 11:47:27,909 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=134, Invalid=988, Unknown=0, NotChecked=0, Total=1122 [2018-03-23 11:47:27,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-03-23 11:47:27,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 218. [2018-03-23 11:47:27,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 218 states. [2018-03-23 11:47:27,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 235 transitions. [2018-03-23 11:47:27,924 INFO L78 Accepts]: Start accepts. Automaton has 218 states and 235 transitions. Word has length 47 [2018-03-23 11:47:27,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:27,924 INFO L459 AbstractCegarLoop]: Abstraction has 218 states and 235 transitions. [2018-03-23 11:47:27,925 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-03-23 11:47:27,925 INFO L276 IsEmpty]: Start isEmpty. Operand 218 states and 235 transitions. [2018-03-23 11:47:27,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-03-23 11:47:27,925 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:27,926 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:27,926 INFO L408 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:27,926 INFO L82 PathProgramCache]: Analyzing trace with hash 1976079253, now seen corresponding path program 1 times [2018-03-23 11:47:27,926 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:27,926 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:27,927 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:27,927 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:27,927 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:27,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:27,943 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:28,133 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:28,134 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:28,134 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-03-23 11:47:28,134 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-03-23 11:47:28,134 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-03-23 11:47:28,134 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2018-03-23 11:47:28,134 INFO L87 Difference]: Start difference. First operand 218 states and 235 transitions. Second operand 13 states. [2018-03-23 11:47:28,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:28,773 INFO L93 Difference]: Finished difference Result 268 states and 290 transitions. [2018-03-23 11:47:28,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-03-23 11:47:28,774 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 47 [2018-03-23 11:47:28,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:28,775 INFO L225 Difference]: With dead ends: 268 [2018-03-23 11:47:28,775 INFO L226 Difference]: Without dead ends: 267 [2018-03-23 11:47:28,776 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 94 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=119, Invalid=481, Unknown=0, NotChecked=0, Total=600 [2018-03-23 11:47:28,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 267 states. [2018-03-23 11:47:28,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 267 to 231. [2018-03-23 11:47:28,786 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 231 states. [2018-03-23 11:47:28,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 231 states and 249 transitions. [2018-03-23 11:47:28,787 INFO L78 Accepts]: Start accepts. Automaton has 231 states and 249 transitions. Word has length 47 [2018-03-23 11:47:28,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:28,787 INFO L459 AbstractCegarLoop]: Abstraction has 231 states and 249 transitions. [2018-03-23 11:47:28,787 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-03-23 11:47:28,787 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 249 transitions. [2018-03-23 11:47:28,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-03-23 11:47:28,788 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:28,788 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:28,788 INFO L408 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:28,789 INFO L82 PathProgramCache]: Analyzing trace with hash -1016518569, now seen corresponding path program 1 times [2018-03-23 11:47:28,789 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:28,789 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:28,789 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:28,789 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:28,790 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:28,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:28,796 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:28,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:28,974 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:28,974 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-03-23 11:47:28,975 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-03-23 11:47:28,975 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-03-23 11:47:28,975 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-03-23 11:47:28,975 INFO L87 Difference]: Start difference. First operand 231 states and 249 transitions. Second operand 8 states. [2018-03-23 11:47:29,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:29,305 INFO L93 Difference]: Finished difference Result 254 states and 273 transitions. [2018-03-23 11:47:29,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-03-23 11:47:29,306 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 52 [2018-03-23 11:47:29,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:29,308 INFO L225 Difference]: With dead ends: 254 [2018-03-23 11:47:29,308 INFO L226 Difference]: Without dead ends: 253 [2018-03-23 11:47:29,309 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-03-23 11:47:29,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 253 states. [2018-03-23 11:47:29,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 253 to 244. [2018-03-23 11:47:29,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 244 states. [2018-03-23 11:47:29,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 266 transitions. [2018-03-23 11:47:29,323 INFO L78 Accepts]: Start accepts. Automaton has 244 states and 266 transitions. Word has length 52 [2018-03-23 11:47:29,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:29,323 INFO L459 AbstractCegarLoop]: Abstraction has 244 states and 266 transitions. [2018-03-23 11:47:29,323 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-03-23 11:47:29,323 INFO L276 IsEmpty]: Start isEmpty. Operand 244 states and 266 transitions. [2018-03-23 11:47:29,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-03-23 11:47:29,324 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:29,324 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:29,324 INFO L408 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:29,325 INFO L82 PathProgramCache]: Analyzing trace with hash -1447304420, now seen corresponding path program 1 times [2018-03-23 11:47:29,325 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:29,325 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:29,325 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:29,325 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:29,326 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:29,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:29,333 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:29,407 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:29,407 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:29,407 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-03-23 11:47:29,407 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-03-23 11:47:29,407 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-03-23 11:47:29,407 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-03-23 11:47:29,408 INFO L87 Difference]: Start difference. First operand 244 states and 266 transitions. Second operand 6 states. [2018-03-23 11:47:29,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:29,817 INFO L93 Difference]: Finished difference Result 255 states and 277 transitions. [2018-03-23 11:47:29,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-03-23 11:47:29,821 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2018-03-23 11:47:29,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:29,822 INFO L225 Difference]: With dead ends: 255 [2018-03-23 11:47:29,823 INFO L226 Difference]: Without dead ends: 254 [2018-03-23 11:47:29,823 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-03-23 11:47:29,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254 states. [2018-03-23 11:47:29,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254 to 247. [2018-03-23 11:47:29,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247 states. [2018-03-23 11:47:29,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 270 transitions. [2018-03-23 11:47:29,835 INFO L78 Accepts]: Start accepts. Automaton has 247 states and 270 transitions. Word has length 53 [2018-03-23 11:47:29,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:29,836 INFO L459 AbstractCegarLoop]: Abstraction has 247 states and 270 transitions. [2018-03-23 11:47:29,836 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-03-23 11:47:29,836 INFO L276 IsEmpty]: Start isEmpty. Operand 247 states and 270 transitions. [2018-03-23 11:47:29,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-03-23 11:47:29,837 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:29,837 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:29,837 INFO L408 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:29,837 INFO L82 PathProgramCache]: Analyzing trace with hash -1072315338, now seen corresponding path program 1 times [2018-03-23 11:47:29,837 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:29,837 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:29,838 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:29,838 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:29,838 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:29,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:29,847 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:30,018 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:30,018 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:30,018 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-03-23 11:47:30,018 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-03-23 11:47:30,019 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-03-23 11:47:30,019 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:47:30,019 INFO L87 Difference]: Start difference. First operand 247 states and 270 transitions. Second operand 10 states. [2018-03-23 11:47:30,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:30,189 INFO L93 Difference]: Finished difference Result 257 states and 277 transitions. [2018-03-23 11:47:30,190 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-03-23 11:47:30,190 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 52 [2018-03-23 11:47:30,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:30,191 INFO L225 Difference]: With dead ends: 257 [2018-03-23 11:47:30,191 INFO L226 Difference]: Without dead ends: 256 [2018-03-23 11:47:30,191 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2018-03-23 11:47:30,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 256 states. [2018-03-23 11:47:30,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 256 to 231. [2018-03-23 11:47:30,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 231 states. [2018-03-23 11:47:30,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 231 states to 231 states and 252 transitions. [2018-03-23 11:47:30,202 INFO L78 Accepts]: Start accepts. Automaton has 231 states and 252 transitions. Word has length 52 [2018-03-23 11:47:30,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:30,202 INFO L459 AbstractCegarLoop]: Abstraction has 231 states and 252 transitions. [2018-03-23 11:47:30,202 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-03-23 11:47:30,202 INFO L276 IsEmpty]: Start isEmpty. Operand 231 states and 252 transitions. [2018-03-23 11:47:30,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-03-23 11:47:30,203 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:30,203 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:30,203 INFO L408 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:30,203 INFO L82 PathProgramCache]: Analyzing trace with hash 530855323, now seen corresponding path program 1 times [2018-03-23 11:47:30,203 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:30,203 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:30,204 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:30,204 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:30,204 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:30,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:30,212 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:30,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:30,579 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:30,579 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-03-23 11:47:30,580 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-03-23 11:47:30,580 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-03-23 11:47:30,580 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:47:30,580 INFO L87 Difference]: Start difference. First operand 231 states and 252 transitions. Second operand 10 states. [2018-03-23 11:47:31,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:31,306 INFO L93 Difference]: Finished difference Result 280 states and 307 transitions. [2018-03-23 11:47:31,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-03-23 11:47:31,307 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 56 [2018-03-23 11:47:31,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:31,308 INFO L225 Difference]: With dead ends: 280 [2018-03-23 11:47:31,308 INFO L226 Difference]: Without dead ends: 279 [2018-03-23 11:47:31,309 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2018-03-23 11:47:31,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279 states. [2018-03-23 11:47:31,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279 to 268. [2018-03-23 11:47:31,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 268 states. [2018-03-23 11:47:31,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 268 states to 268 states and 296 transitions. [2018-03-23 11:47:31,326 INFO L78 Accepts]: Start accepts. Automaton has 268 states and 296 transitions. Word has length 56 [2018-03-23 11:47:31,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:31,326 INFO L459 AbstractCegarLoop]: Abstraction has 268 states and 296 transitions. [2018-03-23 11:47:31,327 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-03-23 11:47:31,327 INFO L276 IsEmpty]: Start isEmpty. Operand 268 states and 296 transitions. [2018-03-23 11:47:31,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-03-23 11:47:31,328 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:31,328 INFO L353 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:31,328 INFO L408 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:31,328 INFO L82 PathProgramCache]: Analyzing trace with hash -911230163, now seen corresponding path program 2 times [2018-03-23 11:47:31,328 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:31,328 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:31,329 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:31,329 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:31,329 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:31,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:31,342 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:31,681 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:31,681 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:47:31,681 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:47:31,689 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-03-23 11:47:31,723 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-03-23 11:47:31,723 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-03-23 11:47:31,727 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:47:31,732 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-03-23 11:47:31,732 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:31,736 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:31,736 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-03-23 11:47:31,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-03-23 11:47:31,756 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:47:31,757 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:31,758 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:31,766 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-03-23 11:47:31,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:47:31,768 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:31,780 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:31,800 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:31,801 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:35, output treesize:21 [2018-03-23 11:47:31,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-03-23 11:47:31,908 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-03-23 11:47:31,908 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:31,910 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:31,917 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 22 [2018-03-23 11:47:31,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 7 [2018-03-23 11:47:31,919 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:31,921 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:31,925 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:31,925 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:51, output treesize:15 [2018-03-23 11:47:31,946 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:31,968 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:47:31,968 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 18 [2018-03-23 11:47:31,968 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-03-23 11:47:31,968 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-03-23 11:47:31,968 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=282, Unknown=0, NotChecked=0, Total=342 [2018-03-23 11:47:31,969 INFO L87 Difference]: Start difference. First operand 268 states and 296 transitions. Second operand 19 states. [2018-03-23 11:47:32,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:32,329 INFO L93 Difference]: Finished difference Result 494 states and 550 transitions. [2018-03-23 11:47:32,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-03-23 11:47:32,329 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 55 [2018-03-23 11:47:32,330 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:32,331 INFO L225 Difference]: With dead ends: 494 [2018-03-23 11:47:32,331 INFO L226 Difference]: Without dead ends: 282 [2018-03-23 11:47:32,332 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 45 SyntacticMatches, 3 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 160 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=163, Invalid=649, Unknown=0, NotChecked=0, Total=812 [2018-03-23 11:47:32,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282 states. [2018-03-23 11:47:32,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282 to 278. [2018-03-23 11:47:32,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 278 states. [2018-03-23 11:47:32,348 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 278 states to 278 states and 306 transitions. [2018-03-23 11:47:32,348 INFO L78 Accepts]: Start accepts. Automaton has 278 states and 306 transitions. Word has length 55 [2018-03-23 11:47:32,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:32,349 INFO L459 AbstractCegarLoop]: Abstraction has 278 states and 306 transitions. [2018-03-23 11:47:32,349 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-03-23 11:47:32,349 INFO L276 IsEmpty]: Start isEmpty. Operand 278 states and 306 transitions. [2018-03-23 11:47:32,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-03-23 11:47:32,350 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:32,350 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:32,350 INFO L408 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:32,350 INFO L82 PathProgramCache]: Analyzing trace with hash 2060213676, now seen corresponding path program 1 times [2018-03-23 11:47:32,350 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:32,350 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:32,351 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:32,351 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-03-23 11:47:32,351 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:32,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:32,365 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:32,641 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:32,642 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:32,642 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-03-23 11:47:32,642 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-03-23 11:47:32,642 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-03-23 11:47:32,642 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2018-03-23 11:47:32,642 INFO L87 Difference]: Start difference. First operand 278 states and 306 transitions. Second operand 18 states. [2018-03-23 11:47:33,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:33,373 INFO L93 Difference]: Finished difference Result 321 states and 354 transitions. [2018-03-23 11:47:33,373 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-03-23 11:47:33,373 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 56 [2018-03-23 11:47:33,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:33,374 INFO L225 Difference]: With dead ends: 321 [2018-03-23 11:47:33,374 INFO L226 Difference]: Without dead ends: 318 [2018-03-23 11:47:33,375 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=136, Invalid=1054, Unknown=0, NotChecked=0, Total=1190 [2018-03-23 11:47:33,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 318 states. [2018-03-23 11:47:33,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 318 to 284. [2018-03-23 11:47:33,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 284 states. [2018-03-23 11:47:33,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 284 states to 284 states and 314 transitions. [2018-03-23 11:47:33,390 INFO L78 Accepts]: Start accepts. Automaton has 284 states and 314 transitions. Word has length 56 [2018-03-23 11:47:33,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:33,390 INFO L459 AbstractCegarLoop]: Abstraction has 284 states and 314 transitions. [2018-03-23 11:47:33,390 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-03-23 11:47:33,390 INFO L276 IsEmpty]: Start isEmpty. Operand 284 states and 314 transitions. [2018-03-23 11:47:33,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-03-23 11:47:33,391 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:33,391 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:33,392 INFO L408 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:33,392 INFO L82 PathProgramCache]: Analyzing trace with hash 2060213677, now seen corresponding path program 1 times [2018-03-23 11:47:33,392 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:33,392 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:33,393 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:33,393 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:33,393 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:33,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:33,407 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:33,846 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:33,846 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:33,846 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-03-23 11:47:33,846 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-03-23 11:47:33,846 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-03-23 11:47:33,846 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=303, Unknown=0, NotChecked=0, Total=342 [2018-03-23 11:47:33,847 INFO L87 Difference]: Start difference. First operand 284 states and 314 transitions. Second operand 19 states. [2018-03-23 11:47:34,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:34,777 INFO L93 Difference]: Finished difference Result 345 states and 379 transitions. [2018-03-23 11:47:34,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-03-23 11:47:34,777 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 56 [2018-03-23 11:47:34,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:34,779 INFO L225 Difference]: With dead ends: 345 [2018-03-23 11:47:34,779 INFO L226 Difference]: Without dead ends: 342 [2018-03-23 11:47:34,780 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 269 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=157, Invalid=1325, Unknown=0, NotChecked=0, Total=1482 [2018-03-23 11:47:34,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 342 states. [2018-03-23 11:47:34,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 342 to 310. [2018-03-23 11:47:34,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 310 states. [2018-03-23 11:47:34,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 310 states to 310 states and 345 transitions. [2018-03-23 11:47:34,798 INFO L78 Accepts]: Start accepts. Automaton has 310 states and 345 transitions. Word has length 56 [2018-03-23 11:47:34,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:34,798 INFO L459 AbstractCegarLoop]: Abstraction has 310 states and 345 transitions. [2018-03-23 11:47:34,798 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-03-23 11:47:34,798 INFO L276 IsEmpty]: Start isEmpty. Operand 310 states and 345 transitions. [2018-03-23 11:47:34,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-03-23 11:47:34,799 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:34,800 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:34,800 INFO L408 AbstractCegarLoop]: === Iteration 38 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:34,800 INFO L82 PathProgramCache]: Analyzing trace with hash -283538889, now seen corresponding path program 1 times [2018-03-23 11:47:34,800 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:34,800 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:34,801 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:34,801 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:34,801 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:34,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:34,814 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:34,950 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-03-23 11:47:34,951 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:34,951 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-03-23 11:47:34,951 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-03-23 11:47:34,951 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-03-23 11:47:34,951 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:47:34,951 INFO L87 Difference]: Start difference. First operand 310 states and 345 transitions. Second operand 10 states. [2018-03-23 11:47:35,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:35,269 INFO L93 Difference]: Finished difference Result 316 states and 349 transitions. [2018-03-23 11:47:35,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-03-23 11:47:35,270 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 59 [2018-03-23 11:47:35,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:35,271 INFO L225 Difference]: With dead ends: 316 [2018-03-23 11:47:35,271 INFO L226 Difference]: Without dead ends: 315 [2018-03-23 11:47:35,271 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=233, Unknown=0, NotChecked=0, Total=306 [2018-03-23 11:47:35,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2018-03-23 11:47:35,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 307. [2018-03-23 11:47:35,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 307 states. [2018-03-23 11:47:35,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 307 states to 307 states and 341 transitions. [2018-03-23 11:47:35,284 INFO L78 Accepts]: Start accepts. Automaton has 307 states and 341 transitions. Word has length 59 [2018-03-23 11:47:35,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:35,285 INFO L459 AbstractCegarLoop]: Abstraction has 307 states and 341 transitions. [2018-03-23 11:47:35,285 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-03-23 11:47:35,285 INFO L276 IsEmpty]: Start isEmpty. Operand 307 states and 341 transitions. [2018-03-23 11:47:35,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-03-23 11:47:35,286 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:35,286 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:35,286 INFO L408 AbstractCegarLoop]: === Iteration 39 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:35,286 INFO L82 PathProgramCache]: Analyzing trace with hash 1556367023, now seen corresponding path program 1 times [2018-03-23 11:47:35,286 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:35,287 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:35,287 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:35,287 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:35,287 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:35,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:35,298 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:35,361 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:35,361 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:35,361 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-03-23 11:47:35,362 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-03-23 11:47:35,362 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-03-23 11:47:35,362 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:47:35,362 INFO L87 Difference]: Start difference. First operand 307 states and 341 transitions. Second operand 5 states. [2018-03-23 11:47:35,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:35,481 INFO L93 Difference]: Finished difference Result 314 states and 349 transitions. [2018-03-23 11:47:35,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-03-23 11:47:35,482 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 60 [2018-03-23 11:47:35,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:35,483 INFO L225 Difference]: With dead ends: 314 [2018-03-23 11:47:35,483 INFO L226 Difference]: Without dead ends: 313 [2018-03-23 11:47:35,483 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:47:35,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 313 states. [2018-03-23 11:47:35,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 313 to 306. [2018-03-23 11:47:35,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 306 states. [2018-03-23 11:47:35,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 306 states to 306 states and 339 transitions. [2018-03-23 11:47:35,495 INFO L78 Accepts]: Start accepts. Automaton has 306 states and 339 transitions. Word has length 60 [2018-03-23 11:47:35,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:35,495 INFO L459 AbstractCegarLoop]: Abstraction has 306 states and 339 transitions. [2018-03-23 11:47:35,495 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-03-23 11:47:35,496 INFO L276 IsEmpty]: Start isEmpty. Operand 306 states and 339 transitions. [2018-03-23 11:47:35,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-03-23 11:47:35,496 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:35,496 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:35,496 INFO L408 AbstractCegarLoop]: === Iteration 40 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:35,497 INFO L82 PathProgramCache]: Analyzing trace with hash 1002737505, now seen corresponding path program 1 times [2018-03-23 11:47:35,497 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:35,497 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:35,497 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:35,498 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:35,498 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:35,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:35,505 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:35,554 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:35,555 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:35,555 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-03-23 11:47:35,555 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-03-23 11:47:35,555 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-03-23 11:47:35,555 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:47:35,555 INFO L87 Difference]: Start difference. First operand 306 states and 339 transitions. Second operand 5 states. [2018-03-23 11:47:35,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:35,768 INFO L93 Difference]: Finished difference Result 313 states and 347 transitions. [2018-03-23 11:47:35,768 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-03-23 11:47:35,768 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 61 [2018-03-23 11:47:35,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:35,769 INFO L225 Difference]: With dead ends: 313 [2018-03-23 11:47:35,769 INFO L226 Difference]: Without dead ends: 312 [2018-03-23 11:47:35,770 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:47:35,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states. [2018-03-23 11:47:35,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 305. [2018-03-23 11:47:35,778 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 305 states. [2018-03-23 11:47:35,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 305 states to 305 states and 337 transitions. [2018-03-23 11:47:35,779 INFO L78 Accepts]: Start accepts. Automaton has 305 states and 337 transitions. Word has length 61 [2018-03-23 11:47:35,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:35,780 INFO L459 AbstractCegarLoop]: Abstraction has 305 states and 337 transitions. [2018-03-23 11:47:35,780 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-03-23 11:47:35,780 INFO L276 IsEmpty]: Start isEmpty. Operand 305 states and 337 transitions. [2018-03-23 11:47:35,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-03-23 11:47:35,781 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:35,781 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:35,781 INFO L408 AbstractCegarLoop]: === Iteration 41 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:35,781 INFO L82 PathProgramCache]: Analyzing trace with hash -530774527, now seen corresponding path program 1 times [2018-03-23 11:47:35,781 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:35,781 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:35,782 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:35,782 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:35,782 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:35,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:35,791 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:36,250 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:36,250 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:47:36,250 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:47:36,258 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:36,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:36,286 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:47:36,306 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:47:36,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:47:36,308 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,310 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,318 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:47:36,320 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:47:36,320 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,322 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,326 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,327 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:26, output treesize:18 [2018-03-23 11:47:36,521 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base Int) (|__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.offset| Int) (|__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base| Int)) (and (= |c_#memory_$Pointer$.base| (let ((.cse0 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.base|)))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base)))) (= |c_#memory_$Pointer$.offset| (let ((.cse1 (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#t~ret14.offset|)))) (store .cse1 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base| (store (select .cse1 |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__append_#in~pointerToList.offset| 0)))))) is different from true [2018-03-23 11:47:36,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 39 [2018-03-23 11:47:36,627 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:47:36,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-03-23 11:47:36,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 33 [2018-03-23 11:47:36,634 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,640 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,652 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 19 [2018-03-23 11:47:36,655 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:47:36,657 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-03-23 11:47:36,657 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,661 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,667 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 38 [2018-03-23 11:47:36,678 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-03-23 11:47:36,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-03-23 11:47:36,682 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,689 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,704 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:47:36,707 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 34 [2018-03-23 11:47:36,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-03-23 11:47:36,711 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,720 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,729 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,764 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 38 [2018-03-23 11:47:36,766 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-03-23 11:47:36,769 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-03-23 11:47:36,769 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,773 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,783 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 34 [2018-03-23 11:47:36,787 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-03-23 11:47:36,787 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,795 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,800 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,803 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 39 [2018-03-23 11:47:36,806 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:47:36,806 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-03-23 11:47:36,811 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 33 [2018-03-23 11:47:36,812 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,834 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,843 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 19 [2018-03-23 11:47:36,846 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:47:36,849 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-03-23 11:47:36,849 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,853 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,858 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:36,883 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 4 xjuncts. [2018-03-23 11:47:36,884 INFO L202 ElimStorePlain]: Needed 21 recursive calls to eliminate 5 variables, input treesize:100, output treesize:153 [2018-03-23 11:47:37,207 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:47:37,208 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:37,221 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:47:37,221 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:84, output treesize:83 [2018-03-23 11:47:37,267 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:47:37,268 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:47:37,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:47:37,269 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:37,283 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:47:37,284 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:47:37,289 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 73 [2018-03-23 11:47:37,293 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 54 [2018-03-23 11:47:37,293 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:37,299 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:37,313 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:47:37,315 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 69 [2018-03-23 11:47:37,317 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 74 [2018-03-23 11:47:37,318 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:37,325 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:37,332 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:47:37,332 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:104, output treesize:64 [2018-03-23 11:47:37,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-03-23 11:47:37,379 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:47:37,379 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 15 [2018-03-23 11:47:37,380 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:37,386 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-03-23 11:47:37,386 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:37,387 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:37,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2018-03-23 11:47:37,397 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-03-23 11:47:37,397 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:37,401 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:47:37,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-03-23 11:47:37,402 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:37,404 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:37,407 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:37,408 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:75, output treesize:7 [2018-03-23 11:47:37,471 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:37,491 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:47:37,492 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 21] total 33 [2018-03-23 11:47:37,492 INFO L442 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-03-23 11:47:37,492 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-03-23 11:47:37,492 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=866, Unknown=8, NotChecked=60, Total=1056 [2018-03-23 11:47:37,492 INFO L87 Difference]: Start difference. First operand 305 states and 337 transitions. Second operand 33 states. [2018-03-23 11:47:38,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:38,818 INFO L93 Difference]: Finished difference Result 396 states and 436 transitions. [2018-03-23 11:47:38,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-03-23 11:47:38,819 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 62 [2018-03-23 11:47:38,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:38,821 INFO L225 Difference]: With dead ends: 396 [2018-03-23 11:47:38,821 INFO L226 Difference]: Without dead ends: 333 [2018-03-23 11:47:38,822 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 50 SyntacticMatches, 4 SemanticMatches, 47 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 547 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=269, Invalid=1982, Unknown=9, NotChecked=92, Total=2352 [2018-03-23 11:47:38,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states. [2018-03-23 11:47:38,838 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 316. [2018-03-23 11:47:38,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 316 states. [2018-03-23 11:47:38,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 316 states to 316 states and 348 transitions. [2018-03-23 11:47:38,840 INFO L78 Accepts]: Start accepts. Automaton has 316 states and 348 transitions. Word has length 62 [2018-03-23 11:47:38,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:38,840 INFO L459 AbstractCegarLoop]: Abstraction has 316 states and 348 transitions. [2018-03-23 11:47:38,841 INFO L460 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-03-23 11:47:38,841 INFO L276 IsEmpty]: Start isEmpty. Operand 316 states and 348 transitions. [2018-03-23 11:47:38,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-03-23 11:47:38,842 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:38,842 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:38,842 INFO L408 AbstractCegarLoop]: === Iteration 42 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:38,842 INFO L82 PathProgramCache]: Analyzing trace with hash 939145792, now seen corresponding path program 1 times [2018-03-23 11:47:38,842 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:38,842 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:38,843 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:38,843 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:38,843 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:38,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:38,857 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:39,114 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:39,114 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:47:39,114 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:47:39,119 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:39,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:39,158 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:47:39,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:47:39,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:47:39,221 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:39,222 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:39,226 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:39,226 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:23, output treesize:20 [2018-03-23 11:47:39,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:47:39,267 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:39,269 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:47:39,269 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:21, output treesize:12 [2018-03-23 11:47:45,304 WARN L148 SmtUtils]: Spent 2003ms on a formula simplification that was a NOOP. DAG size: 12 [2018-03-23 11:47:45,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-03-23 11:47:45,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 18 [2018-03-23 11:47:45,326 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:45,330 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:45,334 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:45,334 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:23 [2018-03-23 11:47:45,411 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_~#list~0.base| Int) (|main_#t~mem20.base| Int)) (let ((.cse0 (store |c_old(#valid)| |main_~#list~0.base| 1))) (and (= 0 (select |c_old(#valid)| |main_~#list~0.base|)) (= (store (store .cse0 |main_#t~mem20.base| 0) |main_~#list~0.base| 0) |c_#valid|) (= 0 (select .cse0 |main_#t~mem20.base|))))) is different from true [2018-03-23 11:47:45,424 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:45,445 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:47:45,445 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 19 [2018-03-23 11:47:45,445 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-03-23 11:47:45,446 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-03-23 11:47:45,446 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=292, Unknown=5, NotChecked=34, Total=380 [2018-03-23 11:47:45,446 INFO L87 Difference]: Start difference. First operand 316 states and 348 transitions. Second operand 20 states. [2018-03-23 11:47:56,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:56,218 INFO L93 Difference]: Finished difference Result 335 states and 368 transitions. [2018-03-23 11:47:56,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-03-23 11:47:56,219 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 64 [2018-03-23 11:47:56,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:56,220 INFO L225 Difference]: With dead ends: 335 [2018-03-23 11:47:56,220 INFO L226 Difference]: Without dead ends: 301 [2018-03-23 11:47:56,221 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 57 SyntacticMatches, 7 SemanticMatches, 27 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=108, Invalid=647, Unknown=5, NotChecked=52, Total=812 [2018-03-23 11:47:56,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301 states. [2018-03-23 11:47:56,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301 to 288. [2018-03-23 11:47:56,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 288 states. [2018-03-23 11:47:56,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 288 states to 288 states and 319 transitions. [2018-03-23 11:47:56,235 INFO L78 Accepts]: Start accepts. Automaton has 288 states and 319 transitions. Word has length 64 [2018-03-23 11:47:56,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:56,235 INFO L459 AbstractCegarLoop]: Abstraction has 288 states and 319 transitions. [2018-03-23 11:47:56,235 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-03-23 11:47:56,236 INFO L276 IsEmpty]: Start isEmpty. Operand 288 states and 319 transitions. [2018-03-23 11:47:56,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-03-23 11:47:56,236 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:56,237 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:56,237 INFO L408 AbstractCegarLoop]: === Iteration 43 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:56,237 INFO L82 PathProgramCache]: Analyzing trace with hash -1638727740, now seen corresponding path program 1 times [2018-03-23 11:47:56,237 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:56,237 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:56,238 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:56,238 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:56,238 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:56,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:56,249 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:56,342 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:56,342 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:56,342 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-03-23 11:47:56,343 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-03-23 11:47:56,345 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-03-23 11:47:56,345 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-03-23 11:47:56,345 INFO L87 Difference]: Start difference. First operand 288 states and 319 transitions. Second operand 6 states. [2018-03-23 11:47:56,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:56,486 INFO L93 Difference]: Finished difference Result 288 states and 319 transitions. [2018-03-23 11:47:56,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-03-23 11:47:56,486 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2018-03-23 11:47:56,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:56,488 INFO L225 Difference]: With dead ends: 288 [2018-03-23 11:47:56,488 INFO L226 Difference]: Without dead ends: 287 [2018-03-23 11:47:56,488 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-03-23 11:47:56,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 287 states. [2018-03-23 11:47:56,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 287 to 283. [2018-03-23 11:47:56,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 283 states. [2018-03-23 11:47:56,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 283 states to 283 states and 312 transitions. [2018-03-23 11:47:56,500 INFO L78 Accepts]: Start accepts. Automaton has 283 states and 312 transitions. Word has length 65 [2018-03-23 11:47:56,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:56,500 INFO L459 AbstractCegarLoop]: Abstraction has 283 states and 312 transitions. [2018-03-23 11:47:56,500 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-03-23 11:47:56,500 INFO L276 IsEmpty]: Start isEmpty. Operand 283 states and 312 transitions. [2018-03-23 11:47:56,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-03-23 11:47:56,501 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:56,501 INFO L353 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:56,502 INFO L408 AbstractCegarLoop]: === Iteration 44 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:56,502 INFO L82 PathProgramCache]: Analyzing trace with hash 460200159, now seen corresponding path program 3 times [2018-03-23 11:47:56,502 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:56,502 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:56,502 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:56,503 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:47:56,503 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:56,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:56,514 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:56,904 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:56,904 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:47:56,904 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:47:56,910 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-03-23 11:47:56,932 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-03-23 11:47:56,932 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-03-23 11:47:56,935 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:47:56,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-03-23 11:47:56,938 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:56,940 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:56,941 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-03-23 11:47:56,952 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-03-23 11:47:56,953 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:47:56,954 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:56,955 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:56,963 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-03-23 11:47:56,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:47:56,965 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:56,966 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:56,971 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:56,972 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:35, output treesize:21 [2018-03-23 11:47:57,151 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-03-23 11:47:57,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-03-23 11:47:57,153 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:57,155 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:57,165 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26 [2018-03-23 11:47:57,167 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 11 [2018-03-23 11:47:57,167 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:47:57,171 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:47:57,179 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:47:57,179 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:60, output treesize:24 [2018-03-23 11:47:57,215 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 23 proven. 6 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-03-23 11:47:57,246 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:47:57,247 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 9] total 22 [2018-03-23 11:47:57,247 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-03-23 11:47:57,247 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-03-23 11:47:57,247 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=414, Unknown=0, NotChecked=0, Total=506 [2018-03-23 11:47:57,247 INFO L87 Difference]: Start difference. First operand 283 states and 312 transitions. Second operand 23 states. [2018-03-23 11:47:58,655 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:47:58,655 INFO L93 Difference]: Finished difference Result 516 states and 574 transitions. [2018-03-23 11:47:58,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-03-23 11:47:58,656 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 65 [2018-03-23 11:47:58,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:47:58,658 INFO L225 Difference]: With dead ends: 516 [2018-03-23 11:47:58,658 INFO L226 Difference]: Without dead ends: 296 [2018-03-23 11:47:58,659 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 57 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 421 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=431, Invalid=1375, Unknown=0, NotChecked=0, Total=1806 [2018-03-23 11:47:58,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 296 states. [2018-03-23 11:47:58,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 296 to 289. [2018-03-23 11:47:58,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 289 states. [2018-03-23 11:47:58,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 289 states to 289 states and 318 transitions. [2018-03-23 11:47:58,674 INFO L78 Accepts]: Start accepts. Automaton has 289 states and 318 transitions. Word has length 65 [2018-03-23 11:47:58,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:47:58,674 INFO L459 AbstractCegarLoop]: Abstraction has 289 states and 318 transitions. [2018-03-23 11:47:58,674 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-03-23 11:47:58,674 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 318 transitions. [2018-03-23 11:47:58,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-03-23 11:47:58,675 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:47:58,675 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:47:58,675 INFO L408 AbstractCegarLoop]: === Iteration 45 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:47:58,675 INFO L82 PathProgramCache]: Analyzing trace with hash -813467437, now seen corresponding path program 1 times [2018-03-23 11:47:58,675 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:47:58,675 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:47:58,676 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:58,676 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-03-23 11:47:58,676 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:47:58,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:47:58,687 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:47:59,092 WARN L151 SmtUtils]: Spent 209ms on a formula simplification. DAG size of input: 18 DAG size of output 15 [2018-03-23 11:47:59,332 WARN L151 SmtUtils]: Spent 210ms on a formula simplification. DAG size of input: 22 DAG size of output 19 [2018-03-23 11:47:59,591 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:47:59,592 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:47:59,592 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-03-23 11:47:59,592 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-03-23 11:47:59,592 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-03-23 11:47:59,592 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=331, Unknown=0, NotChecked=0, Total=380 [2018-03-23 11:47:59,592 INFO L87 Difference]: Start difference. First operand 289 states and 318 transitions. Second operand 20 states. [2018-03-23 11:48:00,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:00,297 INFO L93 Difference]: Finished difference Result 348 states and 387 transitions. [2018-03-23 11:48:00,319 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-03-23 11:48:00,319 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 66 [2018-03-23 11:48:00,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:00,321 INFO L225 Difference]: With dead ends: 348 [2018-03-23 11:48:00,321 INFO L226 Difference]: Without dead ends: 347 [2018-03-23 11:48:00,321 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 216 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=139, Invalid=983, Unknown=0, NotChecked=0, Total=1122 [2018-03-23 11:48:00,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2018-03-23 11:48:00,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 325. [2018-03-23 11:48:00,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 325 states. [2018-03-23 11:48:00,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 325 states to 325 states and 361 transitions. [2018-03-23 11:48:00,335 INFO L78 Accepts]: Start accepts. Automaton has 325 states and 361 transitions. Word has length 66 [2018-03-23 11:48:00,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:00,335 INFO L459 AbstractCegarLoop]: Abstraction has 325 states and 361 transitions. [2018-03-23 11:48:00,335 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-03-23 11:48:00,335 INFO L276 IsEmpty]: Start isEmpty. Operand 325 states and 361 transitions. [2018-03-23 11:48:00,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-03-23 11:48:00,336 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:00,336 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:00,336 INFO L408 AbstractCegarLoop]: === Iteration 46 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:48:00,336 INFO L82 PathProgramCache]: Analyzing trace with hash -1024417558, now seen corresponding path program 1 times [2018-03-23 11:48:00,336 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:00,337 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:00,337 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:00,337 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:00,337 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:00,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:00,351 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:00,799 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-03-23 11:48:00,799 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:48:00,799 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:48:00,806 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:00,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:00,843 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:48:00,947 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:48:00,953 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:48:00,953 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:00,955 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:00,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:48:00,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:48:00,966 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:00,968 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:00,974 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:00,974 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:34, output treesize:26 [2018-03-23 11:48:01,014 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-03-23 11:48:01,023 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-03-23 11:48:01,024 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-03-23 11:48:01,042 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-03-23 11:48:01,042 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:01,052 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:48:01,077 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-03-23 11:48:01,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-03-23 11:48:01,080 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:01,099 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-03-23 11:48:01,100 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-03-23 11:48:01,110 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:48:01,130 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-03-23 11:48:01,130 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:42, output treesize:139 [2018-03-23 11:48:01,180 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-03-23 11:48:01,180 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:01,188 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:01,188 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:01,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:48:01,189 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:01,194 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:01,194 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:81, output treesize:42 [2018-03-23 11:48:01,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-03-23 11:48:01,310 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-03-23 11:48:01,311 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:01,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2018-03-23 11:48:01,319 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:01,324 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:01,330 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-03-23 11:48:01,331 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-03-23 11:48:01,331 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:01,336 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-03-23 11:48:01,336 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:01,337 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:01,340 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:01,340 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:69, output treesize:7 [2018-03-23 11:48:01,372 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:01,393 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:48:01,393 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 27 [2018-03-23 11:48:01,393 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-03-23 11:48:01,394 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-03-23 11:48:01,394 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=627, Unknown=2, NotChecked=0, Total=702 [2018-03-23 11:48:01,394 INFO L87 Difference]: Start difference. First operand 325 states and 361 transitions. Second operand 27 states. [2018-03-23 11:48:02,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:02,397 INFO L93 Difference]: Finished difference Result 416 states and 459 transitions. [2018-03-23 11:48:02,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-03-23 11:48:02,397 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 70 [2018-03-23 11:48:02,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:02,398 INFO L225 Difference]: With dead ends: 416 [2018-03-23 11:48:02,398 INFO L226 Difference]: Without dead ends: 347 [2018-03-23 11:48:02,399 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 57 SyntacticMatches, 8 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 514 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=251, Invalid=2003, Unknown=2, NotChecked=0, Total=2256 [2018-03-23 11:48:02,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2018-03-23 11:48:02,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 329. [2018-03-23 11:48:02,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 329 states. [2018-03-23 11:48:02,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 362 transitions. [2018-03-23 11:48:02,411 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 362 transitions. Word has length 70 [2018-03-23 11:48:02,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:02,411 INFO L459 AbstractCegarLoop]: Abstraction has 329 states and 362 transitions. [2018-03-23 11:48:02,411 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-03-23 11:48:02,411 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 362 transitions. [2018-03-23 11:48:02,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-03-23 11:48:02,412 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:02,412 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:02,412 INFO L408 AbstractCegarLoop]: === Iteration 47 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:48:02,412 INFO L82 PathProgramCache]: Analyzing trace with hash -58156365, now seen corresponding path program 1 times [2018-03-23 11:48:02,412 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:02,412 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:02,413 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:02,413 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:02,413 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:02,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:02,423 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:03,073 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:03,073 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:03,073 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-03-23 11:48:03,073 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-03-23 11:48:03,073 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-03-23 11:48:03,074 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=295, Unknown=0, NotChecked=0, Total=342 [2018-03-23 11:48:03,074 INFO L87 Difference]: Start difference. First operand 329 states and 362 transitions. Second operand 19 states. [2018-03-23 11:48:03,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:03,654 INFO L93 Difference]: Finished difference Result 353 states and 388 transitions. [2018-03-23 11:48:03,655 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-03-23 11:48:03,655 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 68 [2018-03-23 11:48:03,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:03,656 INFO L225 Difference]: With dead ends: 353 [2018-03-23 11:48:03,656 INFO L226 Difference]: Without dead ends: 352 [2018-03-23 11:48:03,657 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 156 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=115, Invalid=815, Unknown=0, NotChecked=0, Total=930 [2018-03-23 11:48:03,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 352 states. [2018-03-23 11:48:03,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 352 to 321. [2018-03-23 11:48:03,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 321 states. [2018-03-23 11:48:03,668 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 354 transitions. [2018-03-23 11:48:03,668 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 354 transitions. Word has length 68 [2018-03-23 11:48:03,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:03,669 INFO L459 AbstractCegarLoop]: Abstraction has 321 states and 354 transitions. [2018-03-23 11:48:03,669 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-03-23 11:48:03,669 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 354 transitions. [2018-03-23 11:48:03,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-03-23 11:48:03,670 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:03,670 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:03,670 INFO L408 AbstractCegarLoop]: === Iteration 48 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:48:03,670 INFO L82 PathProgramCache]: Analyzing trace with hash 930502132, now seen corresponding path program 1 times [2018-03-23 11:48:03,671 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:03,671 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:03,671 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:03,671 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:03,672 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:03,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:03,681 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:04,093 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:04,093 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:04,093 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-03-23 11:48:04,094 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-03-23 11:48:04,094 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-03-23 11:48:04,094 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=256, Unknown=0, NotChecked=0, Total=306 [2018-03-23 11:48:04,094 INFO L87 Difference]: Start difference. First operand 321 states and 354 transitions. Second operand 18 states. [2018-03-23 11:48:04,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:04,466 INFO L93 Difference]: Finished difference Result 426 states and 464 transitions. [2018-03-23 11:48:04,466 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-03-23 11:48:04,466 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 71 [2018-03-23 11:48:04,467 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:04,468 INFO L225 Difference]: With dead ends: 426 [2018-03-23 11:48:04,468 INFO L226 Difference]: Without dead ends: 349 [2018-03-23 11:48:04,468 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 107 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=106, Invalid=596, Unknown=0, NotChecked=0, Total=702 [2018-03-23 11:48:04,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 349 states. [2018-03-23 11:48:04,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 349 to 327. [2018-03-23 11:48:04,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 327 states. [2018-03-23 11:48:04,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 358 transitions. [2018-03-23 11:48:04,482 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 358 transitions. Word has length 71 [2018-03-23 11:48:04,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:04,482 INFO L459 AbstractCegarLoop]: Abstraction has 327 states and 358 transitions. [2018-03-23 11:48:04,482 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-03-23 11:48:04,482 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 358 transitions. [2018-03-23 11:48:04,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-03-23 11:48:04,483 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:04,483 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:04,483 INFO L408 AbstractCegarLoop]: === Iteration 49 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:48:04,483 INFO L82 PathProgramCache]: Analyzing trace with hash 1451528554, now seen corresponding path program 1 times [2018-03-23 11:48:04,483 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:04,484 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:04,484 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:04,484 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:04,484 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:04,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:04,492 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:05,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:05,055 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:05,055 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2018-03-23 11:48:05,055 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-03-23 11:48:05,055 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-03-23 11:48:05,056 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=564, Unknown=0, NotChecked=0, Total=650 [2018-03-23 11:48:05,056 INFO L87 Difference]: Start difference. First operand 327 states and 358 transitions. Second operand 26 states. [2018-03-23 11:48:05,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:05,981 INFO L93 Difference]: Finished difference Result 346 states and 377 transitions. [2018-03-23 11:48:06,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-03-23 11:48:06,016 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 71 [2018-03-23 11:48:06,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:06,017 INFO L225 Difference]: With dead ends: 346 [2018-03-23 11:48:06,017 INFO L226 Difference]: Without dead ends: 345 [2018-03-23 11:48:06,018 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 407 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=196, Invalid=1526, Unknown=0, NotChecked=0, Total=1722 [2018-03-23 11:48:06,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345 states. [2018-03-23 11:48:06,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345 to 327. [2018-03-23 11:48:06,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 327 states. [2018-03-23 11:48:06,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 356 transitions. [2018-03-23 11:48:06,030 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 356 transitions. Word has length 71 [2018-03-23 11:48:06,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:06,031 INFO L459 AbstractCegarLoop]: Abstraction has 327 states and 356 transitions. [2018-03-23 11:48:06,031 INFO L460 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-03-23 11:48:06,031 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 356 transitions. [2018-03-23 11:48:06,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-03-23 11:48:06,031 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:06,032 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:06,032 INFO L408 AbstractCegarLoop]: === Iteration 50 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:48:06,032 INFO L82 PathProgramCache]: Analyzing trace with hash -945428086, now seen corresponding path program 1 times [2018-03-23 11:48:06,032 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:06,032 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:06,032 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:06,033 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:06,033 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:06,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:06,044 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:06,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:06,659 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:06,659 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-03-23 11:48:06,660 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-03-23 11:48:06,660 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-03-23 11:48:06,660 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=522, Unknown=0, NotChecked=0, Total=600 [2018-03-23 11:48:06,660 INFO L87 Difference]: Start difference. First operand 327 states and 356 transitions. Second operand 25 states. [2018-03-23 11:48:07,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:07,509 INFO L93 Difference]: Finished difference Result 345 states and 375 transitions. [2018-03-23 11:48:07,510 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-03-23 11:48:07,510 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 73 [2018-03-23 11:48:07,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:07,511 INFO L225 Difference]: With dead ends: 345 [2018-03-23 11:48:07,511 INFO L226 Difference]: Without dead ends: 344 [2018-03-23 11:48:07,512 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 392 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=205, Invalid=1601, Unknown=0, NotChecked=0, Total=1806 [2018-03-23 11:48:07,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 344 states. [2018-03-23 11:48:07,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 344 to 308. [2018-03-23 11:48:07,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 308 states. [2018-03-23 11:48:07,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 308 states to 308 states and 333 transitions. [2018-03-23 11:48:07,524 INFO L78 Accepts]: Start accepts. Automaton has 308 states and 333 transitions. Word has length 73 [2018-03-23 11:48:07,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:07,524 INFO L459 AbstractCegarLoop]: Abstraction has 308 states and 333 transitions. [2018-03-23 11:48:07,524 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-03-23 11:48:07,524 INFO L276 IsEmpty]: Start isEmpty. Operand 308 states and 333 transitions. [2018-03-23 11:48:07,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-03-23 11:48:07,525 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:07,525 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:07,525 INFO L408 AbstractCegarLoop]: === Iteration 51 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:48:07,525 INFO L82 PathProgramCache]: Analyzing trace with hash 1525267024, now seen corresponding path program 1 times [2018-03-23 11:48:07,525 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:07,525 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:07,526 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:07,526 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:07,526 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:07,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:07,534 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:08,004 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-03-23 11:48:08,005 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:48:08,005 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:48:08,018 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:08,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:08,064 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:48:08,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:48:08,166 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:48:08,166 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:08,167 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:08,195 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:08,195 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:9 [2018-03-23 11:48:08,203 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:08,204 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:08,204 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:48:08,204 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:08,207 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:08,207 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:12 [2018-03-23 11:48:08,236 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-03-23 11:48:08,236 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:08,240 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:08,240 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:12 [2018-03-23 11:48:08,285 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2018-03-23 11:48:08,297 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2018-03-23 11:48:08,297 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:08,299 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:08,301 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:08,302 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:21, output treesize:10 [2018-03-23 11:48:08,311 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:08,312 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-03-23 11:48:08,312 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:08,317 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:08,317 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-03-23 11:48:08,346 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:08,368 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:48:08,368 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 15] total 17 [2018-03-23 11:48:08,368 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-03-23 11:48:08,368 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-03-23 11:48:08,369 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=257, Unknown=0, NotChecked=0, Total=306 [2018-03-23 11:48:08,369 INFO L87 Difference]: Start difference. First operand 308 states and 333 transitions. Second operand 18 states. [2018-03-23 11:48:08,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:08,842 INFO L93 Difference]: Finished difference Result 368 states and 396 transitions. [2018-03-23 11:48:08,842 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-03-23 11:48:08,842 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 79 [2018-03-23 11:48:08,843 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:08,844 INFO L225 Difference]: With dead ends: 368 [2018-03-23 11:48:08,844 INFO L226 Difference]: Without dead ends: 357 [2018-03-23 11:48:08,845 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 70 SyntacticMatches, 4 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=150, Invalid=780, Unknown=0, NotChecked=0, Total=930 [2018-03-23 11:48:08,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2018-03-23 11:48:08,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 298. [2018-03-23 11:48:08,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 298 states. [2018-03-23 11:48:08,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 298 states to 298 states and 322 transitions. [2018-03-23 11:48:08,859 INFO L78 Accepts]: Start accepts. Automaton has 298 states and 322 transitions. Word has length 79 [2018-03-23 11:48:08,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:08,859 INFO L459 AbstractCegarLoop]: Abstraction has 298 states and 322 transitions. [2018-03-23 11:48:08,859 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-03-23 11:48:08,859 INFO L276 IsEmpty]: Start isEmpty. Operand 298 states and 322 transitions. [2018-03-23 11:48:08,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-03-23 11:48:08,860 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:08,860 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:08,860 INFO L408 AbstractCegarLoop]: === Iteration 52 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:48:08,860 INFO L82 PathProgramCache]: Analyzing trace with hash -1240341919, now seen corresponding path program 1 times [2018-03-23 11:48:08,860 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:08,860 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:08,861 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:08,861 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:08,861 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:08,876 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:08,877 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:09,138 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 12 proven. 6 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-03-23 11:48:09,139 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:48:09,139 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:48:09,144 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:09,172 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:09,175 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:48:09,259 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:48:09,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:48:09,260 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:09,262 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:09,267 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:09,268 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:21 [2018-03-23 11:48:09,311 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-03-23 11:48:09,313 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-03-23 11:48:09,314 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:09,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 27 [2018-03-23 11:48:09,336 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-03-23 11:48:09,364 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-03-23 11:48:09,379 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:48:09,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:48:09,380 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:09,382 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:09,394 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-03-23 11:48:09,394 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:37, output treesize:57 [2018-03-23 11:48:09,433 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-03-23 11:48:09,433 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:09,441 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:09,441 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:09,442 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:48:09,442 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:09,445 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:09,446 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:73, output treesize:29 [2018-03-23 11:48:09,475 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-03-23 11:48:09,476 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-03-23 11:48:09,476 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:09,478 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:09,482 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:09,482 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:40, output treesize:29 [2018-03-23 11:48:09,549 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 24 [2018-03-23 11:48:09,551 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-03-23 11:48:09,552 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:09,557 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-03-23 11:48:09,557 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:09,558 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:09,560 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:09,560 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:33, output treesize:5 [2018-03-23 11:48:09,608 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:09,642 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:48:09,643 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 27 [2018-03-23 11:48:09,643 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-03-23 11:48:09,643 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-03-23 11:48:09,643 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=680, Unknown=0, NotChecked=0, Total=756 [2018-03-23 11:48:09,644 INFO L87 Difference]: Start difference. First operand 298 states and 322 transitions. Second operand 28 states. [2018-03-23 11:48:10,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:10,453 INFO L93 Difference]: Finished difference Result 332 states and 359 transitions. [2018-03-23 11:48:10,454 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-03-23 11:48:10,454 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 79 [2018-03-23 11:48:10,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:10,456 INFO L225 Difference]: With dead ends: 332 [2018-03-23 11:48:10,456 INFO L226 Difference]: Without dead ends: 331 [2018-03-23 11:48:10,456 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 67 SyntacticMatches, 7 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 488 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=235, Invalid=2021, Unknown=0, NotChecked=0, Total=2256 [2018-03-23 11:48:10,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2018-03-23 11:48:10,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 281. [2018-03-23 11:48:10,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 281 states. [2018-03-23 11:48:10,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 281 states to 281 states and 302 transitions. [2018-03-23 11:48:10,468 INFO L78 Accepts]: Start accepts. Automaton has 281 states and 302 transitions. Word has length 79 [2018-03-23 11:48:10,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:10,468 INFO L459 AbstractCegarLoop]: Abstraction has 281 states and 302 transitions. [2018-03-23 11:48:10,468 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-03-23 11:48:10,469 INFO L276 IsEmpty]: Start isEmpty. Operand 281 states and 302 transitions. [2018-03-23 11:48:10,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-03-23 11:48:10,469 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:10,469 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:10,470 INFO L408 AbstractCegarLoop]: === Iteration 53 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:48:10,470 INFO L82 PathProgramCache]: Analyzing trace with hash -1240341918, now seen corresponding path program 1 times [2018-03-23 11:48:10,470 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:10,470 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:10,471 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:10,471 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:10,471 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:10,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:10,485 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:10,858 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-03-23 11:48:10,858 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:48:10,859 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:48:10,869 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:10,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:10,910 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:48:11,121 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:48:11,123 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:48:11,153 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:11,155 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:11,166 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:48:11,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:48:11,168 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:11,170 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:11,179 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:11,179 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:39, output treesize:28 [2018-03-23 11:48:11,247 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-03-23 11:48:11,250 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-03-23 11:48:11,251 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:11,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 27 [2018-03-23 11:48:11,276 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-03-23 11:48:11,289 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-03-23 11:48:11,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-03-23 11:48:11,321 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-03-23 11:48:11,322 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:11,346 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-03-23 11:48:11,347 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-03-23 11:48:11,360 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:48:11,383 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 4 xjuncts. [2018-03-23 11:48:11,384 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:44, output treesize:153 [2018-03-23 11:48:11,458 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-03-23 11:48:11,458 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:11,471 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:11,472 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:11,472 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:48:11,472 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:11,478 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:11,478 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:88, output treesize:44 [2018-03-23 11:48:11,562 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 58 [2018-03-23 11:48:11,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 5 [2018-03-23 11:48:11,563 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:11,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-03-23 11:48:11,569 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:11,574 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:11,580 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-03-23 11:48:11,581 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-03-23 11:48:11,582 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:11,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-03-23 11:48:11,586 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:11,587 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:11,590 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:11,590 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:71, output treesize:9 [2018-03-23 11:48:11,670 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:11,691 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:48:11,691 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 21] total 35 [2018-03-23 11:48:11,691 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-03-23 11:48:11,691 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-03-23 11:48:11,692 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=1166, Unknown=0, NotChecked=0, Total=1260 [2018-03-23 11:48:11,692 INFO L87 Difference]: Start difference. First operand 281 states and 302 transitions. Second operand 36 states. [2018-03-23 11:48:13,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:13,497 INFO L93 Difference]: Finished difference Result 360 states and 391 transitions. [2018-03-23 11:48:13,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-03-23 11:48:13,497 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 79 [2018-03-23 11:48:13,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:13,499 INFO L225 Difference]: With dead ends: 360 [2018-03-23 11:48:13,500 INFO L226 Difference]: Without dead ends: 357 [2018-03-23 11:48:13,501 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 64 SyntacticMatches, 6 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1228 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=428, Invalid=4974, Unknown=0, NotChecked=0, Total=5402 [2018-03-23 11:48:13,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2018-03-23 11:48:13,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 263. [2018-03-23 11:48:13,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 263 states. [2018-03-23 11:48:13,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 263 states to 263 states and 281 transitions. [2018-03-23 11:48:13,525 INFO L78 Accepts]: Start accepts. Automaton has 263 states and 281 transitions. Word has length 79 [2018-03-23 11:48:13,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:13,525 INFO L459 AbstractCegarLoop]: Abstraction has 263 states and 281 transitions. [2018-03-23 11:48:13,525 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-03-23 11:48:13,525 INFO L276 IsEmpty]: Start isEmpty. Operand 263 states and 281 transitions. [2018-03-23 11:48:13,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-03-23 11:48:13,526 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:13,526 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:13,527 INFO L408 AbstractCegarLoop]: === Iteration 54 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:48:13,527 INFO L82 PathProgramCache]: Analyzing trace with hash -1975523254, now seen corresponding path program 1 times [2018-03-23 11:48:13,527 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:13,527 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:13,528 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:13,528 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:13,528 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:13,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:13,543 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:14,336 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:14,337 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:14,337 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-03-23 11:48:14,337 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-03-23 11:48:14,337 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-03-23 11:48:14,337 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=491, Unknown=0, NotChecked=0, Total=552 [2018-03-23 11:48:14,338 INFO L87 Difference]: Start difference. First operand 263 states and 281 transitions. Second operand 24 states. [2018-03-23 11:48:15,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:15,460 INFO L93 Difference]: Finished difference Result 364 states and 390 transitions. [2018-03-23 11:48:15,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-03-23 11:48:15,461 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 77 [2018-03-23 11:48:15,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:15,462 INFO L225 Difference]: With dead ends: 364 [2018-03-23 11:48:15,462 INFO L226 Difference]: Without dead ends: 296 [2018-03-23 11:48:15,463 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 420 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=216, Invalid=1854, Unknown=0, NotChecked=0, Total=2070 [2018-03-23 11:48:15,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 296 states. [2018-03-23 11:48:15,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 296 to 274. [2018-03-23 11:48:15,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 274 states. [2018-03-23 11:48:15,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 274 states to 274 states and 293 transitions. [2018-03-23 11:48:15,479 INFO L78 Accepts]: Start accepts. Automaton has 274 states and 293 transitions. Word has length 77 [2018-03-23 11:48:15,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:15,479 INFO L459 AbstractCegarLoop]: Abstraction has 274 states and 293 transitions. [2018-03-23 11:48:15,479 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-03-23 11:48:15,479 INFO L276 IsEmpty]: Start isEmpty. Operand 274 states and 293 transitions. [2018-03-23 11:48:15,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-03-23 11:48:15,480 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:15,481 INFO L353 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:15,481 INFO L408 AbstractCegarLoop]: === Iteration 55 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:48:15,481 INFO L82 PathProgramCache]: Analyzing trace with hash -963410193, now seen corresponding path program 1 times [2018-03-23 11:48:15,481 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:15,481 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:15,482 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:15,482 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:15,482 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:15,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:15,492 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:15,562 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 68 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:15,562 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:48:15,562 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:48:15,568 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:15,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:15,594 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:48:15,609 INFO L134 CoverageAnalysis]: Checked inductivity of 68 backedges. 0 proven. 68 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:15,630 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:48:15,630 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 13 [2018-03-23 11:48:15,630 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-03-23 11:48:15,631 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-03-23 11:48:15,631 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=108, Unknown=0, NotChecked=0, Total=156 [2018-03-23 11:48:15,631 INFO L87 Difference]: Start difference. First operand 274 states and 293 transitions. Second operand 13 states. [2018-03-23 11:48:15,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:15,712 INFO L93 Difference]: Finished difference Result 535 states and 574 transitions. [2018-03-23 11:48:15,712 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-03-23 11:48:15,712 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 79 [2018-03-23 11:48:15,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:15,714 INFO L225 Difference]: With dead ends: 535 [2018-03-23 11:48:15,714 INFO L226 Difference]: Without dead ends: 291 [2018-03-23 11:48:15,716 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 97 GetRequests, 78 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=139, Invalid=281, Unknown=0, NotChecked=0, Total=420 [2018-03-23 11:48:15,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2018-03-23 11:48:15,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 284. [2018-03-23 11:48:15,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 284 states. [2018-03-23 11:48:15,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 284 states to 284 states and 303 transitions. [2018-03-23 11:48:15,740 INFO L78 Accepts]: Start accepts. Automaton has 284 states and 303 transitions. Word has length 79 [2018-03-23 11:48:15,740 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:15,740 INFO L459 AbstractCegarLoop]: Abstraction has 284 states and 303 transitions. [2018-03-23 11:48:15,740 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-03-23 11:48:15,740 INFO L276 IsEmpty]: Start isEmpty. Operand 284 states and 303 transitions. [2018-03-23 11:48:15,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-03-23 11:48:15,741 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:15,741 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:15,741 INFO L408 AbstractCegarLoop]: === Iteration 56 === [__U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__freeDataErr6AssertViolationMEMORY_FREE, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__appendErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___false_valid_memtrack_i__create_dataErr5RequiresViolation]=== [2018-03-23 11:48:15,742 INFO L82 PathProgramCache]: Analyzing trace with hash 2045270867, now seen corresponding path program 1 times [2018-03-23 11:48:15,742 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:15,742 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:15,742 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:15,743 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:15,743 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:15,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:15,757 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:16,370 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:16,371 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:48:16,371 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:48:16,376 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:16,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:16,409 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:48:16,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:48:16,429 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:48:16,429 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:16,430 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:16,435 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:48:16,437 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:48:16,437 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:16,438 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:16,442 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:16,442 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:26, output treesize:18 [2018-03-23 11:48:16,711 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:16,713 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:16,714 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-03-23 11:48:16,714 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:16,752 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:16,752 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:102, output treesize:96 [2018-03-23 11:48:17,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 171 treesize of output 100 [2018-03-23 11:48:17,331 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 90 [2018-03-23 11:48:17,331 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:17,787 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:17,787 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 93 [2018-03-23 11:48:17,788 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:18,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 63 [2018-03-23 11:48:18,224 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:48:18,224 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:18,261 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 48 [2018-03-23 11:48:18,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-03-23 11:48:18,270 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:18,293 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 32 [2018-03-23 11:48:18,296 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:18,299 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-03-23 11:48:18,300 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:18,309 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:18,316 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:18,327 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:18,565 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 86 treesize of output 73 [2018-03-23 11:48:18,570 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 63 [2018-03-23 11:48:18,571 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:18,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 58 [2018-03-23 11:48:18,834 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:19,036 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 50 [2018-03-23 11:48:19,042 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 26 [2018-03-23 11:48:19,042 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:19,068 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:48:19,071 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 48 [2018-03-23 11:48:19,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 35 [2018-03-23 11:48:19,080 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:19,091 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:19,102 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:19,245 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 55 treesize of output 62 [2018-03-23 11:48:19,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 49 [2018-03-23 11:48:19,253 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:19,363 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 50 [2018-03-23 11:48:19,363 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:19,491 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:48:19,510 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 49 treesize of output 56 [2018-03-23 11:48:19,518 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 46 [2018-03-23 11:48:19,519 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:19,549 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:48:19,636 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 6 case distinctions, treesize of input 35 treesize of output 64 [2018-03-23 11:48:19,640 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-03-23 11:48:19,640 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:19,740 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:19,743 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 31 [2018-03-23 11:48:19,743 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:19,841 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 35 [2018-03-23 11:48:19,842 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:19,872 INFO L267 ElimStorePlain]: Start of recursive call 23: 4 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:48:19,923 INFO L267 ElimStorePlain]: Start of recursive call 18: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:48:19,973 INFO L267 ElimStorePlain]: Start of recursive call 11: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:48:20,043 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:48:20,100 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 171 treesize of output 100 [2018-03-23 11:48:20,104 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 90 [2018-03-23 11:48:20,105 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:20,206 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:20,207 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 93 [2018-03-23 11:48:20,207 INFO L267 ElimStorePlain]: Start of recursive call 29: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:20,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 4 case distinctions, treesize of input 89 treesize of output 74 [2018-03-23 11:48:20,331 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:20,333 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 73 [2018-03-23 11:48:20,333 INFO L267 ElimStorePlain]: Start of recursive call 31: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:20,417 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 62 [2018-03-23 11:48:20,417 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:20,511 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 62 treesize of output 67 [2018-03-23 11:48:20,515 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:20,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 61 [2018-03-23 11:48:20,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 22 [2018-03-23 11:48:20,520 INFO L267 ElimStorePlain]: Start of recursive call 35: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:20,531 INFO L267 ElimStorePlain]: Start of recursive call 34: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:20,580 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 35 [2018-03-23 11:48:20,583 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:20,585 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-03-23 11:48:20,586 INFO L267 ElimStorePlain]: Start of recursive call 37: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:20,593 INFO L267 ElimStorePlain]: Start of recursive call 36: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:20,640 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 49 treesize of output 59 [2018-03-23 11:48:20,645 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:20,647 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 2 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 53 [2018-03-23 11:48:20,651 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-03-23 11:48:20,651 INFO L267 ElimStorePlain]: Start of recursive call 40: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:20,662 INFO L267 ElimStorePlain]: Start of recursive call 39: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:20,696 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:20,699 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: var is still there: v_arrayElimCell_94 term size 28 at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:270) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:243) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:445) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:198) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:283) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:237) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:185) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.MultiTrackRefinementStrategy.getTraceCheck(MultiTrackRefinementStrategy.java:222) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:231) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:205) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:69) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:406) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:417) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:363) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:304) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:118) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:119) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:324) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.runToolchainDefault(DefaultToolchainJob.java:221) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.BasicToolchainJob.run(BasicToolchainJob.java:134) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-03-23 11:48:20,701 INFO L168 Benchmark]: Toolchain (without parser) took 67550.06 ms. Allocated memory was 300.9 MB in the beginning and 922.7 MB in the end (delta: 621.8 MB). Free memory was 240.7 MB in the beginning and 568.0 MB in the end (delta: -327.4 MB). Peak memory consumption was 294.4 MB. Max. memory is 5.3 GB. [2018-03-23 11:48:20,702 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 300.9 MB. Free memory is still 265.0 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-03-23 11:48:20,702 INFO L168 Benchmark]: CACSL2BoogieTranslator took 360.58 ms. Allocated memory is still 300.9 MB. Free memory was 240.7 MB in the beginning and 213.6 MB in the end (delta: 27.0 MB). Peak memory consumption was 27.0 MB. Max. memory is 5.3 GB. [2018-03-23 11:48:20,703 INFO L168 Benchmark]: Boogie Preprocessor took 64.04 ms. Allocated memory is still 300.9 MB. Free memory was 213.6 MB in the beginning and 210.6 MB in the end (delta: 3.0 MB). Peak memory consumption was 3.0 MB. Max. memory is 5.3 GB. [2018-03-23 11:48:20,703 INFO L168 Benchmark]: RCFGBuilder took 682.72 ms. Allocated memory was 300.9 MB in the beginning and 459.3 MB in the end (delta: 158.3 MB). Free memory was 210.6 MB in the beginning and 379.6 MB in the end (delta: -169.0 MB). Peak memory consumption was 22.3 MB. Max. memory is 5.3 GB. [2018-03-23 11:48:20,703 INFO L168 Benchmark]: TraceAbstraction took 66437.88 ms. Allocated memory was 459.3 MB in the beginning and 922.7 MB in the end (delta: 463.5 MB). Free memory was 379.6 MB in the beginning and 568.0 MB in the end (delta: -188.4 MB). Peak memory consumption was 275.0 MB. Max. memory is 5.3 GB. [2018-03-23 11:48:20,704 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 300.9 MB. Free memory is still 265.0 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 360.58 ms. Allocated memory is still 300.9 MB. Free memory was 240.7 MB in the beginning and 213.6 MB in the end (delta: 27.0 MB). Peak memory consumption was 27.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 64.04 ms. Allocated memory is still 300.9 MB. Free memory was 213.6 MB in the beginning and 210.6 MB in the end (delta: 3.0 MB). Peak memory consumption was 3.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 682.72 ms. Allocated memory was 300.9 MB in the beginning and 459.3 MB in the end (delta: 158.3 MB). Free memory was 210.6 MB in the beginning and 379.6 MB in the end (delta: -169.0 MB). Peak memory consumption was 22.3 MB. Max. memory is 5.3 GB. * TraceAbstraction took 66437.88 ms. Allocated memory was 459.3 MB in the beginning and 922.7 MB in the end (delta: 463.5 MB). Free memory was 379.6 MB in the beginning and 568.0 MB in the end (delta: -188.4 MB). Peak memory consumption was 275.0 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: var is still there: v_arrayElimCell_94 term size 28 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: var is still there: v_arrayElimCell_94 term size 28: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) RESULT: Ultimate could not prove your program: Toolchain returned no result. Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-Benchmark-0-2018-03-23_11-48-20-710.csv Received shutdown request...