java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_true-valid-memsafety.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-d4a2356 [2018-03-23 11:48:42,947 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-03-23 11:48:42,948 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-03-23 11:48:42,962 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-03-23 11:48:42,962 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-03-23 11:48:42,963 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-03-23 11:48:42,964 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-03-23 11:48:42,966 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-03-23 11:48:42,969 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-03-23 11:48:42,969 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-03-23 11:48:42,970 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-03-23 11:48:42,971 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-03-23 11:48:42,972 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-03-23 11:48:42,973 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-03-23 11:48:42,974 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-03-23 11:48:42,977 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-03-23 11:48:42,979 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-03-23 11:48:42,981 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-03-23 11:48:42,982 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-03-23 11:48:42,984 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-03-23 11:48:42,986 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-03-23 11:48:42,986 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-03-23 11:48:42,987 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-03-23 11:48:42,988 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-03-23 11:48:42,989 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-03-23 11:48:42,990 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-03-23 11:48:42,990 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-03-23 11:48:42,991 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-03-23 11:48:42,991 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... 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[2018-03-23 11:48:42,993 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-03-23 11:48:43,002 INFO L110 SettingsManager]: Loading preferences was successful [2018-03-23 11:48:43,002 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-03-23 11:48:43,003 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-03-23 11:48:43,004 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-03-23 11:48:43,004 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-03-23 11:48:43,004 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-03-23 11:48:43,004 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-03-23 11:48:43,005 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-03-23 11:48:43,005 INFO L133 SettingsManager]: * sizeof long=4 [2018-03-23 11:48:43,005 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-03-23 11:48:43,005 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-03-23 11:48:43,006 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-03-23 11:48:43,006 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-03-23 11:48:43,006 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-03-23 11:48:43,006 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-03-23 11:48:43,006 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-03-23 11:48:43,007 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-03-23 11:48:43,007 INFO L133 SettingsManager]: * sizeof long double=12 [2018-03-23 11:48:43,007 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-03-23 11:48:43,007 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-03-23 11:48:43,007 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-03-23 11:48:43,008 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-03-23 11:48:43,008 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-03-23 11:48:43,008 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-03-23 11:48:43,008 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-03-23 11:48:43,008 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-03-23 11:48:43,009 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-03-23 11:48:43,009 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-03-23 11:48:43,009 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-03-23 11:48:43,009 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-03-23 11:48:43,009 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-03-23 11:48:43,010 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-03-23 11:48:43,011 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-03-23 11:48:43,011 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-03-23 11:48:43,046 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-03-23 11:48:43,058 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-03-23 11:48:43,062 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-03-23 11:48:43,064 INFO L271 PluginConnector]: Initializing CDTParser... [2018-03-23 11:48:43,064 INFO L276 PluginConnector]: CDTParser initialized [2018-03-23 11:48:43,065 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,374 INFO L228 CDTParser]: Created temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGb7ad690b7 [2018-03-23 11:48:43,547 INFO L291 CDTParser]: IsIndexed: true [2018-03-23 11:48:43,547 INFO L292 CDTParser]: Found 1 translation units. [2018-03-23 11:48:43,547 INFO L171 CDTParser]: Scanning optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,558 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-03-23 11:48:43,558 INFO L215 ultiparseSymbolTable]: [2018-03-23 11:48:43,558 INFO L218 ultiparseSymbolTable]: Function table: [2018-03-23 11:48:43,559 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeData ('freeData') in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,559 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_64 ('__bswap_64') in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,559 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,559 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_32 ('__bswap_32') in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,559 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data ('create_data') in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,559 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append ('append') in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,559 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-03-23 11:48:43,560 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____useconds_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,560 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_int in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,560 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_condattr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,560 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__dev_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,560 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uint8_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,560 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____key_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,560 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__uint in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,560 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__loff_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,560 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__nlink_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,561 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,561 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int8_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,561 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__quad_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,561 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fd_mask in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,561 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____int64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,561 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____clockid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,561 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__clockid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,561 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____sig_atomic_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,561 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_attr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,561 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__wchar_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,561 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__suseconds_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,561 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uint64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,561 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_once_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,562 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsword_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,562 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____syscall_slong_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,562 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fd_mask in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,562 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____blkcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,562 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,562 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ssize_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,562 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int16_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,562 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_cond_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,562 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_spinlock_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,562 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____ino64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,562 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____sigset_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,562 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____ino_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,562 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__id_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,563 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____blkcnt64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,563 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_rwlockattr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,563 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____int16_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,563 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_char in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,563 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__off_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,563 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____off_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,563 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__blkcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,563 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fsfilcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,563 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____ssize_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,563 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__timer_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,563 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_barrier_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,563 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____nlink_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,563 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__int32_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,563 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____socklen_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,564 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_mutexattr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,564 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____pid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,564 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__key_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,564 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_quad_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,564 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____off64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,564 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int32_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,564 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsblkcnt64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,564 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_char in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,564 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____gid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,564 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____quad_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,565 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____syscall_ulong_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,565 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____id_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,565 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____timer_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,565 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,565 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____rlim64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,565 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uint32_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,565 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fsblkcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,565 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____suseconds_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,566 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_rwlock_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,566 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__div_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,566 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__time_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,566 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____pthread_slist_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,566 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____int32_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,566 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____dev_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,566 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsblkcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,566 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__mode_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,566 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__int16_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,566 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_key_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,567 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__Data in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,567 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____caddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,567 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fd_set in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,567 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__lldiv_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,567 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____rlim_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,567 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__uid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,567 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_short in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,567 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____intptr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,567 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__size_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,568 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____mode_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,568 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__blksize_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,568 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__caddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,568 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____u_long in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,568 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__sigset_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,568 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ldiv_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,568 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_short in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,568 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ino_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,568 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__daddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,569 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_int64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,569 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,569 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__gid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,569 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__register_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,569 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ulong in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,569 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_barrierattr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,569 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____int8_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,569 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_long in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,569 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,569 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsfilcnt64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,570 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__clock_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,570 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____fsfilcnt_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,570 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__pthread_mutex_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,570 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____time_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,570 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____loff_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,570 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__fsid_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,570 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__u_quad_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,570 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__ushort in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,571 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____blksize_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,571 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____clock_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,571 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__int8_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,571 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____uint16_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,571 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____daddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,571 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__int64_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,571 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____qaddr_t in optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:43,588 INFO L334 CDTParser]: Deleted temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGb7ad690b7 [2018-03-23 11:48:43,592 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-03-23 11:48:43,595 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-03-23 11:48:43,596 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-03-23 11:48:43,596 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-03-23 11:48:43,600 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-03-23 11:48:43,601 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.03 11:48:43" (1/1) ... [2018-03-23 11:48:43,603 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6a022ec9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:43, skipping insertion in model container [2018-03-23 11:48:43,603 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 23.03 11:48:43" (1/1) ... [2018-03-23 11:48:43,616 INFO L167 Dispatcher]: Using SV-COMP mode [2018-03-23 11:48:43,646 INFO L167 Dispatcher]: Using SV-COMP mode [2018-03-23 11:48:43,807 INFO L175 PostProcessor]: Settings: Checked method=main [2018-03-23 11:48:43,861 INFO L175 PostProcessor]: Settings: Checked method=main [2018-03-23 11:48:43,869 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 120 non ball SCCs. Number of states in SCCs 120. [2018-03-23 11:48:43,926 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:43 WrapperNode [2018-03-23 11:48:43,926 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-03-23 11:48:43,927 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-03-23 11:48:43,927 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-03-23 11:48:43,927 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-03-23 11:48:43,942 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:43" (1/1) ... [2018-03-23 11:48:43,942 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:43" (1/1) ... [2018-03-23 11:48:43,960 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:43" (1/1) ... [2018-03-23 11:48:43,960 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:43" (1/1) ... [2018-03-23 11:48:43,975 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:43" (1/1) ... [2018-03-23 11:48:43,979 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:43" (1/1) ... [2018-03-23 11:48:43,983 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:43" (1/1) ... [2018-03-23 11:48:43,988 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-03-23 11:48:43,989 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-03-23 11:48:43,989 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-03-23 11:48:43,989 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-03-23 11:48:43,990 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:43" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-03-23 11:48:44,094 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-03-23 11:48:44,094 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-03-23 11:48:44,094 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_32 [2018-03-23 11:48:44,094 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_64 [2018-03-23 11:48:44,094 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data [2018-03-23 11:48:44,095 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeData [2018-03-23 11:48:44,095 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append [2018-03-23 11:48:44,095 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-03-23 11:48:44,095 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-03-23 11:48:44,095 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-03-23 11:48:44,095 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-03-23 11:48:44,095 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-03-23 11:48:44,096 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-03-23 11:48:44,096 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-03-23 11:48:44,096 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-03-23 11:48:44,096 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-03-23 11:48:44,096 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-03-23 11:48:44,096 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-03-23 11:48:44,097 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-03-23 11:48:44,097 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-03-23 11:48:44,097 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-03-23 11:48:44,097 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-03-23 11:48:44,097 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-03-23 11:48:44,097 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-03-23 11:48:44,097 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-03-23 11:48:44,098 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_32 [2018-03-23 11:48:44,098 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i____bswap_64 [2018-03-23 11:48:44,098 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-03-23 11:48:44,098 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-03-23 11:48:44,098 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-03-23 11:48:44,098 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-03-23 11:48:44,098 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-03-23 11:48:44,099 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-03-23 11:48:44,099 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-03-23 11:48:44,099 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-03-23 11:48:44,099 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-03-23 11:48:44,099 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-03-23 11:48:44,099 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-03-23 11:48:44,099 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-03-23 11:48:44,099 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-03-23 11:48:44,099 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-03-23 11:48:44,099 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-03-23 11:48:44,100 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-03-23 11:48:44,100 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-03-23 11:48:44,100 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-03-23 11:48:44,100 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-03-23 11:48:44,100 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-03-23 11:48:44,100 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-03-23 11:48:44,100 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-03-23 11:48:44,100 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-03-23 11:48:44,100 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-03-23 11:48:44,100 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-03-23 11:48:44,101 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-03-23 11:48:44,101 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-03-23 11:48:44,101 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-03-23 11:48:44,101 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-03-23 11:48:44,101 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-03-23 11:48:44,101 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-03-23 11:48:44,101 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-03-23 11:48:44,101 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-03-23 11:48:44,102 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-03-23 11:48:44,102 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-03-23 11:48:44,102 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-03-23 11:48:44,102 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-03-23 11:48:44,102 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-03-23 11:48:44,102 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-03-23 11:48:44,102 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-03-23 11:48:44,102 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-03-23 11:48:44,102 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-03-23 11:48:44,102 INFO L128 BoogieDeclarations]: Found specification of procedure aligned_alloc [2018-03-23 11:48:44,102 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-03-23 11:48:44,102 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-03-23 11:48:44,102 INFO L128 BoogieDeclarations]: Found specification of procedure at_quick_exit [2018-03-23 11:48:44,102 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-03-23 11:48:44,103 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-03-23 11:48:44,103 INFO L128 BoogieDeclarations]: Found specification of procedure quick_exit [2018-03-23 11:48:44,103 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-03-23 11:48:44,103 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-03-23 11:48:44,103 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-03-23 11:48:44,103 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-03-23 11:48:44,103 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-03-23 11:48:44,103 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-03-23 11:48:44,103 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-03-23 11:48:44,103 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-03-23 11:48:44,103 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-03-23 11:48:44,103 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-03-23 11:48:44,104 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-03-23 11:48:44,104 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-03-23 11:48:44,104 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-03-23 11:48:44,104 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-03-23 11:48:44,104 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-03-23 11:48:44,104 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-03-23 11:48:44,104 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-03-23 11:48:44,104 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-03-23 11:48:44,104 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-03-23 11:48:44,105 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-03-23 11:48:44,105 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-03-23 11:48:44,105 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-03-23 11:48:44,105 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-03-23 11:48:44,105 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-03-23 11:48:44,105 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-03-23 11:48:44,105 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-03-23 11:48:44,105 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-03-23 11:48:44,106 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-03-23 11:48:44,106 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-03-23 11:48:44,106 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-03-23 11:48:44,106 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-03-23 11:48:44,106 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-03-23 11:48:44,106 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-03-23 11:48:44,106 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-03-23 11:48:44,106 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-03-23 11:48:44,107 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-03-23 11:48:44,107 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-03-23 11:48:44,107 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-03-23 11:48:44,107 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-03-23 11:48:44,107 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_data [2018-03-23 11:48:44,107 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-03-23 11:48:44,107 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-03-23 11:48:44,107 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-03-23 11:48:44,108 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-03-23 11:48:44,108 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeData [2018-03-23 11:48:44,108 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-03-23 11:48:44,108 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append [2018-03-23 11:48:44,108 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-03-23 11:48:44,108 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-03-23 11:48:44,108 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-03-23 11:48:44,108 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-03-23 11:48:44,108 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-03-23 11:48:44,653 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-03-23 11:48:44,654 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.03 11:48:44 BoogieIcfgContainer [2018-03-23 11:48:44,654 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-03-23 11:48:44,655 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-03-23 11:48:44,655 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-03-23 11:48:44,657 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-03-23 11:48:44,657 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 23.03 11:48:43" (1/3) ... [2018-03-23 11:48:44,658 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@98ae0db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.03 11:48:44, skipping insertion in model container [2018-03-23 11:48:44,658 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 23.03 11:48:43" (2/3) ... [2018-03-23 11:48:44,658 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@98ae0db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 23.03 11:48:44, skipping insertion in model container [2018-03-23 11:48:44,658 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 23.03 11:48:44" (3/3) ... [2018-03-23 11:48:44,660 INFO L107 eAbstractionObserver]: Analyzing ICFG optional_data_creation_test04_true-valid-memsafety.i [2018-03-23 11:48:44,667 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-03-23 11:48:44,675 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 45 error locations. [2018-03-23 11:48:44,713 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-03-23 11:48:44,713 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-03-23 11:48:44,713 INFO L370 AbstractCegarLoop]: Hoare is true [2018-03-23 11:48:44,713 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-03-23 11:48:44,714 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-03-23 11:48:44,714 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-03-23 11:48:44,714 INFO L374 AbstractCegarLoop]: Difference is false [2018-03-23 11:48:44,714 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-03-23 11:48:44,714 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-03-23 11:48:44,715 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-03-23 11:48:44,733 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states. [2018-03-23 11:48:44,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-03-23 11:48:44,737 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:44,737 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:44,738 INFO L408 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:44,741 INFO L82 PathProgramCache]: Analyzing trace with hash 137384121, now seen corresponding path program 1 times [2018-03-23 11:48:44,742 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:44,742 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:44,779 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:44,779 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:44,779 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:44,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:44,819 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:44,862 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:44,865 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:44,865 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-03-23 11:48:44,867 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-03-23 11:48:44,881 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-03-23 11:48:44,882 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-03-23 11:48:44,885 INFO L87 Difference]: Start difference. First operand 148 states. Second operand 3 states. [2018-03-23 11:48:45,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:45,054 INFO L93 Difference]: Finished difference Result 288 states and 315 transitions. [2018-03-23 11:48:45,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-03-23 11:48:45,055 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-03-23 11:48:45,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:45,066 INFO L225 Difference]: With dead ends: 288 [2018-03-23 11:48:45,066 INFO L226 Difference]: Without dead ends: 147 [2018-03-23 11:48:45,070 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-03-23 11:48:45,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-03-23 11:48:45,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 144. [2018-03-23 11:48:45,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-03-23 11:48:45,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 151 transitions. [2018-03-23 11:48:45,112 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 151 transitions. Word has length 8 [2018-03-23 11:48:45,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:45,112 INFO L459 AbstractCegarLoop]: Abstraction has 144 states and 151 transitions. [2018-03-23 11:48:45,112 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-03-23 11:48:45,112 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 151 transitions. [2018-03-23 11:48:45,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-03-23 11:48:45,113 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:45,113 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:45,113 INFO L408 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:45,113 INFO L82 PathProgramCache]: Analyzing trace with hash 137384122, now seen corresponding path program 1 times [2018-03-23 11:48:45,113 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:45,113 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:45,114 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:45,114 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:45,114 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:45,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:45,129 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:45,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:45,166 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:45,166 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-03-23 11:48:45,167 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-03-23 11:48:45,167 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-03-23 11:48:45,167 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-03-23 11:48:45,167 INFO L87 Difference]: Start difference. First operand 144 states and 151 transitions. Second operand 3 states. [2018-03-23 11:48:45,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:45,326 INFO L93 Difference]: Finished difference Result 146 states and 154 transitions. [2018-03-23 11:48:45,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-03-23 11:48:45,327 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-03-23 11:48:45,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:45,329 INFO L225 Difference]: With dead ends: 146 [2018-03-23 11:48:45,329 INFO L226 Difference]: Without dead ends: 145 [2018-03-23 11:48:45,330 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-03-23 11:48:45,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-03-23 11:48:45,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 143. [2018-03-23 11:48:45,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-03-23 11:48:45,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 150 transitions. [2018-03-23 11:48:45,338 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 150 transitions. Word has length 8 [2018-03-23 11:48:45,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:45,338 INFO L459 AbstractCegarLoop]: Abstraction has 143 states and 150 transitions. [2018-03-23 11:48:45,338 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-03-23 11:48:45,338 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 150 transitions. [2018-03-23 11:48:45,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-03-23 11:48:45,338 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:45,338 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:45,339 INFO L408 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:45,339 INFO L82 PathProgramCache]: Analyzing trace with hash -1373099761, now seen corresponding path program 1 times [2018-03-23 11:48:45,339 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:45,339 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:45,340 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:45,340 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:45,340 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:45,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:45,354 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:45,417 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:45,417 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:45,418 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-03-23 11:48:45,418 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-03-23 11:48:45,418 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-03-23 11:48:45,418 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:48:45,419 INFO L87 Difference]: Start difference. First operand 143 states and 150 transitions. Second operand 5 states. [2018-03-23 11:48:45,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:45,607 INFO L93 Difference]: Finished difference Result 157 states and 165 transitions. [2018-03-23 11:48:45,608 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-03-23 11:48:45,608 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 15 [2018-03-23 11:48:45,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:45,609 INFO L225 Difference]: With dead ends: 157 [2018-03-23 11:48:45,609 INFO L226 Difference]: Without dead ends: 156 [2018-03-23 11:48:45,609 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-03-23 11:48:45,610 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-03-23 11:48:45,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 149. [2018-03-23 11:48:45,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-03-23 11:48:45,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 158 transitions. [2018-03-23 11:48:45,619 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 158 transitions. Word has length 15 [2018-03-23 11:48:45,619 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:45,620 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 158 transitions. [2018-03-23 11:48:45,620 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-03-23 11:48:45,620 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 158 transitions. [2018-03-23 11:48:45,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-03-23 11:48:45,620 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:45,621 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:45,622 INFO L408 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:45,622 INFO L82 PathProgramCache]: Analyzing trace with hash -1373099760, now seen corresponding path program 1 times [2018-03-23 11:48:45,622 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:45,623 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:45,624 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:45,624 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:45,624 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:45,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:45,638 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:45,745 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:45,745 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:45,745 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-03-23 11:48:45,746 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-03-23 11:48:45,746 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-03-23 11:48:45,746 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:48:45,746 INFO L87 Difference]: Start difference. First operand 149 states and 158 transitions. Second operand 7 states. [2018-03-23 11:48:45,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:45,991 INFO L93 Difference]: Finished difference Result 155 states and 164 transitions. [2018-03-23 11:48:45,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-03-23 11:48:45,991 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 15 [2018-03-23 11:48:45,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:45,993 INFO L225 Difference]: With dead ends: 155 [2018-03-23 11:48:45,993 INFO L226 Difference]: Without dead ends: 154 [2018-03-23 11:48:45,993 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-03-23 11:48:45,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-03-23 11:48:46,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 149. [2018-03-23 11:48:46,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-03-23 11:48:46,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 157 transitions. [2018-03-23 11:48:46,005 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 157 transitions. Word has length 15 [2018-03-23 11:48:46,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:46,005 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 157 transitions. [2018-03-23 11:48:46,005 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-03-23 11:48:46,005 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 157 transitions. [2018-03-23 11:48:46,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-03-23 11:48:46,006 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:46,006 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:46,006 INFO L408 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:46,006 INFO L82 PathProgramCache]: Analyzing trace with hash 383580412, now seen corresponding path program 1 times [2018-03-23 11:48:46,006 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:46,006 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:46,007 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:46,007 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:46,007 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:46,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:46,020 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:46,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:46,047 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:46,048 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:48:46,048 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-23 11:48:46,048 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-23 11:48:46,048 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:48:46,048 INFO L87 Difference]: Start difference. First operand 149 states and 157 transitions. Second operand 4 states. [2018-03-23 11:48:46,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:46,129 INFO L93 Difference]: Finished difference Result 149 states and 157 transitions. [2018-03-23 11:48:46,129 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-03-23 11:48:46,129 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-03-23 11:48:46,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:46,130 INFO L225 Difference]: With dead ends: 149 [2018-03-23 11:48:46,130 INFO L226 Difference]: Without dead ends: 148 [2018-03-23 11:48:46,131 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:48:46,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-03-23 11:48:46,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 148. [2018-03-23 11:48:46,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-03-23 11:48:46,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 156 transitions. [2018-03-23 11:48:46,140 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 156 transitions. Word has length 16 [2018-03-23 11:48:46,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:46,140 INFO L459 AbstractCegarLoop]: Abstraction has 148 states and 156 transitions. [2018-03-23 11:48:46,140 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-23 11:48:46,140 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 156 transitions. [2018-03-23 11:48:46,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-03-23 11:48:46,140 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:46,141 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:46,141 INFO L408 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:46,141 INFO L82 PathProgramCache]: Analyzing trace with hash 383580413, now seen corresponding path program 1 times [2018-03-23 11:48:46,141 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:46,141 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:46,141 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:46,142 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:46,142 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:46,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:46,154 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:46,185 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:46,186 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:46,186 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:48:46,186 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-23 11:48:46,186 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-23 11:48:46,186 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:48:46,186 INFO L87 Difference]: Start difference. First operand 148 states and 156 transitions. Second operand 4 states. [2018-03-23 11:48:46,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:46,256 INFO L93 Difference]: Finished difference Result 148 states and 156 transitions. [2018-03-23 11:48:46,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-03-23 11:48:46,257 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-03-23 11:48:46,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:46,258 INFO L225 Difference]: With dead ends: 148 [2018-03-23 11:48:46,258 INFO L226 Difference]: Without dead ends: 147 [2018-03-23 11:48:46,258 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:48:46,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-03-23 11:48:46,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 147. [2018-03-23 11:48:46,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-03-23 11:48:46,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 155 transitions. [2018-03-23 11:48:46,265 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 155 transitions. Word has length 16 [2018-03-23 11:48:46,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:46,265 INFO L459 AbstractCegarLoop]: Abstraction has 147 states and 155 transitions. [2018-03-23 11:48:46,265 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-23 11:48:46,265 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 155 transitions. [2018-03-23 11:48:46,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-03-23 11:48:46,266 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:46,266 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:46,266 INFO L408 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:46,266 INFO L82 PathProgramCache]: Analyzing trace with hash -334512693, now seen corresponding path program 1 times [2018-03-23 11:48:46,266 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:46,267 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:46,267 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:46,267 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:46,267 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:46,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:46,278 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:46,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:46,324 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:46,324 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-03-23 11:48:46,325 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-03-23 11:48:46,325 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-03-23 11:48:46,325 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:48:46,325 INFO L87 Difference]: Start difference. First operand 147 states and 155 transitions. Second operand 5 states. [2018-03-23 11:48:46,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:46,496 INFO L93 Difference]: Finished difference Result 158 states and 167 transitions. [2018-03-23 11:48:46,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-03-23 11:48:46,497 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-03-23 11:48:46,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:46,498 INFO L225 Difference]: With dead ends: 158 [2018-03-23 11:48:46,498 INFO L226 Difference]: Without dead ends: 157 [2018-03-23 11:48:46,499 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-03-23 11:48:46,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-03-23 11:48:46,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 150. [2018-03-23 11:48:46,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-03-23 11:48:46,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 159 transitions. [2018-03-23 11:48:46,506 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 159 transitions. Word has length 25 [2018-03-23 11:48:46,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:46,507 INFO L459 AbstractCegarLoop]: Abstraction has 150 states and 159 transitions. [2018-03-23 11:48:46,507 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-03-23 11:48:46,507 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 159 transitions. [2018-03-23 11:48:46,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-03-23 11:48:46,508 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:46,508 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:46,508 INFO L408 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:46,509 INFO L82 PathProgramCache]: Analyzing trace with hash -334512694, now seen corresponding path program 1 times [2018-03-23 11:48:46,509 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:46,509 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:46,510 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:46,510 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:46,510 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:46,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:46,522 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:46,554 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:46,554 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:46,555 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-03-23 11:48:46,555 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-03-23 11:48:46,555 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-03-23 11:48:46,555 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:48:46,555 INFO L87 Difference]: Start difference. First operand 150 states and 159 transitions. Second operand 5 states. [2018-03-23 11:48:46,664 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:46,664 INFO L93 Difference]: Finished difference Result 164 states and 173 transitions. [2018-03-23 11:48:46,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-03-23 11:48:46,665 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-03-23 11:48:46,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:46,666 INFO L225 Difference]: With dead ends: 164 [2018-03-23 11:48:46,666 INFO L226 Difference]: Without dead ends: 163 [2018-03-23 11:48:46,666 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-03-23 11:48:46,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-03-23 11:48:46,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 150. [2018-03-23 11:48:46,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-03-23 11:48:46,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 158 transitions. [2018-03-23 11:48:46,672 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 158 transitions. Word has length 25 [2018-03-23 11:48:46,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:46,672 INFO L459 AbstractCegarLoop]: Abstraction has 150 states and 158 transitions. [2018-03-23 11:48:46,672 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-03-23 11:48:46,673 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 158 transitions. [2018-03-23 11:48:46,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-03-23 11:48:46,673 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:46,673 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:46,673 INFO L408 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:46,673 INFO L82 PathProgramCache]: Analyzing trace with hash 655849899, now seen corresponding path program 1 times [2018-03-23 11:48:46,673 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:46,674 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:46,674 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:46,674 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:46,674 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:46,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:46,685 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:46,735 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:46,735 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:46,735 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:48:46,736 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-23 11:48:46,736 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-23 11:48:46,736 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:48:46,736 INFO L87 Difference]: Start difference. First operand 150 states and 158 transitions. Second operand 4 states. [2018-03-23 11:48:46,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:46,862 INFO L93 Difference]: Finished difference Result 161 states and 169 transitions. [2018-03-23 11:48:46,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-03-23 11:48:46,863 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-03-23 11:48:46,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:46,864 INFO L225 Difference]: With dead ends: 161 [2018-03-23 11:48:46,864 INFO L226 Difference]: Without dead ends: 160 [2018-03-23 11:48:46,865 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:48:46,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-03-23 11:48:46,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 152. [2018-03-23 11:48:46,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-03-23 11:48:46,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 161 transitions. [2018-03-23 11:48:46,875 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 161 transitions. Word has length 27 [2018-03-23 11:48:46,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:46,876 INFO L459 AbstractCegarLoop]: Abstraction has 152 states and 161 transitions. [2018-03-23 11:48:46,876 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-23 11:48:46,876 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 161 transitions. [2018-03-23 11:48:46,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-03-23 11:48:46,877 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:46,877 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:46,877 INFO L408 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:46,877 INFO L82 PathProgramCache]: Analyzing trace with hash 655849900, now seen corresponding path program 1 times [2018-03-23 11:48:46,877 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:46,877 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:46,878 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:46,878 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:46,879 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:46,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:46,892 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:46,945 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:46,945 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:46,945 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-03-23 11:48:46,945 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-03-23 11:48:46,946 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-03-23 11:48:46,946 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:48:46,946 INFO L87 Difference]: Start difference. First operand 152 states and 161 transitions. Second operand 7 states. [2018-03-23 11:48:47,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:47,152 INFO L93 Difference]: Finished difference Result 153 states and 161 transitions. [2018-03-23 11:48:47,152 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-03-23 11:48:47,152 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-03-23 11:48:47,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:47,153 INFO L225 Difference]: With dead ends: 153 [2018-03-23 11:48:47,154 INFO L226 Difference]: Without dead ends: 152 [2018-03-23 11:48:47,154 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2018-03-23 11:48:47,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-03-23 11:48:47,161 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 152. [2018-03-23 11:48:47,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-03-23 11:48:47,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 160 transitions. [2018-03-23 11:48:47,162 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 160 transitions. Word has length 27 [2018-03-23 11:48:47,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:47,163 INFO L459 AbstractCegarLoop]: Abstraction has 152 states and 160 transitions. [2018-03-23 11:48:47,163 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-03-23 11:48:47,163 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 160 transitions. [2018-03-23 11:48:47,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-03-23 11:48:47,164 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:47,164 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:47,164 INFO L408 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:47,164 INFO L82 PathProgramCache]: Analyzing trace with hash -9092588, now seen corresponding path program 1 times [2018-03-23 11:48:47,164 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:47,164 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:47,165 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:47,165 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:47,165 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:47,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:47,176 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:47,215 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:47,215 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:47,216 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:48:47,216 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-23 11:48:47,216 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-23 11:48:47,216 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:48:47,216 INFO L87 Difference]: Start difference. First operand 152 states and 160 transitions. Second operand 4 states. [2018-03-23 11:48:47,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:47,306 INFO L93 Difference]: Finished difference Result 152 states and 160 transitions. [2018-03-23 11:48:47,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-03-23 11:48:47,307 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-03-23 11:48:47,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:47,308 INFO L225 Difference]: With dead ends: 152 [2018-03-23 11:48:47,308 INFO L226 Difference]: Without dead ends: 148 [2018-03-23 11:48:47,309 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:48:47,309 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-03-23 11:48:47,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 148. [2018-03-23 11:48:47,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-03-23 11:48:47,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 156 transitions. [2018-03-23 11:48:47,317 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 156 transitions. Word has length 27 [2018-03-23 11:48:47,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:47,318 INFO L459 AbstractCegarLoop]: Abstraction has 148 states and 156 transitions. [2018-03-23 11:48:47,318 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-23 11:48:47,318 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 156 transitions. [2018-03-23 11:48:47,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-03-23 11:48:47,319 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:47,319 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:47,319 INFO L408 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:47,319 INFO L82 PathProgramCache]: Analyzing trace with hash -9092587, now seen corresponding path program 1 times [2018-03-23 11:48:47,319 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:47,320 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:47,320 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:47,321 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:47,321 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:47,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:47,333 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:47,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:47,393 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:47,393 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-03-23 11:48:47,393 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-03-23 11:48:47,393 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-03-23 11:48:47,393 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-03-23 11:48:47,394 INFO L87 Difference]: Start difference. First operand 148 states and 156 transitions. Second operand 4 states. [2018-03-23 11:48:47,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:47,485 INFO L93 Difference]: Finished difference Result 155 states and 163 transitions. [2018-03-23 11:48:47,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-03-23 11:48:47,486 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-03-23 11:48:47,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:47,487 INFO L225 Difference]: With dead ends: 155 [2018-03-23 11:48:47,488 INFO L226 Difference]: Without dead ends: 153 [2018-03-23 11:48:47,488 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:48:47,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-03-23 11:48:47,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 149. [2018-03-23 11:48:47,511 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-03-23 11:48:47,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 157 transitions. [2018-03-23 11:48:47,512 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 157 transitions. Word has length 27 [2018-03-23 11:48:47,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:47,513 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 157 transitions. [2018-03-23 11:48:47,513 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-03-23 11:48:47,513 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 157 transitions. [2018-03-23 11:48:47,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-03-23 11:48:47,514 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:47,514 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:47,514 INFO L408 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:47,515 INFO L82 PathProgramCache]: Analyzing trace with hash -282916863, now seen corresponding path program 1 times [2018-03-23 11:48:47,515 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:47,515 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:47,516 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:47,516 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:47,516 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:47,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:47,529 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:47,594 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:47,595 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:47,595 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-03-23 11:48:47,595 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-03-23 11:48:47,595 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-03-23 11:48:47,595 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:48:47,596 INFO L87 Difference]: Start difference. First operand 149 states and 157 transitions. Second operand 5 states. [2018-03-23 11:48:47,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:47,776 INFO L93 Difference]: Finished difference Result 149 states and 157 transitions. [2018-03-23 11:48:47,776 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-03-23 11:48:47,776 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2018-03-23 11:48:47,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:47,777 INFO L225 Difference]: With dead ends: 149 [2018-03-23 11:48:47,777 INFO L226 Difference]: Without dead ends: 146 [2018-03-23 11:48:47,778 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-03-23 11:48:47,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-03-23 11:48:47,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 144. [2018-03-23 11:48:47,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-03-23 11:48:47,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 152 transitions. [2018-03-23 11:48:47,784 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 152 transitions. Word has length 28 [2018-03-23 11:48:47,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:47,784 INFO L459 AbstractCegarLoop]: Abstraction has 144 states and 152 transitions. [2018-03-23 11:48:47,784 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-03-23 11:48:47,784 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 152 transitions. [2018-03-23 11:48:47,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-03-23 11:48:47,785 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:47,785 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:47,785 INFO L408 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:47,785 INFO L82 PathProgramCache]: Analyzing trace with hash 1471928935, now seen corresponding path program 1 times [2018-03-23 11:48:47,786 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:47,786 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:47,786 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:47,787 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:47,787 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:47,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:47,798 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:47,876 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:47,876 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:47,877 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-03-23 11:48:47,877 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-03-23 11:48:47,877 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-03-23 11:48:47,877 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:48:47,877 INFO L87 Difference]: Start difference. First operand 144 states and 152 transitions. Second operand 5 states. [2018-03-23 11:48:48,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:48,174 INFO L93 Difference]: Finished difference Result 144 states and 152 transitions. [2018-03-23 11:48:48,175 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-03-23 11:48:48,175 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2018-03-23 11:48:48,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:48,176 INFO L225 Difference]: With dead ends: 144 [2018-03-23 11:48:48,176 INFO L226 Difference]: Without dead ends: 142 [2018-03-23 11:48:48,176 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-03-23 11:48:48,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-03-23 11:48:48,182 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 140. [2018-03-23 11:48:48,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-03-23 11:48:48,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 147 transitions. [2018-03-23 11:48:48,184 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 147 transitions. Word has length 34 [2018-03-23 11:48:48,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:48,184 INFO L459 AbstractCegarLoop]: Abstraction has 140 states and 147 transitions. [2018-03-23 11:48:48,184 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-03-23 11:48:48,185 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 147 transitions. [2018-03-23 11:48:48,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-03-23 11:48:48,186 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:48,186 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:48,186 INFO L408 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:48,186 INFO L82 PathProgramCache]: Analyzing trace with hash 1471928936, now seen corresponding path program 1 times [2018-03-23 11:48:48,186 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:48,186 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:48,187 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:48,187 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:48,187 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:48,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:48,201 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:48,314 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:48,315 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:48,315 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-03-23 11:48:48,315 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-03-23 11:48:48,315 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-03-23 11:48:48,315 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-03-23 11:48:48,316 INFO L87 Difference]: Start difference. First operand 140 states and 147 transitions. Second operand 6 states. [2018-03-23 11:48:48,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:48,482 INFO L93 Difference]: Finished difference Result 154 states and 163 transitions. [2018-03-23 11:48:48,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-03-23 11:48:48,482 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2018-03-23 11:48:48,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:48,483 INFO L225 Difference]: With dead ends: 154 [2018-03-23 11:48:48,484 INFO L226 Difference]: Without dead ends: 149 [2018-03-23 11:48:48,484 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:48:48,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-03-23 11:48:48,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 141. [2018-03-23 11:48:48,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-03-23 11:48:48,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 149 transitions. [2018-03-23 11:48:48,491 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 149 transitions. Word has length 34 [2018-03-23 11:48:48,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:48,492 INFO L459 AbstractCegarLoop]: Abstraction has 141 states and 149 transitions. [2018-03-23 11:48:48,492 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-03-23 11:48:48,492 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 149 transitions. [2018-03-23 11:48:48,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-03-23 11:48:48,493 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:48,493 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:48,493 INFO L408 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:48,493 INFO L82 PathProgramCache]: Analyzing trace with hash -1186900049, now seen corresponding path program 1 times [2018-03-23 11:48:48,493 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:48,494 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:48,494 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:48,494 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:48,495 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:48,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:48,505 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:48,605 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:48,605 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:48,605 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-03-23 11:48:48,606 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-03-23 11:48:48,606 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-03-23 11:48:48,606 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:48:48,606 INFO L87 Difference]: Start difference. First operand 141 states and 149 transitions. Second operand 7 states. [2018-03-23 11:48:48,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:48,981 INFO L93 Difference]: Finished difference Result 158 states and 168 transitions. [2018-03-23 11:48:48,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-03-23 11:48:48,981 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2018-03-23 11:48:48,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:48,982 INFO L225 Difference]: With dead ends: 158 [2018-03-23 11:48:48,982 INFO L226 Difference]: Without dead ends: 157 [2018-03-23 11:48:48,983 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:48:48,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-03-23 11:48:48,990 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 148. [2018-03-23 11:48:48,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-03-23 11:48:48,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 157 transitions. [2018-03-23 11:48:48,992 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 157 transitions. Word has length 34 [2018-03-23 11:48:48,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:48,992 INFO L459 AbstractCegarLoop]: Abstraction has 148 states and 157 transitions. [2018-03-23 11:48:48,992 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-03-23 11:48:48,992 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 157 transitions. [2018-03-23 11:48:48,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-03-23 11:48:48,993 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:48,993 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:48,993 INFO L408 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:48,993 INFO L82 PathProgramCache]: Analyzing trace with hash -1186900050, now seen corresponding path program 1 times [2018-03-23 11:48:48,994 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:48,994 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:48,994 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:48,995 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:48,995 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:49,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:49,007 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:49,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:49,082 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:49,082 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-03-23 11:48:49,082 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-03-23 11:48:49,082 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-03-23 11:48:49,082 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:48:49,082 INFO L87 Difference]: Start difference. First operand 148 states and 157 transitions. Second operand 7 states. [2018-03-23 11:48:49,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:49,327 INFO L93 Difference]: Finished difference Result 158 states and 167 transitions. [2018-03-23 11:48:49,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-03-23 11:48:49,327 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2018-03-23 11:48:49,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:49,328 INFO L225 Difference]: With dead ends: 158 [2018-03-23 11:48:49,328 INFO L226 Difference]: Without dead ends: 157 [2018-03-23 11:48:49,329 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:48:49,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-03-23 11:48:49,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 148. [2018-03-23 11:48:49,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-03-23 11:48:49,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 156 transitions. [2018-03-23 11:48:49,339 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 156 transitions. Word has length 34 [2018-03-23 11:48:49,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:49,339 INFO L459 AbstractCegarLoop]: Abstraction has 148 states and 156 transitions. [2018-03-23 11:48:49,339 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-03-23 11:48:49,339 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 156 transitions. [2018-03-23 11:48:49,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-03-23 11:48:49,340 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:49,340 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:49,340 INFO L408 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:49,340 INFO L82 PathProgramCache]: Analyzing trace with hash 93975803, now seen corresponding path program 1 times [2018-03-23 11:48:49,340 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:49,340 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:49,341 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:49,341 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:49,341 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:49,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:49,351 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:49,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:49,400 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:49,400 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-03-23 11:48:49,400 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-03-23 11:48:49,401 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-03-23 11:48:49,401 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:48:49,401 INFO L87 Difference]: Start difference. First operand 148 states and 156 transitions. Second operand 5 states. [2018-03-23 11:48:49,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:49,529 INFO L93 Difference]: Finished difference Result 148 states and 156 transitions. [2018-03-23 11:48:49,529 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-03-23 11:48:49,529 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 35 [2018-03-23 11:48:49,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:49,530 INFO L225 Difference]: With dead ends: 148 [2018-03-23 11:48:49,531 INFO L226 Difference]: Without dead ends: 147 [2018-03-23 11:48:49,531 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:48:49,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-03-23 11:48:49,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 147. [2018-03-23 11:48:49,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-03-23 11:48:49,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 155 transitions. [2018-03-23 11:48:49,540 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 155 transitions. Word has length 35 [2018-03-23 11:48:49,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:49,540 INFO L459 AbstractCegarLoop]: Abstraction has 147 states and 155 transitions. [2018-03-23 11:48:49,540 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-03-23 11:48:49,540 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 155 transitions. [2018-03-23 11:48:49,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-03-23 11:48:49,541 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:49,541 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:49,541 INFO L408 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:49,542 INFO L82 PathProgramCache]: Analyzing trace with hash 93975804, now seen corresponding path program 1 times [2018-03-23 11:48:49,542 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:49,542 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:49,543 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:49,543 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:49,543 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:49,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:49,555 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:49,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:49,679 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:49,679 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-03-23 11:48:49,679 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-03-23 11:48:49,679 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-03-23 11:48:49,679 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-03-23 11:48:49,680 INFO L87 Difference]: Start difference. First operand 147 states and 155 transitions. Second operand 6 states. [2018-03-23 11:48:49,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:49,836 INFO L93 Difference]: Finished difference Result 288 states and 308 transitions. [2018-03-23 11:48:49,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-03-23 11:48:49,837 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-03-23 11:48:49,837 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:49,838 INFO L225 Difference]: With dead ends: 288 [2018-03-23 11:48:49,838 INFO L226 Difference]: Without dead ends: 156 [2018-03-23 11:48:49,839 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2018-03-23 11:48:49,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-03-23 11:48:49,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 152. [2018-03-23 11:48:49,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-03-23 11:48:49,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 160 transitions. [2018-03-23 11:48:49,848 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 160 transitions. Word has length 35 [2018-03-23 11:48:49,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:49,849 INFO L459 AbstractCegarLoop]: Abstraction has 152 states and 160 transitions. [2018-03-23 11:48:49,849 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-03-23 11:48:49,849 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 160 transitions. [2018-03-23 11:48:49,849 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-03-23 11:48:49,849 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:49,850 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:49,850 INFO L408 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:49,850 INFO L82 PathProgramCache]: Analyzing trace with hash 1850354319, now seen corresponding path program 1 times [2018-03-23 11:48:49,850 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:49,850 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:49,851 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:49,851 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:49,851 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:49,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:49,863 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:49,930 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:49,931 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:49,931 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-03-23 11:48:49,931 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-03-23 11:48:49,931 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-03-23 11:48:49,931 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:48:49,932 INFO L87 Difference]: Start difference. First operand 152 states and 160 transitions. Second operand 7 states. [2018-03-23 11:48:50,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:50,272 INFO L93 Difference]: Finished difference Result 165 states and 174 transitions. [2018-03-23 11:48:50,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-03-23 11:48:50,272 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-03-23 11:48:50,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:50,273 INFO L225 Difference]: With dead ends: 165 [2018-03-23 11:48:50,274 INFO L226 Difference]: Without dead ends: 164 [2018-03-23 11:48:50,274 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:48:50,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-03-23 11:48:50,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 154. [2018-03-23 11:48:50,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2018-03-23 11:48:50,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 163 transitions. [2018-03-23 11:48:50,284 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 163 transitions. Word has length 36 [2018-03-23 11:48:50,284 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:50,284 INFO L459 AbstractCegarLoop]: Abstraction has 154 states and 163 transitions. [2018-03-23 11:48:50,284 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-03-23 11:48:50,284 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 163 transitions. [2018-03-23 11:48:50,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-03-23 11:48:50,285 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:50,285 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:50,285 INFO L408 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:50,285 INFO L82 PathProgramCache]: Analyzing trace with hash 1850354320, now seen corresponding path program 1 times [2018-03-23 11:48:50,286 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:50,286 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:50,286 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:50,286 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:50,287 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:50,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:50,300 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:50,455 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:50,455 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:50,455 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-03-23 11:48:50,456 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-03-23 11:48:50,456 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-03-23 11:48:50,456 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:48:50,456 INFO L87 Difference]: Start difference. First operand 154 states and 163 transitions. Second operand 10 states. [2018-03-23 11:48:50,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:50,955 INFO L93 Difference]: Finished difference Result 164 states and 173 transitions. [2018-03-23 11:48:50,955 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-03-23 11:48:50,955 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-03-23 11:48:50,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:50,956 INFO L225 Difference]: With dead ends: 164 [2018-03-23 11:48:50,956 INFO L226 Difference]: Without dead ends: 163 [2018-03-23 11:48:50,957 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=73, Invalid=233, Unknown=0, NotChecked=0, Total=306 [2018-03-23 11:48:50,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-03-23 11:48:50,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 149. [2018-03-23 11:48:50,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-03-23 11:48:50,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 157 transitions. [2018-03-23 11:48:50,968 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 157 transitions. Word has length 36 [2018-03-23 11:48:50,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:50,968 INFO L459 AbstractCegarLoop]: Abstraction has 149 states and 157 transitions. [2018-03-23 11:48:50,968 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-03-23 11:48:50,968 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 157 transitions. [2018-03-23 11:48:50,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-03-23 11:48:50,969 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:50,969 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:50,969 INFO L408 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:50,969 INFO L82 PathProgramCache]: Analyzing trace with hash -941852942, now seen corresponding path program 1 times [2018-03-23 11:48:50,970 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:50,970 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:50,970 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:50,970 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:50,971 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:50,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:50,985 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:51,148 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:51,148 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:48:51,148 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:48:51,154 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:51,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:51,199 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:48:51,342 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:51,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-03-23 11:48:51,357 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:51,369 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:51,370 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:48:51,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-03-23 11:48:51,371 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:51,388 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:51,388 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:18 [2018-03-23 11:48:51,469 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:51,506 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:48:51,506 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 14 [2018-03-23 11:48:51,506 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-03-23 11:48:51,507 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-03-23 11:48:51,507 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2018-03-23 11:48:51,507 INFO L87 Difference]: Start difference. First operand 149 states and 157 transitions. Second operand 15 states. [2018-03-23 11:48:52,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:52,166 INFO L93 Difference]: Finished difference Result 167 states and 176 transitions. [2018-03-23 11:48:52,166 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-03-23 11:48:52,166 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 38 [2018-03-23 11:48:52,166 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:52,167 INFO L225 Difference]: With dead ends: 167 [2018-03-23 11:48:52,167 INFO L226 Difference]: Without dead ends: 164 [2018-03-23 11:48:52,167 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 31 SyntacticMatches, 4 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=77, Invalid=265, Unknown=0, NotChecked=0, Total=342 [2018-03-23 11:48:52,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-03-23 11:48:52,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 141. [2018-03-23 11:48:52,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-03-23 11:48:52,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 147 transitions. [2018-03-23 11:48:52,178 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 147 transitions. Word has length 38 [2018-03-23 11:48:52,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:52,179 INFO L459 AbstractCegarLoop]: Abstraction has 141 states and 147 transitions. [2018-03-23 11:48:52,179 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-03-23 11:48:52,179 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 147 transitions. [2018-03-23 11:48:52,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-03-23 11:48:52,179 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:52,180 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:52,180 INFO L408 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:52,180 INFO L82 PathProgramCache]: Analyzing trace with hash 135567723, now seen corresponding path program 1 times [2018-03-23 11:48:52,180 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:52,180 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:52,181 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:52,181 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:52,181 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:52,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:52,193 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:52,255 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:52,255 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:52,255 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-03-23 11:48:52,256 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-03-23 11:48:52,256 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-03-23 11:48:52,256 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:48:52,256 INFO L87 Difference]: Start difference. First operand 141 states and 147 transitions. Second operand 7 states. [2018-03-23 11:48:52,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:52,456 INFO L93 Difference]: Finished difference Result 167 states and 177 transitions. [2018-03-23 11:48:52,495 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-03-23 11:48:52,496 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 38 [2018-03-23 11:48:52,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:52,497 INFO L225 Difference]: With dead ends: 167 [2018-03-23 11:48:52,497 INFO L226 Difference]: Without dead ends: 166 [2018-03-23 11:48:52,497 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:48:52,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-03-23 11:48:52,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 147. [2018-03-23 11:48:52,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-03-23 11:48:52,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 155 transitions. [2018-03-23 11:48:52,508 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 155 transitions. Word has length 38 [2018-03-23 11:48:52,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:52,509 INFO L459 AbstractCegarLoop]: Abstraction has 147 states and 155 transitions. [2018-03-23 11:48:52,509 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-03-23 11:48:52,509 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 155 transitions. [2018-03-23 11:48:52,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-03-23 11:48:52,509 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:52,509 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:52,510 INFO L408 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:52,510 INFO L82 PathProgramCache]: Analyzing trace with hash 135567724, now seen corresponding path program 1 times [2018-03-23 11:48:52,510 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:52,510 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:52,511 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:52,511 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:52,511 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:52,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:52,521 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:52,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:52,659 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:52,659 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-03-23 11:48:52,659 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-03-23 11:48:52,660 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-03-23 11:48:52,660 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-03-23 11:48:52,660 INFO L87 Difference]: Start difference. First operand 147 states and 155 transitions. Second operand 9 states. [2018-03-23 11:48:53,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:53,133 INFO L93 Difference]: Finished difference Result 199 states and 213 transitions. [2018-03-23 11:48:53,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-03-23 11:48:53,134 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 38 [2018-03-23 11:48:53,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:53,135 INFO L225 Difference]: With dead ends: 199 [2018-03-23 11:48:53,136 INFO L226 Difference]: Without dead ends: 198 [2018-03-23 11:48:53,136 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-03-23 11:48:53,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states. [2018-03-23 11:48:53,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 163. [2018-03-23 11:48:53,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-03-23 11:48:53,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 173 transitions. [2018-03-23 11:48:53,149 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 173 transitions. Word has length 38 [2018-03-23 11:48:53,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:53,149 INFO L459 AbstractCegarLoop]: Abstraction has 163 states and 173 transitions. [2018-03-23 11:48:53,149 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-03-23 11:48:53,149 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 173 transitions. [2018-03-23 11:48:53,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-03-23 11:48:53,151 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:53,151 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:53,151 INFO L408 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:53,151 INFO L82 PathProgramCache]: Analyzing trace with hash 1343921866, now seen corresponding path program 1 times [2018-03-23 11:48:53,152 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:53,152 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:53,152 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:53,153 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:53,153 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:53,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:53,165 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:53,298 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:53,299 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:53,299 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-03-23 11:48:53,299 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-03-23 11:48:53,299 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-03-23 11:48:53,300 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-03-23 11:48:53,300 INFO L87 Difference]: Start difference. First operand 163 states and 173 transitions. Second operand 8 states. [2018-03-23 11:48:53,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:53,524 INFO L93 Difference]: Finished difference Result 200 states and 212 transitions. [2018-03-23 11:48:53,524 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-03-23 11:48:53,524 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 40 [2018-03-23 11:48:53,525 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:53,526 INFO L225 Difference]: With dead ends: 200 [2018-03-23 11:48:53,526 INFO L226 Difference]: Without dead ends: 194 [2018-03-23 11:48:53,526 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-03-23 11:48:53,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-03-23 11:48:53,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 163. [2018-03-23 11:48:53,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-03-23 11:48:53,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 171 transitions. [2018-03-23 11:48:53,537 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 171 transitions. Word has length 40 [2018-03-23 11:48:53,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:53,537 INFO L459 AbstractCegarLoop]: Abstraction has 163 states and 171 transitions. [2018-03-23 11:48:53,537 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-03-23 11:48:53,537 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 171 transitions. [2018-03-23 11:48:53,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-03-23 11:48:53,538 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:53,538 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:53,538 INFO L408 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:53,538 INFO L82 PathProgramCache]: Analyzing trace with hash -1240656485, now seen corresponding path program 1 times [2018-03-23 11:48:53,539 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:53,539 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:53,539 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:53,539 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:53,540 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:53,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:53,549 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:53,575 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:53,576 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:53,576 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-03-23 11:48:53,576 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-03-23 11:48:53,576 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-03-23 11:48:53,576 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-03-23 11:48:53,577 INFO L87 Difference]: Start difference. First operand 163 states and 171 transitions. Second operand 5 states. [2018-03-23 11:48:53,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:53,711 INFO L93 Difference]: Finished difference Result 163 states and 171 transitions. [2018-03-23 11:48:53,711 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-03-23 11:48:53,711 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2018-03-23 11:48:53,712 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:53,712 INFO L225 Difference]: With dead ends: 163 [2018-03-23 11:48:53,712 INFO L226 Difference]: Without dead ends: 162 [2018-03-23 11:48:53,713 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-03-23 11:48:53,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-03-23 11:48:53,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 162. [2018-03-23 11:48:53,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-03-23 11:48:53,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 170 transitions. [2018-03-23 11:48:53,719 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 170 transitions. Word has length 43 [2018-03-23 11:48:53,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:53,720 INFO L459 AbstractCegarLoop]: Abstraction has 162 states and 170 transitions. [2018-03-23 11:48:53,720 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-03-23 11:48:53,720 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 170 transitions. [2018-03-23 11:48:53,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-03-23 11:48:53,720 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:53,720 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:53,720 INFO L408 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:53,720 INFO L82 PathProgramCache]: Analyzing trace with hash -1240656484, now seen corresponding path program 1 times [2018-03-23 11:48:53,721 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:53,721 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:53,721 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:53,721 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:53,721 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:53,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:53,731 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:54,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:54,070 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:54,070 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-03-23 11:48:54,071 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-03-23 11:48:54,071 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-03-23 11:48:54,071 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:48:54,071 INFO L87 Difference]: Start difference. First operand 162 states and 170 transitions. Second operand 10 states. [2018-03-23 11:48:54,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:54,484 INFO L93 Difference]: Finished difference Result 192 states and 204 transitions. [2018-03-23 11:48:54,484 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-03-23 11:48:54,484 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2018-03-23 11:48:54,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:54,485 INFO L225 Difference]: With dead ends: 192 [2018-03-23 11:48:54,485 INFO L226 Difference]: Without dead ends: 191 [2018-03-23 11:48:54,486 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=57, Invalid=215, Unknown=0, NotChecked=0, Total=272 [2018-03-23 11:48:54,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-03-23 11:48:54,495 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 167. [2018-03-23 11:48:54,495 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-03-23 11:48:54,496 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 175 transitions. [2018-03-23 11:48:54,496 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 175 transitions. Word has length 43 [2018-03-23 11:48:54,496 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:54,497 INFO L459 AbstractCegarLoop]: Abstraction has 167 states and 175 transitions. [2018-03-23 11:48:54,497 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-03-23 11:48:54,497 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 175 transitions. [2018-03-23 11:48:54,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-03-23 11:48:54,497 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:54,498 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:54,498 INFO L408 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:54,498 INFO L82 PathProgramCache]: Analyzing trace with hash 1240414734, now seen corresponding path program 1 times [2018-03-23 11:48:54,498 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:54,498 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:54,499 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:54,499 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:54,499 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:54,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:54,512 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:54,719 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:54,719 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:48:54,719 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:48:54,729 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:54,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:54,770 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:48:54,777 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-03-23 11:48:54,777 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:54,781 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:54,781 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-03-23 11:48:54,816 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-03-23 11:48:54,823 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:48:54,824 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:54,826 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:54,842 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-03-23 11:48:54,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:48:54,846 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:54,848 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:54,856 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:54,857 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:35, output treesize:21 [2018-03-23 11:48:55,005 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-03-23 11:48:55,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-03-23 11:48:55,008 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:55,010 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:55,022 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 22 [2018-03-23 11:48:55,025 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 7 [2018-03-23 11:48:55,026 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:55,030 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:55,037 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:55,037 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:51, output treesize:15 [2018-03-23 11:48:55,082 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:55,114 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:48:55,114 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 9] total 14 [2018-03-23 11:48:55,114 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-03-23 11:48:55,114 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-03-23 11:48:55,114 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=164, Unknown=0, NotChecked=0, Total=210 [2018-03-23 11:48:55,114 INFO L87 Difference]: Start difference. First operand 167 states and 175 transitions. Second operand 15 states. [2018-03-23 11:48:55,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:55,408 INFO L93 Difference]: Finished difference Result 339 states and 359 transitions. [2018-03-23 11:48:55,408 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-03-23 11:48:55,408 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 45 [2018-03-23 11:48:55,408 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:55,409 INFO L225 Difference]: With dead ends: 339 [2018-03-23 11:48:55,409 INFO L226 Difference]: Without dead ends: 181 [2018-03-23 11:48:55,410 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 37 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=116, Invalid=346, Unknown=0, NotChecked=0, Total=462 [2018-03-23 11:48:55,410 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-03-23 11:48:55,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 177. [2018-03-23 11:48:55,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-03-23 11:48:55,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 185 transitions. [2018-03-23 11:48:55,419 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 185 transitions. Word has length 45 [2018-03-23 11:48:55,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:55,419 INFO L459 AbstractCegarLoop]: Abstraction has 177 states and 185 transitions. [2018-03-23 11:48:55,420 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-03-23 11:48:55,420 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 185 transitions. [2018-03-23 11:48:55,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-03-23 11:48:55,420 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:55,421 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:55,421 INFO L408 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:55,421 INFO L82 PathProgramCache]: Analyzing trace with hash 408094774, now seen corresponding path program 1 times [2018-03-23 11:48:55,421 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:55,421 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:55,422 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:55,422 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:55,422 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:55,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:55,437 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:55,746 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:55,746 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:55,746 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-03-23 11:48:55,746 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-03-23 11:48:55,747 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-03-23 11:48:55,747 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2018-03-23 11:48:55,747 INFO L87 Difference]: Start difference. First operand 177 states and 185 transitions. Second operand 17 states. [2018-03-23 11:48:56,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:56,453 INFO L93 Difference]: Finished difference Result 284 states and 301 transitions. [2018-03-23 11:48:56,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-03-23 11:48:56,453 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 47 [2018-03-23 11:48:56,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:56,454 INFO L225 Difference]: With dead ends: 284 [2018-03-23 11:48:56,455 INFO L226 Difference]: Without dead ends: 222 [2018-03-23 11:48:56,455 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=134, Invalid=988, Unknown=0, NotChecked=0, Total=1122 [2018-03-23 11:48:56,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-03-23 11:48:56,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 198. [2018-03-23 11:48:56,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-03-23 11:48:56,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 209 transitions. [2018-03-23 11:48:56,466 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 209 transitions. Word has length 47 [2018-03-23 11:48:56,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:56,467 INFO L459 AbstractCegarLoop]: Abstraction has 198 states and 209 transitions. [2018-03-23 11:48:56,467 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-03-23 11:48:56,467 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 209 transitions. [2018-03-23 11:48:56,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-03-23 11:48:56,467 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:56,467 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:56,468 INFO L408 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:56,468 INFO L82 PathProgramCache]: Analyzing trace with hash -1450495480, now seen corresponding path program 1 times [2018-03-23 11:48:56,468 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:56,468 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:56,468 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:56,469 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:56,469 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:56,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:56,480 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:56,635 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:56,635 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:56,635 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-03-23 11:48:56,635 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-03-23 11:48:56,636 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-03-23 11:48:56,636 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-03-23 11:48:56,636 INFO L87 Difference]: Start difference. First operand 198 states and 209 transitions. Second operand 11 states. [2018-03-23 11:48:57,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:57,139 INFO L93 Difference]: Finished difference Result 240 states and 258 transitions. [2018-03-23 11:48:57,139 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-03-23 11:48:57,139 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 47 [2018-03-23 11:48:57,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:57,141 INFO L225 Difference]: With dead ends: 240 [2018-03-23 11:48:57,141 INFO L226 Difference]: Without dead ends: 239 [2018-03-23 11:48:57,141 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=89, Invalid=331, Unknown=0, NotChecked=0, Total=420 [2018-03-23 11:48:57,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-03-23 11:48:57,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 209. [2018-03-23 11:48:57,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2018-03-23 11:48:57,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 222 transitions. [2018-03-23 11:48:57,153 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 222 transitions. Word has length 47 [2018-03-23 11:48:57,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:57,154 INFO L459 AbstractCegarLoop]: Abstraction has 209 states and 222 transitions. [2018-03-23 11:48:57,154 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-03-23 11:48:57,154 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 222 transitions. [2018-03-23 11:48:57,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-03-23 11:48:57,154 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:57,154 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:57,154 INFO L408 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:57,155 INFO L82 PathProgramCache]: Analyzing trace with hash 636696320, now seen corresponding path program 1 times [2018-03-23 11:48:57,155 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:57,155 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:57,155 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:57,156 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:57,156 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:57,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:57,163 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:57,282 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:57,283 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:57,283 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-03-23 11:48:57,283 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-03-23 11:48:57,283 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-03-23 11:48:57,284 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-03-23 11:48:57,284 INFO L87 Difference]: Start difference. First operand 209 states and 222 transitions. Second operand 8 states. [2018-03-23 11:48:57,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:57,566 INFO L93 Difference]: Finished difference Result 232 states and 246 transitions. [2018-03-23 11:48:57,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-03-23 11:48:57,611 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 52 [2018-03-23 11:48:57,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:57,614 INFO L225 Difference]: With dead ends: 232 [2018-03-23 11:48:57,614 INFO L226 Difference]: Without dead ends: 231 [2018-03-23 11:48:57,614 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-03-23 11:48:57,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2018-03-23 11:48:57,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 222. [2018-03-23 11:48:57,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 222 states. [2018-03-23 11:48:57,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 239 transitions. [2018-03-23 11:48:57,631 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 239 transitions. Word has length 52 [2018-03-23 11:48:57,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:57,632 INFO L459 AbstractCegarLoop]: Abstraction has 222 states and 239 transitions. [2018-03-23 11:48:57,632 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-03-23 11:48:57,632 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 239 transitions. [2018-03-23 11:48:57,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-03-23 11:48:57,633 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:57,633 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:57,633 INFO L408 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:57,634 INFO L82 PathProgramCache]: Analyzing trace with hash -1737250384, now seen corresponding path program 1 times [2018-03-23 11:48:57,634 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:57,634 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:57,635 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:57,635 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:57,635 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:57,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:57,646 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:57,716 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:57,716 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:57,716 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-03-23 11:48:57,717 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-03-23 11:48:57,717 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-03-23 11:48:57,717 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-03-23 11:48:57,717 INFO L87 Difference]: Start difference. First operand 222 states and 239 transitions. Second operand 6 states. [2018-03-23 11:48:57,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:57,942 INFO L93 Difference]: Finished difference Result 233 states and 250 transitions. [2018-03-23 11:48:57,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-03-23 11:48:57,943 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 53 [2018-03-23 11:48:57,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:57,944 INFO L225 Difference]: With dead ends: 233 [2018-03-23 11:48:57,944 INFO L226 Difference]: Without dead ends: 232 [2018-03-23 11:48:57,944 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-03-23 11:48:57,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 232 states. [2018-03-23 11:48:57,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 232 to 225. [2018-03-23 11:48:57,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states. [2018-03-23 11:48:57,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 243 transitions. [2018-03-23 11:48:57,960 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 243 transitions. Word has length 53 [2018-03-23 11:48:57,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:57,961 INFO L459 AbstractCegarLoop]: Abstraction has 225 states and 243 transitions. [2018-03-23 11:48:57,961 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-03-23 11:48:57,961 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 243 transitions. [2018-03-23 11:48:57,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-03-23 11:48:57,962 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:57,962 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:57,962 INFO L408 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:57,962 INFO L82 PathProgramCache]: Analyzing trace with hash -114721152, now seen corresponding path program 1 times [2018-03-23 11:48:57,962 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:57,962 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:57,963 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:57,963 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:57,963 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:57,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:57,980 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:58,134 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:58,135 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:58,135 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-03-23 11:48:58,135 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-03-23 11:48:58,135 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-03-23 11:48:58,135 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:48:58,136 INFO L87 Difference]: Start difference. First operand 225 states and 243 transitions. Second operand 10 states. [2018-03-23 11:48:58,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:58,367 INFO L93 Difference]: Finished difference Result 235 states and 250 transitions. [2018-03-23 11:48:58,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-03-23 11:48:58,367 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 52 [2018-03-23 11:48:58,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:58,369 INFO L225 Difference]: With dead ends: 235 [2018-03-23 11:48:58,369 INFO L226 Difference]: Without dead ends: 234 [2018-03-23 11:48:58,369 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2018-03-23 11:48:58,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234 states. [2018-03-23 11:48:58,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234 to 211. [2018-03-23 11:48:58,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 211 states. [2018-03-23 11:48:58,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 211 states and 227 transitions. [2018-03-23 11:48:58,385 INFO L78 Accepts]: Start accepts. Automaton has 211 states and 227 transitions. Word has length 52 [2018-03-23 11:48:58,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:58,385 INFO L459 AbstractCegarLoop]: Abstraction has 211 states and 227 transitions. [2018-03-23 11:48:58,385 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-03-23 11:48:58,385 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 227 transitions. [2018-03-23 11:48:58,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-03-23 11:48:58,386 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:58,386 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:58,387 INFO L408 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:58,387 INFO L82 PathProgramCache]: Analyzing trace with hash -70097148, now seen corresponding path program 1 times [2018-03-23 11:48:58,387 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:58,387 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:58,388 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:58,388 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:58,388 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:58,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:58,400 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:58,491 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:58,491 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:48:58,491 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-03-23 11:48:58,491 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-03-23 11:48:58,492 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-03-23 11:48:58,492 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-03-23 11:48:58,492 INFO L87 Difference]: Start difference. First operand 211 states and 227 transitions. Second operand 10 states. [2018-03-23 11:48:58,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:48:58,697 INFO L93 Difference]: Finished difference Result 260 states and 283 transitions. [2018-03-23 11:48:58,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-03-23 11:48:58,697 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 56 [2018-03-23 11:48:58,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:48:58,698 INFO L225 Difference]: With dead ends: 260 [2018-03-23 11:48:58,699 INFO L226 Difference]: Without dead ends: 259 [2018-03-23 11:48:58,699 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2018-03-23 11:48:58,699 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259 states. [2018-03-23 11:48:58,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259 to 248. [2018-03-23 11:48:58,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 248 states. [2018-03-23 11:48:58,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 271 transitions. [2018-03-23 11:48:58,710 INFO L78 Accepts]: Start accepts. Automaton has 248 states and 271 transitions. Word has length 56 [2018-03-23 11:48:58,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:48:58,710 INFO L459 AbstractCegarLoop]: Abstraction has 248 states and 271 transitions. [2018-03-23 11:48:58,710 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-03-23 11:48:58,710 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 271 transitions. [2018-03-23 11:48:58,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-03-23 11:48:58,711 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:48:58,711 INFO L353 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:48:58,711 INFO L408 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:48:58,711 INFO L82 PathProgramCache]: Analyzing trace with hash 71749792, now seen corresponding path program 2 times [2018-03-23 11:48:58,711 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:48:58,711 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:48:58,712 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:58,712 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:48:58,712 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:48:58,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:48:58,721 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:48:58,943 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:58,943 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:48:58,943 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:48:58,951 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-03-23 11:48:58,983 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-03-23 11:48:58,984 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-03-23 11:48:58,988 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:48:58,992 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-03-23 11:48:58,992 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:58,999 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:58,999 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-03-23 11:48:59,023 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-03-23 11:48:59,025 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:48:59,026 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:59,028 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:59,037 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-03-23 11:48:59,046 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:48:59,047 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:59,055 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:59,064 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:59,064 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:35, output treesize:21 [2018-03-23 11:48:59,333 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-03-23 11:48:59,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 5 [2018-03-23 11:48:59,335 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:59,337 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:59,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26 [2018-03-23 11:48:59,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 11 [2018-03-23 11:48:59,349 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:48:59,352 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:48:59,358 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:48:59,358 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:60, output treesize:24 [2018-03-23 11:48:59,387 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 14 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:48:59,408 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:48:59,408 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11] total 20 [2018-03-23 11:48:59,408 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-03-23 11:48:59,409 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-03-23 11:48:59,409 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=354, Unknown=0, NotChecked=0, Total=420 [2018-03-23 11:48:59,409 INFO L87 Difference]: Start difference. First operand 248 states and 271 transitions. Second operand 21 states. [2018-03-23 11:49:00,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:49:00,283 INFO L93 Difference]: Finished difference Result 470 states and 517 transitions. [2018-03-23 11:49:00,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-03-23 11:49:00,283 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 55 [2018-03-23 11:49:00,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:49:00,285 INFO L225 Difference]: With dead ends: 470 [2018-03-23 11:49:00,285 INFO L226 Difference]: Without dead ends: 261 [2018-03-23 11:49:00,286 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 82 GetRequests, 45 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 242 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=293, Invalid=1113, Unknown=0, NotChecked=0, Total=1406 [2018-03-23 11:49:00,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261 states. [2018-03-23 11:49:00,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261 to 254. [2018-03-23 11:49:00,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2018-03-23 11:49:00,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 277 transitions. [2018-03-23 11:49:00,303 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 277 transitions. Word has length 55 [2018-03-23 11:49:00,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:49:00,304 INFO L459 AbstractCegarLoop]: Abstraction has 254 states and 277 transitions. [2018-03-23 11:49:00,304 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-03-23 11:49:00,304 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 277 transitions. [2018-03-23 11:49:00,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-03-23 11:49:00,305 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:49:00,305 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:49:00,305 INFO L408 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:49:00,305 INFO L82 PathProgramCache]: Analyzing trace with hash 864575258, now seen corresponding path program 1 times [2018-03-23 11:49:00,306 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:49:00,306 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:49:00,306 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:00,307 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-03-23 11:49:00,307 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:00,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:00,321 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:49:00,608 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:49:00,608 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:49:00,609 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-03-23 11:49:00,609 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-03-23 11:49:00,609 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-03-23 11:49:00,609 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=270, Unknown=0, NotChecked=0, Total=306 [2018-03-23 11:49:00,609 INFO L87 Difference]: Start difference. First operand 254 states and 277 transitions. Second operand 18 states. [2018-03-23 11:49:01,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:49:01,332 INFO L93 Difference]: Finished difference Result 295 states and 323 transitions. [2018-03-23 11:49:01,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-03-23 11:49:01,332 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 56 [2018-03-23 11:49:01,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:49:01,334 INFO L225 Difference]: With dead ends: 295 [2018-03-23 11:49:01,334 INFO L226 Difference]: Without dead ends: 292 [2018-03-23 11:49:01,334 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 185 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=135, Invalid=1055, Unknown=0, NotChecked=0, Total=1190 [2018-03-23 11:49:01,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states. [2018-03-23 11:49:01,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 260. [2018-03-23 11:49:01,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 260 states. [2018-03-23 11:49:01,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 260 states to 260 states and 285 transitions. [2018-03-23 11:49:01,348 INFO L78 Accepts]: Start accepts. Automaton has 260 states and 285 transitions. Word has length 56 [2018-03-23 11:49:01,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:49:01,348 INFO L459 AbstractCegarLoop]: Abstraction has 260 states and 285 transitions. [2018-03-23 11:49:01,348 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-03-23 11:49:01,348 INFO L276 IsEmpty]: Start isEmpty. Operand 260 states and 285 transitions. [2018-03-23 11:49:01,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-03-23 11:49:01,349 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:49:01,349 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:49:01,349 INFO L408 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:49:01,350 INFO L82 PathProgramCache]: Analyzing trace with hash 864575259, now seen corresponding path program 1 times [2018-03-23 11:49:01,350 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:49:01,350 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:49:01,351 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:01,351 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:49:01,351 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:01,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:01,365 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:49:01,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:49:01,841 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:49:01,841 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-03-23 11:49:01,841 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-03-23 11:49:01,841 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-03-23 11:49:01,841 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=303, Unknown=0, NotChecked=0, Total=342 [2018-03-23 11:49:01,842 INFO L87 Difference]: Start difference. First operand 260 states and 285 transitions. Second operand 19 states. [2018-03-23 11:49:02,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:49:02,761 INFO L93 Difference]: Finished difference Result 318 states and 348 transitions. [2018-03-23 11:49:02,761 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-03-23 11:49:02,761 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 56 [2018-03-23 11:49:02,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:49:02,763 INFO L225 Difference]: With dead ends: 318 [2018-03-23 11:49:02,763 INFO L226 Difference]: Without dead ends: 315 [2018-03-23 11:49:02,763 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 269 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=157, Invalid=1325, Unknown=0, NotChecked=0, Total=1482 [2018-03-23 11:49:02,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2018-03-23 11:49:02,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 286. [2018-03-23 11:49:02,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 286 states. [2018-03-23 11:49:02,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 286 states to 286 states and 316 transitions. [2018-03-23 11:49:02,781 INFO L78 Accepts]: Start accepts. Automaton has 286 states and 316 transitions. Word has length 56 [2018-03-23 11:49:02,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:49:02,782 INFO L459 AbstractCegarLoop]: Abstraction has 286 states and 316 transitions. [2018-03-23 11:49:02,782 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-03-23 11:49:02,782 INFO L276 IsEmpty]: Start isEmpty. Operand 286 states and 316 transitions. [2018-03-23 11:49:02,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-03-23 11:49:02,783 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:49:02,783 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:49:02,783 INFO L408 AbstractCegarLoop]: === Iteration 38 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:49:02,784 INFO L82 PathProgramCache]: Analyzing trace with hash 1811081757, now seen corresponding path program 1 times [2018-03-23 11:49:02,784 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:49:02,784 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:49:02,784 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:02,785 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:49:02,785 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:02,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:02,803 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:49:03,351 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:49:03,351 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:49:03,351 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2018-03-23 11:49:03,351 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-03-23 11:49:03,351 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-03-23 11:49:03,352 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=455, Unknown=0, NotChecked=0, Total=506 [2018-03-23 11:49:03,352 INFO L87 Difference]: Start difference. First operand 286 states and 316 transitions. Second operand 23 states. [2018-03-23 11:49:04,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:49:04,509 INFO L93 Difference]: Finished difference Result 369 states and 407 transitions. [2018-03-23 11:49:04,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-03-23 11:49:04,509 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 60 [2018-03-23 11:49:04,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:49:04,511 INFO L225 Difference]: With dead ends: 369 [2018-03-23 11:49:04,511 INFO L226 Difference]: Without dead ends: 367 [2018-03-23 11:49:04,512 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 532 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=220, Invalid=2132, Unknown=0, NotChecked=0, Total=2352 [2018-03-23 11:49:04,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 367 states. [2018-03-23 11:49:04,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 367 to 321. [2018-03-23 11:49:04,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 321 states. [2018-03-23 11:49:04,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 358 transitions. [2018-03-23 11:49:04,526 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 358 transitions. Word has length 60 [2018-03-23 11:49:04,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:49:04,526 INFO L459 AbstractCegarLoop]: Abstraction has 321 states and 358 transitions. [2018-03-23 11:49:04,526 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-03-23 11:49:04,527 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 358 transitions. [2018-03-23 11:49:04,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-03-23 11:49:04,527 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:49:04,528 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:49:04,528 INFO L408 AbstractCegarLoop]: === Iteration 39 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:49:04,528 INFO L82 PathProgramCache]: Analyzing trace with hash 308959831, now seen corresponding path program 1 times [2018-03-23 11:49:04,528 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:49:04,528 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:49:04,529 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:04,529 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:49:04,529 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:04,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:04,546 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:49:05,398 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:49:05,398 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:49:05,398 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2018-03-23 11:49:05,398 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-03-23 11:49:05,399 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-03-23 11:49:05,399 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=455, Unknown=0, NotChecked=0, Total=506 [2018-03-23 11:49:05,399 INFO L87 Difference]: Start difference. First operand 321 states and 358 transitions. Second operand 23 states. [2018-03-23 11:49:06,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:49:06,559 INFO L93 Difference]: Finished difference Result 367 states and 403 transitions. [2018-03-23 11:49:06,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-03-23 11:49:06,559 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 61 [2018-03-23 11:49:06,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:49:06,561 INFO L225 Difference]: With dead ends: 367 [2018-03-23 11:49:06,561 INFO L226 Difference]: Without dead ends: 366 [2018-03-23 11:49:06,562 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 532 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=220, Invalid=2132, Unknown=0, NotChecked=0, Total=2352 [2018-03-23 11:49:06,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366 states. [2018-03-23 11:49:06,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366 to 321. [2018-03-23 11:49:06,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 321 states. [2018-03-23 11:49:06,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 356 transitions. [2018-03-23 11:49:06,575 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 356 transitions. Word has length 61 [2018-03-23 11:49:06,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:49:06,575 INFO L459 AbstractCegarLoop]: Abstraction has 321 states and 356 transitions. [2018-03-23 11:49:06,575 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-03-23 11:49:06,575 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 356 transitions. [2018-03-23 11:49:06,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-03-23 11:49:06,576 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:49:06,576 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:49:06,576 INFO L408 AbstractCegarLoop]: === Iteration 40 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:49:06,576 INFO L82 PathProgramCache]: Analyzing trace with hash 1492359050, now seen corresponding path program 1 times [2018-03-23 11:49:06,576 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:49:06,576 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:49:06,577 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:06,577 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:49:06,577 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:06,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:06,588 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:49:07,053 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:49:07,053 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:49:07,053 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:49:07,058 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:49:07,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:07,086 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:49:07,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:49:07,135 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:49:07,136 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,138 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,150 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:49:07,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:49:07,159 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,160 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,166 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,166 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:26, output treesize:18 [2018-03-23 11:49:07,340 WARN L1033 $PredicateComparison]: unable to prove that (exists ((__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base| Int) (|__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset| Int)) (and (= (let ((.cse0 (store |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.offset)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.offset)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.offset|)))) (store .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse0 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| 0))) |c_#memory_$Pointer$.offset|) (= |c_#memory_$Pointer$.base| (let ((.cse1 (store |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base (store (store (select |c_old(#memory_$Pointer$.base)| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base) 4 (select (select |c_old(#memory_$Pointer$.base)| |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset|)) 0 |__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#t~ret14.base|)))) (store .cse1 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base| (store (select .cse1 |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.base|) |c___U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_#in~pointerToList.offset| __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__append_~node~0.base)))))) is different from true [2018-03-23 11:49:07,436 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 39 [2018-03-23 11:49:07,439 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:07,439 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-03-23 11:49:07,448 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 33 [2018-03-23 11:49:07,448 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,455 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,466 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 19 [2018-03-23 11:49:07,468 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:07,470 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-03-23 11:49:07,471 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,475 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,481 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,489 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 38 [2018-03-23 11:49:07,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-03-23 11:49:07,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-03-23 11:49:07,496 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,500 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,514 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:07,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 34 [2018-03-23 11:49:07,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-03-23 11:49:07,519 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,525 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,532 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,581 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 38 [2018-03-23 11:49:07,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-03-23 11:49:07,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-03-23 11:49:07,589 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,594 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,606 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 34 [2018-03-23 11:49:07,610 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-03-23 11:49:07,610 INFO L267 ElimStorePlain]: Start of recursive call 16: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,615 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,621 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 39 [2018-03-23 11:49:07,629 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:07,630 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-03-23 11:49:07,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 33 [2018-03-23 11:49:07,635 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,641 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 19 [2018-03-23 11:49:07,651 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:07,653 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-03-23 11:49:07,654 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,658 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,662 INFO L267 ElimStorePlain]: Start of recursive call 17: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:07,682 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 4 xjuncts. [2018-03-23 11:49:07,683 INFO L202 ElimStorePlain]: Needed 21 recursive calls to eliminate 5 variables, input treesize:100, output treesize:153 [2018-03-23 11:49:08,027 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-03-23 11:49:08,027 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,039 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:49:08,039 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:84, output treesize:83 [2018-03-23 11:49:08,096 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,097 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,097 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:49:08,098 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,115 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:08,116 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:08,122 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 73 [2018-03-23 11:49:08,128 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 54 [2018-03-23 11:49:08,128 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,137 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,151 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:08,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 69 [2018-03-23 11:49:08,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 74 [2018-03-23 11:49:08,157 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,164 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,173 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:49:08,173 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:104, output treesize:64 [2018-03-23 11:49:08,226 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-03-23 11:49:08,231 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:08,231 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 15 [2018-03-23 11:49:08,232 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-03-23 11:49:08,237 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,239 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,245 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2018-03-23 11:49:08,247 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-03-23 11:49:08,247 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,251 INFO L682 Elim1Store]: detected equality via solver [2018-03-23 11:49:08,252 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 9 [2018-03-23 11:49:08,252 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,254 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,257 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:08,258 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:75, output treesize:7 [2018-03-23 11:49:08,297 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:49:08,318 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:49:08,318 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 21] total 33 [2018-03-23 11:49:08,318 INFO L442 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-03-23 11:49:08,319 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-03-23 11:49:08,319 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=861, Unknown=13, NotChecked=60, Total=1056 [2018-03-23 11:49:08,319 INFO L87 Difference]: Start difference. First operand 321 states and 356 transitions. Second operand 33 states. [2018-03-23 11:49:09,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:49:09,638 INFO L93 Difference]: Finished difference Result 409 states and 452 transitions. [2018-03-23 11:49:09,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-03-23 11:49:09,639 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 62 [2018-03-23 11:49:09,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:49:09,640 INFO L225 Difference]: With dead ends: 409 [2018-03-23 11:49:09,641 INFO L226 Difference]: Without dead ends: 344 [2018-03-23 11:49:09,642 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 50 SyntacticMatches, 4 SemanticMatches, 47 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 548 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=269, Invalid=1977, Unknown=14, NotChecked=92, Total=2352 [2018-03-23 11:49:09,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 344 states. [2018-03-23 11:49:09,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 344 to 332. [2018-03-23 11:49:09,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 332 states. [2018-03-23 11:49:09,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 332 states to 332 states and 367 transitions. [2018-03-23 11:49:09,655 INFO L78 Accepts]: Start accepts. Automaton has 332 states and 367 transitions. Word has length 62 [2018-03-23 11:49:09,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:49:09,656 INFO L459 AbstractCegarLoop]: Abstraction has 332 states and 367 transitions. [2018-03-23 11:49:09,656 INFO L460 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-03-23 11:49:09,656 INFO L276 IsEmpty]: Start isEmpty. Operand 332 states and 367 transitions. [2018-03-23 11:49:09,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-03-23 11:49:09,657 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:49:09,657 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:49:09,657 INFO L408 AbstractCegarLoop]: === Iteration 41 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:49:09,657 INFO L82 PathProgramCache]: Analyzing trace with hash -1935173768, now seen corresponding path program 1 times [2018-03-23 11:49:09,658 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:49:09,658 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:49:09,658 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:09,659 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:49:09,659 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:09,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:09,674 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:49:09,959 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-03-23 11:49:09,959 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:49:09,959 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:49:09,964 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:49:09,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:09,999 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:49:10,121 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:49:10,123 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:49:10,123 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:10,124 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:10,130 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:10,130 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:21 [2018-03-23 11:49:10,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:49:10,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:49:10,158 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:10,160 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:10,176 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-03-23 11:49:10,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-03-23 11:49:10,179 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:10,201 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 35 [2018-03-23 11:49:10,202 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-03-23 11:49:10,215 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-03-23 11:49:10,228 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-03-23 11:49:10,229 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:37, output treesize:53 [2018-03-23 11:49:10,264 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-03-23 11:49:10,264 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:10,270 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:10,271 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:10,272 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:49:10,272 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:10,276 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:10,277 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:69, output treesize:29 [2018-03-23 11:49:10,318 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-03-23 11:49:10,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-03-23 11:49:10,335 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:10,338 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:10,343 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:49:10,343 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:40, output treesize:29 [2018-03-23 11:49:10,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 24 [2018-03-23 11:49:10,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 4 [2018-03-23 11:49:10,378 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:10,384 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-03-23 11:49:10,384 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:10,386 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:10,386 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:10,387 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:33, output treesize:5 [2018-03-23 11:49:10,412 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:49:10,434 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:49:10,434 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 27 [2018-03-23 11:49:10,434 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-03-23 11:49:10,434 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-03-23 11:49:10,435 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=681, Unknown=0, NotChecked=0, Total=756 [2018-03-23 11:49:10,435 INFO L87 Difference]: Start difference. First operand 332 states and 367 transitions. Second operand 28 states. [2018-03-23 11:49:11,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:49:11,371 INFO L93 Difference]: Finished difference Result 379 states and 418 transitions. [2018-03-23 11:49:11,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-03-23 11:49:11,372 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 79 [2018-03-23 11:49:11,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:49:11,373 INFO L225 Difference]: With dead ends: 379 [2018-03-23 11:49:11,373 INFO L226 Difference]: Without dead ends: 378 [2018-03-23 11:49:11,374 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 65 SyntacticMatches, 10 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 491 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=234, Invalid=2022, Unknown=0, NotChecked=0, Total=2256 [2018-03-23 11:49:11,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 378 states. [2018-03-23 11:49:11,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 378 to 342. [2018-03-23 11:49:11,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 342 states. [2018-03-23 11:49:11,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 342 states to 342 states and 378 transitions. [2018-03-23 11:49:11,387 INFO L78 Accepts]: Start accepts. Automaton has 342 states and 378 transitions. Word has length 79 [2018-03-23 11:49:11,387 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:49:11,388 INFO L459 AbstractCegarLoop]: Abstraction has 342 states and 378 transitions. [2018-03-23 11:49:11,388 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-03-23 11:49:11,388 INFO L276 IsEmpty]: Start isEmpty. Operand 342 states and 378 transitions. [2018-03-23 11:49:11,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-03-23 11:49:11,388 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:49:11,388 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:49:11,389 INFO L408 AbstractCegarLoop]: === Iteration 42 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:49:11,389 INFO L82 PathProgramCache]: Analyzing trace with hash -1935173767, now seen corresponding path program 1 times [2018-03-23 11:49:11,389 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:49:11,389 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:49:11,389 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:11,389 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:49:11,389 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:11,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:11,401 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:49:11,865 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-03-23 11:49:11,865 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:49:11,865 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:49:11,871 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:49:11,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:11,912 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:49:12,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:49:12,172 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:49:12,172 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:12,174 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:12,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:49:12,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:49:12,184 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:12,186 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:12,192 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:12,192 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:39, output treesize:28 [2018-03-23 11:49:12,235 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-03-23 11:49:12,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-03-23 11:49:12,238 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:12,257 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-03-23 11:49:12,257 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-03-23 11:49:12,267 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:49:12,290 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 33 [2018-03-23 11:49:12,299 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 19 treesize of output 27 [2018-03-23 11:49:12,300 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-03-23 11:49:12,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 17 [2018-03-23 11:49:12,319 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:12,330 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-03-23 11:49:12,352 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 4 xjuncts. [2018-03-23 11:49:12,352 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:44, output treesize:133 [2018-03-23 11:49:12,414 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:12,415 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:12,415 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2018-03-23 11:49:12,416 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:12,429 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:12,429 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:84, output treesize:44 [2018-03-23 11:49:12,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 58 [2018-03-23 11:49:12,496 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-03-23 11:49:12,497 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:49:12,505 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 5 [2018-03-23 11:49:12,505 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:12,510 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:49:12,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-03-23 11:49:12,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-03-23 11:49:12,517 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:49:12,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-03-23 11:49:12,522 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:12,524 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:12,527 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:12,527 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:71, output treesize:9 [2018-03-23 11:49:12,604 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:49:12,626 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:49:12,626 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 21] total 35 [2018-03-23 11:49:12,626 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-03-23 11:49:12,626 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-03-23 11:49:12,627 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=1166, Unknown=0, NotChecked=0, Total=1260 [2018-03-23 11:49:12,627 INFO L87 Difference]: Start difference. First operand 342 states and 378 transitions. Second operand 36 states. [2018-03-23 11:49:14,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:49:14,504 INFO L93 Difference]: Finished difference Result 426 states and 467 transitions. [2018-03-23 11:49:14,505 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-03-23 11:49:14,505 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 79 [2018-03-23 11:49:14,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:49:14,506 INFO L225 Difference]: With dead ends: 426 [2018-03-23 11:49:14,506 INFO L226 Difference]: Without dead ends: 423 [2018-03-23 11:49:14,507 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 63 SyntacticMatches, 7 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1228 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=428, Invalid=4974, Unknown=0, NotChecked=0, Total=5402 [2018-03-23 11:49:14,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 423 states. [2018-03-23 11:49:14,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 423 to 357. [2018-03-23 11:49:14,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 357 states. [2018-03-23 11:49:14,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 357 states to 357 states and 393 transitions. [2018-03-23 11:49:14,525 INFO L78 Accepts]: Start accepts. Automaton has 357 states and 393 transitions. Word has length 79 [2018-03-23 11:49:14,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:49:14,525 INFO L459 AbstractCegarLoop]: Abstraction has 357 states and 393 transitions. [2018-03-23 11:49:14,525 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-03-23 11:49:14,525 INFO L276 IsEmpty]: Start isEmpty. Operand 357 states and 393 transitions. [2018-03-23 11:49:14,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-03-23 11:49:14,526 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:49:14,526 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:49:14,526 INFO L408 AbstractCegarLoop]: === Iteration 43 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:49:14,526 INFO L82 PathProgramCache]: Analyzing trace with hash 1577537048, now seen corresponding path program 1 times [2018-03-23 11:49:14,526 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:49:14,526 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:49:14,527 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:14,527 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:49:14,527 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:14,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:14,540 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:49:14,875 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-03-23 11:49:14,875 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:49:14,875 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:49:14,880 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:49:14,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:14,911 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:49:15,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:49:15,005 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:49:15,005 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:15,007 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:15,017 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:49:15,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:49:15,019 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:15,020 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:15,026 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:15,027 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:34, output treesize:26 [2018-03-23 11:49:15,067 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-03-23 11:49:15,074 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-03-23 11:49:15,075 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-03-23 11:49:15,092 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-03-23 11:49:15,092 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:15,103 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:49:15,126 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-03-23 11:49:15,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-03-23 11:49:15,129 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:15,149 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-03-23 11:49:15,149 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-03-23 11:49:15,159 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-03-23 11:49:15,178 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-03-23 11:49:15,178 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:42, output treesize:123 [2018-03-23 11:49:15,224 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-03-23 11:49:15,224 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:15,231 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:15,232 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:49:15,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:49:15,232 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:15,237 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:15,237 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:77, output treesize:42 [2018-03-23 11:49:15,291 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-03-23 11:49:15,293 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-03-23 11:49:15,293 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:49:15,299 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2018-03-23 11:49:15,299 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:15,304 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:49:15,310 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-03-23 11:49:15,311 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-03-23 11:49:15,311 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:49:15,315 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-03-23 11:49:15,316 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:15,317 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:15,321 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:15,321 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:69, output treesize:7 [2018-03-23 11:49:15,341 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:49:15,362 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:49:15,362 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 27 [2018-03-23 11:49:15,362 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-03-23 11:49:15,363 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-03-23 11:49:15,363 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=626, Unknown=3, NotChecked=0, Total=702 [2018-03-23 11:49:15,363 INFO L87 Difference]: Start difference. First operand 357 states and 393 transitions. Second operand 27 states. [2018-03-23 11:49:16,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:49:16,310 INFO L93 Difference]: Finished difference Result 452 states and 495 transitions. [2018-03-23 11:49:16,310 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-03-23 11:49:16,310 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 70 [2018-03-23 11:49:16,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:49:16,311 INFO L225 Difference]: With dead ends: 452 [2018-03-23 11:49:16,311 INFO L226 Difference]: Without dead ends: 383 [2018-03-23 11:49:16,312 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 58 SyntacticMatches, 7 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 499 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=251, Invalid=2002, Unknown=3, NotChecked=0, Total=2256 [2018-03-23 11:49:16,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 383 states. [2018-03-23 11:49:16,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 383 to 361. [2018-03-23 11:49:16,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 361 states. [2018-03-23 11:49:16,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 361 states to 361 states and 395 transitions. [2018-03-23 11:49:16,327 INFO L78 Accepts]: Start accepts. Automaton has 361 states and 395 transitions. Word has length 70 [2018-03-23 11:49:16,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:49:16,328 INFO L459 AbstractCegarLoop]: Abstraction has 361 states and 395 transitions. [2018-03-23 11:49:16,328 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-03-23 11:49:16,328 INFO L276 IsEmpty]: Start isEmpty. Operand 361 states and 395 transitions. [2018-03-23 11:49:16,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-03-23 11:49:16,328 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:49:16,328 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:49:16,328 INFO L408 AbstractCegarLoop]: === Iteration 44 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:49:16,329 INFO L82 PathProgramCache]: Analyzing trace with hash -449670871, now seen corresponding path program 1 times [2018-03-23 11:49:16,329 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:49:16,329 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:49:16,329 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:16,329 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:49:16,329 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:49:16,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:16,339 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:49:16,635 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:49:16,635 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:49:16,635 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:49:16,643 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:49:16,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:49:16,672 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:49:16,732 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:49:16,733 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:49:16,733 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:16,735 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:16,739 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:16,739 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:23, output treesize:20 [2018-03-23 11:49:16,784 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:49:16,784 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:16,787 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:49:16,787 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:21, output treesize:12 [2018-03-23 11:49:22,822 WARN L148 SmtUtils]: Spent 2003ms on a formula simplification that was a NOOP. DAG size: 12 [2018-03-23 11:49:22,843 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-03-23 11:49:22,844 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 18 [2018-03-23 11:49:22,845 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:49:22,847 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:22,851 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:49:22,851 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:23 [2018-03-23 11:49:22,909 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_~#list~0.base| Int) (|main_#t~mem20.base| Int)) (let ((.cse0 (store |c_old(#valid)| |main_~#list~0.base| 1))) (and (= 0 (select |c_old(#valid)| |main_~#list~0.base|)) (= (store (store .cse0 |main_#t~mem20.base| 0) |main_~#list~0.base| 0) |c_#valid|) (= 0 (select .cse0 |main_#t~mem20.base|))))) is different from true [2018-03-23 11:49:22,922 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:49:22,943 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:49:22,943 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 12] total 19 [2018-03-23 11:49:22,944 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-03-23 11:49:22,944 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-03-23 11:49:22,944 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=292, Unknown=5, NotChecked=34, Total=380 [2018-03-23 11:49:22,944 INFO L87 Difference]: Start difference. First operand 361 states and 395 transitions. Second operand 20 states. [2018-03-23 11:49:51,170 WARN L148 SmtUtils]: Spent 2005ms on a formula simplification that was a NOOP. DAG size: 18 [2018-03-23 11:50:38,544 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:50:38,545 INFO L93 Difference]: Finished difference Result 377 states and 412 transitions. [2018-03-23 11:50:38,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-03-23 11:50:38,545 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 64 [2018-03-23 11:50:38,545 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:50:38,546 INFO L225 Difference]: With dead ends: 377 [2018-03-23 11:50:38,547 INFO L226 Difference]: Without dead ends: 343 [2018-03-23 11:50:38,547 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 57 SyntacticMatches, 6 SemanticMatches, 27 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 12.5s TimeCoverageRelationStatistics Valid=108, Invalid=644, Unknown=8, NotChecked=52, Total=812 [2018-03-23 11:50:38,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 343 states. [2018-03-23 11:50:38,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 343 to 333. [2018-03-23 11:50:38,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 333 states. [2018-03-23 11:50:38,561 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 333 states to 333 states and 366 transitions. [2018-03-23 11:50:38,561 INFO L78 Accepts]: Start accepts. Automaton has 333 states and 366 transitions. Word has length 64 [2018-03-23 11:50:38,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:50:38,562 INFO L459 AbstractCegarLoop]: Abstraction has 333 states and 366 transitions. [2018-03-23 11:50:38,562 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-03-23 11:50:38,562 INFO L276 IsEmpty]: Start isEmpty. Operand 333 states and 366 transitions. [2018-03-23 11:50:38,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-03-23 11:50:38,563 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:50:38,563 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:50:38,563 INFO L408 AbstractCegarLoop]: === Iteration 45 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:50:38,564 INFO L82 PathProgramCache]: Analyzing trace with hash -958699334, now seen corresponding path program 1 times [2018-03-23 11:50:38,564 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:50:38,564 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:50:38,564 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:38,565 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:38,565 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:38,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:38,582 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:50:39,268 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:50:39,268 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:50:39,268 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2018-03-23 11:50:39,268 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-03-23 11:50:39,269 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-03-23 11:50:39,269 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=589, Unknown=0, NotChecked=0, Total=650 [2018-03-23 11:50:39,269 INFO L87 Difference]: Start difference. First operand 333 states and 366 transitions. Second operand 26 states. [2018-03-23 11:50:40,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:50:40,718 INFO L93 Difference]: Finished difference Result 376 states and 412 transitions. [2018-03-23 11:50:40,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-03-23 11:50:40,718 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 65 [2018-03-23 11:50:40,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:50:40,719 INFO L225 Difference]: With dead ends: 376 [2018-03-23 11:50:40,719 INFO L226 Difference]: Without dead ends: 375 [2018-03-23 11:50:40,720 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 59 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 745 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=288, Invalid=2904, Unknown=0, NotChecked=0, Total=3192 [2018-03-23 11:50:40,721 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 375 states. [2018-03-23 11:50:40,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 375 to 329. [2018-03-23 11:50:40,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 329 states. [2018-03-23 11:50:40,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 360 transitions. [2018-03-23 11:50:40,734 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 360 transitions. Word has length 65 [2018-03-23 11:50:40,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:50:40,735 INFO L459 AbstractCegarLoop]: Abstraction has 329 states and 360 transitions. [2018-03-23 11:50:40,735 INFO L460 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-03-23 11:50:40,735 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 360 transitions. [2018-03-23 11:50:40,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-03-23 11:50:40,735 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:50:40,735 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:50:40,736 INFO L408 AbstractCegarLoop]: === Iteration 46 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:50:40,736 INFO L82 PathProgramCache]: Analyzing trace with hash -1212442946, now seen corresponding path program 1 times [2018-03-23 11:50:40,736 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:50:40,736 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:50:40,736 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:40,736 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:40,737 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:40,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:40,745 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:50:41,435 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:50:41,435 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:50:41,435 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-03-23 11:50:41,435 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-03-23 11:50:41,436 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-03-23 11:50:41,436 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=330, Unknown=0, NotChecked=0, Total=380 [2018-03-23 11:50:41,436 INFO L87 Difference]: Start difference. First operand 329 states and 360 transitions. Second operand 20 states. [2018-03-23 11:50:42,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:50:42,077 INFO L93 Difference]: Finished difference Result 374 states and 409 transitions. [2018-03-23 11:50:42,077 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-03-23 11:50:42,077 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 66 [2018-03-23 11:50:42,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:50:42,079 INFO L225 Difference]: With dead ends: 374 [2018-03-23 11:50:42,079 INFO L226 Difference]: Without dead ends: 373 [2018-03-23 11:50:42,079 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 230 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=140, Invalid=982, Unknown=0, NotChecked=0, Total=1122 [2018-03-23 11:50:42,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 373 states. [2018-03-23 11:50:42,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 373 to 348. [2018-03-23 11:50:42,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 348 states. [2018-03-23 11:50:42,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 348 states to 348 states and 380 transitions. [2018-03-23 11:50:42,093 INFO L78 Accepts]: Start accepts. Automaton has 348 states and 380 transitions. Word has length 66 [2018-03-23 11:50:42,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:50:42,093 INFO L459 AbstractCegarLoop]: Abstraction has 348 states and 380 transitions. [2018-03-23 11:50:42,093 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-03-23 11:50:42,093 INFO L276 IsEmpty]: Start isEmpty. Operand 348 states and 380 transitions. [2018-03-23 11:50:42,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-03-23 11:50:42,094 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:50:42,094 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:50:42,094 INFO L408 AbstractCegarLoop]: === Iteration 47 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:50:42,094 INFO L82 PathProgramCache]: Analyzing trace with hash -1221530242, now seen corresponding path program 1 times [2018-03-23 11:50:42,094 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:50:42,094 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:50:42,095 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:42,095 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:42,095 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:42,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:42,106 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:50:42,554 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:50:42,554 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:50:42,554 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-03-23 11:50:42,554 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-03-23 11:50:42,555 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-03-23 11:50:42,555 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=295, Unknown=0, NotChecked=0, Total=342 [2018-03-23 11:50:42,555 INFO L87 Difference]: Start difference. First operand 348 states and 380 transitions. Second operand 19 states. [2018-03-23 11:50:43,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:50:43,264 INFO L93 Difference]: Finished difference Result 373 states and 407 transitions. [2018-03-23 11:50:43,264 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-03-23 11:50:43,264 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 68 [2018-03-23 11:50:43,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:50:43,266 INFO L225 Difference]: With dead ends: 373 [2018-03-23 11:50:43,266 INFO L226 Difference]: Without dead ends: 372 [2018-03-23 11:50:43,266 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=110, Invalid=760, Unknown=0, NotChecked=0, Total=870 [2018-03-23 11:50:43,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 372 states. [2018-03-23 11:50:43,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 372 to 338. [2018-03-23 11:50:43,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 338 states. [2018-03-23 11:50:43,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 338 states to 338 states and 370 transitions. [2018-03-23 11:50:43,282 INFO L78 Accepts]: Start accepts. Automaton has 338 states and 370 transitions. Word has length 68 [2018-03-23 11:50:43,282 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:50:43,282 INFO L459 AbstractCegarLoop]: Abstraction has 338 states and 370 transitions. [2018-03-23 11:50:43,282 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-03-23 11:50:43,282 INFO L276 IsEmpty]: Start isEmpty. Operand 338 states and 370 transitions. [2018-03-23 11:50:43,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-03-23 11:50:43,283 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:50:43,283 INFO L353 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:50:43,283 INFO L408 AbstractCegarLoop]: === Iteration 48 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:50:43,284 INFO L82 PathProgramCache]: Analyzing trace with hash 1299906359, now seen corresponding path program 1 times [2018-03-23 11:50:43,284 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:50:43,284 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:50:43,284 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:43,284 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:43,285 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:43,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:43,294 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:50:43,358 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 3 proven. 36 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-03-23 11:50:43,358 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:50:43,358 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:50:43,366 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:43,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:43,404 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:50:43,421 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 3 proven. 36 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-03-23 11:50:43,443 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:50:43,443 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 11 [2018-03-23 11:50:43,443 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-03-23 11:50:43,443 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-03-23 11:50:43,444 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2018-03-23 11:50:43,444 INFO L87 Difference]: Start difference. First operand 338 states and 370 transitions. Second operand 11 states. [2018-03-23 11:50:43,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:50:43,518 INFO L93 Difference]: Finished difference Result 644 states and 706 transitions. [2018-03-23 11:50:43,518 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-03-23 11:50:43,518 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 92 [2018-03-23 11:50:43,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:50:43,520 INFO L225 Difference]: With dead ends: 644 [2018-03-23 11:50:43,520 INFO L226 Difference]: Without dead ends: 355 [2018-03-23 11:50:43,521 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=92, Invalid=180, Unknown=0, NotChecked=0, Total=272 [2018-03-23 11:50:43,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 355 states. [2018-03-23 11:50:43,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 355 to 348. [2018-03-23 11:50:43,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 348 states. [2018-03-23 11:50:43,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 348 states to 348 states and 380 transitions. [2018-03-23 11:50:43,537 INFO L78 Accepts]: Start accepts. Automaton has 348 states and 380 transitions. Word has length 92 [2018-03-23 11:50:43,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:50:43,538 INFO L459 AbstractCegarLoop]: Abstraction has 348 states and 380 transitions. [2018-03-23 11:50:43,538 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-03-23 11:50:43,538 INFO L276 IsEmpty]: Start isEmpty. Operand 348 states and 380 transitions. [2018-03-23 11:50:43,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-03-23 11:50:43,539 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:50:43,539 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:50:43,539 INFO L408 AbstractCegarLoop]: === Iteration 49 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:50:43,539 INFO L82 PathProgramCache]: Analyzing trace with hash -1282335706, now seen corresponding path program 1 times [2018-03-23 11:50:43,539 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:50:43,539 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:50:43,540 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:43,540 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:43,540 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:43,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:43,553 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:50:44,096 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:50:44,097 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:50:44,097 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-03-23 11:50:44,097 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-03-23 11:50:44,097 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-03-23 11:50:44,097 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=256, Unknown=0, NotChecked=0, Total=306 [2018-03-23 11:50:44,097 INFO L87 Difference]: Start difference. First operand 348 states and 380 transitions. Second operand 18 states. [2018-03-23 11:50:44,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:50:44,515 INFO L93 Difference]: Finished difference Result 455 states and 492 transitions. [2018-03-23 11:50:44,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-03-23 11:50:44,516 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 71 [2018-03-23 11:50:44,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:50:44,518 INFO L225 Difference]: With dead ends: 455 [2018-03-23 11:50:44,518 INFO L226 Difference]: Without dead ends: 378 [2018-03-23 11:50:44,519 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 104 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=106, Invalid=596, Unknown=0, NotChecked=0, Total=702 [2018-03-23 11:50:44,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 378 states. [2018-03-23 11:50:44,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 378 to 356. [2018-03-23 11:50:44,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 356 states. [2018-03-23 11:50:44,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 356 states to 356 states and 386 transitions. [2018-03-23 11:50:44,544 INFO L78 Accepts]: Start accepts. Automaton has 356 states and 386 transitions. Word has length 71 [2018-03-23 11:50:44,545 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:50:44,545 INFO L459 AbstractCegarLoop]: Abstraction has 356 states and 386 transitions. [2018-03-23 11:50:44,545 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-03-23 11:50:44,545 INFO L276 IsEmpty]: Start isEmpty. Operand 356 states and 386 transitions. [2018-03-23 11:50:44,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-03-23 11:50:44,546 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:50:44,546 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:50:44,546 INFO L408 AbstractCegarLoop]: === Iteration 50 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:50:44,547 INFO L82 PathProgramCache]: Analyzing trace with hash 2000563933, now seen corresponding path program 1 times [2018-03-23 11:50:44,547 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:50:44,547 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:50:44,547 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:44,548 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:44,548 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:44,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:44,565 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:50:45,347 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:50:45,347 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:50:45,348 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [] total 26 [2018-03-23 11:50:45,348 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-03-23 11:50:45,348 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-03-23 11:50:45,348 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=630, Unknown=0, NotChecked=0, Total=702 [2018-03-23 11:50:45,348 INFO L87 Difference]: Start difference. First operand 356 states and 386 transitions. Second operand 27 states. [2018-03-23 11:50:46,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:50:46,465 INFO L93 Difference]: Finished difference Result 394 states and 428 transitions. [2018-03-23 11:50:46,466 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-03-23 11:50:46,466 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 71 [2018-03-23 11:50:46,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:50:46,467 INFO L225 Difference]: With dead ends: 394 [2018-03-23 11:50:46,467 INFO L226 Difference]: Without dead ends: 393 [2018-03-23 11:50:46,468 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 368 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=178, Invalid=1544, Unknown=0, NotChecked=0, Total=1722 [2018-03-23 11:50:46,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2018-03-23 11:50:46,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 362. [2018-03-23 11:50:46,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 362 states. [2018-03-23 11:50:46,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 362 states to 362 states and 392 transitions. [2018-03-23 11:50:46,485 INFO L78 Accepts]: Start accepts. Automaton has 362 states and 392 transitions. Word has length 71 [2018-03-23 11:50:46,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:50:46,485 INFO L459 AbstractCegarLoop]: Abstraction has 362 states and 392 transitions. [2018-03-23 11:50:46,485 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-03-23 11:50:46,485 INFO L276 IsEmpty]: Start isEmpty. Operand 362 states and 392 transitions. [2018-03-23 11:50:46,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-03-23 11:50:46,486 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:50:46,486 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:50:46,486 INFO L408 AbstractCegarLoop]: === Iteration 51 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:50:46,486 INFO L82 PathProgramCache]: Analyzing trace with hash 1425121122, now seen corresponding path program 1 times [2018-03-23 11:50:46,486 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:50:46,486 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:50:46,487 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:46,487 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:46,487 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:46,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:46,496 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:50:46,599 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 12 proven. 4 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-03-23 11:50:46,599 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:50:46,599 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:50:46,605 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:46,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:46,637 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:50:46,691 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:50:46,692 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:50:46,692 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:46,694 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:46,696 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:46,697 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:9 [2018-03-23 11:50:46,699 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:46,700 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:46,700 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-03-23 11:50:46,701 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:46,703 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:46,703 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:18, output treesize:12 [2018-03-23 11:50:46,726 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-03-23 11:50:46,726 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:46,729 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:50:46,729 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:12 [2018-03-23 11:50:46,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2018-03-23 11:50:46,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2018-03-23 11:50:46,768 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:46,769 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:46,771 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:46,771 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:21, output treesize:10 [2018-03-23 11:50:46,773 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:46,773 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-03-23 11:50:46,774 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:46,777 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-03-23 11:50:46,777 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-03-23 11:50:46,798 INFO L134 CoverageAnalysis]: Checked inductivity of 22 backedges. 6 proven. 16 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:50:46,818 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-03-23 11:50:46,818 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 15] total 17 [2018-03-23 11:50:46,818 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-03-23 11:50:46,819 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-03-23 11:50:46,819 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=257, Unknown=0, NotChecked=0, Total=306 [2018-03-23 11:50:46,819 INFO L87 Difference]: Start difference. First operand 362 states and 392 transitions. Second operand 18 states. [2018-03-23 11:50:47,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:50:47,280 INFO L93 Difference]: Finished difference Result 405 states and 433 transitions. [2018-03-23 11:50:47,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-03-23 11:50:47,280 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 79 [2018-03-23 11:50:47,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:50:47,281 INFO L225 Difference]: With dead ends: 405 [2018-03-23 11:50:47,281 INFO L226 Difference]: Without dead ends: 392 [2018-03-23 11:50:47,282 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 69 SyntacticMatches, 5 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 204 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=150, Invalid=780, Unknown=0, NotChecked=0, Total=930 [2018-03-23 11:50:47,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2018-03-23 11:50:47,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 286. [2018-03-23 11:50:47,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 286 states. [2018-03-23 11:50:47,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 286 states to 286 states and 307 transitions. [2018-03-23 11:50:47,304 INFO L78 Accepts]: Start accepts. Automaton has 286 states and 307 transitions. Word has length 79 [2018-03-23 11:50:47,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:50:47,304 INFO L459 AbstractCegarLoop]: Abstraction has 286 states and 307 transitions. [2018-03-23 11:50:47,305 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-03-23 11:50:47,305 INFO L276 IsEmpty]: Start isEmpty. Operand 286 states and 307 transitions. [2018-03-23 11:50:47,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-03-23 11:50:47,306 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:50:47,306 INFO L353 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:50:47,306 INFO L408 AbstractCegarLoop]: === Iteration 52 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:50:47,306 INFO L82 PathProgramCache]: Analyzing trace with hash -1603405347, now seen corresponding path program 1 times [2018-03-23 11:50:47,307 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:50:47,307 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:50:47,307 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:47,307 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:47,307 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:47,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:47,324 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:50:48,219 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:50:48,219 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-03-23 11:50:48,219 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-03-23 11:50:48,219 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-03-23 11:50:48,219 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-03-23 11:50:48,220 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=538, Unknown=0, NotChecked=0, Total=600 [2018-03-23 11:50:48,220 INFO L87 Difference]: Start difference. First operand 286 states and 307 transitions. Second operand 25 states. [2018-03-23 11:50:49,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-03-23 11:50:49,413 INFO L93 Difference]: Finished difference Result 305 states and 328 transitions. [2018-03-23 11:50:49,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-03-23 11:50:49,413 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 73 [2018-03-23 11:50:49,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-03-23 11:50:49,414 INFO L225 Difference]: With dead ends: 305 [2018-03-23 11:50:49,414 INFO L226 Difference]: Without dead ends: 304 [2018-03-23 11:50:49,415 INFO L568 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 474 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=201, Invalid=1869, Unknown=0, NotChecked=0, Total=2070 [2018-03-23 11:50:49,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 304 states. [2018-03-23 11:50:49,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 304 to 278. [2018-03-23 11:50:49,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 278 states. [2018-03-23 11:50:49,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 278 states to 278 states and 299 transitions. [2018-03-23 11:50:49,428 INFO L78 Accepts]: Start accepts. Automaton has 278 states and 299 transitions. Word has length 73 [2018-03-23 11:50:49,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-03-23 11:50:49,428 INFO L459 AbstractCegarLoop]: Abstraction has 278 states and 299 transitions. [2018-03-23 11:50:49,428 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-03-23 11:50:49,428 INFO L276 IsEmpty]: Start isEmpty. Operand 278 states and 299 transitions. [2018-03-23 11:50:49,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-03-23 11:50:49,429 INFO L345 BasicCegarLoop]: Found error trace [2018-03-23 11:50:49,429 INFO L353 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-03-23 11:50:49,429 INFO L408 AbstractCegarLoop]: === Iteration 53 === [__U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr6AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr5AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr7AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr4AssertViolationMEMORY_FREE, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__freeDataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr9RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr8RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr5RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__create_dataErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr2RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr4RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr7RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr6RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr0RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr3RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr1RequiresViolation, __U_MULTI_foptional_data_creation_test___true_valid_memsafety_i__appendErr5RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr14AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr18EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr15AssertViolationMEMORY_FREE]=== [2018-03-23 11:50:49,429 INFO L82 PathProgramCache]: Analyzing trace with hash 1250605948, now seen corresponding path program 1 times [2018-03-23 11:50:49,429 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-03-23 11:50:49,429 INFO L68 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-03-23 11:50:49,430 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:49,430 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:49,430 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-03-23 11:50:49,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:49,442 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-03-23 11:50:50,030 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-03-23 11:50:50,031 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-03-23 11:50:50,031 INFO L213 ckRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-03-23 11:50:50,036 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-03-23 11:50:50,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-03-23 11:50:50,069 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-03-23 11:50:50,088 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:50:50,090 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:50:50,090 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:50,091 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:50,097 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-03-23 11:50:50,098 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-03-23 11:50:50,098 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:50,101 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:50,105 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-03-23 11:50:50,105 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:26, output treesize:18 [2018-03-23 11:50:50,325 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:50,327 INFO L700 Elim1Store]: detected not equals via solver [2018-03-23 11:50:50,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-03-23 11:50:50,328 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-03-23 11:50:50,345 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-03-23 11:50:50,345 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:102, output treesize:96 [2018-03-23 11:50:50,825 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 171 treesize of output 100 [2018-03-23 11:50:50,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 90 [2018-03-23 11:50:50,831 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. Received shutdown request... [2018-03-23 11:50:50,911 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-03-23 11:50:50,912 WARN L519 AbstractCegarLoop]: Verification canceled [2018-03-23 11:50:50,917 WARN L197 ceAbstractionStarter]: Timeout [2018-03-23 11:50:50,918 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 23.03 11:50:50 BoogieIcfgContainer [2018-03-23 11:50:50,918 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-03-23 11:50:50,919 INFO L168 Benchmark]: Toolchain (without parser) took 127326.54 ms. Allocated memory was 305.7 MB in the beginning and 858.3 MB in the end (delta: 552.6 MB). Free memory was 243.4 MB in the beginning and 615.7 MB in the end (delta: -372.3 MB). Peak memory consumption was 180.3 MB. Max. memory is 5.3 GB. [2018-03-23 11:50:50,920 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 305.7 MB. Free memory is still 269.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-03-23 11:50:50,920 INFO L168 Benchmark]: CACSL2BoogieTranslator took 331.17 ms. Allocated memory is still 305.7 MB. Free memory was 243.4 MB in the beginning and 216.4 MB in the end (delta: 27.0 MB). Peak memory consumption was 27.0 MB. Max. memory is 5.3 GB. [2018-03-23 11:50:50,921 INFO L168 Benchmark]: Boogie Preprocessor took 61.06 ms. Allocated memory is still 305.7 MB. Free memory was 216.4 MB in the beginning and 213.4 MB in the end (delta: 3.0 MB). Peak memory consumption was 3.0 MB. Max. memory is 5.3 GB. [2018-03-23 11:50:50,921 INFO L168 Benchmark]: RCFGBuilder took 665.63 ms. Allocated memory was 305.7 MB in the beginning and 469.2 MB in the end (delta: 163.6 MB). Free memory was 213.4 MB in the beginning and 389.7 MB in the end (delta: -176.3 MB). Peak memory consumption was 22.2 MB. Max. memory is 5.3 GB. [2018-03-23 11:50:50,921 INFO L168 Benchmark]: TraceAbstraction took 126263.26 ms. Allocated memory was 469.2 MB in the beginning and 858.3 MB in the end (delta: 389.0 MB). Free memory was 389.7 MB in the beginning and 615.7 MB in the end (delta: -226.0 MB). Peak memory consumption was 163.0 MB. Max. memory is 5.3 GB. [2018-03-23 11:50:50,924 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 305.7 MB. Free memory is still 269.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 331.17 ms. Allocated memory is still 305.7 MB. Free memory was 243.4 MB in the beginning and 216.4 MB in the end (delta: 27.0 MB). Peak memory consumption was 27.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 61.06 ms. Allocated memory is still 305.7 MB. Free memory was 216.4 MB in the beginning and 213.4 MB in the end (delta: 3.0 MB). Peak memory consumption was 3.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 665.63 ms. Allocated memory was 305.7 MB in the beginning and 469.2 MB in the end (delta: 163.6 MB). Free memory was 213.4 MB in the beginning and 389.7 MB in the end (delta: -176.3 MB). Peak memory consumption was 22.2 MB. Max. memory is 5.3 GB. * TraceAbstraction took 126263.26 ms. Allocated memory was 469.2 MB in the beginning and 858.3 MB in the end (delta: 389.0 MB). Free memory was 389.7 MB in the beginning and 615.7 MB in the end (delta: -226.0 MB). Peak memory consumption was 163.0 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 560]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 560). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 562]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 562). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 560]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 560). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 560]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 560). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 559]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 559). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 562]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 562). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 560]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 560). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 559]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 559). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 547]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 544]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 544). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 550]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 550). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 552]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 552). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 550]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 550). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 552]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 552). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 544]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 544). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 547]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 547]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 547]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 566]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 567]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 567). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 568]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 568). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 568]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 568). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 566]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 566]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 566]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 567]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 567). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 577]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 579]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 579). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 571]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 571). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 580]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 580). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 578]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 579]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 579). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 571]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 571). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 570]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 570). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 576]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 576). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 577]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 578]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 578]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 578]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 580]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 580). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 576]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 576). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 577]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 579]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 579). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 577]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - TimeoutResultAtElement [Line: 579]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 579). Cancelled while BasicCegarLoop was analyzing trace of length 78 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 67. - StatisticsResult: Ultimate Automizer benchmark data CFG has 8 procedures, 158 locations, 45 error locations. TIMEOUT Result, 126.2s OverallTime, 53 OverallIterations, 4 TraceHistogramMax, 100.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 5900 SDtfs, 5937 SDslu, 30819 SDs, 0 SdLazy, 22779 SolverSat, 921 SolverUnsat, 42 SolverUnknown, 0 SolverNotchecked, 81.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1712 GetRequests, 639 SyntacticMatches, 74 SemanticMatches, 999 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 7621 ImplicationChecksByTransitivity, 32.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=362occurred in iteration=50, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.6s AutomataMinimizationTime, 52 MinimizatonAttempts, 949 StatesRemovedByMinimization, 46 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.7s SatisfiabilityAnalysisTime, 21.8s InterpolantComputationTime, 3024 NumberOfCodeBlocks, 3024 NumberOfCodeBlocksAsserted, 63 NumberOfCheckSat, 2962 ConstructedInterpolants, 79 QuantifiedInterpolants, 2049650 SizeOfPredicates, 134 NumberOfNonLiveVariables, 2556 ConjunctsInSsa, 369 ConjunctsInUnsatCore, 62 InterpolantComputations, 42 PerfectInterpolantSequences, 131/354 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-Benchmark-0-2018-03-23_11-50-50-934.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-03-23_11-50-50-934.csv Completed graceful shutdown