java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/ArraysOfVariableLength6_true-valid-memsafety_true-termination.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-453dfda-m [2018-04-10 03:01:35,085 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-10 03:01:35,087 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-10 03:01:35,103 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-10 03:01:35,103 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-10 03:01:35,104 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-10 03:01:35,105 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-10 03:01:35,107 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-10 03:01:35,109 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-10 03:01:35,110 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-10 03:01:35,111 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-10 03:01:35,111 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-10 03:01:35,112 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-10 03:01:35,113 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-10 03:01:35,114 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-10 03:01:35,116 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-10 03:01:35,118 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-10 03:01:35,120 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-10 03:01:35,121 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-10 03:01:35,123 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-10 03:01:35,125 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-04-10 03:01:35,125 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-04-10 03:01:35,125 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-04-10 03:01:35,126 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-04-10 03:01:35,127 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-04-10 03:01:35,129 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-04-10 03:01:35,129 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-04-10 03:01:35,130 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-04-10 03:01:35,131 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-04-10 03:01:35,131 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-04-10 03:01:35,132 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-04-10 03:01:35,132 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf [2018-04-10 03:01:35,156 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-10 03:01:35,156 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-10 03:01:35,157 INFO L131 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2018-04-10 03:01:35,157 INFO L133 SettingsManager]: * ultimate.logging.details=de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation=DEBUG; [2018-04-10 03:01:35,157 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-04-10 03:01:35,158 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-04-10 03:01:35,158 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-04-10 03:01:35,158 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-04-10 03:01:35,158 INFO L133 SettingsManager]: * Parallel states before merging=1 [2018-04-10 03:01:35,159 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-04-10 03:01:35,159 INFO L131 SettingsManager]: Preferences of LTL2Aut differ from their defaults: [2018-04-10 03:01:35,159 INFO L133 SettingsManager]: * Property to check=[] a a: x > 42 [2018-04-10 03:01:35,159 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-10 03:01:35,160 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-10 03:01:35,160 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-10 03:01:35,160 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-10 03:01:35,160 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-10 03:01:35,161 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-10 03:01:35,161 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-10 03:01:35,161 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-04-10 03:01:35,161 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-10 03:01:35,161 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-10 03:01:35,162 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-10 03:01:35,162 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-04-10 03:01:35,162 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-04-10 03:01:35,162 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-10 03:01:35,162 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-10 03:01:35,163 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-10 03:01:35,163 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-10 03:01:35,163 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-10 03:01:35,163 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-04-10 03:01:35,163 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-04-10 03:01:35,164 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:01:35,164 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-04-10 03:01:35,165 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-04-10 03:01:35,165 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-04-10 03:01:35,165 INFO L131 SettingsManager]: Preferences of Boogie Printer differ from their defaults: [2018-04-10 03:01:35,165 INFO L133 SettingsManager]: * Dump path:=C:\Users\alex\AppData\Local\Temp\ [2018-04-10 03:01:35,200 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-10 03:01:35,212 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-10 03:01:35,216 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-10 03:01:35,218 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-10 03:01:35,219 INFO L276 PluginConnector]: CDTParser initialized [2018-04-10 03:01:35,219 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/ArraysOfVariableLength6_true-valid-memsafety_true-termination.c [2018-04-10 03:01:35,540 INFO L225 CDTParser]: Created temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG4048be3d9 [2018-04-10 03:01:35,668 INFO L287 CDTParser]: IsIndexed: true [2018-04-10 03:01:35,669 INFO L288 CDTParser]: Found 1 translation units. [2018-04-10 03:01:35,669 INFO L168 CDTParser]: Scanning ArraysOfVariableLength6_true-valid-memsafety_true-termination.c [2018-04-10 03:01:35,670 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-10 03:01:35,671 INFO L215 ultiparseSymbolTable]: [2018-04-10 03:01:35,671 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-10 03:01:35,671 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in ArraysOfVariableLength6_true-valid-memsafety_true-termination.c [2018-04-10 03:01:35,671 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo ('foo') in ArraysOfVariableLength6_true-valid-memsafety_true-termination.c [2018-04-10 03:01:35,671 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-10 03:01:35,671 INFO L233 ultiparseSymbolTable]: [2018-04-10 03:01:35,687 INFO L330 CDTParser]: Deleted temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG4048be3d9 [2018-04-10 03:01:35,692 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-10 03:01:35,695 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-04-10 03:01:35,696 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-10 03:01:35,696 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-10 03:01:35,702 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-10 03:01:35,703 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.04 03:01:35" (1/1) ... [2018-04-10 03:01:35,705 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7dd150d4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 03:01:35, skipping insertion in model container [2018-04-10 03:01:35,705 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.04 03:01:35" (1/1) ... [2018-04-10 03:01:35,721 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-10 03:01:35,737 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-10 03:01:35,876 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-10 03:01:35,898 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-10 03:01:35,904 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 9 non ball SCCs. Number of states in SCCs 9. [2018-04-10 03:01:35,912 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 03:01:35 WrapperNode [2018-04-10 03:01:35,912 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-10 03:01:35,913 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-10 03:01:35,913 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-10 03:01:35,913 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-10 03:01:35,923 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 03:01:35" (1/1) ... [2018-04-10 03:01:35,924 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 03:01:35" (1/1) ... [2018-04-10 03:01:35,933 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 03:01:35" (1/1) ... [2018-04-10 03:01:35,934 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 03:01:35" (1/1) ... [2018-04-10 03:01:35,937 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 03:01:35" (1/1) ... [2018-04-10 03:01:35,942 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 03:01:35" (1/1) ... [2018-04-10 03:01:35,943 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 03:01:35" (1/1) ... [2018-04-10 03:01:35,944 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-10 03:01:35,945 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-10 03:01:35,945 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-10 03:01:35,945 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-10 03:01:35,946 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 03:01:35" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-10 03:01:36,012 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-10 03:01:36,013 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-10 03:01:36,013 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo [2018-04-10 03:01:36,013 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-10 03:01:36,013 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo [2018-04-10 03:01:36,013 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-10 03:01:36,013 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-10 03:01:36,014 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-10 03:01:36,014 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-10 03:01:36,014 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-10 03:01:36,014 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-10 03:01:36,014 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-10 03:01:36,014 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-10 03:01:36,338 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-10 03:01:36,339 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.04 03:01:36 BoogieIcfgContainer [2018-04-10 03:01:36,339 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-10 03:01:36,339 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2018-04-10 03:01:36,339 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2018-04-10 03:01:36,340 INFO L276 PluginConnector]: IcfgTransformer initialized [2018-04-10 03:01:36,343 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.04 03:01:36" (1/1) ... [2018-04-10 03:01:36,349 INFO L139 apSepIcfgTransformer]: HeapSepIcfgTransformer: Starting heap partitioning [2018-04-10 03:01:36,350 INFO L140 apSepIcfgTransformer]: To be partitioned heap arrays found [#memory_int] [2018-04-10 03:01:36,363 INFO L299 apSepIcfgTransformer]: Heap separator: starting memloc-array-style preprocessing [2018-04-10 03:01:36,376 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 9 non ball SCCs. Number of states in SCCs 9. [2018-04-10 03:01:36,377 INFO L332 apSepIcfgTransformer]: finished MemlocArrayUpdater, created 0 location literals (each corresponds to one heap write) [2018-04-10 03:01:36,384 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 9 non ball SCCs. Number of states in SCCs 9. [2018-04-10 03:01:36,387 INFO L412 apSepIcfgTransformer]: finished preprocessing for the equality analysis [2018-04-10 03:01:36,388 DEBUG L416 apSepIcfgTransformer]: storeIndexInfoToLocLiteral: Map: [2018-04-10 03:01:36,389 DEBUG L418 apSepIcfgTransformer]: edgeToIndexToStoreIndexInfo: NestedMap2: [2018-04-10 03:01:36,440 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=1) [2018-04-10 03:01:39,252 INFO L314 AbstractInterpreter]: Visited 71 different actions 195 times. Merged at 47 different actions 85 times. Never widened. Found 11 fixpoints after 6 different actions. Largest state had 21 variables. [2018-04-10 03:01:39,255 INFO L424 apSepIcfgTransformer]: finished equality analysis [2018-04-10 03:01:39,262 INFO L195 HeapSepPreAnalysis]: Number of read from array group [#memory_int] : 1 [2018-04-10 03:01:39,263 INFO L434 apSepIcfgTransformer]: Finished pre analysis before partitioning [2018-04-10 03:01:39,263 INFO L435 apSepIcfgTransformer]: array groups: Set: [#memory_int] [2018-04-10 03:01:39,263 INFO L437 apSepIcfgTransformer]: select infos: Set: ((select (select |v_#memory_int_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2)), at (SUMMARY for call #t~mem1 := read~int(~b.base, ~b.offset + ~i~0 * 1, 1); srcloc: L16')) [2018-04-10 03:01:39,266 DEBUG L373 HeapPartitionManager]: creating LocationBlock locs_30 [2018-04-10 03:01:39,267 DEBUG L374 HeapPartitionManager]: with contents [NoStoreIndexInfo] [2018-04-10 03:01:39,267 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_30 [2018-04-10 03:01:39,267 DEBUG L324 HeapPartitionManager]: at dimension 0 for ((select (select |v_#memory_int_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2)), at (SUMMARY for call #t~mem1 := read~int(~b.base, ~b.offset + ~i~0 * 1, 1); srcloc: L16')) [2018-04-10 03:01:39,267 DEBUG L325 HeapPartitionManager]: write locations: [NoStoreIndexInfo] [2018-04-10 03:01:39,267 DEBUG L373 HeapPartitionManager]: creating LocationBlock locs_30 [2018-04-10 03:01:39,267 DEBUG L374 HeapPartitionManager]: with contents [NoStoreIndexInfo] [2018-04-10 03:01:39,268 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_30 [2018-04-10 03:01:39,268 DEBUG L324 HeapPartitionManager]: at dimension 1 for ((select (select |v_#memory_int_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2)), at (SUMMARY for call #t~mem1 := read~int(~b.base, ~b.offset + ~i~0 * 1, 1); srcloc: L16')) [2018-04-10 03:01:39,268 DEBUG L325 HeapPartitionManager]: write locations: [NoStoreIndexInfo] [2018-04-10 03:01:39,268 INFO L330 HeapPartitionManager]: partitioning result: [2018-04-10 03:01:39,268 INFO L335 HeapPartitionManager]: location blocks for array group [#memory_int] [2018-04-10 03:01:39,268 INFO L344 HeapPartitionManager]: at dimension 0 [2018-04-10 03:01:39,268 INFO L345 HeapPartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 1 [2018-04-10 03:01:39,269 INFO L346 HeapPartitionManager]: # location blocks :1 [2018-04-10 03:01:39,269 DEBUG L353 HeapPartitionManager]: location block contents: [2018-04-10 03:01:39,269 DEBUG L356 HeapPartitionManager]: [NoStoreIndexInfo] [2018-04-10 03:01:39,269 INFO L344 HeapPartitionManager]: at dimension 1 [2018-04-10 03:01:39,269 INFO L345 HeapPartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 1 [2018-04-10 03:01:39,269 INFO L346 HeapPartitionManager]: # location blocks :1 [2018-04-10 03:01:39,269 DEBUG L353 HeapPartitionManager]: location block contents: [2018-04-10 03:01:39,270 DEBUG L356 HeapPartitionManager]: [NoStoreIndexInfo] [2018-04-10 03:01:39,271 INFO L134 ransitionTransformer]: executing heap partitioning transformation [2018-04-10 03:01:39,274 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,275 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,275 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,275 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,275 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,276 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,276 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,276 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,277 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,277 DEBUG L331 ransitionTransformer]: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] [2018-04-10 03:01:39,277 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,277 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,278 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,278 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,278 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,278 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,279 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,279 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,279 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-10 03:01:39,279 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-10 03:01:39,279 DEBUG L356 ransitionTransformer]: {main_~i~1=v_main_~i~1_9} [2018-04-10 03:01:39,280 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-10 03:01:39,280 DEBUG L358 ransitionTransformer]: {} [2018-04-10 03:01:39,280 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,280 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,280 DEBUG L331 ransitionTransformer]: Formula: (= |v_#valid_1| (store |v_#valid_2| 0 0)) InVars {#valid=|v_#valid_2|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid] [2018-04-10 03:01:39,281 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,281 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,281 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,281 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,281 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-10 03:01:39,281 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-10 03:01:39,281 DEBUG L356 ransitionTransformer]: {main_~b~0=v_main_~b~0_3} [2018-04-10 03:01:39,281 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-10 03:01:39,281 DEBUG L358 ransitionTransformer]: {} [2018-04-10 03:01:39,282 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,282 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,282 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,282 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,282 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,282 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,282 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,283 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-10 03:01:39,283 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-10 03:01:39,283 DEBUG L356 ransitionTransformer]: {main_~buffer~0=v_main_~buffer~0_1} [2018-04-10 03:01:39,283 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-10 03:01:39,283 DEBUG L358 ransitionTransformer]: {} [2018-04-10 03:01:39,283 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,284 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,284 DEBUG L331 ransitionTransformer]: Formula: (and (= 0 (select |v_#valid_16| |v_main_~#mask~0.base_5|)) (= |v_#length_5| (store |v_#length_6| |v_main_~#mask~0.base_5| 32)) (= 0 |v_main_~#mask~0.offset_5|) (not (= 0 |v_main_~#mask~0.base_5|)) (= |v_#valid_15| (store |v_#valid_16| |v_main_~#mask~0.base_5| 1))) InVars {#length=|v_#length_6|, #valid=|v_#valid_16|} OutVars{#length=|v_#length_5|, main_~#mask~0.base=|v_main_~#mask~0.base_5|, main_~#mask~0.offset=|v_main_~#mask~0.offset_5|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset, #valid, #length] [2018-04-10 03:01:39,284 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,284 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,284 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,285 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,285 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-10 03:01:39,285 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-10 03:01:39,285 DEBUG L356 ransitionTransformer]: {main_~c~0.base=v_main_~c~0.base_1, main_~c~0.offset=v_main_~c~0.offset_1} [2018-04-10 03:01:39,285 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-10 03:01:39,285 DEBUG L358 ransitionTransformer]: {} [2018-04-10 03:01:39,285 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,286 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,286 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~i~1_10 0) InVars {} OutVars{main_~i~1=v_main_~i~1_10} AuxVars[] AssignedVars[main_~i~1] [2018-04-10 03:01:39,286 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,286 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,286 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,287 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,287 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,287 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,287 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,287 DEBUG L331 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,288 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,288 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,288 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,288 DEBUG L331 ransitionTransformer]: Formula: (not (< v_main_~i~1_11 32)) InVars {main_~i~1=v_main_~i~1_11} OutVars{main_~i~1=v_main_~i~1_11} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,288 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,288 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,289 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,289 DEBUG L331 ransitionTransformer]: Formula: (< v_main_~i~1_12 32) InVars {main_~i~1=v_main_~i~1_12} OutVars{main_~i~1=v_main_~i~1_12} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,289 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,289 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,290 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,290 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] [2018-04-10 03:01:39,290 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,290 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,290 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,291 DEBUG L331 ransitionTransformer]: Formula: (and (= v_main_~c~0.offset_2 |v_main_~#mask~0.offset_6|) (= v_main_~c~0.base_2 |v_main_~#mask~0.base_6|)) InVars {main_~#mask~0.offset=|v_main_~#mask~0.offset_6|, main_~#mask~0.base=|v_main_~#mask~0.base_6|} OutVars{main_~c~0.offset=v_main_~c~0.offset_2, main_~c~0.base=v_main_~c~0.base_2, main_~#mask~0.offset=|v_main_~#mask~0.offset_6|, main_~#mask~0.base=|v_main_~#mask~0.base_6|} AuxVars[] AssignedVars[main_~c~0.base, main_~c~0.offset] [2018-04-10 03:01:39,291 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,291 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,291 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,292 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,292 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,292 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,292 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,292 DEBUG L331 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,292 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,292 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,292 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,293 DEBUG L331 ransitionTransformer]: Formula: (or (not (<= 0 v_main_~i~1_13)) (not (< v_main_~i~1_13 100))) InVars {main_~i~1=v_main_~i~1_13} OutVars{main_~i~1=v_main_~i~1_13} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,293 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,293 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,293 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,293 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,294 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,294 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,294 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,294 DEBUG L331 ransitionTransformer]: Formula: (not (< v_main_~i~1_2 32)) InVars {main_~i~1=v_main_~i~1_2} OutVars{main_~i~1=v_main_~i~1_2} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,294 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,295 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,295 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,295 DEBUG L331 ransitionTransformer]: Formula: (< v_main_~i~1_3 32) InVars {main_~i~1=v_main_~i~1_3} OutVars{main_~i~1=v_main_~i~1_3} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,295 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,295 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,296 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,296 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#res_2| 0) InVars {} OutVars{main_#res=|v_main_#res_2|} AuxVars[] AssignedVars[main_#res] [2018-04-10 03:01:39,296 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,296 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,297 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,297 DEBUG L331 ransitionTransformer]: Formula: (and (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1| 32) (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1| v_main_~c~0.offset_4) (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1| v_main_~c~0.base_4)) InVars {main_~c~0.offset=v_main_~c~0.offset_4, main_~c~0.base=v_main_~c~0.base_4} OutVars{main_~c~0.offset=v_main_~c~0.offset_4, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1|, main_~c~0.base=v_main_~c~0.base_4} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size] [2018-04-10 03:01:39,297 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-10 03:01:39,297 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-10 03:01:39,297 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1|} [2018-04-10 03:01:39,298 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-10 03:01:39,298 DEBUG L358 ransitionTransformer]: {main_~c~0.offset=v_main_~c~0.offset_4, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1|, main_~c~0.base=v_main_~c~0.base_4} [2018-04-10 03:01:39,298 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,298 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,298 DEBUG L331 ransitionTransformer]: Formula: (or (not (< v_main_~i~1_4 100)) (not (<= 0 v_main_~i~1_4))) InVars {main_~i~1=v_main_~i~1_4} OutVars{main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,299 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,299 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,299 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,299 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,299 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,299 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,300 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,300 DEBUG L331 ransitionTransformer]: Formula: (= |v_#valid_11| (store |v_#valid_12| |v_main_~#mask~0.base_3| 0)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_12|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid] [2018-04-10 03:01:39,300 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,300 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,300 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,301 DEBUG L331 ransitionTransformer]: Formula: (and (<= |v_main_#t~ret3_2| 2147483647) (<= 0 (+ |v_main_#t~ret3_2| 2147483648))) InVars {main_#t~ret3=|v_main_#t~ret3_2|} OutVars{main_#t~ret3=|v_main_#t~ret3_2|} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,301 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,301 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,301 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,302 DEBUG L331 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_1 |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size_1|) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size_1|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_1} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size] [2018-04-10 03:01:39,302 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,302 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,302 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,302 DEBUG L331 ransitionTransformer]: Formula: (not (= 32 (select v_main_~b~0_1 v_main_~i~1_5))) InVars {main_~b~0=v_main_~b~0_1, main_~i~1=v_main_~i~1_5} OutVars{main_~b~0=v_main_~b~0_1, main_~i~1=v_main_~i~1_5} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,303 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,303 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,303 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,303 DEBUG L331 ransitionTransformer]: Formula: (= 32 (select v_main_~b~0_2 v_main_~i~1_6)) InVars {main_~b~0=v_main_~b~0_2, main_~i~1=v_main_~i~1_6} OutVars{main_~b~0=v_main_~b~0_2, main_~i~1=v_main_~i~1_6} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,304 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,304 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,304 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,304 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,304 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-10 03:01:39,304 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-10 03:01:39,304 DEBUG L356 ransitionTransformer]: {main_~#mask~0.base=|v_main_~#mask~0.base_4|, main_~#mask~0.offset=|v_main_~#mask~0.offset_4|} [2018-04-10 03:01:39,305 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-10 03:01:39,305 DEBUG L358 ransitionTransformer]: {} [2018-04-10 03:01:39,305 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,305 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,305 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~b~0_4 (store v_main_~b~0_5 v_main_~i~1_14 |v_main_#t~ret3_3|)) InVars {main_~i~1=v_main_~i~1_14, main_~b~0=v_main_~b~0_5, main_#t~ret3=|v_main_#t~ret3_3|} OutVars{main_~i~1=v_main_~i~1_14, main_~b~0=v_main_~b~0_4, main_#t~ret3=|v_main_#t~ret3_3|} AuxVars[] AssignedVars[main_~b~0] [2018-04-10 03:01:39,305 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,305 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,306 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,306 DEBUG L331 ransitionTransformer]: Formula: (and (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_1 |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|) (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_1 |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base_1|)) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_1, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_1} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset] [2018-04-10 03:01:39,306 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,306 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,306 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,306 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#res_1| 1) InVars {} OutVars{main_#res=|v_main_#res_1|} AuxVars[] AssignedVars[main_#res] [2018-04-10 03:01:39,306 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,307 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,307 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,307 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#t~post4_1| v_main_~i~1_7) InVars {main_~i~1=v_main_~i~1_7} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_7} AuxVars[] AssignedVars[main_#t~post4] [2018-04-10 03:01:39,307 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,307 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,307 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,308 DEBUG L331 ransitionTransformer]: Formula: (= |v_#valid_13| |old(#valid)|) InVars {#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,308 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,308 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,308 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,308 DEBUG L331 ransitionTransformer]: Formula: (not (= |v_#valid_14| |old(#valid)|)) InVars {#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,308 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,309 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,309 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,309 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,309 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-10 03:01:39,309 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-10 03:01:39,309 DEBUG L356 ransitionTransformer]: {main_#t~ret3=|v_main_#t~ret3_4|} [2018-04-10 03:01:39,309 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-10 03:01:39,309 DEBUG L358 ransitionTransformer]: {} [2018-04-10 03:01:39,310 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,310 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,310 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,310 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-10 03:01:39,310 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-10 03:01:39,310 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0_1} [2018-04-10 03:01:39,311 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-10 03:01:39,311 DEBUG L358 ransitionTransformer]: {} [2018-04-10 03:01:39,311 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,311 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,311 DEBUG L331 ransitionTransformer]: Formula: (= (store |v_#valid_10| |v_main_~#mask~0.base_1| 0) |v_#valid_9|) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_1|, #valid=|v_#valid_10|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_1|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid] [2018-04-10 03:01:39,311 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,311 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,312 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,312 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~i~1_8 (+ |v_main_#t~post4_2| 1)) InVars {main_#t~post4=|v_main_#t~post4_2|} OutVars{main_#t~post4=|v_main_#t~post4_2|, main_~i~1=v_main_~i~1_8} AuxVars[] AssignedVars[main_~i~1] [2018-04-10 03:01:39,312 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,312 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,312 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,313 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#t~post2_1| v_main_~i~1_15) InVars {main_~i~1=v_main_~i~1_15} OutVars{main_~i~1=v_main_~i~1_15, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[main_#t~post2] [2018-04-10 03:01:39,313 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,313 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,313 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,313 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,314 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-10 03:01:39,314 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-10 03:01:39,314 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_1} [2018-04-10 03:01:39,314 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-10 03:01:39,314 DEBUG L358 ransitionTransformer]: {} [2018-04-10 03:01:39,314 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,315 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,315 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,315 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-10 03:01:39,315 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-10 03:01:39,315 DEBUG L356 ransitionTransformer]: {main_~#mask~0.base=|v_main_~#mask~0.base_2|, main_~#mask~0.offset=|v_main_~#mask~0.offset_2|} [2018-04-10 03:01:39,315 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-10 03:01:39,316 DEBUG L358 ransitionTransformer]: {} [2018-04-10 03:01:39,316 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,316 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,316 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,316 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-10 03:01:39,317 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-10 03:01:39,317 DEBUG L356 ransitionTransformer]: {main_#t~post4=|v_main_#t~post4_3|} [2018-04-10 03:01:39,317 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-10 03:01:39,317 DEBUG L358 ransitionTransformer]: {} [2018-04-10 03:01:39,317 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,317 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,318 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~i~1_16 (+ |v_main_#t~post2_2| 1)) InVars {main_#t~post2=|v_main_#t~post2_2|} OutVars{main_~i~1=v_main_~i~1_16, main_#t~post2=|v_main_#t~post2_2|} AuxVars[] AssignedVars[main_~i~1] [2018-04-10 03:01:39,318 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,318 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,318 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,318 DEBUG L331 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_2 0) InVars {} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_2} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0] [2018-04-10 03:01:39,318 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,318 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,318 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,319 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,319 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-10 03:01:39,319 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-10 03:01:39,319 DEBUG L356 ransitionTransformer]: {main_#t~post2=|v_main_#t~post2_3|} [2018-04-10 03:01:39,319 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-10 03:01:39,319 DEBUG L358 ransitionTransformer]: {} [2018-04-10 03:01:39,319 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,319 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,319 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,319 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,320 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,320 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,320 DEBUG L331 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,320 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,320 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,320 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,320 DEBUG L331 ransitionTransformer]: Formula: (not (< v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_3 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_2)) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_3, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_2} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_3, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_2} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,321 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,321 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,321 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,321 DEBUG L331 ransitionTransformer]: Formula: (< v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_4 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_3) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_4, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_3} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_4, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_3} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,321 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,321 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,322 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,322 DEBUG L331 ransitionTransformer]: Formula: (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_11) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_11} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_11} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res] [2018-04-10 03:01:39,322 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,322 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,322 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,323 DEBUG L331 ransitionTransformer]: Formula: (or (not (<= 0 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_5)) (not (< v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_5 32))) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_5} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_5} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,323 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,323 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,323 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,323 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,323 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,323 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,323 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,323 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,324 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,324 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,326 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,327 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse0 (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2))) (and (<= 0 .cse0) (<= (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2 1) (select |v_#length_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)) (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1| (select (select |v_#memory_int_part_locs_30_locs_30_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) .cse0)) (= 1 (select |v_#valid_3| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)))) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1] [2018-04-10 03:01:39,327 DEBUG L338 ransitionTransformer]: formula has changed [2018-04-10 03:01:39,327 DEBUG L339 ransitionTransformer]: old formula: [2018-04-10 03:01:39,327 DEBUG L340 ransitionTransformer]: (let ((.cse0 (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2))) (and (<= 0 .cse0) (<= (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2 1) (select |v_#length_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)) (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1| (select (select |v_#memory_int_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) .cse0)) (= 1 (select |v_#valid_3| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)))) [2018-04-10 03:01:39,328 DEBUG L341 ransitionTransformer]: new formula: [2018-04-10 03:01:39,328 DEBUG L342 ransitionTransformer]: (let ((.cse0 (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2))) (and (<= 0 .cse0) (<= (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2 1) (select |v_#length_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)) (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1| (select (select |v_#memory_int_part_locs_30_locs_30_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) .cse0)) (= 1 (select |v_#valid_3| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)))) [2018-04-10 03:01:39,328 DEBUG L346 ransitionTransformer]: invars have changed [2018-04-10 03:01:39,329 DEBUG L347 ransitionTransformer]: old invars: [2018-04-10 03:01:39,329 DEBUG L348 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6} [2018-04-10 03:01:39,329 DEBUG L349 ransitionTransformer]: new invars: [2018-04-10 03:01:39,329 DEBUG L350 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|} [2018-04-10 03:01:39,329 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-10 03:01:39,329 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-10 03:01:39,329 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1|} [2018-04-10 03:01:39,330 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-10 03:01:39,330 DEBUG L358 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1|} [2018-04-10 03:01:39,330 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,330 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,331 DEBUG L331 ransitionTransformer]: Formula: (not (= 1 (select |v_#valid_4| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_3))) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_3, #valid=|v_#valid_4|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_3, #valid=|v_#valid_4|} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,331 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,331 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,331 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,332 DEBUG L331 ransitionTransformer]: Formula: (or (not (<= (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_7 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_3 1) (select |v_#length_2| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_4))) (not (<= 0 (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_7 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_3)))) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_2|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_7, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_3} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_2|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_7, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_3} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,332 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,332 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,332 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,332 DEBUG L331 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0_2 (store v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0_3 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_8 |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_2|)) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_8, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0_3, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_2|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_8, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_2|} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0] [2018-04-10 03:01:39,333 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,333 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,333 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,333 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,333 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-10 03:01:39,333 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-10 03:01:39,334 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_3|} [2018-04-10 03:01:39,334 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-10 03:01:39,334 DEBUG L358 ransitionTransformer]: {} [2018-04-10 03:01:39,334 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,334 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,335 DEBUG L331 ransitionTransformer]: Formula: (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_9) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_9} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_9, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0] [2018-04-10 03:01:39,335 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,335 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,335 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,335 DEBUG L331 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_10 (+ |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_2| 1)) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_2|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_10, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_2|} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0] [2018-04-10 03:01:39,336 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,336 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,336 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,336 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,336 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-10 03:01:39,336 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-10 03:01:39,337 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_3|} [2018-04-10 03:01:39,337 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-10 03:01:39,337 DEBUG L358 ransitionTransformer]: {} [2018-04-10 03:01:39,337 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,337 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,338 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-10 03:01:39,338 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-10 03:01:39,338 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,338 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,338 DEBUG L331 ransitionTransformer]: Formula: (= |v_ULTIMATE.start_#t~ret5_2| |v_main_#resOutParam_1|) InVars {main_#res=|v_main_#resOutParam_1|} OutVars{ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_2|, main_#res=|v_main_#resOutParam_1|} AuxVars[] AssignedVars[ULTIMATE.start_#t~ret5] [2018-04-10 03:01:39,338 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-10 03:01:39,339 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-10 03:01:39,339 DEBUG L356 ransitionTransformer]: {ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_2|} [2018-04-10 03:01:39,339 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-10 03:01:39,339 DEBUG L358 ransitionTransformer]: {ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_2|, main_#res=|v_main_#resOutParam_1|} [2018-04-10 03:01:39,339 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,340 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-10 03:01:39,340 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#t~ret3_5| |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#resOutParam_1|) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#resOutParam_1|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#resOutParam_1|, main_#t~ret3=|v_main_#t~ret3_5|} AuxVars[] AssignedVars[main_#t~ret3] [2018-04-10 03:01:39,340 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-10 03:01:39,340 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-10 03:01:39,340 DEBUG L356 ransitionTransformer]: {main_#t~ret3=|v_main_#t~ret3_5|} [2018-04-10 03:01:39,340 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-10 03:01:39,340 DEBUG L358 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#resOutParam_1|, main_#t~ret3=|v_main_#t~ret3_5|} [2018-04-10 03:01:39,341 DEBUG L360 ransitionTransformer]: [2018-04-10 03:01:39,341 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 9 non ball SCCs. Number of states in SCCs 9. [2018-04-10 03:01:39,343 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 10.04 03:01:39 BasicIcfg [2018-04-10 03:01:39,343 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2018-04-10 03:01:39,344 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-10 03:01:39,344 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-10 03:01:39,348 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-10 03:01:39,348 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.04 03:01:35" (1/4) ... [2018-04-10 03:01:39,349 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@544e16e9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.04 03:01:39, skipping insertion in model container [2018-04-10 03:01:39,349 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.04 03:01:35" (2/4) ... [2018-04-10 03:01:39,350 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@544e16e9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.04 03:01:39, skipping insertion in model container [2018-04-10 03:01:39,350 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.04 03:01:36" (3/4) ... [2018-04-10 03:01:39,350 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@544e16e9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 10.04 03:01:39, skipping insertion in model container [2018-04-10 03:01:39,350 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 10.04 03:01:39" (4/4) ... [2018-04-10 03:01:39,352 INFO L107 eAbstractionObserver]: Analyzing ICFG memPartitionedIcfg [2018-04-10 03:01:39,362 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-10 03:01:39,369 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 6 error locations. [2018-04-10 03:01:39,405 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-10 03:01:39,406 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-10 03:01:39,406 INFO L370 AbstractCegarLoop]: Hoare is true [2018-04-10 03:01:39,406 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-10 03:01:39,406 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-10 03:01:39,406 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-10 03:01:39,406 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-10 03:01:39,406 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-10 03:01:39,406 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-10 03:01:39,407 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-10 03:01:39,419 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states. [2018-04-10 03:01:39,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-04-10 03:01:39,425 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:01:39,426 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:01:39,426 INFO L408 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:01:39,431 INFO L82 PathProgramCache]: Analyzing trace with hash 1261173293, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:01:39,457 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:01:39,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:01:39,496 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:01:39,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:39,539 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:01:39,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:39,595 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-10 03:01:39,595 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [] total 4 [2018-04-10 03:01:39,597 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-10 03:01:39,605 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-10 03:01:39,605 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-04-10 03:01:39,607 INFO L87 Difference]: Start difference. First operand 64 states. Second operand 5 states. [2018-04-10 03:01:39,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:01:39,815 INFO L93 Difference]: Finished difference Result 141 states and 163 transitions. [2018-04-10 03:01:39,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-10 03:01:39,817 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-04-10 03:01:39,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:01:39,826 INFO L225 Difference]: With dead ends: 141 [2018-04-10 03:01:39,827 INFO L226 Difference]: Without dead ends: 84 [2018-04-10 03:01:39,831 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 27 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-04-10 03:01:39,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2018-04-10 03:01:39,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 68. [2018-04-10 03:01:39,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-04-10 03:01:39,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 71 transitions. [2018-04-10 03:01:39,873 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 71 transitions. Word has length 16 [2018-04-10 03:01:39,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:01:39,873 INFO L459 AbstractCegarLoop]: Abstraction has 68 states and 71 transitions. [2018-04-10 03:01:39,874 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-10 03:01:39,874 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 71 transitions. [2018-04-10 03:01:39,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-04-10 03:01:39,876 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:01:39,876 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:01:39,876 INFO L408 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:01:39,876 INFO L82 PathProgramCache]: Analyzing trace with hash -635853243, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:01:39,945 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:01:39,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:01:39,987 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:01:40,017 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:40,018 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:01:40,100 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:40,127 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-10 03:01:40,127 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2, 2] imperfect sequences [] total 3 [2018-04-10 03:01:40,129 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-10 03:01:40,129 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-10 03:01:40,130 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-04-10 03:01:40,130 INFO L87 Difference]: Start difference. First operand 68 states and 71 transitions. Second operand 4 states. [2018-04-10 03:01:40,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:01:40,187 INFO L93 Difference]: Finished difference Result 82 states and 86 transitions. [2018-04-10 03:01:40,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-10 03:01:40,189 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2018-04-10 03:01:40,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:01:40,193 INFO L225 Difference]: With dead ends: 82 [2018-04-10 03:01:40,193 INFO L226 Difference]: Without dead ends: 81 [2018-04-10 03:01:40,194 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-04-10 03:01:40,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2018-04-10 03:01:40,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 71. [2018-04-10 03:01:40,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-04-10 03:01:40,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 75 transitions. [2018-04-10 03:01:40,203 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 75 transitions. Word has length 25 [2018-04-10 03:01:40,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:01:40,203 INFO L459 AbstractCegarLoop]: Abstraction has 71 states and 75 transitions. [2018-04-10 03:01:40,203 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-10 03:01:40,203 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 75 transitions. [2018-04-10 03:01:40,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-04-10 03:01:40,204 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:01:40,204 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:01:40,204 INFO L408 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:01:40,205 INFO L82 PathProgramCache]: Analyzing trace with hash 1763386179, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:01:40,217 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:01:40,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:01:40,238 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:01:40,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-10 03:01:40,270 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:01:40,272 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:01:40,273 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-10 03:01:40,307 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:40,308 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:01:40,322 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:40,357 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-10 03:01:40,357 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [] total 5 [2018-04-10 03:01:40,357 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-10 03:01:40,357 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-10 03:01:40,358 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-10 03:01:40,358 INFO L87 Difference]: Start difference. First operand 71 states and 75 transitions. Second operand 6 states. [2018-04-10 03:01:40,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:01:40,430 INFO L93 Difference]: Finished difference Result 71 states and 75 transitions. [2018-04-10 03:01:40,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-10 03:01:40,430 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26 [2018-04-10 03:01:40,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:01:40,432 INFO L225 Difference]: With dead ends: 71 [2018-04-10 03:01:40,432 INFO L226 Difference]: Without dead ends: 70 [2018-04-10 03:01:40,432 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-10 03:01:40,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-04-10 03:01:40,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 70. [2018-04-10 03:01:40,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-04-10 03:01:40,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 74 transitions. [2018-04-10 03:01:40,440 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 74 transitions. Word has length 26 [2018-04-10 03:01:40,440 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:01:40,440 INFO L459 AbstractCegarLoop]: Abstraction has 70 states and 74 transitions. [2018-04-10 03:01:40,440 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-10 03:01:40,441 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 74 transitions. [2018-04-10 03:01:40,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-04-10 03:01:40,441 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:01:40,442 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:01:40,442 INFO L408 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:01:40,442 INFO L82 PathProgramCache]: Analyzing trace with hash 1763386180, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:01:40,453 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:01:40,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:01:40,473 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:01:40,486 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-10 03:01:40,487 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:01:40,510 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:01:40,510 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-10 03:01:40,675 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:40,675 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:01:40,803 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:40,826 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-10 03:01:40,826 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6, 6] imperfect sequences [] total 11 [2018-04-10 03:01:40,827 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-10 03:01:40,827 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-10 03:01:40,827 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=104, Unknown=0, NotChecked=0, Total=132 [2018-04-10 03:01:40,827 INFO L87 Difference]: Start difference. First operand 70 states and 74 transitions. Second operand 12 states. [2018-04-10 03:01:41,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:01:41,061 INFO L93 Difference]: Finished difference Result 79 states and 83 transitions. [2018-04-10 03:01:41,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-10 03:01:41,062 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 26 [2018-04-10 03:01:41,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:01:41,063 INFO L225 Difference]: With dead ends: 79 [2018-04-10 03:01:41,063 INFO L226 Difference]: Without dead ends: 78 [2018-04-10 03:01:41,063 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=58, Invalid=182, Unknown=0, NotChecked=0, Total=240 [2018-04-10 03:01:41,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-04-10 03:01:41,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 71. [2018-04-10 03:01:41,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-04-10 03:01:41,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 75 transitions. [2018-04-10 03:01:41,071 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 75 transitions. Word has length 26 [2018-04-10 03:01:41,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:01:41,071 INFO L459 AbstractCegarLoop]: Abstraction has 71 states and 75 transitions. [2018-04-10 03:01:41,071 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-10 03:01:41,071 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 75 transitions. [2018-04-10 03:01:41,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-04-10 03:01:41,072 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:01:41,072 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:01:41,072 INFO L408 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:01:41,073 INFO L82 PathProgramCache]: Analyzing trace with hash -1552158473, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:01:41,082 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:01:41,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:01:41,102 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:01:41,143 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:41,143 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:01:41,184 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:41,205 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:01:41,206 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 7 [2018-04-10 03:01:41,206 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-10 03:01:41,206 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-10 03:01:41,206 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-04-10 03:01:41,206 INFO L87 Difference]: Start difference. First operand 71 states and 75 transitions. Second operand 8 states. [2018-04-10 03:01:41,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:01:41,326 INFO L93 Difference]: Finished difference Result 105 states and 112 transitions. [2018-04-10 03:01:41,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-10 03:01:41,327 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2018-04-10 03:01:41,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:01:41,328 INFO L225 Difference]: With dead ends: 105 [2018-04-10 03:01:41,328 INFO L226 Difference]: Without dead ends: 104 [2018-04-10 03:01:41,328 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-04-10 03:01:41,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-04-10 03:01:41,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 88. [2018-04-10 03:01:41,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-04-10 03:01:41,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 95 transitions. [2018-04-10 03:01:41,335 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 95 transitions. Word has length 34 [2018-04-10 03:01:41,335 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:01:41,335 INFO L459 AbstractCegarLoop]: Abstraction has 88 states and 95 transitions. [2018-04-10 03:01:41,335 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-10 03:01:41,335 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 95 transitions. [2018-04-10 03:01:41,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-10 03:01:41,336 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:01:41,336 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:01:41,336 INFO L408 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:01:41,336 INFO L82 PathProgramCache]: Analyzing trace with hash -872272174, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:01:41,345 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:01:41,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:01:41,359 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:01:41,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-10 03:01:41,367 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:01:41,389 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:01:41,389 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-10 03:01:41,476 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:41,477 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:01:41,620 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:41,648 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:01:41,649 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 15 [2018-04-10 03:01:41,649 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-10 03:01:41,649 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-10 03:01:41,649 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=196, Unknown=0, NotChecked=0, Total=240 [2018-04-10 03:01:41,649 INFO L87 Difference]: Start difference. First operand 88 states and 95 transitions. Second operand 16 states. [2018-04-10 03:01:41,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:01:41,940 INFO L93 Difference]: Finished difference Result 102 states and 109 transitions. [2018-04-10 03:01:41,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-10 03:01:41,940 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 35 [2018-04-10 03:01:41,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:01:41,942 INFO L225 Difference]: With dead ends: 102 [2018-04-10 03:01:41,942 INFO L226 Difference]: Without dead ends: 101 [2018-04-10 03:01:41,943 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=128, Invalid=424, Unknown=0, NotChecked=0, Total=552 [2018-04-10 03:01:41,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-04-10 03:01:41,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 89. [2018-04-10 03:01:41,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-04-10 03:01:41,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 95 transitions. [2018-04-10 03:01:41,952 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 95 transitions. Word has length 35 [2018-04-10 03:01:41,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:01:41,952 INFO L459 AbstractCegarLoop]: Abstraction has 89 states and 95 transitions. [2018-04-10 03:01:41,952 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-10 03:01:41,952 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 95 transitions. [2018-04-10 03:01:41,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-04-10 03:01:41,953 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:01:41,953 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:01:41,953 INFO L408 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:01:41,953 INFO L82 PathProgramCache]: Analyzing trace with hash -1746619775, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:01:41,959 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:01:41,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:01:41,973 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:01:41,989 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:41,989 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:01:42,029 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:42,050 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-10 03:01:42,050 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [] total 8 [2018-04-10 03:01:42,051 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-10 03:01:42,051 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-10 03:01:42,051 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-04-10 03:01:42,051 INFO L87 Difference]: Start difference. First operand 89 states and 95 transitions. Second operand 8 states. [2018-04-10 03:01:42,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:01:42,114 INFO L93 Difference]: Finished difference Result 165 states and 177 transitions. [2018-04-10 03:01:42,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-10 03:01:42,114 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 37 [2018-04-10 03:01:42,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:01:42,115 INFO L225 Difference]: With dead ends: 165 [2018-04-10 03:01:42,115 INFO L226 Difference]: Without dead ends: 89 [2018-04-10 03:01:42,116 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 66 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-04-10 03:01:42,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-04-10 03:01:42,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 89. [2018-04-10 03:01:42,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-04-10 03:01:42,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 94 transitions. [2018-04-10 03:01:42,125 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 94 transitions. Word has length 37 [2018-04-10 03:01:42,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:01:42,125 INFO L459 AbstractCegarLoop]: Abstraction has 89 states and 94 transitions. [2018-04-10 03:01:42,125 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-10 03:01:42,125 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 94 transitions. [2018-04-10 03:01:42,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-04-10 03:01:42,126 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:01:42,127 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:01:42,127 INFO L408 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:01:42,127 INFO L82 PathProgramCache]: Analyzing trace with hash 356680243, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:01:42,135 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:01:42,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:01:42,152 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:01:42,184 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:42,184 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:01:42,259 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:42,281 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:01:42,281 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-04-10 03:01:42,281 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-10 03:01:42,281 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-10 03:01:42,281 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=88, Unknown=0, NotChecked=0, Total=132 [2018-04-10 03:01:42,282 INFO L87 Difference]: Start difference. First operand 89 states and 94 transitions. Second operand 12 states. [2018-04-10 03:01:42,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:01:42,535 INFO L93 Difference]: Finished difference Result 171 states and 181 transitions. [2018-04-10 03:01:42,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-10 03:01:42,537 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 46 [2018-04-10 03:01:42,538 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:01:42,539 INFO L225 Difference]: With dead ends: 171 [2018-04-10 03:01:42,539 INFO L226 Difference]: Without dead ends: 92 [2018-04-10 03:01:42,540 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 80 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=120, Invalid=222, Unknown=0, NotChecked=0, Total=342 [2018-04-10 03:01:42,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2018-04-10 03:01:42,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 89. [2018-04-10 03:01:42,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-04-10 03:01:42,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 92 transitions. [2018-04-10 03:01:42,553 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 92 transitions. Word has length 46 [2018-04-10 03:01:42,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:01:42,553 INFO L459 AbstractCegarLoop]: Abstraction has 89 states and 92 transitions. [2018-04-10 03:01:42,553 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-10 03:01:42,553 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 92 transitions. [2018-04-10 03:01:42,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-04-10 03:01:42,555 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:01:42,555 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:01:42,555 INFO L408 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:01:42,555 INFO L82 PathProgramCache]: Analyzing trace with hash -1816571721, now seen corresponding path program 2 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:01:42,563 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:01:42,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:01:42,579 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:01:42,616 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:42,616 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:01:42,720 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:42,742 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:01:42,742 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 15 [2018-04-10 03:01:42,743 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-10 03:01:42,743 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-10 03:01:42,743 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-04-10 03:01:42,743 INFO L87 Difference]: Start difference. First operand 89 states and 92 transitions. Second operand 16 states. [2018-04-10 03:01:43,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:01:43,125 INFO L93 Difference]: Finished difference Result 146 states and 156 transitions. [2018-04-10 03:01:43,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-10 03:01:43,126 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 52 [2018-04-10 03:01:43,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:01:43,127 INFO L225 Difference]: With dead ends: 146 [2018-04-10 03:01:43,127 INFO L226 Difference]: Without dead ends: 145 [2018-04-10 03:01:43,128 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=206, Invalid=550, Unknown=0, NotChecked=0, Total=756 [2018-04-10 03:01:43,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-04-10 03:01:43,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 124. [2018-04-10 03:01:43,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-04-10 03:01:43,145 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 134 transitions. [2018-04-10 03:01:43,145 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 134 transitions. Word has length 52 [2018-04-10 03:01:43,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:01:43,145 INFO L459 AbstractCegarLoop]: Abstraction has 124 states and 134 transitions. [2018-04-10 03:01:43,145 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-10 03:01:43,146 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 134 transitions. [2018-04-10 03:01:43,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-04-10 03:01:43,147 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:01:43,147 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:01:43,147 INFO L408 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:01:43,147 INFO L82 PathProgramCache]: Analyzing trace with hash -479148270, now seen corresponding path program 2 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:01:43,160 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:01:43,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:01:43,180 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:01:43,185 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-10 03:01:43,185 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:01:43,226 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:01:43,226 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-10 03:01:43,385 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:43,385 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:01:43,715 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:43,747 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:01:43,747 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 23 [2018-04-10 03:01:43,748 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-10 03:01:43,748 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-10 03:01:43,748 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=464, Unknown=0, NotChecked=0, Total=552 [2018-04-10 03:01:43,748 INFO L87 Difference]: Start difference. First operand 124 states and 134 transitions. Second operand 24 states. [2018-04-10 03:01:44,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:01:44,614 INFO L93 Difference]: Finished difference Result 141 states and 151 transitions. [2018-04-10 03:01:44,614 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-10 03:01:44,614 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 53 [2018-04-10 03:01:44,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:01:44,615 INFO L225 Difference]: With dead ends: 141 [2018-04-10 03:01:44,615 INFO L226 Difference]: Without dead ends: 140 [2018-04-10 03:01:44,616 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=346, Invalid=1214, Unknown=0, NotChecked=0, Total=1560 [2018-04-10 03:01:44,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-04-10 03:01:44,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 125. [2018-04-10 03:01:44,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-10 03:01:44,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 132 transitions. [2018-04-10 03:01:44,624 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 132 transitions. Word has length 53 [2018-04-10 03:01:44,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:01:44,624 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 132 transitions. [2018-04-10 03:01:44,625 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-10 03:01:44,625 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 132 transitions. [2018-04-10 03:01:44,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-04-10 03:01:44,626 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:01:44,626 INFO L355 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:01:44,626 INFO L408 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:01:44,626 INFO L82 PathProgramCache]: Analyzing trace with hash 330187251, now seen corresponding path program 2 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:01:44,635 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:01:44,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:01:44,654 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:01:44,733 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 33 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:44,734 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:01:44,901 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 33 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:44,922 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:01:44,922 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-04-10 03:01:44,922 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-10 03:01:44,922 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-10 03:01:44,922 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=268, Unknown=0, NotChecked=0, Total=380 [2018-04-10 03:01:44,923 INFO L87 Difference]: Start difference. First operand 125 states and 132 transitions. Second operand 20 states. [2018-04-10 03:01:45,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:01:45,275 INFO L93 Difference]: Finished difference Result 243 states and 257 transitions. [2018-04-10 03:01:45,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-04-10 03:01:45,282 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 64 [2018-04-10 03:01:45,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:01:45,283 INFO L225 Difference]: With dead ends: 243 [2018-04-10 03:01:45,283 INFO L226 Difference]: Without dead ends: 128 [2018-04-10 03:01:45,284 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 108 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=386, Invalid=804, Unknown=0, NotChecked=0, Total=1190 [2018-04-10 03:01:45,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-04-10 03:01:45,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 125. [2018-04-10 03:01:45,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-10 03:01:45,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 128 transitions. [2018-04-10 03:01:45,303 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 128 transitions. Word has length 64 [2018-04-10 03:01:45,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:01:45,304 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 128 transitions. [2018-04-10 03:01:45,304 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-10 03:01:45,304 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 128 transitions. [2018-04-10 03:01:45,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-04-10 03:01:45,304 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:01:45,305 INFO L355 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:01:45,305 INFO L408 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:01:45,305 INFO L82 PathProgramCache]: Analyzing trace with hash -1545682889, now seen corresponding path program 3 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:01:45,316 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:01:45,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:01:45,348 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:01:45,478 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:45,479 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:01:45,831 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:45,862 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:01:45,862 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 31 [2018-04-10 03:01:45,862 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-04-10 03:01:45,863 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-04-10 03:01:45,863 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=174, Invalid=818, Unknown=0, NotChecked=0, Total=992 [2018-04-10 03:01:45,863 INFO L87 Difference]: Start difference. First operand 125 states and 128 transitions. Second operand 32 states. [2018-04-10 03:01:47,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:01:47,060 INFO L93 Difference]: Finished difference Result 234 states and 252 transitions. [2018-04-10 03:01:47,060 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-04-10 03:01:47,060 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 88 [2018-04-10 03:01:47,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:01:47,062 INFO L225 Difference]: With dead ends: 234 [2018-04-10 03:01:47,062 INFO L226 Difference]: Without dead ends: 233 [2018-04-10 03:01:47,063 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 145 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 434 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=862, Invalid=2678, Unknown=0, NotChecked=0, Total=3540 [2018-04-10 03:01:47,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-04-10 03:01:47,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 196. [2018-04-10 03:01:47,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2018-04-10 03:01:47,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 214 transitions. [2018-04-10 03:01:47,071 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 214 transitions. Word has length 88 [2018-04-10 03:01:47,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:01:47,071 INFO L459 AbstractCegarLoop]: Abstraction has 196 states and 214 transitions. [2018-04-10 03:01:47,071 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-04-10 03:01:47,071 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 214 transitions. [2018-04-10 03:01:47,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-04-10 03:01:47,072 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:01:47,072 INFO L355 BasicCegarLoop]: trace histogram [8, 8, 8, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:01:47,072 INFO L408 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:01:47,072 INFO L82 PathProgramCache]: Analyzing trace with hash -671529070, now seen corresponding path program 3 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:01:47,080 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:01:47,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:01:47,113 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:01:47,127 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-10 03:01:47,127 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:01:47,156 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:01:47,156 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-10 03:01:47,503 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 217 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:47,503 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:01:48,044 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 217 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:48,067 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:01:48,067 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 39 [2018-04-10 03:01:48,067 INFO L442 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-04-10 03:01:48,068 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-04-10 03:01:48,068 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=224, Invalid=1336, Unknown=0, NotChecked=0, Total=1560 [2018-04-10 03:01:48,068 INFO L87 Difference]: Start difference. First operand 196 states and 214 transitions. Second operand 40 states. [2018-04-10 03:01:50,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:01:50,364 INFO L93 Difference]: Finished difference Result 225 states and 243 transitions. [2018-04-10 03:01:50,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-04-10 03:01:50,365 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 89 [2018-04-10 03:01:50,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:01:50,366 INFO L225 Difference]: With dead ends: 225 [2018-04-10 03:01:50,367 INFO L226 Difference]: Without dead ends: 224 [2018-04-10 03:01:50,368 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 209 GetRequests, 139 SyntacticMatches, 0 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 888 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=1118, Invalid=3994, Unknown=0, NotChecked=0, Total=5112 [2018-04-10 03:01:50,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-04-10 03:01:50,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 197. [2018-04-10 03:01:50,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-04-10 03:01:50,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 208 transitions. [2018-04-10 03:01:50,380 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 208 transitions. Word has length 89 [2018-04-10 03:01:50,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:01:50,380 INFO L459 AbstractCegarLoop]: Abstraction has 197 states and 208 transitions. [2018-04-10 03:01:50,380 INFO L460 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-04-10 03:01:50,380 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 208 transitions. [2018-04-10 03:01:50,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-04-10 03:01:50,381 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:01:50,382 INFO L355 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:01:50,382 INFO L408 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:01:50,382 INFO L82 PathProgramCache]: Analyzing trace with hash 631796083, now seen corresponding path program 3 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:01:50,400 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:01:50,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:01:50,427 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:01:50,606 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 4 proven. 203 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:50,606 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:01:50,981 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 4 proven. 203 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:51,008 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:01:51,008 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 36 [2018-04-10 03:01:51,009 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-10 03:01:51,009 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-10 03:01:51,009 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=344, Invalid=916, Unknown=0, NotChecked=0, Total=1260 [2018-04-10 03:01:51,010 INFO L87 Difference]: Start difference. First operand 197 states and 208 transitions. Second operand 36 states. [2018-04-10 03:01:51,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:01:51,987 INFO L93 Difference]: Finished difference Result 387 states and 409 transitions. [2018-04-10 03:01:51,988 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-10 03:01:51,988 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 100 [2018-04-10 03:01:51,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:01:51,989 INFO L225 Difference]: With dead ends: 387 [2018-04-10 03:01:51,989 INFO L226 Difference]: Without dead ends: 200 [2018-04-10 03:01:51,991 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 230 GetRequests, 164 SyntacticMatches, 1 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1145 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1398, Invalid=3024, Unknown=0, NotChecked=0, Total=4422 [2018-04-10 03:01:51,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2018-04-10 03:01:51,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 197. [2018-04-10 03:01:51,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-04-10 03:01:51,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 200 transitions. [2018-04-10 03:01:52,000 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 200 transitions. Word has length 100 [2018-04-10 03:01:52,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:01:52,000 INFO L459 AbstractCegarLoop]: Abstraction has 197 states and 200 transitions. [2018-04-10 03:01:52,000 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-10 03:01:52,000 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 200 transitions. [2018-04-10 03:01:52,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2018-04-10 03:01:52,002 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:01:52,002 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 15, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:01:52,002 INFO L408 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:01:52,003 INFO L82 PathProgramCache]: Analyzing trace with hash 6577975, now seen corresponding path program 4 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:01:52,010 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:01:52,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:01:52,049 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:01:52,549 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:52,549 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:01:53,620 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:01:53,641 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:01:53,642 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 63 [2018-04-10 03:01:53,642 INFO L442 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-04-10 03:01:53,642 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-04-10 03:01:53,643 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=606, Invalid=3426, Unknown=0, NotChecked=0, Total=4032 [2018-04-10 03:01:53,643 INFO L87 Difference]: Start difference. First operand 197 states and 200 transitions. Second operand 64 states. [2018-04-10 03:01:59,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:01:59,867 INFO L93 Difference]: Finished difference Result 410 states and 444 transitions. [2018-04-10 03:01:59,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-04-10 03:01:59,867 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 160 [2018-04-10 03:01:59,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:01:59,869 INFO L225 Difference]: With dead ends: 410 [2018-04-10 03:01:59,869 INFO L226 Difference]: Without dead ends: 409 [2018-04-10 03:01:59,874 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 379 GetRequests, 257 SyntacticMatches, 0 SemanticMatches, 122 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2010 ImplicationChecksByTransitivity, 6.1s TimeCoverageRelationStatistics Valid=3518, Invalid=11734, Unknown=0, NotChecked=0, Total=15252 [2018-04-10 03:01:59,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 409 states. [2018-04-10 03:01:59,889 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 409 to 340. [2018-04-10 03:01:59,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 340 states. [2018-04-10 03:01:59,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 374 transitions. [2018-04-10 03:01:59,892 INFO L78 Accepts]: Start accepts. Automaton has 340 states and 374 transitions. Word has length 160 [2018-04-10 03:01:59,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:01:59,893 INFO L459 AbstractCegarLoop]: Abstraction has 340 states and 374 transitions. [2018-04-10 03:01:59,893 INFO L460 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-04-10 03:01:59,893 INFO L276 IsEmpty]: Start isEmpty. Operand 340 states and 374 transitions. [2018-04-10 03:01:59,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2018-04-10 03:01:59,895 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:01:59,895 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 16, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:01:59,895 INFO L408 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:01:59,895 INFO L82 PathProgramCache]: Analyzing trace with hash 203917458, now seen corresponding path program 4 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:01:59,909 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:01:59,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:01:59,962 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:01:59,965 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-10 03:01:59,966 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:01:59,969 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:01:59,969 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-10 03:02:00,769 INFO L134 CoverageAnalysis]: Checked inductivity of 1005 backedges. 0 proven. 1005 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:02:00,769 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:02:01,987 INFO L134 CoverageAnalysis]: Checked inductivity of 1005 backedges. 0 proven. 1005 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:02:02,014 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:02:02,014 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36] total 71 [2018-04-10 03:02:02,014 INFO L442 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-04-10 03:02:02,015 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-04-10 03:02:02,016 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=688, Invalid=4424, Unknown=0, NotChecked=0, Total=5112 [2018-04-10 03:02:02,016 INFO L87 Difference]: Start difference. First operand 340 states and 374 transitions. Second operand 72 states. [2018-04-10 03:02:04,787 WARN L151 SmtUtils]: Spent 185ms on a formula simplification. DAG size of input: 124 DAG size of output 27 [2018-04-10 03:02:05,290 WARN L151 SmtUtils]: Spent 187ms on a formula simplification. DAG size of input: 120 DAG size of output 26 [2018-04-10 03:02:05,580 WARN L151 SmtUtils]: Spent 115ms on a formula simplification. DAG size of input: 117 DAG size of output 27 [2018-04-10 03:02:05,908 WARN L151 SmtUtils]: Spent 112ms on a formula simplification. DAG size of input: 113 DAG size of output 26 [2018-04-10 03:02:06,170 WARN L151 SmtUtils]: Spent 109ms on a formula simplification. DAG size of input: 110 DAG size of output 27 [2018-04-10 03:02:06,686 WARN L151 SmtUtils]: Spent 100ms on a formula simplification. DAG size of input: 103 DAG size of output 27 [2018-04-10 03:02:10,559 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:02:10,559 INFO L93 Difference]: Finished difference Result 393 states and 427 transitions. [2018-04-10 03:02:10,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2018-04-10 03:02:10,559 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 161 [2018-04-10 03:02:10,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:02:10,562 INFO L225 Difference]: With dead ends: 393 [2018-04-10 03:02:10,562 INFO L226 Difference]: Without dead ends: 392 [2018-04-10 03:02:10,566 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 385 GetRequests, 251 SyntacticMatches, 0 SemanticMatches, 134 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3440 ImplicationChecksByTransitivity, 8.5s TimeCoverageRelationStatistics Valid=4006, Invalid=14354, Unknown=0, NotChecked=0, Total=18360 [2018-04-10 03:02:10,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2018-04-10 03:02:10,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 341. [2018-04-10 03:02:10,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 341 states. [2018-04-10 03:02:10,582 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 341 states to 341 states and 360 transitions. [2018-04-10 03:02:10,582 INFO L78 Accepts]: Start accepts. Automaton has 341 states and 360 transitions. Word has length 161 [2018-04-10 03:02:10,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:02:10,583 INFO L459 AbstractCegarLoop]: Abstraction has 341 states and 360 transitions. [2018-04-10 03:02:10,583 INFO L460 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-04-10 03:02:10,583 INFO L276 IsEmpty]: Start isEmpty. Operand 341 states and 360 transitions. [2018-04-10 03:02:10,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2018-04-10 03:02:10,585 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:02:10,586 INFO L355 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 15, 15, 15, 15, 15, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:02:10,586 INFO L408 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:02:10,586 INFO L82 PathProgramCache]: Analyzing trace with hash 1136103539, now seen corresponding path program 4 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:02:10,601 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:02:10,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:02:10,652 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:02:11,239 INFO L134 CoverageAnalysis]: Checked inductivity of 979 backedges. 4 proven. 975 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:02:11,239 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:02:11,478 WARN L148 SmtUtils]: Spent 156ms on a formula simplification that was a NOOP. DAG size: 85 [2018-04-10 03:02:12,181 INFO L134 CoverageAnalysis]: Checked inductivity of 979 backedges. 4 proven. 975 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:02:12,204 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:02:12,204 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35] total 68 [2018-04-10 03:02:12,205 INFO L442 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-04-10 03:02:12,205 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-04-10 03:02:12,206 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1192, Invalid=3364, Unknown=0, NotChecked=0, Total=4556 [2018-04-10 03:02:12,206 INFO L87 Difference]: Start difference. First operand 341 states and 360 transitions. Second operand 68 states. [2018-04-10 03:02:15,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:02:15,120 INFO L93 Difference]: Finished difference Result 675 states and 713 transitions. [2018-04-10 03:02:15,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2018-04-10 03:02:15,121 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 172 [2018-04-10 03:02:15,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:02:15,123 INFO L225 Difference]: With dead ends: 675 [2018-04-10 03:02:15,123 INFO L226 Difference]: Without dead ends: 344 [2018-04-10 03:02:15,125 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 406 GetRequests, 276 SyntacticMatches, 1 SemanticMatches, 129 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4729 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=5342, Invalid=11688, Unknown=0, NotChecked=0, Total=17030 [2018-04-10 03:02:15,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 344 states. [2018-04-10 03:02:15,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 344 to 341. [2018-04-10 03:02:15,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 341 states. [2018-04-10 03:02:15,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 341 states to 341 states and 344 transitions. [2018-04-10 03:02:15,137 INFO L78 Accepts]: Start accepts. Automaton has 341 states and 344 transitions. Word has length 172 [2018-04-10 03:02:15,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:02:15,137 INFO L459 AbstractCegarLoop]: Abstraction has 341 states and 344 transitions. [2018-04-10 03:02:15,138 INFO L460 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-04-10 03:02:15,138 INFO L276 IsEmpty]: Start isEmpty. Operand 341 states and 344 transitions. [2018-04-10 03:02:15,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 305 [2018-04-10 03:02:15,139 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:02:15,139 INFO L355 BasicCegarLoop]: trace histogram [32, 32, 31, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:02:15,139 INFO L408 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:02:15,140 INFO L82 PathProgramCache]: Analyzing trace with hash 517643575, now seen corresponding path program 5 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:02:15,146 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:02:15,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:02:15,208 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:02:16,954 INFO L134 CoverageAnalysis]: Checked inductivity of 4278 backedges. 0 proven. 4278 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:02:16,954 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:02:21,159 INFO L134 CoverageAnalysis]: Checked inductivity of 4278 backedges. 0 proven. 4278 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:02:21,181 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:02:21,181 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [64, 64] total 127 [2018-04-10 03:02:21,182 INFO L442 AbstractCegarLoop]: Interpolant automaton has 128 states [2018-04-10 03:02:21,182 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 128 interpolants. [2018-04-10 03:02:21,184 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1277, Invalid=14979, Unknown=0, NotChecked=0, Total=16256 [2018-04-10 03:02:21,184 INFO L87 Difference]: Start difference. First operand 341 states and 344 transitions. Second operand 128 states. [2018-04-10 03:02:27,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:02:27,582 INFO L93 Difference]: Finished difference Result 359 states and 363 transitions. [2018-04-10 03:02:27,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-04-10 03:02:27,582 INFO L78 Accepts]: Start accepts. Automaton has 128 states. Word has length 304 [2018-04-10 03:02:27,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:02:27,585 INFO L225 Difference]: With dead ends: 359 [2018-04-10 03:02:27,585 INFO L226 Difference]: Without dead ends: 358 [2018-04-10 03:02:27,588 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 669 GetRequests, 481 SyntacticMatches, 0 SemanticMatches, 188 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3844 ImplicationChecksByTransitivity, 8.2s TimeCoverageRelationStatistics Valid=3540, Invalid=32370, Unknown=0, NotChecked=0, Total=35910 [2018-04-10 03:02:27,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 358 states. [2018-04-10 03:02:27,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 358 to 349. [2018-04-10 03:02:27,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 349 states. [2018-04-10 03:02:27,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 349 states to 349 states and 353 transitions. [2018-04-10 03:02:27,605 INFO L78 Accepts]: Start accepts. Automaton has 349 states and 353 transitions. Word has length 304 [2018-04-10 03:02:27,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:02:27,606 INFO L459 AbstractCegarLoop]: Abstraction has 349 states and 353 transitions. [2018-04-10 03:02:27,606 INFO L460 AbstractCegarLoop]: Interpolant automaton has 128 states. [2018-04-10 03:02:27,606 INFO L276 IsEmpty]: Start isEmpty. Operand 349 states and 353 transitions. [2018-04-10 03:02:27,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 306 [2018-04-10 03:02:27,608 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:02:27,608 INFO L355 BasicCegarLoop]: trace histogram [32, 32, 32, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:02:27,608 INFO L408 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:02:27,608 INFO L82 PathProgramCache]: Analyzing trace with hash -1132918126, now seen corresponding path program 5 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:02:27,615 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:02:27,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:02:27,674 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:02:27,677 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-10 03:02:27,677 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:02:27,680 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:02:27,680 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-10 03:02:30,042 INFO L134 CoverageAnalysis]: Checked inductivity of 4309 backedges. 0 proven. 4309 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:02:30,042 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:02:33,886 INFO L134 CoverageAnalysis]: Checked inductivity of 4309 backedges. 0 proven. 4309 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:02:33,908 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:02:33,908 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [68, 68] total 135 [2018-04-10 03:02:33,908 INFO L442 AbstractCegarLoop]: Interpolant automaton has 136 states [2018-04-10 03:02:33,909 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 136 interpolants. [2018-04-10 03:02:33,910 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1423, Invalid=16937, Unknown=0, NotChecked=0, Total=18360 [2018-04-10 03:02:33,910 INFO L87 Difference]: Start difference. First operand 349 states and 353 transitions. Second operand 136 states. [2018-04-10 03:02:43,117 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:02:43,118 INFO L93 Difference]: Finished difference Result 358 states and 362 transitions. [2018-04-10 03:02:43,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 71 states. [2018-04-10 03:02:43,118 INFO L78 Accepts]: Start accepts. Automaton has 136 states. Word has length 305 [2018-04-10 03:02:43,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:02:43,120 INFO L225 Difference]: With dead ends: 358 [2018-04-10 03:02:43,120 INFO L226 Difference]: Without dead ends: 357 [2018-04-10 03:02:43,122 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 676 GetRequests, 475 SyntacticMatches, 0 SemanticMatches, 201 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8641 ImplicationChecksByTransitivity, 9.8s TimeCoverageRelationStatistics Valid=4131, Invalid=36875, Unknown=0, NotChecked=0, Total=41006 [2018-04-10 03:02:43,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2018-04-10 03:02:43,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 350. [2018-04-10 03:02:43,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 350 states. [2018-04-10 03:02:43,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 350 states to 350 states and 354 transitions. [2018-04-10 03:02:43,139 INFO L78 Accepts]: Start accepts. Automaton has 350 states and 354 transitions. Word has length 305 [2018-04-10 03:02:43,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:02:43,140 INFO L459 AbstractCegarLoop]: Abstraction has 350 states and 354 transitions. [2018-04-10 03:02:43,140 INFO L460 AbstractCegarLoop]: Interpolant automaton has 136 states. [2018-04-10 03:02:43,140 INFO L276 IsEmpty]: Start isEmpty. Operand 350 states and 354 transitions. [2018-04-10 03:02:43,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 314 [2018-04-10 03:02:43,142 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:02:43,142 INFO L355 BasicCegarLoop]: trace histogram [33, 33, 32, 32, 32, 32, 32, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:02:43,142 INFO L408 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:02:43,143 INFO L82 PathProgramCache]: Analyzing trace with hash 920431173, now seen corresponding path program 6 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:02:43,156 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:02:43,219 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:02:43,228 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:02:44,813 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 4560 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:02:44,814 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:02:47,796 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 4560 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:02:47,832 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-10 03:02:47,832 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [69, 69] imperfect sequences [] total 134 [2018-04-10 03:02:47,832 INFO L442 AbstractCegarLoop]: Interpolant automaton has 134 states [2018-04-10 03:02:47,833 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 134 interpolants. [2018-04-10 03:02:47,834 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3467, Invalid=14355, Unknown=0, NotChecked=0, Total=17822 [2018-04-10 03:02:47,834 INFO L87 Difference]: Start difference. First operand 350 states and 354 transitions. Second operand 134 states. [2018-04-10 03:02:51,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:02:51,607 INFO L93 Difference]: Finished difference Result 683 states and 692 transitions. [2018-04-10 03:02:51,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2018-04-10 03:02:51,608 INFO L78 Accepts]: Start accepts. Automaton has 134 states. Word has length 313 [2018-04-10 03:02:51,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:02:51,609 INFO L225 Difference]: With dead ends: 683 [2018-04-10 03:02:51,609 INFO L226 Difference]: Without dead ends: 349 [2018-04-10 03:02:51,611 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 692 GetRequests, 491 SyntacticMatches, 2 SemanticMatches, 199 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9379 ImplicationChecksByTransitivity, 6.7s TimeCoverageRelationStatistics Valid=10362, Invalid=29838, Unknown=0, NotChecked=0, Total=40200 [2018-04-10 03:02:51,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 349 states. [2018-04-10 03:02:51,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 349 to 346. [2018-04-10 03:02:51,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 346 states. [2018-04-10 03:02:51,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 346 states to 346 states and 349 transitions. [2018-04-10 03:02:51,627 INFO L78 Accepts]: Start accepts. Automaton has 346 states and 349 transitions. Word has length 313 [2018-04-10 03:02:51,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:02:51,628 INFO L459 AbstractCegarLoop]: Abstraction has 346 states and 349 transitions. [2018-04-10 03:02:51,628 INFO L460 AbstractCegarLoop]: Interpolant automaton has 134 states. [2018-04-10 03:02:51,628 INFO L276 IsEmpty]: Start isEmpty. Operand 346 states and 349 transitions. [2018-04-10 03:02:51,630 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 317 [2018-04-10 03:02:51,630 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:02:51,631 INFO L355 BasicCegarLoop]: trace histogram [32, 31, 31, 31, 31, 31, 31, 31, 31, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:02:51,631 INFO L408 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:02:51,631 INFO L82 PathProgramCache]: Analyzing trace with hash 482397811, now seen corresponding path program 5 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:02:51,639 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:02:51,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:02:51,702 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:02:53,146 INFO L134 CoverageAnalysis]: Checked inductivity of 4251 backedges. 4 proven. 4247 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:02:53,146 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:02:53,487 WARN L148 SmtUtils]: Spent 334ms on a formula simplification that was a NOOP. DAG size: 165 [2018-04-10 03:02:53,710 WARN L148 SmtUtils]: Spent 221ms on a formula simplification that was a NOOP. DAG size: 165 [2018-04-10 03:02:55,004 INFO L134 CoverageAnalysis]: Checked inductivity of 4251 backedges. 4 proven. 4247 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-10 03:02:55,026 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:02:55,026 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [67, 67] total 131 [2018-04-10 03:02:55,027 INFO L442 AbstractCegarLoop]: Interpolant automaton has 131 states [2018-04-10 03:02:55,028 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 131 interpolants. [2018-04-10 03:02:55,028 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3396, Invalid=13634, Unknown=0, NotChecked=0, Total=17030 [2018-04-10 03:02:55,029 INFO L87 Difference]: Start difference. First operand 346 states and 349 transitions. Second operand 131 states. [2018-04-10 03:02:58,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:02:58,034 INFO L93 Difference]: Finished difference Result 679 states and 685 transitions. [2018-04-10 03:02:58,034 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2018-04-10 03:02:58,035 INFO L78 Accepts]: Start accepts. Automaton has 131 states. Word has length 316 [2018-04-10 03:02:58,035 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:02:58,036 INFO L225 Difference]: With dead ends: 679 [2018-04-10 03:02:58,036 INFO L226 Difference]: Without dead ends: 346 [2018-04-10 03:02:58,038 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 694 GetRequests, 500 SyntacticMatches, 2 SemanticMatches, 192 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14760 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=9636, Invalid=27806, Unknown=0, NotChecked=0, Total=37442 [2018-04-10 03:02:58,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346 states. [2018-04-10 03:02:58,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346 to 346. [2018-04-10 03:02:58,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 346 states. [2018-04-10 03:02:58,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 346 states to 346 states and 348 transitions. [2018-04-10 03:02:58,049 INFO L78 Accepts]: Start accepts. Automaton has 346 states and 348 transitions. Word has length 316 [2018-04-10 03:02:58,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:02:58,049 INFO L459 AbstractCegarLoop]: Abstraction has 346 states and 348 transitions. [2018-04-10 03:02:58,049 INFO L460 AbstractCegarLoop]: Interpolant automaton has 131 states. [2018-04-10 03:02:58,049 INFO L276 IsEmpty]: Start isEmpty. Operand 346 states and 348 transitions. [2018-04-10 03:02:58,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 326 [2018-04-10 03:02:58,051 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:02:58,051 INFO L355 BasicCegarLoop]: trace histogram [33, 32, 32, 32, 32, 32, 32, 32, 32, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:02:58,051 INFO L408 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:02:58,051 INFO L82 PathProgramCache]: Analyzing trace with hash -197020031, now seen corresponding path program 6 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:02:58,062 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:02:58,135 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:02:58,142 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:02:58,230 INFO L134 CoverageAnalysis]: Checked inductivity of 4532 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 4528 trivial. 0 not checked. [2018-04-10 03:02:58,230 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:02:58,293 INFO L134 CoverageAnalysis]: Checked inductivity of 4532 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 4528 trivial. 0 not checked. [2018-04-10 03:02:58,316 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-10 03:02:58,317 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [] total 8 [2018-04-10 03:02:58,317 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-10 03:02:58,318 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-10 03:02:58,318 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2018-04-10 03:02:58,318 INFO L87 Difference]: Start difference. First operand 346 states and 348 transitions. Second operand 9 states. [2018-04-10 03:02:58,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:02:58,392 INFO L93 Difference]: Finished difference Result 362 states and 364 transitions. [2018-04-10 03:02:58,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-10 03:02:58,392 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 325 [2018-04-10 03:02:58,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:02:58,394 INFO L225 Difference]: With dead ends: 362 [2018-04-10 03:02:58,394 INFO L226 Difference]: Without dead ends: 361 [2018-04-10 03:02:58,394 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 652 GetRequests, 641 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=82, Unknown=0, NotChecked=0, Total=132 [2018-04-10 03:02:58,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 361 states. [2018-04-10 03:02:58,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 361 to 343. [2018-04-10 03:02:58,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343 states. [2018-04-10 03:02:58,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 345 transitions. [2018-04-10 03:02:58,405 INFO L78 Accepts]: Start accepts. Automaton has 343 states and 345 transitions. Word has length 325 [2018-04-10 03:02:58,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:02:58,406 INFO L459 AbstractCegarLoop]: Abstraction has 343 states and 345 transitions. [2018-04-10 03:02:58,406 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-10 03:02:58,406 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 345 transitions. [2018-04-10 03:02:58,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 333 [2018-04-10 03:02:58,408 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:02:58,409 INFO L355 BasicCegarLoop]: trace histogram [33, 32, 32, 32, 32, 32, 32, 32, 32, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:02:58,409 INFO L408 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:02:58,409 INFO L82 PathProgramCache]: Analyzing trace with hash 312742184, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:02:58,416 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:02:58,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:02:58,494 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:02:58,604 INFO L134 CoverageAnalysis]: Checked inductivity of 4530 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4528 trivial. 0 not checked. [2018-04-10 03:02:58,604 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:02:58,723 INFO L134 CoverageAnalysis]: Checked inductivity of 4530 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4528 trivial. 0 not checked. [2018-04-10 03:02:58,758 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:02:58,758 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-04-10 03:02:58,759 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-10 03:02:58,760 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-10 03:02:58,760 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-04-10 03:02:58,760 INFO L87 Difference]: Start difference. First operand 343 states and 345 transitions. Second operand 8 states. [2018-04-10 03:02:58,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:02:58,919 INFO L93 Difference]: Finished difference Result 402 states and 409 transitions. [2018-04-10 03:02:58,919 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-10 03:02:58,919 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 332 [2018-04-10 03:02:58,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:02:58,921 INFO L225 Difference]: With dead ends: 402 [2018-04-10 03:02:58,921 INFO L226 Difference]: Without dead ends: 382 [2018-04-10 03:02:58,921 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 667 GetRequests, 657 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2018-04-10 03:02:58,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 382 states. [2018-04-10 03:02:58,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 382 to 365. [2018-04-10 03:02:58,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 365 states. [2018-04-10 03:02:58,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 365 states to 365 states and 369 transitions. [2018-04-10 03:02:58,933 INFO L78 Accepts]: Start accepts. Automaton has 365 states and 369 transitions. Word has length 332 [2018-04-10 03:02:58,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:02:58,934 INFO L459 AbstractCegarLoop]: Abstraction has 365 states and 369 transitions. [2018-04-10 03:02:58,934 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-10 03:02:58,934 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 369 transitions. [2018-04-10 03:02:58,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 951 [2018-04-10 03:02:58,943 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:02:58,943 INFO L355 BasicCegarLoop]: trace histogram [99, 96, 96, 96, 96, 96, 96, 96, 96, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:02:58,943 INFO L408 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:02:58,943 INFO L82 PathProgramCache]: Analyzing trace with hash -1041244760, now seen corresponding path program 2 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:02:58,952 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:02:59,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:02:59,160 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:02:59,659 INFO L134 CoverageAnalysis]: Checked inductivity of 41685 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 41646 trivial. 0 not checked. [2018-04-10 03:02:59,659 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:03:00,107 INFO L134 CoverageAnalysis]: Checked inductivity of 41685 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 41646 trivial. 0 not checked. [2018-04-10 03:03:00,130 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:03:00,130 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2018-04-10 03:03:00,131 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-10 03:03:00,131 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-10 03:03:00,131 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=168, Unknown=0, NotChecked=0, Total=240 [2018-04-10 03:03:00,131 INFO L87 Difference]: Start difference. First operand 365 states and 369 transitions. Second operand 16 states. [2018-04-10 03:03:00,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:03:00,615 INFO L93 Difference]: Finished difference Result 446 states and 459 transitions. [2018-04-10 03:03:00,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-10 03:03:00,616 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 950 [2018-04-10 03:03:00,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:03:00,620 INFO L225 Difference]: With dead ends: 446 [2018-04-10 03:03:00,620 INFO L226 Difference]: Without dead ends: 426 [2018-04-10 03:03:00,620 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1911 GetRequests, 1885 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 113 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=259, Invalid=497, Unknown=0, NotChecked=0, Total=756 [2018-04-10 03:03:00,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states. [2018-04-10 03:03:00,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 409. [2018-04-10 03:03:00,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 409 states. [2018-04-10 03:03:00,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 409 states to 409 states and 417 transitions. [2018-04-10 03:03:00,642 INFO L78 Accepts]: Start accepts. Automaton has 409 states and 417 transitions. Word has length 950 [2018-04-10 03:03:00,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:03:00,643 INFO L459 AbstractCegarLoop]: Abstraction has 409 states and 417 transitions. [2018-04-10 03:03:00,643 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-10 03:03:00,643 INFO L276 IsEmpty]: Start isEmpty. Operand 409 states and 417 transitions. [2018-04-10 03:03:00,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2187 [2018-04-10 03:03:00,679 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:03:00,680 INFO L355 BasicCegarLoop]: trace histogram [231, 224, 224, 224, 224, 224, 224, 224, 224, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:03:00,680 INFO L408 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:03:00,681 INFO L82 PathProgramCache]: Analyzing trace with hash 1433179816, now seen corresponding path program 3 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:03:00,690 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:03:01,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:03:01,272 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:03:03,114 INFO L134 CoverageAnalysis]: Checked inductivity of 228375 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 228130 trivial. 0 not checked. [2018-04-10 03:03:03,115 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:03:04,715 INFO L134 CoverageAnalysis]: Checked inductivity of 228375 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 228130 trivial. 0 not checked. [2018-04-10 03:03:04,738 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:03:04,739 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 32 [2018-04-10 03:03:04,740 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-04-10 03:03:04,741 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-04-10 03:03:04,741 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=272, Invalid=720, Unknown=0, NotChecked=0, Total=992 [2018-04-10 03:03:04,741 INFO L87 Difference]: Start difference. First operand 409 states and 417 transitions. Second operand 32 states. [2018-04-10 03:03:05,329 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:03:05,329 INFO L93 Difference]: Finished difference Result 534 states and 559 transitions. [2018-04-10 03:03:05,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-04-10 03:03:05,329 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 2186 [2018-04-10 03:03:05,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:03:05,335 INFO L225 Difference]: With dead ends: 534 [2018-04-10 03:03:05,335 INFO L226 Difference]: Without dead ends: 514 [2018-04-10 03:03:05,337 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4399 GetRequests, 4341 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 681 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1155, Invalid=2385, Unknown=0, NotChecked=0, Total=3540 [2018-04-10 03:03:05,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 514 states. [2018-04-10 03:03:05,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 514 to 497. [2018-04-10 03:03:05,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 497 states. [2018-04-10 03:03:05,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 497 states to 497 states and 513 transitions. [2018-04-10 03:03:05,368 INFO L78 Accepts]: Start accepts. Automaton has 497 states and 513 transitions. Word has length 2186 [2018-04-10 03:03:05,369 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:03:05,369 INFO L459 AbstractCegarLoop]: Abstraction has 497 states and 513 transitions. [2018-04-10 03:03:05,369 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-04-10 03:03:05,369 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 513 transitions. [2018-04-10 03:03:05,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4659 [2018-04-10 03:03:05,516 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:03:05,518 INFO L355 BasicCegarLoop]: trace histogram [495, 480, 480, 480, 480, 480, 480, 480, 480, 16, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:03:05,518 INFO L408 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:03:05,519 INFO L82 PathProgramCache]: Analyzing trace with hash 215648424, now seen corresponding path program 4 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:03:05,534 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:03:06,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:03:06,543 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:03:13,407 INFO L134 CoverageAnalysis]: Checked inductivity of 1051275 backedges. 0 proven. 1185 refuted. 0 times theorem prover too weak. 1050090 trivial. 0 not checked. [2018-04-10 03:03:13,407 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:03:20,228 INFO L134 CoverageAnalysis]: Checked inductivity of 1051275 backedges. 0 proven. 1185 refuted. 0 times theorem prover too weak. 1050090 trivial. 0 not checked. [2018-04-10 03:03:20,262 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:03:20,264 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33] total 64 [2018-04-10 03:03:20,270 INFO L442 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-04-10 03:03:20,270 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-04-10 03:03:20,270 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1056, Invalid=2976, Unknown=0, NotChecked=0, Total=4032 [2018-04-10 03:03:20,271 INFO L87 Difference]: Start difference. First operand 497 states and 513 transitions. Second operand 64 states. [2018-04-10 03:03:22,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:03:22,385 INFO L93 Difference]: Finished difference Result 710 states and 759 transitions. [2018-04-10 03:03:22,385 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-04-10 03:03:22,386 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 4658 [2018-04-10 03:03:22,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:03:22,394 INFO L225 Difference]: With dead ends: 710 [2018-04-10 03:03:22,394 INFO L226 Difference]: Without dead ends: 690 [2018-04-10 03:03:22,396 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9375 GetRequests, 9253 SyntacticMatches, 0 SemanticMatches, 122 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3257 ImplicationChecksByTransitivity, 2.5s TimeCoverageRelationStatistics Valid=4867, Invalid=10385, Unknown=0, NotChecked=0, Total=15252 [2018-04-10 03:03:22,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 690 states. [2018-04-10 03:03:22,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 690 to 673. [2018-04-10 03:03:22,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 673 states. [2018-04-10 03:03:22,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 673 states to 673 states and 705 transitions. [2018-04-10 03:03:22,429 INFO L78 Accepts]: Start accepts. Automaton has 673 states and 705 transitions. Word has length 4658 [2018-04-10 03:03:22,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:03:22,432 INFO L459 AbstractCegarLoop]: Abstraction has 673 states and 705 transitions. [2018-04-10 03:03:22,440 INFO L460 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-04-10 03:03:22,441 INFO L276 IsEmpty]: Start isEmpty. Operand 673 states and 705 transitions. [2018-04-10 03:03:22,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9603 [2018-04-10 03:03:22,808 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:03:22,811 INFO L355 BasicCegarLoop]: trace histogram [1023, 992, 992, 992, 992, 992, 992, 992, 992, 32, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:03:22,811 INFO L408 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:03:22,813 INFO L82 PathProgramCache]: Analyzing trace with hash -729256792, now seen corresponding path program 5 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:03:22,819 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:03:24,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:03:24,787 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:03:52,240 INFO L134 CoverageAnalysis]: Checked inductivity of 4495155 backedges. 0 proven. 5177 refuted. 0 times theorem prover too weak. 4489978 trivial. 0 not checked. [2018-04-10 03:03:52,241 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:04:20,168 INFO L134 CoverageAnalysis]: Checked inductivity of 4495155 backedges. 0 proven. 5177 refuted. 0 times theorem prover too weak. 4489978 trivial. 0 not checked. [2018-04-10 03:04:20,214 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-10 03:04:20,216 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 65] total 65 [2018-04-10 03:04:20,221 INFO L442 AbstractCegarLoop]: Interpolant automaton has 65 states [2018-04-10 03:04:20,222 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2018-04-10 03:04:20,222 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1088, Invalid=3072, Unknown=0, NotChecked=0, Total=4160 [2018-04-10 03:04:20,222 INFO L87 Difference]: Start difference. First operand 673 states and 705 transitions. Second operand 65 states. [2018-04-10 03:04:22,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-10 03:04:22,554 INFO L93 Difference]: Finished difference Result 721 states and 756 transitions. [2018-04-10 03:04:22,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-04-10 03:04:22,555 INFO L78 Accepts]: Start accepts. Automaton has 65 states. Word has length 9602 [2018-04-10 03:04:22,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-10 03:04:22,563 INFO L225 Difference]: With dead ends: 721 [2018-04-10 03:04:22,564 INFO L226 Difference]: Without dead ends: 701 [2018-04-10 03:04:22,565 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 19265 GetRequests, 19077 SyntacticMatches, 63 SemanticMatches, 125 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5673 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=5118, Invalid=10884, Unknown=0, NotChecked=0, Total=16002 [2018-04-10 03:04:22,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 701 states. [2018-04-10 03:04:22,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 701 to 684. [2018-04-10 03:04:22,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 684 states. [2018-04-10 03:04:22,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 684 states to 684 states and 717 transitions. [2018-04-10 03:04:22,609 INFO L78 Accepts]: Start accepts. Automaton has 684 states and 717 transitions. Word has length 9602 [2018-04-10 03:04:22,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-10 03:04:22,615 INFO L459 AbstractCegarLoop]: Abstraction has 684 states and 717 transitions. [2018-04-10 03:04:22,615 INFO L460 AbstractCegarLoop]: Interpolant automaton has 65 states. [2018-04-10 03:04:22,615 INFO L276 IsEmpty]: Start isEmpty. Operand 684 states and 717 transitions. [2018-04-10 03:04:23,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9912 [2018-04-10 03:04:23,045 INFO L347 BasicCegarLoop]: Found error trace [2018-04-10 03:04:23,048 INFO L355 BasicCegarLoop]: trace histogram [1056, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 33, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-10 03:04:23,048 INFO L408 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-10 03:04:23,049 INFO L82 PathProgramCache]: Analyzing trace with hash 1007406076, now seen corresponding path program 6 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-10 03:04:23,055 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-10 03:04:25,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-10 03:04:25,233 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-10 03:04:27,408 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-10 03:04:27,408 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:27,414 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:27,414 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-10 03:04:27,626 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:27,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:27,629 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:27,637 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:27,638 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:27,759 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:27,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:27,761 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:27,767 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:27,768 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:27,920 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:27,922 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:27,922 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:27,928 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:27,928 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:28,078 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:28,079 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:28,080 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:28,085 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:28,085 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:28,223 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:28,224 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:28,225 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:28,230 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:28,230 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:28,382 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:28,383 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:28,384 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:28,390 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:28,391 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:28,573 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:28,574 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:28,575 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:28,580 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:28,580 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:28,730 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:28,731 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:28,732 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:28,737 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:28,737 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:28,889 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:28,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:28,891 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:28,897 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:28,897 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:29,062 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:29,063 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:29,063 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:29,068 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:29,068 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:29,215 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:29,217 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:29,217 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:29,222 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:29,222 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:29,370 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:29,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:29,371 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:29,376 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:29,376 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:29,535 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:29,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:29,537 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:29,543 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:29,543 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:29,719 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:29,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:29,720 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:29,725 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:29,725 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:29,895 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:29,896 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:29,896 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:29,902 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:29,902 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:30,072 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:30,073 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:30,074 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:30,079 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:30,080 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:30,247 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:30,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:30,249 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:30,261 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:30,261 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:30,438 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:30,440 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:30,440 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:30,445 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:30,445 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:30,614 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:30,615 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:30,615 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:30,621 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:30,621 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:30,780 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:30,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:30,781 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:30,786 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:30,786 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:30,965 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:30,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:30,967 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:30,971 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:30,972 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:31,142 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:31,144 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:31,144 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:31,149 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:31,149 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:31,311 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:31,312 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:31,313 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:31,317 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:31,318 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:31,480 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:31,481 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:31,481 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:31,491 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:31,492 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:31,671 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:31,672 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:31,673 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:31,678 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:31,678 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:31,853 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:31,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:31,854 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:31,859 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:31,859 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:32,043 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:32,044 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:32,044 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:32,049 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:32,049 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:32,316 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:32,318 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:32,318 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:32,324 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:32,324 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:32,528 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:32,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:32,530 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:32,535 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:32,536 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:32,734 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:32,736 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:32,736 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:32,742 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:32,742 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-10 03:04:32,946 INFO L700 Elim1Store]: detected not equals via solver [2018-04-10 03:04:32,947 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-10 03:04:32,948 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:04:32,954 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-10 03:04:32,954 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:15, output treesize:5 [2018-04-10 03:05:04,778 INFO L134 CoverageAnalysis]: Checked inductivity of 4790000 backedges. 5055 proven. 294812 refuted. 0 times theorem prover too weak. 4490133 trivial. 0 not checked. [2018-04-10 03:05:04,779 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-10 03:05:12,218 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-04-10 03:05:12,219 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-10 03:05:12,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-04-10 03:05:12,220 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-10 03:05:12,226 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-10 03:05:12,226 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:14, output treesize:7 [2018-04-10 03:05:12,579 WARN L148 SmtUtils]: Spent 349ms on a formula simplification that was a NOOP. DAG size: 167 Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown