java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/ArraysOfVariableLength4_true-valid-memsafety_true-termination.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-8168ed2-m [2018-04-12 04:04:18,877 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-12 04:04:18,879 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-12 04:04:18,892 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-12 04:04:18,892 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-12 04:04:18,893 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-12 04:04:18,893 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-12 04:04:18,895 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-12 04:04:18,897 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-12 04:04:18,898 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-12 04:04:18,899 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-12 04:04:18,899 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-12 04:04:18,900 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-12 04:04:18,901 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-12 04:04:18,902 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-12 04:04:18,904 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-12 04:04:18,906 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-12 04:04:18,908 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-12 04:04:18,909 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-12 04:04:18,910 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-12 04:04:18,913 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-04-12 04:04:18,913 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-04-12 04:04:18,913 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-04-12 04:04:18,914 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-04-12 04:04:18,915 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-04-12 04:04:18,916 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-04-12 04:04:18,916 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-04-12 04:04:18,917 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-04-12 04:04:18,918 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-04-12 04:04:18,918 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-04-12 04:04:18,919 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-04-12 04:04:18,919 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf [2018-04-12 04:04:18,941 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-12 04:04:18,942 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-12 04:04:18,942 INFO L131 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2018-04-12 04:04:18,942 INFO L133 SettingsManager]: * ultimate.logging.details=de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation=DEBUG; [2018-04-12 04:04:18,942 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-04-12 04:04:18,943 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-04-12 04:04:18,943 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-04-12 04:04:18,943 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-04-12 04:04:18,943 INFO L133 SettingsManager]: * Parallel states before merging=1 [2018-04-12 04:04:18,943 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-04-12 04:04:18,943 INFO L131 SettingsManager]: Preferences of LTL2Aut differ from their defaults: [2018-04-12 04:04:18,943 INFO L133 SettingsManager]: * Property to check=[] a a: x > 42 [2018-04-12 04:04:18,944 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-12 04:04:18,944 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-12 04:04:18,944 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-12 04:04:18,944 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-12 04:04:18,944 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-12 04:04:18,945 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-12 04:04:18,945 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-12 04:04:18,945 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-04-12 04:04:18,945 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-12 04:04:18,945 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-12 04:04:18,945 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-12 04:04:18,946 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-04-12 04:04:18,946 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-04-12 04:04:18,946 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-12 04:04:18,946 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 04:04:18,946 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-12 04:04:18,947 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-12 04:04:18,947 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-12 04:04:18,947 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-04-12 04:04:18,947 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-04-12 04:04:18,947 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:18,947 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-04-12 04:04:18,948 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-04-12 04:04:18,948 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-04-12 04:04:18,949 INFO L131 SettingsManager]: Preferences of Boogie Printer differ from their defaults: [2018-04-12 04:04:18,949 INFO L133 SettingsManager]: * Dump path:=C:\Users\alex\AppData\Local\Temp\ [2018-04-12 04:04:18,981 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-12 04:04:18,991 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-12 04:04:18,994 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-12 04:04:18,995 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-12 04:04:18,995 INFO L276 PluginConnector]: CDTParser initialized [2018-04-12 04:04:18,996 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/ArraysOfVariableLength4_true-valid-memsafety_true-termination.c [2018-04-12 04:04:19,326 INFO L225 CDTParser]: Created temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGb5284015e [2018-04-12 04:04:19,447 INFO L287 CDTParser]: IsIndexed: true [2018-04-12 04:04:19,447 INFO L288 CDTParser]: Found 1 translation units. [2018-04-12 04:04:19,448 INFO L168 CDTParser]: Scanning ArraysOfVariableLength4_true-valid-memsafety_true-termination.c [2018-04-12 04:04:19,449 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-12 04:04:19,449 INFO L215 ultiparseSymbolTable]: [2018-04-12 04:04:19,449 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-12 04:04:19,449 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo ('foo') in ArraysOfVariableLength4_true-valid-memsafety_true-termination.c [2018-04-12 04:04:19,449 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in ArraysOfVariableLength4_true-valid-memsafety_true-termination.c [2018-04-12 04:04:19,449 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-12 04:04:19,449 INFO L233 ultiparseSymbolTable]: [2018-04-12 04:04:19,552 INFO L330 CDTParser]: Deleted temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGb5284015e [2018-04-12 04:04:19,556 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-12 04:04:19,559 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-04-12 04:04:19,560 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-12 04:04:19,560 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-12 04:04:19,565 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-12 04:04:19,565 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 04:04:19" (1/1) ... [2018-04-12 04:04:19,567 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@73058777 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:04:19, skipping insertion in model container [2018-04-12 04:04:19,567 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 04:04:19" (1/1) ... [2018-04-12 04:04:19,581 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 04:04:19,593 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 04:04:19,718 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 04:04:19,741 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 04:04:19,746 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 9 non ball SCCs. Number of states in SCCs 9. [2018-04-12 04:04:19,755 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:04:19 WrapperNode [2018-04-12 04:04:19,755 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-12 04:04:19,756 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-12 04:04:19,756 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-12 04:04:19,756 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-12 04:04:19,766 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:04:19" (1/1) ... [2018-04-12 04:04:19,766 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:04:19" (1/1) ... [2018-04-12 04:04:19,774 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:04:19" (1/1) ... [2018-04-12 04:04:19,774 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:04:19" (1/1) ... [2018-04-12 04:04:19,779 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:04:19" (1/1) ... [2018-04-12 04:04:19,784 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:04:19" (1/1) ... [2018-04-12 04:04:19,786 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:04:19" (1/1) ... [2018-04-12 04:04:19,788 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-12 04:04:19,789 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-12 04:04:19,789 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-12 04:04:19,789 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-12 04:04:19,790 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:04:19" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 04:04:19,850 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-12 04:04:19,850 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-12 04:04:19,850 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo [2018-04-12 04:04:19,850 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-12 04:04:19,850 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo [2018-04-12 04:04:19,851 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-12 04:04:19,851 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-12 04:04:19,851 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-12 04:04:19,851 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-12 04:04:19,851 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-12 04:04:19,851 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-12 04:04:19,851 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-12 04:04:19,851 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-12 04:04:20,094 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-12 04:04:20,095 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 04:04:20 BoogieIcfgContainer [2018-04-12 04:04:20,095 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-12 04:04:20,095 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2018-04-12 04:04:20,095 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2018-04-12 04:04:20,096 INFO L276 PluginConnector]: IcfgTransformer initialized [2018-04-12 04:04:20,100 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 04:04:20" (1/1) ... [2018-04-12 04:04:20,110 INFO L139 apSepIcfgTransformer]: HeapSepIcfgTransformer: Starting heap partitioning [2018-04-12 04:04:20,110 INFO L140 apSepIcfgTransformer]: To be partitioned heap arrays found [#memory_int] [2018-04-12 04:04:20,123 INFO L299 apSepIcfgTransformer]: Heap separator: starting memloc-array-style preprocessing [2018-04-12 04:04:20,134 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 9 non ball SCCs. Number of states in SCCs 9. [2018-04-12 04:04:20,136 INFO L332 apSepIcfgTransformer]: finished MemlocArrayUpdater, created 0 location literals (each corresponds to one heap write) [2018-04-12 04:04:20,142 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 9 non ball SCCs. Number of states in SCCs 9. [2018-04-12 04:04:20,146 INFO L412 apSepIcfgTransformer]: finished preprocessing for the equality analysis [2018-04-12 04:04:20,146 DEBUG L416 apSepIcfgTransformer]: storeIndexInfoToLocLiteral: Map: [2018-04-12 04:04:20,148 DEBUG L418 apSepIcfgTransformer]: edgeToIndexToStoreIndexInfo: NestedMap2: [2018-04-12 04:04:20,196 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=1) [2018-04-12 04:04:22,871 INFO L314 AbstractInterpreter]: Visited 69 different actions 192 times. Merged at 46 different actions 84 times. Never widened. Found 11 fixpoints after 6 different actions. Largest state had 21 variables. [2018-04-12 04:04:22,873 INFO L424 apSepIcfgTransformer]: finished equality analysis [2018-04-12 04:04:22,882 INFO L195 HeapSepPreAnalysis]: Number of read from array group [#memory_int] : 1 [2018-04-12 04:04:22,883 INFO L434 apSepIcfgTransformer]: Finished pre analysis before partitioning [2018-04-12 04:04:22,883 INFO L435 apSepIcfgTransformer]: array groups: Set: [#memory_int] [2018-04-12 04:04:22,883 INFO L437 apSepIcfgTransformer]: select infos: Set: ((select (select |v_#memory_int_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2)), at (SUMMARY for call #t~mem1 := read~int(~b.base, ~b.offset + ~i~0 * 1, 1); srcloc: L16')) [2018-04-12 04:04:22,887 DEBUG L373 HeapPartitionManager]: creating LocationBlock locs_30 [2018-04-12 04:04:22,887 DEBUG L374 HeapPartitionManager]: with contents [NoStoreIndexInfo] [2018-04-12 04:04:22,888 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_30 [2018-04-12 04:04:22,888 DEBUG L324 HeapPartitionManager]: at dimension 0 for ((select (select |v_#memory_int_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2)), at (SUMMARY for call #t~mem1 := read~int(~b.base, ~b.offset + ~i~0 * 1, 1); srcloc: L16')) [2018-04-12 04:04:22,888 DEBUG L325 HeapPartitionManager]: write locations: [NoStoreIndexInfo] [2018-04-12 04:04:22,888 DEBUG L373 HeapPartitionManager]: creating LocationBlock locs_30 [2018-04-12 04:04:22,888 DEBUG L374 HeapPartitionManager]: with contents [NoStoreIndexInfo] [2018-04-12 04:04:22,889 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_30 [2018-04-12 04:04:22,889 DEBUG L324 HeapPartitionManager]: at dimension 1 for ((select (select |v_#memory_int_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2)), at (SUMMARY for call #t~mem1 := read~int(~b.base, ~b.offset + ~i~0 * 1, 1); srcloc: L16')) [2018-04-12 04:04:22,889 DEBUG L325 HeapPartitionManager]: write locations: [NoStoreIndexInfo] [2018-04-12 04:04:22,889 INFO L330 HeapPartitionManager]: partitioning result: [2018-04-12 04:04:22,889 INFO L335 HeapPartitionManager]: location blocks for array group [#memory_int] [2018-04-12 04:04:22,890 INFO L344 HeapPartitionManager]: at dimension 0 [2018-04-12 04:04:22,890 INFO L345 HeapPartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 1 [2018-04-12 04:04:22,890 INFO L346 HeapPartitionManager]: # location blocks :1 [2018-04-12 04:04:22,890 DEBUG L353 HeapPartitionManager]: location block contents: [2018-04-12 04:04:22,891 DEBUG L356 HeapPartitionManager]: [NoStoreIndexInfo] [2018-04-12 04:04:22,891 INFO L344 HeapPartitionManager]: at dimension 1 [2018-04-12 04:04:22,891 INFO L345 HeapPartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 1 [2018-04-12 04:04:22,891 INFO L346 HeapPartitionManager]: # location blocks :1 [2018-04-12 04:04:22,891 DEBUG L353 HeapPartitionManager]: location block contents: [2018-04-12 04:04:22,891 DEBUG L356 HeapPartitionManager]: [NoStoreIndexInfo] [2018-04-12 04:04:22,893 INFO L134 ransitionTransformer]: executing heap partitioning transformation [2018-04-12 04:04:22,898 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,898 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,898 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,899 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,899 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,899 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,899 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,900 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,900 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,901 DEBUG L331 ransitionTransformer]: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] [2018-04-12 04:04:22,901 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,901 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,902 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,902 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,902 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,902 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,902 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,903 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,903 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:04:22,903 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:04:22,903 DEBUG L356 ransitionTransformer]: {main_~i~1=v_main_~i~1_8} [2018-04-12 04:04:22,903 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:04:22,903 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:04:22,904 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,904 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,904 DEBUG L331 ransitionTransformer]: Formula: (= |v_#valid_1| (store |v_#valid_2| 0 0)) InVars {#valid=|v_#valid_2|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid] [2018-04-12 04:04:22,904 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,904 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,905 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,905 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,905 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:04:22,905 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:04:22,905 DEBUG L356 ransitionTransformer]: {main_~b~0=v_main_~b~0_3} [2018-04-12 04:04:22,906 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:04:22,906 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:04:22,906 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,906 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,906 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,906 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,907 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,907 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,907 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,907 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:04:22,907 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:04:22,908 DEBUG L356 ransitionTransformer]: {main_~buffer~0=v_main_~buffer~0_1} [2018-04-12 04:04:22,908 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:04:22,908 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:04:22,908 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,909 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,909 DEBUG L331 ransitionTransformer]: Formula: (and (= 0 (select |v_#valid_16| |v_main_~#mask~0.base_5|)) (= |v_#length_5| (store |v_#length_6| |v_main_~#mask~0.base_5| 32)) (= 0 |v_main_~#mask~0.offset_5|) (not (= 0 |v_main_~#mask~0.base_5|)) (= |v_#valid_15| (store |v_#valid_16| |v_main_~#mask~0.base_5| 1))) InVars {#length=|v_#length_6|, #valid=|v_#valid_16|} OutVars{#length=|v_#length_5|, main_~#mask~0.base=|v_main_~#mask~0.base_5|, main_~#mask~0.offset=|v_main_~#mask~0.offset_5|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset, #valid, #length] [2018-04-12 04:04:22,909 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,909 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,909 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,910 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~i~1_9 0) InVars {} OutVars{main_~i~1=v_main_~i~1_9} AuxVars[] AssignedVars[main_~i~1] [2018-04-12 04:04:22,910 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,910 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,910 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,910 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,911 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,911 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,911 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,911 DEBUG L331 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,911 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,911 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,912 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,912 DEBUG L331 ransitionTransformer]: Formula: (not (< v_main_~i~1_10 32)) InVars {main_~i~1=v_main_~i~1_10} OutVars{main_~i~1=v_main_~i~1_10} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,912 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,912 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,913 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,913 DEBUG L331 ransitionTransformer]: Formula: (< v_main_~i~1_11 32) InVars {main_~i~1=v_main_~i~1_11} OutVars{main_~i~1=v_main_~i~1_11} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,913 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,913 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,914 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,914 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~i~1_16 0) InVars {} OutVars{main_~i~1=v_main_~i~1_16} AuxVars[] AssignedVars[main_~i~1] [2018-04-12 04:04:22,914 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,914 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,914 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,915 DEBUG L331 ransitionTransformer]: Formula: (or (not (< v_main_~i~1_12 100)) (not (<= 0 v_main_~i~1_12))) InVars {main_~i~1=v_main_~i~1_12} OutVars{main_~i~1=v_main_~i~1_12} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,915 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,915 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,915 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,915 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,915 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,916 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,916 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,916 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,916 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,916 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,917 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,917 DEBUG L331 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,917 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,917 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,917 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,918 DEBUG L331 ransitionTransformer]: Formula: (and (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1| 32) (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1| |v_main_~#mask~0.base_7|) (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1| |v_main_~#mask~0.offset_7|)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_7|, main_~#mask~0.offset=|v_main_~#mask~0.offset_7|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1|, main_~#mask~0.base=|v_main_~#mask~0.base_7|, main_~#mask~0.offset=|v_main_~#mask~0.offset_7|} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size] [2018-04-12 04:04:22,918 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:04:22,918 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:04:22,918 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1|} [2018-04-12 04:04:22,918 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:04:22,918 DEBUG L358 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1|, main_~#mask~0.base=|v_main_~#mask~0.base_7|, main_~#mask~0.offset=|v_main_~#mask~0.offset_7|} [2018-04-12 04:04:22,919 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,919 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,919 DEBUG L331 ransitionTransformer]: Formula: (not (< v_main_~i~1_1 32)) InVars {main_~i~1=v_main_~i~1_1} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,919 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,919 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,920 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,920 DEBUG L331 ransitionTransformer]: Formula: (< v_main_~i~1_2 32) InVars {main_~i~1=v_main_~i~1_2} OutVars{main_~i~1=v_main_~i~1_2} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,920 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,920 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,921 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,921 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#res_2| 0) InVars {} OutVars{main_#res=|v_main_#res_2|} AuxVars[] AssignedVars[main_#res] [2018-04-12 04:04:22,921 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,921 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,921 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,921 DEBUG L331 ransitionTransformer]: Formula: (and (<= |v_main_#t~ret3_2| 2147483647) (<= 0 (+ |v_main_#t~ret3_2| 2147483648))) InVars {main_#t~ret3=|v_main_#t~ret3_2|} OutVars{main_#t~ret3=|v_main_#t~ret3_2|} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,922 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,922 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,922 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,922 DEBUG L331 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_1 |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size_1|) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size_1|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_1} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size] [2018-04-12 04:04:22,922 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,923 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,923 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,923 DEBUG L331 ransitionTransformer]: Formula: (or (not (<= 0 v_main_~i~1_3)) (not (< v_main_~i~1_3 100))) InVars {main_~i~1=v_main_~i~1_3} OutVars{main_~i~1=v_main_~i~1_3} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,923 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,923 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,923 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,924 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,924 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,924 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,924 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,924 DEBUG L331 ransitionTransformer]: Formula: (= |v_#valid_11| (store |v_#valid_12| |v_main_~#mask~0.base_3| 0)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_12|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid] [2018-04-12 04:04:22,925 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,925 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,925 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,925 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~b~0_4 (store v_main_~b~0_5 v_main_~i~1_13 |v_main_#t~ret3_3|)) InVars {main_~i~1=v_main_~i~1_13, main_~b~0=v_main_~b~0_5, main_#t~ret3=|v_main_#t~ret3_3|} OutVars{main_~i~1=v_main_~i~1_13, main_~b~0=v_main_~b~0_4, main_#t~ret3=|v_main_#t~ret3_3|} AuxVars[] AssignedVars[main_~b~0] [2018-04-12 04:04:22,925 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,926 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,926 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,926 DEBUG L331 ransitionTransformer]: Formula: (and (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_1 |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|) (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_1 |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base_1|)) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_1, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_1} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset] [2018-04-12 04:04:22,926 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,926 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,927 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,927 DEBUG L331 ransitionTransformer]: Formula: (not (= 32 (select v_main_~b~0_1 v_main_~i~1_4))) InVars {main_~b~0=v_main_~b~0_1, main_~i~1=v_main_~i~1_4} OutVars{main_~b~0=v_main_~b~0_1, main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,927 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,927 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,927 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,928 DEBUG L331 ransitionTransformer]: Formula: (= (select v_main_~b~0_2 v_main_~i~1_5) 32) InVars {main_~b~0=v_main_~b~0_2, main_~i~1=v_main_~i~1_5} OutVars{main_~b~0=v_main_~b~0_2, main_~i~1=v_main_~i~1_5} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,928 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,928 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,928 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,928 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,928 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:04:22,929 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:04:22,929 DEBUG L356 ransitionTransformer]: {main_~#mask~0.base=|v_main_~#mask~0.base_4|, main_~#mask~0.offset=|v_main_~#mask~0.offset_4|} [2018-04-12 04:04:22,929 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:04:22,929 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:04:22,929 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,930 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,930 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,930 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:04:22,930 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:04:22,930 DEBUG L356 ransitionTransformer]: {main_#t~ret3=|v_main_#t~ret3_4|} [2018-04-12 04:04:22,930 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:04:22,930 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:04:22,931 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,931 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,931 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,931 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:04:22,931 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:04:22,931 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0_1} [2018-04-12 04:04:22,932 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:04:22,932 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:04:22,932 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,932 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,932 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#res_1| 1) InVars {} OutVars{main_#res=|v_main_#res_1|} AuxVars[] AssignedVars[main_#res] [2018-04-12 04:04:22,932 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,933 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,933 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,933 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#t~post4_1| v_main_~i~1_6) InVars {main_~i~1=v_main_~i~1_6} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_6} AuxVars[] AssignedVars[main_#t~post4] [2018-04-12 04:04:22,933 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,933 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,934 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,934 DEBUG L331 ransitionTransformer]: Formula: (= |v_#valid_13| |old(#valid)|) InVars {#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,934 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,934 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,934 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,935 DEBUG L331 ransitionTransformer]: Formula: (not (= |v_#valid_14| |old(#valid)|)) InVars {#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,935 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,935 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,935 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,935 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#t~post2_1| v_main_~i~1_14) InVars {main_~i~1=v_main_~i~1_14} OutVars{main_~i~1=v_main_~i~1_14, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[main_#t~post2] [2018-04-12 04:04:22,935 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,936 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,936 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,936 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,936 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:04:22,936 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:04:22,936 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_1} [2018-04-12 04:04:22,937 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:04:22,937 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:04:22,937 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,937 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,937 DEBUG L331 ransitionTransformer]: Formula: (= (store |v_#valid_10| |v_main_~#mask~0.base_1| 0) |v_#valid_9|) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_1|, #valid=|v_#valid_10|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_1|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid] [2018-04-12 04:04:22,938 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,938 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,938 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,938 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~i~1_7 (+ |v_main_#t~post4_2| 1)) InVars {main_#t~post4=|v_main_#t~post4_2|} OutVars{main_#t~post4=|v_main_#t~post4_2|, main_~i~1=v_main_~i~1_7} AuxVars[] AssignedVars[main_~i~1] [2018-04-12 04:04:22,938 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,938 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,939 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,939 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~i~1_15 (+ |v_main_#t~post2_2| 1)) InVars {main_#t~post2=|v_main_#t~post2_2|} OutVars{main_~i~1=v_main_~i~1_15, main_#t~post2=|v_main_#t~post2_2|} AuxVars[] AssignedVars[main_~i~1] [2018-04-12 04:04:22,939 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,939 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,940 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,940 DEBUG L331 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_2 0) InVars {} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_2} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0] [2018-04-12 04:04:22,940 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,940 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,940 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,940 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,940 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:04:22,941 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:04:22,941 DEBUG L356 ransitionTransformer]: {main_~#mask~0.base=|v_main_~#mask~0.base_2|, main_~#mask~0.offset=|v_main_~#mask~0.offset_2|} [2018-04-12 04:04:22,941 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:04:22,941 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:04:22,941 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,941 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,942 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,942 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:04:22,942 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:04:22,942 DEBUG L356 ransitionTransformer]: {main_#t~post4=|v_main_#t~post4_3|} [2018-04-12 04:04:22,942 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:04:22,942 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:04:22,942 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,943 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,943 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,943 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:04:22,943 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:04:22,943 DEBUG L356 ransitionTransformer]: {main_#t~post2=|v_main_#t~post2_3|} [2018-04-12 04:04:22,943 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:04:22,944 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:04:22,944 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,944 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,944 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,944 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,944 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,945 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,945 DEBUG L331 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,945 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,945 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,945 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,945 DEBUG L331 ransitionTransformer]: Formula: (not (< v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_3 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_2)) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_3, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_2} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_3, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_2} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,946 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,946 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,946 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,946 DEBUG L331 ransitionTransformer]: Formula: (< v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_4 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_3) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_4, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_3} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_4, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_3} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,946 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,946 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,947 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,947 DEBUG L331 ransitionTransformer]: Formula: (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_11) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_11} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_11} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res] [2018-04-12 04:04:22,947 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,947 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,947 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,948 DEBUG L331 ransitionTransformer]: Formula: (or (not (<= 0 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_5)) (not (< v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_5 32))) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_5} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_5} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,948 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,948 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,948 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,948 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,948 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,949 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,949 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,949 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,949 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,949 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,952 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,952 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse0 (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2))) (and (<= 0 .cse0) (<= (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2 1) (select |v_#length_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)) (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1| (select (select |v_#memory_int_part_locs_30_locs_30_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) .cse0)) (= 1 (select |v_#valid_3| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)))) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1] [2018-04-12 04:04:22,953 DEBUG L338 ransitionTransformer]: formula has changed [2018-04-12 04:04:22,953 DEBUG L339 ransitionTransformer]: old formula: [2018-04-12 04:04:22,953 DEBUG L340 ransitionTransformer]: (let ((.cse0 (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2))) (and (<= 0 .cse0) (<= (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2 1) (select |v_#length_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)) (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1| (select (select |v_#memory_int_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) .cse0)) (= 1 (select |v_#valid_3| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)))) [2018-04-12 04:04:22,953 DEBUG L341 ransitionTransformer]: new formula: [2018-04-12 04:04:22,953 DEBUG L342 ransitionTransformer]: (let ((.cse0 (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2))) (and (<= 0 .cse0) (<= (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2 1) (select |v_#length_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)) (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1| (select (select |v_#memory_int_part_locs_30_locs_30_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) .cse0)) (= 1 (select |v_#valid_3| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)))) [2018-04-12 04:04:22,954 DEBUG L346 ransitionTransformer]: invars have changed [2018-04-12 04:04:22,954 DEBUG L347 ransitionTransformer]: old invars: [2018-04-12 04:04:22,954 DEBUG L348 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6} [2018-04-12 04:04:22,954 DEBUG L349 ransitionTransformer]: new invars: [2018-04-12 04:04:22,954 DEBUG L350 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|} [2018-04-12 04:04:22,954 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:04:22,955 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:04:22,955 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1|} [2018-04-12 04:04:22,955 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:04:22,955 DEBUG L358 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1|} [2018-04-12 04:04:22,955 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,956 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,956 DEBUG L331 ransitionTransformer]: Formula: (not (= 1 (select |v_#valid_4| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_3))) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_3, #valid=|v_#valid_4|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_3, #valid=|v_#valid_4|} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,956 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,956 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,956 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,957 DEBUG L331 ransitionTransformer]: Formula: (or (not (<= (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_7 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_3 1) (select |v_#length_2| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_4))) (not (<= 0 (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_7 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_3)))) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_2|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_7, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_3} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_2|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_7, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_3} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,957 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,957 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,957 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,958 DEBUG L331 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0_2 (store v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0_3 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_8 |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_2|)) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_8, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0_3, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_2|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_8, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_2|} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0] [2018-04-12 04:04:22,958 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,958 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,958 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,958 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,958 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:04:22,959 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:04:22,959 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_3|} [2018-04-12 04:04:22,959 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:04:22,959 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:04:22,959 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,959 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,960 DEBUG L331 ransitionTransformer]: Formula: (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_9) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_9} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_9, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0] [2018-04-12 04:04:22,960 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,960 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,960 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,960 DEBUG L331 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_10 (+ |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_2| 1)) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_2|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_10, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_2|} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0] [2018-04-12 04:04:22,960 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,961 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,961 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,961 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,961 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:04:22,961 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:04:22,961 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_3|} [2018-04-12 04:04:22,962 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:04:22,962 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:04:22,962 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,962 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,962 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:04:22,962 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:04:22,962 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,963 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,963 DEBUG L331 ransitionTransformer]: Formula: (= |v_ULTIMATE.start_#t~ret5_2| |v_main_#resOutParam_1|) InVars {main_#res=|v_main_#resOutParam_1|} OutVars{ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_2|, main_#res=|v_main_#resOutParam_1|} AuxVars[] AssignedVars[ULTIMATE.start_#t~ret5] [2018-04-12 04:04:22,963 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:04:22,963 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:04:22,963 DEBUG L356 ransitionTransformer]: {ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_2|} [2018-04-12 04:04:22,964 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:04:22,964 DEBUG L358 ransitionTransformer]: {ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_2|, main_#res=|v_main_#resOutParam_1|} [2018-04-12 04:04:22,964 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,964 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:04:22,964 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#t~ret3_5| |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#resOutParam_1|) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#resOutParam_1|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#resOutParam_1|, main_#t~ret3=|v_main_#t~ret3_5|} AuxVars[] AssignedVars[main_#t~ret3] [2018-04-12 04:04:22,964 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:04:22,965 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:04:22,965 DEBUG L356 ransitionTransformer]: {main_#t~ret3=|v_main_#t~ret3_5|} [2018-04-12 04:04:22,965 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:04:22,965 DEBUG L358 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#resOutParam_1|, main_#t~ret3=|v_main_#t~ret3_5|} [2018-04-12 04:04:22,965 DEBUG L360 ransitionTransformer]: [2018-04-12 04:04:22,965 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 9 non ball SCCs. Number of states in SCCs 9. [2018-04-12 04:04:22,967 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 12.04 04:04:22 BasicIcfg [2018-04-12 04:04:22,967 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2018-04-12 04:04:22,968 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-12 04:04:22,968 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-12 04:04:22,971 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-12 04:04:22,971 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.04 04:04:19" (1/4) ... [2018-04-12 04:04:22,972 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@fea49cb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 04:04:22, skipping insertion in model container [2018-04-12 04:04:22,972 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:04:19" (2/4) ... [2018-04-12 04:04:22,973 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@fea49cb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 04:04:22, skipping insertion in model container [2018-04-12 04:04:22,973 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 04:04:20" (3/4) ... [2018-04-12 04:04:22,973 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@fea49cb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 12.04 04:04:22, skipping insertion in model container [2018-04-12 04:04:22,973 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 12.04 04:04:22" (4/4) ... [2018-04-12 04:04:22,975 INFO L107 eAbstractionObserver]: Analyzing ICFG memPartitionedIcfg [2018-04-12 04:04:22,984 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-12 04:04:22,992 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 6 error locations. [2018-04-12 04:04:23,035 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-12 04:04:23,036 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-12 04:04:23,036 INFO L370 AbstractCegarLoop]: Hoare is true [2018-04-12 04:04:23,037 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-12 04:04:23,037 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-12 04:04:23,037 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-12 04:04:23,037 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-12 04:04:23,037 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-12 04:04:23,037 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-12 04:04:23,038 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-12 04:04:23,053 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states. [2018-04-12 04:04:23,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-04-12 04:04:23,059 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:23,060 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:23,060 INFO L408 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:23,065 INFO L82 PathProgramCache]: Analyzing trace with hash 840184683, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:23,082 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:23,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:23,124 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:23,182 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:23,182 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:23,217 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:23,254 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 04:04:23,255 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [] total 4 [2018-04-12 04:04:23,257 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 04:04:23,267 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 04:04:23,269 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-04-12 04:04:23,271 INFO L87 Difference]: Start difference. First operand 62 states. Second operand 5 states. [2018-04-12 04:04:23,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:04:23,364 INFO L93 Difference]: Finished difference Result 137 states and 159 transitions. [2018-04-12 04:04:23,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 04:04:23,366 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2018-04-12 04:04:23,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:04:23,378 INFO L225 Difference]: With dead ends: 137 [2018-04-12 04:04:23,378 INFO L226 Difference]: Without dead ends: 81 [2018-04-12 04:04:23,382 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 23 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-04-12 04:04:23,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2018-04-12 04:04:23,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 65. [2018-04-12 04:04:23,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2018-04-12 04:04:23,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 68 transitions. [2018-04-12 04:04:23,428 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 68 transitions. Word has length 14 [2018-04-12 04:04:23,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:04:23,429 INFO L459 AbstractCegarLoop]: Abstraction has 65 states and 68 transitions. [2018-04-12 04:04:23,429 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 04:04:23,429 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 68 transitions. [2018-04-12 04:04:23,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-04-12 04:04:23,430 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:23,430 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:23,430 INFO L408 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:23,430 INFO L82 PathProgramCache]: Analyzing trace with hash -247761374, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:23,440 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:23,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:23,460 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:23,482 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:23,483 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:23,519 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:23,552 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 04:04:23,552 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2, 2] imperfect sequences [] total 3 [2018-04-12 04:04:23,554 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 04:04:23,554 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 04:04:23,554 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-04-12 04:04:23,555 INFO L87 Difference]: Start difference. First operand 65 states and 68 transitions. Second operand 4 states. [2018-04-12 04:04:23,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:04:23,604 INFO L93 Difference]: Finished difference Result 79 states and 83 transitions. [2018-04-12 04:04:23,604 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-12 04:04:23,604 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-04-12 04:04:23,605 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:04:23,607 INFO L225 Difference]: With dead ends: 79 [2018-04-12 04:04:23,607 INFO L226 Difference]: Without dead ends: 78 [2018-04-12 04:04:23,608 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-04-12 04:04:23,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-04-12 04:04:23,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 68. [2018-04-12 04:04:23,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-04-12 04:04:23,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 72 transitions. [2018-04-12 04:04:23,616 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 72 transitions. Word has length 23 [2018-04-12 04:04:23,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:04:23,616 INFO L459 AbstractCegarLoop]: Abstraction has 68 states and 72 transitions. [2018-04-12 04:04:23,616 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 04:04:23,616 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 72 transitions. [2018-04-12 04:04:23,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-12 04:04:23,617 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:23,617 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:23,617 INFO L408 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:23,617 INFO L82 PathProgramCache]: Analyzing trace with hash 909332224, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:23,626 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:23,641 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:23,643 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:23,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 04:04:23,673 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:04:23,700 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:04:23,700 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-12 04:04:23,777 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:23,777 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:23,788 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:23,808 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 04:04:23,808 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [] total 4 [2018-04-12 04:04:23,808 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 04:04:23,809 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 04:04:23,809 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 04:04:23,809 INFO L87 Difference]: Start difference. First operand 68 states and 72 transitions. Second operand 5 states. [2018-04-12 04:04:23,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:04:23,915 INFO L93 Difference]: Finished difference Result 68 states and 72 transitions. [2018-04-12 04:04:23,915 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 04:04:23,916 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2018-04-12 04:04:23,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:04:23,917 INFO L225 Difference]: With dead ends: 68 [2018-04-12 04:04:23,917 INFO L226 Difference]: Without dead ends: 67 [2018-04-12 04:04:23,917 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 04:04:23,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-04-12 04:04:23,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 67. [2018-04-12 04:04:23,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-04-12 04:04:23,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 71 transitions. [2018-04-12 04:04:23,924 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 71 transitions. Word has length 24 [2018-04-12 04:04:23,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:04:23,924 INFO L459 AbstractCegarLoop]: Abstraction has 67 states and 71 transitions. [2018-04-12 04:04:23,925 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 04:04:23,925 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 71 transitions. [2018-04-12 04:04:23,925 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-12 04:04:23,925 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:23,926 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:23,926 INFO L408 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:23,926 INFO L82 PathProgramCache]: Analyzing trace with hash 909332225, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:23,939 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:23,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:23,960 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:23,967 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 04:04:23,968 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:04:23,972 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:04:23,972 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 04:04:24,094 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:24,094 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:24,207 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:24,239 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 04:04:24,239 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [] total 9 [2018-04-12 04:04:24,239 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-12 04:04:24,239 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-12 04:04:24,240 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-04-12 04:04:24,240 INFO L87 Difference]: Start difference. First operand 67 states and 71 transitions. Second operand 10 states. [2018-04-12 04:04:24,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:04:24,579 INFO L93 Difference]: Finished difference Result 76 states and 80 transitions. [2018-04-12 04:04:24,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 04:04:24,579 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 24 [2018-04-12 04:04:24,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:04:24,580 INFO L225 Difference]: With dead ends: 76 [2018-04-12 04:04:24,580 INFO L226 Difference]: Without dead ends: 75 [2018-04-12 04:04:24,580 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2018-04-12 04:04:24,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2018-04-12 04:04:24,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 68. [2018-04-12 04:04:24,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-04-12 04:04:24,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 72 transitions. [2018-04-12 04:04:24,586 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 72 transitions. Word has length 24 [2018-04-12 04:04:24,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:04:24,587 INFO L459 AbstractCegarLoop]: Abstraction has 68 states and 72 transitions. [2018-04-12 04:04:24,587 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-12 04:04:24,587 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 72 transitions. [2018-04-12 04:04:24,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-04-12 04:04:24,588 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:24,588 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:24,588 INFO L408 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:24,588 INFO L82 PathProgramCache]: Analyzing trace with hash 377367732, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:24,597 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:24,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:24,615 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:24,700 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:24,700 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:24,743 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:24,763 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:04:24,763 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 7 [2018-04-12 04:04:24,763 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 04:04:24,764 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 04:04:24,764 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-04-12 04:04:24,764 INFO L87 Difference]: Start difference. First operand 68 states and 72 transitions. Second operand 8 states. [2018-04-12 04:04:24,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:04:24,918 INFO L93 Difference]: Finished difference Result 102 states and 109 transitions. [2018-04-12 04:04:24,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 04:04:24,918 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 32 [2018-04-12 04:04:24,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:04:24,919 INFO L225 Difference]: With dead ends: 102 [2018-04-12 04:04:24,920 INFO L226 Difference]: Without dead ends: 101 [2018-04-12 04:04:24,920 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 57 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-04-12 04:04:24,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-04-12 04:04:24,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 85. [2018-04-12 04:04:24,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-04-12 04:04:24,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 92 transitions. [2018-04-12 04:04:24,929 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 92 transitions. Word has length 32 [2018-04-12 04:04:24,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:04:24,930 INFO L459 AbstractCegarLoop]: Abstraction has 85 states and 92 transitions. [2018-04-12 04:04:24,930 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 04:04:24,930 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 92 transitions. [2018-04-12 04:04:24,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-04-12 04:04:24,931 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:24,931 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:24,931 INFO L408 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:24,931 INFO L82 PathProgramCache]: Analyzing trace with hash -1186501969, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:24,948 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:24,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:24,964 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:24,972 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 04:04:24,972 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:04:24,976 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:04:24,976 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 04:04:25,079 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:25,079 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:25,183 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:25,204 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:04:25,204 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2018-04-12 04:04:25,204 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-04-12 04:04:25,204 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-04-12 04:04:25,205 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=143, Unknown=0, NotChecked=0, Total=182 [2018-04-12 04:04:25,205 INFO L87 Difference]: Start difference. First operand 85 states and 92 transitions. Second operand 14 states. [2018-04-12 04:04:25,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:04:25,455 INFO L93 Difference]: Finished difference Result 99 states and 106 transitions. [2018-04-12 04:04:25,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-12 04:04:25,456 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 33 [2018-04-12 04:04:25,456 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:04:25,457 INFO L225 Difference]: With dead ends: 99 [2018-04-12 04:04:25,457 INFO L226 Difference]: Without dead ends: 98 [2018-04-12 04:04:25,458 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 53 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=117, Invalid=303, Unknown=0, NotChecked=0, Total=420 [2018-04-12 04:04:25,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-04-12 04:04:25,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 86. [2018-04-12 04:04:25,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-04-12 04:04:25,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 92 transitions. [2018-04-12 04:04:25,466 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 92 transitions. Word has length 33 [2018-04-12 04:04:25,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:04:25,466 INFO L459 AbstractCegarLoop]: Abstraction has 86 states and 92 transitions. [2018-04-12 04:04:25,466 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-04-12 04:04:25,466 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 92 transitions. [2018-04-12 04:04:25,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-04-12 04:04:25,467 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:25,468 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:25,468 INFO L408 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:25,468 INFO L82 PathProgramCache]: Analyzing trace with hash -1851771686, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:25,479 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:25,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:25,490 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:25,513 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:25,514 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:25,571 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:25,597 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 04:04:25,597 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [] total 8 [2018-04-12 04:04:25,597 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 04:04:25,597 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 04:04:25,598 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-04-12 04:04:25,598 INFO L87 Difference]: Start difference. First operand 86 states and 92 transitions. Second operand 8 states. [2018-04-12 04:04:25,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:04:25,653 INFO L93 Difference]: Finished difference Result 161 states and 173 transitions. [2018-04-12 04:04:25,653 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 04:04:25,653 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2018-04-12 04:04:25,654 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:04:25,654 INFO L225 Difference]: With dead ends: 161 [2018-04-12 04:04:25,655 INFO L226 Difference]: Without dead ends: 86 [2018-04-12 04:04:25,655 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 60 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-04-12 04:04:25,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-04-12 04:04:25,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 86. [2018-04-12 04:04:25,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-04-12 04:04:25,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 91 transitions. [2018-04-12 04:04:25,663 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 91 transitions. Word has length 34 [2018-04-12 04:04:25,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:04:25,664 INFO L459 AbstractCegarLoop]: Abstraction has 86 states and 91 transitions. [2018-04-12 04:04:25,664 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 04:04:25,664 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 91 transitions. [2018-04-12 04:04:25,665 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-04-12 04:04:25,665 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:25,666 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:25,666 INFO L408 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:25,666 INFO L82 PathProgramCache]: Analyzing trace with hash -1644163320, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:25,678 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:25,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:25,696 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:25,744 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:25,745 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:25,810 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:25,830 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:04:25,830 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-04-12 04:04:25,830 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-12 04:04:25,830 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-12 04:04:25,831 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=88, Unknown=0, NotChecked=0, Total=132 [2018-04-12 04:04:25,831 INFO L87 Difference]: Start difference. First operand 86 states and 91 transitions. Second operand 12 states. [2018-04-12 04:04:25,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:04:25,948 INFO L93 Difference]: Finished difference Result 167 states and 177 transitions. [2018-04-12 04:04:25,948 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-12 04:04:25,948 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 43 [2018-04-12 04:04:25,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:04:25,949 INFO L225 Difference]: With dead ends: 167 [2018-04-12 04:04:25,949 INFO L226 Difference]: Without dead ends: 89 [2018-04-12 04:04:25,949 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 92 GetRequests, 74 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=120, Invalid=222, Unknown=0, NotChecked=0, Total=342 [2018-04-12 04:04:25,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-04-12 04:04:25,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 86. [2018-04-12 04:04:25,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-04-12 04:04:25,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 89 transitions. [2018-04-12 04:04:25,955 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 89 transitions. Word has length 43 [2018-04-12 04:04:25,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:04:25,955 INFO L459 AbstractCegarLoop]: Abstraction has 86 states and 89 transitions. [2018-04-12 04:04:25,955 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-12 04:04:25,955 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 89 transitions. [2018-04-12 04:04:25,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-04-12 04:04:25,956 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:25,956 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:25,956 INFO L408 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:25,957 INFO L82 PathProgramCache]: Analyzing trace with hash -919097228, now seen corresponding path program 2 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:25,963 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:25,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:25,977 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:26,007 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:26,007 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:26,080 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:26,099 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:04:26,099 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 15 [2018-04-12 04:04:26,100 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-12 04:04:26,100 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-12 04:04:26,100 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-04-12 04:04:26,100 INFO L87 Difference]: Start difference. First operand 86 states and 89 transitions. Second operand 16 states. [2018-04-12 04:04:26,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:04:26,374 INFO L93 Difference]: Finished difference Result 143 states and 153 transitions. [2018-04-12 04:04:26,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-12 04:04:26,374 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 50 [2018-04-12 04:04:26,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:04:26,376 INFO L225 Difference]: With dead ends: 143 [2018-04-12 04:04:26,376 INFO L226 Difference]: Without dead ends: 142 [2018-04-12 04:04:26,377 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 85 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=206, Invalid=550, Unknown=0, NotChecked=0, Total=756 [2018-04-12 04:04:26,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-04-12 04:04:26,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 121. [2018-04-12 04:04:26,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-04-12 04:04:26,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 131 transitions. [2018-04-12 04:04:26,386 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 131 transitions. Word has length 50 [2018-04-12 04:04:26,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:04:26,386 INFO L459 AbstractCegarLoop]: Abstraction has 121 states and 131 transitions. [2018-04-12 04:04:26,386 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-12 04:04:26,386 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 131 transitions. [2018-04-12 04:04:26,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-04-12 04:04:26,387 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:26,387 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:26,387 INFO L408 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:26,388 INFO L82 PathProgramCache]: Analyzing trace with hash 1572757231, now seen corresponding path program 2 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:26,395 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:26,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:26,410 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:26,414 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 04:04:26,414 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:04:26,418 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:04:26,418 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 04:04:26,540 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:26,540 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:26,694 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:26,714 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:04:26,714 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 21 [2018-04-12 04:04:26,715 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-04-12 04:04:26,715 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-04-12 04:04:26,715 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=379, Unknown=0, NotChecked=0, Total=462 [2018-04-12 04:04:26,715 INFO L87 Difference]: Start difference. First operand 121 states and 131 transitions. Second operand 22 states. [2018-04-12 04:04:27,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:04:27,295 INFO L93 Difference]: Finished difference Result 138 states and 148 transitions. [2018-04-12 04:04:27,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-04-12 04:04:27,295 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 51 [2018-04-12 04:04:27,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:04:27,296 INFO L225 Difference]: With dead ends: 138 [2018-04-12 04:04:27,296 INFO L226 Difference]: Without dead ends: 137 [2018-04-12 04:04:27,297 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 81 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 197 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=335, Invalid=997, Unknown=0, NotChecked=0, Total=1332 [2018-04-12 04:04:27,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-04-12 04:04:27,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 122. [2018-04-12 04:04:27,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-04-12 04:04:27,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 129 transitions. [2018-04-12 04:04:27,303 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 129 transitions. Word has length 51 [2018-04-12 04:04:27,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:04:27,303 INFO L459 AbstractCegarLoop]: Abstraction has 122 states and 129 transitions. [2018-04-12 04:04:27,303 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-04-12 04:04:27,303 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 129 transitions. [2018-04-12 04:04:27,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-04-12 04:04:27,304 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:27,305 INFO L355 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:27,305 INFO L408 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:27,305 INFO L82 PathProgramCache]: Analyzing trace with hash -628968632, now seen corresponding path program 2 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:27,311 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:27,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:27,325 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:27,382 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 3 proven. 33 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:27,382 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:27,499 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 3 proven. 33 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:27,519 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:04:27,519 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-04-12 04:04:27,519 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-12 04:04:27,519 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-12 04:04:27,519 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=268, Unknown=0, NotChecked=0, Total=380 [2018-04-12 04:04:27,519 INFO L87 Difference]: Start difference. First operand 122 states and 129 transitions. Second operand 20 states. [2018-04-12 04:04:27,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:04:27,839 INFO L93 Difference]: Finished difference Result 239 states and 253 transitions. [2018-04-12 04:04:27,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-04-12 04:04:27,894 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 61 [2018-04-12 04:04:27,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:04:27,895 INFO L225 Difference]: With dead ends: 239 [2018-04-12 04:04:27,895 INFO L226 Difference]: Without dead ends: 125 [2018-04-12 04:04:27,896 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 102 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=386, Invalid=804, Unknown=0, NotChecked=0, Total=1190 [2018-04-12 04:04:27,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-04-12 04:04:27,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 122. [2018-04-12 04:04:27,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-04-12 04:04:27,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 125 transitions. [2018-04-12 04:04:27,901 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 125 transitions. Word has length 61 [2018-04-12 04:04:27,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:04:27,901 INFO L459 AbstractCegarLoop]: Abstraction has 122 states and 125 transitions. [2018-04-12 04:04:27,901 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-12 04:04:27,901 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 125 transitions. [2018-04-12 04:04:27,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-04-12 04:04:27,902 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:27,902 INFO L355 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:27,902 INFO L408 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:27,902 INFO L82 PathProgramCache]: Analyzing trace with hash 953313268, now seen corresponding path program 3 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:27,908 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:27,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:27,927 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:28,019 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:28,019 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:28,275 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:28,294 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:04:28,294 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 31 [2018-04-12 04:04:28,295 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-04-12 04:04:28,295 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-04-12 04:04:28,295 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=174, Invalid=818, Unknown=0, NotChecked=0, Total=992 [2018-04-12 04:04:28,295 INFO L87 Difference]: Start difference. First operand 122 states and 125 transitions. Second operand 32 states. [2018-04-12 04:04:29,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:04:29,241 INFO L93 Difference]: Finished difference Result 231 states and 249 transitions. [2018-04-12 04:04:29,241 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-04-12 04:04:29,241 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 86 [2018-04-12 04:04:29,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:04:29,242 INFO L225 Difference]: With dead ends: 231 [2018-04-12 04:04:29,242 INFO L226 Difference]: Without dead ends: 230 [2018-04-12 04:04:29,243 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 141 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 434 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=862, Invalid=2678, Unknown=0, NotChecked=0, Total=3540 [2018-04-12 04:04:29,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-04-12 04:04:29,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 193. [2018-04-12 04:04:29,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2018-04-12 04:04:29,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 211 transitions. [2018-04-12 04:04:29,251 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 211 transitions. Word has length 86 [2018-04-12 04:04:29,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:04:29,251 INFO L459 AbstractCegarLoop]: Abstraction has 193 states and 211 transitions. [2018-04-12 04:04:29,251 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-04-12 04:04:29,251 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 211 transitions. [2018-04-12 04:04:29,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-04-12 04:04:29,252 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:29,252 INFO L355 BasicCegarLoop]: trace histogram [8, 8, 8, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:29,253 INFO L408 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:29,253 INFO L82 PathProgramCache]: Analyzing trace with hash -512059537, now seen corresponding path program 3 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:29,259 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:29,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:29,278 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:29,281 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 04:04:29,281 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:04:29,283 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:04:29,283 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 04:04:29,485 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 217 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:29,485 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:29,843 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 217 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:29,862 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:04:29,862 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 37 [2018-04-12 04:04:29,863 INFO L442 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-04-12 04:04:29,863 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-04-12 04:04:29,864 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=219, Invalid=1187, Unknown=0, NotChecked=0, Total=1406 [2018-04-12 04:04:29,864 INFO L87 Difference]: Start difference. First operand 193 states and 211 transitions. Second operand 38 states. [2018-04-12 04:04:31,608 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:04:31,608 INFO L93 Difference]: Finished difference Result 222 states and 240 transitions. [2018-04-12 04:04:31,608 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-12 04:04:31,608 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 87 [2018-04-12 04:04:31,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:04:31,609 INFO L225 Difference]: With dead ends: 222 [2018-04-12 04:04:31,610 INFO L226 Difference]: Without dead ends: 221 [2018-04-12 04:04:31,611 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 204 GetRequests, 137 SyntacticMatches, 0 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 809 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=1107, Invalid=3585, Unknown=0, NotChecked=0, Total=4692 [2018-04-12 04:04:31,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-04-12 04:04:31,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 194. [2018-04-12 04:04:31,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-04-12 04:04:31,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 205 transitions. [2018-04-12 04:04:31,619 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 205 transitions. Word has length 87 [2018-04-12 04:04:31,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:04:31,620 INFO L459 AbstractCegarLoop]: Abstraction has 194 states and 205 transitions. [2018-04-12 04:04:31,620 INFO L460 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-04-12 04:04:31,620 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 205 transitions. [2018-04-12 04:04:31,620 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-04-12 04:04:31,620 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:31,621 INFO L355 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:31,621 INFO L408 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:31,621 INFO L82 PathProgramCache]: Analyzing trace with hash 1555188680, now seen corresponding path program 3 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:31,631 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:31,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:31,653 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:31,792 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 3 proven. 203 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:31,792 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:32,047 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 3 proven. 203 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:32,066 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:04:32,066 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 36 [2018-04-12 04:04:32,067 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-12 04:04:32,067 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-12 04:04:32,067 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=344, Invalid=916, Unknown=0, NotChecked=0, Total=1260 [2018-04-12 04:04:32,067 INFO L87 Difference]: Start difference. First operand 194 states and 205 transitions. Second operand 36 states. [2018-04-12 04:04:32,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:04:32,853 INFO L93 Difference]: Finished difference Result 383 states and 405 transitions. [2018-04-12 04:04:32,893 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-12 04:04:32,893 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 97 [2018-04-12 04:04:32,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:04:32,894 INFO L225 Difference]: With dead ends: 383 [2018-04-12 04:04:32,894 INFO L226 Difference]: Without dead ends: 197 [2018-04-12 04:04:32,896 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 224 GetRequests, 158 SyntacticMatches, 1 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1145 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1398, Invalid=3024, Unknown=0, NotChecked=0, Total=4422 [2018-04-12 04:04:32,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-04-12 04:04:32,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 194. [2018-04-12 04:04:32,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-04-12 04:04:32,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 197 transitions. [2018-04-12 04:04:32,903 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 197 transitions. Word has length 97 [2018-04-12 04:04:32,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:04:32,903 INFO L459 AbstractCegarLoop]: Abstraction has 194 states and 197 transitions. [2018-04-12 04:04:32,903 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-12 04:04:32,903 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 197 transitions. [2018-04-12 04:04:32,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2018-04-12 04:04:32,904 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:32,904 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 15, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:32,904 INFO L408 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:32,904 INFO L82 PathProgramCache]: Analyzing trace with hash -1657366796, now seen corresponding path program 4 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:32,910 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:32,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:32,947 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:33,318 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:33,319 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:34,310 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:34,329 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:04:34,329 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 63 [2018-04-12 04:04:34,330 INFO L442 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-04-12 04:04:34,330 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-04-12 04:04:34,331 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=606, Invalid=3426, Unknown=0, NotChecked=0, Total=4032 [2018-04-12 04:04:34,331 INFO L87 Difference]: Start difference. First operand 194 states and 197 transitions. Second operand 64 states. [2018-04-12 04:04:38,875 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:04:38,875 INFO L93 Difference]: Finished difference Result 407 states and 441 transitions. [2018-04-12 04:04:38,876 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-04-12 04:04:38,876 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 158 [2018-04-12 04:04:38,876 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:04:38,878 INFO L225 Difference]: With dead ends: 407 [2018-04-12 04:04:38,878 INFO L226 Difference]: Without dead ends: 406 [2018-04-12 04:04:38,882 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 375 GetRequests, 253 SyntacticMatches, 0 SemanticMatches, 122 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2010 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=3518, Invalid=11734, Unknown=0, NotChecked=0, Total=15252 [2018-04-12 04:04:38,882 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 406 states. [2018-04-12 04:04:38,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 406 to 337. [2018-04-12 04:04:38,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 337 states. [2018-04-12 04:04:38,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 337 states to 337 states and 371 transitions. [2018-04-12 04:04:38,894 INFO L78 Accepts]: Start accepts. Automaton has 337 states and 371 transitions. Word has length 158 [2018-04-12 04:04:38,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:04:38,894 INFO L459 AbstractCegarLoop]: Abstraction has 337 states and 371 transitions. [2018-04-12 04:04:38,894 INFO L460 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-04-12 04:04:38,894 INFO L276 IsEmpty]: Start isEmpty. Operand 337 states and 371 transitions. [2018-04-12 04:04:38,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2018-04-12 04:04:38,895 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:38,895 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 16, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:38,895 INFO L408 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:38,896 INFO L82 PathProgramCache]: Analyzing trace with hash 161237103, now seen corresponding path program 4 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:38,903 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:38,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:38,939 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:38,948 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 04:04:38,948 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:04:38,957 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:04:38,957 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 04:04:39,572 INFO L134 CoverageAnalysis]: Checked inductivity of 1005 backedges. 0 proven. 1005 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:39,572 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:40,588 INFO L134 CoverageAnalysis]: Checked inductivity of 1005 backedges. 0 proven. 1005 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:40,607 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:04:40,608 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35] total 69 [2018-04-12 04:04:40,608 INFO L442 AbstractCegarLoop]: Interpolant automaton has 70 states [2018-04-12 04:04:40,608 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2018-04-12 04:04:40,609 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=683, Invalid=4147, Unknown=0, NotChecked=0, Total=4830 [2018-04-12 04:04:40,609 INFO L87 Difference]: Start difference. First operand 337 states and 371 transitions. Second operand 70 states. [2018-04-12 04:04:47,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:04:47,145 INFO L93 Difference]: Finished difference Result 390 states and 424 transitions. [2018-04-12 04:04:47,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2018-04-12 04:04:47,146 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 159 [2018-04-12 04:04:47,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:04:47,148 INFO L225 Difference]: With dead ends: 390 [2018-04-12 04:04:47,148 INFO L226 Difference]: Without dead ends: 389 [2018-04-12 04:04:47,153 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 380 GetRequests, 249 SyntacticMatches, 0 SemanticMatches, 131 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3281 ImplicationChecksByTransitivity, 6.7s TimeCoverageRelationStatistics Valid=3995, Invalid=13561, Unknown=0, NotChecked=0, Total=17556 [2018-04-12 04:04:47,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 389 states. [2018-04-12 04:04:47,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 389 to 338. [2018-04-12 04:04:47,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 338 states. [2018-04-12 04:04:47,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 338 states to 338 states and 357 transitions. [2018-04-12 04:04:47,169 INFO L78 Accepts]: Start accepts. Automaton has 338 states and 357 transitions. Word has length 159 [2018-04-12 04:04:47,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:04:47,169 INFO L459 AbstractCegarLoop]: Abstraction has 338 states and 357 transitions. [2018-04-12 04:04:47,169 INFO L460 AbstractCegarLoop]: Interpolant automaton has 70 states. [2018-04-12 04:04:47,169 INFO L276 IsEmpty]: Start isEmpty. Operand 338 states and 357 transitions. [2018-04-12 04:04:47,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2018-04-12 04:04:47,170 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:47,170 INFO L355 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 15, 15, 15, 15, 15, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:47,170 INFO L408 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:47,170 INFO L82 PathProgramCache]: Analyzing trace with hash -1356153656, now seen corresponding path program 4 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:47,176 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:47,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:47,208 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:47,590 INFO L134 CoverageAnalysis]: Checked inductivity of 978 backedges. 3 proven. 975 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:47,590 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:48,276 INFO L134 CoverageAnalysis]: Checked inductivity of 978 backedges. 3 proven. 975 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:48,295 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:04:48,295 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35] total 68 [2018-04-12 04:04:48,296 INFO L442 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-04-12 04:04:48,296 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-04-12 04:04:48,297 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1192, Invalid=3364, Unknown=0, NotChecked=0, Total=4556 [2018-04-12 04:04:48,297 INFO L87 Difference]: Start difference. First operand 338 states and 357 transitions. Second operand 68 states. [2018-04-12 04:04:50,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:04:50,737 INFO L93 Difference]: Finished difference Result 671 states and 709 transitions. [2018-04-12 04:04:50,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2018-04-12 04:04:50,737 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 169 [2018-04-12 04:04:50,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:04:50,739 INFO L225 Difference]: With dead ends: 671 [2018-04-12 04:04:50,739 INFO L226 Difference]: Without dead ends: 341 [2018-04-12 04:04:50,741 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 400 GetRequests, 270 SyntacticMatches, 1 SemanticMatches, 129 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4729 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=5342, Invalid=11688, Unknown=0, NotChecked=0, Total=17030 [2018-04-12 04:04:50,741 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 341 states. [2018-04-12 04:04:50,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 341 to 338. [2018-04-12 04:04:50,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 338 states. [2018-04-12 04:04:50,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 338 states to 338 states and 341 transitions. [2018-04-12 04:04:50,751 INFO L78 Accepts]: Start accepts. Automaton has 338 states and 341 transitions. Word has length 169 [2018-04-12 04:04:50,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:04:50,751 INFO L459 AbstractCegarLoop]: Abstraction has 338 states and 341 transitions. [2018-04-12 04:04:50,751 INFO L460 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-04-12 04:04:50,751 INFO L276 IsEmpty]: Start isEmpty. Operand 338 states and 341 transitions. [2018-04-12 04:04:50,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 303 [2018-04-12 04:04:50,752 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:04:50,752 INFO L355 BasicCegarLoop]: trace histogram [32, 32, 31, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:04:50,752 INFO L408 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:04:50,752 INFO L82 PathProgramCache]: Analyzing trace with hash 1731851508, now seen corresponding path program 5 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:04:50,759 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:04:50,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:04:50,822 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:04:52,102 INFO L134 CoverageAnalysis]: Checked inductivity of 4278 backedges. 0 proven. 4278 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:52,102 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:04:55,452 INFO L134 CoverageAnalysis]: Checked inductivity of 4278 backedges. 0 proven. 4278 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:04:55,472 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:04:55,472 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [64, 64] total 127 [2018-04-12 04:04:55,473 INFO L442 AbstractCegarLoop]: Interpolant automaton has 128 states [2018-04-12 04:04:55,473 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 128 interpolants. [2018-04-12 04:04:55,475 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1277, Invalid=14979, Unknown=0, NotChecked=0, Total=16256 [2018-04-12 04:04:55,475 INFO L87 Difference]: Start difference. First operand 338 states and 341 transitions. Second operand 128 states. [2018-04-12 04:05:00,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:05:00,473 INFO L93 Difference]: Finished difference Result 356 states and 360 transitions. [2018-04-12 04:05:00,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-04-12 04:05:00,473 INFO L78 Accepts]: Start accepts. Automaton has 128 states. Word has length 302 [2018-04-12 04:05:00,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:05:00,474 INFO L225 Difference]: With dead ends: 356 [2018-04-12 04:05:00,474 INFO L226 Difference]: Without dead ends: 355 [2018-04-12 04:05:00,476 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 665 GetRequests, 477 SyntacticMatches, 0 SemanticMatches, 188 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3844 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=3540, Invalid=32370, Unknown=0, NotChecked=0, Total=35910 [2018-04-12 04:05:00,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 355 states. [2018-04-12 04:05:00,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 355 to 346. [2018-04-12 04:05:00,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 346 states. [2018-04-12 04:05:00,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 346 states to 346 states and 350 transitions. [2018-04-12 04:05:00,486 INFO L78 Accepts]: Start accepts. Automaton has 346 states and 350 transitions. Word has length 302 [2018-04-12 04:05:00,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:05:00,486 INFO L459 AbstractCegarLoop]: Abstraction has 346 states and 350 transitions. [2018-04-12 04:05:00,486 INFO L460 AbstractCegarLoop]: Interpolant automaton has 128 states. [2018-04-12 04:05:00,486 INFO L276 IsEmpty]: Start isEmpty. Operand 346 states and 350 transitions. [2018-04-12 04:05:00,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 304 [2018-04-12 04:05:00,487 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:05:00,487 INFO L355 BasicCegarLoop]: trace histogram [32, 32, 32, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:05:00,487 INFO L408 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:05:00,488 INFO L82 PathProgramCache]: Analyzing trace with hash -2147177873, now seen corresponding path program 5 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:05:00,494 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:05:00,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:05:00,562 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:05:00,565 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 04:05:00,566 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:05:00,573 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:05:00,573 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 04:05:02,741 INFO L134 CoverageAnalysis]: Checked inductivity of 4309 backedges. 0 proven. 4309 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:05:02,741 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:05:06,083 INFO L134 CoverageAnalysis]: Checked inductivity of 4309 backedges. 0 proven. 4309 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:05:06,103 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:05:06,129 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [67, 67] total 133 [2018-04-12 04:05:06,129 INFO L442 AbstractCegarLoop]: Interpolant automaton has 134 states [2018-04-12 04:05:06,130 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 134 interpolants. [2018-04-12 04:05:06,130 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1418, Invalid=16404, Unknown=0, NotChecked=0, Total=17822 [2018-04-12 04:05:06,131 INFO L87 Difference]: Start difference. First operand 346 states and 350 transitions. Second operand 134 states. [2018-04-12 04:05:13,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:05:13,538 INFO L93 Difference]: Finished difference Result 355 states and 359 transitions. [2018-04-12 04:05:13,538 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2018-04-12 04:05:13,538 INFO L78 Accepts]: Start accepts. Automaton has 134 states. Word has length 303 [2018-04-12 04:05:13,539 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:05:13,540 INFO L225 Difference]: With dead ends: 355 [2018-04-12 04:05:13,540 INFO L226 Difference]: Without dead ends: 354 [2018-04-12 04:05:13,543 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 671 GetRequests, 473 SyntacticMatches, 0 SemanticMatches, 198 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8383 ImplicationChecksByTransitivity, 8.4s TimeCoverageRelationStatistics Valid=4120, Invalid=35680, Unknown=0, NotChecked=0, Total=39800 [2018-04-12 04:05:13,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 354 states. [2018-04-12 04:05:13,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 354 to 347. [2018-04-12 04:05:13,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 347 states. [2018-04-12 04:05:13,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 347 states to 347 states and 351 transitions. [2018-04-12 04:05:13,557 INFO L78 Accepts]: Start accepts. Automaton has 347 states and 351 transitions. Word has length 303 [2018-04-12 04:05:13,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:05:13,557 INFO L459 AbstractCegarLoop]: Abstraction has 347 states and 351 transitions. [2018-04-12 04:05:13,557 INFO L460 AbstractCegarLoop]: Interpolant automaton has 134 states. [2018-04-12 04:05:13,557 INFO L276 IsEmpty]: Start isEmpty. Operand 347 states and 351 transitions. [2018-04-12 04:05:13,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 312 [2018-04-12 04:05:13,558 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:05:13,559 INFO L355 BasicCegarLoop]: trace histogram [33, 33, 32, 32, 32, 32, 32, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:05:13,559 INFO L408 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:05:13,559 INFO L82 PathProgramCache]: Analyzing trace with hash 137116194, now seen corresponding path program 6 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:05:13,572 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:05:13,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:05:13,628 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:05:15,006 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 4560 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:05:15,006 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:05:17,255 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 4560 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:05:17,275 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 04:05:17,275 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [69, 69] imperfect sequences [] total 134 [2018-04-12 04:05:17,275 INFO L442 AbstractCegarLoop]: Interpolant automaton has 134 states [2018-04-12 04:05:17,276 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 134 interpolants. [2018-04-12 04:05:17,276 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3467, Invalid=14355, Unknown=0, NotChecked=0, Total=17822 [2018-04-12 04:05:17,277 INFO L87 Difference]: Start difference. First operand 347 states and 351 transitions. Second operand 134 states. [2018-04-12 04:05:20,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:05:20,125 INFO L93 Difference]: Finished difference Result 679 states and 688 transitions. [2018-04-12 04:05:20,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2018-04-12 04:05:20,126 INFO L78 Accepts]: Start accepts. Automaton has 134 states. Word has length 311 [2018-04-12 04:05:20,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:05:20,128 INFO L225 Difference]: With dead ends: 679 [2018-04-12 04:05:20,128 INFO L226 Difference]: Without dead ends: 346 [2018-04-12 04:05:20,132 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 688 GetRequests, 487 SyntacticMatches, 2 SemanticMatches, 199 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9379 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=10362, Invalid=29838, Unknown=0, NotChecked=0, Total=40200 [2018-04-12 04:05:20,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346 states. [2018-04-12 04:05:20,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346 to 343. [2018-04-12 04:05:20,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343 states. [2018-04-12 04:05:20,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 346 transitions. [2018-04-12 04:05:20,149 INFO L78 Accepts]: Start accepts. Automaton has 343 states and 346 transitions. Word has length 311 [2018-04-12 04:05:20,150 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:05:20,150 INFO L459 AbstractCegarLoop]: Abstraction has 343 states and 346 transitions. [2018-04-12 04:05:20,150 INFO L460 AbstractCegarLoop]: Interpolant automaton has 134 states. [2018-04-12 04:05:20,150 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 346 transitions. [2018-04-12 04:05:20,152 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 314 [2018-04-12 04:05:20,152 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:05:20,153 INFO L355 BasicCegarLoop]: trace histogram [32, 31, 31, 31, 31, 31, 31, 31, 31, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:05:20,153 INFO L408 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:05:20,153 INFO L82 PathProgramCache]: Analyzing trace with hash -805265720, now seen corresponding path program 5 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:05:20,162 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:05:20,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:05:20,261 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:05:21,694 INFO L134 CoverageAnalysis]: Checked inductivity of 4250 backedges. 3 proven. 4247 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:05:21,695 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:05:21,911 WARN L148 SmtUtils]: Spent 211ms on a formula simplification that was a NOOP. DAG size: 165 [2018-04-12 04:05:22,119 WARN L148 SmtUtils]: Spent 205ms on a formula simplification that was a NOOP. DAG size: 165 [2018-04-12 04:05:23,307 INFO L134 CoverageAnalysis]: Checked inductivity of 4250 backedges. 3 proven. 4247 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:05:23,326 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:05:23,326 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [67, 67] total 131 [2018-04-12 04:05:23,327 INFO L442 AbstractCegarLoop]: Interpolant automaton has 131 states [2018-04-12 04:05:23,328 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 131 interpolants. [2018-04-12 04:05:23,329 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3396, Invalid=13634, Unknown=0, NotChecked=0, Total=17030 [2018-04-12 04:05:23,329 INFO L87 Difference]: Start difference. First operand 343 states and 346 transitions. Second operand 131 states. [2018-04-12 04:05:25,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:05:25,405 INFO L93 Difference]: Finished difference Result 675 states and 681 transitions. [2018-04-12 04:05:25,469 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2018-04-12 04:05:25,469 INFO L78 Accepts]: Start accepts. Automaton has 131 states. Word has length 313 [2018-04-12 04:05:25,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:05:25,471 INFO L225 Difference]: With dead ends: 675 [2018-04-12 04:05:25,472 INFO L226 Difference]: Without dead ends: 343 [2018-04-12 04:05:25,475 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 688 GetRequests, 494 SyntacticMatches, 2 SemanticMatches, 192 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14760 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=9636, Invalid=27806, Unknown=0, NotChecked=0, Total=37442 [2018-04-12 04:05:25,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 343 states. [2018-04-12 04:05:25,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 343 to 343. [2018-04-12 04:05:25,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343 states. [2018-04-12 04:05:25,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 345 transitions. [2018-04-12 04:05:25,490 INFO L78 Accepts]: Start accepts. Automaton has 343 states and 345 transitions. Word has length 313 [2018-04-12 04:05:25,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:05:25,491 INFO L459 AbstractCegarLoop]: Abstraction has 343 states and 345 transitions. [2018-04-12 04:05:25,491 INFO L460 AbstractCegarLoop]: Interpolant automaton has 131 states. [2018-04-12 04:05:25,491 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 345 transitions. [2018-04-12 04:05:25,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 323 [2018-04-12 04:05:25,493 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:05:25,493 INFO L355 BasicCegarLoop]: trace histogram [33, 32, 32, 32, 32, 32, 32, 32, 32, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:05:25,493 INFO L408 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:05:25,494 INFO L82 PathProgramCache]: Analyzing trace with hash -951258918, now seen corresponding path program 6 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:05:25,501 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:05:25,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:05:25,556 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:05:25,655 INFO L134 CoverageAnalysis]: Checked inductivity of 4531 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4528 trivial. 0 not checked. [2018-04-12 04:05:25,656 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:05:25,716 INFO L134 CoverageAnalysis]: Checked inductivity of 4531 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4528 trivial. 0 not checked. [2018-04-12 04:05:25,736 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 04:05:25,736 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [] total 8 [2018-04-12 04:05:25,737 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 04:05:25,737 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 04:05:25,737 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2018-04-12 04:05:25,737 INFO L87 Difference]: Start difference. First operand 343 states and 345 transitions. Second operand 9 states. [2018-04-12 04:05:25,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:05:25,783 INFO L93 Difference]: Finished difference Result 359 states and 361 transitions. [2018-04-12 04:05:25,783 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 04:05:25,783 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 322 [2018-04-12 04:05:25,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:05:25,785 INFO L225 Difference]: With dead ends: 359 [2018-04-12 04:05:25,785 INFO L226 Difference]: Without dead ends: 358 [2018-04-12 04:05:25,786 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 646 GetRequests, 635 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=50, Invalid=82, Unknown=0, NotChecked=0, Total=132 [2018-04-12 04:05:25,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 358 states. [2018-04-12 04:05:25,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 358 to 341. [2018-04-12 04:05:25,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 341 states. [2018-04-12 04:05:25,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 341 states to 341 states and 343 transitions. [2018-04-12 04:05:25,797 INFO L78 Accepts]: Start accepts. Automaton has 341 states and 343 transitions. Word has length 322 [2018-04-12 04:05:25,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:05:25,798 INFO L459 AbstractCegarLoop]: Abstraction has 341 states and 343 transitions. [2018-04-12 04:05:25,798 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 04:05:25,799 INFO L276 IsEmpty]: Start isEmpty. Operand 341 states and 343 transitions. [2018-04-12 04:05:25,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 331 [2018-04-12 04:05:25,801 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:05:25,801 INFO L355 BasicCegarLoop]: trace histogram [33, 32, 32, 32, 32, 32, 32, 32, 32, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:05:25,801 INFO L408 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:05:25,801 INFO L82 PathProgramCache]: Analyzing trace with hash 2127961249, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:05:25,809 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:05:25,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:05:25,868 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:05:25,937 INFO L134 CoverageAnalysis]: Checked inductivity of 4530 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4528 trivial. 0 not checked. [2018-04-12 04:05:25,937 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:05:26,008 INFO L134 CoverageAnalysis]: Checked inductivity of 4530 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4528 trivial. 0 not checked. [2018-04-12 04:05:26,029 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:05:26,029 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-04-12 04:05:26,030 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 04:05:26,030 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 04:05:26,030 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-04-12 04:05:26,030 INFO L87 Difference]: Start difference. First operand 341 states and 343 transitions. Second operand 8 states. [2018-04-12 04:05:26,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:05:26,392 INFO L93 Difference]: Finished difference Result 397 states and 404 transitions. [2018-04-12 04:05:26,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 04:05:26,392 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 330 [2018-04-12 04:05:26,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:05:26,394 INFO L225 Difference]: With dead ends: 397 [2018-04-12 04:05:26,394 INFO L226 Difference]: Without dead ends: 377 [2018-04-12 04:05:26,394 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 663 GetRequests, 653 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2018-04-12 04:05:26,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 377 states. [2018-04-12 04:05:26,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 377 to 361. [2018-04-12 04:05:26,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 361 states. [2018-04-12 04:05:26,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 361 states to 361 states and 365 transitions. [2018-04-12 04:05:26,405 INFO L78 Accepts]: Start accepts. Automaton has 361 states and 365 transitions. Word has length 330 [2018-04-12 04:05:26,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:05:26,406 INFO L459 AbstractCegarLoop]: Abstraction has 361 states and 365 transitions. [2018-04-12 04:05:26,406 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 04:05:26,406 INFO L276 IsEmpty]: Start isEmpty. Operand 361 states and 365 transitions. [2018-04-12 04:05:26,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 947 [2018-04-12 04:05:26,412 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:05:26,413 INFO L355 BasicCegarLoop]: trace histogram [99, 96, 96, 96, 96, 96, 96, 96, 96, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:05:26,413 INFO L408 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:05:26,413 INFO L82 PathProgramCache]: Analyzing trace with hash -822354689, now seen corresponding path program 2 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:05:26,419 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:05:26,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:05:26,604 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:05:27,009 INFO L134 CoverageAnalysis]: Checked inductivity of 41682 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 41646 trivial. 0 not checked. [2018-04-12 04:05:27,009 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:05:27,297 INFO L134 CoverageAnalysis]: Checked inductivity of 41682 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 41646 trivial. 0 not checked. [2018-04-12 04:05:27,329 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:05:27,329 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2018-04-12 04:05:27,330 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-12 04:05:27,330 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-12 04:05:27,330 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=168, Unknown=0, NotChecked=0, Total=240 [2018-04-12 04:05:27,331 INFO L87 Difference]: Start difference. First operand 361 states and 365 transitions. Second operand 16 states. [2018-04-12 04:05:27,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:05:27,520 INFO L93 Difference]: Finished difference Result 437 states and 450 transitions. [2018-04-12 04:05:27,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-12 04:05:27,520 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 946 [2018-04-12 04:05:27,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:05:27,523 INFO L225 Difference]: With dead ends: 437 [2018-04-12 04:05:27,523 INFO L226 Difference]: Without dead ends: 417 [2018-04-12 04:05:27,524 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1903 GetRequests, 1877 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 113 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=259, Invalid=497, Unknown=0, NotChecked=0, Total=756 [2018-04-12 04:05:27,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 417 states. [2018-04-12 04:05:27,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 417 to 401. [2018-04-12 04:05:27,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 401 states. [2018-04-12 04:05:27,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 401 states to 401 states and 409 transitions. [2018-04-12 04:05:27,547 INFO L78 Accepts]: Start accepts. Automaton has 401 states and 409 transitions. Word has length 946 [2018-04-12 04:05:27,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:05:27,548 INFO L459 AbstractCegarLoop]: Abstraction has 401 states and 409 transitions. [2018-04-12 04:05:27,548 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-12 04:05:27,548 INFO L276 IsEmpty]: Start isEmpty. Operand 401 states and 409 transitions. [2018-04-12 04:05:27,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2179 [2018-04-12 04:05:27,586 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:05:27,587 INFO L355 BasicCegarLoop]: trace histogram [231, 224, 224, 224, 224, 224, 224, 224, 224, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:05:27,587 INFO L408 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:05:27,588 INFO L82 PathProgramCache]: Analyzing trace with hash -888116293, now seen corresponding path program 3 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:05:27,593 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:05:27,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:05:27,989 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:05:29,535 INFO L134 CoverageAnalysis]: Checked inductivity of 228354 backedges. 0 proven. 224 refuted. 0 times theorem prover too weak. 228130 trivial. 0 not checked. [2018-04-12 04:05:29,536 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:05:31,078 INFO L134 CoverageAnalysis]: Checked inductivity of 228354 backedges. 0 proven. 224 refuted. 0 times theorem prover too weak. 228130 trivial. 0 not checked. [2018-04-12 04:05:31,100 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:05:31,125 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 32 [2018-04-12 04:05:31,127 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-04-12 04:05:31,127 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-04-12 04:05:31,127 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=272, Invalid=720, Unknown=0, NotChecked=0, Total=992 [2018-04-12 04:05:31,127 INFO L87 Difference]: Start difference. First operand 401 states and 409 transitions. Second operand 32 states. [2018-04-12 04:05:31,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:05:31,964 INFO L93 Difference]: Finished difference Result 517 states and 542 transitions. [2018-04-12 04:05:31,964 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-04-12 04:05:31,964 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 2178 [2018-04-12 04:05:31,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:05:31,970 INFO L225 Difference]: With dead ends: 517 [2018-04-12 04:05:31,970 INFO L226 Difference]: Without dead ends: 497 [2018-04-12 04:05:31,971 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4383 GetRequests, 4325 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 681 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1155, Invalid=2385, Unknown=0, NotChecked=0, Total=3540 [2018-04-12 04:05:31,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 497 states. [2018-04-12 04:05:31,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 497 to 481. [2018-04-12 04:05:31,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 481 states. [2018-04-12 04:05:31,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 481 states to 481 states and 497 transitions. [2018-04-12 04:05:32,000 INFO L78 Accepts]: Start accepts. Automaton has 481 states and 497 transitions. Word has length 2178 [2018-04-12 04:05:32,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:05:32,001 INFO L459 AbstractCegarLoop]: Abstraction has 481 states and 497 transitions. [2018-04-12 04:05:32,001 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-04-12 04:05:32,001 INFO L276 IsEmpty]: Start isEmpty. Operand 481 states and 497 transitions. [2018-04-12 04:05:32,129 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4643 [2018-04-12 04:05:32,129 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:05:32,130 INFO L355 BasicCegarLoop]: trace histogram [495, 480, 480, 480, 480, 480, 480, 480, 480, 16, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:05:32,130 INFO L408 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:05:32,131 INFO L82 PathProgramCache]: Analyzing trace with hash 518373683, now seen corresponding path program 4 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:05:32,137 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:05:32,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:05:33,006 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:05:38,927 INFO L134 CoverageAnalysis]: Checked inductivity of 1051170 backedges. 0 proven. 1080 refuted. 0 times theorem prover too weak. 1050090 trivial. 0 not checked. [2018-04-12 04:05:38,927 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:05:44,933 INFO L134 CoverageAnalysis]: Checked inductivity of 1051170 backedges. 0 proven. 1080 refuted. 0 times theorem prover too weak. 1050090 trivial. 0 not checked. [2018-04-12 04:05:44,957 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:05:44,958 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33] total 64 [2018-04-12 04:05:44,961 INFO L442 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-04-12 04:05:44,961 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-04-12 04:05:44,961 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1056, Invalid=2976, Unknown=0, NotChecked=0, Total=4032 [2018-04-12 04:05:44,961 INFO L87 Difference]: Start difference. First operand 481 states and 497 transitions. Second operand 64 states. [2018-04-12 04:05:46,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:05:46,371 INFO L93 Difference]: Finished difference Result 677 states and 726 transitions. [2018-04-12 04:05:46,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-04-12 04:05:46,371 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 4642 [2018-04-12 04:05:46,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:05:46,379 INFO L225 Difference]: With dead ends: 677 [2018-04-12 04:05:46,379 INFO L226 Difference]: Without dead ends: 657 [2018-04-12 04:05:46,381 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9343 GetRequests, 9221 SyntacticMatches, 0 SemanticMatches, 122 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3257 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=4867, Invalid=10385, Unknown=0, NotChecked=0, Total=15252 [2018-04-12 04:05:46,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 657 states. [2018-04-12 04:05:46,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 657 to 641. [2018-04-12 04:05:46,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 641 states. [2018-04-12 04:05:46,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 641 states to 641 states and 673 transitions. [2018-04-12 04:05:46,427 INFO L78 Accepts]: Start accepts. Automaton has 641 states and 673 transitions. Word has length 4642 [2018-04-12 04:05:46,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:05:46,431 INFO L459 AbstractCegarLoop]: Abstraction has 641 states and 673 transitions. [2018-04-12 04:05:46,431 INFO L460 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-04-12 04:05:46,431 INFO L276 IsEmpty]: Start isEmpty. Operand 641 states and 673 transitions. [2018-04-12 04:05:46,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9571 [2018-04-12 04:05:46,852 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:05:46,854 INFO L355 BasicCegarLoop]: trace histogram [1023, 992, 992, 992, 992, 992, 992, 992, 992, 32, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:05:46,854 INFO L408 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:05:46,856 INFO L82 PathProgramCache]: Analyzing trace with hash 1770081315, now seen corresponding path program 5 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:05:46,861 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:05:48,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:05:48,438 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:06:11,936 INFO L134 CoverageAnalysis]: Checked inductivity of 4494690 backedges. 0 proven. 4712 refuted. 0 times theorem prover too weak. 4489978 trivial. 0 not checked. [2018-04-12 04:06:11,936 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:06:35,661 INFO L134 CoverageAnalysis]: Checked inductivity of 4494690 backedges. 0 proven. 4712 refuted. 0 times theorem prover too weak. 4489978 trivial. 0 not checked. [2018-04-12 04:06:35,692 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:06:35,694 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 65] total 65 [2018-04-12 04:06:35,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 65 states [2018-04-12 04:06:35,700 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2018-04-12 04:06:35,700 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1088, Invalid=3072, Unknown=0, NotChecked=0, Total=4160 [2018-04-12 04:06:35,701 INFO L87 Difference]: Start difference. First operand 641 states and 673 transitions. Second operand 65 states. [2018-04-12 04:06:37,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:06:37,495 INFO L93 Difference]: Finished difference Result 687 states and 722 transitions. [2018-04-12 04:06:37,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-04-12 04:06:37,496 INFO L78 Accepts]: Start accepts. Automaton has 65 states. Word has length 9570 [2018-04-12 04:06:37,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:06:37,505 INFO L225 Difference]: With dead ends: 687 [2018-04-12 04:06:37,505 INFO L226 Difference]: Without dead ends: 667 [2018-04-12 04:06:37,506 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 19201 GetRequests, 19013 SyntacticMatches, 63 SemanticMatches, 125 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5673 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=5118, Invalid=10884, Unknown=0, NotChecked=0, Total=16002 [2018-04-12 04:06:37,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 667 states. [2018-04-12 04:06:37,529 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 667 to 651. [2018-04-12 04:06:37,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 651 states. [2018-04-12 04:06:37,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 651 states to 651 states and 684 transitions. [2018-04-12 04:06:37,534 INFO L78 Accepts]: Start accepts. Automaton has 651 states and 684 transitions. Word has length 9570 [2018-04-12 04:06:37,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:06:37,537 INFO L459 AbstractCegarLoop]: Abstraction has 651 states and 684 transitions. [2018-04-12 04:06:37,537 INFO L460 AbstractCegarLoop]: Interpolant automaton has 65 states. [2018-04-12 04:06:37,537 INFO L276 IsEmpty]: Start isEmpty. Operand 651 states and 684 transitions. [2018-04-12 04:06:37,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9879 [2018-04-12 04:06:37,941 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:06:37,944 INFO L355 BasicCegarLoop]: trace histogram [1056, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 33, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:06:37,944 INFO L408 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:06:37,946 INFO L82 PathProgramCache]: Analyzing trace with hash 919446546, now seen corresponding path program 6 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:06:37,963 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:06:39,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:06:39,611 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:06:40,961 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 04:06:40,961 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:41,013 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:41,013 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 04:06:41,155 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:41,157 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:41,157 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:41,161 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:41,161 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:41,266 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:41,267 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:41,268 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:41,272 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:41,272 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:41,400 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:41,401 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:41,402 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:41,410 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:41,410 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:41,551 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:41,552 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:41,552 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:41,557 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:41,557 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:41,670 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:41,671 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:41,672 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:41,676 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:41,676 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:41,783 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:41,784 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:41,784 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:41,788 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:41,788 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:41,942 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:41,943 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:41,943 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:41,947 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:41,947 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:42,058 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:42,059 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:42,059 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:42,062 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:42,063 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:42,182 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:42,183 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:42,183 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:42,188 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:42,188 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:42,308 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:42,309 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:42,309 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:42,313 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:42,313 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:42,429 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:42,430 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:42,430 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:42,434 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:42,434 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:42,553 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:42,554 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:42,554 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:42,558 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:42,558 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:42,678 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:42,679 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:42,679 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:42,684 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:42,684 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:42,805 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:42,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:42,807 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:42,811 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:42,812 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:42,950 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:42,951 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:42,952 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:42,959 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:42,959 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:43,084 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:43,085 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:43,085 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:43,089 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:43,089 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:43,219 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:43,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:43,220 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:43,224 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:43,224 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:43,355 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:43,356 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:43,357 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:43,360 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:43,361 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:43,494 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:43,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:43,495 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:43,499 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:43,500 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:43,633 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:43,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:43,634 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:43,638 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:43,638 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:43,778 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:43,779 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:43,779 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:43,784 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:43,784 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:43,924 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:43,925 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:43,925 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:43,929 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:43,929 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:44,070 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:44,071 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:44,071 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:44,075 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:44,075 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:44,216 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:44,217 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:44,217 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:44,221 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:44,221 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:44,373 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:44,374 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:44,375 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:44,378 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:44,379 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:44,524 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:44,526 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:44,526 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:44,531 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:44,531 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:44,681 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:44,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:44,682 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:44,687 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:44,688 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:44,854 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:44,855 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:44,855 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:44,859 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:44,859 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:45,011 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:45,012 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:45,012 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:45,016 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:45,016 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:45,168 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:45,169 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:45,169 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:45,173 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:45,173 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:06:45,341 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:06:45,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:06:45,342 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:06:45,348 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:06:45,348 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:15, output treesize:5 [2018-04-12 04:07:12,906 INFO L134 CoverageAnalysis]: Checked inductivity of 4789504 backedges. 4590 proven. 294781 refuted. 0 times theorem prover too weak. 4490133 trivial. 0 not checked. [2018-04-12 04:07:12,906 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:07:18,188 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-04-12 04:07:18,188 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:07:18,190 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-04-12 04:07:18,190 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 04:07:18,197 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 04:07:18,197 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:14, output treesize:7 [2018-04-12 04:07:18,498 WARN L148 SmtUtils]: Spent 295ms on a formula simplification that was a NOOP. DAG size: 167 [2018-04-12 04:07:46,356 INFO L134 CoverageAnalysis]: Checked inductivity of 4789504 backedges. 0 proven. 294931 refuted. 0 times theorem prover too weak. 4494573 trivial. 0 not checked. [2018-04-12 04:07:46,386 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:07:46,388 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [134, 76] total 137 [2018-04-12 04:07:46,397 INFO L442 AbstractCegarLoop]: Interpolant automaton has 137 states [2018-04-12 04:07:46,397 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 137 interpolants. [2018-04-12 04:07:46,398 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1332, Invalid=17300, Unknown=0, NotChecked=0, Total=18632 [2018-04-12 04:07:46,399 INFO L87 Difference]: Start difference. First operand 651 states and 684 transitions. Second operand 137 states. [2018-04-12 04:07:57,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:07:57,412 INFO L93 Difference]: Finished difference Result 661 states and 693 transitions. [2018-04-12 04:07:57,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 137 states. [2018-04-12 04:07:57,413 INFO L78 Accepts]: Start accepts. Automaton has 137 states. Word has length 9878 [2018-04-12 04:07:57,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:07:57,435 INFO L225 Difference]: With dead ends: 661 [2018-04-12 04:07:57,435 INFO L226 Difference]: Without dead ends: 656 [2018-04-12 04:07:57,441 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 19886 GetRequests, 19526 SyntacticMatches, 94 SemanticMatches, 266 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17506 ImplicationChecksByTransitivity, 14.9s TimeCoverageRelationStatistics Valid=5810, Invalid=65746, Unknown=0, NotChecked=0, Total=71556 [2018-04-12 04:07:57,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 656 states. [2018-04-12 04:07:57,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 656 to 652. [2018-04-12 04:07:57,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 652 states. [2018-04-12 04:07:57,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 652 states to 652 states and 685 transitions. [2018-04-12 04:07:57,481 INFO L78 Accepts]: Start accepts. Automaton has 652 states and 685 transitions. Word has length 9878 [2018-04-12 04:07:57,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:07:57,488 INFO L459 AbstractCegarLoop]: Abstraction has 652 states and 685 transitions. [2018-04-12 04:07:57,488 INFO L460 AbstractCegarLoop]: Interpolant automaton has 137 states. [2018-04-12 04:07:57,488 INFO L276 IsEmpty]: Start isEmpty. Operand 652 states and 685 transitions. [2018-04-12 04:07:58,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9881 [2018-04-12 04:07:58,094 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:07:58,098 INFO L355 BasicCegarLoop]: trace histogram [1056, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 33, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:07:58,098 INFO L408 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:07:58,100 INFO L82 PathProgramCache]: Analyzing trace with hash -258061215, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:07:58,107 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:07:59,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:07:59,748 INFO L270 TraceCheckSpWp]: Computing forward predicates... Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown