java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/ArraysOfVariableLength6_true-valid-memsafety_true-termination.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-8168ed2-m [2018-04-12 04:08:20,979 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-12 04:08:20,982 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-12 04:08:20,997 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-12 04:08:20,997 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-12 04:08:20,998 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-12 04:08:20,999 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-12 04:08:21,001 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-12 04:08:21,003 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-12 04:08:21,004 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-12 04:08:21,005 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-12 04:08:21,005 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-12 04:08:21,006 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-12 04:08:21,008 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-12 04:08:21,008 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-12 04:08:21,011 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-12 04:08:21,013 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-12 04:08:21,015 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-12 04:08:21,017 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-12 04:08:21,018 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-12 04:08:21,021 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-04-12 04:08:21,021 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-04-12 04:08:21,022 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-04-12 04:08:21,023 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-04-12 04:08:21,024 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-04-12 04:08:21,026 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-04-12 04:08:21,026 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-04-12 04:08:21,027 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-04-12 04:08:21,028 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-04-12 04:08:21,028 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-04-12 04:08:21,029 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-04-12 04:08:21,029 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf [2018-04-12 04:08:21,057 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-12 04:08:21,057 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-12 04:08:21,058 INFO L131 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2018-04-12 04:08:21,058 INFO L133 SettingsManager]: * ultimate.logging.details=de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation=DEBUG; [2018-04-12 04:08:21,059 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-04-12 04:08:21,059 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-04-12 04:08:21,059 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-04-12 04:08:21,059 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-04-12 04:08:21,060 INFO L133 SettingsManager]: * Parallel states before merging=1 [2018-04-12 04:08:21,060 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-04-12 04:08:21,060 INFO L131 SettingsManager]: Preferences of LTL2Aut differ from their defaults: [2018-04-12 04:08:21,060 INFO L133 SettingsManager]: * Property to check=[] a a: x > 42 [2018-04-12 04:08:21,061 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-12 04:08:21,061 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-12 04:08:21,061 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-12 04:08:21,061 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-12 04:08:21,061 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-12 04:08:21,062 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-12 04:08:21,062 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-12 04:08:21,062 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-04-12 04:08:21,062 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-12 04:08:21,062 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-12 04:08:21,062 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-12 04:08:21,063 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-04-12 04:08:21,063 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-04-12 04:08:21,063 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-12 04:08:21,063 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 04:08:21,063 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-12 04:08:21,064 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-12 04:08:21,064 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-12 04:08:21,064 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-04-12 04:08:21,064 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-04-12 04:08:21,064 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:21,064 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-04-12 04:08:21,065 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-04-12 04:08:21,065 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-04-12 04:08:21,066 INFO L131 SettingsManager]: Preferences of Boogie Printer differ from their defaults: [2018-04-12 04:08:21,066 INFO L133 SettingsManager]: * Dump path:=C:\Users\alex\AppData\Local\Temp\ [2018-04-12 04:08:21,125 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-12 04:08:21,139 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-12 04:08:21,143 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-12 04:08:21,144 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-12 04:08:21,145 INFO L276 PluginConnector]: CDTParser initialized [2018-04-12 04:08:21,145 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/ArraysOfVariableLength6_true-valid-memsafety_true-termination.c [2018-04-12 04:08:21,496 INFO L225 CDTParser]: Created temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG4f1d07b78 [2018-04-12 04:08:21,620 INFO L287 CDTParser]: IsIndexed: true [2018-04-12 04:08:21,620 INFO L288 CDTParser]: Found 1 translation units. [2018-04-12 04:08:21,620 INFO L168 CDTParser]: Scanning ArraysOfVariableLength6_true-valid-memsafety_true-termination.c [2018-04-12 04:08:21,621 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-12 04:08:21,621 INFO L215 ultiparseSymbolTable]: [2018-04-12 04:08:21,622 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-12 04:08:21,622 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in ArraysOfVariableLength6_true-valid-memsafety_true-termination.c [2018-04-12 04:08:21,622 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo ('foo') in ArraysOfVariableLength6_true-valid-memsafety_true-termination.c [2018-04-12 04:08:21,622 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-12 04:08:21,622 INFO L233 ultiparseSymbolTable]: [2018-04-12 04:08:21,757 INFO L330 CDTParser]: Deleted temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG4f1d07b78 [2018-04-12 04:08:21,762 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-12 04:08:21,764 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-04-12 04:08:21,765 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-12 04:08:21,766 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-12 04:08:21,772 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-12 04:08:21,774 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 04:08:21" (1/1) ... [2018-04-12 04:08:21,777 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@19ac4a61 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:08:21, skipping insertion in model container [2018-04-12 04:08:21,777 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 04:08:21" (1/1) ... [2018-04-12 04:08:21,793 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 04:08:21,807 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 04:08:21,951 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 04:08:21,976 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 04:08:21,980 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 9 non ball SCCs. Number of states in SCCs 9. [2018-04-12 04:08:21,987 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:08:21 WrapperNode [2018-04-12 04:08:21,987 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-12 04:08:21,988 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-12 04:08:21,988 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-12 04:08:21,988 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-12 04:08:21,999 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:08:21" (1/1) ... [2018-04-12 04:08:22,000 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:08:21" (1/1) ... [2018-04-12 04:08:22,006 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:08:21" (1/1) ... [2018-04-12 04:08:22,007 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:08:21" (1/1) ... [2018-04-12 04:08:22,010 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:08:21" (1/1) ... [2018-04-12 04:08:22,014 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:08:21" (1/1) ... [2018-04-12 04:08:22,015 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:08:21" (1/1) ... [2018-04-12 04:08:22,017 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-12 04:08:22,018 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-12 04:08:22,018 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-12 04:08:22,018 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-12 04:08:22,019 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:08:21" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 04:08:22,073 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-12 04:08:22,073 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-12 04:08:22,073 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo [2018-04-12 04:08:22,073 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-12 04:08:22,074 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo [2018-04-12 04:08:22,074 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-12 04:08:22,074 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-12 04:08:22,074 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-12 04:08:22,074 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-12 04:08:22,074 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-12 04:08:22,074 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-12 04:08:22,074 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-12 04:08:22,074 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-12 04:08:22,377 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-12 04:08:22,377 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 04:08:22 BoogieIcfgContainer [2018-04-12 04:08:22,377 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-12 04:08:22,378 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2018-04-12 04:08:22,378 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2018-04-12 04:08:22,378 INFO L276 PluginConnector]: IcfgTransformer initialized [2018-04-12 04:08:22,381 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 04:08:22" (1/1) ... [2018-04-12 04:08:22,389 INFO L139 apSepIcfgTransformer]: HeapSepIcfgTransformer: Starting heap partitioning [2018-04-12 04:08:22,389 INFO L140 apSepIcfgTransformer]: To be partitioned heap arrays found [#memory_int] [2018-04-12 04:08:22,403 INFO L299 apSepIcfgTransformer]: Heap separator: starting memloc-array-style preprocessing [2018-04-12 04:08:22,413 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 9 non ball SCCs. Number of states in SCCs 9. [2018-04-12 04:08:22,415 INFO L332 apSepIcfgTransformer]: finished MemlocArrayUpdater, created 0 location literals (each corresponds to one heap write) [2018-04-12 04:08:22,421 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 9 non ball SCCs. Number of states in SCCs 9. [2018-04-12 04:08:22,425 INFO L412 apSepIcfgTransformer]: finished preprocessing for the equality analysis [2018-04-12 04:08:22,426 DEBUG L416 apSepIcfgTransformer]: storeIndexInfoToLocLiteral: Map: [2018-04-12 04:08:22,428 DEBUG L418 apSepIcfgTransformer]: edgeToIndexToStoreIndexInfo: NestedMap2: [2018-04-12 04:08:22,485 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=1) [2018-04-12 04:08:25,370 INFO L314 AbstractInterpreter]: Visited 71 different actions 195 times. Merged at 47 different actions 85 times. Never widened. Found 11 fixpoints after 6 different actions. Largest state had 21 variables. [2018-04-12 04:08:25,373 INFO L424 apSepIcfgTransformer]: finished equality analysis [2018-04-12 04:08:25,381 INFO L195 HeapSepPreAnalysis]: Number of read from array group [#memory_int] : 1 [2018-04-12 04:08:25,382 INFO L434 apSepIcfgTransformer]: Finished pre analysis before partitioning [2018-04-12 04:08:25,382 INFO L435 apSepIcfgTransformer]: array groups: Set: [#memory_int] [2018-04-12 04:08:25,383 INFO L437 apSepIcfgTransformer]: select infos: Set: ((select (select |v_#memory_int_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2)), at (SUMMARY for call #t~mem1 := read~int(~b.base, ~b.offset + ~i~0 * 1, 1); srcloc: L16')) [2018-04-12 04:08:25,387 DEBUG L373 HeapPartitionManager]: creating LocationBlock locs_30 [2018-04-12 04:08:25,387 DEBUG L374 HeapPartitionManager]: with contents [NoStoreIndexInfo] [2018-04-12 04:08:25,387 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_30 [2018-04-12 04:08:25,388 DEBUG L324 HeapPartitionManager]: at dimension 0 for ((select (select |v_#memory_int_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2)), at (SUMMARY for call #t~mem1 := read~int(~b.base, ~b.offset + ~i~0 * 1, 1); srcloc: L16')) [2018-04-12 04:08:25,388 DEBUG L325 HeapPartitionManager]: write locations: [NoStoreIndexInfo] [2018-04-12 04:08:25,388 DEBUG L373 HeapPartitionManager]: creating LocationBlock locs_30 [2018-04-12 04:08:25,388 DEBUG L374 HeapPartitionManager]: with contents [NoStoreIndexInfo] [2018-04-12 04:08:25,388 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_30 [2018-04-12 04:08:25,389 DEBUG L324 HeapPartitionManager]: at dimension 1 for ((select (select |v_#memory_int_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2)), at (SUMMARY for call #t~mem1 := read~int(~b.base, ~b.offset + ~i~0 * 1, 1); srcloc: L16')) [2018-04-12 04:08:25,389 DEBUG L325 HeapPartitionManager]: write locations: [NoStoreIndexInfo] [2018-04-12 04:08:25,389 INFO L330 HeapPartitionManager]: partitioning result: [2018-04-12 04:08:25,389 INFO L335 HeapPartitionManager]: location blocks for array group [#memory_int] [2018-04-12 04:08:25,390 INFO L344 HeapPartitionManager]: at dimension 0 [2018-04-12 04:08:25,390 INFO L345 HeapPartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 1 [2018-04-12 04:08:25,390 INFO L346 HeapPartitionManager]: # location blocks :1 [2018-04-12 04:08:25,390 DEBUG L353 HeapPartitionManager]: location block contents: [2018-04-12 04:08:25,391 DEBUG L356 HeapPartitionManager]: [NoStoreIndexInfo] [2018-04-12 04:08:25,391 INFO L344 HeapPartitionManager]: at dimension 1 [2018-04-12 04:08:25,391 INFO L345 HeapPartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 1 [2018-04-12 04:08:25,391 INFO L346 HeapPartitionManager]: # location blocks :1 [2018-04-12 04:08:25,391 DEBUG L353 HeapPartitionManager]: location block contents: [2018-04-12 04:08:25,391 DEBUG L356 HeapPartitionManager]: [NoStoreIndexInfo] [2018-04-12 04:08:25,393 INFO L134 ransitionTransformer]: executing heap partitioning transformation [2018-04-12 04:08:25,398 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,398 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,398 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,399 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,399 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,399 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,400 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,400 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,401 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,401 DEBUG L331 ransitionTransformer]: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] [2018-04-12 04:08:25,401 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,402 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,402 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,403 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,403 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,403 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,403 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,403 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,404 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:08:25,404 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:08:25,404 DEBUG L356 ransitionTransformer]: {main_~i~1=v_main_~i~1_9} [2018-04-12 04:08:25,404 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:08:25,404 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:08:25,405 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,405 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,405 DEBUG L331 ransitionTransformer]: Formula: (= |v_#valid_1| (store |v_#valid_2| 0 0)) InVars {#valid=|v_#valid_2|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid] [2018-04-12 04:08:25,405 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,406 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,406 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,406 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,406 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:08:25,406 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:08:25,406 DEBUG L356 ransitionTransformer]: {main_~b~0=v_main_~b~0_3} [2018-04-12 04:08:25,407 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:08:25,407 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:08:25,407 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,407 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,407 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,407 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,408 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,408 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,408 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,408 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:08:25,408 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:08:25,409 DEBUG L356 ransitionTransformer]: {main_~buffer~0=v_main_~buffer~0_1} [2018-04-12 04:08:25,409 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:08:25,409 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:08:25,409 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,409 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,410 DEBUG L331 ransitionTransformer]: Formula: (and (= 0 (select |v_#valid_16| |v_main_~#mask~0.base_5|)) (= |v_#length_5| (store |v_#length_6| |v_main_~#mask~0.base_5| 32)) (= 0 |v_main_~#mask~0.offset_5|) (not (= 0 |v_main_~#mask~0.base_5|)) (= |v_#valid_15| (store |v_#valid_16| |v_main_~#mask~0.base_5| 1))) InVars {#length=|v_#length_6|, #valid=|v_#valid_16|} OutVars{#length=|v_#length_5|, main_~#mask~0.base=|v_main_~#mask~0.base_5|, main_~#mask~0.offset=|v_main_~#mask~0.offset_5|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[main_~#mask~0.base, main_~#mask~0.offset, #valid, #length] [2018-04-12 04:08:25,410 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,410 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,410 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,411 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,411 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:08:25,411 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:08:25,411 DEBUG L356 ransitionTransformer]: {main_~c~0.base=v_main_~c~0.base_1, main_~c~0.offset=v_main_~c~0.offset_1} [2018-04-12 04:08:25,411 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:08:25,411 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:08:25,412 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,412 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,412 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~i~1_10 0) InVars {} OutVars{main_~i~1=v_main_~i~1_10} AuxVars[] AssignedVars[main_~i~1] [2018-04-12 04:08:25,412 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,412 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,413 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,413 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,413 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,413 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,413 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,414 DEBUG L331 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,414 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,414 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,414 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,414 DEBUG L331 ransitionTransformer]: Formula: (not (< v_main_~i~1_11 32)) InVars {main_~i~1=v_main_~i~1_11} OutVars{main_~i~1=v_main_~i~1_11} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,414 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,415 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,415 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,415 DEBUG L331 ransitionTransformer]: Formula: (< v_main_~i~1_12 32) InVars {main_~i~1=v_main_~i~1_12} OutVars{main_~i~1=v_main_~i~1_12} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,415 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,415 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,416 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,416 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~i~1_1 0) InVars {} OutVars{main_~i~1=v_main_~i~1_1} AuxVars[] AssignedVars[main_~i~1] [2018-04-12 04:08:25,416 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,416 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,416 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,417 DEBUG L331 ransitionTransformer]: Formula: (and (= v_main_~c~0.offset_2 |v_main_~#mask~0.offset_6|) (= v_main_~c~0.base_2 |v_main_~#mask~0.base_6|)) InVars {main_~#mask~0.offset=|v_main_~#mask~0.offset_6|, main_~#mask~0.base=|v_main_~#mask~0.base_6|} OutVars{main_~c~0.offset=v_main_~c~0.offset_2, main_~c~0.base=v_main_~c~0.base_2, main_~#mask~0.offset=|v_main_~#mask~0.offset_6|, main_~#mask~0.base=|v_main_~#mask~0.base_6|} AuxVars[] AssignedVars[main_~c~0.base, main_~c~0.offset] [2018-04-12 04:08:25,417 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,417 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,417 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,417 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,418 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,418 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,418 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,418 DEBUG L331 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,418 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,418 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,419 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,419 DEBUG L331 ransitionTransformer]: Formula: (or (not (<= 0 v_main_~i~1_13)) (not (< v_main_~i~1_13 100))) InVars {main_~i~1=v_main_~i~1_13} OutVars{main_~i~1=v_main_~i~1_13} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,419 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,419 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,419 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,420 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,420 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,420 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,420 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,420 DEBUG L331 ransitionTransformer]: Formula: (not (< v_main_~i~1_2 32)) InVars {main_~i~1=v_main_~i~1_2} OutVars{main_~i~1=v_main_~i~1_2} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,421 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,421 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,421 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,421 DEBUG L331 ransitionTransformer]: Formula: (< v_main_~i~1_3 32) InVars {main_~i~1=v_main_~i~1_3} OutVars{main_~i~1=v_main_~i~1_3} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,421 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,421 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,422 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,422 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#res_2| 0) InVars {} OutVars{main_#res=|v_main_#res_2|} AuxVars[] AssignedVars[main_#res] [2018-04-12 04:08:25,422 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,422 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,423 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,423 DEBUG L331 ransitionTransformer]: Formula: (and (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1| 32) (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1| v_main_~c~0.offset_4) (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1| v_main_~c~0.base_4)) InVars {main_~c~0.offset=v_main_~c~0.offset_4, main_~c~0.base=v_main_~c~0.base_4} OutVars{main_~c~0.offset=v_main_~c~0.offset_4, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1|, main_~c~0.base=v_main_~c~0.base_4} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size] [2018-04-12 04:08:25,423 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:08:25,423 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:08:25,423 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1|} [2018-04-12 04:08:25,423 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:08:25,424 DEBUG L358 ransitionTransformer]: {main_~c~0.offset=v_main_~c~0.offset_4, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.baseInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offsetInParam_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~sizeInParam_1|, main_~c~0.base=v_main_~c~0.base_4} [2018-04-12 04:08:25,424 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,424 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,424 DEBUG L331 ransitionTransformer]: Formula: (or (not (< v_main_~i~1_4 100)) (not (<= 0 v_main_~i~1_4))) InVars {main_~i~1=v_main_~i~1_4} OutVars{main_~i~1=v_main_~i~1_4} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,424 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,424 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,425 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,425 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,425 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,425 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,426 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,426 DEBUG L331 ransitionTransformer]: Formula: (= |v_#valid_11| (store |v_#valid_12| |v_main_~#mask~0.base_3| 0)) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_12|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_3|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid] [2018-04-12 04:08:25,426 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,426 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,426 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,427 DEBUG L331 ransitionTransformer]: Formula: (and (<= |v_main_#t~ret3_2| 2147483647) (<= 0 (+ |v_main_#t~ret3_2| 2147483648))) InVars {main_#t~ret3=|v_main_#t~ret3_2|} OutVars{main_#t~ret3=|v_main_#t~ret3_2|} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,427 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,427 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,427 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,427 DEBUG L331 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_1 |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size_1|) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size_1|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~size_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_1} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size] [2018-04-12 04:08:25,428 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,428 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,428 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,428 DEBUG L331 ransitionTransformer]: Formula: (not (= 32 (select v_main_~b~0_1 v_main_~i~1_5))) InVars {main_~b~0=v_main_~b~0_1, main_~i~1=v_main_~i~1_5} OutVars{main_~b~0=v_main_~b~0_1, main_~i~1=v_main_~i~1_5} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,428 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,428 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,429 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,429 DEBUG L331 ransitionTransformer]: Formula: (= 32 (select v_main_~b~0_2 v_main_~i~1_6)) InVars {main_~b~0=v_main_~b~0_2, main_~i~1=v_main_~i~1_6} OutVars{main_~b~0=v_main_~b~0_2, main_~i~1=v_main_~i~1_6} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,429 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,429 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,430 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,430 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,430 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:08:25,430 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:08:25,430 DEBUG L356 ransitionTransformer]: {main_~#mask~0.base=|v_main_~#mask~0.base_4|, main_~#mask~0.offset=|v_main_~#mask~0.offset_4|} [2018-04-12 04:08:25,430 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:08:25,431 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:08:25,431 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,431 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,431 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~b~0_4 (store v_main_~b~0_5 v_main_~i~1_14 |v_main_#t~ret3_3|)) InVars {main_~i~1=v_main_~i~1_14, main_~b~0=v_main_~b~0_5, main_#t~ret3=|v_main_#t~ret3_3|} OutVars{main_~i~1=v_main_~i~1_14, main_~b~0=v_main_~b~0_4, main_#t~ret3=|v_main_#t~ret3_3|} AuxVars[] AssignedVars[main_~b~0] [2018-04-12 04:08:25,432 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,432 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,432 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,432 DEBUG L331 ransitionTransformer]: Formula: (and (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_1 |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|) (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_1 |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base_1|)) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.base_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#in~b.offset_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_1, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_1} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset] [2018-04-12 04:08:25,432 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,433 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,433 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,433 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#res_1| 1) InVars {} OutVars{main_#res=|v_main_#res_1|} AuxVars[] AssignedVars[main_#res] [2018-04-12 04:08:25,433 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,433 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,434 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,434 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#t~post4_1| v_main_~i~1_7) InVars {main_~i~1=v_main_~i~1_7} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~1=v_main_~i~1_7} AuxVars[] AssignedVars[main_#t~post4] [2018-04-12 04:08:25,434 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,434 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,435 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,435 DEBUG L331 ransitionTransformer]: Formula: (= |v_#valid_13| |old(#valid)|) InVars {#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_13|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,435 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,435 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,435 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,436 DEBUG L331 ransitionTransformer]: Formula: (not (= |v_#valid_14| |old(#valid)|)) InVars {#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_14|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,436 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,436 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,436 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,436 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,436 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:08:25,437 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:08:25,437 DEBUG L356 ransitionTransformer]: {main_#t~ret3=|v_main_#t~ret3_4|} [2018-04-12 04:08:25,437 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:08:25,437 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:08:25,437 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,438 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,438 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,438 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:08:25,438 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:08:25,438 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0_1} [2018-04-12 04:08:25,438 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:08:25,439 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:08:25,439 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,439 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,439 DEBUG L331 ransitionTransformer]: Formula: (= (store |v_#valid_10| |v_main_~#mask~0.base_1| 0) |v_#valid_9|) InVars {main_~#mask~0.base=|v_main_~#mask~0.base_1|, #valid=|v_#valid_10|} OutVars{main_~#mask~0.base=|v_main_~#mask~0.base_1|, #valid=|v_#valid_9|} AuxVars[] AssignedVars[#valid] [2018-04-12 04:08:25,439 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,440 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,440 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,440 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~i~1_8 (+ |v_main_#t~post4_2| 1)) InVars {main_#t~post4=|v_main_#t~post4_2|} OutVars{main_#t~post4=|v_main_#t~post4_2|, main_~i~1=v_main_~i~1_8} AuxVars[] AssignedVars[main_~i~1] [2018-04-12 04:08:25,440 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,440 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,441 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,441 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#t~post2_1| v_main_~i~1_15) InVars {main_~i~1=v_main_~i~1_15} OutVars{main_~i~1=v_main_~i~1_15, main_#t~post2=|v_main_#t~post2_1|} AuxVars[] AssignedVars[main_#t~post2] [2018-04-12 04:08:25,441 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,441 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,441 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,441 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,442 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:08:25,442 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:08:25,442 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_1} [2018-04-12 04:08:25,442 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:08:25,442 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:08:25,442 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,443 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,443 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,443 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:08:25,443 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:08:25,443 DEBUG L356 ransitionTransformer]: {main_~#mask~0.base=|v_main_~#mask~0.base_2|, main_~#mask~0.offset=|v_main_~#mask~0.offset_2|} [2018-04-12 04:08:25,444 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:08:25,444 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:08:25,444 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,444 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,444 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,444 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:08:25,445 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:08:25,445 DEBUG L356 ransitionTransformer]: {main_#t~post4=|v_main_#t~post4_3|} [2018-04-12 04:08:25,445 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:08:25,445 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:08:25,445 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,446 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,446 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~i~1_16 (+ |v_main_#t~post2_2| 1)) InVars {main_#t~post2=|v_main_#t~post2_2|} OutVars{main_~i~1=v_main_~i~1_16, main_#t~post2=|v_main_#t~post2_2|} AuxVars[] AssignedVars[main_~i~1] [2018-04-12 04:08:25,446 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,446 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,446 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,447 DEBUG L331 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_2 0) InVars {} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_2} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0] [2018-04-12 04:08:25,447 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,447 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,447 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,447 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,447 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:08:25,448 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:08:25,448 DEBUG L356 ransitionTransformer]: {main_#t~post2=|v_main_#t~post2_3|} [2018-04-12 04:08:25,448 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:08:25,448 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:08:25,448 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,449 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,449 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,449 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,449 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,449 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,449 DEBUG L331 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,450 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,450 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,450 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,450 DEBUG L331 ransitionTransformer]: Formula: (not (< v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_3 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_2)) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_3, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_2} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_3, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_2} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,450 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,451 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,451 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,451 DEBUG L331 ransitionTransformer]: Formula: (< v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_4 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_3) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_4, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_3} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_4, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~size_3} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,451 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,451 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,452 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,452 DEBUG L331 ransitionTransformer]: Formula: (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_11) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_11} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_11} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res] [2018-04-12 04:08:25,452 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,452 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,453 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,453 DEBUG L331 ransitionTransformer]: Formula: (or (not (<= 0 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_5)) (not (< v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_5 32))) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_5} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_5} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,453 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,453 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,453 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,454 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,454 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,454 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,454 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,454 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,455 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,455 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,457 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,458 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse0 (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2))) (and (<= 0 .cse0) (<= (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2 1) (select |v_#length_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)) (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1| (select (select |v_#memory_int_part_locs_30_locs_30_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) .cse0)) (= 1 (select |v_#valid_3| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)))) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1] [2018-04-12 04:08:25,458 DEBUG L338 ransitionTransformer]: formula has changed [2018-04-12 04:08:25,458 DEBUG L339 ransitionTransformer]: old formula: [2018-04-12 04:08:25,458 DEBUG L340 ransitionTransformer]: (let ((.cse0 (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2))) (and (<= 0 .cse0) (<= (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2 1) (select |v_#length_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)) (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1| (select (select |v_#memory_int_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) .cse0)) (= 1 (select |v_#valid_3| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)))) [2018-04-12 04:08:25,459 DEBUG L341 ransitionTransformer]: new formula: [2018-04-12 04:08:25,459 DEBUG L342 ransitionTransformer]: (let ((.cse0 (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2))) (and (<= 0 .cse0) (<= (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2 1) (select |v_#length_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)) (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1| (select (select |v_#memory_int_part_locs_30_locs_30_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2) .cse0)) (= 1 (select |v_#valid_3| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2)))) [2018-04-12 04:08:25,459 DEBUG L346 ransitionTransformer]: invars have changed [2018-04-12 04:08:25,459 DEBUG L347 ransitionTransformer]: old invars: [2018-04-12 04:08:25,459 DEBUG L348 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6} [2018-04-12 04:08:25,460 DEBUG L349 ransitionTransformer]: new invars: [2018-04-12 04:08:25,460 DEBUG L350 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|} [2018-04-12 04:08:25,460 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:08:25,460 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:08:25,460 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #memory_int=|v_#memory_int_1|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1|} [2018-04-12 04:08:25,460 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:08:25,461 DEBUG L358 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_2, #valid=|v_#valid_3|, #length=|v_#length_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_6, #memory_int_part_locs_30_locs_30=|v_#memory_int_part_locs_30_locs_30_1|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_1|} [2018-04-12 04:08:25,461 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,461 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,461 DEBUG L331 ransitionTransformer]: Formula: (not (= 1 (select |v_#valid_4| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_3))) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_3, #valid=|v_#valid_4|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_3, #valid=|v_#valid_4|} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,461 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,462 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,462 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,462 DEBUG L331 ransitionTransformer]: Formula: (or (not (<= (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_7 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_3 1) (select |v_#length_2| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_4))) (not (<= 0 (+ v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_7 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_3)))) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_2|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_7, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_3} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.base_4, #length=|v_#length_2|, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_7, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~b.offset_3} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,462 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,463 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,463 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,463 DEBUG L331 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0_2 (store v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0_3 v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_8 |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_2|)) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_8, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0_3, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_2|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_8, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0_2, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_2|} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~a~0] [2018-04-12 04:08:25,463 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,463 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,464 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,464 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,464 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:08:25,464 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:08:25,464 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~mem1_3|} [2018-04-12 04:08:25,464 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:08:25,465 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:08:25,465 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,465 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,465 DEBUG L331 ransitionTransformer]: Formula: (= |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_1| v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_9) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_9} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_9, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_1|} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0] [2018-04-12 04:08:25,465 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,466 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,466 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,466 DEBUG L331 ransitionTransformer]: Formula: (= v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_10 (+ |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_2| 1)) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_2|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0=v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0_10, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_2|} AuxVars[] AssignedVars[__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_~i~0] [2018-04-12 04:08:25,466 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,466 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,467 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,467 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,467 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:08:25,467 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:08:25,467 DEBUG L356 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#t~post0_3|} [2018-04-12 04:08:25,467 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:08:25,468 DEBUG L358 ransitionTransformer]: {} [2018-04-12 04:08:25,468 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,468 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,468 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 04:08:25,468 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 04:08:25,468 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,469 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,469 DEBUG L331 ransitionTransformer]: Formula: (= |v_ULTIMATE.start_#t~ret5_2| |v_main_#resOutParam_1|) InVars {main_#res=|v_main_#resOutParam_1|} OutVars{ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_2|, main_#res=|v_main_#resOutParam_1|} AuxVars[] AssignedVars[ULTIMATE.start_#t~ret5] [2018-04-12 04:08:25,469 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:08:25,469 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:08:25,469 DEBUG L356 ransitionTransformer]: {ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_2|} [2018-04-12 04:08:25,469 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:08:25,470 DEBUG L358 ransitionTransformer]: {ULTIMATE.start_#t~ret5=|v_ULTIMATE.start_#t~ret5_2|, main_#res=|v_main_#resOutParam_1|} [2018-04-12 04:08:25,470 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,470 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 04:08:25,470 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#t~ret3_5| |v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#resOutParam_1|) InVars {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#resOutParam_1|} OutVars{__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#resOutParam_1|, main_#t~ret3=|v_main_#t~ret3_5|} AuxVars[] AssignedVars[main_#t~ret3] [2018-04-12 04:08:25,470 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 04:08:25,471 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 04:08:25,471 DEBUG L356 ransitionTransformer]: {main_#t~ret3=|v_main_#t~ret3_5|} [2018-04-12 04:08:25,471 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 04:08:25,471 DEBUG L358 ransitionTransformer]: {__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#res=|v___U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__foo_#resOutParam_1|, main_#t~ret3=|v_main_#t~ret3_5|} [2018-04-12 04:08:25,471 DEBUG L360 ransitionTransformer]: [2018-04-12 04:08:25,471 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 9 non ball SCCs. Number of states in SCCs 9. [2018-04-12 04:08:25,473 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 12.04 04:08:25 BasicIcfg [2018-04-12 04:08:25,473 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2018-04-12 04:08:25,474 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-12 04:08:25,474 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-12 04:08:25,478 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-12 04:08:25,478 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.04 04:08:21" (1/4) ... [2018-04-12 04:08:25,479 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@45de233b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 04:08:25, skipping insertion in model container [2018-04-12 04:08:25,479 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 04:08:21" (2/4) ... [2018-04-12 04:08:25,479 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@45de233b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 04:08:25, skipping insertion in model container [2018-04-12 04:08:25,480 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 04:08:22" (3/4) ... [2018-04-12 04:08:25,480 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@45de233b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 12.04 04:08:25, skipping insertion in model container [2018-04-12 04:08:25,480 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 12.04 04:08:25" (4/4) ... [2018-04-12 04:08:25,482 INFO L107 eAbstractionObserver]: Analyzing ICFG memPartitionedIcfg [2018-04-12 04:08:25,491 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-12 04:08:25,499 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 6 error locations. [2018-04-12 04:08:25,543 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-12 04:08:25,543 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-12 04:08:25,543 INFO L370 AbstractCegarLoop]: Hoare is true [2018-04-12 04:08:25,544 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-12 04:08:25,544 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-12 04:08:25,544 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-12 04:08:25,544 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-12 04:08:25,544 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-12 04:08:25,544 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-12 04:08:25,545 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-12 04:08:25,558 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states. [2018-04-12 04:08:25,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-04-12 04:08:25,562 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:25,563 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:25,563 INFO L408 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:25,567 INFO L82 PathProgramCache]: Analyzing trace with hash 1261173293, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:25,582 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:25,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:25,619 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:25,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:25,685 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:25,747 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:25,778 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 04:08:25,779 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [] total 4 [2018-04-12 04:08:25,780 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 04:08:25,787 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 04:08:25,788 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-04-12 04:08:25,789 INFO L87 Difference]: Start difference. First operand 64 states. Second operand 5 states. [2018-04-12 04:08:25,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:08:25,899 INFO L93 Difference]: Finished difference Result 141 states and 163 transitions. [2018-04-12 04:08:25,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 04:08:25,902 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-04-12 04:08:25,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:08:25,915 INFO L225 Difference]: With dead ends: 141 [2018-04-12 04:08:25,915 INFO L226 Difference]: Without dead ends: 84 [2018-04-12 04:08:25,919 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 27 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-04-12 04:08:25,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2018-04-12 04:08:25,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 68. [2018-04-12 04:08:25,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-04-12 04:08:25,957 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 71 transitions. [2018-04-12 04:08:25,958 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 71 transitions. Word has length 16 [2018-04-12 04:08:25,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:08:25,959 INFO L459 AbstractCegarLoop]: Abstraction has 68 states and 71 transitions. [2018-04-12 04:08:25,959 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 04:08:25,959 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 71 transitions. [2018-04-12 04:08:25,959 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-04-12 04:08:25,959 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:25,959 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:25,959 INFO L408 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:25,960 INFO L82 PathProgramCache]: Analyzing trace with hash -635853243, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:25,966 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:25,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:25,982 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:25,989 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:25,990 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:26,011 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:26,036 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 04:08:26,036 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2, 2] imperfect sequences [] total 3 [2018-04-12 04:08:26,038 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 04:08:26,038 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 04:08:26,038 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-04-12 04:08:26,039 INFO L87 Difference]: Start difference. First operand 68 states and 71 transitions. Second operand 4 states. [2018-04-12 04:08:26,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:08:26,071 INFO L93 Difference]: Finished difference Result 82 states and 86 transitions. [2018-04-12 04:08:26,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-12 04:08:26,071 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2018-04-12 04:08:26,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:08:26,074 INFO L225 Difference]: With dead ends: 82 [2018-04-12 04:08:26,074 INFO L226 Difference]: Without dead ends: 81 [2018-04-12 04:08:26,075 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-04-12 04:08:26,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2018-04-12 04:08:26,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 71. [2018-04-12 04:08:26,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-04-12 04:08:26,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 75 transitions. [2018-04-12 04:08:26,081 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 75 transitions. Word has length 25 [2018-04-12 04:08:26,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:08:26,081 INFO L459 AbstractCegarLoop]: Abstraction has 71 states and 75 transitions. [2018-04-12 04:08:26,081 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 04:08:26,081 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 75 transitions. [2018-04-12 04:08:26,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-04-12 04:08:26,082 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:26,082 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:26,082 INFO L408 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:26,082 INFO L82 PathProgramCache]: Analyzing trace with hash 1763386179, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:26,093 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:26,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:26,107 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:26,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 04:08:26,130 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:08:26,136 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:08:26,136 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-12 04:08:26,178 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:26,178 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:26,186 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:26,209 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 04:08:26,209 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [] total 5 [2018-04-12 04:08:26,210 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 04:08:26,210 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 04:08:26,210 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-12 04:08:26,210 INFO L87 Difference]: Start difference. First operand 71 states and 75 transitions. Second operand 6 states. [2018-04-12 04:08:26,309 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:08:26,309 INFO L93 Difference]: Finished difference Result 71 states and 75 transitions. [2018-04-12 04:08:26,309 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 04:08:26,309 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26 [2018-04-12 04:08:26,310 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:08:26,310 INFO L225 Difference]: With dead ends: 71 [2018-04-12 04:08:26,311 INFO L226 Difference]: Without dead ends: 70 [2018-04-12 04:08:26,311 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-12 04:08:26,311 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-04-12 04:08:26,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 70. [2018-04-12 04:08:26,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-04-12 04:08:26,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 74 transitions. [2018-04-12 04:08:26,319 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 74 transitions. Word has length 26 [2018-04-12 04:08:26,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:08:26,320 INFO L459 AbstractCegarLoop]: Abstraction has 70 states and 74 transitions. [2018-04-12 04:08:26,320 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 04:08:26,320 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 74 transitions. [2018-04-12 04:08:26,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-04-12 04:08:26,321 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:26,321 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:26,321 INFO L408 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:26,321 INFO L82 PathProgramCache]: Analyzing trace with hash 1763386180, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:26,341 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:26,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:26,356 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:26,374 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 04:08:26,375 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:08:26,400 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:08:26,401 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 04:08:26,553 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:26,553 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:26,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:26,707 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 04:08:26,708 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6, 6] imperfect sequences [] total 11 [2018-04-12 04:08:26,708 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-12 04:08:26,708 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-12 04:08:26,708 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=104, Unknown=0, NotChecked=0, Total=132 [2018-04-12 04:08:26,709 INFO L87 Difference]: Start difference. First operand 70 states and 74 transitions. Second operand 12 states. [2018-04-12 04:08:26,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:08:26,894 INFO L93 Difference]: Finished difference Result 79 states and 83 transitions. [2018-04-12 04:08:26,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 04:08:26,894 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 26 [2018-04-12 04:08:26,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:08:26,895 INFO L225 Difference]: With dead ends: 79 [2018-04-12 04:08:26,895 INFO L226 Difference]: Without dead ends: 78 [2018-04-12 04:08:26,896 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 55 GetRequests, 41 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=58, Invalid=182, Unknown=0, NotChecked=0, Total=240 [2018-04-12 04:08:26,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states. [2018-04-12 04:08:26,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 71. [2018-04-12 04:08:26,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-04-12 04:08:26,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 75 transitions. [2018-04-12 04:08:26,903 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 75 transitions. Word has length 26 [2018-04-12 04:08:26,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:08:26,903 INFO L459 AbstractCegarLoop]: Abstraction has 71 states and 75 transitions. [2018-04-12 04:08:26,903 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-12 04:08:26,904 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 75 transitions. [2018-04-12 04:08:26,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-04-12 04:08:26,904 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:26,904 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:26,904 INFO L408 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:26,905 INFO L82 PathProgramCache]: Analyzing trace with hash -1552158473, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:26,913 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:26,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:26,932 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:26,949 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:26,949 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:26,989 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:27,010 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:08:27,010 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 7 [2018-04-12 04:08:27,010 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 04:08:27,010 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 04:08:27,010 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-04-12 04:08:27,011 INFO L87 Difference]: Start difference. First operand 71 states and 75 transitions. Second operand 8 states. [2018-04-12 04:08:27,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:08:27,145 INFO L93 Difference]: Finished difference Result 105 states and 112 transitions. [2018-04-12 04:08:27,145 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 04:08:27,145 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2018-04-12 04:08:27,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:08:27,147 INFO L225 Difference]: With dead ends: 105 [2018-04-12 04:08:27,147 INFO L226 Difference]: Without dead ends: 104 [2018-04-12 04:08:27,147 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 61 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-04-12 04:08:27,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-04-12 04:08:27,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 88. [2018-04-12 04:08:27,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-04-12 04:08:27,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 95 transitions. [2018-04-12 04:08:27,155 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 95 transitions. Word has length 34 [2018-04-12 04:08:27,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:08:27,156 INFO L459 AbstractCegarLoop]: Abstraction has 88 states and 95 transitions. [2018-04-12 04:08:27,156 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 04:08:27,156 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 95 transitions. [2018-04-12 04:08:27,157 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-12 04:08:27,157 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:27,157 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:27,157 INFO L408 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:27,157 INFO L82 PathProgramCache]: Analyzing trace with hash -872272174, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:27,164 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:27,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:27,177 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:27,180 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 04:08:27,180 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:08:27,187 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:08:27,188 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 04:08:27,270 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:27,270 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:27,384 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:27,409 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:08:27,409 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 15 [2018-04-12 04:08:27,410 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-12 04:08:27,410 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-12 04:08:27,410 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=196, Unknown=0, NotChecked=0, Total=240 [2018-04-12 04:08:27,410 INFO L87 Difference]: Start difference. First operand 88 states and 95 transitions. Second operand 16 states. [2018-04-12 04:08:27,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:08:27,687 INFO L93 Difference]: Finished difference Result 102 states and 109 transitions. [2018-04-12 04:08:27,687 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-12 04:08:27,687 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 35 [2018-04-12 04:08:27,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:08:27,688 INFO L225 Difference]: With dead ends: 102 [2018-04-12 04:08:27,688 INFO L226 Difference]: Without dead ends: 101 [2018-04-12 04:08:27,689 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 77 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=128, Invalid=424, Unknown=0, NotChecked=0, Total=552 [2018-04-12 04:08:27,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-04-12 04:08:27,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 89. [2018-04-12 04:08:27,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-04-12 04:08:27,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 95 transitions. [2018-04-12 04:08:27,696 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 95 transitions. Word has length 35 [2018-04-12 04:08:27,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:08:27,697 INFO L459 AbstractCegarLoop]: Abstraction has 89 states and 95 transitions. [2018-04-12 04:08:27,697 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-12 04:08:27,697 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 95 transitions. [2018-04-12 04:08:27,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-04-12 04:08:27,699 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:27,699 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:27,699 INFO L408 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:27,699 INFO L82 PathProgramCache]: Analyzing trace with hash -1746619775, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:27,711 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:27,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:27,724 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:27,739 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:27,740 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:27,770 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:27,790 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 04:08:27,790 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [] total 8 [2018-04-12 04:08:27,791 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 04:08:27,791 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 04:08:27,791 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-04-12 04:08:27,791 INFO L87 Difference]: Start difference. First operand 89 states and 95 transitions. Second operand 8 states. [2018-04-12 04:08:27,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:08:27,837 INFO L93 Difference]: Finished difference Result 165 states and 177 transitions. [2018-04-12 04:08:27,837 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 04:08:27,837 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 37 [2018-04-12 04:08:27,838 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:08:27,838 INFO L225 Difference]: With dead ends: 165 [2018-04-12 04:08:27,838 INFO L226 Difference]: Without dead ends: 89 [2018-04-12 04:08:27,839 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 66 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-04-12 04:08:27,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-04-12 04:08:27,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 89. [2018-04-12 04:08:27,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-04-12 04:08:27,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 94 transitions. [2018-04-12 04:08:27,848 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 94 transitions. Word has length 37 [2018-04-12 04:08:27,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:08:27,848 INFO L459 AbstractCegarLoop]: Abstraction has 89 states and 94 transitions. [2018-04-12 04:08:27,848 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 04:08:27,848 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 94 transitions. [2018-04-12 04:08:27,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-04-12 04:08:27,850 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:27,850 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:27,850 INFO L408 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:27,850 INFO L82 PathProgramCache]: Analyzing trace with hash 356680243, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:27,857 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:27,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:27,875 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:27,911 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:27,912 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:27,983 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:28,003 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:08:28,003 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 12 [2018-04-12 04:08:28,004 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-12 04:08:28,004 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-12 04:08:28,004 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=88, Unknown=0, NotChecked=0, Total=132 [2018-04-12 04:08:28,004 INFO L87 Difference]: Start difference. First operand 89 states and 94 transitions. Second operand 12 states. [2018-04-12 04:08:28,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:08:28,125 INFO L93 Difference]: Finished difference Result 171 states and 181 transitions. [2018-04-12 04:08:28,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-12 04:08:28,125 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 46 [2018-04-12 04:08:28,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:08:28,126 INFO L225 Difference]: With dead ends: 171 [2018-04-12 04:08:28,126 INFO L226 Difference]: Without dead ends: 92 [2018-04-12 04:08:28,127 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 80 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=120, Invalid=222, Unknown=0, NotChecked=0, Total=342 [2018-04-12 04:08:28,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2018-04-12 04:08:28,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 89. [2018-04-12 04:08:28,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-04-12 04:08:28,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 92 transitions. [2018-04-12 04:08:28,135 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 92 transitions. Word has length 46 [2018-04-12 04:08:28,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:08:28,135 INFO L459 AbstractCegarLoop]: Abstraction has 89 states and 92 transitions. [2018-04-12 04:08:28,136 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-12 04:08:28,136 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 92 transitions. [2018-04-12 04:08:28,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-04-12 04:08:28,137 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:28,137 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:28,137 INFO L408 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:28,138 INFO L82 PathProgramCache]: Analyzing trace with hash -1816571721, now seen corresponding path program 2 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:28,145 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:28,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:28,161 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:28,191 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:28,191 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:28,272 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:28,292 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:08:28,292 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 15 [2018-04-12 04:08:28,293 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-12 04:08:28,293 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-12 04:08:28,293 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-04-12 04:08:28,293 INFO L87 Difference]: Start difference. First operand 89 states and 92 transitions. Second operand 16 states. [2018-04-12 04:08:28,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:08:28,598 INFO L93 Difference]: Finished difference Result 146 states and 156 transitions. [2018-04-12 04:08:28,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-12 04:08:28,599 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 52 [2018-04-12 04:08:28,599 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:08:28,600 INFO L225 Difference]: With dead ends: 146 [2018-04-12 04:08:28,600 INFO L226 Difference]: Without dead ends: 145 [2018-04-12 04:08:28,600 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=206, Invalid=550, Unknown=0, NotChecked=0, Total=756 [2018-04-12 04:08:28,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-04-12 04:08:28,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 124. [2018-04-12 04:08:28,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-04-12 04:08:28,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 134 transitions. [2018-04-12 04:08:28,607 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 134 transitions. Word has length 52 [2018-04-12 04:08:28,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:08:28,607 INFO L459 AbstractCegarLoop]: Abstraction has 124 states and 134 transitions. [2018-04-12 04:08:28,607 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-12 04:08:28,607 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 134 transitions. [2018-04-12 04:08:28,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-04-12 04:08:28,608 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:28,608 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:28,608 INFO L408 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:28,608 INFO L82 PathProgramCache]: Analyzing trace with hash -479148270, now seen corresponding path program 2 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:28,617 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:28,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:28,636 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:28,639 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 04:08:28,640 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:08:28,649 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:08:28,650 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 04:08:28,750 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:28,750 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:28,916 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:28,946 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:08:28,946 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 23 [2018-04-12 04:08:28,947 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-12 04:08:28,947 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-12 04:08:28,947 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=464, Unknown=0, NotChecked=0, Total=552 [2018-04-12 04:08:28,947 INFO L87 Difference]: Start difference. First operand 124 states and 134 transitions. Second operand 24 states. [2018-04-12 04:08:29,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:08:29,652 INFO L93 Difference]: Finished difference Result 141 states and 151 transitions. [2018-04-12 04:08:29,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-12 04:08:29,652 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 53 [2018-04-12 04:08:29,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:08:29,654 INFO L225 Difference]: With dead ends: 141 [2018-04-12 04:08:29,654 INFO L226 Difference]: Without dead ends: 140 [2018-04-12 04:08:29,655 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=346, Invalid=1214, Unknown=0, NotChecked=0, Total=1560 [2018-04-12 04:08:29,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-04-12 04:08:29,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 125. [2018-04-12 04:08:29,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-12 04:08:29,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 132 transitions. [2018-04-12 04:08:29,662 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 132 transitions. Word has length 53 [2018-04-12 04:08:29,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:08:29,662 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 132 transitions. [2018-04-12 04:08:29,662 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-12 04:08:29,662 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 132 transitions. [2018-04-12 04:08:29,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-04-12 04:08:29,663 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:29,664 INFO L355 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:29,664 INFO L408 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:29,664 INFO L82 PathProgramCache]: Analyzing trace with hash 330187251, now seen corresponding path program 2 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:29,674 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:29,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:29,691 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:29,744 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 33 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:29,744 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:29,878 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 4 proven. 33 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:29,898 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:08:29,898 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-04-12 04:08:29,899 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-12 04:08:29,899 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-12 04:08:29,899 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=112, Invalid=268, Unknown=0, NotChecked=0, Total=380 [2018-04-12 04:08:29,899 INFO L87 Difference]: Start difference. First operand 125 states and 132 transitions. Second operand 20 states. [2018-04-12 04:08:30,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:08:30,179 INFO L93 Difference]: Finished difference Result 243 states and 257 transitions. [2018-04-12 04:08:30,180 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-04-12 04:08:30,180 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 64 [2018-04-12 04:08:30,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:08:30,180 INFO L225 Difference]: With dead ends: 243 [2018-04-12 04:08:30,180 INFO L226 Difference]: Without dead ends: 128 [2018-04-12 04:08:30,182 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 142 GetRequests, 108 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=386, Invalid=804, Unknown=0, NotChecked=0, Total=1190 [2018-04-12 04:08:30,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-04-12 04:08:30,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 125. [2018-04-12 04:08:30,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-04-12 04:08:30,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 128 transitions. [2018-04-12 04:08:30,187 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 128 transitions. Word has length 64 [2018-04-12 04:08:30,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:08:30,188 INFO L459 AbstractCegarLoop]: Abstraction has 125 states and 128 transitions. [2018-04-12 04:08:30,188 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-12 04:08:30,188 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 128 transitions. [2018-04-12 04:08:30,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-04-12 04:08:30,189 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:30,190 INFO L355 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:30,190 INFO L408 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:30,190 INFO L82 PathProgramCache]: Analyzing trace with hash -1545682889, now seen corresponding path program 3 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:30,204 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:30,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:30,233 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:30,354 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:30,354 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:30,610 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:30,629 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:08:30,630 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 31 [2018-04-12 04:08:30,630 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-04-12 04:08:30,630 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-04-12 04:08:30,631 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=174, Invalid=818, Unknown=0, NotChecked=0, Total=992 [2018-04-12 04:08:30,631 INFO L87 Difference]: Start difference. First operand 125 states and 128 transitions. Second operand 32 states. [2018-04-12 04:08:31,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:08:31,635 INFO L93 Difference]: Finished difference Result 234 states and 252 transitions. [2018-04-12 04:08:31,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-04-12 04:08:31,636 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 88 [2018-04-12 04:08:31,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:08:31,637 INFO L225 Difference]: With dead ends: 234 [2018-04-12 04:08:31,637 INFO L226 Difference]: Without dead ends: 233 [2018-04-12 04:08:31,638 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 145 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 434 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=862, Invalid=2678, Unknown=0, NotChecked=0, Total=3540 [2018-04-12 04:08:31,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-04-12 04:08:31,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 196. [2018-04-12 04:08:31,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2018-04-12 04:08:31,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 214 transitions. [2018-04-12 04:08:31,646 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 214 transitions. Word has length 88 [2018-04-12 04:08:31,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:08:31,646 INFO L459 AbstractCegarLoop]: Abstraction has 196 states and 214 transitions. [2018-04-12 04:08:31,646 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-04-12 04:08:31,646 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 214 transitions. [2018-04-12 04:08:31,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-04-12 04:08:31,647 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:31,647 INFO L355 BasicCegarLoop]: trace histogram [8, 8, 8, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:31,647 INFO L408 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:31,648 INFO L82 PathProgramCache]: Analyzing trace with hash -671529070, now seen corresponding path program 3 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:31,659 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:31,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:31,685 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:31,690 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 04:08:31,690 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:08:31,697 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:08:31,698 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 04:08:31,930 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 217 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:31,930 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:32,379 INFO L134 CoverageAnalysis]: Checked inductivity of 217 backedges. 0 proven. 217 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:32,398 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:08:32,399 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 39 [2018-04-12 04:08:32,399 INFO L442 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-04-12 04:08:32,399 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-04-12 04:08:32,400 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=224, Invalid=1336, Unknown=0, NotChecked=0, Total=1560 [2018-04-12 04:08:32,400 INFO L87 Difference]: Start difference. First operand 196 states and 214 transitions. Second operand 40 states. [2018-04-12 04:08:34,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:08:34,242 INFO L93 Difference]: Finished difference Result 225 states and 243 transitions. [2018-04-12 04:08:34,242 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-04-12 04:08:34,242 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 89 [2018-04-12 04:08:34,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:08:34,244 INFO L225 Difference]: With dead ends: 225 [2018-04-12 04:08:34,244 INFO L226 Difference]: Without dead ends: 224 [2018-04-12 04:08:34,246 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 209 GetRequests, 139 SyntacticMatches, 0 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 888 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=1118, Invalid=3994, Unknown=0, NotChecked=0, Total=5112 [2018-04-12 04:08:34,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-04-12 04:08:34,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 197. [2018-04-12 04:08:34,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-04-12 04:08:34,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 208 transitions. [2018-04-12 04:08:34,257 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 208 transitions. Word has length 89 [2018-04-12 04:08:34,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:08:34,257 INFO L459 AbstractCegarLoop]: Abstraction has 197 states and 208 transitions. [2018-04-12 04:08:34,258 INFO L460 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-04-12 04:08:34,258 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 208 transitions. [2018-04-12 04:08:34,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-04-12 04:08:34,259 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:34,259 INFO L355 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 7, 7, 7, 7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:34,259 INFO L408 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:34,259 INFO L82 PathProgramCache]: Analyzing trace with hash 631796083, now seen corresponding path program 3 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:34,268 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:34,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:34,295 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:34,448 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 4 proven. 203 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:34,448 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:34,801 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 4 proven. 203 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:34,833 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:08:34,833 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 36 [2018-04-12 04:08:34,834 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-12 04:08:34,834 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-12 04:08:34,834 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=344, Invalid=916, Unknown=0, NotChecked=0, Total=1260 [2018-04-12 04:08:34,835 INFO L87 Difference]: Start difference. First operand 197 states and 208 transitions. Second operand 36 states. [2018-04-12 04:08:35,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:08:35,617 INFO L93 Difference]: Finished difference Result 387 states and 409 transitions. [2018-04-12 04:08:35,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-12 04:08:35,617 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 100 [2018-04-12 04:08:35,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:08:35,618 INFO L225 Difference]: With dead ends: 387 [2018-04-12 04:08:35,618 INFO L226 Difference]: Without dead ends: 200 [2018-04-12 04:08:35,620 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 230 GetRequests, 164 SyntacticMatches, 1 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1145 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1398, Invalid=3024, Unknown=0, NotChecked=0, Total=4422 [2018-04-12 04:08:35,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2018-04-12 04:08:35,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 197. [2018-04-12 04:08:35,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-04-12 04:08:35,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 200 transitions. [2018-04-12 04:08:35,628 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 200 transitions. Word has length 100 [2018-04-12 04:08:35,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:08:35,628 INFO L459 AbstractCegarLoop]: Abstraction has 197 states and 200 transitions. [2018-04-12 04:08:35,628 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-12 04:08:35,628 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 200 transitions. [2018-04-12 04:08:35,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 161 [2018-04-12 04:08:35,629 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:35,630 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 15, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:35,630 INFO L408 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:35,630 INFO L82 PathProgramCache]: Analyzing trace with hash 6577975, now seen corresponding path program 4 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:35,643 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:35,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:35,678 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:36,111 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:36,111 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:37,099 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:37,119 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:08:37,120 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 63 [2018-04-12 04:08:37,120 INFO L442 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-04-12 04:08:37,120 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-04-12 04:08:37,121 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=606, Invalid=3426, Unknown=0, NotChecked=0, Total=4032 [2018-04-12 04:08:37,121 INFO L87 Difference]: Start difference. First operand 197 states and 200 transitions. Second operand 64 states. [2018-04-12 04:08:41,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:08:41,894 INFO L93 Difference]: Finished difference Result 410 states and 444 transitions. [2018-04-12 04:08:41,895 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-04-12 04:08:41,895 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 160 [2018-04-12 04:08:41,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:08:41,897 INFO L225 Difference]: With dead ends: 410 [2018-04-12 04:08:41,897 INFO L226 Difference]: Without dead ends: 409 [2018-04-12 04:08:41,901 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 379 GetRequests, 257 SyntacticMatches, 0 SemanticMatches, 122 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2010 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=3518, Invalid=11734, Unknown=0, NotChecked=0, Total=15252 [2018-04-12 04:08:41,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 409 states. [2018-04-12 04:08:41,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 409 to 340. [2018-04-12 04:08:41,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 340 states. [2018-04-12 04:08:41,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 374 transitions. [2018-04-12 04:08:41,914 INFO L78 Accepts]: Start accepts. Automaton has 340 states and 374 transitions. Word has length 160 [2018-04-12 04:08:41,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:08:41,914 INFO L459 AbstractCegarLoop]: Abstraction has 340 states and 374 transitions. [2018-04-12 04:08:41,914 INFO L460 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-04-12 04:08:41,915 INFO L276 IsEmpty]: Start isEmpty. Operand 340 states and 374 transitions. [2018-04-12 04:08:41,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 162 [2018-04-12 04:08:41,916 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:41,916 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 16, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:41,916 INFO L408 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:41,916 INFO L82 PathProgramCache]: Analyzing trace with hash 203917458, now seen corresponding path program 4 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:41,927 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:41,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:41,965 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:41,973 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 04:08:41,973 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:08:41,994 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:08:41,994 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 04:08:42,668 INFO L134 CoverageAnalysis]: Checked inductivity of 1005 backedges. 0 proven. 1005 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:42,668 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:43,793 INFO L134 CoverageAnalysis]: Checked inductivity of 1005 backedges. 0 proven. 1005 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:43,813 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:08:43,813 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36] total 71 [2018-04-12 04:08:43,860 INFO L442 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-04-12 04:08:43,861 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-04-12 04:08:43,862 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=688, Invalid=4424, Unknown=0, NotChecked=0, Total=5112 [2018-04-12 04:08:43,862 INFO L87 Difference]: Start difference. First operand 340 states and 374 transitions. Second operand 72 states. [2018-04-12 04:08:50,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:08:50,916 INFO L93 Difference]: Finished difference Result 393 states and 427 transitions. [2018-04-12 04:08:50,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2018-04-12 04:08:50,916 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 161 [2018-04-12 04:08:50,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:08:50,918 INFO L225 Difference]: With dead ends: 393 [2018-04-12 04:08:50,918 INFO L226 Difference]: Without dead ends: 392 [2018-04-12 04:08:50,921 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 385 GetRequests, 251 SyntacticMatches, 0 SemanticMatches, 134 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3440 ImplicationChecksByTransitivity, 7.1s TimeCoverageRelationStatistics Valid=4006, Invalid=14354, Unknown=0, NotChecked=0, Total=18360 [2018-04-12 04:08:50,922 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2018-04-12 04:08:50,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 341. [2018-04-12 04:08:50,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 341 states. [2018-04-12 04:08:50,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 341 states to 341 states and 360 transitions. [2018-04-12 04:08:50,934 INFO L78 Accepts]: Start accepts. Automaton has 341 states and 360 transitions. Word has length 161 [2018-04-12 04:08:50,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:08:50,934 INFO L459 AbstractCegarLoop]: Abstraction has 341 states and 360 transitions. [2018-04-12 04:08:50,934 INFO L460 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-04-12 04:08:50,934 INFO L276 IsEmpty]: Start isEmpty. Operand 341 states and 360 transitions. [2018-04-12 04:08:50,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2018-04-12 04:08:50,936 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:50,936 INFO L355 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 15, 15, 15, 15, 15, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:50,936 INFO L408 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:50,936 INFO L82 PathProgramCache]: Analyzing trace with hash 1136103539, now seen corresponding path program 4 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:50,949 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:50,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:50,989 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:51,389 INFO L134 CoverageAnalysis]: Checked inductivity of 979 backedges. 4 proven. 975 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:51,390 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:52,083 INFO L134 CoverageAnalysis]: Checked inductivity of 979 backedges. 4 proven. 975 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:52,102 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:08:52,103 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35] total 68 [2018-04-12 04:08:52,103 INFO L442 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-04-12 04:08:52,104 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-04-12 04:08:52,104 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1192, Invalid=3364, Unknown=0, NotChecked=0, Total=4556 [2018-04-12 04:08:52,105 INFO L87 Difference]: Start difference. First operand 341 states and 360 transitions. Second operand 68 states. [2018-04-12 04:08:52,628 WARN L148 SmtUtils]: Spent 104ms on a formula simplification that was a NOOP. DAG size: 9 [2018-04-12 04:08:54,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:08:54,987 INFO L93 Difference]: Finished difference Result 675 states and 713 transitions. [2018-04-12 04:08:54,988 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 67 states. [2018-04-12 04:08:54,988 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 172 [2018-04-12 04:08:54,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:08:54,989 INFO L225 Difference]: With dead ends: 675 [2018-04-12 04:08:54,989 INFO L226 Difference]: Without dead ends: 344 [2018-04-12 04:08:54,991 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 406 GetRequests, 276 SyntacticMatches, 1 SemanticMatches, 129 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4729 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=5342, Invalid=11688, Unknown=0, NotChecked=0, Total=17030 [2018-04-12 04:08:54,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 344 states. [2018-04-12 04:08:54,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 344 to 341. [2018-04-12 04:08:55,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 341 states. [2018-04-12 04:08:55,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 341 states to 341 states and 344 transitions. [2018-04-12 04:08:55,001 INFO L78 Accepts]: Start accepts. Automaton has 341 states and 344 transitions. Word has length 172 [2018-04-12 04:08:55,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:08:55,001 INFO L459 AbstractCegarLoop]: Abstraction has 341 states and 344 transitions. [2018-04-12 04:08:55,001 INFO L460 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-04-12 04:08:55,001 INFO L276 IsEmpty]: Start isEmpty. Operand 341 states and 344 transitions. [2018-04-12 04:08:55,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 305 [2018-04-12 04:08:55,003 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:08:55,003 INFO L355 BasicCegarLoop]: trace histogram [32, 32, 31, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:08:55,003 INFO L408 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:08:55,003 INFO L82 PathProgramCache]: Analyzing trace with hash 517643575, now seen corresponding path program 5 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:08:55,009 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:08:55,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:08:55,065 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:08:56,343 INFO L134 CoverageAnalysis]: Checked inductivity of 4278 backedges. 0 proven. 4278 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:56,343 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:08:59,819 INFO L134 CoverageAnalysis]: Checked inductivity of 4278 backedges. 0 proven. 4278 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:08:59,840 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:08:59,841 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [64, 64] total 127 [2018-04-12 04:08:59,883 INFO L442 AbstractCegarLoop]: Interpolant automaton has 128 states [2018-04-12 04:08:59,884 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 128 interpolants. [2018-04-12 04:08:59,885 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1277, Invalid=14979, Unknown=0, NotChecked=0, Total=16256 [2018-04-12 04:08:59,886 INFO L87 Difference]: Start difference. First operand 341 states and 344 transitions. Second operand 128 states. [2018-04-12 04:09:05,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:09:05,124 INFO L93 Difference]: Finished difference Result 359 states and 363 transitions. [2018-04-12 04:09:05,124 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-04-12 04:09:05,125 INFO L78 Accepts]: Start accepts. Automaton has 128 states. Word has length 304 [2018-04-12 04:09:05,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:09:05,127 INFO L225 Difference]: With dead ends: 359 [2018-04-12 04:09:05,127 INFO L226 Difference]: Without dead ends: 358 [2018-04-12 04:09:05,130 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 669 GetRequests, 481 SyntacticMatches, 0 SemanticMatches, 188 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3844 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=3540, Invalid=32370, Unknown=0, NotChecked=0, Total=35910 [2018-04-12 04:09:05,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 358 states. [2018-04-12 04:09:05,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 358 to 349. [2018-04-12 04:09:05,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 349 states. [2018-04-12 04:09:05,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 349 states to 349 states and 353 transitions. [2018-04-12 04:09:05,147 INFO L78 Accepts]: Start accepts. Automaton has 349 states and 353 transitions. Word has length 304 [2018-04-12 04:09:05,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:09:05,147 INFO L459 AbstractCegarLoop]: Abstraction has 349 states and 353 transitions. [2018-04-12 04:09:05,148 INFO L460 AbstractCegarLoop]: Interpolant automaton has 128 states. [2018-04-12 04:09:05,148 INFO L276 IsEmpty]: Start isEmpty. Operand 349 states and 353 transitions. [2018-04-12 04:09:05,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 306 [2018-04-12 04:09:05,150 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:09:05,150 INFO L355 BasicCegarLoop]: trace histogram [32, 32, 32, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:09:05,150 INFO L408 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:09:05,150 INFO L82 PathProgramCache]: Analyzing trace with hash -1132918126, now seen corresponding path program 5 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:09:05,159 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:09:05,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:09:05,234 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:09:05,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 04:09:05,237 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:09:05,241 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:09:05,241 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 04:09:07,498 INFO L134 CoverageAnalysis]: Checked inductivity of 4309 backedges. 0 proven. 4309 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:09:07,499 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:09:10,938 INFO L134 CoverageAnalysis]: Checked inductivity of 4309 backedges. 0 proven. 4309 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:09:10,958 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:09:10,958 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [68, 68] total 135 [2018-04-12 04:09:10,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 136 states [2018-04-12 04:09:10,959 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 136 interpolants. [2018-04-12 04:09:10,960 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1423, Invalid=16937, Unknown=0, NotChecked=0, Total=18360 [2018-04-12 04:09:10,960 INFO L87 Difference]: Start difference. First operand 349 states and 353 transitions. Second operand 136 states. [2018-04-12 04:09:18,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:09:18,866 INFO L93 Difference]: Finished difference Result 358 states and 362 transitions. [2018-04-12 04:09:18,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 71 states. [2018-04-12 04:09:18,867 INFO L78 Accepts]: Start accepts. Automaton has 136 states. Word has length 305 [2018-04-12 04:09:18,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:09:18,868 INFO L225 Difference]: With dead ends: 358 [2018-04-12 04:09:18,868 INFO L226 Difference]: Without dead ends: 357 [2018-04-12 04:09:18,871 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 676 GetRequests, 475 SyntacticMatches, 0 SemanticMatches, 201 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8641 ImplicationChecksByTransitivity, 8.8s TimeCoverageRelationStatistics Valid=4131, Invalid=36875, Unknown=0, NotChecked=0, Total=41006 [2018-04-12 04:09:18,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2018-04-12 04:09:18,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 350. [2018-04-12 04:09:18,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 350 states. [2018-04-12 04:09:18,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 350 states to 350 states and 354 transitions. [2018-04-12 04:09:18,886 INFO L78 Accepts]: Start accepts. Automaton has 350 states and 354 transitions. Word has length 305 [2018-04-12 04:09:18,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:09:18,887 INFO L459 AbstractCegarLoop]: Abstraction has 350 states and 354 transitions. [2018-04-12 04:09:18,887 INFO L460 AbstractCegarLoop]: Interpolant automaton has 136 states. [2018-04-12 04:09:18,887 INFO L276 IsEmpty]: Start isEmpty. Operand 350 states and 354 transitions. [2018-04-12 04:09:18,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 314 [2018-04-12 04:09:18,889 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:09:18,890 INFO L355 BasicCegarLoop]: trace histogram [33, 33, 32, 32, 32, 32, 32, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:09:18,890 INFO L408 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:09:18,890 INFO L82 PathProgramCache]: Analyzing trace with hash 920431173, now seen corresponding path program 6 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:09:18,899 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:09:18,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:09:18,952 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:09:20,377 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 4560 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:09:20,377 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:09:22,713 INFO L134 CoverageAnalysis]: Checked inductivity of 4560 backedges. 4560 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:09:22,732 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 04:09:22,733 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [69, 69] imperfect sequences [] total 134 [2018-04-12 04:09:22,733 INFO L442 AbstractCegarLoop]: Interpolant automaton has 134 states [2018-04-12 04:09:22,734 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 134 interpolants. [2018-04-12 04:09:22,734 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3467, Invalid=14355, Unknown=0, NotChecked=0, Total=17822 [2018-04-12 04:09:22,734 INFO L87 Difference]: Start difference. First operand 350 states and 354 transitions. Second operand 134 states. [2018-04-12 04:09:25,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:09:25,851 INFO L93 Difference]: Finished difference Result 683 states and 692 transitions. [2018-04-12 04:09:25,852 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2018-04-12 04:09:25,852 INFO L78 Accepts]: Start accepts. Automaton has 134 states. Word has length 313 [2018-04-12 04:09:25,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:09:25,853 INFO L225 Difference]: With dead ends: 683 [2018-04-12 04:09:25,853 INFO L226 Difference]: Without dead ends: 349 [2018-04-12 04:09:25,855 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 692 GetRequests, 491 SyntacticMatches, 2 SemanticMatches, 199 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9379 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=10362, Invalid=29838, Unknown=0, NotChecked=0, Total=40200 [2018-04-12 04:09:25,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 349 states. [2018-04-12 04:09:25,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 349 to 346. [2018-04-12 04:09:25,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 346 states. [2018-04-12 04:09:25,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 346 states to 346 states and 349 transitions. [2018-04-12 04:09:25,866 INFO L78 Accepts]: Start accepts. Automaton has 346 states and 349 transitions. Word has length 313 [2018-04-12 04:09:25,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:09:25,866 INFO L459 AbstractCegarLoop]: Abstraction has 346 states and 349 transitions. [2018-04-12 04:09:25,866 INFO L460 AbstractCegarLoop]: Interpolant automaton has 134 states. [2018-04-12 04:09:25,866 INFO L276 IsEmpty]: Start isEmpty. Operand 346 states and 349 transitions. [2018-04-12 04:09:25,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 317 [2018-04-12 04:09:25,868 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:09:25,868 INFO L355 BasicCegarLoop]: trace histogram [32, 31, 31, 31, 31, 31, 31, 31, 31, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:09:25,868 INFO L408 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:09:25,868 INFO L82 PathProgramCache]: Analyzing trace with hash 482397811, now seen corresponding path program 5 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:09:25,874 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:09:25,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:09:25,936 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:09:27,281 INFO L134 CoverageAnalysis]: Checked inductivity of 4251 backedges. 4 proven. 4247 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:09:27,282 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:09:27,562 WARN L148 SmtUtils]: Spent 228ms on a formula simplification that was a NOOP. DAG size: 165 [2018-04-12 04:09:27,790 WARN L148 SmtUtils]: Spent 223ms on a formula simplification that was a NOOP. DAG size: 165 [2018-04-12 04:09:28,957 INFO L134 CoverageAnalysis]: Checked inductivity of 4251 backedges. 4 proven. 4247 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 04:09:28,977 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:09:28,977 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [67, 67] total 131 [2018-04-12 04:09:28,978 INFO L442 AbstractCegarLoop]: Interpolant automaton has 131 states [2018-04-12 04:09:28,978 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 131 interpolants. [2018-04-12 04:09:28,979 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3396, Invalid=13634, Unknown=0, NotChecked=0, Total=17030 [2018-04-12 04:09:28,979 INFO L87 Difference]: Start difference. First operand 346 states and 349 transitions. Second operand 131 states. [2018-04-12 04:09:31,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:09:31,220 INFO L93 Difference]: Finished difference Result 679 states and 685 transitions. [2018-04-12 04:09:31,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 68 states. [2018-04-12 04:09:31,221 INFO L78 Accepts]: Start accepts. Automaton has 131 states. Word has length 316 [2018-04-12 04:09:31,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:09:31,222 INFO L225 Difference]: With dead ends: 679 [2018-04-12 04:09:31,222 INFO L226 Difference]: Without dead ends: 346 [2018-04-12 04:09:31,224 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 694 GetRequests, 500 SyntacticMatches, 2 SemanticMatches, 192 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14760 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=9636, Invalid=27806, Unknown=0, NotChecked=0, Total=37442 [2018-04-12 04:09:31,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 346 states. [2018-04-12 04:09:31,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 346 to 346. [2018-04-12 04:09:31,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 346 states. [2018-04-12 04:09:31,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 346 states to 346 states and 348 transitions. [2018-04-12 04:09:31,240 INFO L78 Accepts]: Start accepts. Automaton has 346 states and 348 transitions. Word has length 316 [2018-04-12 04:09:31,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:09:31,240 INFO L459 AbstractCegarLoop]: Abstraction has 346 states and 348 transitions. [2018-04-12 04:09:31,240 INFO L460 AbstractCegarLoop]: Interpolant automaton has 131 states. [2018-04-12 04:09:31,240 INFO L276 IsEmpty]: Start isEmpty. Operand 346 states and 348 transitions. [2018-04-12 04:09:31,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 326 [2018-04-12 04:09:31,243 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:09:31,243 INFO L355 BasicCegarLoop]: trace histogram [33, 32, 32, 32, 32, 32, 32, 32, 32, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:09:31,243 INFO L408 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:09:31,243 INFO L82 PathProgramCache]: Analyzing trace with hash -197020031, now seen corresponding path program 6 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:09:31,253 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:09:31,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:09:31,318 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:09:31,439 INFO L134 CoverageAnalysis]: Checked inductivity of 4532 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 4528 trivial. 0 not checked. [2018-04-12 04:09:31,439 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:09:31,500 INFO L134 CoverageAnalysis]: Checked inductivity of 4532 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 4528 trivial. 0 not checked. [2018-04-12 04:09:31,520 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 04:09:31,520 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [] total 8 [2018-04-12 04:09:31,521 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 04:09:31,521 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 04:09:31,521 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2018-04-12 04:09:31,521 INFO L87 Difference]: Start difference. First operand 346 states and 348 transitions. Second operand 9 states. [2018-04-12 04:09:31,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:09:31,582 INFO L93 Difference]: Finished difference Result 362 states and 364 transitions. [2018-04-12 04:09:31,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 04:09:31,582 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 325 [2018-04-12 04:09:31,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:09:31,585 INFO L225 Difference]: With dead ends: 362 [2018-04-12 04:09:31,585 INFO L226 Difference]: Without dead ends: 361 [2018-04-12 04:09:31,585 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 652 GetRequests, 641 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=50, Invalid=82, Unknown=0, NotChecked=0, Total=132 [2018-04-12 04:09:31,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 361 states. [2018-04-12 04:09:31,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 361 to 343. [2018-04-12 04:09:31,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343 states. [2018-04-12 04:09:31,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 345 transitions. [2018-04-12 04:09:31,602 INFO L78 Accepts]: Start accepts. Automaton has 343 states and 345 transitions. Word has length 325 [2018-04-12 04:09:31,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:09:31,602 INFO L459 AbstractCegarLoop]: Abstraction has 343 states and 345 transitions. [2018-04-12 04:09:31,602 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 04:09:31,602 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 345 transitions. [2018-04-12 04:09:31,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 333 [2018-04-12 04:09:31,604 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:09:31,604 INFO L355 BasicCegarLoop]: trace histogram [33, 32, 32, 32, 32, 32, 32, 32, 32, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:09:31,604 INFO L408 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:09:31,604 INFO L82 PathProgramCache]: Analyzing trace with hash 312742184, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:09:31,614 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:09:31,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:09:31,686 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:09:31,767 INFO L134 CoverageAnalysis]: Checked inductivity of 4530 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4528 trivial. 0 not checked. [2018-04-12 04:09:31,767 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:09:31,848 INFO L134 CoverageAnalysis]: Checked inductivity of 4530 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 4528 trivial. 0 not checked. [2018-04-12 04:09:31,882 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:09:31,882 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 8 [2018-04-12 04:09:31,883 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 04:09:31,883 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 04:09:31,883 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2018-04-12 04:09:31,883 INFO L87 Difference]: Start difference. First operand 343 states and 345 transitions. Second operand 8 states. [2018-04-12 04:09:31,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:09:31,966 INFO L93 Difference]: Finished difference Result 402 states and 409 transitions. [2018-04-12 04:09:31,966 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 04:09:31,966 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 332 [2018-04-12 04:09:31,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:09:31,968 INFO L225 Difference]: With dead ends: 402 [2018-04-12 04:09:31,969 INFO L226 Difference]: Without dead ends: 382 [2018-04-12 04:09:31,969 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 667 GetRequests, 657 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2018-04-12 04:09:31,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 382 states. [2018-04-12 04:09:31,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 382 to 365. [2018-04-12 04:09:31,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 365 states. [2018-04-12 04:09:31,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 365 states to 365 states and 369 transitions. [2018-04-12 04:09:31,986 INFO L78 Accepts]: Start accepts. Automaton has 365 states and 369 transitions. Word has length 332 [2018-04-12 04:09:31,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:09:31,987 INFO L459 AbstractCegarLoop]: Abstraction has 365 states and 369 transitions. [2018-04-12 04:09:31,987 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 04:09:31,987 INFO L276 IsEmpty]: Start isEmpty. Operand 365 states and 369 transitions. [2018-04-12 04:09:31,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 951 [2018-04-12 04:09:31,997 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:09:31,997 INFO L355 BasicCegarLoop]: trace histogram [99, 96, 96, 96, 96, 96, 96, 96, 96, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:09:31,997 INFO L408 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:09:31,998 INFO L82 PathProgramCache]: Analyzing trace with hash -1041244760, now seen corresponding path program 2 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:09:32,003 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:09:32,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:09:32,194 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:09:32,557 INFO L134 CoverageAnalysis]: Checked inductivity of 41685 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 41646 trivial. 0 not checked. [2018-04-12 04:09:32,557 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:09:32,871 INFO L134 CoverageAnalysis]: Checked inductivity of 41685 backedges. 0 proven. 39 refuted. 0 times theorem prover too weak. 41646 trivial. 0 not checked. [2018-04-12 04:09:32,892 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:09:32,892 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2018-04-12 04:09:32,893 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-12 04:09:32,893 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-12 04:09:32,893 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=168, Unknown=0, NotChecked=0, Total=240 [2018-04-12 04:09:32,893 INFO L87 Difference]: Start difference. First operand 365 states and 369 transitions. Second operand 16 states. [2018-04-12 04:09:33,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:09:33,108 INFO L93 Difference]: Finished difference Result 446 states and 459 transitions. [2018-04-12 04:09:33,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-12 04:09:33,109 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 950 [2018-04-12 04:09:33,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:09:33,112 INFO L225 Difference]: With dead ends: 446 [2018-04-12 04:09:33,112 INFO L226 Difference]: Without dead ends: 426 [2018-04-12 04:09:33,113 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 1911 GetRequests, 1885 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 113 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=259, Invalid=497, Unknown=0, NotChecked=0, Total=756 [2018-04-12 04:09:33,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states. [2018-04-12 04:09:33,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 409. [2018-04-12 04:09:33,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 409 states. [2018-04-12 04:09:33,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 409 states to 409 states and 417 transitions. [2018-04-12 04:09:33,134 INFO L78 Accepts]: Start accepts. Automaton has 409 states and 417 transitions. Word has length 950 [2018-04-12 04:09:33,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:09:33,135 INFO L459 AbstractCegarLoop]: Abstraction has 409 states and 417 transitions. [2018-04-12 04:09:33,135 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-12 04:09:33,135 INFO L276 IsEmpty]: Start isEmpty. Operand 409 states and 417 transitions. [2018-04-12 04:09:33,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 2187 [2018-04-12 04:09:33,165 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:09:33,165 INFO L355 BasicCegarLoop]: trace histogram [231, 224, 224, 224, 224, 224, 224, 224, 224, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:09:33,165 INFO L408 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:09:33,166 INFO L82 PathProgramCache]: Analyzing trace with hash 1433179816, now seen corresponding path program 3 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:09:33,171 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:09:33,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:09:33,594 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:09:35,188 INFO L134 CoverageAnalysis]: Checked inductivity of 228375 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 228130 trivial. 0 not checked. [2018-04-12 04:09:35,188 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:09:36,749 INFO L134 CoverageAnalysis]: Checked inductivity of 228375 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 228130 trivial. 0 not checked. [2018-04-12 04:09:36,770 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:09:36,771 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 32 [2018-04-12 04:09:36,772 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-04-12 04:09:36,772 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-04-12 04:09:36,773 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=272, Invalid=720, Unknown=0, NotChecked=0, Total=992 [2018-04-12 04:09:36,773 INFO L87 Difference]: Start difference. First operand 409 states and 417 transitions. Second operand 32 states. [2018-04-12 04:09:37,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:09:37,539 INFO L93 Difference]: Finished difference Result 534 states and 559 transitions. [2018-04-12 04:09:37,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-04-12 04:09:37,610 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 2186 [2018-04-12 04:09:37,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:09:37,615 INFO L225 Difference]: With dead ends: 534 [2018-04-12 04:09:37,615 INFO L226 Difference]: Without dead ends: 514 [2018-04-12 04:09:37,616 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4399 GetRequests, 4341 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 681 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1155, Invalid=2385, Unknown=0, NotChecked=0, Total=3540 [2018-04-12 04:09:37,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 514 states. [2018-04-12 04:09:37,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 514 to 497. [2018-04-12 04:09:37,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 497 states. [2018-04-12 04:09:37,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 497 states to 497 states and 513 transitions. [2018-04-12 04:09:37,646 INFO L78 Accepts]: Start accepts. Automaton has 497 states and 513 transitions. Word has length 2186 [2018-04-12 04:09:37,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:09:37,648 INFO L459 AbstractCegarLoop]: Abstraction has 497 states and 513 transitions. [2018-04-12 04:09:37,648 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-04-12 04:09:37,648 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 513 transitions. [2018-04-12 04:09:37,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4659 [2018-04-12 04:09:37,807 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:09:37,809 INFO L355 BasicCegarLoop]: trace histogram [495, 480, 480, 480, 480, 480, 480, 480, 480, 16, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:09:37,809 INFO L408 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:09:37,810 INFO L82 PathProgramCache]: Analyzing trace with hash 215648424, now seen corresponding path program 4 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:09:37,816 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:09:38,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:09:38,790 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:09:44,840 INFO L134 CoverageAnalysis]: Checked inductivity of 1051275 backedges. 0 proven. 1185 refuted. 0 times theorem prover too weak. 1050090 trivial. 0 not checked. [2018-04-12 04:09:44,841 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:09:50,989 INFO L134 CoverageAnalysis]: Checked inductivity of 1051275 backedges. 0 proven. 1185 refuted. 0 times theorem prover too weak. 1050090 trivial. 0 not checked. [2018-04-12 04:09:51,013 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:09:51,014 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33] total 64 [2018-04-12 04:09:51,017 INFO L442 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-04-12 04:09:51,017 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-04-12 04:09:51,018 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1056, Invalid=2976, Unknown=0, NotChecked=0, Total=4032 [2018-04-12 04:09:51,018 INFO L87 Difference]: Start difference. First operand 497 states and 513 transitions. Second operand 64 states. [2018-04-12 04:09:52,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:09:52,449 INFO L93 Difference]: Finished difference Result 710 states and 759 transitions. [2018-04-12 04:09:52,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2018-04-12 04:09:52,449 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 4658 [2018-04-12 04:09:52,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:09:52,455 INFO L225 Difference]: With dead ends: 710 [2018-04-12 04:09:52,455 INFO L226 Difference]: Without dead ends: 690 [2018-04-12 04:09:52,456 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9375 GetRequests, 9253 SyntacticMatches, 0 SemanticMatches, 122 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3257 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=4867, Invalid=10385, Unknown=0, NotChecked=0, Total=15252 [2018-04-12 04:09:52,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 690 states. [2018-04-12 04:09:52,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 690 to 673. [2018-04-12 04:09:52,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 673 states. [2018-04-12 04:09:52,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 673 states to 673 states and 705 transitions. [2018-04-12 04:09:52,486 INFO L78 Accepts]: Start accepts. Automaton has 673 states and 705 transitions. Word has length 4658 [2018-04-12 04:09:52,489 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:09:52,489 INFO L459 AbstractCegarLoop]: Abstraction has 673 states and 705 transitions. [2018-04-12 04:09:52,489 INFO L460 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-04-12 04:09:52,489 INFO L276 IsEmpty]: Start isEmpty. Operand 673 states and 705 transitions. [2018-04-12 04:09:52,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9603 [2018-04-12 04:09:52,851 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:09:52,854 INFO L355 BasicCegarLoop]: trace histogram [1023, 992, 992, 992, 992, 992, 992, 992, 992, 32, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:09:52,854 INFO L408 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:09:52,855 INFO L82 PathProgramCache]: Analyzing trace with hash -729256792, now seen corresponding path program 5 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:09:52,861 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:09:54,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:09:54,486 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:10:18,841 INFO L134 CoverageAnalysis]: Checked inductivity of 4495155 backedges. 0 proven. 5177 refuted. 0 times theorem prover too weak. 4489978 trivial. 0 not checked. [2018-04-12 04:10:18,841 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:10:43,421 INFO L134 CoverageAnalysis]: Checked inductivity of 4495155 backedges. 0 proven. 5177 refuted. 0 times theorem prover too weak. 4489978 trivial. 0 not checked. [2018-04-12 04:10:43,452 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:10:43,453 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 65] total 65 [2018-04-12 04:10:43,459 INFO L442 AbstractCegarLoop]: Interpolant automaton has 65 states [2018-04-12 04:10:43,459 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 65 interpolants. [2018-04-12 04:10:43,459 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1088, Invalid=3072, Unknown=0, NotChecked=0, Total=4160 [2018-04-12 04:10:43,459 INFO L87 Difference]: Start difference. First operand 673 states and 705 transitions. Second operand 65 states. [2018-04-12 04:10:45,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:10:45,100 INFO L93 Difference]: Finished difference Result 721 states and 756 transitions. [2018-04-12 04:10:45,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-04-12 04:10:45,101 INFO L78 Accepts]: Start accepts. Automaton has 65 states. Word has length 9602 [2018-04-12 04:10:45,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:10:45,109 INFO L225 Difference]: With dead ends: 721 [2018-04-12 04:10:45,109 INFO L226 Difference]: Without dead ends: 701 [2018-04-12 04:10:45,110 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 19265 GetRequests, 19077 SyntacticMatches, 63 SemanticMatches, 125 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5673 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=5118, Invalid=10884, Unknown=0, NotChecked=0, Total=16002 [2018-04-12 04:10:45,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 701 states. [2018-04-12 04:10:45,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 701 to 684. [2018-04-12 04:10:45,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 684 states. [2018-04-12 04:10:45,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 684 states to 684 states and 717 transitions. [2018-04-12 04:10:45,153 INFO L78 Accepts]: Start accepts. Automaton has 684 states and 717 transitions. Word has length 9602 [2018-04-12 04:10:45,159 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:10:45,159 INFO L459 AbstractCegarLoop]: Abstraction has 684 states and 717 transitions. [2018-04-12 04:10:45,159 INFO L460 AbstractCegarLoop]: Interpolant automaton has 65 states. [2018-04-12 04:10:45,159 INFO L276 IsEmpty]: Start isEmpty. Operand 684 states and 717 transitions. [2018-04-12 04:10:45,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9912 [2018-04-12 04:10:45,591 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:10:45,594 INFO L355 BasicCegarLoop]: trace histogram [1056, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 33, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:10:45,594 INFO L408 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:10:45,596 INFO L82 PathProgramCache]: Analyzing trace with hash 1007406076, now seen corresponding path program 6 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:10:45,601 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:10:47,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:10:47,354 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 04:10:48,836 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 04:10:48,836 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:48,838 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:48,839 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-12 04:10:48,991 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:48,993 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:48,993 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:48,997 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:48,998 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:49,106 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:49,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:49,107 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:49,112 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:49,113 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:49,240 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:49,242 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:49,242 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:49,248 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:49,248 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:49,393 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:49,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:49,395 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:49,400 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:49,400 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:49,516 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:49,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:49,517 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:49,521 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:49,521 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:49,633 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:49,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:49,634 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:49,639 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:49,639 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:49,777 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:49,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:49,778 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:49,785 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:49,785 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:49,909 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:49,910 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:49,911 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:49,915 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:49,915 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:50,046 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:50,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:50,048 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:50,052 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:50,052 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:50,172 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:50,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:50,221 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:50,225 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:50,226 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:50,349 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:50,350 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:50,351 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:50,355 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:50,355 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:50,489 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:50,490 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:50,491 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:50,494 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:50,495 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:50,621 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:50,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:50,622 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:50,627 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:50,627 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:50,755 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:50,756 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:50,757 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:50,761 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:50,761 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:50,892 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:50,895 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:50,896 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:50,900 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:50,900 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:51,032 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:51,033 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:51,034 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:51,038 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:51,038 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:51,169 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:51,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:51,170 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:51,175 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:51,175 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:51,311 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:51,312 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:51,312 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:51,316 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:51,317 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:51,465 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:51,466 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:51,466 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:51,471 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:51,471 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:51,610 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:51,611 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:51,612 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:51,616 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:51,616 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:51,766 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:51,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:51,767 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:51,772 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:51,772 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:51,914 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:51,915 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:51,916 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:51,921 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:51,921 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:52,067 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:52,068 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:52,069 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:52,073 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:52,073 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:52,219 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:52,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:52,220 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:52,224 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:52,224 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:52,374 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:52,375 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:52,375 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:52,379 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:52,380 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:52,533 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:52,534 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:52,534 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:52,539 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:52,540 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:52,695 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:52,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:52,696 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:52,701 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:52,701 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:52,857 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:52,858 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:52,858 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:52,863 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:52,863 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:53,023 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:53,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:53,024 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:53,028 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:53,029 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:53,186 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:53,188 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:53,188 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:53,193 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:53,193 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-12 04:10:53,372 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 04:10:53,374 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 04:10:53,374 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:10:53,380 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 04:10:53,380 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:15, output treesize:5 [2018-04-12 04:11:22,132 INFO L134 CoverageAnalysis]: Checked inductivity of 4790000 backedges. 5055 proven. 294812 refuted. 0 times theorem prover too weak. 4490133 trivial. 0 not checked. [2018-04-12 04:11:22,132 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 04:11:27,658 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-04-12 04:11:27,659 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 04:11:27,660 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-04-12 04:11:27,660 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 04:11:27,665 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 04:11:27,665 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:14, output treesize:7 [2018-04-12 04:11:27,917 WARN L148 SmtUtils]: Spent 248ms on a formula simplification that was a NOOP. DAG size: 167 [2018-04-12 04:11:57,345 INFO L134 CoverageAnalysis]: Checked inductivity of 4790000 backedges. 0 proven. 294992 refuted. 0 times theorem prover too weak. 4495008 trivial. 0 not checked. [2018-04-12 04:11:57,388 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 04:11:57,390 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [134, 76] total 137 [2018-04-12 04:11:57,395 INFO L442 AbstractCegarLoop]: Interpolant automaton has 137 states [2018-04-12 04:11:57,396 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 137 interpolants. [2018-04-12 04:11:57,396 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1332, Invalid=17300, Unknown=0, NotChecked=0, Total=18632 [2018-04-12 04:11:57,396 INFO L87 Difference]: Start difference. First operand 684 states and 717 transitions. Second operand 137 states. [2018-04-12 04:12:08,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 04:12:08,673 INFO L93 Difference]: Finished difference Result 694 states and 726 transitions. [2018-04-12 04:12:08,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 137 states. [2018-04-12 04:12:08,674 INFO L78 Accepts]: Start accepts. Automaton has 137 states. Word has length 9911 [2018-04-12 04:12:08,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 04:12:08,683 INFO L225 Difference]: With dead ends: 694 [2018-04-12 04:12:08,684 INFO L226 Difference]: Without dead ends: 689 [2018-04-12 04:12:08,687 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 19952 GetRequests, 19592 SyntacticMatches, 94 SemanticMatches, 266 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17506 ImplicationChecksByTransitivity, 15.5s TimeCoverageRelationStatistics Valid=5810, Invalid=65746, Unknown=0, NotChecked=0, Total=71556 [2018-04-12 04:12:08,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 689 states. [2018-04-12 04:12:08,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 689 to 685. [2018-04-12 04:12:08,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 685 states. [2018-04-12 04:12:08,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 685 states to 685 states and 718 transitions. [2018-04-12 04:12:08,715 INFO L78 Accepts]: Start accepts. Automaton has 685 states and 718 transitions. Word has length 9911 [2018-04-12 04:12:08,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 04:12:08,719 INFO L459 AbstractCegarLoop]: Abstraction has 685 states and 718 transitions. [2018-04-12 04:12:08,719 INFO L460 AbstractCegarLoop]: Interpolant automaton has 137 states. [2018-04-12 04:12:08,719 INFO L276 IsEmpty]: Start isEmpty. Operand 685 states and 718 transitions. [2018-04-12 04:12:09,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9914 [2018-04-12 04:12:09,144 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 04:12:09,147 INFO L355 BasicCegarLoop]: trace histogram [1056, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 1024, 33, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 04:12:09,147 INFO L408 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr1RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr2RequiresViolation, __U_MULTI_fArraysOfVariableLength__true_valid_memsafety_true_termination_c__fooErr0AssertViolationARRAY_INDEX, mainErr1AssertViolationARRAY_INDEX, mainErr2EnsuresViolationMEMORY_LEAK, mainErr0AssertViolationARRAY_INDEX]=== [2018-04-12 04:12:09,148 INFO L82 PathProgramCache]: Analyzing trace with hash -1628298646, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 04:12:09,168 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 04:12:10,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 04:12:10,939 INFO L270 TraceCheckSpWp]: Computing forward predicates... Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown