java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/array-memsafety/count_down-alloca_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-8168ed2-m [2018-04-12 00:47:37,040 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-12 00:47:37,042 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-12 00:47:37,057 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2018-04-12 00:47:37,086 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf [2018-04-12 00:47:37,110 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-12 00:47:37,110 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-12 00:47:37,111 INFO L131 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2018-04-12 00:47:37,111 INFO L133 SettingsManager]: * ultimate.logging.details=de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation=DEBUG; [2018-04-12 00:47:37,112 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-04-12 00:47:37,112 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-04-12 00:47:37,112 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-04-12 00:47:37,112 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-04-12 00:47:37,112 INFO L133 SettingsManager]: * Parallel states before merging=1 [2018-04-12 00:47:37,112 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-04-12 00:47:37,113 INFO L131 SettingsManager]: Preferences of LTL2Aut differ from their defaults: [2018-04-12 00:47:37,113 INFO L133 SettingsManager]: * Property to check=[] a a: x > 42 [2018-04-12 00:47:37,113 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-12 00:47:37,114 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-12 00:47:37,114 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-12 00:47:37,114 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-12 00:47:37,114 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-12 00:47:37,114 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-12 00:47:37,114 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-12 00:47:37,115 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-04-12 00:47:37,115 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-12 00:47:37,115 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-12 00:47:37,115 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-12 00:47:37,115 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-04-12 00:47:37,116 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-04-12 00:47:37,116 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-12 00:47:37,116 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 00:47:37,116 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-12 00:47:37,116 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-12 00:47:37,117 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-12 00:47:37,117 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-04-12 00:47:37,117 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-04-12 00:47:37,117 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:47:37,117 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-04-12 00:47:37,118 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-04-12 00:47:37,118 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-04-12 00:47:37,119 INFO L131 SettingsManager]: Preferences of Boogie Printer differ from their defaults: [2018-04-12 00:47:37,119 INFO L133 SettingsManager]: * Dump path:=C:\Users\alex\AppData\Local\Temp\ [2018-04-12 00:47:37,153 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-12 00:47:37,164 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-12 00:47:37,167 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-12 00:47:37,168 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-12 00:47:37,168 INFO L276 PluginConnector]: CDTParser initialized [2018-04-12 00:47:37,169 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-memsafety/count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,500 INFO L225 CDTParser]: Created temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG041579304 [2018-04-12 00:47:37,675 INFO L287 CDTParser]: IsIndexed: true [2018-04-12 00:47:37,675 INFO L288 CDTParser]: Found 1 translation units. [2018-04-12 00:47:37,676 INFO L168 CDTParser]: Scanning count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,687 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-12 00:47:37,687 INFO L215 ultiparseSymbolTable]: [2018-04-12 00:47:37,688 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-12 00:47:37,688 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____bswap_64 ('__bswap_64') in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,688 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____bswap_32 ('__bswap_32') in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,688 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,688 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-12 00:47:37,688 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__time_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,688 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__fsblkcnt_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____suseconds_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____uint32_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____int32_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__div_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__pthread_rwlock_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__fd_set in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__lldiv_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__pthread_mutex_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,689 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____u_short in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____rlim_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____fsblkcnt_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__int16_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__mode_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__uid_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____dev_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__key_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____time_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____timer_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,690 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__u_quad_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____u_char in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____off64_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____syscall_ulong_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____id_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__u_int in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__u_int64_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____rlim64_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____blksize_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__int8_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____fsfilcnt_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____qaddr_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__pthread_mutexattr_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,691 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____nlink_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__pthread_rwlockattr_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____blkcnt64_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__ldiv_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__int32_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__u_int32_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__ino_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__fsfilcnt_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____fsfilcnt64_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__register_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____ssize_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__timer_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,692 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__pthread_barrierattr_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____uid_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__pthread_key_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____off_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__fd_mask in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____uint64_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__ssize_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____fsword_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__nlink_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__sigset_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__uint in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__id_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,693 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____ino64_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____uint8_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____key_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____u_int in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__u_int8_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__u_int16_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__pthread_condattr_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__dev_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____clock_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,694 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__wchar_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,695 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____blkcnt_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,695 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__pthread_cond_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,695 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____loff_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,695 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__fsid_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,695 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__quad_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,695 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____useconds_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,695 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____fd_mask in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,695 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__clockid_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,695 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____clockid_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,696 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__suseconds_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,696 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____syscall_slong_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,696 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____sig_atomic_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,696 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__pthread_attr_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,696 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__pthread_barrier_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,696 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____WAIT_STATUS in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,696 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____gid_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,696 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____int64_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,696 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__ushort in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,696 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__pthread_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,697 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____u_quad_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,697 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____quad_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,697 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____fsblkcnt64_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,697 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__int64_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,697 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____uint16_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,697 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__loff_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,697 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____daddr_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,697 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____pid_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,697 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____int16_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,698 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__u_short in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,698 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__u_char in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,698 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__off_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,698 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__ulong in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,698 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__gid_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,698 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____u_long in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,698 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____socklen_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,698 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__clock_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,698 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__pid_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,699 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__blkcnt_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,699 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__daddr_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,699 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____int8_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,699 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____pthread_list_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,699 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____caddr_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,699 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__size_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,699 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__pthread_once_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,699 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__u_long in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,700 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____intptr_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,700 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____fsid_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,700 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____mode_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,700 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__blksize_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,700 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__pthread_spinlock_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,700 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i__caddr_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,700 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____ino_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,700 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____sigset_t in count_down-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:47:37,720 INFO L330 CDTParser]: Deleted temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG041579304 [2018-04-12 00:47:37,725 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-12 00:47:37,727 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-04-12 00:47:37,729 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-12 00:47:37,729 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-12 00:47:37,734 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-12 00:47:37,735 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 12:47:37" (1/1) ... [2018-04-12 00:47:37,737 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2e5f6412 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:47:37, skipping insertion in model container [2018-04-12 00:47:37,737 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 12:47:37" (1/1) ... [2018-04-12 00:47:37,752 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 00:47:37,782 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 00:47:37,945 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 00:47:37,993 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 00:47:38,001 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 111 non ball SCCs. Number of states in SCCs 111. [2018-04-12 00:47:38,051 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:47:38 WrapperNode [2018-04-12 00:47:38,051 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-12 00:47:38,052 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-12 00:47:38,052 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-12 00:47:38,052 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-12 00:47:38,063 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:47:38" (1/1) ... [2018-04-12 00:47:38,063 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:47:38" (1/1) ... [2018-04-12 00:47:38,078 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:47:38" (1/1) ... [2018-04-12 00:47:38,078 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:47:38" (1/1) ... [2018-04-12 00:47:38,091 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:47:38" (1/1) ... [2018-04-12 00:47:38,097 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:47:38" (1/1) ... [2018-04-12 00:47:38,100 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:47:38" (1/1) ... [2018-04-12 00:47:38,105 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-12 00:47:38,105 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-12 00:47:38,105 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-12 00:47:38,106 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-12 00:47:38,107 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:47:38" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 00:47:38,241 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-12 00:47:38,241 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-12 00:47:38,242 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____bswap_32 [2018-04-12 00:47:38,242 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____bswap_64 [2018-04-12 00:47:38,242 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-12 00:47:38,242 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____bswap_32 [2018-04-12 00:47:38,242 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fcount_down_alloca_true_valid_memsafety_true_termination_i____bswap_64 [2018-04-12 00:47:38,242 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-12 00:47:38,242 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-12 00:47:38,242 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-12 00:47:38,242 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-12 00:47:38,242 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-12 00:47:38,243 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-12 00:47:38,243 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-12 00:47:38,243 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-12 00:47:38,243 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-12 00:47:38,243 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-12 00:47:38,243 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-12 00:47:38,243 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-12 00:47:38,243 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-12 00:47:38,243 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-12 00:47:38,244 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-12 00:47:38,244 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-12 00:47:38,244 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-12 00:47:38,244 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-12 00:47:38,244 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-12 00:47:38,244 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-12 00:47:38,244 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-12 00:47:38,244 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-12 00:47:38,244 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-12 00:47:38,244 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-12 00:47:38,245 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-12 00:47:38,245 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-12 00:47:38,245 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-12 00:47:38,245 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-12 00:47:38,245 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-12 00:47:38,245 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-12 00:47:38,245 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-12 00:47:38,246 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-12 00:47:38,246 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-12 00:47:38,246 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-12 00:47:38,246 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-12 00:47:38,246 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-12 00:47:38,246 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-12 00:47:38,246 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-12 00:47:38,246 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-12 00:47:38,247 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-12 00:47:38,247 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-12 00:47:38,247 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-12 00:47:38,247 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-12 00:47:38,247 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-12 00:47:38,247 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-12 00:47:38,247 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-12 00:47:38,248 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-12 00:47:38,248 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-12 00:47:38,248 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-12 00:47:38,248 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-12 00:47:38,248 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-12 00:47:38,248 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-12 00:47:38,248 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-12 00:47:38,248 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-12 00:47:38,249 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-12 00:47:38,249 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-12 00:47:38,249 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-12 00:47:38,249 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-12 00:47:38,249 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-12 00:47:38,249 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-12 00:47:38,249 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-12 00:47:38,250 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-12 00:47:38,250 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-12 00:47:38,250 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-12 00:47:38,250 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-12 00:47:38,250 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-12 00:47:38,250 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-12 00:47:38,250 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-12 00:47:38,250 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-12 00:47:38,251 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-12 00:47:38,251 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-12 00:47:38,251 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-12 00:47:38,251 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-12 00:47:38,251 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-12 00:47:38,251 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-12 00:47:38,251 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-12 00:47:38,251 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-12 00:47:38,252 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-12 00:47:38,252 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-12 00:47:38,252 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-12 00:47:38,252 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-12 00:47:38,252 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-12 00:47:38,252 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-12 00:47:38,252 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-12 00:47:38,253 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-12 00:47:38,253 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-12 00:47:38,253 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-12 00:47:38,253 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-12 00:47:38,253 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-12 00:47:38,253 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-12 00:47:38,253 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-12 00:47:38,253 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-12 00:47:38,254 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-12 00:47:38,254 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-12 00:47:38,254 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-12 00:47:38,254 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-12 00:47:38,254 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-12 00:47:38,254 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-12 00:47:38,254 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-12 00:47:38,255 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-12 00:47:38,255 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-12 00:47:38,255 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-12 00:47:38,255 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-12 00:47:38,255 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-12 00:47:38,255 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-12 00:47:38,255 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-12 00:47:38,255 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-12 00:47:38,256 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-12 00:47:38,256 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-12 00:47:38,602 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-12 00:47:38,603 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 12:47:38 BoogieIcfgContainer [2018-04-12 00:47:38,603 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-12 00:47:38,604 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2018-04-12 00:47:38,604 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2018-04-12 00:47:38,604 INFO L276 PluginConnector]: IcfgTransformer initialized [2018-04-12 00:47:38,607 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 12:47:38" (1/1) ... [2018-04-12 00:47:38,614 INFO L139 apSepIcfgTransformer]: HeapSepIcfgTransformer: Starting heap partitioning [2018-04-12 00:47:38,614 INFO L140 apSepIcfgTransformer]: To be partitioned heap arrays found [#memory_int] [2018-04-12 00:47:38,631 INFO L299 apSepIcfgTransformer]: Heap separator: starting memloc-array-style preprocessing [2018-04-12 00:47:38,649 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 111 non ball SCCs. Number of states in SCCs 111. [2018-04-12 00:47:38,659 INFO L332 apSepIcfgTransformer]: finished MemlocArrayUpdater, created 4 location literals (each corresponds to one heap write) [2018-04-12 00:47:38,668 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 111 non ball SCCs. Number of states in SCCs 111. [2018-04-12 00:47:38,678 INFO L412 apSepIcfgTransformer]: finished preprocessing for the equality analysis [2018-04-12 00:47:38,679 DEBUG L416 apSepIcfgTransformer]: storeIndexInfoToLocLiteral: Map: (Store [1] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with (+ (* 4 v_main_~i~0_5) v_main_~arr~0.offset_4)) : |mll_L549''_1| (Store [2] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with v_main_~arr~0.base_13) : |mll_L556''_3| (Store [3] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with (+ (* 4 v_main_~j~0_9) v_main_~arr~0.offset_10)) : |mll_L556''_2| (Store [0] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with v_main_~arr~0.base_4) : |mll_L549''_0| [2018-04-12 00:47:38,682 DEBUG L418 apSepIcfgTransformer]: edgeToIndexToStoreIndexInfo: NestedMap2: (SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') : v_main_~arr~0.base_4 : (Store [0] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with v_main_~arr~0.base_4) (SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') : (+ (* 4 v_main_~i~0_5) v_main_~arr~0.offset_4) : (Store [1] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with (+ (* 4 v_main_~i~0_5) v_main_~arr~0.offset_4)) (SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') : (+ (* 4 v_main_~j~0_9) v_main_~arr~0.offset_10) : (Store [3] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with (+ (* 4 v_main_~j~0_9) v_main_~arr~0.offset_10)) (SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') : v_main_~arr~0.base_13 : (Store [2] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with v_main_~arr~0.base_13) [2018-04-12 00:47:38,733 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=1) [2018-04-12 00:49:32,074 INFO L314 AbstractInterpreter]: Visited 70 different actions 501 times. Merged at 46 different actions 316 times. Widened at 4 different actions 14 times. Found 38 fixpoints after 14 different actions. Largest state had 36 variables. [2018-04-12 00:49:32,077 INFO L424 apSepIcfgTransformer]: finished equality analysis [2018-04-12 00:49:32,085 INFO L195 HeapSepPreAnalysis]: Number of read from array group [#memory_int] : 4 [2018-04-12 00:49:32,086 INFO L434 apSepIcfgTransformer]: Finished pre analysis before partitioning [2018-04-12 00:49:32,086 INFO L435 apSepIcfgTransformer]: array groups: Set: [#memory_int] [2018-04-12 00:49:32,086 INFO L437 apSepIcfgTransformer]: select infos: Set: ((select (select |v_#memory_int_3| v_main_~arr~0.base_7) (+ (* 4 v_main_~j~0_5) v_main_~arr~0.offset_6)), at (SUMMARY for call #t~mem7 := read~int(~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L555)) ((select |v_#memory_int_6| v_main_~arr~0.base_13), at (SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'')) ((select (select |v_#memory_int_4| v_main_~arr~0.base_10) (+ v_main_~arr~0.offset_8 (* 4 v_main_~j~0_7))), at (SUMMARY for call #t~mem8 := read~int(~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556)) ((select |v_#memory_int_2| v_main_~arr~0.base_4), at (SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'')) [2018-04-12 00:49:32,229 DEBUG L262 HeapPartitionManager]: merging partition blocks for array group[#memory_int] : [2018-04-12 00:49:32,230 DEBUG L264 HeapPartitionManager]: (Store [0] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with v_main_~arr~0.base_4) [2018-04-12 00:49:32,230 DEBUG L265 HeapPartitionManager]: and [2018-04-12 00:49:32,230 DEBUG L266 HeapPartitionManager]: (Store [2] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with v_main_~arr~0.base_13) [2018-04-12 00:49:32,230 DEBUG L267 HeapPartitionManager]: because of possible aliasing at dimension 0 [2018-04-12 00:49:32,230 DEBUG L268 HeapPartitionManager]: at array read ((select (select |v_#memory_int_3| v_main_~arr~0.base_7) (+ (* 4 v_main_~j~0_5) v_main_~arr~0.offset_6)), at (SUMMARY for call #t~mem7 := read~int(~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L555)). [2018-04-12 00:49:32,230 DEBUG L262 HeapPartitionManager]: merging partition blocks for array group[#memory_int] : [2018-04-12 00:49:32,230 DEBUG L264 HeapPartitionManager]: (Store [3] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with (+ (* 4 v_main_~j~0_9) v_main_~arr~0.offset_10)) [2018-04-12 00:49:32,230 DEBUG L265 HeapPartitionManager]: and [2018-04-12 00:49:32,230 DEBUG L266 HeapPartitionManager]: (Store [1] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with (+ (* 4 v_main_~i~0_5) v_main_~arr~0.offset_4)) [2018-04-12 00:49:32,231 DEBUG L267 HeapPartitionManager]: because of possible aliasing at dimension 1 [2018-04-12 00:49:32,231 DEBUG L268 HeapPartitionManager]: at array read ((select (select |v_#memory_int_3| v_main_~arr~0.base_7) (+ (* 4 v_main_~j~0_5) v_main_~arr~0.offset_6)), at (SUMMARY for call #t~mem7 := read~int(~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L555)). [2018-04-12 00:49:32,295 DEBUG L262 HeapPartitionManager]: merging partition blocks for array group[#memory_int] : [2018-04-12 00:49:32,296 DEBUG L264 HeapPartitionManager]: (Store [0] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with v_main_~arr~0.base_4) [2018-04-12 00:49:32,296 DEBUG L265 HeapPartitionManager]: and [2018-04-12 00:49:32,296 DEBUG L266 HeapPartitionManager]: (Store [2] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with v_main_~arr~0.base_13) [2018-04-12 00:49:32,296 DEBUG L267 HeapPartitionManager]: because of possible aliasing at dimension 0 [2018-04-12 00:49:32,296 DEBUG L268 HeapPartitionManager]: at array read ((select |v_#memory_int_6| v_main_~arr~0.base_13), at (SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'')). [2018-04-12 00:49:32,423 DEBUG L262 HeapPartitionManager]: merging partition blocks for array group[#memory_int] : [2018-04-12 00:49:32,423 DEBUG L264 HeapPartitionManager]: (Store [0] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with v_main_~arr~0.base_4) [2018-04-12 00:49:32,423 DEBUG L265 HeapPartitionManager]: and [2018-04-12 00:49:32,423 DEBUG L266 HeapPartitionManager]: (Store [2] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with v_main_~arr~0.base_13) [2018-04-12 00:49:32,423 DEBUG L267 HeapPartitionManager]: because of possible aliasing at dimension 0 [2018-04-12 00:49:32,424 DEBUG L268 HeapPartitionManager]: at array read ((select (select |v_#memory_int_4| v_main_~arr~0.base_10) (+ v_main_~arr~0.offset_8 (* 4 v_main_~j~0_7))), at (SUMMARY for call #t~mem8 := read~int(~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556)). [2018-04-12 00:49:32,424 DEBUG L262 HeapPartitionManager]: merging partition blocks for array group[#memory_int] : [2018-04-12 00:49:32,424 DEBUG L264 HeapPartitionManager]: (Store [3] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with (+ (* 4 v_main_~j~0_9) v_main_~arr~0.offset_10)) [2018-04-12 00:49:32,424 DEBUG L265 HeapPartitionManager]: and [2018-04-12 00:49:32,424 DEBUG L266 HeapPartitionManager]: (Store [1] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with (+ (* 4 v_main_~i~0_5) v_main_~arr~0.offset_4)) [2018-04-12 00:49:32,424 DEBUG L267 HeapPartitionManager]: because of possible aliasing at dimension 1 [2018-04-12 00:49:32,424 DEBUG L268 HeapPartitionManager]: at array read ((select (select |v_#memory_int_4| v_main_~arr~0.base_10) (+ v_main_~arr~0.offset_8 (* 4 v_main_~j~0_7))), at (SUMMARY for call #t~mem8 := read~int(~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556)). [2018-04-12 00:49:32,443 DEBUG L373 HeapPartitionManager]: creating LocationBlock locs_64 [2018-04-12 00:49:32,443 DEBUG L374 HeapPartitionManager]: with contents [(Store [2] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with v_main_~arr~0.base_13), (Store [0] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with v_main_~arr~0.base_4)] [2018-04-12 00:49:32,443 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_64 [2018-04-12 00:49:32,443 DEBUG L324 HeapPartitionManager]: at dimension 0 for ((select (select |v_#memory_int_3| v_main_~arr~0.base_7) (+ (* 4 v_main_~j~0_5) v_main_~arr~0.offset_6)), at (SUMMARY for call #t~mem7 := read~int(~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L555)) [2018-04-12 00:49:32,443 DEBUG L325 HeapPartitionManager]: write locations: [(Store [2] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with v_main_~arr~0.base_13), (Store [0] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with v_main_~arr~0.base_4)] [2018-04-12 00:49:32,443 DEBUG L373 HeapPartitionManager]: creating LocationBlock locs_66 [2018-04-12 00:49:32,444 DEBUG L374 HeapPartitionManager]: with contents [(Store [1] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with (+ (* 4 v_main_~i~0_5) v_main_~arr~0.offset_4)), (Store [3] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with (+ (* 4 v_main_~j~0_9) v_main_~arr~0.offset_10))] [2018-04-12 00:49:32,444 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_66 [2018-04-12 00:49:32,444 DEBUG L324 HeapPartitionManager]: at dimension 1 for ((select (select |v_#memory_int_3| v_main_~arr~0.base_7) (+ (* 4 v_main_~j~0_5) v_main_~arr~0.offset_6)), at (SUMMARY for call #t~mem7 := read~int(~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L555)) [2018-04-12 00:49:32,444 DEBUG L325 HeapPartitionManager]: write locations: [(Store [1] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with (+ (* 4 v_main_~i~0_5) v_main_~arr~0.offset_4)), (Store [3] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with (+ (* 4 v_main_~j~0_9) v_main_~arr~0.offset_10))] [2018-04-12 00:49:32,444 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_64 [2018-04-12 00:49:32,444 DEBUG L324 HeapPartitionManager]: at dimension 0 for ((select |v_#memory_int_6| v_main_~arr~0.base_13), at (SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'')) [2018-04-12 00:49:32,444 DEBUG L325 HeapPartitionManager]: write locations: [(Store [2] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with v_main_~arr~0.base_13), (Store [0] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with v_main_~arr~0.base_4)] [2018-04-12 00:49:32,444 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_64 [2018-04-12 00:49:32,444 DEBUG L324 HeapPartitionManager]: at dimension 0 for ((select (select |v_#memory_int_4| v_main_~arr~0.base_10) (+ v_main_~arr~0.offset_8 (* 4 v_main_~j~0_7))), at (SUMMARY for call #t~mem8 := read~int(~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556)) [2018-04-12 00:49:32,444 DEBUG L325 HeapPartitionManager]: write locations: [(Store [2] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with v_main_~arr~0.base_13), (Store [0] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with v_main_~arr~0.base_4)] [2018-04-12 00:49:32,444 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_66 [2018-04-12 00:49:32,445 DEBUG L324 HeapPartitionManager]: at dimension 1 for ((select (select |v_#memory_int_4| v_main_~arr~0.base_10) (+ v_main_~arr~0.offset_8 (* 4 v_main_~j~0_7))), at (SUMMARY for call #t~mem8 := read~int(~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556)) [2018-04-12 00:49:32,445 DEBUG L325 HeapPartitionManager]: write locations: [(Store [1] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with (+ (* 4 v_main_~i~0_5) v_main_~arr~0.offset_4)), (Store [3] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with (+ (* 4 v_main_~j~0_9) v_main_~arr~0.offset_10))] [2018-04-12 00:49:32,445 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_64 [2018-04-12 00:49:32,445 DEBUG L324 HeapPartitionManager]: at dimension 0 for ((select |v_#memory_int_2| v_main_~arr~0.base_4), at (SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'')) [2018-04-12 00:49:32,445 DEBUG L325 HeapPartitionManager]: write locations: [(Store [2] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with v_main_~arr~0.base_13), (Store [0] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with v_main_~arr~0.base_4)] [2018-04-12 00:49:32,445 INFO L330 HeapPartitionManager]: partitioning result: [2018-04-12 00:49:32,445 INFO L335 HeapPartitionManager]: location blocks for array group [#memory_int] [2018-04-12 00:49:32,445 INFO L344 HeapPartitionManager]: at dimension 0 [2018-04-12 00:49:32,445 INFO L345 HeapPartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 2 [2018-04-12 00:49:32,445 INFO L346 HeapPartitionManager]: # location blocks :1 [2018-04-12 00:49:32,445 DEBUG L353 HeapPartitionManager]: location block contents: [2018-04-12 00:49:32,445 DEBUG L356 HeapPartitionManager]: [(Store [2] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with v_main_~arr~0.base_13), (Store [0] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with v_main_~arr~0.base_4)] [2018-04-12 00:49:32,446 INFO L344 HeapPartitionManager]: at dimension 1 [2018-04-12 00:49:32,446 INFO L345 HeapPartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 2 [2018-04-12 00:49:32,446 INFO L346 HeapPartitionManager]: # location blocks :1 [2018-04-12 00:49:32,446 DEBUG L353 HeapPartitionManager]: location block contents: [2018-04-12 00:49:32,446 DEBUG L356 HeapPartitionManager]: [(Store [1] at(SUMMARY for call write~int(~val~0, ~arr~0.base, ~arr~0.offset + ~i~0 * 4, 4); srcloc: L549'') with (+ (* 4 v_main_~i~0_5) v_main_~arr~0.offset_4)), (Store [3] at(SUMMARY for call write~int(#t~post9 - 1, ~arr~0.base, ~arr~0.offset + ~j~0 * 4, 4); srcloc: L556'') with (+ (* 4 v_main_~j~0_9) v_main_~arr~0.offset_10))] [2018-04-12 00:49:32,447 INFO L134 ransitionTransformer]: executing heap partitioning transformation [2018-04-12 00:49:32,450 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,450 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,450 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,450 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,450 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,450 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,450 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,451 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,451 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,451 DEBUG L331 ransitionTransformer]: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] [2018-04-12 00:49:32,451 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,451 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,451 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,452 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,452 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,452 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,452 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,452 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,452 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,452 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,452 DEBUG L356 ransitionTransformer]: {main_~i~0=v_main_~i~0_1} [2018-04-12 00:49:32,452 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,452 DEBUG L358 ransitionTransformer]: {} [2018-04-12 00:49:32,453 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,453 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,453 DEBUG L331 ransitionTransformer]: Formula: (= |v_#valid_1| (store |v_#valid_2| 0 0)) InVars {#valid=|v_#valid_2|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid] [2018-04-12 00:49:32,453 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,453 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,453 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,453 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,453 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,453 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,454 DEBUG L356 ransitionTransformer]: {main_~j~0=v_main_~j~0_1} [2018-04-12 00:49:32,454 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,454 DEBUG L358 ransitionTransformer]: {} [2018-04-12 00:49:32,454 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,454 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,454 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,454 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,454 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,454 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,454 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,455 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,455 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,455 DEBUG L356 ransitionTransformer]: {main_~val~0=v_main_~val~0_1} [2018-04-12 00:49:32,455 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,455 DEBUG L358 ransitionTransformer]: {} [2018-04-12 00:49:32,455 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,455 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,455 DEBUG L331 ransitionTransformer]: Formula: (and (<= |v_main_#t~nondet2_1| 2147483647) (<= 0 (+ |v_main_#t~nondet2_1| 2147483648))) InVars {main_#t~nondet2=|v_main_#t~nondet2_1|} OutVars{main_#t~nondet2=|v_main_#t~nondet2_1|} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,455 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,455 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,456 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,456 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~length~0_1 |v_main_#t~nondet2_2|) InVars {main_#t~nondet2=|v_main_#t~nondet2_2|} OutVars{main_~length~0=v_main_~length~0_1, main_#t~nondet2=|v_main_#t~nondet2_2|} AuxVars[] AssignedVars[main_~length~0] [2018-04-12 00:49:32,456 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,456 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,456 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,456 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,456 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,456 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,456 DEBUG L356 ransitionTransformer]: {main_#t~nondet2=|v_main_#t~nondet2_3|} [2018-04-12 00:49:32,456 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,457 DEBUG L358 ransitionTransformer]: {} [2018-04-12 00:49:32,457 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,457 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,457 DEBUG L331 ransitionTransformer]: Formula: (or (<= 536870911 v_main_~length~0_2) (< v_main_~length~0_2 1)) InVars {main_~length~0=v_main_~length~0_2} OutVars{main_~length~0=v_main_~length~0_2} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,457 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,457 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,457 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,457 DEBUG L331 ransitionTransformer]: Formula: (and (not (< v_main_~length~0_4 1)) (not (<= 536870911 v_main_~length~0_4))) InVars {main_~length~0=v_main_~length~0_4} OutVars{main_~length~0=v_main_~length~0_4} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,457 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,458 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,458 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,458 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~length~0_3 1) InVars {} OutVars{main_~length~0=v_main_~length~0_3} AuxVars[] AssignedVars[main_~length~0] [2018-04-12 00:49:32,458 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,458 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,458 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,458 DEBUG L331 ransitionTransformer]: Formula: (and (= |v_main_#t~malloc3.offset_1| 0) (= |v_#length_1| (store |v_#length_2| |v_main_#t~malloc3.base_1| (* 4 v_main_~length~0_5))) (not (= 0 |v_main_#t~malloc3.base_1|)) (= |v_#valid_3| (store |v_#valid_4| |v_main_#t~malloc3.base_1| 1)) (= 0 (select |v_#valid_4| |v_main_#t~malloc3.base_1|))) InVars {main_~length~0=v_main_~length~0_5, #length=|v_#length_2|, #valid=|v_#valid_4|} OutVars{main_~length~0=v_main_~length~0_5, main_#t~malloc3.base=|v_main_#t~malloc3.base_1|, #length=|v_#length_1|, main_#t~malloc3.offset=|v_main_#t~malloc3.offset_1|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[main_#t~malloc3.base, main_#t~malloc3.offset, #valid, #length] [2018-04-12 00:49:32,459 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,459 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,459 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,459 DEBUG L331 ransitionTransformer]: Formula: (and (= v_main_~arr~0.offset_1 |v_main_#t~malloc3.offset_2|) (= v_main_~arr~0.base_1 |v_main_#t~malloc3.base_2|)) InVars {main_#t~malloc3.base=|v_main_#t~malloc3.base_2|, main_#t~malloc3.offset=|v_main_#t~malloc3.offset_2|} OutVars{main_#t~malloc3.base=|v_main_#t~malloc3.base_2|, main_~arr~0.offset=v_main_~arr~0.offset_1, main_~arr~0.base=v_main_~arr~0.base_1, main_#t~malloc3.offset=|v_main_#t~malloc3.offset_2|} AuxVars[] AssignedVars[main_~arr~0.base, main_~arr~0.offset] [2018-04-12 00:49:32,459 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,459 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,459 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,459 DEBUG L331 ransitionTransformer]: Formula: (and (= 0 v_main_~arr~0.base_2) (= 0 v_main_~arr~0.offset_2)) InVars {main_~arr~0.offset=v_main_~arr~0.offset_2, main_~arr~0.base=v_main_~arr~0.base_2} OutVars{main_~arr~0.offset=v_main_~arr~0.offset_2, main_~arr~0.base=v_main_~arr~0.base_2} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,459 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,460 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,460 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,460 DEBUG L331 ransitionTransformer]: Formula: (or (not (= 0 v_main_~arr~0.base_3)) (not (= 0 v_main_~arr~0.offset_3))) InVars {main_~arr~0.offset=v_main_~arr~0.offset_3, main_~arr~0.base=v_main_~arr~0.base_3} OutVars{main_~arr~0.offset=v_main_~arr~0.offset_3, main_~arr~0.base=v_main_~arr~0.base_3} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,460 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,460 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,460 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,460 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#res_1| 0) InVars {} OutVars{main_#res=|v_main_#res_1|} AuxVars[] AssignedVars[main_#res] [2018-04-12 00:49:32,460 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,460 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,461 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,461 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~i~0_2 0) InVars {} OutVars{main_~i~0=v_main_~i~0_2} AuxVars[] AssignedVars[main_~i~0] [2018-04-12 00:49:32,461 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,461 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,461 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,461 DEBUG L331 ransitionTransformer]: Formula: (= |v_#valid_5| (store |v_#valid_6| |v_main_#t~malloc3.base_3| 0)) InVars {main_#t~malloc3.base=|v_main_#t~malloc3.base_3|, #valid=|v_#valid_6|} OutVars{main_#t~malloc3.base=|v_main_#t~malloc3.base_3|, #valid=|v_#valid_5|} AuxVars[] AssignedVars[#valid] [2018-04-12 00:49:32,461 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,461 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,462 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,462 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,462 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,462 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,462 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,462 DEBUG L331 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,463 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,463 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,463 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,463 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,463 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,463 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,463 DEBUG L356 ransitionTransformer]: {main_#t~malloc3.base=|v_main_#t~malloc3.base_4|, main_#t~malloc3.offset=|v_main_#t~malloc3.offset_4|} [2018-04-12 00:49:32,463 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,463 DEBUG L358 ransitionTransformer]: {} [2018-04-12 00:49:32,463 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,464 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,464 DEBUG L331 ransitionTransformer]: Formula: (not (< v_main_~i~0_3 v_main_~length~0_6)) InVars {main_~i~0=v_main_~i~0_3, main_~length~0=v_main_~length~0_6} OutVars{main_~i~0=v_main_~i~0_3, main_~length~0=v_main_~length~0_6} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,464 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,464 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,464 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,464 DEBUG L331 ransitionTransformer]: Formula: (< v_main_~i~0_4 v_main_~length~0_7) InVars {main_~i~0=v_main_~i~0_4, main_~length~0=v_main_~length~0_7} OutVars{main_~i~0=v_main_~i~0_4, main_~length~0=v_main_~length~0_7} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,464 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,464 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,465 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,465 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~j~0_2 0) InVars {} OutVars{main_~j~0=v_main_~j~0_2} AuxVars[] AssignedVars[main_~j~0] [2018-04-12 00:49:32,465 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,465 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,465 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,465 DEBUG L331 ransitionTransformer]: Formula: (= |v_#valid_17| |old(#valid)|) InVars {#valid=|v_#valid_17|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_17|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,465 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,465 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,465 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,466 DEBUG L331 ransitionTransformer]: Formula: (not (= |v_#valid_18| |old(#valid)|)) InVars {#valid=|v_#valid_18|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_18|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,466 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,466 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,466 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,466 DEBUG L331 ransitionTransformer]: Formula: (and (<= |v_main_#t~nondet5_1| 2147483647) (<= 0 (+ |v_main_#t~nondet5_1| 2147483648))) InVars {main_#t~nondet5=|v_main_#t~nondet5_1|} OutVars{main_#t~nondet5=|v_main_#t~nondet5_1|} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,466 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,467 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,467 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,467 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,467 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,467 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,467 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,468 DEBUG L331 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,468 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,468 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,468 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,468 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~val~0_2 |v_main_#t~nondet5_2|) InVars {main_#t~nondet5=|v_main_#t~nondet5_2|} OutVars{main_#t~nondet5=|v_main_#t~nondet5_2|, main_~val~0=v_main_~val~0_2} AuxVars[] AssignedVars[main_~val~0] [2018-04-12 00:49:32,468 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,469 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,469 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,469 DEBUG L331 ransitionTransformer]: Formula: (not (< v_main_~j~0_3 v_main_~length~0_8)) InVars {main_~length~0=v_main_~length~0_8, main_~j~0=v_main_~j~0_3} OutVars{main_~length~0=v_main_~length~0_8, main_~j~0=v_main_~j~0_3} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,469 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,469 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,469 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,470 DEBUG L331 ransitionTransformer]: Formula: (< v_main_~j~0_4 v_main_~length~0_9) InVars {main_~length~0=v_main_~length~0_9, main_~j~0=v_main_~j~0_4} OutVars{main_~length~0=v_main_~length~0_9, main_~j~0=v_main_~j~0_4} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,470 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,470 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,470 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,470 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#res_2| 0) InVars {} OutVars{main_#res=|v_main_#res_2|} AuxVars[] AssignedVars[main_#res] [2018-04-12 00:49:32,470 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,471 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,471 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,471 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,471 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,471 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,471 DEBUG L356 ransitionTransformer]: {main_#t~nondet5=|v_main_#t~nondet5_3|} [2018-04-12 00:49:32,471 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,472 DEBUG L358 ransitionTransformer]: {} [2018-04-12 00:49:32,472 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,472 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,472 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,472 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,472 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,473 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,473 DEBUG L331 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,473 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,473 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,473 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,473 DEBUG L331 ransitionTransformer]: Formula: (= (store |v_#valid_16| |v_main_#t~malloc3.base_5| 0) |v_#valid_15|) InVars {main_#t~malloc3.base=|v_main_#t~malloc3.base_5|, #valid=|v_#valid_16|} OutVars{main_#t~malloc3.base=|v_main_#t~malloc3.base_5|, #valid=|v_#valid_15|} AuxVars[] AssignedVars[#valid] [2018-04-12 00:49:32,474 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,474 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,474 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,474 DEBUG L331 ransitionTransformer]: Formula: (< v_main_~val~0_3 0) InVars {main_~val~0=v_main_~val~0_3} OutVars{main_~val~0=v_main_~val~0_3} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,474 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,474 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,475 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,475 DEBUG L331 ransitionTransformer]: Formula: (not (< v_main_~val~0_5 0)) InVars {main_~val~0=v_main_~val~0_5} OutVars{main_~val~0=v_main_~val~0_5} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,475 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,475 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,478 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,478 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse1 (* 4 v_main_~j~0_5))) (let ((.cse0 (+ .cse1 v_main_~arr~0.offset_6))) (and (= |v_main_#t~mem7_1| (select (select |v_#memory_int_part_locs_64_locs_66_1| v_main_~arr~0.base_7) .cse0)) (= 1 (select |v_#valid_9| v_main_~arr~0.base_7)) (<= (+ .cse1 v_main_~arr~0.offset_6 4) (select |v_#length_5| v_main_~arr~0.base_7)) (<= 0 .cse0)))) InVars {main_~arr~0.base=v_main_~arr~0.base_7, main_~j~0=v_main_~j~0_5, #valid=|v_#valid_9|, #length=|v_#length_5|, #memory_int_part_locs_64_locs_66=|v_#memory_int_part_locs_64_locs_66_1|, main_~arr~0.offset=v_main_~arr~0.offset_6} OutVars{main_~arr~0.base=v_main_~arr~0.base_7, main_~j~0=v_main_~j~0_5, #valid=|v_#valid_9|, main_#t~mem7=|v_main_#t~mem7_1|, #length=|v_#length_5|, #memory_int_part_locs_64_locs_66=|v_#memory_int_part_locs_64_locs_66_1|, main_~arr~0.offset=v_main_~arr~0.offset_6} AuxVars[] AssignedVars[main_#t~mem7] [2018-04-12 00:49:32,478 DEBUG L338 ransitionTransformer]: formula has changed [2018-04-12 00:49:32,478 DEBUG L339 ransitionTransformer]: old formula: [2018-04-12 00:49:32,479 DEBUG L340 ransitionTransformer]: (let ((.cse1 (* 4 v_main_~j~0_5))) (let ((.cse0 (+ .cse1 v_main_~arr~0.offset_6))) (and (= |v_main_#t~mem7_1| (select (select |v_#memory_int_3| v_main_~arr~0.base_7) .cse0)) (= 1 (select |v_#valid_9| v_main_~arr~0.base_7)) (<= (+ .cse1 v_main_~arr~0.offset_6 4) (select |v_#length_5| v_main_~arr~0.base_7)) (<= 0 .cse0)))) [2018-04-12 00:49:32,479 DEBUG L341 ransitionTransformer]: new formula: [2018-04-12 00:49:32,479 DEBUG L342 ransitionTransformer]: (let ((.cse1 (* 4 v_main_~j~0_5))) (let ((.cse0 (+ .cse1 v_main_~arr~0.offset_6))) (and (= |v_main_#t~mem7_1| (select (select |v_#memory_int_part_locs_64_locs_66_1| v_main_~arr~0.base_7) .cse0)) (= 1 (select |v_#valid_9| v_main_~arr~0.base_7)) (<= (+ .cse1 v_main_~arr~0.offset_6 4) (select |v_#length_5| v_main_~arr~0.base_7)) (<= 0 .cse0)))) [2018-04-12 00:49:32,479 DEBUG L346 ransitionTransformer]: invars have changed [2018-04-12 00:49:32,479 DEBUG L347 ransitionTransformer]: old invars: [2018-04-12 00:49:32,479 DEBUG L348 ransitionTransformer]: {main_~arr~0.base=v_main_~arr~0.base_7, main_~j~0=v_main_~j~0_5, #valid=|v_#valid_9|, #memory_int=|v_#memory_int_3|, #length=|v_#length_5|, main_~arr~0.offset=v_main_~arr~0.offset_6} [2018-04-12 00:49:32,480 DEBUG L349 ransitionTransformer]: new invars: [2018-04-12 00:49:32,480 DEBUG L350 ransitionTransformer]: {main_~arr~0.base=v_main_~arr~0.base_7, main_~j~0=v_main_~j~0_5, #valid=|v_#valid_9|, #length=|v_#length_5|, #memory_int_part_locs_64_locs_66=|v_#memory_int_part_locs_64_locs_66_1|, main_~arr~0.offset=v_main_~arr~0.offset_6} [2018-04-12 00:49:32,480 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,480 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,480 DEBUG L356 ransitionTransformer]: {main_~arr~0.base=v_main_~arr~0.base_7, main_~j~0=v_main_~j~0_5, #valid=|v_#valid_9|, main_#t~mem7=|v_main_#t~mem7_1|, #memory_int=|v_#memory_int_3|, #length=|v_#length_5|, main_~arr~0.offset=v_main_~arr~0.offset_6} [2018-04-12 00:49:32,480 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,481 DEBUG L358 ransitionTransformer]: {main_~arr~0.base=v_main_~arr~0.base_7, main_~j~0=v_main_~j~0_5, #valid=|v_#valid_9|, main_#t~mem7=|v_main_#t~mem7_1|, #length=|v_#length_5|, #memory_int_part_locs_64_locs_66=|v_#memory_int_part_locs_64_locs_66_1|, main_~arr~0.offset=v_main_~arr~0.offset_6} [2018-04-12 00:49:32,481 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,481 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,481 DEBUG L331 ransitionTransformer]: Formula: (not (= 1 (select |v_#valid_10| v_main_~arr~0.base_8))) InVars {#valid=|v_#valid_10|, main_~arr~0.base=v_main_~arr~0.base_8} OutVars{#valid=|v_#valid_10|, main_~arr~0.base=v_main_~arr~0.base_8} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,481 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,481 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,482 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,482 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse0 (* 4 v_main_~j~0_6))) (or (not (<= 0 (+ .cse0 v_main_~arr~0.offset_7))) (not (<= (+ .cse0 v_main_~arr~0.offset_7 4) (select |v_#length_6| v_main_~arr~0.base_9))))) InVars {#length=|v_#length_6|, main_~arr~0.offset=v_main_~arr~0.offset_7, main_~j~0=v_main_~j~0_6, main_~arr~0.base=v_main_~arr~0.base_9} OutVars{#length=|v_#length_6|, main_~arr~0.offset=v_main_~arr~0.offset_7, main_~j~0=v_main_~j~0_6, main_~arr~0.base=v_main_~arr~0.base_9} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,482 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,482 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,483 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,483 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#t~post6_1| v_main_~j~0_11) InVars {main_~j~0=v_main_~j~0_11} OutVars{main_#t~post6=|v_main_#t~post6_1|, main_~j~0=v_main_~j~0_11} AuxVars[] AssignedVars[main_#t~post6] [2018-04-12 00:49:32,483 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,483 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,483 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,483 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,484 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,484 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,484 DEBUG L356 ransitionTransformer]: {main_#t~malloc3.base=|v_main_#t~malloc3.base_6|, main_#t~malloc3.offset=|v_main_#t~malloc3.offset_6|} [2018-04-12 00:49:32,484 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,484 DEBUG L358 ransitionTransformer]: {} [2018-04-12 00:49:32,484 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,484 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,485 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~val~0_4 0) InVars {} OutVars{main_~val~0=v_main_~val~0_4} AuxVars[] AssignedVars[main_~val~0] [2018-04-12 00:49:32,485 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,485 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,486 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,487 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse1 (* 4 v_main_~i~0_5))) (let ((.cse0 (+ .cse1 v_main_~arr~0.offset_4))) (and (= |v_#memory_int_part_locs_64_locs_66_2| (store |v_#memory_int_part_locs_64_locs_66_3| v_main_~arr~0.base_4 (store (select |v_#memory_int_part_locs_64_locs_66_3| v_main_~arr~0.base_4) .cse0 v_main_~val~0_6))) (= (select |v_#valid_7| v_main_~arr~0.base_4) 1) (<= (+ .cse1 v_main_~arr~0.offset_4 4) (select |v_#length_3| v_main_~arr~0.base_4)) (<= 0 .cse0)))) InVars {main_~val~0=v_main_~val~0_6, main_~arr~0.base=v_main_~arr~0.base_4, #valid=|v_#valid_7|, main_~i~0=v_main_~i~0_5, #length=|v_#length_3|, #memory_int_part_locs_64_locs_66=|v_#memory_int_part_locs_64_locs_66_3|, main_~arr~0.offset=v_main_~arr~0.offset_4} OutVars{main_~val~0=v_main_~val~0_6, main_~arr~0.base=v_main_~arr~0.base_4, #valid=|v_#valid_7|, main_~i~0=v_main_~i~0_5, #length=|v_#length_3|, #memory_int_part_locs_64_locs_66=|v_#memory_int_part_locs_64_locs_66_2|, main_~arr~0.offset=v_main_~arr~0.offset_4} AuxVars[] AssignedVars[#memory_int_part_locs_64_locs_66] [2018-04-12 00:49:32,487 DEBUG L338 ransitionTransformer]: formula has changed [2018-04-12 00:49:32,487 DEBUG L339 ransitionTransformer]: old formula: [2018-04-12 00:49:32,487 DEBUG L340 ransitionTransformer]: (let ((.cse1 (* 4 v_main_~i~0_5))) (let ((.cse0 (+ .cse1 v_main_~arr~0.offset_4))) (and (= |v_#memory_int_1| (store |v_#memory_int_2| v_main_~arr~0.base_4 (store (select |v_#memory_int_2| v_main_~arr~0.base_4) .cse0 v_main_~val~0_6))) (= (select |v_#valid_7| v_main_~arr~0.base_4) 1) (<= (+ .cse1 v_main_~arr~0.offset_4 4) (select |v_#length_3| v_main_~arr~0.base_4)) (<= 0 .cse0)))) [2018-04-12 00:49:32,487 DEBUG L341 ransitionTransformer]: new formula: [2018-04-12 00:49:32,487 DEBUG L342 ransitionTransformer]: (let ((.cse1 (* 4 v_main_~i~0_5))) (let ((.cse0 (+ .cse1 v_main_~arr~0.offset_4))) (and (= |v_#memory_int_part_locs_64_locs_66_2| (store |v_#memory_int_part_locs_64_locs_66_3| v_main_~arr~0.base_4 (store (select |v_#memory_int_part_locs_64_locs_66_3| v_main_~arr~0.base_4) .cse0 v_main_~val~0_6))) (= (select |v_#valid_7| v_main_~arr~0.base_4) 1) (<= (+ .cse1 v_main_~arr~0.offset_4 4) (select |v_#length_3| v_main_~arr~0.base_4)) (<= 0 .cse0)))) [2018-04-12 00:49:32,487 DEBUG L346 ransitionTransformer]: invars have changed [2018-04-12 00:49:32,488 DEBUG L347 ransitionTransformer]: old invars: [2018-04-12 00:49:32,488 DEBUG L348 ransitionTransformer]: {main_~val~0=v_main_~val~0_6, main_~arr~0.base=v_main_~arr~0.base_4, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_2|, main_~i~0=v_main_~i~0_5, #length=|v_#length_3|, main_~arr~0.offset=v_main_~arr~0.offset_4} [2018-04-12 00:49:32,488 DEBUG L349 ransitionTransformer]: new invars: [2018-04-12 00:49:32,488 DEBUG L350 ransitionTransformer]: {main_~val~0=v_main_~val~0_6, main_~arr~0.base=v_main_~arr~0.base_4, #valid=|v_#valid_7|, main_~i~0=v_main_~i~0_5, #length=|v_#length_3|, #memory_int_part_locs_64_locs_66=|v_#memory_int_part_locs_64_locs_66_3|, main_~arr~0.offset=v_main_~arr~0.offset_4} [2018-04-12 00:49:32,488 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,488 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,488 DEBUG L356 ransitionTransformer]: {main_~val~0=v_main_~val~0_6, main_~arr~0.base=v_main_~arr~0.base_4, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_1|, main_~i~0=v_main_~i~0_5, #length=|v_#length_3|, main_~arr~0.offset=v_main_~arr~0.offset_4} [2018-04-12 00:49:32,488 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,488 DEBUG L358 ransitionTransformer]: {main_~val~0=v_main_~val~0_6, main_~arr~0.base=v_main_~arr~0.base_4, #valid=|v_#valid_7|, main_~i~0=v_main_~i~0_5, #length=|v_#length_3|, #memory_int_part_locs_64_locs_66=|v_#memory_int_part_locs_64_locs_66_2|, main_~arr~0.offset=v_main_~arr~0.offset_4} [2018-04-12 00:49:32,488 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,488 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,489 DEBUG L331 ransitionTransformer]: Formula: (not (= 1 (select |v_#valid_8| v_main_~arr~0.base_5))) InVars {#valid=|v_#valid_8|, main_~arr~0.base=v_main_~arr~0.base_5} OutVars{#valid=|v_#valid_8|, main_~arr~0.base=v_main_~arr~0.base_5} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,489 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,489 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,489 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,489 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse0 (* 4 v_main_~i~0_6))) (or (not (<= (+ .cse0 v_main_~arr~0.offset_5 4) (select |v_#length_4| v_main_~arr~0.base_6))) (not (<= 0 (+ .cse0 v_main_~arr~0.offset_5))))) InVars {main_~i~0=v_main_~i~0_6, #length=|v_#length_4|, main_~arr~0.offset=v_main_~arr~0.offset_5, main_~arr~0.base=v_main_~arr~0.base_6} OutVars{main_~i~0=v_main_~i~0_6, #length=|v_#length_4|, main_~arr~0.offset=v_main_~arr~0.offset_5, main_~arr~0.base=v_main_~arr~0.base_6} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,489 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,489 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,489 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,490 DEBUG L331 ransitionTransformer]: Formula: (not (< 0 |v_main_#t~mem7_2|)) InVars {main_#t~mem7=|v_main_#t~mem7_2|} OutVars{main_#t~mem7=|v_main_#t~mem7_2|} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,490 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,490 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,490 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,490 DEBUG L331 ransitionTransformer]: Formula: (< 0 |v_main_#t~mem7_4|) InVars {main_#t~mem7=|v_main_#t~mem7_4|} OutVars{main_#t~mem7=|v_main_#t~mem7_4|} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,490 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,490 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,490 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,490 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~j~0_12 (+ |v_main_#t~post6_2| 1)) InVars {main_#t~post6=|v_main_#t~post6_2|} OutVars{main_#t~post6=|v_main_#t~post6_2|, main_~j~0=v_main_~j~0_12} AuxVars[] AssignedVars[main_~j~0] [2018-04-12 00:49:32,490 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,491 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,491 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,491 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#t~post4_1| v_main_~i~0_7) InVars {main_~i~0=v_main_~i~0_7} OutVars{main_#t~post4=|v_main_#t~post4_1|, main_~i~0=v_main_~i~0_7} AuxVars[] AssignedVars[main_#t~post4] [2018-04-12 00:49:32,491 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,491 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,491 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,491 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,491 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,491 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,491 DEBUG L356 ransitionTransformer]: {main_#t~mem7=|v_main_#t~mem7_3|} [2018-04-12 00:49:32,491 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,492 DEBUG L358 ransitionTransformer]: {} [2018-04-12 00:49:32,492 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,492 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,492 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,492 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,492 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,492 DEBUG L356 ransitionTransformer]: {main_#t~mem7=|v_main_#t~mem7_5|} [2018-04-12 00:49:32,492 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,492 DEBUG L358 ransitionTransformer]: {} [2018-04-12 00:49:32,492 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,492 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,493 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,493 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,493 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,493 DEBUG L356 ransitionTransformer]: {main_#t~post6=|v_main_#t~post6_3|} [2018-04-12 00:49:32,493 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,493 DEBUG L358 ransitionTransformer]: {} [2018-04-12 00:49:32,493 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,493 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,493 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~i~0_8 (+ |v_main_#t~post4_2| 1)) InVars {main_#t~post4=|v_main_#t~post4_2|} OutVars{main_~i~0=v_main_~i~0_8, main_#t~post4=|v_main_#t~post4_2|} AuxVars[] AssignedVars[main_~i~0] [2018-04-12 00:49:32,493 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,493 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,494 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,494 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse1 (* 4 v_main_~j~0_7))) (let ((.cse0 (+ v_main_~arr~0.offset_8 .cse1))) (and (<= 0 .cse0) (= 1 (select |v_#valid_11| v_main_~arr~0.base_10)) (= (select (select |v_#memory_int_part_locs_64_locs_66_4| v_main_~arr~0.base_10) .cse0) |v_main_#t~mem8_1|) (<= (+ v_main_~arr~0.offset_8 .cse1 4) (select |v_#length_7| v_main_~arr~0.base_10))))) InVars {main_~arr~0.base=v_main_~arr~0.base_10, main_~j~0=v_main_~j~0_7, #valid=|v_#valid_11|, #length=|v_#length_7|, #memory_int_part_locs_64_locs_66=|v_#memory_int_part_locs_64_locs_66_4|, main_~arr~0.offset=v_main_~arr~0.offset_8} OutVars{main_~arr~0.base=v_main_~arr~0.base_10, main_~j~0=v_main_~j~0_7, #valid=|v_#valid_11|, main_#t~mem8=|v_main_#t~mem8_1|, #length=|v_#length_7|, #memory_int_part_locs_64_locs_66=|v_#memory_int_part_locs_64_locs_66_4|, main_~arr~0.offset=v_main_~arr~0.offset_8} AuxVars[] AssignedVars[main_#t~mem8] [2018-04-12 00:49:32,494 DEBUG L338 ransitionTransformer]: formula has changed [2018-04-12 00:49:32,494 DEBUG L339 ransitionTransformer]: old formula: [2018-04-12 00:49:32,494 DEBUG L340 ransitionTransformer]: (let ((.cse1 (* 4 v_main_~j~0_7))) (let ((.cse0 (+ v_main_~arr~0.offset_8 .cse1))) (and (<= 0 .cse0) (= 1 (select |v_#valid_11| v_main_~arr~0.base_10)) (= (select (select |v_#memory_int_4| v_main_~arr~0.base_10) .cse0) |v_main_#t~mem8_1|) (<= (+ v_main_~arr~0.offset_8 .cse1 4) (select |v_#length_7| v_main_~arr~0.base_10))))) [2018-04-12 00:49:32,494 DEBUG L341 ransitionTransformer]: new formula: [2018-04-12 00:49:32,494 DEBUG L342 ransitionTransformer]: (let ((.cse1 (* 4 v_main_~j~0_7))) (let ((.cse0 (+ v_main_~arr~0.offset_8 .cse1))) (and (<= 0 .cse0) (= 1 (select |v_#valid_11| v_main_~arr~0.base_10)) (= (select (select |v_#memory_int_part_locs_64_locs_66_4| v_main_~arr~0.base_10) .cse0) |v_main_#t~mem8_1|) (<= (+ v_main_~arr~0.offset_8 .cse1 4) (select |v_#length_7| v_main_~arr~0.base_10))))) [2018-04-12 00:49:32,494 DEBUG L346 ransitionTransformer]: invars have changed [2018-04-12 00:49:32,495 DEBUG L347 ransitionTransformer]: old invars: [2018-04-12 00:49:32,495 DEBUG L348 ransitionTransformer]: {main_~arr~0.base=v_main_~arr~0.base_10, main_~j~0=v_main_~j~0_7, #valid=|v_#valid_11|, #memory_int=|v_#memory_int_4|, #length=|v_#length_7|, main_~arr~0.offset=v_main_~arr~0.offset_8} [2018-04-12 00:49:32,495 DEBUG L349 ransitionTransformer]: new invars: [2018-04-12 00:49:32,495 DEBUG L350 ransitionTransformer]: {main_~arr~0.base=v_main_~arr~0.base_10, main_~j~0=v_main_~j~0_7, #valid=|v_#valid_11|, #length=|v_#length_7|, #memory_int_part_locs_64_locs_66=|v_#memory_int_part_locs_64_locs_66_4|, main_~arr~0.offset=v_main_~arr~0.offset_8} [2018-04-12 00:49:32,495 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,495 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,495 DEBUG L356 ransitionTransformer]: {main_~arr~0.base=v_main_~arr~0.base_10, main_~j~0=v_main_~j~0_7, #valid=|v_#valid_11|, #memory_int=|v_#memory_int_4|, main_#t~mem8=|v_main_#t~mem8_1|, #length=|v_#length_7|, main_~arr~0.offset=v_main_~arr~0.offset_8} [2018-04-12 00:49:32,495 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,495 DEBUG L358 ransitionTransformer]: {main_~arr~0.base=v_main_~arr~0.base_10, main_~j~0=v_main_~j~0_7, #valid=|v_#valid_11|, main_#t~mem8=|v_main_#t~mem8_1|, #length=|v_#length_7|, #memory_int_part_locs_64_locs_66=|v_#memory_int_part_locs_64_locs_66_4|, main_~arr~0.offset=v_main_~arr~0.offset_8} [2018-04-12 00:49:32,495 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,495 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,496 DEBUG L331 ransitionTransformer]: Formula: (not (= 1 (select |v_#valid_12| v_main_~arr~0.base_11))) InVars {#valid=|v_#valid_12|, main_~arr~0.base=v_main_~arr~0.base_11} OutVars{#valid=|v_#valid_12|, main_~arr~0.base=v_main_~arr~0.base_11} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,496 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,496 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,496 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,496 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse0 (* 4 v_main_~j~0_8))) (or (not (<= 0 (+ .cse0 v_main_~arr~0.offset_9))) (not (<= (+ .cse0 v_main_~arr~0.offset_9 4) (select |v_#length_8| v_main_~arr~0.base_12))))) InVars {#length=|v_#length_8|, main_~arr~0.offset=v_main_~arr~0.offset_9, main_~j~0=v_main_~j~0_8, main_~arr~0.base=v_main_~arr~0.base_12} OutVars{#length=|v_#length_8|, main_~arr~0.offset=v_main_~arr~0.offset_9, main_~j~0=v_main_~j~0_8, main_~arr~0.base=v_main_~arr~0.base_12} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,496 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,496 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,496 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,496 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,497 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,497 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,497 DEBUG L356 ransitionTransformer]: {main_#t~post4=|v_main_#t~post4_3|} [2018-04-12 00:49:32,497 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,497 DEBUG L358 ransitionTransformer]: {} [2018-04-12 00:49:32,497 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,497 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,497 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#t~post9_1| |v_main_#t~mem8_2|) InVars {main_#t~mem8=|v_main_#t~mem8_2|} OutVars{main_#t~mem8=|v_main_#t~mem8_2|, main_#t~post9=|v_main_#t~post9_1|} AuxVars[] AssignedVars[main_#t~post9] [2018-04-12 00:49:32,497 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,497 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,498 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,498 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse0 (* 4 v_main_~j~0_9))) (let ((.cse1 (+ .cse0 v_main_~arr~0.offset_10))) (and (<= (+ .cse0 v_main_~arr~0.offset_10 4) (select |v_#length_9| v_main_~arr~0.base_13)) (= |v_#memory_int_part_locs_64_locs_66_5| (store |v_#memory_int_part_locs_64_locs_66_6| v_main_~arr~0.base_13 (store (select |v_#memory_int_part_locs_64_locs_66_6| v_main_~arr~0.base_13) .cse1 (+ |v_main_#t~post9_2| (- 1))))) (<= 0 .cse1) (= (select |v_#valid_13| v_main_~arr~0.base_13) 1)))) InVars {main_~arr~0.base=v_main_~arr~0.base_13, main_~j~0=v_main_~j~0_9, #valid=|v_#valid_13|, #length=|v_#length_9|, #memory_int_part_locs_64_locs_66=|v_#memory_int_part_locs_64_locs_66_6|, main_#t~post9=|v_main_#t~post9_2|, main_~arr~0.offset=v_main_~arr~0.offset_10} OutVars{main_~arr~0.base=v_main_~arr~0.base_13, main_~j~0=v_main_~j~0_9, #valid=|v_#valid_13|, #length=|v_#length_9|, #memory_int_part_locs_64_locs_66=|v_#memory_int_part_locs_64_locs_66_5|, main_#t~post9=|v_main_#t~post9_2|, main_~arr~0.offset=v_main_~arr~0.offset_10} AuxVars[] AssignedVars[#memory_int_part_locs_64_locs_66] [2018-04-12 00:49:32,498 DEBUG L338 ransitionTransformer]: formula has changed [2018-04-12 00:49:32,498 DEBUG L339 ransitionTransformer]: old formula: [2018-04-12 00:49:32,498 DEBUG L340 ransitionTransformer]: (let ((.cse0 (* 4 v_main_~j~0_9))) (let ((.cse1 (+ .cse0 v_main_~arr~0.offset_10))) (and (<= (+ .cse0 v_main_~arr~0.offset_10 4) (select |v_#length_9| v_main_~arr~0.base_13)) (= |v_#memory_int_5| (store |v_#memory_int_6| v_main_~arr~0.base_13 (store (select |v_#memory_int_6| v_main_~arr~0.base_13) .cse1 (+ |v_main_#t~post9_2| (- 1))))) (<= 0 .cse1) (= (select |v_#valid_13| v_main_~arr~0.base_13) 1)))) [2018-04-12 00:49:32,498 DEBUG L341 ransitionTransformer]: new formula: [2018-04-12 00:49:32,498 DEBUG L342 ransitionTransformer]: (let ((.cse0 (* 4 v_main_~j~0_9))) (let ((.cse1 (+ .cse0 v_main_~arr~0.offset_10))) (and (<= (+ .cse0 v_main_~arr~0.offset_10 4) (select |v_#length_9| v_main_~arr~0.base_13)) (= |v_#memory_int_part_locs_64_locs_66_5| (store |v_#memory_int_part_locs_64_locs_66_6| v_main_~arr~0.base_13 (store (select |v_#memory_int_part_locs_64_locs_66_6| v_main_~arr~0.base_13) .cse1 (+ |v_main_#t~post9_2| (- 1))))) (<= 0 .cse1) (= (select |v_#valid_13| v_main_~arr~0.base_13) 1)))) [2018-04-12 00:49:32,499 DEBUG L346 ransitionTransformer]: invars have changed [2018-04-12 00:49:32,499 DEBUG L347 ransitionTransformer]: old invars: [2018-04-12 00:49:32,499 DEBUG L348 ransitionTransformer]: {main_~arr~0.base=v_main_~arr~0.base_13, main_~j~0=v_main_~j~0_9, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_6|, #length=|v_#length_9|, main_#t~post9=|v_main_#t~post9_2|, main_~arr~0.offset=v_main_~arr~0.offset_10} [2018-04-12 00:49:32,499 DEBUG L349 ransitionTransformer]: new invars: [2018-04-12 00:49:32,499 DEBUG L350 ransitionTransformer]: {main_~arr~0.base=v_main_~arr~0.base_13, main_~j~0=v_main_~j~0_9, #valid=|v_#valid_13|, #length=|v_#length_9|, #memory_int_part_locs_64_locs_66=|v_#memory_int_part_locs_64_locs_66_6|, main_#t~post9=|v_main_#t~post9_2|, main_~arr~0.offset=v_main_~arr~0.offset_10} [2018-04-12 00:49:32,499 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,499 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,500 DEBUG L356 ransitionTransformer]: {main_~arr~0.base=v_main_~arr~0.base_13, main_~j~0=v_main_~j~0_9, #valid=|v_#valid_13|, #memory_int=|v_#memory_int_5|, #length=|v_#length_9|, main_#t~post9=|v_main_#t~post9_2|, main_~arr~0.offset=v_main_~arr~0.offset_10} [2018-04-12 00:49:32,500 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,500 DEBUG L358 ransitionTransformer]: {main_~arr~0.base=v_main_~arr~0.base_13, main_~j~0=v_main_~j~0_9, #valid=|v_#valid_13|, #length=|v_#length_9|, #memory_int_part_locs_64_locs_66=|v_#memory_int_part_locs_64_locs_66_5|, main_#t~post9=|v_main_#t~post9_2|, main_~arr~0.offset=v_main_~arr~0.offset_10} [2018-04-12 00:49:32,500 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,501 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,501 DEBUG L331 ransitionTransformer]: Formula: (not (= (select |v_#valid_14| v_main_~arr~0.base_14) 1)) InVars {#valid=|v_#valid_14|, main_~arr~0.base=v_main_~arr~0.base_14} OutVars{#valid=|v_#valid_14|, main_~arr~0.base=v_main_~arr~0.base_14} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,501 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,501 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,501 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,502 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse0 (* 4 v_main_~j~0_10))) (or (not (<= 0 (+ v_main_~arr~0.offset_11 .cse0))) (not (<= (+ v_main_~arr~0.offset_11 .cse0 4) (select |v_#length_10| v_main_~arr~0.base_15))))) InVars {#length=|v_#length_10|, main_~arr~0.offset=v_main_~arr~0.offset_11, main_~j~0=v_main_~j~0_10, main_~arr~0.base=v_main_~arr~0.base_15} OutVars{#length=|v_#length_10|, main_~arr~0.offset=v_main_~arr~0.offset_11, main_~j~0=v_main_~j~0_10, main_~arr~0.base=v_main_~arr~0.base_15} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,502 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,502 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,502 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,502 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,502 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,503 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,503 DEBUG L356 ransitionTransformer]: {main_#t~post9=|v_main_#t~post9_3|} [2018-04-12 00:49:32,503 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,503 DEBUG L358 ransitionTransformer]: {} [2018-04-12 00:49:32,503 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,503 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,503 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,504 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,504 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,504 DEBUG L356 ransitionTransformer]: {main_#t~mem8=|v_main_#t~mem8_3|} [2018-04-12 00:49:32,504 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,504 DEBUG L358 ransitionTransformer]: {} [2018-04-12 00:49:32,504 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,504 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,505 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 00:49:32,505 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 00:49:32,505 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,505 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 00:49:32,505 DEBUG L331 ransitionTransformer]: Formula: (= |v_ULTIMATE.start_#t~ret10_2| |v_main_#resOutParam_1|) InVars {main_#res=|v_main_#resOutParam_1|} OutVars{ULTIMATE.start_#t~ret10=|v_ULTIMATE.start_#t~ret10_2|, main_#res=|v_main_#resOutParam_1|} AuxVars[] AssignedVars[ULTIMATE.start_#t~ret10] [2018-04-12 00:49:32,505 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 00:49:32,506 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 00:49:32,506 DEBUG L356 ransitionTransformer]: {ULTIMATE.start_#t~ret10=|v_ULTIMATE.start_#t~ret10_2|} [2018-04-12 00:49:32,506 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 00:49:32,506 DEBUG L358 ransitionTransformer]: {ULTIMATE.start_#t~ret10=|v_ULTIMATE.start_#t~ret10_2|, main_#res=|v_main_#resOutParam_1|} [2018-04-12 00:49:32,506 DEBUG L360 ransitionTransformer]: [2018-04-12 00:49:32,507 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 111 non ball SCCs. Number of states in SCCs 111. [2018-04-12 00:49:32,526 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 12.04 12:49:32 BasicIcfg [2018-04-12 00:49:32,527 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2018-04-12 00:49:32,528 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-12 00:49:32,528 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-12 00:49:32,531 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-12 00:49:32,531 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.04 12:47:37" (1/4) ... [2018-04-12 00:49:32,532 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@49afef4d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 12:49:32, skipping insertion in model container [2018-04-12 00:49:32,532 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:47:38" (2/4) ... [2018-04-12 00:49:32,532 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@49afef4d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 12:49:32, skipping insertion in model container [2018-04-12 00:49:32,532 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 12:47:38" (3/4) ... [2018-04-12 00:49:32,533 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@49afef4d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 12.04 12:49:32, skipping insertion in model container [2018-04-12 00:49:32,533 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 12.04 12:49:32" (4/4) ... [2018-04-12 00:49:32,534 INFO L107 eAbstractionObserver]: Analyzing ICFG memPartitionedIcfg [2018-04-12 00:49:32,544 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-12 00:49:32,553 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 9 error locations. [2018-04-12 00:49:32,594 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-12 00:49:32,594 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-12 00:49:32,595 INFO L370 AbstractCegarLoop]: Hoare is true [2018-04-12 00:49:32,595 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-12 00:49:32,595 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-12 00:49:32,595 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-12 00:49:32,595 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-12 00:49:32,595 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-12 00:49:32,595 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-12 00:49:32,596 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-12 00:49:32,608 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states. [2018-04-12 00:49:32,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-04-12 00:49:32,612 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:32,613 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:32,613 INFO L408 AbstractCegarLoop]: === Iteration 1 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:32,617 INFO L82 PathProgramCache]: Analyzing trace with hash -164603858, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:32,639 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:32,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:32,680 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:32,723 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:32,723 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:32,731 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:32,754 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 00:49:32,755 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [] total 4 [2018-04-12 00:49:32,756 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 00:49:32,763 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 00:49:32,764 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 00:49:32,765 INFO L87 Difference]: Start difference. First operand 64 states. Second operand 4 states. [2018-04-12 00:49:32,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:32,815 INFO L93 Difference]: Finished difference Result 94 states and 105 transitions. [2018-04-12 00:49:32,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 00:49:32,816 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2018-04-12 00:49:32,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:32,823 INFO L225 Difference]: With dead ends: 94 [2018-04-12 00:49:32,824 INFO L226 Difference]: Without dead ends: 58 [2018-04-12 00:49:32,826 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 00:49:32,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-04-12 00:49:32,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2018-04-12 00:49:32,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-04-12 00:49:32,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 62 transitions. [2018-04-12 00:49:32,854 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 62 transitions. Word has length 20 [2018-04-12 00:49:32,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:32,854 INFO L459 AbstractCegarLoop]: Abstraction has 58 states and 62 transitions. [2018-04-12 00:49:32,854 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 00:49:32,854 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 62 transitions. [2018-04-12 00:49:32,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-12 00:49:32,855 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:32,855 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:32,855 INFO L408 AbstractCegarLoop]: === Iteration 2 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:32,855 INFO L82 PathProgramCache]: Analyzing trace with hash 1807994326, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:32,863 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:32,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:32,881 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:32,904 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:32,904 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:32,922 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:32,954 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 00:49:32,955 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [] total 5 [2018-04-12 00:49:32,956 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 00:49:32,956 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 00:49:32,956 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 00:49:32,956 INFO L87 Difference]: Start difference. First operand 58 states and 62 transitions. Second operand 5 states. [2018-04-12 00:49:33,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:33,021 INFO L93 Difference]: Finished difference Result 97 states and 104 transitions. [2018-04-12 00:49:33,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 00:49:33,022 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2018-04-12 00:49:33,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:33,023 INFO L225 Difference]: With dead ends: 97 [2018-04-12 00:49:33,023 INFO L226 Difference]: Without dead ends: 70 [2018-04-12 00:49:33,024 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 43 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-04-12 00:49:33,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states. [2018-04-12 00:49:33,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 60. [2018-04-12 00:49:33,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-04-12 00:49:33,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 64 transitions. [2018-04-12 00:49:33,031 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 64 transitions. Word has length 24 [2018-04-12 00:49:33,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:33,032 INFO L459 AbstractCegarLoop]: Abstraction has 60 states and 64 transitions. [2018-04-12 00:49:33,032 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 00:49:33,032 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 64 transitions. [2018-04-12 00:49:33,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-12 00:49:33,033 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:33,033 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:33,033 INFO L408 AbstractCegarLoop]: === Iteration 3 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:33,033 INFO L82 PathProgramCache]: Analyzing trace with hash 1839455674, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:33,057 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:33,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:33,073 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:33,096 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 00:49:33,097 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:33,099 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 00:49:33,099 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-12 00:49:33,106 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:33,106 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:33,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:33,137 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 00:49:33,137 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [] total 3 [2018-04-12 00:49:33,137 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 00:49:33,137 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 00:49:33,137 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 00:49:33,137 INFO L87 Difference]: Start difference. First operand 60 states and 64 transitions. Second operand 4 states. [2018-04-12 00:49:33,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:33,191 INFO L93 Difference]: Finished difference Result 60 states and 64 transitions. [2018-04-12 00:49:33,191 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 00:49:33,191 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 24 [2018-04-12 00:49:33,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:33,192 INFO L225 Difference]: With dead ends: 60 [2018-04-12 00:49:33,193 INFO L226 Difference]: Without dead ends: 56 [2018-04-12 00:49:33,193 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 00:49:33,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2018-04-12 00:49:33,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2018-04-12 00:49:33,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-04-12 00:49:33,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 60 transitions. [2018-04-12 00:49:33,199 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 60 transitions. Word has length 24 [2018-04-12 00:49:33,200 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:33,200 INFO L459 AbstractCegarLoop]: Abstraction has 56 states and 60 transitions. [2018-04-12 00:49:33,200 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 00:49:33,200 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 60 transitions. [2018-04-12 00:49:33,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-04-12 00:49:33,201 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:33,201 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:33,201 INFO L408 AbstractCegarLoop]: === Iteration 4 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:33,201 INFO L82 PathProgramCache]: Analyzing trace with hash 1839455675, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:33,212 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:33,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:33,227 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:33,246 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 00:49:33,247 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:33,254 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 00:49:33,255 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:14 [2018-04-12 00:49:33,344 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:33,344 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:33,410 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:33,441 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 00:49:33,441 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [] total 8 [2018-04-12 00:49:33,441 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 00:49:33,442 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 00:49:33,442 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2018-04-12 00:49:33,442 INFO L87 Difference]: Start difference. First operand 56 states and 60 transitions. Second operand 9 states. [2018-04-12 00:49:33,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:33,649 INFO L93 Difference]: Finished difference Result 65 states and 70 transitions. [2018-04-12 00:49:33,650 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-12 00:49:33,650 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 24 [2018-04-12 00:49:33,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:33,651 INFO L225 Difference]: With dead ends: 65 [2018-04-12 00:49:33,651 INFO L226 Difference]: Without dead ends: 64 [2018-04-12 00:49:33,651 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 39 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=55, Invalid=101, Unknown=0, NotChecked=0, Total=156 [2018-04-12 00:49:33,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-04-12 00:49:33,657 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 62. [2018-04-12 00:49:33,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-04-12 00:49:33,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 67 transitions. [2018-04-12 00:49:33,659 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 67 transitions. Word has length 24 [2018-04-12 00:49:33,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:33,659 INFO L459 AbstractCegarLoop]: Abstraction has 62 states and 67 transitions. [2018-04-12 00:49:33,659 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 00:49:33,659 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 67 transitions. [2018-04-12 00:49:33,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-04-12 00:49:33,660 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:33,660 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:33,661 INFO L408 AbstractCegarLoop]: === Iteration 5 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:33,661 INFO L82 PathProgramCache]: Analyzing trace with hash 443096129, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:33,671 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:33,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:33,690 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:33,743 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:33,743 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:33,775 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 13 [2018-04-12 00:49:33,776 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:33,792 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 00:49:33,793 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:33,797 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 00:49:33,798 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:35, output treesize:11 [2018-04-12 00:49:33,814 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:33,846 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:33,846 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 8 [2018-04-12 00:49:33,846 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 00:49:33,847 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 00:49:33,847 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2018-04-12 00:49:33,847 INFO L87 Difference]: Start difference. First operand 62 states and 67 transitions. Second operand 9 states. [2018-04-12 00:49:34,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:34,016 INFO L93 Difference]: Finished difference Result 86 states and 95 transitions. [2018-04-12 00:49:34,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-12 00:49:34,017 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 34 [2018-04-12 00:49:34,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:34,018 INFO L225 Difference]: With dead ends: 86 [2018-04-12 00:49:34,018 INFO L226 Difference]: Without dead ends: 83 [2018-04-12 00:49:34,018 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 58 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 1 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=71, Invalid=139, Unknown=0, NotChecked=0, Total=210 [2018-04-12 00:49:34,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-04-12 00:49:34,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 64. [2018-04-12 00:49:34,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-04-12 00:49:34,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 70 transitions. [2018-04-12 00:49:34,026 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 70 transitions. Word has length 34 [2018-04-12 00:49:34,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:34,026 INFO L459 AbstractCegarLoop]: Abstraction has 64 states and 70 transitions. [2018-04-12 00:49:34,026 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 00:49:34,026 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 70 transitions. [2018-04-12 00:49:34,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-04-12 00:49:34,027 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:34,027 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:34,027 INFO L408 AbstractCegarLoop]: === Iteration 6 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:34,027 INFO L82 PathProgramCache]: Analyzing trace with hash 474557477, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:34,034 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:34,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:34,048 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:34,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-12 00:49:34,052 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:34,063 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 00:49:34,064 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-04-12 00:49:34,130 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 2 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:34,130 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:34,282 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:34,301 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:34,301 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 13 [2018-04-12 00:49:34,302 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-04-12 00:49:34,302 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-04-12 00:49:34,302 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=140, Unknown=0, NotChecked=0, Total=182 [2018-04-12 00:49:34,302 INFO L87 Difference]: Start difference. First operand 64 states and 70 transitions. Second operand 14 states. [2018-04-12 00:49:34,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:34,543 INFO L93 Difference]: Finished difference Result 67 states and 73 transitions. [2018-04-12 00:49:34,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-12 00:49:34,544 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 34 [2018-04-12 00:49:34,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:34,544 INFO L225 Difference]: With dead ends: 67 [2018-04-12 00:49:34,545 INFO L226 Difference]: Without dead ends: 66 [2018-04-12 00:49:34,545 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 55 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=128, Invalid=292, Unknown=0, NotChecked=0, Total=420 [2018-04-12 00:49:34,545 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-04-12 00:49:34,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 57. [2018-04-12 00:49:34,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-04-12 00:49:34,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 62 transitions. [2018-04-12 00:49:34,551 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 62 transitions. Word has length 34 [2018-04-12 00:49:34,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:34,552 INFO L459 AbstractCegarLoop]: Abstraction has 57 states and 62 transitions. [2018-04-12 00:49:34,552 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-04-12 00:49:34,552 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 62 transitions. [2018-04-12 00:49:34,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-04-12 00:49:34,553 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:34,553 INFO L355 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:34,553 INFO L408 AbstractCegarLoop]: === Iteration 7 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:34,553 INFO L82 PathProgramCache]: Analyzing trace with hash 612635883, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:34,560 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:34,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:34,575 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:34,592 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 00:49:34,592 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:34,602 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-12 00:49:34,624 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 00:49:34,625 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [] total 5 [2018-04-12 00:49:34,625 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 00:49:34,625 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 00:49:34,625 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 00:49:34,625 INFO L87 Difference]: Start difference. First operand 57 states and 62 transitions. Second operand 5 states. [2018-04-12 00:49:34,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:34,654 INFO L93 Difference]: Finished difference Result 74 states and 79 transitions. [2018-04-12 00:49:34,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 00:49:34,654 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 36 [2018-04-12 00:49:34,654 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:34,655 INFO L225 Difference]: With dead ends: 74 [2018-04-12 00:49:34,655 INFO L226 Difference]: Without dead ends: 69 [2018-04-12 00:49:34,655 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 67 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-04-12 00:49:34,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-04-12 00:49:34,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 57. [2018-04-12 00:49:34,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-04-12 00:49:34,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 61 transitions. [2018-04-12 00:49:34,661 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 61 transitions. Word has length 36 [2018-04-12 00:49:34,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:34,662 INFO L459 AbstractCegarLoop]: Abstraction has 57 states and 61 transitions. [2018-04-12 00:49:34,662 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 00:49:34,662 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 61 transitions. [2018-04-12 00:49:34,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-04-12 00:49:34,663 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:34,663 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:34,663 INFO L408 AbstractCegarLoop]: === Iteration 8 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:34,664 INFO L82 PathProgramCache]: Analyzing trace with hash 830003659, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:34,674 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:34,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:34,689 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:34,722 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:34,722 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:34,767 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:34,787 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:34,787 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 12 [2018-04-12 00:49:34,788 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-12 00:49:34,788 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-12 00:49:34,788 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2018-04-12 00:49:34,788 INFO L87 Difference]: Start difference. First operand 57 states and 61 transitions. Second operand 12 states. [2018-04-12 00:49:34,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:34,975 INFO L93 Difference]: Finished difference Result 146 states and 158 transitions. [2018-04-12 00:49:34,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-12 00:49:34,975 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 43 [2018-04-12 00:49:34,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:34,976 INFO L225 Difference]: With dead ends: 146 [2018-04-12 00:49:34,977 INFO L226 Difference]: Without dead ends: 123 [2018-04-12 00:49:34,977 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 71 SyntacticMatches, 4 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=98, Invalid=282, Unknown=0, NotChecked=0, Total=380 [2018-04-12 00:49:34,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-04-12 00:49:34,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 103. [2018-04-12 00:49:34,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-04-12 00:49:34,988 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 112 transitions. [2018-04-12 00:49:34,988 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 112 transitions. Word has length 43 [2018-04-12 00:49:34,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:34,988 INFO L459 AbstractCegarLoop]: Abstraction has 103 states and 112 transitions. [2018-04-12 00:49:34,989 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-12 00:49:34,989 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 112 transitions. [2018-04-12 00:49:34,990 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-04-12 00:49:34,990 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:34,991 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:34,991 INFO L408 AbstractCegarLoop]: === Iteration 9 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:34,991 INFO L82 PathProgramCache]: Analyzing trace with hash -1231382539, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:34,999 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:35,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:35,014 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:35,032 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_#t~malloc3.base| Int)) (and (= 0 (select |c_old(#valid)| |main_#t~malloc3.base|)) (= |c_#valid| (store |c_old(#valid)| |main_#t~malloc3.base| 0)))) is different from true [2018-04-12 00:49:35,036 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-12 00:49:35,036 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:35,048 WARN L1011 $PredicateComparison]: unable to prove that (forall ((|v_main_#t~malloc3.base_24| Int)) (or (not (= 0 (select |c_#valid| |v_main_#t~malloc3.base_24|))) (= (store |c_#valid| |v_main_#t~malloc3.base_24| 0) |c_old(#valid)|))) is different from false [2018-04-12 00:49:35,067 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-12 00:49:35,087 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 00:49:35,087 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [] total 6 [2018-04-12 00:49:35,087 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 00:49:35,088 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 00:49:35,088 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=14, Unknown=2, NotChecked=14, Total=42 [2018-04-12 00:49:35,088 INFO L87 Difference]: Start difference. First operand 103 states and 112 transitions. Second operand 7 states. [2018-04-12 00:49:35,108 WARN L1011 $PredicateComparison]: unable to prove that (and (forall ((|v_main_#t~malloc3.base_24| Int)) (or (not (= 0 (select |c_#valid| |v_main_#t~malloc3.base_24|))) (= (store |c_#valid| |v_main_#t~malloc3.base_24| 0) |c_old(#valid)|))) (= |c_#valid| |c_old(#valid)|)) is different from false [2018-04-12 00:49:35,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:35,156 INFO L93 Difference]: Finished difference Result 126 states and 135 transitions. [2018-04-12 00:49:35,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 00:49:35,156 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 45 [2018-04-12 00:49:35,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:35,157 INFO L225 Difference]: With dead ends: 126 [2018-04-12 00:49:35,157 INFO L226 Difference]: Without dead ends: 103 [2018-04-12 00:49:35,157 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 84 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=21, Unknown=3, NotChecked=30, Total=72 [2018-04-12 00:49:35,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 103 states. [2018-04-12 00:49:35,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 103 to 103. [2018-04-12 00:49:35,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-04-12 00:49:35,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 110 transitions. [2018-04-12 00:49:35,169 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 110 transitions. Word has length 45 [2018-04-12 00:49:35,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:35,169 INFO L459 AbstractCegarLoop]: Abstraction has 103 states and 110 transitions. [2018-04-12 00:49:35,169 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 00:49:35,170 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 110 transitions. [2018-04-12 00:49:35,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-04-12 00:49:35,171 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:35,171 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:35,171 INFO L408 AbstractCegarLoop]: === Iteration 10 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:35,171 INFO L82 PathProgramCache]: Analyzing trace with hash -1236088895, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:35,181 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:35,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:35,200 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:35,213 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_#t~malloc3.base| Int)) (and (= 0 (select |c_old(#valid)| |main_#t~malloc3.base|)) (= |c_#valid| (store |c_old(#valid)| |main_#t~malloc3.base| 0)))) is different from true [2018-04-12 00:49:35,216 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-12 00:49:35,217 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:35,224 WARN L1011 $PredicateComparison]: unable to prove that (forall ((|v_main_#t~malloc3.base_25| Int)) (or (= (store |c_#valid| |v_main_#t~malloc3.base_25| 0) |c_old(#valid)|) (not (= 0 (select |c_#valid| |v_main_#t~malloc3.base_25|))))) is different from false [2018-04-12 00:49:35,235 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-12 00:49:35,254 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 00:49:35,255 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [] total 6 [2018-04-12 00:49:35,255 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 00:49:35,255 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 00:49:35,255 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=14, Unknown=2, NotChecked=14, Total=42 [2018-04-12 00:49:35,255 INFO L87 Difference]: Start difference. First operand 103 states and 110 transitions. Second operand 7 states. [2018-04-12 00:49:35,262 WARN L1011 $PredicateComparison]: unable to prove that (and (= |c_#valid| |c_old(#valid)|) (forall ((|v_main_#t~malloc3.base_25| Int)) (or (= (store |c_#valid| |v_main_#t~malloc3.base_25| 0) |c_old(#valid)|) (not (= 0 (select |c_#valid| |v_main_#t~malloc3.base_25|)))))) is different from false [2018-04-12 00:49:35,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:35,298 INFO L93 Difference]: Finished difference Result 103 states and 110 transitions. [2018-04-12 00:49:35,298 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 00:49:35,298 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 46 [2018-04-12 00:49:35,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:35,299 INFO L225 Difference]: With dead ends: 103 [2018-04-12 00:49:35,299 INFO L226 Difference]: Without dead ends: 62 [2018-04-12 00:49:35,299 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 86 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=21, Unknown=3, NotChecked=30, Total=72 [2018-04-12 00:49:35,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-04-12 00:49:35,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 62. [2018-04-12 00:49:35,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-04-12 00:49:35,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 66 transitions. [2018-04-12 00:49:35,306 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 66 transitions. Word has length 46 [2018-04-12 00:49:35,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:35,306 INFO L459 AbstractCegarLoop]: Abstraction has 62 states and 66 transitions. [2018-04-12 00:49:35,306 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 00:49:35,306 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 66 transitions. [2018-04-12 00:49:35,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-04-12 00:49:35,308 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:35,308 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:35,308 INFO L408 AbstractCegarLoop]: === Iteration 11 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:35,308 INFO L82 PathProgramCache]: Analyzing trace with hash 654806817, now seen corresponding path program 2 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:35,323 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:35,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:35,341 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:35,464 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:35,465 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:35,514 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-04-12 00:49:35,514 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:35,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 00:49:35,522 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:35,526 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 00:49:35,526 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:11 [2018-04-12 00:49:35,604 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 7 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:35,624 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:35,624 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 19 [2018-04-12 00:49:35,624 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-12 00:49:35,624 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-12 00:49:35,624 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=306, Unknown=0, NotChecked=0, Total=380 [2018-04-12 00:49:35,625 INFO L87 Difference]: Start difference. First operand 62 states and 66 transitions. Second operand 20 states. [2018-04-12 00:49:35,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:35,868 INFO L93 Difference]: Finished difference Result 98 states and 105 transitions. [2018-04-12 00:49:35,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-12 00:49:35,868 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 53 [2018-04-12 00:49:35,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:35,869 INFO L225 Difference]: With dead ends: 98 [2018-04-12 00:49:35,869 INFO L226 Difference]: Without dead ends: 97 [2018-04-12 00:49:35,869 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 126 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=250, Invalid=620, Unknown=0, NotChecked=0, Total=870 [2018-04-12 00:49:35,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-04-12 00:49:35,876 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 77. [2018-04-12 00:49:35,876 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-04-12 00:49:35,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 82 transitions. [2018-04-12 00:49:35,877 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 82 transitions. Word has length 53 [2018-04-12 00:49:35,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:35,878 INFO L459 AbstractCegarLoop]: Abstraction has 77 states and 82 transitions. [2018-04-12 00:49:35,878 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-12 00:49:35,878 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 82 transitions. [2018-04-12 00:49:35,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-04-12 00:49:35,879 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:35,879 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:35,879 INFO L408 AbstractCegarLoop]: === Iteration 12 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:35,879 INFO L82 PathProgramCache]: Analyzing trace with hash -348282133, now seen corresponding path program 3 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:35,891 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:35,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:35,912 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:35,986 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 17 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:35,986 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:36,045 INFO L134 CoverageAnalysis]: Checked inductivity of 31 backedges. 17 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:36,064 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:36,064 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 18 [2018-04-12 00:49:36,065 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-12 00:49:36,065 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-12 00:49:36,065 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=247, Unknown=0, NotChecked=0, Total=306 [2018-04-12 00:49:36,065 INFO L87 Difference]: Start difference. First operand 77 states and 82 transitions. Second operand 18 states. [2018-04-12 00:49:36,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:36,243 INFO L93 Difference]: Finished difference Result 147 states and 158 transitions. [2018-04-12 00:49:36,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-04-12 00:49:36,244 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 62 [2018-04-12 00:49:36,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:36,244 INFO L225 Difference]: With dead ends: 147 [2018-04-12 00:49:36,245 INFO L226 Difference]: Without dead ends: 96 [2018-04-12 00:49:36,245 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 101 SyntacticMatches, 6 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=168, Invalid=588, Unknown=0, NotChecked=0, Total=756 [2018-04-12 00:49:36,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-04-12 00:49:36,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 88. [2018-04-12 00:49:36,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-04-12 00:49:36,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 94 transitions. [2018-04-12 00:49:36,253 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 94 transitions. Word has length 62 [2018-04-12 00:49:36,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:36,253 INFO L459 AbstractCegarLoop]: Abstraction has 88 states and 94 transitions. [2018-04-12 00:49:36,253 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-12 00:49:36,253 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 94 transitions. [2018-04-12 00:49:36,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-04-12 00:49:36,254 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:36,254 INFO L355 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:36,255 INFO L408 AbstractCegarLoop]: === Iteration 13 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:36,255 INFO L82 PathProgramCache]: Analyzing trace with hash -69283371, now seen corresponding path program 4 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:36,263 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:36,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:36,285 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:36,446 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 24 proven. 29 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:36,447 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:36,535 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-04-12 00:49:36,535 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:36,541 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 00:49:36,541 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:36,543 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 00:49:36,544 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:11 [2018-04-12 00:49:36,704 INFO L134 CoverageAnalysis]: Checked inductivity of 53 backedges. 24 proven. 29 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:36,725 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:36,725 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 27 [2018-04-12 00:49:36,725 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-04-12 00:49:36,726 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-04-12 00:49:36,726 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=636, Unknown=0, NotChecked=0, Total=756 [2018-04-12 00:49:36,726 INFO L87 Difference]: Start difference. First operand 88 states and 94 transitions. Second operand 28 states. [2018-04-12 00:49:37,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:37,199 INFO L93 Difference]: Finished difference Result 124 states and 133 transitions. [2018-04-12 00:49:37,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-04-12 00:49:37,200 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 72 [2018-04-12 00:49:37,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:37,201 INFO L225 Difference]: With dead ends: 124 [2018-04-12 00:49:37,201 INFO L226 Difference]: Without dead ends: 123 [2018-04-12 00:49:37,202 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 117 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 298 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=437, Invalid=1285, Unknown=0, NotChecked=0, Total=1722 [2018-04-12 00:49:37,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-04-12 00:49:37,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 103. [2018-04-12 00:49:37,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-04-12 00:49:37,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 110 transitions. [2018-04-12 00:49:37,216 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 110 transitions. Word has length 72 [2018-04-12 00:49:37,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:37,216 INFO L459 AbstractCegarLoop]: Abstraction has 103 states and 110 transitions. [2018-04-12 00:49:37,216 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-04-12 00:49:37,217 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 110 transitions. [2018-04-12 00:49:37,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-04-12 00:49:37,218 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:37,218 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:37,218 INFO L408 AbstractCegarLoop]: === Iteration 14 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:37,218 INFO L82 PathProgramCache]: Analyzing trace with hash 1259612855, now seen corresponding path program 5 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:37,230 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:37,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:37,250 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:37,366 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 39 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:37,367 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:37,462 INFO L134 CoverageAnalysis]: Checked inductivity of 75 backedges. 39 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:37,482 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:37,482 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 24 [2018-04-12 00:49:37,482 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-12 00:49:37,483 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-12 00:49:37,483 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=95, Invalid=457, Unknown=0, NotChecked=0, Total=552 [2018-04-12 00:49:37,483 INFO L87 Difference]: Start difference. First operand 103 states and 110 transitions. Second operand 24 states. [2018-04-12 00:49:37,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:37,758 INFO L93 Difference]: Finished difference Result 188 states and 202 transitions. [2018-04-12 00:49:37,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-04-12 00:49:37,759 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 81 [2018-04-12 00:49:37,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:37,759 INFO L225 Difference]: With dead ends: 188 [2018-04-12 00:49:37,759 INFO L226 Difference]: Without dead ends: 122 [2018-04-12 00:49:37,760 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 131 SyntacticMatches, 8 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 305 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=281, Invalid=1125, Unknown=0, NotChecked=0, Total=1406 [2018-04-12 00:49:37,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-04-12 00:49:37,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 114. [2018-04-12 00:49:37,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-04-12 00:49:37,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 122 transitions. [2018-04-12 00:49:37,768 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 122 transitions. Word has length 81 [2018-04-12 00:49:37,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:37,768 INFO L459 AbstractCegarLoop]: Abstraction has 114 states and 122 transitions. [2018-04-12 00:49:37,768 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-12 00:49:37,768 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 122 transitions. [2018-04-12 00:49:37,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-04-12 00:49:37,769 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:37,769 INFO L355 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:37,769 INFO L408 AbstractCegarLoop]: === Iteration 15 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:37,769 INFO L82 PathProgramCache]: Analyzing trace with hash -616157299, now seen corresponding path program 6 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:37,774 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:37,794 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:37,796 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:38,007 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 51 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:38,007 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:38,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 00:49:38,137 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:38,142 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-04-12 00:49:38,143 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:38,146 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 00:49:38,146 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:11 [2018-04-12 00:49:38,417 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 51 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:38,448 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:38,448 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 35 [2018-04-12 00:49:38,448 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-12 00:49:38,449 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-12 00:49:38,449 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=174, Invalid=1086, Unknown=0, NotChecked=0, Total=1260 [2018-04-12 00:49:38,449 INFO L87 Difference]: Start difference. First operand 114 states and 122 transitions. Second operand 36 states. [2018-04-12 00:49:39,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:39,063 INFO L93 Difference]: Finished difference Result 150 states and 161 transitions. [2018-04-12 00:49:39,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-04-12 00:49:39,064 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 91 [2018-04-12 00:49:39,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:39,065 INFO L225 Difference]: With dead ends: 150 [2018-04-12 00:49:39,065 INFO L226 Difference]: Without dead ends: 149 [2018-04-12 00:49:39,066 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 544 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=672, Invalid=2190, Unknown=0, NotChecked=0, Total=2862 [2018-04-12 00:49:39,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-04-12 00:49:39,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 129. [2018-04-12 00:49:39,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-04-12 00:49:39,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 138 transitions. [2018-04-12 00:49:39,080 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 138 transitions. Word has length 91 [2018-04-12 00:49:39,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:39,081 INFO L459 AbstractCegarLoop]: Abstraction has 129 states and 138 transitions. [2018-04-12 00:49:39,081 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-12 00:49:39,081 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 138 transitions. [2018-04-12 00:49:39,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-04-12 00:49:39,082 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:39,082 INFO L355 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:39,082 INFO L408 AbstractCegarLoop]: === Iteration 16 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:39,083 INFO L82 PathProgramCache]: Analyzing trace with hash 309246975, now seen corresponding path program 7 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:39,090 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:39,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:39,111 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:39,249 INFO L134 CoverageAnalysis]: Checked inductivity of 138 backedges. 70 proven. 68 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:39,249 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:39,388 INFO L134 CoverageAnalysis]: Checked inductivity of 138 backedges. 70 proven. 68 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:39,407 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:39,407 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 30 [2018-04-12 00:49:39,408 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-04-12 00:49:39,408 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-04-12 00:49:39,408 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=139, Invalid=731, Unknown=0, NotChecked=0, Total=870 [2018-04-12 00:49:39,408 INFO L87 Difference]: Start difference. First operand 129 states and 138 transitions. Second operand 30 states. [2018-04-12 00:49:39,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:39,765 INFO L93 Difference]: Finished difference Result 229 states and 246 transitions. [2018-04-12 00:49:39,765 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-04-12 00:49:39,765 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 100 [2018-04-12 00:49:39,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:39,766 INFO L225 Difference]: With dead ends: 229 [2018-04-12 00:49:39,766 INFO L226 Difference]: Without dead ends: 148 [2018-04-12 00:49:39,767 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 217 GetRequests, 161 SyntacticMatches, 10 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 532 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=422, Invalid=1834, Unknown=0, NotChecked=0, Total=2256 [2018-04-12 00:49:39,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-04-12 00:49:39,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 140. [2018-04-12 00:49:39,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-04-12 00:49:39,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 150 transitions. [2018-04-12 00:49:39,781 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 150 transitions. Word has length 100 [2018-04-12 00:49:39,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:39,781 INFO L459 AbstractCegarLoop]: Abstraction has 140 states and 150 transitions. [2018-04-12 00:49:39,781 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-04-12 00:49:39,781 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 150 transitions. [2018-04-12 00:49:39,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-04-12 00:49:39,783 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:39,783 INFO L355 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:39,783 INFO L408 AbstractCegarLoop]: === Iteration 17 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:39,783 INFO L82 PathProgramCache]: Analyzing trace with hash -1986040983, now seen corresponding path program 8 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:39,792 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:39,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:39,825 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:40,240 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 88 proven. 92 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:40,240 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:40,462 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 00:49:40,462 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:40,468 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-04-12 00:49:40,468 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:40,470 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 00:49:40,470 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:11 [2018-04-12 00:49:40,832 INFO L134 CoverageAnalysis]: Checked inductivity of 180 backedges. 88 proven. 92 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:40,852 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:40,852 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 43 [2018-04-12 00:49:40,852 INFO L442 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-04-12 00:49:40,852 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-04-12 00:49:40,853 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=236, Invalid=1656, Unknown=0, NotChecked=0, Total=1892 [2018-04-12 00:49:40,853 INFO L87 Difference]: Start difference. First operand 140 states and 150 transitions. Second operand 44 states. [2018-04-12 00:49:41,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:41,657 INFO L93 Difference]: Finished difference Result 176 states and 189 transitions. [2018-04-12 00:49:41,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-12 00:49:41,657 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 110 [2018-04-12 00:49:41,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:41,658 INFO L225 Difference]: With dead ends: 176 [2018-04-12 00:49:41,658 INFO L226 Difference]: Without dead ends: 175 [2018-04-12 00:49:41,660 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 177 SyntacticMatches, 0 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 864 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=955, Invalid=3335, Unknown=0, NotChecked=0, Total=4290 [2018-04-12 00:49:41,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-04-12 00:49:41,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 155. [2018-04-12 00:49:41,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-04-12 00:49:41,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 166 transitions. [2018-04-12 00:49:41,673 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 166 transitions. Word has length 110 [2018-04-12 00:49:41,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:41,673 INFO L459 AbstractCegarLoop]: Abstraction has 155 states and 166 transitions. [2018-04-12 00:49:41,673 INFO L460 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-04-12 00:49:41,673 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 166 transitions. [2018-04-12 00:49:41,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-04-12 00:49:41,674 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:41,674 INFO L355 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:41,674 INFO L408 AbstractCegarLoop]: === Iteration 18 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:41,674 INFO L82 PathProgramCache]: Analyzing trace with hash 1415911331, now seen corresponding path program 9 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:41,681 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:41,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:41,705 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:41,912 INFO L134 CoverageAnalysis]: Checked inductivity of 220 backedges. 110 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:41,912 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:42,115 INFO L134 CoverageAnalysis]: Checked inductivity of 220 backedges. 110 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:42,147 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:42,147 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 36 [2018-04-12 00:49:42,147 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-12 00:49:42,148 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-12 00:49:42,148 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=191, Invalid=1069, Unknown=0, NotChecked=0, Total=1260 [2018-04-12 00:49:42,148 INFO L87 Difference]: Start difference. First operand 155 states and 166 transitions. Second operand 36 states. [2018-04-12 00:49:42,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:42,651 INFO L93 Difference]: Finished difference Result 270 states and 290 transitions. [2018-04-12 00:49:42,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-12 00:49:42,652 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 119 [2018-04-12 00:49:42,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:42,653 INFO L225 Difference]: With dead ends: 270 [2018-04-12 00:49:42,653 INFO L226 Difference]: Without dead ends: 174 [2018-04-12 00:49:42,654 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 259 GetRequests, 191 SyntacticMatches, 12 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 821 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=591, Invalid=2715, Unknown=0, NotChecked=0, Total=3306 [2018-04-12 00:49:42,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-04-12 00:49:42,666 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 166. [2018-04-12 00:49:42,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-04-12 00:49:42,666 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 178 transitions. [2018-04-12 00:49:42,666 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 178 transitions. Word has length 119 [2018-04-12 00:49:42,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:42,667 INFO L459 AbstractCegarLoop]: Abstraction has 166 states and 178 transitions. [2018-04-12 00:49:42,667 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-12 00:49:42,667 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 178 transitions. [2018-04-12 00:49:42,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-04-12 00:49:42,667 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:42,668 INFO L355 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:42,668 INFO L408 AbstractCegarLoop]: === Iteration 19 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:42,668 INFO L82 PathProgramCache]: Analyzing trace with hash 969067513, now seen corresponding path program 10 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:42,684 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:42,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:42,710 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:43,226 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 135 proven. 137 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:43,226 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:43,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 00:49:43,462 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:43,468 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-04-12 00:49:43,469 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:43,472 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 00:49:43,472 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:11 [2018-04-12 00:49:43,945 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 135 proven. 137 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:43,965 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:43,965 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 51 [2018-04-12 00:49:43,965 INFO L442 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-04-12 00:49:43,965 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-04-12 00:49:43,966 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=306, Invalid=2346, Unknown=0, NotChecked=0, Total=2652 [2018-04-12 00:49:43,966 INFO L87 Difference]: Start difference. First operand 166 states and 178 transitions. Second operand 52 states. [2018-04-12 00:49:45,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:45,083 INFO L93 Difference]: Finished difference Result 202 states and 217 transitions. [2018-04-12 00:49:45,084 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-04-12 00:49:45,084 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 129 [2018-04-12 00:49:45,084 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:45,085 INFO L225 Difference]: With dead ends: 202 [2018-04-12 00:49:45,085 INFO L226 Difference]: Without dead ends: 201 [2018-04-12 00:49:45,086 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 283 GetRequests, 207 SyntacticMatches, 0 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1258 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=1286, Invalid=4720, Unknown=0, NotChecked=0, Total=6006 [2018-04-12 00:49:45,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2018-04-12 00:49:45,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 181. [2018-04-12 00:49:45,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-04-12 00:49:45,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 194 transitions. [2018-04-12 00:49:45,105 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 194 transitions. Word has length 129 [2018-04-12 00:49:45,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:45,105 INFO L459 AbstractCegarLoop]: Abstraction has 181 states and 194 transitions. [2018-04-12 00:49:45,105 INFO L460 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-04-12 00:49:45,105 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 194 transitions. [2018-04-12 00:49:45,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-04-12 00:49:45,106 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:45,106 INFO L355 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:45,106 INFO L408 AbstractCegarLoop]: === Iteration 20 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:45,106 INFO L82 PathProgramCache]: Analyzing trace with hash 257775891, now seen corresponding path program 11 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:45,114 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:45,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:45,139 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:45,362 INFO L134 CoverageAnalysis]: Checked inductivity of 321 backedges. 159 proven. 162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:45,362 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:45,612 INFO L134 CoverageAnalysis]: Checked inductivity of 321 backedges. 159 proven. 162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:45,632 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:45,633 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29] total 42 [2018-04-12 00:49:45,633 INFO L442 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-04-12 00:49:45,633 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-04-12 00:49:45,633 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=251, Invalid=1471, Unknown=0, NotChecked=0, Total=1722 [2018-04-12 00:49:45,634 INFO L87 Difference]: Start difference. First operand 181 states and 194 transitions. Second operand 42 states. [2018-04-12 00:49:46,376 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:46,377 INFO L93 Difference]: Finished difference Result 311 states and 334 transitions. [2018-04-12 00:49:46,377 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-04-12 00:49:46,377 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 138 [2018-04-12 00:49:46,377 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:46,378 INFO L225 Difference]: With dead ends: 311 [2018-04-12 00:49:46,378 INFO L226 Difference]: Without dead ends: 200 [2018-04-12 00:49:46,380 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 301 GetRequests, 221 SyntacticMatches, 14 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1172 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=788, Invalid=3768, Unknown=0, NotChecked=0, Total=4556 [2018-04-12 00:49:46,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 200 states. [2018-04-12 00:49:46,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 200 to 192. [2018-04-12 00:49:46,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-04-12 00:49:46,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 206 transitions. [2018-04-12 00:49:46,397 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 206 transitions. Word has length 138 [2018-04-12 00:49:46,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:46,398 INFO L459 AbstractCegarLoop]: Abstraction has 192 states and 206 transitions. [2018-04-12 00:49:46,398 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-04-12 00:49:46,398 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 206 transitions. [2018-04-12 00:49:46,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2018-04-12 00:49:46,399 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:46,399 INFO L355 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:46,399 INFO L408 AbstractCegarLoop]: === Iteration 21 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:46,399 INFO L82 PathProgramCache]: Analyzing trace with hash -2047268611, now seen corresponding path program 12 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:46,405 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:46,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:46,437 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:46,895 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 192 proven. 191 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:46,895 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:47,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-04-12 00:49:47,198 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:47,204 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 00:49:47,204 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:47,206 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 00:49:47,207 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:11 [2018-04-12 00:49:47,862 INFO L134 CoverageAnalysis]: Checked inductivity of 383 backedges. 192 proven. 191 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:47,881 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:47,881 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30] total 59 [2018-04-12 00:49:47,882 INFO L442 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-04-12 00:49:47,882 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-04-12 00:49:47,882 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=384, Invalid=3156, Unknown=0, NotChecked=0, Total=3540 [2018-04-12 00:49:47,883 INFO L87 Difference]: Start difference. First operand 192 states and 206 transitions. Second operand 60 states. [2018-04-12 00:49:49,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:49,259 INFO L93 Difference]: Finished difference Result 228 states and 245 transitions. [2018-04-12 00:49:49,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-04-12 00:49:49,259 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 148 [2018-04-12 00:49:49,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:49,260 INFO L225 Difference]: With dead ends: 228 [2018-04-12 00:49:49,261 INFO L226 Difference]: Without dead ends: 227 [2018-04-12 00:49:49,262 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 325 GetRequests, 237 SyntacticMatches, 0 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1726 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1665, Invalid=6345, Unknown=0, NotChecked=0, Total=8010 [2018-04-12 00:49:49,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2018-04-12 00:49:49,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 207. [2018-04-12 00:49:49,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-04-12 00:49:49,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 222 transitions. [2018-04-12 00:49:49,279 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 222 transitions. Word has length 148 [2018-04-12 00:49:49,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:49,279 INFO L459 AbstractCegarLoop]: Abstraction has 207 states and 222 transitions. [2018-04-12 00:49:49,279 INFO L460 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-04-12 00:49:49,279 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 222 transitions. [2018-04-12 00:49:49,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2018-04-12 00:49:49,280 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:49,280 INFO L355 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:49,280 INFO L408 AbstractCegarLoop]: === Iteration 22 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:49,280 INFO L82 PathProgramCache]: Analyzing trace with hash -1624940401, now seen corresponding path program 13 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:49,286 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:49,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:49,312 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:49,605 INFO L134 CoverageAnalysis]: Checked inductivity of 441 backedges. 217 proven. 224 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:49,605 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:49,921 INFO L134 CoverageAnalysis]: Checked inductivity of 441 backedges. 217 proven. 224 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:49,941 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:49,941 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33] total 48 [2018-04-12 00:49:49,941 INFO L442 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-04-12 00:49:49,941 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-04-12 00:49:49,942 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=319, Invalid=1937, Unknown=0, NotChecked=0, Total=2256 [2018-04-12 00:49:49,942 INFO L87 Difference]: Start difference. First operand 207 states and 222 transitions. Second operand 48 states. [2018-04-12 00:49:50,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:50,872 INFO L93 Difference]: Finished difference Result 352 states and 378 transitions. [2018-04-12 00:49:50,872 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-04-12 00:49:50,872 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 157 [2018-04-12 00:49:50,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:50,874 INFO L225 Difference]: With dead ends: 352 [2018-04-12 00:49:50,874 INFO L226 Difference]: Without dead ends: 226 [2018-04-12 00:49:50,876 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 343 GetRequests, 251 SyntacticMatches, 16 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1585 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1013, Invalid=4993, Unknown=0, NotChecked=0, Total=6006 [2018-04-12 00:49:50,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2018-04-12 00:49:50,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 218. [2018-04-12 00:49:50,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 218 states. [2018-04-12 00:49:50,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 234 transitions. [2018-04-12 00:49:50,908 INFO L78 Accepts]: Start accepts. Automaton has 218 states and 234 transitions. Word has length 157 [2018-04-12 00:49:50,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:50,909 INFO L459 AbstractCegarLoop]: Abstraction has 218 states and 234 transitions. [2018-04-12 00:49:50,909 INFO L460 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-04-12 00:49:50,909 INFO L276 IsEmpty]: Start isEmpty. Operand 218 states and 234 transitions. [2018-04-12 00:49:50,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2018-04-12 00:49:50,910 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:50,910 INFO L355 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:50,910 INFO L408 AbstractCegarLoop]: === Iteration 23 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:50,911 INFO L82 PathProgramCache]: Analyzing trace with hash -890297243, now seen corresponding path program 14 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:50,920 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:50,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:50,967 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:51,871 INFO L134 CoverageAnalysis]: Checked inductivity of 513 backedges. 259 proven. 254 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:51,872 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:52,298 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-04-12 00:49:52,299 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:52,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 00:49:52,308 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:52,311 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 00:49:52,311 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:11 [2018-04-12 00:49:53,245 INFO L134 CoverageAnalysis]: Checked inductivity of 513 backedges. 259 proven. 254 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:53,282 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:53,283 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34] total 67 [2018-04-12 00:49:53,283 INFO L442 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-04-12 00:49:53,283 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-04-12 00:49:53,284 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=470, Invalid=4086, Unknown=0, NotChecked=0, Total=4556 [2018-04-12 00:49:53,284 INFO L87 Difference]: Start difference. First operand 218 states and 234 transitions. Second operand 68 states. [2018-04-12 00:49:55,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:55,088 INFO L93 Difference]: Finished difference Result 254 states and 273 transitions. [2018-04-12 00:49:55,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-04-12 00:49:55,088 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 167 [2018-04-12 00:49:55,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:55,089 INFO L225 Difference]: With dead ends: 254 [2018-04-12 00:49:55,089 INFO L226 Difference]: Without dead ends: 253 [2018-04-12 00:49:55,090 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 367 GetRequests, 267 SyntacticMatches, 0 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2268 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=2092, Invalid=8210, Unknown=0, NotChecked=0, Total=10302 [2018-04-12 00:49:55,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 253 states. [2018-04-12 00:49:55,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 253 to 233. [2018-04-12 00:49:55,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233 states. [2018-04-12 00:49:55,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233 states to 233 states and 250 transitions. [2018-04-12 00:49:55,111 INFO L78 Accepts]: Start accepts. Automaton has 233 states and 250 transitions. Word has length 167 [2018-04-12 00:49:55,111 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:55,111 INFO L459 AbstractCegarLoop]: Abstraction has 233 states and 250 transitions. [2018-04-12 00:49:55,111 INFO L460 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-04-12 00:49:55,112 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 250 transitions. [2018-04-12 00:49:55,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2018-04-12 00:49:55,112 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:55,112 INFO L355 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:55,112 INFO L408 AbstractCegarLoop]: === Iteration 24 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:55,112 INFO L82 PathProgramCache]: Analyzing trace with hash 1569700391, now seen corresponding path program 15 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:55,118 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:55,145 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:55,148 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:55,487 INFO L134 CoverageAnalysis]: Checked inductivity of 580 backedges. 284 proven. 296 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:55,488 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:55,876 INFO L134 CoverageAnalysis]: Checked inductivity of 580 backedges. 284 proven. 296 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:55,896 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:55,896 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37] total 54 [2018-04-12 00:49:55,896 INFO L442 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-04-12 00:49:55,897 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-04-12 00:49:55,897 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=395, Invalid=2467, Unknown=0, NotChecked=0, Total=2862 [2018-04-12 00:49:55,897 INFO L87 Difference]: Start difference. First operand 233 states and 250 transitions. Second operand 54 states. [2018-04-12 00:49:56,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:49:56,772 INFO L93 Difference]: Finished difference Result 393 states and 422 transitions. [2018-04-12 00:49:56,772 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-04-12 00:49:56,772 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 176 [2018-04-12 00:49:56,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:49:56,774 INFO L225 Difference]: With dead ends: 393 [2018-04-12 00:49:56,774 INFO L226 Difference]: Without dead ends: 252 [2018-04-12 00:49:56,775 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 385 GetRequests, 281 SyntacticMatches, 18 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2060 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1266, Invalid=6390, Unknown=0, NotChecked=0, Total=7656 [2018-04-12 00:49:56,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 252 states. [2018-04-12 00:49:56,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 252 to 244. [2018-04-12 00:49:56,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 244 states. [2018-04-12 00:49:56,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 262 transitions. [2018-04-12 00:49:56,811 INFO L78 Accepts]: Start accepts. Automaton has 244 states and 262 transitions. Word has length 176 [2018-04-12 00:49:56,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:49:56,812 INFO L459 AbstractCegarLoop]: Abstraction has 244 states and 262 transitions. [2018-04-12 00:49:56,812 INFO L460 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-04-12 00:49:56,812 INFO L276 IsEmpty]: Start isEmpty. Operand 244 states and 262 transitions. [2018-04-12 00:49:56,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 187 [2018-04-12 00:49:56,813 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:49:56,814 INFO L355 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:49:56,814 INFO L408 AbstractCegarLoop]: === Iteration 25 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:49:56,814 INFO L82 PathProgramCache]: Analyzing trace with hash -1967502703, now seen corresponding path program 16 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:49:56,823 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:49:56,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:49:56,876 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:49:57,739 INFO L134 CoverageAnalysis]: Checked inductivity of 662 backedges. 336 proven. 326 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:57,740 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:49:58,216 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-04-12 00:49:58,216 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:58,222 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 00:49:58,222 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 00:49:58,225 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 00:49:58,225 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:11 [2018-04-12 00:49:59,307 INFO L134 CoverageAnalysis]: Checked inductivity of 662 backedges. 336 proven. 326 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:49:59,326 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:49:59,327 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38] total 75 [2018-04-12 00:49:59,327 INFO L442 AbstractCegarLoop]: Interpolant automaton has 76 states [2018-04-12 00:49:59,327 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2018-04-12 00:49:59,327 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=564, Invalid=5136, Unknown=0, NotChecked=0, Total=5700 [2018-04-12 00:49:59,328 INFO L87 Difference]: Start difference. First operand 244 states and 262 transitions. Second operand 76 states. [2018-04-12 00:50:01,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:50:01,517 INFO L93 Difference]: Finished difference Result 280 states and 301 transitions. [2018-04-12 00:50:01,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-04-12 00:50:01,517 INFO L78 Accepts]: Start accepts. Automaton has 76 states. Word has length 186 [2018-04-12 00:50:01,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:50:01,518 INFO L225 Difference]: With dead ends: 280 [2018-04-12 00:50:01,518 INFO L226 Difference]: Without dead ends: 279 [2018-04-12 00:50:01,519 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 409 GetRequests, 297 SyntacticMatches, 0 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2884 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=2567, Invalid=10315, Unknown=0, NotChecked=0, Total=12882 [2018-04-12 00:50:01,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279 states. [2018-04-12 00:50:01,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279 to 259. [2018-04-12 00:50:01,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 259 states. [2018-04-12 00:50:01,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 259 states to 259 states and 278 transitions. [2018-04-12 00:50:01,554 INFO L78 Accepts]: Start accepts. Automaton has 259 states and 278 transitions. Word has length 186 [2018-04-12 00:50:01,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:50:01,555 INFO L459 AbstractCegarLoop]: Abstraction has 259 states and 278 transitions. [2018-04-12 00:50:01,555 INFO L460 AbstractCegarLoop]: Interpolant automaton has 76 states. [2018-04-12 00:50:01,555 INFO L276 IsEmpty]: Start isEmpty. Operand 259 states and 278 transitions. [2018-04-12 00:50:01,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 196 [2018-04-12 00:50:01,555 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:50:01,556 INFO L355 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:50:01,556 INFO L408 AbstractCegarLoop]: === Iteration 26 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:50:01,556 INFO L82 PathProgramCache]: Analyzing trace with hash 361678203, now seen corresponding path program 17 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:50:01,564 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:50:01,595 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:50:01,598 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:50:02,020 INFO L134 CoverageAnalysis]: Checked inductivity of 738 backedges. 360 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:02,020 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:50:02,509 INFO L134 CoverageAnalysis]: Checked inductivity of 738 backedges. 360 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:02,529 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:50:02,529 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41] total 60 [2018-04-12 00:50:02,530 INFO L442 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-04-12 00:50:02,530 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-04-12 00:50:02,531 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=479, Invalid=3061, Unknown=0, NotChecked=0, Total=3540 [2018-04-12 00:50:02,531 INFO L87 Difference]: Start difference. First operand 259 states and 278 transitions. Second operand 60 states. [2018-04-12 00:50:03,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:50:03,700 INFO L93 Difference]: Finished difference Result 434 states and 466 transitions. [2018-04-12 00:50:03,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-04-12 00:50:03,731 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 195 [2018-04-12 00:50:03,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:50:03,732 INFO L225 Difference]: With dead ends: 434 [2018-04-12 00:50:03,732 INFO L226 Difference]: Without dead ends: 278 [2018-04-12 00:50:03,733 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 427 GetRequests, 311 SyntacticMatches, 20 SemanticMatches, 96 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2597 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=1547, Invalid=7959, Unknown=0, NotChecked=0, Total=9506 [2018-04-12 00:50:03,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278 states. [2018-04-12 00:50:03,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278 to 270. [2018-04-12 00:50:03,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 270 states. [2018-04-12 00:50:03,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 270 states to 270 states and 290 transitions. [2018-04-12 00:50:03,769 INFO L78 Accepts]: Start accepts. Automaton has 270 states and 290 transitions. Word has length 195 [2018-04-12 00:50:03,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:50:03,769 INFO L459 AbstractCegarLoop]: Abstraction has 270 states and 290 transitions. [2018-04-12 00:50:03,769 INFO L460 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-04-12 00:50:03,769 INFO L276 IsEmpty]: Start isEmpty. Operand 270 states and 290 transitions. [2018-04-12 00:50:03,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 206 [2018-04-12 00:50:03,770 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:50:03,770 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:50:03,770 INFO L408 AbstractCegarLoop]: === Iteration 27 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:50:03,771 INFO L82 PathProgramCache]: Analyzing trace with hash -440600367, now seen corresponding path program 18 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:50:03,779 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:50:03,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:50:03,835 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:50:04,743 INFO L134 CoverageAnalysis]: Checked inductivity of 830 backedges. 423 proven. 407 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:04,744 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:50:05,343 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-04-12 00:50:05,344 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:50:05,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 00:50:05,349 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 00:50:05,351 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 00:50:05,352 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:11 [2018-04-12 00:50:06,745 INFO L134 CoverageAnalysis]: Checked inductivity of 830 backedges. 423 proven. 407 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:06,765 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:50:06,765 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42] total 83 [2018-04-12 00:50:06,766 INFO L442 AbstractCegarLoop]: Interpolant automaton has 84 states [2018-04-12 00:50:06,767 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 84 interpolants. [2018-04-12 00:50:06,767 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=666, Invalid=6306, Unknown=0, NotChecked=0, Total=6972 [2018-04-12 00:50:06,767 INFO L87 Difference]: Start difference. First operand 270 states and 290 transitions. Second operand 84 states. [2018-04-12 00:50:09,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:50:09,474 INFO L93 Difference]: Finished difference Result 306 states and 329 transitions. [2018-04-12 00:50:09,475 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-04-12 00:50:09,475 INFO L78 Accepts]: Start accepts. Automaton has 84 states. Word has length 205 [2018-04-12 00:50:09,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:50:09,476 INFO L225 Difference]: With dead ends: 306 [2018-04-12 00:50:09,477 INFO L226 Difference]: Without dead ends: 305 [2018-04-12 00:50:09,477 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 451 GetRequests, 327 SyntacticMatches, 0 SemanticMatches, 124 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3574 ImplicationChecksByTransitivity, 3.8s TimeCoverageRelationStatistics Valid=3090, Invalid=12660, Unknown=0, NotChecked=0, Total=15750 [2018-04-12 00:50:09,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 305 states. [2018-04-12 00:50:09,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 305 to 285. [2018-04-12 00:50:09,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 285 states. [2018-04-12 00:50:09,504 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 285 states to 285 states and 306 transitions. [2018-04-12 00:50:09,504 INFO L78 Accepts]: Start accepts. Automaton has 285 states and 306 transitions. Word has length 205 [2018-04-12 00:50:09,504 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:50:09,504 INFO L459 AbstractCegarLoop]: Abstraction has 285 states and 306 transitions. [2018-04-12 00:50:09,504 INFO L460 AbstractCegarLoop]: Interpolant automaton has 84 states. [2018-04-12 00:50:09,504 INFO L276 IsEmpty]: Start isEmpty. Operand 285 states and 306 transitions. [2018-04-12 00:50:09,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 215 [2018-04-12 00:50:09,505 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:50:09,505 INFO L355 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:50:09,506 INFO L408 AbstractCegarLoop]: === Iteration 28 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:50:09,506 INFO L82 PathProgramCache]: Analyzing trace with hash -99868869, now seen corresponding path program 19 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:50:09,512 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:50:09,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:50:09,551 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:50:10,094 INFO L134 CoverageAnalysis]: Checked inductivity of 915 backedges. 445 proven. 470 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:10,094 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:50:10,733 INFO L134 CoverageAnalysis]: Checked inductivity of 915 backedges. 445 proven. 470 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:10,752 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:50:10,752 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45] total 66 [2018-04-12 00:50:10,753 INFO L442 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-04-12 00:50:10,753 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-04-12 00:50:10,753 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=571, Invalid=3719, Unknown=0, NotChecked=0, Total=4290 [2018-04-12 00:50:10,754 INFO L87 Difference]: Start difference. First operand 285 states and 306 transitions. Second operand 66 states. [2018-04-12 00:50:12,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:50:12,209 INFO L93 Difference]: Finished difference Result 475 states and 510 transitions. [2018-04-12 00:50:12,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-04-12 00:50:12,209 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 214 [2018-04-12 00:50:12,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:50:12,210 INFO L225 Difference]: With dead ends: 475 [2018-04-12 00:50:12,210 INFO L226 Difference]: Without dead ends: 304 [2018-04-12 00:50:12,211 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 469 GetRequests, 341 SyntacticMatches, 22 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3196 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=1856, Invalid=9700, Unknown=0, NotChecked=0, Total=11556 [2018-04-12 00:50:12,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 304 states. [2018-04-12 00:50:12,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 304 to 296. [2018-04-12 00:50:12,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 296 states. [2018-04-12 00:50:12,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 296 states to 296 states and 318 transitions. [2018-04-12 00:50:12,237 INFO L78 Accepts]: Start accepts. Automaton has 296 states and 318 transitions. Word has length 214 [2018-04-12 00:50:12,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:50:12,237 INFO L459 AbstractCegarLoop]: Abstraction has 296 states and 318 transitions. [2018-04-12 00:50:12,237 INFO L460 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-04-12 00:50:12,237 INFO L276 IsEmpty]: Start isEmpty. Operand 296 states and 318 transitions. [2018-04-12 00:50:12,238 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2018-04-12 00:50:12,238 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:50:12,238 INFO L355 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:50:12,238 INFO L408 AbstractCegarLoop]: === Iteration 29 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:50:12,238 INFO L82 PathProgramCache]: Analyzing trace with hash -1120858075, now seen corresponding path program 20 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:50:12,244 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:50:12,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:50:12,292 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:50:13,564 INFO L134 CoverageAnalysis]: Checked inductivity of 1017 backedges. 520 proven. 497 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:13,564 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:50:14,265 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 00:50:14,266 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:50:14,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-04-12 00:50:14,273 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 00:50:14,276 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 00:50:14,276 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:11 [2018-04-12 00:50:15,789 INFO L134 CoverageAnalysis]: Checked inductivity of 1017 backedges. 520 proven. 497 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:15,808 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:50:15,808 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46] total 91 [2018-04-12 00:50:15,809 INFO L442 AbstractCegarLoop]: Interpolant automaton has 92 states [2018-04-12 00:50:15,809 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 92 interpolants. [2018-04-12 00:50:15,809 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=776, Invalid=7596, Unknown=0, NotChecked=0, Total=8372 [2018-04-12 00:50:15,809 INFO L87 Difference]: Start difference. First operand 296 states and 318 transitions. Second operand 92 states. [2018-04-12 00:50:18,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:50:18,811 INFO L93 Difference]: Finished difference Result 332 states and 357 transitions. [2018-04-12 00:50:18,811 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-04-12 00:50:18,811 INFO L78 Accepts]: Start accepts. Automaton has 92 states. Word has length 224 [2018-04-12 00:50:18,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:50:18,812 INFO L225 Difference]: With dead ends: 332 [2018-04-12 00:50:18,812 INFO L226 Difference]: Without dead ends: 331 [2018-04-12 00:50:18,813 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 493 GetRequests, 357 SyntacticMatches, 0 SemanticMatches, 136 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4338 ImplicationChecksByTransitivity, 4.5s TimeCoverageRelationStatistics Valid=3661, Invalid=15245, Unknown=0, NotChecked=0, Total=18906 [2018-04-12 00:50:18,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2018-04-12 00:50:18,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 311. [2018-04-12 00:50:18,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 311 states. [2018-04-12 00:50:18,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 311 states to 311 states and 334 transitions. [2018-04-12 00:50:18,842 INFO L78 Accepts]: Start accepts. Automaton has 311 states and 334 transitions. Word has length 224 [2018-04-12 00:50:18,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:50:18,843 INFO L459 AbstractCegarLoop]: Abstraction has 311 states and 334 transitions. [2018-04-12 00:50:18,843 INFO L460 AbstractCegarLoop]: Interpolant automaton has 92 states. [2018-04-12 00:50:18,843 INFO L276 IsEmpty]: Start isEmpty. Operand 311 states and 334 transitions. [2018-04-12 00:50:18,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 234 [2018-04-12 00:50:18,844 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:50:18,844 INFO L355 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:50:18,844 INFO L408 AbstractCegarLoop]: === Iteration 30 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:50:18,844 INFO L82 PathProgramCache]: Analyzing trace with hash 106628711, now seen corresponding path program 21 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:50:18,849 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:50:18,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:50:18,888 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:50:19,527 INFO L134 CoverageAnalysis]: Checked inductivity of 1111 backedges. 539 proven. 572 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:19,527 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:50:20,206 INFO L134 CoverageAnalysis]: Checked inductivity of 1111 backedges. 539 proven. 572 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:20,226 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:50:20,231 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49] total 72 [2018-04-12 00:50:20,231 INFO L442 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-04-12 00:50:20,232 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-04-12 00:50:20,232 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=671, Invalid=4441, Unknown=0, NotChecked=0, Total=5112 [2018-04-12 00:50:20,232 INFO L87 Difference]: Start difference. First operand 311 states and 334 transitions. Second operand 72 states. [2018-04-12 00:50:21,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:50:21,751 INFO L93 Difference]: Finished difference Result 516 states and 554 transitions. [2018-04-12 00:50:21,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-04-12 00:50:21,752 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 233 [2018-04-12 00:50:21,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:50:21,753 INFO L225 Difference]: With dead ends: 516 [2018-04-12 00:50:21,753 INFO L226 Difference]: Without dead ends: 330 [2018-04-12 00:50:21,754 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 511 GetRequests, 371 SyntacticMatches, 24 SemanticMatches, 116 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3857 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=2193, Invalid=11613, Unknown=0, NotChecked=0, Total=13806 [2018-04-12 00:50:21,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 330 states. [2018-04-12 00:50:21,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 330 to 322. [2018-04-12 00:50:21,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 322 states. [2018-04-12 00:50:21,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 322 states to 322 states and 346 transitions. [2018-04-12 00:50:21,786 INFO L78 Accepts]: Start accepts. Automaton has 322 states and 346 transitions. Word has length 233 [2018-04-12 00:50:21,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:50:21,786 INFO L459 AbstractCegarLoop]: Abstraction has 322 states and 346 transitions. [2018-04-12 00:50:21,786 INFO L460 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-04-12 00:50:21,786 INFO L276 IsEmpty]: Start isEmpty. Operand 322 states and 346 transitions. [2018-04-12 00:50:21,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 244 [2018-04-12 00:50:21,787 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:50:21,787 INFO L355 BasicCegarLoop]: trace histogram [13, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:50:21,787 INFO L408 AbstractCegarLoop]: === Iteration 31 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:50:21,787 INFO L82 PathProgramCache]: Analyzing trace with hash -73529027, now seen corresponding path program 22 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:50:21,793 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:50:21,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:50:21,834 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:50:22,980 INFO L134 CoverageAnalysis]: Checked inductivity of 1223 backedges. 627 proven. 596 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:22,981 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:50:23,790 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-04-12 00:50:23,790 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:50:23,795 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 00:50:23,795 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 00:50:23,798 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 00:50:23,798 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:11 [2018-04-12 00:50:25,514 INFO L134 CoverageAnalysis]: Checked inductivity of 1223 backedges. 627 proven. 596 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:25,534 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:50:25,534 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50] total 99 [2018-04-12 00:50:25,535 INFO L442 AbstractCegarLoop]: Interpolant automaton has 100 states [2018-04-12 00:50:25,535 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 100 interpolants. [2018-04-12 00:50:25,535 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=894, Invalid=9006, Unknown=0, NotChecked=0, Total=9900 [2018-04-12 00:50:25,536 INFO L87 Difference]: Start difference. First operand 322 states and 346 transitions. Second operand 100 states. [2018-04-12 00:50:29,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:50:29,164 INFO L93 Difference]: Finished difference Result 358 states and 385 transitions. [2018-04-12 00:50:29,165 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-04-12 00:50:29,165 INFO L78 Accepts]: Start accepts. Automaton has 100 states. Word has length 243 [2018-04-12 00:50:29,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:50:29,166 INFO L225 Difference]: With dead ends: 358 [2018-04-12 00:50:29,166 INFO L226 Difference]: Without dead ends: 357 [2018-04-12 00:50:29,168 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 535 GetRequests, 387 SyntacticMatches, 0 SemanticMatches, 148 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5176 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=4280, Invalid=18070, Unknown=0, NotChecked=0, Total=22350 [2018-04-12 00:50:29,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2018-04-12 00:50:29,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 337. [2018-04-12 00:50:29,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 337 states. [2018-04-12 00:50:29,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 337 states to 337 states and 362 transitions. [2018-04-12 00:50:29,204 INFO L78 Accepts]: Start accepts. Automaton has 337 states and 362 transitions. Word has length 243 [2018-04-12 00:50:29,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:50:29,204 INFO L459 AbstractCegarLoop]: Abstraction has 337 states and 362 transitions. [2018-04-12 00:50:29,204 INFO L460 AbstractCegarLoop]: Interpolant automaton has 100 states. [2018-04-12 00:50:29,204 INFO L276 IsEmpty]: Start isEmpty. Operand 337 states and 362 transitions. [2018-04-12 00:50:29,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 253 [2018-04-12 00:50:29,206 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:50:29,206 INFO L355 BasicCegarLoop]: trace histogram [13, 13, 13, 13, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:50:29,206 INFO L408 AbstractCegarLoop]: === Iteration 32 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:50:29,206 INFO L82 PathProgramCache]: Analyzing trace with hash -1755789233, now seen corresponding path program 23 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:50:29,213 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:50:29,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:50:29,253 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:50:29,943 INFO L134 CoverageAnalysis]: Checked inductivity of 1326 backedges. 642 proven. 684 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:29,943 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:50:30,757 INFO L134 CoverageAnalysis]: Checked inductivity of 1326 backedges. 642 proven. 684 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:30,777 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:50:30,777 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [53, 53] total 78 [2018-04-12 00:50:30,777 INFO L442 AbstractCegarLoop]: Interpolant automaton has 78 states [2018-04-12 00:50:30,778 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2018-04-12 00:50:30,778 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=779, Invalid=5227, Unknown=0, NotChecked=0, Total=6006 [2018-04-12 00:50:30,778 INFO L87 Difference]: Start difference. First operand 337 states and 362 transitions. Second operand 78 states. [2018-04-12 00:50:32,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:50:32,464 INFO L93 Difference]: Finished difference Result 557 states and 598 transitions. [2018-04-12 00:50:32,464 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-04-12 00:50:32,464 INFO L78 Accepts]: Start accepts. Automaton has 78 states. Word has length 252 [2018-04-12 00:50:32,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:50:32,466 INFO L225 Difference]: With dead ends: 557 [2018-04-12 00:50:32,466 INFO L226 Difference]: Without dead ends: 356 [2018-04-12 00:50:32,467 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 553 GetRequests, 401 SyntacticMatches, 26 SemanticMatches, 126 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4580 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=2558, Invalid=13698, Unknown=0, NotChecked=0, Total=16256 [2018-04-12 00:50:32,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 356 states. [2018-04-12 00:50:32,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 356 to 348. [2018-04-12 00:50:32,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 348 states. [2018-04-12 00:50:32,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 348 states to 348 states and 374 transitions. [2018-04-12 00:50:32,517 INFO L78 Accepts]: Start accepts. Automaton has 348 states and 374 transitions. Word has length 252 [2018-04-12 00:50:32,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:50:32,517 INFO L459 AbstractCegarLoop]: Abstraction has 348 states and 374 transitions. [2018-04-12 00:50:32,517 INFO L460 AbstractCegarLoop]: Interpolant automaton has 78 states. [2018-04-12 00:50:32,517 INFO L276 IsEmpty]: Start isEmpty. Operand 348 states and 374 transitions. [2018-04-12 00:50:32,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 263 [2018-04-12 00:50:32,519 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:50:32,519 INFO L355 BasicCegarLoop]: trace histogram [14, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 12, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:50:32,519 INFO L408 AbstractCegarLoop]: === Iteration 33 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:50:32,519 INFO L82 PathProgramCache]: Analyzing trace with hash -2111063623, now seen corresponding path program 24 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:50:32,526 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:50:32,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:50:32,578 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:50:34,359 INFO L134 CoverageAnalysis]: Checked inductivity of 1448 backedges. 744 proven. 704 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:34,359 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:50:35,320 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-04-12 00:50:35,320 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:50:35,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 00:50:35,326 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 00:50:35,329 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 00:50:35,329 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:11 [2018-04-12 00:50:37,415 INFO L134 CoverageAnalysis]: Checked inductivity of 1448 backedges. 744 proven. 704 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:37,433 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:50:37,434 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 54] total 107 [2018-04-12 00:50:37,434 INFO L442 AbstractCegarLoop]: Interpolant automaton has 108 states [2018-04-12 00:50:37,435 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 108 interpolants. [2018-04-12 00:50:37,435 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1020, Invalid=10536, Unknown=0, NotChecked=0, Total=11556 [2018-04-12 00:50:37,435 INFO L87 Difference]: Start difference. First operand 348 states and 374 transitions. Second operand 108 states. [2018-04-12 00:50:41,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:50:41,314 INFO L93 Difference]: Finished difference Result 384 states and 413 transitions. [2018-04-12 00:50:41,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2018-04-12 00:50:41,315 INFO L78 Accepts]: Start accepts. Automaton has 108 states. Word has length 262 [2018-04-12 00:50:41,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:50:41,317 INFO L225 Difference]: With dead ends: 384 [2018-04-12 00:50:41,317 INFO L226 Difference]: Without dead ends: 383 [2018-04-12 00:50:41,319 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 577 GetRequests, 417 SyntacticMatches, 0 SemanticMatches, 160 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6088 ImplicationChecksByTransitivity, 6.2s TimeCoverageRelationStatistics Valid=4947, Invalid=21135, Unknown=0, NotChecked=0, Total=26082 [2018-04-12 00:50:41,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 383 states. [2018-04-12 00:50:41,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 383 to 363. [2018-04-12 00:50:41,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 363 states. [2018-04-12 00:50:41,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 363 states to 363 states and 390 transitions. [2018-04-12 00:50:41,375 INFO L78 Accepts]: Start accepts. Automaton has 363 states and 390 transitions. Word has length 262 [2018-04-12 00:50:41,375 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:50:41,376 INFO L459 AbstractCegarLoop]: Abstraction has 363 states and 390 transitions. [2018-04-12 00:50:41,376 INFO L460 AbstractCegarLoop]: Interpolant automaton has 108 states. [2018-04-12 00:50:41,376 INFO L276 IsEmpty]: Start isEmpty. Operand 363 states and 390 transitions. [2018-04-12 00:50:41,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 272 [2018-04-12 00:50:41,378 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:50:41,378 INFO L355 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:50:41,378 INFO L408 AbstractCegarLoop]: === Iteration 34 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:50:41,379 INFO L82 PathProgramCache]: Analyzing trace with hash -255597741, now seen corresponding path program 25 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:50:41,387 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:50:41,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:50:41,442 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:50:42,234 INFO L134 CoverageAnalysis]: Checked inductivity of 1560 backedges. 754 proven. 806 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:42,235 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:50:43,131 INFO L134 CoverageAnalysis]: Checked inductivity of 1560 backedges. 754 proven. 806 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:43,150 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:50:43,165 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [57, 57] total 84 [2018-04-12 00:50:43,165 INFO L442 AbstractCegarLoop]: Interpolant automaton has 84 states [2018-04-12 00:50:43,166 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 84 interpolants. [2018-04-12 00:50:43,166 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=895, Invalid=6077, Unknown=0, NotChecked=0, Total=6972 [2018-04-12 00:50:43,166 INFO L87 Difference]: Start difference. First operand 363 states and 390 transitions. Second operand 84 states. [2018-04-12 00:50:44,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:50:44,998 INFO L93 Difference]: Finished difference Result 598 states and 642 transitions. [2018-04-12 00:50:44,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2018-04-12 00:50:44,998 INFO L78 Accepts]: Start accepts. Automaton has 84 states. Word has length 271 [2018-04-12 00:50:44,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:50:44,999 INFO L225 Difference]: With dead ends: 598 [2018-04-12 00:50:44,999 INFO L226 Difference]: Without dead ends: 382 [2018-04-12 00:50:45,000 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 595 GetRequests, 431 SyntacticMatches, 28 SemanticMatches, 136 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5365 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=2951, Invalid=15955, Unknown=0, NotChecked=0, Total=18906 [2018-04-12 00:50:45,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 382 states. [2018-04-12 00:50:45,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 382 to 374. [2018-04-12 00:50:45,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 374 states. [2018-04-12 00:50:45,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 374 states to 374 states and 402 transitions. [2018-04-12 00:50:45,045 INFO L78 Accepts]: Start accepts. Automaton has 374 states and 402 transitions. Word has length 271 [2018-04-12 00:50:45,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:50:45,045 INFO L459 AbstractCegarLoop]: Abstraction has 374 states and 402 transitions. [2018-04-12 00:50:45,046 INFO L460 AbstractCegarLoop]: Interpolant automaton has 84 states. [2018-04-12 00:50:45,046 INFO L276 IsEmpty]: Start isEmpty. Operand 374 states and 402 transitions. [2018-04-12 00:50:45,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 282 [2018-04-12 00:50:45,047 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:50:45,048 INFO L355 BasicCegarLoop]: trace histogram [15, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 13, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:50:45,048 INFO L408 AbstractCegarLoop]: === Iteration 35 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:50:45,048 INFO L82 PathProgramCache]: Analyzing trace with hash -461105751, now seen corresponding path program 26 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:50:45,054 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:50:45,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:50:45,103 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:50:46,596 INFO L134 CoverageAnalysis]: Checked inductivity of 1692 backedges. 871 proven. 821 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:46,596 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:50:47,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 00:50:47,648 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:50:47,653 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-04-12 00:50:47,654 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 00:50:47,656 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 00:50:47,656 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:11 [2018-04-12 00:50:49,968 INFO L134 CoverageAnalysis]: Checked inductivity of 1692 backedges. 871 proven. 821 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:49,987 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:50:49,987 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [58, 58] total 115 [2018-04-12 00:50:49,988 INFO L442 AbstractCegarLoop]: Interpolant automaton has 116 states [2018-04-12 00:50:49,988 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 116 interpolants. [2018-04-12 00:50:49,988 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1154, Invalid=12186, Unknown=0, NotChecked=0, Total=13340 [2018-04-12 00:50:49,988 INFO L87 Difference]: Start difference. First operand 374 states and 402 transitions. Second operand 116 states. [2018-04-12 00:50:54,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:50:54,385 INFO L93 Difference]: Finished difference Result 410 states and 441 transitions. [2018-04-12 00:50:54,385 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-04-12 00:50:54,385 INFO L78 Accepts]: Start accepts. Automaton has 116 states. Word has length 281 [2018-04-12 00:50:54,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:50:54,387 INFO L225 Difference]: With dead ends: 410 [2018-04-12 00:50:54,387 INFO L226 Difference]: Without dead ends: 409 [2018-04-12 00:50:54,388 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 619 GetRequests, 447 SyntacticMatches, 0 SemanticMatches, 172 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7074 ImplicationChecksByTransitivity, 6.4s TimeCoverageRelationStatistics Valid=5662, Invalid=24440, Unknown=0, NotChecked=0, Total=30102 [2018-04-12 00:50:54,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 409 states. [2018-04-12 00:50:54,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 409 to 389. [2018-04-12 00:50:54,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 389 states. [2018-04-12 00:50:54,455 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 389 states to 389 states and 418 transitions. [2018-04-12 00:50:54,455 INFO L78 Accepts]: Start accepts. Automaton has 389 states and 418 transitions. Word has length 281 [2018-04-12 00:50:54,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:50:54,456 INFO L459 AbstractCegarLoop]: Abstraction has 389 states and 418 transitions. [2018-04-12 00:50:54,456 INFO L460 AbstractCegarLoop]: Interpolant automaton has 116 states. [2018-04-12 00:50:54,456 INFO L276 IsEmpty]: Start isEmpty. Operand 389 states and 418 transitions. [2018-04-12 00:50:54,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 291 [2018-04-12 00:50:54,458 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:50:54,458 INFO L355 BasicCegarLoop]: trace histogram [15, 15, 15, 15, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:50:54,458 INFO L408 AbstractCegarLoop]: === Iteration 36 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:50:54,458 INFO L82 PathProgramCache]: Analyzing trace with hash -780405405, now seen corresponding path program 27 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:50:54,466 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:50:54,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:50:54,515 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:50:55,354 INFO L134 CoverageAnalysis]: Checked inductivity of 1813 backedges. 875 proven. 938 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:55,355 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:50:56,402 INFO L134 CoverageAnalysis]: Checked inductivity of 1813 backedges. 875 proven. 938 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:50:56,421 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:50:56,421 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [61, 61] total 90 [2018-04-12 00:50:56,422 INFO L442 AbstractCegarLoop]: Interpolant automaton has 90 states [2018-04-12 00:50:56,422 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 90 interpolants. [2018-04-12 00:50:56,423 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1019, Invalid=6991, Unknown=0, NotChecked=0, Total=8010 [2018-04-12 00:50:56,423 INFO L87 Difference]: Start difference. First operand 389 states and 418 transitions. Second operand 90 states. [2018-04-12 00:50:58,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:50:58,560 INFO L93 Difference]: Finished difference Result 639 states and 686 transitions. [2018-04-12 00:50:58,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2018-04-12 00:50:58,561 INFO L78 Accepts]: Start accepts. Automaton has 90 states. Word has length 290 [2018-04-12 00:50:58,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:50:58,562 INFO L225 Difference]: With dead ends: 639 [2018-04-12 00:50:58,562 INFO L226 Difference]: Without dead ends: 408 [2018-04-12 00:50:58,563 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 637 GetRequests, 461 SyntacticMatches, 30 SemanticMatches, 146 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6212 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=3372, Invalid=18384, Unknown=0, NotChecked=0, Total=21756 [2018-04-12 00:50:58,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 408 states. [2018-04-12 00:50:58,612 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 408 to 400. [2018-04-12 00:50:58,612 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 400 states. [2018-04-12 00:50:58,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 400 states to 400 states and 430 transitions. [2018-04-12 00:50:58,613 INFO L78 Accepts]: Start accepts. Automaton has 400 states and 430 transitions. Word has length 290 [2018-04-12 00:50:58,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:50:58,613 INFO L459 AbstractCegarLoop]: Abstraction has 400 states and 430 transitions. [2018-04-12 00:50:58,613 INFO L460 AbstractCegarLoop]: Interpolant automaton has 90 states. [2018-04-12 00:50:58,613 INFO L276 IsEmpty]: Start isEmpty. Operand 400 states and 430 transitions. [2018-04-12 00:50:58,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 301 [2018-04-12 00:50:58,615 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:50:58,615 INFO L355 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 14, 14, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:50:58,615 INFO L408 AbstractCegarLoop]: === Iteration 37 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:50:58,615 INFO L82 PathProgramCache]: Analyzing trace with hash 838371149, now seen corresponding path program 28 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:50:58,624 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:50:58,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:50:58,675 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:51:00,298 INFO L134 CoverageAnalysis]: Checked inductivity of 1955 backedges. 1008 proven. 947 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:51:00,299 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:51:01,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 00:51:01,518 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:51:01,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-04-12 00:51:01,524 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 00:51:01,527 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 00:51:01,527 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:11 [2018-04-12 00:51:04,183 INFO L134 CoverageAnalysis]: Checked inductivity of 1955 backedges. 1008 proven. 947 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:51:04,202 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:51:04,202 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [62, 62] total 123 [2018-04-12 00:51:04,203 INFO L442 AbstractCegarLoop]: Interpolant automaton has 124 states [2018-04-12 00:51:04,203 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 124 interpolants. [2018-04-12 00:51:04,203 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1296, Invalid=13956, Unknown=0, NotChecked=0, Total=15252 [2018-04-12 00:51:04,204 INFO L87 Difference]: Start difference. First operand 400 states and 430 transitions. Second operand 124 states. [2018-04-12 00:51:09,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:51:09,434 INFO L93 Difference]: Finished difference Result 436 states and 469 transitions. [2018-04-12 00:51:09,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2018-04-12 00:51:09,434 INFO L78 Accepts]: Start accepts. Automaton has 124 states. Word has length 300 [2018-04-12 00:51:09,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:51:09,436 INFO L225 Difference]: With dead ends: 436 [2018-04-12 00:51:09,436 INFO L226 Difference]: Without dead ends: 435 [2018-04-12 00:51:09,437 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 661 GetRequests, 477 SyntacticMatches, 0 SemanticMatches, 184 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8134 ImplicationChecksByTransitivity, 7.2s TimeCoverageRelationStatistics Valid=6425, Invalid=27985, Unknown=0, NotChecked=0, Total=34410 [2018-04-12 00:51:09,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 435 states. [2018-04-12 00:51:09,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 435 to 415. [2018-04-12 00:51:09,479 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 415 states. [2018-04-12 00:51:09,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 415 states to 415 states and 446 transitions. [2018-04-12 00:51:09,479 INFO L78 Accepts]: Start accepts. Automaton has 415 states and 446 transitions. Word has length 300 [2018-04-12 00:51:09,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:51:09,480 INFO L459 AbstractCegarLoop]: Abstraction has 415 states and 446 transitions. [2018-04-12 00:51:09,480 INFO L460 AbstractCegarLoop]: Interpolant automaton has 124 states. [2018-04-12 00:51:09,480 INFO L276 IsEmpty]: Start isEmpty. Operand 415 states and 446 transitions. [2018-04-12 00:51:09,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 310 [2018-04-12 00:51:09,482 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:51:09,482 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:51:09,482 INFO L408 AbstractCegarLoop]: === Iteration 38 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:51:09,482 INFO L82 PathProgramCache]: Analyzing trace with hash 1350769727, now seen corresponding path program 29 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:51:09,488 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:51:09,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:51:09,555 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:51:10,588 INFO L134 CoverageAnalysis]: Checked inductivity of 2085 backedges. 1005 proven. 1080 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:51:10,589 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:51:11,748 INFO L134 CoverageAnalysis]: Checked inductivity of 2085 backedges. 1005 proven. 1080 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:51:11,767 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:51:11,767 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [65, 65] total 96 [2018-04-12 00:51:11,768 INFO L442 AbstractCegarLoop]: Interpolant automaton has 96 states [2018-04-12 00:51:11,768 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2018-04-12 00:51:11,768 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1151, Invalid=7969, Unknown=0, NotChecked=0, Total=9120 [2018-04-12 00:51:11,769 INFO L87 Difference]: Start difference. First operand 415 states and 446 transitions. Second operand 96 states. [2018-04-12 00:51:14,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:51:14,104 INFO L93 Difference]: Finished difference Result 680 states and 730 transitions. [2018-04-12 00:51:14,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 66 states. [2018-04-12 00:51:14,104 INFO L78 Accepts]: Start accepts. Automaton has 96 states. Word has length 309 [2018-04-12 00:51:14,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:51:14,106 INFO L225 Difference]: With dead ends: 680 [2018-04-12 00:51:14,106 INFO L226 Difference]: Without dead ends: 434 [2018-04-12 00:51:14,107 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 679 GetRequests, 491 SyntacticMatches, 32 SemanticMatches, 156 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7121 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=3821, Invalid=20985, Unknown=0, NotChecked=0, Total=24806 [2018-04-12 00:51:14,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 434 states. [2018-04-12 00:51:14,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 434 to 426. [2018-04-12 00:51:14,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 426 states. [2018-04-12 00:51:14,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 426 states to 426 states and 458 transitions. [2018-04-12 00:51:14,152 INFO L78 Accepts]: Start accepts. Automaton has 426 states and 458 transitions. Word has length 309 [2018-04-12 00:51:14,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:51:14,152 INFO L459 AbstractCegarLoop]: Abstraction has 426 states and 458 transitions. [2018-04-12 00:51:14,152 INFO L460 AbstractCegarLoop]: Interpolant automaton has 96 states. [2018-04-12 00:51:14,152 INFO L276 IsEmpty]: Start isEmpty. Operand 426 states and 458 transitions. [2018-04-12 00:51:14,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 320 [2018-04-12 00:51:14,153 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:51:14,154 INFO L355 BasicCegarLoop]: trace histogram [17, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:51:14,154 INFO L408 AbstractCegarLoop]: === Iteration 39 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:51:14,154 INFO L82 PathProgramCache]: Analyzing trace with hash 719379989, now seen corresponding path program 30 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:51:14,160 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:51:14,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:51:14,211 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:51:15,989 INFO L134 CoverageAnalysis]: Checked inductivity of 2237 backedges. 1155 proven. 1082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:51:15,990 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:51:17,394 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-12 00:51:17,394 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 00:51:17,399 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-04-12 00:51:17,399 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 00:51:17,401 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 00:51:17,401 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:37, output treesize:11 [2018-04-12 00:51:20,400 INFO L134 CoverageAnalysis]: Checked inductivity of 2237 backedges. 1155 proven. 1082 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:51:20,418 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:51:20,419 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [66, 66] total 131 [2018-04-12 00:51:20,419 INFO L442 AbstractCegarLoop]: Interpolant automaton has 132 states [2018-04-12 00:51:20,419 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 132 interpolants. [2018-04-12 00:51:20,420 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1446, Invalid=15846, Unknown=0, NotChecked=0, Total=17292 [2018-04-12 00:51:20,420 INFO L87 Difference]: Start difference. First operand 426 states and 458 transitions. Second operand 132 states. [2018-04-12 00:51:26,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 00:51:26,091 INFO L93 Difference]: Finished difference Result 462 states and 497 transitions. [2018-04-12 00:51:26,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2018-04-12 00:51:26,091 INFO L78 Accepts]: Start accepts. Automaton has 132 states. Word has length 319 [2018-04-12 00:51:26,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 00:51:26,093 INFO L225 Difference]: With dead ends: 462 [2018-04-12 00:51:26,093 INFO L226 Difference]: Without dead ends: 461 [2018-04-12 00:51:26,094 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 703 GetRequests, 507 SyntacticMatches, 0 SemanticMatches, 196 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9268 ImplicationChecksByTransitivity, 8.2s TimeCoverageRelationStatistics Valid=7236, Invalid=31770, Unknown=0, NotChecked=0, Total=39006 [2018-04-12 00:51:26,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 461 states. [2018-04-12 00:51:26,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 461 to 441. [2018-04-12 00:51:26,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 441 states. [2018-04-12 00:51:26,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 441 states to 441 states and 474 transitions. [2018-04-12 00:51:26,141 INFO L78 Accepts]: Start accepts. Automaton has 441 states and 474 transitions. Word has length 319 [2018-04-12 00:51:26,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 00:51:26,141 INFO L459 AbstractCegarLoop]: Abstraction has 441 states and 474 transitions. [2018-04-12 00:51:26,141 INFO L460 AbstractCegarLoop]: Interpolant automaton has 132 states. [2018-04-12 00:51:26,141 INFO L276 IsEmpty]: Start isEmpty. Operand 441 states and 474 transitions. [2018-04-12 00:51:26,142 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 329 [2018-04-12 00:51:26,142 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 00:51:26,143 INFO L355 BasicCegarLoop]: trace histogram [17, 17, 17, 17, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 00:51:26,143 INFO L408 AbstractCegarLoop]: === Iteration 40 === [mainErr5RequiresViolation, mainErr8EnsuresViolationMEMORY_LEAK, mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr7RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr0RequiresViolation]=== [2018-04-12 00:51:26,143 INFO L82 PathProgramCache]: Analyzing trace with hash 1643898487, now seen corresponding path program 31 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 41 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:51:26,161 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 00:51:26,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 00:51:26,222 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 00:51:27,350 INFO L134 CoverageAnalysis]: Checked inductivity of 2376 backedges. 1144 proven. 1232 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:51:27,350 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 00:51:28,686 INFO L134 CoverageAnalysis]: Checked inductivity of 2376 backedges. 1144 proven. 1232 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 00:51:28,705 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-12 00:51:28,705 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [69, 69] total 102 [2018-04-12 00:51:28,706 INFO L442 AbstractCegarLoop]: Interpolant automaton has 102 states [2018-04-12 00:51:28,706 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 102 interpolants. [2018-04-12 00:51:28,706 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1291, Invalid=9011, Unknown=0, NotChecked=0, Total=10302 [2018-04-12 00:51:28,707 INFO L87 Difference]: Start difference. First operand 441 states and 474 transitions. Second operand 102 states. Received shutdown request... [2018-04-12 00:51:28,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 00:51:28,803 WARN L519 AbstractCegarLoop]: Verification canceled [2018-04-12 00:51:28,805 WARN L197 ceAbstractionStarter]: Timeout [2018-04-12 00:51:28,806 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 12.04 12:51:28 BasicIcfg [2018-04-12 00:51:28,806 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-04-12 00:51:28,806 INFO L168 Benchmark]: Toolchain (without parser) took 231081.05 ms. Allocated memory was 305.7 MB in the beginning and 657.5 MB in the end (delta: 351.8 MB). Free memory was 243.1 MB in the beginning and 315.4 MB in the end (delta: -72.3 MB). Peak memory consumption was 279.5 MB. Max. memory is 5.3 GB. [2018-04-12 00:51:28,807 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 305.7 MB. Free memory is still 267.9 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-12 00:51:28,807 INFO L168 Benchmark]: CACSL2BoogieTranslator took 322.99 ms. Allocated memory is still 305.7 MB. Free memory was 243.1 MB in the beginning and 219.1 MB in the end (delta: 24.0 MB). Peak memory consumption was 24.0 MB. Max. memory is 5.3 GB. [2018-04-12 00:51:28,807 INFO L168 Benchmark]: Boogie Preprocessor took 53.02 ms. Allocated memory is still 305.7 MB. Free memory was 219.1 MB in the beginning and 217.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-04-12 00:51:28,807 INFO L168 Benchmark]: RCFGBuilder took 497.86 ms. Allocated memory was 305.7 MB in the beginning and 466.6 MB in the end (delta: 161.0 MB). Free memory was 217.1 MB in the beginning and 404.0 MB in the end (delta: -187.0 MB). Peak memory consumption was 20.8 MB. Max. memory is 5.3 GB. [2018-04-12 00:51:28,808 INFO L168 Benchmark]: IcfgTransformer took 113923.05 ms. Allocated memory was 466.6 MB in the beginning and 1.3 GB in the end (delta: 793.2 MB). Free memory was 404.0 MB in the beginning and 527.2 MB in the end (delta: -123.2 MB). Peak memory consumption was 670.1 MB. Max. memory is 5.3 GB. [2018-04-12 00:51:28,808 INFO L168 Benchmark]: TraceAbstraction took 116278.19 ms. Allocated memory was 1.3 GB in the beginning and 657.5 MB in the end (delta: -602.4 MB). Free memory was 527.2 MB in the beginning and 315.4 MB in the end (delta: 211.8 MB). There was no memory consumed. Max. memory is 5.3 GB. [2018-04-12 00:51:28,810 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 305.7 MB. Free memory is still 267.9 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 322.99 ms. Allocated memory is still 305.7 MB. Free memory was 243.1 MB in the beginning and 219.1 MB in the end (delta: 24.0 MB). Peak memory consumption was 24.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 53.02 ms. Allocated memory is still 305.7 MB. Free memory was 219.1 MB in the beginning and 217.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 497.86 ms. Allocated memory was 305.7 MB in the beginning and 466.6 MB in the end (delta: 161.0 MB). Free memory was 217.1 MB in the beginning and 404.0 MB in the end (delta: -187.0 MB). Peak memory consumption was 20.8 MB. Max. memory is 5.3 GB. * IcfgTransformer took 113923.05 ms. Allocated memory was 466.6 MB in the beginning and 1.3 GB in the end (delta: 793.2 MB). Free memory was 404.0 MB in the beginning and 527.2 MB in the end (delta: -123.2 MB). Peak memory consumption was 670.1 MB. Max. memory is 5.3 GB. * TraceAbstraction took 116278.19 ms. Allocated memory was 1.3 GB in the beginning and 657.5 MB in the end (delta: -602.4 MB). Free memory was 527.2 MB in the beginning and 315.4 MB in the end (delta: 211.8 MB). There was no memory consumed. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 56 LocStat_MAX_WEQGRAPH_SIZE : 4 LocStat_MAX_SIZEOF_WEQEDGELABEL : 4 LocStat_NO_SUPPORTING_EQUALITIES : 706 LocStat_NO_SUPPORTING_DISEQUALITIES : 185 LocStat_NO_DISJUNCTIONS : -112 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 74 TransStat_MAX_WEQGRAPH_SIZE : 4 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 70 TransStat_NO_SUPPORTING_DISEQUALITIES : 9 TransStat_NO_DISJUNCTIONS : 76 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 17027.70 RENAME_VARIABLES(MILLISECONDS) : 724.04 UNFREEZE(MILLISECONDS) : 0.00 CONJOIN(MILLISECONDS) : 17008.65 PROJECTAWAY(MILLISECONDS) : 15537.70 ADD_WEAK_EQUALITY(MILLISECONDS) : 6.36 DISJOIN(MILLISECONDS) : 1719.68 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 748.80 ADD_EQUALITY(MILLISECONDS) : 8.66 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.00 ADD_DISEQUALITY(MILLISECONDS) : 0.32 #CONJOIN_DISJUNCTIVE : 517 #RENAME_VARIABLES : 1060 #UNFREEZE : 0 #CONJOIN : 611 #PROJECTAWAY : 580 #ADD_WEAK_EQUALITY : 12 #DISJOIN : 222 #RENAME_VARIABLES_DISJUNCTIVE : 1039 #ADD_EQUALITY : 72 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 8 - StatisticsResult: WeqCcManagerStatistics FREEZE(MILLISECONDS) : 95794.11 ADDNODE(MILLISECONDS) : 0.00 MEET(MILLISECONDS) : 16998.13 FILTERREDUNDANT(MILLISECONDS) : 0.00 REPORTWEQ(MILLISECONDS) : 6.19 JOIN(MILLISECONDS) : 1704.88 RENAMEVARS(MILLISECONDS) : 711.91 FLATTENLABELS(MILLISECONDS) : 0.00 COPY(MILLISECONDS) : 0.00 ISSTRONGERTHAN(MILLISECONDS) : 72058.38 ISLABELSTRONGERTHAN(MILLISECONDS) : 6693.29 ISWEQGRAPHSTRONGERTHAN(MILLISECONDS) : 790.77 UNFREEZE(MILLISECONDS) : 165.64 REPORTCONTAINS(MILLISECONDS) : 0.00 PROJECTAWAY(MILLISECONDS) : 15363.22 MEETEDGELABELS(MILLISECONDS) : 984.46 REPORTEQUALITY(MILLISECONDS) : 425.28 ADDALLNODES(MILLISECONDS) : 416.93 REPORTDISEQUALITY(MILLISECONDS) : 5.19 WEQGRAPHJOIN(MILLISECONDS) : 1553.09 #FREEZE : 4065 #ADDNODE : 0 #MEET : 420 #FILTERREDUNDANT : 0 #REPORTWEQ : 12 #JOIN : 222 #RENAMEVARS : 1060 #FLATTENLABELS : 0 #COPY : 0 #ISSTRONGERTHAN : 1341 #ISLABELSTRONGERTHAN : 570825 #ISWEQGRAPHSTRONGERTHAN : 776 #UNFREEZE : 2233 #REPORTCONTAINS : 0 #PROJECTAWAY : 753 #MEETEDGELABELS : 4109 #REPORTEQUALITY : 5925 #ADDALLNODES : 420 #REPORTDISEQUALITY : 1398 #WEQGRAPHJOIN : 222 - StatisticsResult: CcManagerStatistics ADDNODE(MILLISECONDS) : 0.00 MEET(MILLISECONDS) : 9406.77 REPORT_EQUALITY(MILLISECONDS) : 2574.95 FILTERREDUNDANT(MILLISECONDS) : 73423.15 ADD_ALL_ELEMENTS(MILLISECONDS) : 11076.88 JOIN(MILLISECONDS) : 82.95 ALIGN_ELEMENTS(MILLISECONDS) : 39835.50 COPY(MILLISECONDS) : 0.00 REPORT_DISEQUALITY(MILLISECONDS) : 586.56 UNFREEZE(MILLISECONDS) : 0.00 OVERALL(MILLISECONDS) : 57434.14 REPORTCONTAINS(MILLISECONDS) : 0.00 IS_STRONGER_THAN_NO_CACHING(MILLISECONDS) : 54540.93 REMOVE(MILLISECONDS) : 0.00 IS_STRONGER_THAN_W_CACHING(MILLISECONDS) : 0.00 PROJECT_TO_ELEMENTS(MILLISECONDS) : 3493.27 #ADDNODE : 0 #MEET : 37761 #REPORT_EQUALITY : 524290 #FILTERREDUNDANT : 1171621 #ADD_ALL_ELEMENTS : 1169791 #JOIN : 222 #ALIGN_ELEMENTS : 565934 #COPY : 0 #REPORT_DISEQUALITY : 157739 #UNFREEZE : 0 #OVERALL : 5439880 #REPORTCONTAINS : 0 #IS_STRONGER_THAN_NO_CACHING : 1774448 #REMOVE : 0 #IS_STRONGER_THAN_W_CACHING : 0 #PROJECT_TO_ELEMENTS : 38074 * Results from de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation: - StatisticsResult: HeapSeparatorStatistics #COUNT_NEW_ARRAY_VARS_[#memory_int] : 1 COUNT_ARRAY_WRITES_for_[#memory_int]_at_dim_0 : 2 COUNT_BLOCKS_for_[#memory_int]_at_dim_0 : 1 COUNT_ARRAY_WRITES_for_[#memory_int]_at_dim_1 : 2 COUNT_BLOCKS_for_[#memory_int]_at_dim_1 : 1 COUNT_ARRAY_READS for [#memory_int] : 4 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 556]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 556). Cancelled while BasicCegarLoop was constructing difference of abstraction (441states) and interpolant automaton (currently 5 states, 102 states before enhancement), while PredicateComparison was comparing new predicate (quantifier-free) to 104 known predicates. - TimeoutResultAtElement [Line: 540]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 540). Cancelled while BasicCegarLoop was constructing difference of abstraction (441states) and interpolant automaton (currently 5 states, 102 states before enhancement), while PredicateComparison was comparing new predicate (quantifier-free) to 104 known predicates. - TimeoutResultAtElement [Line: 555]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 555). Cancelled while BasicCegarLoop was constructing difference of abstraction (441states) and interpolant automaton (currently 5 states, 102 states before enhancement), while PredicateComparison was comparing new predicate (quantifier-free) to 104 known predicates. - TimeoutResultAtElement [Line: 552]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 552). Cancelled while BasicCegarLoop was constructing difference of abstraction (441states) and interpolant automaton (currently 5 states, 102 states before enhancement), while PredicateComparison was comparing new predicate (quantifier-free) to 104 known predicates. - TimeoutResultAtElement [Line: 556]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 556). Cancelled while BasicCegarLoop was constructing difference of abstraction (441states) and interpolant automaton (currently 5 states, 102 states before enhancement), while PredicateComparison was comparing new predicate (quantifier-free) to 104 known predicates. - TimeoutResultAtElement [Line: 555]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 555). Cancelled while BasicCegarLoop was constructing difference of abstraction (441states) and interpolant automaton (currently 5 states, 102 states before enhancement), while PredicateComparison was comparing new predicate (quantifier-free) to 104 known predicates. - TimeoutResultAtElement [Line: 556]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 556). Cancelled while BasicCegarLoop was constructing difference of abstraction (441states) and interpolant automaton (currently 5 states, 102 states before enhancement), while PredicateComparison was comparing new predicate (quantifier-free) to 104 known predicates. - TimeoutResultAtElement [Line: 556]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 556). Cancelled while BasicCegarLoop was constructing difference of abstraction (441states) and interpolant automaton (currently 5 states, 102 states before enhancement), while PredicateComparison was comparing new predicate (quantifier-free) to 104 known predicates. - TimeoutResultAtElement [Line: 552]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 552). Cancelled while BasicCegarLoop was constructing difference of abstraction (441states) and interpolant automaton (currently 5 states, 102 states before enhancement), while PredicateComparison was comparing new predicate (quantifier-free) to 104 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 64 locations, 9 error locations. TIMEOUT Result, 116.2s OverallTime, 40 OverallIterations, 17 TraceHistogramMax, 54.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4985 SDtfs, 48017 SDslu, 98366 SDs, 0 SdLazy, 52518 SolverSat, 5148 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 20.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 13160 GetRequests, 9705 SyntacticMatches, 309 SemanticMatches, 3145 ConstructedPredicates, 6 IntricatePredicates, 1 DeprecatedPredicates, 98342 ImplicationChecksByTransitivity, 78.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=441occurred in iteration=39, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.9s AutomataMinimizationTime, 39 MinimizatonAttempts, 484 StatesRemovedByMinimization, 35 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 0.9s SatisfiabilityAnalysisTime, 58.1s InterpolantComputationTime, 6045 NumberOfCodeBlocks, 6045 NumberOfCodeBlocksAsserted, 40 NumberOfCheckSat, 12010 ConstructedInterpolants, 2473 QuantifiedInterpolants, 24120099 SizeOfPredicates, 1176 NumberOfNonLiveVariables, 11547 ConjunctsInSsa, 1494 ConjunctsInUnsatCore, 80 InterpolantComputations, 14 PerfectInterpolantSequences, 26230/52690 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/count_down-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-Benchmark-0-2018-04-12_00-51-28-824.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/count_down-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-VPDomainBenchmark-0-2018-04-12_00-51-28-824.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/count_down-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-BenchmarkWithCounters-0-2018-04-12_00-51-28-824.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/count_down-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-BenchmarkWithCounters-1-2018-04-12_00-51-28-824.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/count_down-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-BenchmarkWithCounters-2-2018-04-12_00-51-28-824.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/count_down-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-HeapSeparatorBenchmark-0-2018-04-12_00-51-28-824.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/count_down-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-TraceAbstractionBenchmarks-0-2018-04-12_00-51-28-824.csv Completed graceful shutdown