java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerCTransformed.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/array-memsafety/cstrncmp-alloca_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-8168ed2-m [2018-04-12 00:59:09,079 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-12 00:59:09,080 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-12 00:59:09,094 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2018-04-12 00:59:09,122 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf [2018-04-12 00:59:09,146 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-12 00:59:09,147 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-12 00:59:09,147 INFO L131 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2018-04-12 00:59:09,147 INFO L133 SettingsManager]: * ultimate.logging.details=de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation=DEBUG; [2018-04-12 00:59:09,148 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-04-12 00:59:09,148 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-04-12 00:59:09,148 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-04-12 00:59:09,148 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-04-12 00:59:09,149 INFO L133 SettingsManager]: * Parallel states before merging=1 [2018-04-12 00:59:09,149 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-04-12 00:59:09,149 INFO L131 SettingsManager]: Preferences of LTL2Aut differ from their defaults: [2018-04-12 00:59:09,149 INFO L133 SettingsManager]: * Property to check=[] a a: x > 42 [2018-04-12 00:59:09,150 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-12 00:59:09,150 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-12 00:59:09,150 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-12 00:59:09,150 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-12 00:59:09,150 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-12 00:59:09,151 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-12 00:59:09,151 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-12 00:59:09,151 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-04-12 00:59:09,151 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-12 00:59:09,151 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-12 00:59:09,152 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-12 00:59:09,152 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-04-12 00:59:09,152 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-04-12 00:59:09,152 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-12 00:59:09,153 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 00:59:09,153 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-12 00:59:09,153 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-12 00:59:09,153 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-12 00:59:09,153 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-04-12 00:59:09,154 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-04-12 00:59:09,154 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 00:59:09,154 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-04-12 00:59:09,155 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-04-12 00:59:09,155 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-04-12 00:59:09,155 INFO L131 SettingsManager]: Preferences of Boogie Printer differ from their defaults: [2018-04-12 00:59:09,155 INFO L133 SettingsManager]: * Dump path:=C:\Users\alex\AppData\Local\Temp\ [2018-04-12 00:59:09,190 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-12 00:59:09,203 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-12 00:59:09,207 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-12 00:59:09,208 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-12 00:59:09,209 INFO L276 PluginConnector]: CDTParser initialized [2018-04-12 00:59:09,210 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-memsafety/cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,548 INFO L225 CDTParser]: Created temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG7bfc1b70a [2018-04-12 00:59:09,706 INFO L287 CDTParser]: IsIndexed: true [2018-04-12 00:59:09,706 INFO L288 CDTParser]: Found 1 translation units. [2018-04-12 00:59:09,707 INFO L168 CDTParser]: Scanning cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,717 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-12 00:59:09,717 INFO L215 ultiparseSymbolTable]: [2018-04-12 00:59:09,717 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-12 00:59:09,718 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,718 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____bswap_32 ('__bswap_32') in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,718 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____bswap_64 ('__bswap_64') in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,718 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__ ('') in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,718 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-12 00:59:09,718 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____key_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,718 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____clockid_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,718 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__clockid_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,719 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____clock_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,719 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__dev_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,719 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__u_int16_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,719 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____u_int in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,719 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__quad_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,719 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__loff_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,719 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__u_int8_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,719 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__pthread_cond_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,720 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____uint8_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,720 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__fsid_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,720 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__uint in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,720 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____blkcnt_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,720 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__pthread_condattr_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,720 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____sigset_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,720 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____WAIT_STATUS in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,720 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____daddr_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__pthread_spinlock_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__id_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__int64_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__pthread_barrier_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____u_quad_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____pid_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____syscall_slong_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__ushort in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____int64_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____quad_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__wchar_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__register_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,721 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____useconds_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__pthread_attr_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____nlink_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____fsblkcnt64_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__sigset_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____gid_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____sig_atomic_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____timer_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____ino64_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____syscall_ulong_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__pthread_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____uid_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__ssize_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,722 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____fd_mask in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__nlink_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__u_int32_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__key_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__fd_mask in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__fsfilcnt_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____ssize_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__pthread_rwlockattr_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____blkcnt64_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____fsword_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__timer_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____off_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,723 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____uint64_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__int32_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____suseconds_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__time_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____int32_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__fsblkcnt_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__div_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____id_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____uint32_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,724 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__caddr_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____qaddr_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____rlim64_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____fsfilcnt_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__pthread_mutexattr_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__u_int in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____blksize_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__blksize_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____off64_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,725 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____time_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____intptr_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__int8_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__size_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____u_char in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__pthread_key_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__u_quad_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__ino_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__uid_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,726 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__pthread_rwlock_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____socklen_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__lldiv_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__pthread_mutex_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__int16_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____fsblkcnt_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____pthread_list_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__pthread_barrierattr_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____rlim_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,727 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____fsfilcnt64_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__u_short in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____int16_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____u_long in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__ldiv_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__blkcnt_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____int8_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__gid_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,728 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__ulong in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,729 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__u_char in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,729 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__off_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,729 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__u_int64_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,729 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__pthread_once_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,729 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____mode_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,729 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____uint16_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,729 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____caddr_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,729 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____ino_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,730 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__u_long in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,730 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____loff_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,730 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____fsid_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,730 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__clock_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,730 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__pid_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,730 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__daddr_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,730 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__fd_set in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,730 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____dev_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,730 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__mode_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,731 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i__suseconds_t in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,731 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____u_short in cstrncmp-alloca_true-valid-memsafety_true-termination.i [2018-04-12 00:59:09,748 INFO L330 CDTParser]: Deleted temporary CDT project at /storage/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG7bfc1b70a [2018-04-12 00:59:09,752 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-12 00:59:09,754 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2018-04-12 00:59:09,755 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-12 00:59:09,755 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-12 00:59:09,761 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-12 00:59:09,762 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 12:59:09" (1/1) ... [2018-04-12 00:59:09,764 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@35f08056 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:59:09, skipping insertion in model container [2018-04-12 00:59:09,764 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 12.04 12:59:09" (1/1) ... [2018-04-12 00:59:09,777 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 00:59:09,806 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-12 00:59:10,000 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 00:59:10,049 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-12 00:59:10,056 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 112 non ball SCCs. Number of states in SCCs 112. [2018-04-12 00:59:10,097 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:59:10 WrapperNode [2018-04-12 00:59:10,097 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-12 00:59:10,098 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-12 00:59:10,098 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-12 00:59:10,098 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-12 00:59:10,110 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:59:10" (1/1) ... [2018-04-12 00:59:10,110 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:59:10" (1/1) ... [2018-04-12 00:59:10,125 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:59:10" (1/1) ... [2018-04-12 00:59:10,125 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:59:10" (1/1) ... [2018-04-12 00:59:10,136 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:59:10" (1/1) ... [2018-04-12 00:59:10,141 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:59:10" (1/1) ... [2018-04-12 00:59:10,144 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:59:10" (1/1) ... [2018-04-12 00:59:10,149 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-12 00:59:10,150 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-12 00:59:10,150 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-12 00:59:10,150 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-12 00:59:10,151 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:59:10" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-12 00:59:10,275 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-12 00:59:10,275 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-12 00:59:10,275 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____bswap_32 [2018-04-12 00:59:10,275 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____bswap_64 [2018-04-12 00:59:10,275 INFO L136 BoogieDeclarations]: Found implementation of procedure cstrncmp [2018-04-12 00:59:10,275 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-12 00:59:10,275 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____bswap_32 [2018-04-12 00:59:10,276 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fcstrncmp_alloca_true_valid_memsafety_true_termination_i____bswap_64 [2018-04-12 00:59:10,276 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-12 00:59:10,276 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-12 00:59:10,276 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-12 00:59:10,276 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-12 00:59:10,276 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-12 00:59:10,276 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-12 00:59:10,277 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-12 00:59:10,277 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-12 00:59:10,277 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-12 00:59:10,277 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-12 00:59:10,277 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-12 00:59:10,277 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-12 00:59:10,277 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-12 00:59:10,278 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-12 00:59:10,278 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-12 00:59:10,278 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-12 00:59:10,278 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-12 00:59:10,278 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-12 00:59:10,278 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-12 00:59:10,278 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-12 00:59:10,279 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-12 00:59:10,279 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-12 00:59:10,279 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-12 00:59:10,279 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-12 00:59:10,279 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-12 00:59:10,279 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-12 00:59:10,279 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-12 00:59:10,280 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-12 00:59:10,280 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-12 00:59:10,280 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-12 00:59:10,280 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-12 00:59:10,280 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-12 00:59:10,280 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-12 00:59:10,280 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-12 00:59:10,281 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-12 00:59:10,281 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-12 00:59:10,281 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-12 00:59:10,281 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-12 00:59:10,281 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-12 00:59:10,281 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-12 00:59:10,281 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-12 00:59:10,281 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-12 00:59:10,282 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-12 00:59:10,282 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-12 00:59:10,282 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-12 00:59:10,282 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-12 00:59:10,282 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-12 00:59:10,282 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-12 00:59:10,282 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-12 00:59:10,282 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-12 00:59:10,283 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-12 00:59:10,283 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-12 00:59:10,283 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-12 00:59:10,283 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-12 00:59:10,283 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-12 00:59:10,283 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-12 00:59:10,283 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-12 00:59:10,284 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-12 00:59:10,284 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-12 00:59:10,284 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-12 00:59:10,284 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-12 00:59:10,284 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-12 00:59:10,284 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-12 00:59:10,284 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-12 00:59:10,285 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-12 00:59:10,285 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-12 00:59:10,285 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-12 00:59:10,285 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-12 00:59:10,285 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-12 00:59:10,285 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-12 00:59:10,285 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-12 00:59:10,285 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-12 00:59:10,286 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-12 00:59:10,286 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-12 00:59:10,286 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-12 00:59:10,286 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-12 00:59:10,286 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-12 00:59:10,286 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-12 00:59:10,286 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-12 00:59:10,286 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-12 00:59:10,287 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-12 00:59:10,287 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-12 00:59:10,287 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-12 00:59:10,287 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-12 00:59:10,287 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-12 00:59:10,287 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-12 00:59:10,287 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-12 00:59:10,288 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-12 00:59:10,288 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-12 00:59:10,288 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-12 00:59:10,288 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-12 00:59:10,288 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-12 00:59:10,288 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-12 00:59:10,288 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-12 00:59:10,288 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-12 00:59:10,289 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-12 00:59:10,289 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-12 00:59:10,289 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-12 00:59:10,289 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-12 00:59:10,289 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-12 00:59:10,289 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-12 00:59:10,289 INFO L128 BoogieDeclarations]: Found specification of procedure cstrncmp [2018-04-12 00:59:10,289 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-12 00:59:10,290 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-12 00:59:10,290 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-12 00:59:10,290 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-12 00:59:10,290 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-12 00:59:10,290 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-12 00:59:10,290 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-12 00:59:10,290 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-12 00:59:10,684 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-12 00:59:10,684 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 12:59:10 BoogieIcfgContainer [2018-04-12 00:59:10,684 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-12 00:59:10,685 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2018-04-12 00:59:10,685 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2018-04-12 00:59:10,686 INFO L276 PluginConnector]: IcfgTransformer initialized [2018-04-12 00:59:10,688 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 12:59:10" (1/1) ... [2018-04-12 00:59:10,695 INFO L139 apSepIcfgTransformer]: HeapSepIcfgTransformer: Starting heap partitioning [2018-04-12 00:59:10,695 INFO L140 apSepIcfgTransformer]: To be partitioned heap arrays found [#memory_int] [2018-04-12 00:59:10,715 INFO L299 apSepIcfgTransformer]: Heap separator: starting memloc-array-style preprocessing [2018-04-12 00:59:10,734 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 112 non ball SCCs. Number of states in SCCs 112. [2018-04-12 00:59:10,744 INFO L332 apSepIcfgTransformer]: finished MemlocArrayUpdater, created 4 location literals (each corresponds to one heap write) [2018-04-12 00:59:10,754 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 112 non ball SCCs. Number of states in SCCs 112. [2018-04-12 00:59:10,766 INFO L412 apSepIcfgTransformer]: finished preprocessing for the equality analysis [2018-04-12 00:59:10,766 DEBUG L416 apSepIcfgTransformer]: storeIndexInfoToLocLiteral: Map: (Store [1] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with v_main_~nondetString1~0.base_2) : mll_L566_0 (Store [2] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with v_main_~nondetString2~0.base_2) : |mll_L566'_3| (Store [3] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1))) : |mll_L566'_2| (Store [0] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1))) : mll_L566_1 [2018-04-12 00:59:10,769 DEBUG L418 apSepIcfgTransformer]: edgeToIndexToStoreIndexInfo: NestedMap2: (SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') : (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1)) : (Store [3] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1))) (SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') : v_main_~nondetString2~0.base_2 : (Store [2] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with v_main_~nondetString2~0.base_2) (SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) : v_main_~nondetString1~0.base_2 : (Store [1] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with v_main_~nondetString1~0.base_2) (SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) : (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1)) : (Store [0] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1))) [2018-04-12 00:59:10,818 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=1) [2018-04-12 01:00:57,396 INFO L314 AbstractInterpreter]: Visited 113 different actions 610 times. Merged at 81 different actions 310 times. Never widened. Found 36 fixpoints after 11 different actions. Largest state had 46 variables. [2018-04-12 01:00:57,397 INFO L424 apSepIcfgTransformer]: finished equality analysis [2018-04-12 01:00:57,405 INFO L195 HeapSepPreAnalysis]: Number of read from array group [#memory_int] : 7 [2018-04-12 01:00:57,406 INFO L434 apSepIcfgTransformer]: Finished pre analysis before partitioning [2018-04-12 01:00:57,406 INFO L435 apSepIcfgTransformer]: array groups: Set: [#memory_int] [2018-04-12 01:00:57,406 INFO L437 apSepIcfgTransformer]: select infos: Set: ((select |v_#memory_int_2| v_main_~nondetString1~0.base_2), at (SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566)) ((select |v_#memory_int_4| v_main_~nondetString2~0.base_2), at (SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566')) ((select (select |v_#memory_int_5| v_cstrncmp_~s2.base_1) v_cstrncmp_~s2.offset_1), at (SUMMARY for call #t~mem11 := read~int(~s2.base, ~s2.offset, 1); srcloc: L552)) ((select (select |v_#memory_int_7| v_cstrncmp_~s2.base_5) v_cstrncmp_~s2.offset_4), at (SUMMARY for call #t~mem4 := read~int(~s2.base, ~s2.offset, 1); srcloc: L545''''')) ((select (select |v_#memory_int_9| v_cstrncmp_~s1.base_11) v_cstrncmp_~s1.offset_9), at (SUMMARY for call #t~mem10 := read~int(~s1.base, ~s1.offset, 1); srcloc: L545''''''''''''''''''')) ((select (select |v_#memory_int_6| v_cstrncmp_~s1.base_3) v_cstrncmp_~s1.offset_3), at (SUMMARY for call #t~mem3 := read~int(~s1.base, ~s1.offset, 1); srcloc: L545'''')) ((select (select |v_#memory_int_8| v_cstrncmp_~s1.base_6) v_cstrncmp_~s1.offset_5), at (SUMMARY for call #t~mem6 := read~int(~s1.base, ~s1.offset, 1); srcloc: L546''')) [2018-04-12 01:00:57,558 DEBUG L262 HeapPartitionManager]: merging partition blocks for array group[#memory_int] : [2018-04-12 01:00:57,559 DEBUG L264 HeapPartitionManager]: (Store [0] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1))) [2018-04-12 01:00:57,559 DEBUG L265 HeapPartitionManager]: and [2018-04-12 01:00:57,559 DEBUG L266 HeapPartitionManager]: (Store [3] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1))) [2018-04-12 01:00:57,559 DEBUG L267 HeapPartitionManager]: because of possible aliasing at dimension 1 [2018-04-12 01:00:57,559 DEBUG L268 HeapPartitionManager]: at array read ((select (select |v_#memory_int_5| v_cstrncmp_~s2.base_1) v_cstrncmp_~s2.offset_1), at (SUMMARY for call #t~mem11 := read~int(~s2.base, ~s2.offset, 1); srcloc: L552)). [2018-04-12 01:00:57,604 DEBUG L262 HeapPartitionManager]: merging partition blocks for array group[#memory_int] : [2018-04-12 01:00:57,604 DEBUG L264 HeapPartitionManager]: (Store [0] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1))) [2018-04-12 01:00:57,604 DEBUG L265 HeapPartitionManager]: and [2018-04-12 01:00:57,604 DEBUG L266 HeapPartitionManager]: (Store [3] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1))) [2018-04-12 01:00:57,604 DEBUG L267 HeapPartitionManager]: because of possible aliasing at dimension 1 [2018-04-12 01:00:57,604 DEBUG L268 HeapPartitionManager]: at array read ((select (select |v_#memory_int_7| v_cstrncmp_~s2.base_5) v_cstrncmp_~s2.offset_4), at (SUMMARY for call #t~mem4 := read~int(~s2.base, ~s2.offset, 1); srcloc: L545''''')). [2018-04-12 01:00:57,648 DEBUG L262 HeapPartitionManager]: merging partition blocks for array group[#memory_int] : [2018-04-12 01:00:57,648 DEBUG L264 HeapPartitionManager]: (Store [0] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1))) [2018-04-12 01:00:57,648 DEBUG L265 HeapPartitionManager]: and [2018-04-12 01:00:57,648 DEBUG L266 HeapPartitionManager]: (Store [3] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1))) [2018-04-12 01:00:57,649 DEBUG L267 HeapPartitionManager]: because of possible aliasing at dimension 1 [2018-04-12 01:00:57,649 DEBUG L268 HeapPartitionManager]: at array read ((select (select |v_#memory_int_9| v_cstrncmp_~s1.base_11) v_cstrncmp_~s1.offset_9), at (SUMMARY for call #t~mem10 := read~int(~s1.base, ~s1.offset, 1); srcloc: L545''''''''''''''''''')). [2018-04-12 01:00:57,692 DEBUG L262 HeapPartitionManager]: merging partition blocks for array group[#memory_int] : [2018-04-12 01:00:57,692 DEBUG L264 HeapPartitionManager]: (Store [0] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1))) [2018-04-12 01:00:57,692 DEBUG L265 HeapPartitionManager]: and [2018-04-12 01:00:57,692 DEBUG L266 HeapPartitionManager]: (Store [3] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1))) [2018-04-12 01:00:57,692 DEBUG L267 HeapPartitionManager]: because of possible aliasing at dimension 1 [2018-04-12 01:00:57,692 DEBUG L268 HeapPartitionManager]: at array read ((select (select |v_#memory_int_6| v_cstrncmp_~s1.base_3) v_cstrncmp_~s1.offset_3), at (SUMMARY for call #t~mem3 := read~int(~s1.base, ~s1.offset, 1); srcloc: L545'''')). [2018-04-12 01:00:57,736 DEBUG L262 HeapPartitionManager]: merging partition blocks for array group[#memory_int] : [2018-04-12 01:00:57,737 DEBUG L264 HeapPartitionManager]: (Store [0] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1))) [2018-04-12 01:00:57,737 DEBUG L265 HeapPartitionManager]: and [2018-04-12 01:00:57,737 DEBUG L266 HeapPartitionManager]: (Store [3] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1))) [2018-04-12 01:00:57,737 DEBUG L267 HeapPartitionManager]: because of possible aliasing at dimension 1 [2018-04-12 01:00:57,737 DEBUG L268 HeapPartitionManager]: at array read ((select (select |v_#memory_int_8| v_cstrncmp_~s1.base_6) v_cstrncmp_~s1.offset_5), at (SUMMARY for call #t~mem6 := read~int(~s1.base, ~s1.offset, 1); srcloc: L546''')). [2018-04-12 01:00:57,738 DEBUG L373 HeapPartitionManager]: creating LocationBlock locs_30 [2018-04-12 01:00:57,738 DEBUG L374 HeapPartitionManager]: with contents [NoStoreIndexInfo] [2018-04-12 01:00:57,738 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_30 [2018-04-12 01:00:57,738 DEBUG L324 HeapPartitionManager]: at dimension 0 for ((select |v_#memory_int_2| v_main_~nondetString1~0.base_2), at (SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566)) [2018-04-12 01:00:57,738 DEBUG L325 HeapPartitionManager]: write locations: [NoStoreIndexInfo] [2018-04-12 01:00:57,738 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_30 [2018-04-12 01:00:57,739 DEBUG L324 HeapPartitionManager]: at dimension 0 for ((select |v_#memory_int_4| v_main_~nondetString2~0.base_2), at (SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566')) [2018-04-12 01:00:57,739 DEBUG L325 HeapPartitionManager]: write locations: [NoStoreIndexInfo] [2018-04-12 01:00:57,739 DEBUG L373 HeapPartitionManager]: creating LocationBlock locs_33 [2018-04-12 01:00:57,739 DEBUG L374 HeapPartitionManager]: with contents [(Store [2] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with v_main_~nondetString2~0.base_2)] [2018-04-12 01:00:57,739 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_33 [2018-04-12 01:00:57,739 DEBUG L324 HeapPartitionManager]: at dimension 0 for ((select (select |v_#memory_int_5| v_cstrncmp_~s2.base_1) v_cstrncmp_~s2.offset_1), at (SUMMARY for call #t~mem11 := read~int(~s2.base, ~s2.offset, 1); srcloc: L552)) [2018-04-12 01:00:57,739 DEBUG L325 HeapPartitionManager]: write locations: [(Store [2] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with v_main_~nondetString2~0.base_2)] [2018-04-12 01:00:57,739 DEBUG L373 HeapPartitionManager]: creating LocationBlock locs_65 [2018-04-12 01:00:57,739 DEBUG L374 HeapPartitionManager]: with contents [(Store [3] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1))), (Store [0] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1)))] [2018-04-12 01:00:57,739 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_65 [2018-04-12 01:00:57,739 DEBUG L324 HeapPartitionManager]: at dimension 1 for ((select (select |v_#memory_int_5| v_cstrncmp_~s2.base_1) v_cstrncmp_~s2.offset_1), at (SUMMARY for call #t~mem11 := read~int(~s2.base, ~s2.offset, 1); srcloc: L552)) [2018-04-12 01:00:57,739 DEBUG L325 HeapPartitionManager]: write locations: [(Store [3] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1))), (Store [0] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1)))] [2018-04-12 01:00:57,739 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_33 [2018-04-12 01:00:57,740 DEBUG L324 HeapPartitionManager]: at dimension 0 for ((select (select |v_#memory_int_7| v_cstrncmp_~s2.base_5) v_cstrncmp_~s2.offset_4), at (SUMMARY for call #t~mem4 := read~int(~s2.base, ~s2.offset, 1); srcloc: L545''''')) [2018-04-12 01:00:57,740 DEBUG L325 HeapPartitionManager]: write locations: [(Store [2] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with v_main_~nondetString2~0.base_2)] [2018-04-12 01:00:57,740 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_65 [2018-04-12 01:00:57,740 DEBUG L324 HeapPartitionManager]: at dimension 1 for ((select (select |v_#memory_int_7| v_cstrncmp_~s2.base_5) v_cstrncmp_~s2.offset_4), at (SUMMARY for call #t~mem4 := read~int(~s2.base, ~s2.offset, 1); srcloc: L545''''')) [2018-04-12 01:00:57,740 DEBUG L325 HeapPartitionManager]: write locations: [(Store [3] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1))), (Store [0] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1)))] [2018-04-12 01:00:57,740 DEBUG L373 HeapPartitionManager]: creating LocationBlock locs_32 [2018-04-12 01:00:57,740 DEBUG L374 HeapPartitionManager]: with contents [(Store [1] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with v_main_~nondetString1~0.base_2)] [2018-04-12 01:00:57,740 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_32 [2018-04-12 01:00:57,740 DEBUG L324 HeapPartitionManager]: at dimension 0 for ((select (select |v_#memory_int_9| v_cstrncmp_~s1.base_11) v_cstrncmp_~s1.offset_9), at (SUMMARY for call #t~mem10 := read~int(~s1.base, ~s1.offset, 1); srcloc: L545''''''''''''''''''')) [2018-04-12 01:00:57,740 DEBUG L325 HeapPartitionManager]: write locations: [(Store [1] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with v_main_~nondetString1~0.base_2)] [2018-04-12 01:00:57,740 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_65 [2018-04-12 01:00:57,740 DEBUG L324 HeapPartitionManager]: at dimension 1 for ((select (select |v_#memory_int_9| v_cstrncmp_~s1.base_11) v_cstrncmp_~s1.offset_9), at (SUMMARY for call #t~mem10 := read~int(~s1.base, ~s1.offset, 1); srcloc: L545''''''''''''''''''')) [2018-04-12 01:00:57,740 DEBUG L325 HeapPartitionManager]: write locations: [(Store [3] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1))), (Store [0] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1)))] [2018-04-12 01:00:57,741 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_32 [2018-04-12 01:00:57,741 DEBUG L324 HeapPartitionManager]: at dimension 0 for ((select (select |v_#memory_int_6| v_cstrncmp_~s1.base_3) v_cstrncmp_~s1.offset_3), at (SUMMARY for call #t~mem3 := read~int(~s1.base, ~s1.offset, 1); srcloc: L545'''')) [2018-04-12 01:00:57,741 DEBUG L325 HeapPartitionManager]: write locations: [(Store [1] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with v_main_~nondetString1~0.base_2)] [2018-04-12 01:00:57,741 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_65 [2018-04-12 01:00:57,741 DEBUG L324 HeapPartitionManager]: at dimension 1 for ((select (select |v_#memory_int_6| v_cstrncmp_~s1.base_3) v_cstrncmp_~s1.offset_3), at (SUMMARY for call #t~mem3 := read~int(~s1.base, ~s1.offset, 1); srcloc: L545'''')) [2018-04-12 01:00:57,741 DEBUG L325 HeapPartitionManager]: write locations: [(Store [3] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1))), (Store [0] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1)))] [2018-04-12 01:00:57,741 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_32 [2018-04-12 01:00:57,741 DEBUG L324 HeapPartitionManager]: at dimension 0 for ((select (select |v_#memory_int_8| v_cstrncmp_~s1.base_6) v_cstrncmp_~s1.offset_5), at (SUMMARY for call #t~mem6 := read~int(~s1.base, ~s1.offset, 1); srcloc: L546''')) [2018-04-12 01:00:57,741 DEBUG L325 HeapPartitionManager]: write locations: [(Store [1] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with v_main_~nondetString1~0.base_2)] [2018-04-12 01:00:57,741 DEBUG L323 HeapPartitionManager]: adding LocationBlock locs_65 [2018-04-12 01:00:57,741 DEBUG L324 HeapPartitionManager]: at dimension 1 for ((select (select |v_#memory_int_8| v_cstrncmp_~s1.base_6) v_cstrncmp_~s1.offset_5), at (SUMMARY for call #t~mem6 := read~int(~s1.base, ~s1.offset, 1); srcloc: L546''')) [2018-04-12 01:00:57,741 DEBUG L325 HeapPartitionManager]: write locations: [(Store [3] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1))), (Store [0] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1)))] [2018-04-12 01:00:57,741 INFO L330 HeapPartitionManager]: partitioning result: [2018-04-12 01:00:57,742 INFO L335 HeapPartitionManager]: location blocks for array group [#memory_int] [2018-04-12 01:00:57,742 INFO L344 HeapPartitionManager]: at dimension 0 [2018-04-12 01:00:57,742 INFO L345 HeapPartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 3 [2018-04-12 01:00:57,742 INFO L346 HeapPartitionManager]: # location blocks :3 [2018-04-12 01:00:57,742 DEBUG L353 HeapPartitionManager]: location block contents: [2018-04-12 01:00:57,742 DEBUG L356 HeapPartitionManager]: [(Store [1] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with v_main_~nondetString1~0.base_2)] [2018-04-12 01:00:57,742 DEBUG L356 HeapPartitionManager]: [(Store [2] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with v_main_~nondetString2~0.base_2)] [2018-04-12 01:00:57,742 DEBUG L356 HeapPartitionManager]: [NoStoreIndexInfo] [2018-04-12 01:00:57,742 INFO L344 HeapPartitionManager]: at dimension 1 [2018-04-12 01:00:57,742 INFO L345 HeapPartitionManager]: # array writes (possibly including 1 dummy write/NoStoreIndexInfo) : 2 [2018-04-12 01:00:57,742 INFO L346 HeapPartitionManager]: # location blocks :1 [2018-04-12 01:00:57,742 DEBUG L353 HeapPartitionManager]: location block contents: [2018-04-12 01:00:57,743 DEBUG L356 HeapPartitionManager]: [(Store [3] at(SUMMARY for call write~int(0, ~nondetString2~0.base, ~nondetString2~0.offset + (~length2~0 - 1) * 1, 1); srcloc: L566') with (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1))), (Store [0] at(SUMMARY for call write~int(0, ~nondetString1~0.base, ~nondetString1~0.offset + (~length1~0 - 1) * 1, 1); srcloc: L566) with (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1)))] [2018-04-12 01:00:57,743 INFO L134 ransitionTransformer]: executing heap partitioning transformation [2018-04-12 01:00:57,746 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,747 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,747 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,747 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,747 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,747 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,747 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,747 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,748 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,748 DEBUG L331 ransitionTransformer]: Formula: (and (= |v_#NULL.offset_1| 0) (= |v_#NULL.base_1| 0)) InVars {} OutVars{#NULL.offset=|v_#NULL.offset_1|, #NULL.base=|v_#NULL.base_1|} AuxVars[] AssignedVars[#NULL.offset, #NULL.base] [2018-04-12 01:00:57,748 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,748 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,748 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,748 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,748 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,748 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,749 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,749 DEBUG L331 ransitionTransformer]: Formula: (and (<= |v_main_#t~nondet13_1| 2147483647) (<= 0 (+ |v_main_#t~nondet13_1| 2147483648))) InVars {main_#t~nondet13=|v_main_#t~nondet13_1|} OutVars{main_#t~nondet13=|v_main_#t~nondet13_1|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,749 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,749 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,749 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,749 DEBUG L331 ransitionTransformer]: Formula: (= |v_#valid_1| (store |v_#valid_2| 0 0)) InVars {#valid=|v_#valid_2|} OutVars{#valid=|v_#valid_1|} AuxVars[] AssignedVars[#valid] [2018-04-12 01:00:57,749 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,749 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,749 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,750 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~length1~0_1 |v_main_#t~nondet13_2|) InVars {main_#t~nondet13=|v_main_#t~nondet13_2|} OutVars{main_~length1~0=v_main_~length1~0_1, main_#t~nondet13=|v_main_#t~nondet13_2|} AuxVars[] AssignedVars[main_~length1~0] [2018-04-12 01:00:57,750 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,750 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,750 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,750 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,750 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,750 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,750 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,750 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,750 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,750 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,751 DEBUG L356 ransitionTransformer]: {main_#t~nondet13=|v_main_#t~nondet13_3|} [2018-04-12 01:00:57,751 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,751 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,751 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,751 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,751 DEBUG L331 ransitionTransformer]: Formula: (and (<= 0 (+ |v_main_#t~nondet14_1| 2147483648)) (<= |v_main_#t~nondet14_1| 2147483647)) InVars {main_#t~nondet14=|v_main_#t~nondet14_1|} OutVars{main_#t~nondet14=|v_main_#t~nondet14_1|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,751 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,751 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,752 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,752 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~length2~0_1 |v_main_#t~nondet14_2|) InVars {main_#t~nondet14=|v_main_#t~nondet14_2|} OutVars{main_~length2~0=v_main_~length2~0_1, main_#t~nondet14=|v_main_#t~nondet14_2|} AuxVars[] AssignedVars[main_~length2~0] [2018-04-12 01:00:57,752 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,752 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,752 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,752 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,752 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,752 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,752 DEBUG L356 ransitionTransformer]: {main_#t~nondet14=|v_main_#t~nondet14_3|} [2018-04-12 01:00:57,752 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,752 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,753 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,753 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,753 DEBUG L331 ransitionTransformer]: Formula: (< v_main_~length1~0_2 1) InVars {main_~length1~0=v_main_~length1~0_2} OutVars{main_~length1~0=v_main_~length1~0_2} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,753 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,753 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,753 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,753 DEBUG L331 ransitionTransformer]: Formula: (not (< v_main_~length1~0_4 1)) InVars {main_~length1~0=v_main_~length1~0_4} OutVars{main_~length1~0=v_main_~length1~0_4} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,753 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,753 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,754 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,754 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~length1~0_3 1) InVars {} OutVars{main_~length1~0=v_main_~length1~0_3} AuxVars[] AssignedVars[main_~length1~0] [2018-04-12 01:00:57,754 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,754 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,754 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,754 DEBUG L331 ransitionTransformer]: Formula: (< v_main_~length2~0_2 1) InVars {main_~length2~0=v_main_~length2~0_2} OutVars{main_~length2~0=v_main_~length2~0_2} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,754 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,754 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,754 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,755 DEBUG L331 ransitionTransformer]: Formula: (not (< v_main_~length2~0_4 1)) InVars {main_~length2~0=v_main_~length2~0_4} OutVars{main_~length2~0=v_main_~length2~0_4} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,755 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,755 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,755 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,755 DEBUG L331 ransitionTransformer]: Formula: (= v_main_~length2~0_3 1) InVars {} OutVars{main_~length2~0=v_main_~length2~0_3} AuxVars[] AssignedVars[main_~length2~0] [2018-04-12 01:00:57,755 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,755 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,756 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,756 DEBUG L331 ransitionTransformer]: Formula: (and (= 0 |v_main_#t~malloc15.offset_1|) (not (= 0 |v_main_#t~malloc15.base_1|)) (= (store |v_#length_2| |v_main_#t~malloc15.base_1| v_main_~length1~0_5) |v_#length_1|) (= 0 (select |v_#valid_4| |v_main_#t~malloc15.base_1|)) (= |v_#valid_3| (store |v_#valid_4| |v_main_#t~malloc15.base_1| 1))) InVars {main_~length1~0=v_main_~length1~0_5, #length=|v_#length_2|, #valid=|v_#valid_4|} OutVars{main_#t~malloc15.offset=|v_main_#t~malloc15.offset_1|, main_~length1~0=v_main_~length1~0_5, #length=|v_#length_1|, main_#t~malloc15.base=|v_main_#t~malloc15.base_1|, #valid=|v_#valid_3|} AuxVars[] AssignedVars[main_#t~malloc15.offset, #valid, #length, main_#t~malloc15.base] [2018-04-12 01:00:57,756 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,756 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,756 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,757 DEBUG L331 ransitionTransformer]: Formula: (and (= v_main_~nondetString1~0.offset_1 |v_main_#t~malloc15.offset_2|) (= v_main_~nondetString1~0.base_1 |v_main_#t~malloc15.base_2|)) InVars {main_#t~malloc15.base=|v_main_#t~malloc15.base_2|, main_#t~malloc15.offset=|v_main_#t~malloc15.offset_2|} OutVars{main_#t~malloc15.offset=|v_main_#t~malloc15.offset_2|, main_#t~malloc15.base=|v_main_#t~malloc15.base_2|, main_~nondetString1~0.base=v_main_~nondetString1~0.base_1, main_~nondetString1~0.offset=v_main_~nondetString1~0.offset_1} AuxVars[] AssignedVars[main_~nondetString1~0.base, main_~nondetString1~0.offset] [2018-04-12 01:00:57,757 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,757 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,757 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,757 DEBUG L331 ransitionTransformer]: Formula: (and (not (= |v_main_#t~malloc16.base_1| 0)) (= 0 |v_main_#t~malloc16.offset_1|) (= |v_#valid_5| (store |v_#valid_6| |v_main_#t~malloc16.base_1| 1)) (= (store |v_#length_4| |v_main_#t~malloc16.base_1| v_main_~length2~0_5) |v_#length_3|) (= 0 (select |v_#valid_6| |v_main_#t~malloc16.base_1|))) InVars {#length=|v_#length_4|, main_~length2~0=v_main_~length2~0_5, #valid=|v_#valid_6|} OutVars{main_#t~malloc16.offset=|v_main_#t~malloc16.offset_1|, #length=|v_#length_3|, main_~length2~0=v_main_~length2~0_5, #valid=|v_#valid_5|, main_#t~malloc16.base=|v_main_#t~malloc16.base_1|} AuxVars[] AssignedVars[#valid, main_#t~malloc16.offset, #length, main_#t~malloc16.base] [2018-04-12 01:00:57,758 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,758 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,758 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,758 DEBUG L331 ransitionTransformer]: Formula: (and (= v_main_~nondetString2~0.base_1 |v_main_#t~malloc16.base_2|) (= v_main_~nondetString2~0.offset_1 |v_main_#t~malloc16.offset_2|)) InVars {main_#t~malloc16.offset=|v_main_#t~malloc16.offset_2|, main_#t~malloc16.base=|v_main_#t~malloc16.base_2|} OutVars{main_#t~malloc16.offset=|v_main_#t~malloc16.offset_2|, main_~nondetString2~0.offset=v_main_~nondetString2~0.offset_1, main_~nondetString2~0.base=v_main_~nondetString2~0.base_1, main_#t~malloc16.base=|v_main_#t~malloc16.base_2|} AuxVars[] AssignedVars[main_~nondetString2~0.offset, main_~nondetString2~0.base] [2018-04-12 01:00:57,758 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,758 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,762 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,762 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse0 (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6))) (and (= |v_#memory_int_part_locs_32_locs_65_1| (store |v_#memory_int_part_locs_32_locs_65_2| v_main_~nondetString1~0.base_2 (store (select |v_#memory_int_part_locs_30_locs_65_1| v_main_~nondetString1~0.base_2) (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1)) 0))) (= 1 (select |v_#valid_7| v_main_~nondetString1~0.base_2)) (<= .cse0 (select |v_#length_5| v_main_~nondetString1~0.base_2)) (<= 1 .cse0))) InVars {main_~length1~0=v_main_~length1~0_6, main_~nondetString1~0.base=v_main_~nondetString1~0.base_2, #valid=|v_#valid_7|, #length=|v_#length_5|, #memory_int_part_locs_32_locs_65=|v_#memory_int_part_locs_32_locs_65_2|, #memory_int_part_locs_30_locs_65=|v_#memory_int_part_locs_30_locs_65_1|, main_~nondetString1~0.offset=v_main_~nondetString1~0.offset_2} OutVars{main_~length1~0=v_main_~length1~0_6, main_~nondetString1~0.base=v_main_~nondetString1~0.base_2, #valid=|v_#valid_7|, #length=|v_#length_5|, #memory_int_part_locs_32_locs_65=|v_#memory_int_part_locs_32_locs_65_1|, main_~nondetString1~0.offset=v_main_~nondetString1~0.offset_2, #memory_int_part_locs_30_locs_65=|v_#memory_int_part_locs_30_locs_65_1|} AuxVars[] AssignedVars[#memory_int_part_locs_32_locs_65] [2018-04-12 01:00:57,762 DEBUG L338 ransitionTransformer]: formula has changed [2018-04-12 01:00:57,762 DEBUG L339 ransitionTransformer]: old formula: [2018-04-12 01:00:57,762 DEBUG L340 ransitionTransformer]: (let ((.cse0 (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6))) (and (= 1 (select |v_#valid_7| v_main_~nondetString1~0.base_2)) (= |v_#memory_int_1| (store |v_#memory_int_2| v_main_~nondetString1~0.base_2 (store (select |v_#memory_int_2| v_main_~nondetString1~0.base_2) (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1)) 0))) (<= .cse0 (select |v_#length_5| v_main_~nondetString1~0.base_2)) (<= 1 .cse0))) [2018-04-12 01:00:57,763 DEBUG L341 ransitionTransformer]: new formula: [2018-04-12 01:00:57,763 DEBUG L342 ransitionTransformer]: (let ((.cse0 (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6))) (and (= |v_#memory_int_part_locs_32_locs_65_1| (store |v_#memory_int_part_locs_32_locs_65_2| v_main_~nondetString1~0.base_2 (store (select |v_#memory_int_part_locs_30_locs_65_1| v_main_~nondetString1~0.base_2) (+ v_main_~nondetString1~0.offset_2 v_main_~length1~0_6 (- 1)) 0))) (= 1 (select |v_#valid_7| v_main_~nondetString1~0.base_2)) (<= .cse0 (select |v_#length_5| v_main_~nondetString1~0.base_2)) (<= 1 .cse0))) [2018-04-12 01:00:57,763 DEBUG L346 ransitionTransformer]: invars have changed [2018-04-12 01:00:57,763 DEBUG L347 ransitionTransformer]: old invars: [2018-04-12 01:00:57,763 DEBUG L348 ransitionTransformer]: {main_~length1~0=v_main_~length1~0_6, main_~nondetString1~0.base=v_main_~nondetString1~0.base_2, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_2|, #length=|v_#length_5|, main_~nondetString1~0.offset=v_main_~nondetString1~0.offset_2} [2018-04-12 01:00:57,763 DEBUG L349 ransitionTransformer]: new invars: [2018-04-12 01:00:57,763 DEBUG L350 ransitionTransformer]: {main_~length1~0=v_main_~length1~0_6, main_~nondetString1~0.base=v_main_~nondetString1~0.base_2, #valid=|v_#valid_7|, #length=|v_#length_5|, #memory_int_part_locs_32_locs_65=|v_#memory_int_part_locs_32_locs_65_2|, #memory_int_part_locs_30_locs_65=|v_#memory_int_part_locs_30_locs_65_1|, main_~nondetString1~0.offset=v_main_~nondetString1~0.offset_2} [2018-04-12 01:00:57,763 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,763 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,763 DEBUG L356 ransitionTransformer]: {main_~length1~0=v_main_~length1~0_6, main_~nondetString1~0.base=v_main_~nondetString1~0.base_2, #valid=|v_#valid_7|, #memory_int=|v_#memory_int_1|, #length=|v_#length_5|, main_~nondetString1~0.offset=v_main_~nondetString1~0.offset_2} [2018-04-12 01:00:57,763 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,764 DEBUG L358 ransitionTransformer]: {main_~length1~0=v_main_~length1~0_6, main_~nondetString1~0.base=v_main_~nondetString1~0.base_2, #valid=|v_#valid_7|, #length=|v_#length_5|, #memory_int_part_locs_32_locs_65=|v_#memory_int_part_locs_32_locs_65_1|, main_~nondetString1~0.offset=v_main_~nondetString1~0.offset_2, #memory_int_part_locs_30_locs_65=|v_#memory_int_part_locs_30_locs_65_1|} [2018-04-12 01:00:57,764 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,764 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,764 DEBUG L331 ransitionTransformer]: Formula: (not (= (select |v_#valid_8| v_main_~nondetString1~0.base_3) 1)) InVars {main_~nondetString1~0.base=v_main_~nondetString1~0.base_3, #valid=|v_#valid_8|} OutVars{main_~nondetString1~0.base=v_main_~nondetString1~0.base_3, #valid=|v_#valid_8|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,764 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,764 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,764 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,764 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse0 (+ v_main_~length1~0_7 v_main_~nondetString1~0.offset_3))) (or (not (<= .cse0 (select |v_#length_6| v_main_~nondetString1~0.base_4))) (not (<= 1 .cse0)))) InVars {main_~length1~0=v_main_~length1~0_7, #length=|v_#length_6|, main_~nondetString1~0.base=v_main_~nondetString1~0.base_4, main_~nondetString1~0.offset=v_main_~nondetString1~0.offset_3} OutVars{main_~length1~0=v_main_~length1~0_7, #length=|v_#length_6|, main_~nondetString1~0.base=v_main_~nondetString1~0.base_4, main_~nondetString1~0.offset=v_main_~nondetString1~0.offset_3} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,764 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,765 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,765 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,765 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse0 (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2))) (and (<= .cse0 (select |v_#length_7| v_main_~nondetString2~0.base_2)) (<= 1 .cse0) (= 1 (select |v_#valid_9| v_main_~nondetString2~0.base_2)) (= (store |v_#memory_int_part_locs_33_locs_65_3| v_main_~nondetString2~0.base_2 (store (select |v_#memory_int_part_locs_30_locs_65_3| v_main_~nondetString2~0.base_2) (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1)) 0)) |v_#memory_int_part_locs_33_locs_65_4|))) InVars {#memory_int_part_locs_33_locs_65=|v_#memory_int_part_locs_33_locs_65_3|, #valid=|v_#valid_9|, #length=|v_#length_7|, main_~length2~0=v_main_~length2~0_6, main_~nondetString2~0.offset=v_main_~nondetString2~0.offset_2, #memory_int_part_locs_30_locs_65=|v_#memory_int_part_locs_30_locs_65_3|, main_~nondetString2~0.base=v_main_~nondetString2~0.base_2} OutVars{#memory_int_part_locs_33_locs_65=|v_#memory_int_part_locs_33_locs_65_4|, #valid=|v_#valid_9|, #length=|v_#length_7|, main_~length2~0=v_main_~length2~0_6, main_~nondetString2~0.offset=v_main_~nondetString2~0.offset_2, main_~nondetString2~0.base=v_main_~nondetString2~0.base_2, #memory_int_part_locs_30_locs_65=|v_#memory_int_part_locs_30_locs_65_3|} AuxVars[] AssignedVars[#memory_int_part_locs_33_locs_65] [2018-04-12 01:00:57,765 DEBUG L338 ransitionTransformer]: formula has changed [2018-04-12 01:00:57,765 DEBUG L339 ransitionTransformer]: old formula: [2018-04-12 01:00:57,765 DEBUG L340 ransitionTransformer]: (let ((.cse0 (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2))) (and (<= .cse0 (select |v_#length_7| v_main_~nondetString2~0.base_2)) (= (store |v_#memory_int_4| v_main_~nondetString2~0.base_2 (store (select |v_#memory_int_4| v_main_~nondetString2~0.base_2) (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1)) 0)) |v_#memory_int_3|) (<= 1 .cse0) (= 1 (select |v_#valid_9| v_main_~nondetString2~0.base_2)))) [2018-04-12 01:00:57,766 DEBUG L341 ransitionTransformer]: new formula: [2018-04-12 01:00:57,766 DEBUG L342 ransitionTransformer]: (let ((.cse0 (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2))) (and (<= .cse0 (select |v_#length_7| v_main_~nondetString2~0.base_2)) (<= 1 .cse0) (= 1 (select |v_#valid_9| v_main_~nondetString2~0.base_2)) (= (store |v_#memory_int_part_locs_33_locs_65_3| v_main_~nondetString2~0.base_2 (store (select |v_#memory_int_part_locs_30_locs_65_3| v_main_~nondetString2~0.base_2) (+ v_main_~length2~0_6 v_main_~nondetString2~0.offset_2 (- 1)) 0)) |v_#memory_int_part_locs_33_locs_65_4|))) [2018-04-12 01:00:57,766 DEBUG L346 ransitionTransformer]: invars have changed [2018-04-12 01:00:57,766 DEBUG L347 ransitionTransformer]: old invars: [2018-04-12 01:00:57,766 DEBUG L348 ransitionTransformer]: {#valid=|v_#valid_9|, #memory_int=|v_#memory_int_4|, #length=|v_#length_7|, main_~length2~0=v_main_~length2~0_6, main_~nondetString2~0.offset=v_main_~nondetString2~0.offset_2, main_~nondetString2~0.base=v_main_~nondetString2~0.base_2} [2018-04-12 01:00:57,766 DEBUG L349 ransitionTransformer]: new invars: [2018-04-12 01:00:57,766 DEBUG L350 ransitionTransformer]: {#memory_int_part_locs_33_locs_65=|v_#memory_int_part_locs_33_locs_65_3|, #valid=|v_#valid_9|, #length=|v_#length_7|, main_~length2~0=v_main_~length2~0_6, main_~nondetString2~0.offset=v_main_~nondetString2~0.offset_2, #memory_int_part_locs_30_locs_65=|v_#memory_int_part_locs_30_locs_65_3|, main_~nondetString2~0.base=v_main_~nondetString2~0.base_2} [2018-04-12 01:00:57,766 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,766 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,766 DEBUG L356 ransitionTransformer]: {#valid=|v_#valid_9|, #memory_int=|v_#memory_int_3|, #length=|v_#length_7|, main_~length2~0=v_main_~length2~0_6, main_~nondetString2~0.offset=v_main_~nondetString2~0.offset_2, main_~nondetString2~0.base=v_main_~nondetString2~0.base_2} [2018-04-12 01:00:57,766 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,767 DEBUG L358 ransitionTransformer]: {#memory_int_part_locs_33_locs_65=|v_#memory_int_part_locs_33_locs_65_4|, #valid=|v_#valid_9|, #length=|v_#length_7|, main_~length2~0=v_main_~length2~0_6, main_~nondetString2~0.offset=v_main_~nondetString2~0.offset_2, main_~nondetString2~0.base=v_main_~nondetString2~0.base_2, #memory_int_part_locs_30_locs_65=|v_#memory_int_part_locs_30_locs_65_3|} [2018-04-12 01:00:57,767 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,767 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,767 DEBUG L331 ransitionTransformer]: Formula: (not (= 1 (select |v_#valid_10| v_main_~nondetString2~0.base_3))) InVars {#valid=|v_#valid_10|, main_~nondetString2~0.base=v_main_~nondetString2~0.base_3} OutVars{#valid=|v_#valid_10|, main_~nondetString2~0.base=v_main_~nondetString2~0.base_3} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,767 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,767 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,767 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,767 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse0 (+ v_main_~length2~0_7 v_main_~nondetString2~0.offset_3))) (or (not (<= .cse0 (select |v_#length_8| v_main_~nondetString2~0.base_4))) (not (<= 1 .cse0)))) InVars {#length=|v_#length_8|, main_~length2~0=v_main_~length2~0_7, main_~nondetString2~0.offset=v_main_~nondetString2~0.offset_3, main_~nondetString2~0.base=v_main_~nondetString2~0.base_4} OutVars{#length=|v_#length_8|, main_~length2~0=v_main_~length2~0_7, main_~nondetString2~0.offset=v_main_~nondetString2~0.offset_3, main_~nondetString2~0.base=v_main_~nondetString2~0.base_4} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,767 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,768 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,768 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,768 DEBUG L331 ransitionTransformer]: Formula: (and (<= 0 (+ |v_main_#t~nondet17_1| 2147483648)) (<= |v_main_#t~nondet17_1| 2147483647)) InVars {main_#t~nondet17=|v_main_#t~nondet17_1|} OutVars{main_#t~nondet17=|v_main_#t~nondet17_1|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,768 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,768 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,768 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,768 DEBUG L331 ransitionTransformer]: Formula: (and (= |v_cstrncmp_#in~s2.baseInParam_1| v_main_~nondetString2~0.base_6) (= |v_cstrncmp_#in~s1.baseInParam_1| v_main_~nondetString1~0.base_6) (= |v_cstrncmp_#in~s1.offsetInParam_1| v_main_~nondetString1~0.offset_5) (= |v_cstrncmp_#in~s2.offsetInParam_1| v_main_~nondetString2~0.offset_5) (= |v_cstrncmp_#in~nInParam_1| |v_main_#t~nondet17_4|)) InVars {main_~nondetString1~0.base=v_main_~nondetString1~0.base_6, main_~nondetString2~0.offset=v_main_~nondetString2~0.offset_5, main_#t~nondet17=|v_main_#t~nondet17_4|, main_~nondetString1~0.offset=v_main_~nondetString1~0.offset_5, main_~nondetString2~0.base=v_main_~nondetString2~0.base_6} OutVars{cstrncmp_#in~s2.base=|v_cstrncmp_#in~s2.baseInParam_1|, cstrncmp_#in~s1.offset=|v_cstrncmp_#in~s1.offsetInParam_1|, cstrncmp_#in~s1.base=|v_cstrncmp_#in~s1.baseInParam_1|, cstrncmp_#in~n=|v_cstrncmp_#in~nInParam_1|, main_~nondetString1~0.base=v_main_~nondetString1~0.base_6, main_#t~nondet17=|v_main_#t~nondet17_4|, cstrncmp_#in~s2.offset=|v_cstrncmp_#in~s2.offsetInParam_1|, main_~nondetString2~0.offset=v_main_~nondetString2~0.offset_5, main_~nondetString1~0.offset=v_main_~nondetString1~0.offset_5, main_~nondetString2~0.base=v_main_~nondetString2~0.base_6} AuxVars[] AssignedVars[cstrncmp_#in~s2.base, cstrncmp_#in~s1.offset, cstrncmp_#in~s1.base, cstrncmp_#in~n, cstrncmp_#in~s2.offset] [2018-04-12 01:00:57,768 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,769 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,769 DEBUG L356 ransitionTransformer]: {cstrncmp_#in~s2.base=|v_cstrncmp_#in~s2.baseInParam_1|, cstrncmp_#in~s1.offset=|v_cstrncmp_#in~s1.offsetInParam_1|, cstrncmp_#in~s1.base=|v_cstrncmp_#in~s1.baseInParam_1|, cstrncmp_#in~n=|v_cstrncmp_#in~nInParam_1|, cstrncmp_#in~s2.offset=|v_cstrncmp_#in~s2.offsetInParam_1|} [2018-04-12 01:00:57,769 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,769 DEBUG L358 ransitionTransformer]: {cstrncmp_#in~s2.base=|v_cstrncmp_#in~s2.baseInParam_1|, cstrncmp_#in~s1.offset=|v_cstrncmp_#in~s1.offsetInParam_1|, cstrncmp_#in~s1.base=|v_cstrncmp_#in~s1.baseInParam_1|, cstrncmp_#in~n=|v_cstrncmp_#in~nInParam_1|, main_~nondetString1~0.base=v_main_~nondetString1~0.base_6, main_#t~nondet17=|v_main_#t~nondet17_4|, cstrncmp_#in~s2.offset=|v_cstrncmp_#in~s2.offsetInParam_1|, main_~nondetString2~0.offset=v_main_~nondetString2~0.offset_5, main_~nondetString1~0.offset=v_main_~nondetString1~0.offset_5, main_~nondetString2~0.base=v_main_~nondetString2~0.base_6} [2018-04-12 01:00:57,769 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,769 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,769 DEBUG L331 ransitionTransformer]: Formula: (and (<= |v_main_#t~ret18_2| 2147483647) (<= 0 (+ |v_main_#t~ret18_2| 2147483648))) InVars {main_#t~ret18=|v_main_#t~ret18_2|} OutVars{main_#t~ret18=|v_main_#t~ret18_2|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,769 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,769 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,770 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,770 DEBUG L331 ransitionTransformer]: Formula: (and (= v_cstrncmp_~s1.base_2 |v_cstrncmp_#in~s1.base_1|) (= v_cstrncmp_~s1.offset_2 |v_cstrncmp_#in~s1.offset_1|)) InVars {cstrncmp_#in~s1.offset=|v_cstrncmp_#in~s1.offset_1|, cstrncmp_#in~s1.base=|v_cstrncmp_#in~s1.base_1|} OutVars{cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_2, cstrncmp_~s1.base=v_cstrncmp_~s1.base_2, cstrncmp_#in~s1.offset=|v_cstrncmp_#in~s1.offset_1|, cstrncmp_#in~s1.base=|v_cstrncmp_#in~s1.base_1|} AuxVars[] AssignedVars[cstrncmp_~s1.offset, cstrncmp_~s1.base] [2018-04-12 01:00:57,770 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,770 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,770 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,770 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#res_1| |v_main_#t~ret18_3|) InVars {main_#t~ret18=|v_main_#t~ret18_3|} OutVars{main_#t~ret18=|v_main_#t~ret18_3|, main_#res=|v_main_#res_1|} AuxVars[] AssignedVars[main_#res] [2018-04-12 01:00:57,771 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,771 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,771 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,771 DEBUG L331 ransitionTransformer]: Formula: (and (= v_cstrncmp_~s2.offset_3 |v_cstrncmp_#in~s2.offset_1|) (= v_cstrncmp_~s2.base_4 |v_cstrncmp_#in~s2.base_1|)) InVars {cstrncmp_#in~s2.base=|v_cstrncmp_#in~s2.base_1|, cstrncmp_#in~s2.offset=|v_cstrncmp_#in~s2.offset_1|} OutVars{cstrncmp_~s2.base=v_cstrncmp_~s2.base_4, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_3, cstrncmp_#in~s2.base=|v_cstrncmp_#in~s2.base_1|, cstrncmp_#in~s2.offset=|v_cstrncmp_#in~s2.offset_1|} AuxVars[] AssignedVars[cstrncmp_~s2.base, cstrncmp_~s2.offset] [2018-04-12 01:00:57,771 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,771 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,772 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,772 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,772 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,772 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,772 DEBUG L356 ransitionTransformer]: {main_#t~nondet17=|v_main_#t~nondet17_3|} [2018-04-12 01:00:57,772 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,773 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,773 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,773 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,773 DEBUG L331 ransitionTransformer]: Formula: (= v_cstrncmp_~n_1 |v_cstrncmp_#in~n_1|) InVars {cstrncmp_#in~n=|v_cstrncmp_#in~n_1|} OutVars{cstrncmp_~n=v_cstrncmp_~n_1, cstrncmp_#in~n=|v_cstrncmp_#in~n_1|} AuxVars[] AssignedVars[cstrncmp_~n] [2018-04-12 01:00:57,773 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,773 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,774 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,774 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,774 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,774 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,774 DEBUG L356 ransitionTransformer]: {main_#t~ret18=|v_main_#t~ret18_4|} [2018-04-12 01:00:57,774 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,774 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,775 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,775 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,775 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,775 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,775 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,775 DEBUG L356 ransitionTransformer]: {cstrncmp_~uc1~0=v_cstrncmp_~uc1~0_5} [2018-04-12 01:00:57,775 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,776 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,776 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,776 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,776 DEBUG L331 ransitionTransformer]: Formula: (= |v_#valid_11| (store |v_#valid_12| |v_main_#t~malloc15.base_3| 0)) InVars {main_#t~malloc15.base=|v_main_#t~malloc15.base_3|, #valid=|v_#valid_12|} OutVars{main_#t~malloc15.base=|v_main_#t~malloc15.base_3|, #valid=|v_#valid_11|} AuxVars[] AssignedVars[#valid] [2018-04-12 01:00:57,776 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,776 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,777 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,777 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,777 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,777 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,777 DEBUG L356 ransitionTransformer]: {cstrncmp_~uc2~0=v_cstrncmp_~uc2~0_5} [2018-04-12 01:00:57,777 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,777 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,778 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,778 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,778 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,778 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,778 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,778 DEBUG L356 ransitionTransformer]: {main_#t~malloc15.offset=|v_main_#t~malloc15.offset_4|, main_#t~malloc15.base=|v_main_#t~malloc15.base_4|} [2018-04-12 01:00:57,778 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,779 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,779 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,779 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,779 DEBUG L331 ransitionTransformer]: Formula: (= 0 v_cstrncmp_~n_2) InVars {cstrncmp_~n=v_cstrncmp_~n_2} OutVars{cstrncmp_~n=v_cstrncmp_~n_2} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,779 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,779 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,780 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,780 DEBUG L331 ransitionTransformer]: Formula: (not (= 0 v_cstrncmp_~n_3)) InVars {cstrncmp_~n=v_cstrncmp_~n_3} OutVars{cstrncmp_~n=v_cstrncmp_~n_3} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,780 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,780 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,780 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,780 DEBUG L331 ransitionTransformer]: Formula: (= |v_#valid_13| (store |v_#valid_14| |v_main_#t~malloc16.base_3| 0)) InVars {#valid=|v_#valid_14|, main_#t~malloc16.base=|v_main_#t~malloc16.base_3|} OutVars{#valid=|v_#valid_13|, main_#t~malloc16.base=|v_main_#t~malloc16.base_3|} AuxVars[] AssignedVars[#valid] [2018-04-12 01:00:57,781 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,781 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,781 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,781 DEBUG L331 ransitionTransformer]: Formula: (= |v_cstrncmp_#res_2| 0) InVars {} OutVars{cstrncmp_#res=|v_cstrncmp_#res_2|} AuxVars[] AssignedVars[cstrncmp_#res] [2018-04-12 01:00:57,781 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,781 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,781 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,782 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,782 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,782 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,782 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,782 DEBUG L331 ransitionTransformer]: Formula: false InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,782 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,783 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,783 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,783 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,783 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,783 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,783 DEBUG L356 ransitionTransformer]: {main_#t~malloc16.offset=|v_main_#t~malloc16.offset_4|, main_#t~malloc16.base=|v_main_#t~malloc16.base_4|} [2018-04-12 01:00:57,783 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,784 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,784 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,784 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,784 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,784 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,784 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,785 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,785 DEBUG L331 ransitionTransformer]: Formula: (= |v_cstrncmp_#t~post2_1| v_cstrncmp_~n_4) InVars {cstrncmp_~n=v_cstrncmp_~n_4} OutVars{cstrncmp_#t~post2=|v_cstrncmp_#t~post2_1|, cstrncmp_~n=v_cstrncmp_~n_4} AuxVars[] AssignedVars[cstrncmp_#t~post2] [2018-04-12 01:00:57,785 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,785 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,785 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,786 DEBUG L331 ransitionTransformer]: Formula: (and (= |v_cstrncmp_#t~mem10_3| (select (select |v_#memory_int_part_locs_32_locs_65_5| v_cstrncmp_~s1.base_11) v_cstrncmp_~s1.offset_9)) (<= (+ v_cstrncmp_~s1.offset_9 1) (select |v_#length_18| v_cstrncmp_~s1.base_11)) (<= 0 v_cstrncmp_~s1.offset_9) (= (select |v_#valid_25| v_cstrncmp_~s1.base_11) 1)) InVars {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_9, cstrncmp_~s1.base=v_cstrncmp_~s1.base_11, #length=|v_#length_18|, #memory_int_part_locs_32_locs_65=|v_#memory_int_part_locs_32_locs_65_5|, #valid=|v_#valid_25|} OutVars{cstrncmp_#t~mem10=|v_cstrncmp_#t~mem10_3|, cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_9, cstrncmp_~s1.base=v_cstrncmp_~s1.base_11, #valid=|v_#valid_25|, #length=|v_#length_18|, #memory_int_part_locs_32_locs_65=|v_#memory_int_part_locs_32_locs_65_5|} AuxVars[] AssignedVars[cstrncmp_#t~mem10] [2018-04-12 01:00:57,786 DEBUG L338 ransitionTransformer]: formula has changed [2018-04-12 01:00:57,786 DEBUG L339 ransitionTransformer]: old formula: [2018-04-12 01:00:57,786 DEBUG L340 ransitionTransformer]: (and (= |v_cstrncmp_#t~mem10_3| (select (select |v_#memory_int_9| v_cstrncmp_~s1.base_11) v_cstrncmp_~s1.offset_9)) (<= (+ v_cstrncmp_~s1.offset_9 1) (select |v_#length_18| v_cstrncmp_~s1.base_11)) (<= 0 v_cstrncmp_~s1.offset_9) (= (select |v_#valid_25| v_cstrncmp_~s1.base_11) 1)) [2018-04-12 01:00:57,786 DEBUG L341 ransitionTransformer]: new formula: [2018-04-12 01:00:57,786 DEBUG L342 ransitionTransformer]: (and (= |v_cstrncmp_#t~mem10_3| (select (select |v_#memory_int_part_locs_32_locs_65_5| v_cstrncmp_~s1.base_11) v_cstrncmp_~s1.offset_9)) (<= (+ v_cstrncmp_~s1.offset_9 1) (select |v_#length_18| v_cstrncmp_~s1.base_11)) (<= 0 v_cstrncmp_~s1.offset_9) (= (select |v_#valid_25| v_cstrncmp_~s1.base_11) 1)) [2018-04-12 01:00:57,786 DEBUG L346 ransitionTransformer]: invars have changed [2018-04-12 01:00:57,787 DEBUG L347 ransitionTransformer]: old invars: [2018-04-12 01:00:57,787 DEBUG L348 ransitionTransformer]: {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_9, cstrncmp_~s1.base=v_cstrncmp_~s1.base_11, #valid=|v_#valid_25|, #memory_int=|v_#memory_int_9|, #length=|v_#length_18|} [2018-04-12 01:00:57,787 DEBUG L349 ransitionTransformer]: new invars: [2018-04-12 01:00:57,787 DEBUG L350 ransitionTransformer]: {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_9, cstrncmp_~s1.base=v_cstrncmp_~s1.base_11, #length=|v_#length_18|, #memory_int_part_locs_32_locs_65=|v_#memory_int_part_locs_32_locs_65_5|, #valid=|v_#valid_25|} [2018-04-12 01:00:57,787 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,787 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,787 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~mem10=|v_cstrncmp_#t~mem10_3|, cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_9, cstrncmp_~s1.base=v_cstrncmp_~s1.base_11, #valid=|v_#valid_25|, #memory_int=|v_#memory_int_9|, #length=|v_#length_18|} [2018-04-12 01:00:57,788 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,788 DEBUG L358 ransitionTransformer]: {cstrncmp_#t~mem10=|v_cstrncmp_#t~mem10_3|, cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_9, cstrncmp_~s1.base=v_cstrncmp_~s1.base_11, #valid=|v_#valid_25|, #length=|v_#length_18|, #memory_int_part_locs_32_locs_65=|v_#memory_int_part_locs_32_locs_65_5|} [2018-04-12 01:00:57,788 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,788 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,788 DEBUG L331 ransitionTransformer]: Formula: (not (= 1 (select |v_#valid_26| v_cstrncmp_~s1.base_12))) InVars {cstrncmp_~s1.base=v_cstrncmp_~s1.base_12, #valid=|v_#valid_26|} OutVars{cstrncmp_~s1.base=v_cstrncmp_~s1.base_12, #valid=|v_#valid_26|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,788 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,789 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,789 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,789 DEBUG L331 ransitionTransformer]: Formula: (or (not (<= 0 v_cstrncmp_~s1.offset_1)) (not (<= (+ v_cstrncmp_~s1.offset_1 1) (select |v_#length_9| v_cstrncmp_~s1.base_1)))) InVars {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_1, cstrncmp_~s1.base=v_cstrncmp_~s1.base_1, #length=|v_#length_9|} OutVars{cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_1, cstrncmp_~s1.base=v_cstrncmp_~s1.base_1, #length=|v_#length_9|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,789 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,789 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,790 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,790 DEBUG L331 ransitionTransformer]: Formula: (= |v_#valid_15| |old(#valid)|) InVars {#valid=|v_#valid_15|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_15|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,790 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,790 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,790 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,790 DEBUG L331 ransitionTransformer]: Formula: (not (= |v_#valid_16| |old(#valid)|)) InVars {#valid=|v_#valid_16|, old(#valid)=|old(#valid)|} OutVars{#valid=|v_#valid_16|, old(#valid)=|old(#valid)|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,790 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,791 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,791 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,791 DEBUG L331 ransitionTransformer]: Formula: (= v_cstrncmp_~n_5 (+ |v_cstrncmp_#t~post2_2| (- 1))) InVars {cstrncmp_#t~post2=|v_cstrncmp_#t~post2_2|} OutVars{cstrncmp_~n=v_cstrncmp_~n_5, cstrncmp_#t~post2=|v_cstrncmp_#t~post2_2|} AuxVars[] AssignedVars[cstrncmp_~n] [2018-04-12 01:00:57,791 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,791 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,791 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,792 DEBUG L331 ransitionTransformer]: Formula: (= v_cstrncmp_~uc1~0_1 |v_cstrncmp_#t~mem10_1|) InVars {cstrncmp_#t~mem10=|v_cstrncmp_#t~mem10_1|} OutVars{cstrncmp_~uc1~0=v_cstrncmp_~uc1~0_1, cstrncmp_#t~mem10=|v_cstrncmp_#t~mem10_1|} AuxVars[] AssignedVars[cstrncmp_~uc1~0] [2018-04-12 01:00:57,792 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,792 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,792 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,792 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse0 (< 0 |v_cstrncmp_#t~post2_3|))) (or (and (not .cse0) (not |v_cstrncmp_#t~short5_1|)) (and |v_cstrncmp_#t~short5_1| .cse0))) InVars {cstrncmp_#t~post2=|v_cstrncmp_#t~post2_3|} OutVars{cstrncmp_#t~post2=|v_cstrncmp_#t~post2_3|, cstrncmp_#t~short5=|v_cstrncmp_#t~short5_1|} AuxVars[] AssignedVars[cstrncmp_#t~short5] [2018-04-12 01:00:57,792 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,793 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,793 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,793 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,793 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,793 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,793 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~mem10=|v_cstrncmp_#t~mem10_2|} [2018-04-12 01:00:57,793 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,794 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,794 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,794 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,794 DEBUG L331 ransitionTransformer]: Formula: |v_cstrncmp_#t~short5_2| InVars {cstrncmp_#t~short5=|v_cstrncmp_#t~short5_2|} OutVars{cstrncmp_#t~short5=|v_cstrncmp_#t~short5_2|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,794 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,794 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,795 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,795 DEBUG L331 ransitionTransformer]: Formula: (not |v_cstrncmp_#t~short5_4|) InVars {cstrncmp_#t~short5=|v_cstrncmp_#t~short5_4|} OutVars{cstrncmp_#t~short5=|v_cstrncmp_#t~short5_4|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,795 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,795 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,795 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,795 DEBUG L331 ransitionTransformer]: Formula: (and (= |v_cstrncmp_#t~mem11_1| (select (select |v_#memory_int_part_locs_33_locs_65_5| v_cstrncmp_~s2.base_1) v_cstrncmp_~s2.offset_1)) (= 1 (select |v_#valid_17| v_cstrncmp_~s2.base_1)) (<= (+ v_cstrncmp_~s2.offset_1 1) (select |v_#length_10| v_cstrncmp_~s2.base_1)) (<= 0 v_cstrncmp_~s2.offset_1)) InVars {cstrncmp_~s2.base=v_cstrncmp_~s2.base_1, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_1, #length=|v_#length_10|, #memory_int_part_locs_33_locs_65=|v_#memory_int_part_locs_33_locs_65_5|, #valid=|v_#valid_17|} OutVars{cstrncmp_~s2.base=v_cstrncmp_~s2.base_1, #memory_int_part_locs_33_locs_65=|v_#memory_int_part_locs_33_locs_65_5|, #valid=|v_#valid_17|, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_1, #length=|v_#length_10|, cstrncmp_#t~mem11=|v_cstrncmp_#t~mem11_1|} AuxVars[] AssignedVars[cstrncmp_#t~mem11] [2018-04-12 01:00:57,795 DEBUG L338 ransitionTransformer]: formula has changed [2018-04-12 01:00:57,795 DEBUG L339 ransitionTransformer]: old formula: [2018-04-12 01:00:57,796 DEBUG L340 ransitionTransformer]: (and (= |v_cstrncmp_#t~mem11_1| (select (select |v_#memory_int_5| v_cstrncmp_~s2.base_1) v_cstrncmp_~s2.offset_1)) (= 1 (select |v_#valid_17| v_cstrncmp_~s2.base_1)) (<= (+ v_cstrncmp_~s2.offset_1 1) (select |v_#length_10| v_cstrncmp_~s2.base_1)) (<= 0 v_cstrncmp_~s2.offset_1)) [2018-04-12 01:00:57,796 DEBUG L341 ransitionTransformer]: new formula: [2018-04-12 01:00:57,796 DEBUG L342 ransitionTransformer]: (and (= |v_cstrncmp_#t~mem11_1| (select (select |v_#memory_int_part_locs_33_locs_65_5| v_cstrncmp_~s2.base_1) v_cstrncmp_~s2.offset_1)) (= 1 (select |v_#valid_17| v_cstrncmp_~s2.base_1)) (<= (+ v_cstrncmp_~s2.offset_1 1) (select |v_#length_10| v_cstrncmp_~s2.base_1)) (<= 0 v_cstrncmp_~s2.offset_1)) [2018-04-12 01:00:57,796 DEBUG L346 ransitionTransformer]: invars have changed [2018-04-12 01:00:57,796 DEBUG L347 ransitionTransformer]: old invars: [2018-04-12 01:00:57,796 DEBUG L348 ransitionTransformer]: {cstrncmp_~s2.base=v_cstrncmp_~s2.base_1, #valid=|v_#valid_17|, #memory_int=|v_#memory_int_5|, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_1, #length=|v_#length_10|} [2018-04-12 01:00:57,796 DEBUG L349 ransitionTransformer]: new invars: [2018-04-12 01:00:57,796 DEBUG L350 ransitionTransformer]: {cstrncmp_~s2.base=v_cstrncmp_~s2.base_1, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_1, #length=|v_#length_10|, #memory_int_part_locs_33_locs_65=|v_#memory_int_part_locs_33_locs_65_5|, #valid=|v_#valid_17|} [2018-04-12 01:00:57,796 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,796 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,796 DEBUG L356 ransitionTransformer]: {cstrncmp_~s2.base=v_cstrncmp_~s2.base_1, #valid=|v_#valid_17|, #memory_int=|v_#memory_int_5|, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_1, #length=|v_#length_10|, cstrncmp_#t~mem11=|v_cstrncmp_#t~mem11_1|} [2018-04-12 01:00:57,796 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,797 DEBUG L358 ransitionTransformer]: {cstrncmp_~s2.base=v_cstrncmp_~s2.base_1, #memory_int_part_locs_33_locs_65=|v_#memory_int_part_locs_33_locs_65_5|, #valid=|v_#valid_17|, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_1, #length=|v_#length_10|, cstrncmp_#t~mem11=|v_cstrncmp_#t~mem11_1|} [2018-04-12 01:00:57,797 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,797 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,797 DEBUG L331 ransitionTransformer]: Formula: (not (= 1 (select |v_#valid_18| v_cstrncmp_~s2.base_2))) InVars {cstrncmp_~s2.base=v_cstrncmp_~s2.base_2, #valid=|v_#valid_18|} OutVars{cstrncmp_~s2.base=v_cstrncmp_~s2.base_2, #valid=|v_#valid_18|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,797 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,797 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,797 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,797 DEBUG L331 ransitionTransformer]: Formula: (or (not (<= 0 v_cstrncmp_~s2.offset_2)) (not (<= (+ v_cstrncmp_~s2.offset_2 1) (select |v_#length_11| v_cstrncmp_~s2.base_3)))) InVars {cstrncmp_~s2.base=v_cstrncmp_~s2.base_3, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_2, #length=|v_#length_11|} OutVars{cstrncmp_~s2.base=v_cstrncmp_~s2.base_3, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_2, #length=|v_#length_11|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,797 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,797 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,798 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,798 DEBUG L331 ransitionTransformer]: Formula: (and (= (select |v_#valid_19| v_cstrncmp_~s1.base_3) 1) (<= (+ v_cstrncmp_~s1.offset_3 1) (select |v_#length_12| v_cstrncmp_~s1.base_3)) (<= 0 v_cstrncmp_~s1.offset_3) (= (select (select |v_#memory_int_part_locs_32_locs_65_6| v_cstrncmp_~s1.base_3) v_cstrncmp_~s1.offset_3) |v_cstrncmp_#t~mem3_1|)) InVars {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_3, cstrncmp_~s1.base=v_cstrncmp_~s1.base_3, #length=|v_#length_12|, #memory_int_part_locs_32_locs_65=|v_#memory_int_part_locs_32_locs_65_6|, #valid=|v_#valid_19|} OutVars{cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_3, cstrncmp_~s1.base=v_cstrncmp_~s1.base_3, #valid=|v_#valid_19|, #length=|v_#length_12|, #memory_int_part_locs_32_locs_65=|v_#memory_int_part_locs_32_locs_65_6|, cstrncmp_#t~mem3=|v_cstrncmp_#t~mem3_1|} AuxVars[] AssignedVars[cstrncmp_#t~mem3] [2018-04-12 01:00:57,798 DEBUG L338 ransitionTransformer]: formula has changed [2018-04-12 01:00:57,798 DEBUG L339 ransitionTransformer]: old formula: [2018-04-12 01:00:57,798 DEBUG L340 ransitionTransformer]: (and (= (select |v_#valid_19| v_cstrncmp_~s1.base_3) 1) (<= (+ v_cstrncmp_~s1.offset_3 1) (select |v_#length_12| v_cstrncmp_~s1.base_3)) (<= 0 v_cstrncmp_~s1.offset_3) (= (select (select |v_#memory_int_6| v_cstrncmp_~s1.base_3) v_cstrncmp_~s1.offset_3) |v_cstrncmp_#t~mem3_1|)) [2018-04-12 01:00:57,798 DEBUG L341 ransitionTransformer]: new formula: [2018-04-12 01:00:57,798 DEBUG L342 ransitionTransformer]: (and (= (select |v_#valid_19| v_cstrncmp_~s1.base_3) 1) (<= (+ v_cstrncmp_~s1.offset_3 1) (select |v_#length_12| v_cstrncmp_~s1.base_3)) (<= 0 v_cstrncmp_~s1.offset_3) (= (select (select |v_#memory_int_part_locs_32_locs_65_6| v_cstrncmp_~s1.base_3) v_cstrncmp_~s1.offset_3) |v_cstrncmp_#t~mem3_1|)) [2018-04-12 01:00:57,798 DEBUG L346 ransitionTransformer]: invars have changed [2018-04-12 01:00:57,798 DEBUG L347 ransitionTransformer]: old invars: [2018-04-12 01:00:57,798 DEBUG L348 ransitionTransformer]: {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_3, cstrncmp_~s1.base=v_cstrncmp_~s1.base_3, #valid=|v_#valid_19|, #memory_int=|v_#memory_int_6|, #length=|v_#length_12|} [2018-04-12 01:00:57,799 DEBUG L349 ransitionTransformer]: new invars: [2018-04-12 01:00:57,799 DEBUG L350 ransitionTransformer]: {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_3, cstrncmp_~s1.base=v_cstrncmp_~s1.base_3, #length=|v_#length_12|, #memory_int_part_locs_32_locs_65=|v_#memory_int_part_locs_32_locs_65_6|, #valid=|v_#valid_19|} [2018-04-12 01:00:57,799 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,799 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,799 DEBUG L356 ransitionTransformer]: {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_3, cstrncmp_~s1.base=v_cstrncmp_~s1.base_3, #valid=|v_#valid_19|, #memory_int=|v_#memory_int_6|, #length=|v_#length_12|, cstrncmp_#t~mem3=|v_cstrncmp_#t~mem3_1|} [2018-04-12 01:00:57,799 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,799 DEBUG L358 ransitionTransformer]: {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_3, cstrncmp_~s1.base=v_cstrncmp_~s1.base_3, #valid=|v_#valid_19|, #length=|v_#length_12|, #memory_int_part_locs_32_locs_65=|v_#memory_int_part_locs_32_locs_65_6|, cstrncmp_#t~mem3=|v_cstrncmp_#t~mem3_1|} [2018-04-12 01:00:57,799 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,799 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,799 DEBUG L331 ransitionTransformer]: Formula: (not (= (select |v_#valid_20| v_cstrncmp_~s1.base_4) 1)) InVars {cstrncmp_~s1.base=v_cstrncmp_~s1.base_4, #valid=|v_#valid_20|} OutVars{cstrncmp_~s1.base=v_cstrncmp_~s1.base_4, #valid=|v_#valid_20|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,799 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,800 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,800 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,800 DEBUG L331 ransitionTransformer]: Formula: (or (not (<= 0 v_cstrncmp_~s1.offset_4)) (not (<= (+ v_cstrncmp_~s1.offset_4 1) (select |v_#length_13| v_cstrncmp_~s1.base_5)))) InVars {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_4, cstrncmp_~s1.base=v_cstrncmp_~s1.base_5, #length=|v_#length_13|} OutVars{cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_4, cstrncmp_~s1.base=v_cstrncmp_~s1.base_5, #length=|v_#length_13|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,800 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,800 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,800 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,800 DEBUG L331 ransitionTransformer]: Formula: (not |v_cstrncmp_#t~short5_5|) InVars {cstrncmp_#t~short5=|v_cstrncmp_#t~short5_5|} OutVars{cstrncmp_#t~short5=|v_cstrncmp_#t~short5_5|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,800 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,800 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,800 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,801 DEBUG L331 ransitionTransformer]: Formula: |v_cstrncmp_#t~short5_7| InVars {cstrncmp_#t~short5=|v_cstrncmp_#t~short5_7|} OutVars{cstrncmp_#t~short5=|v_cstrncmp_#t~short5_7|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,801 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,801 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,801 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,801 DEBUG L331 ransitionTransformer]: Formula: (= v_cstrncmp_~uc2~0_1 |v_cstrncmp_#t~mem11_2|) InVars {cstrncmp_#t~mem11=|v_cstrncmp_#t~mem11_2|} OutVars{cstrncmp_~uc2~0=v_cstrncmp_~uc2~0_1, cstrncmp_#t~mem11=|v_cstrncmp_#t~mem11_2|} AuxVars[] AssignedVars[cstrncmp_~uc2~0] [2018-04-12 01:00:57,801 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,801 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,802 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,802 DEBUG L331 ransitionTransformer]: Formula: (and (= 1 (select |v_#valid_21| v_cstrncmp_~s2.base_5)) (<= (+ v_cstrncmp_~s2.offset_4 1) (select |v_#length_14| v_cstrncmp_~s2.base_5)) (<= 0 v_cstrncmp_~s2.offset_4) (= |v_cstrncmp_#t~mem4_1| (select (select |v_#memory_int_part_locs_33_locs_65_6| v_cstrncmp_~s2.base_5) v_cstrncmp_~s2.offset_4))) InVars {cstrncmp_~s2.base=v_cstrncmp_~s2.base_5, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_4, #length=|v_#length_14|, #memory_int_part_locs_33_locs_65=|v_#memory_int_part_locs_33_locs_65_6|, #valid=|v_#valid_21|} OutVars{cstrncmp_~s2.base=v_cstrncmp_~s2.base_5, #memory_int_part_locs_33_locs_65=|v_#memory_int_part_locs_33_locs_65_6|, #valid=|v_#valid_21|, cstrncmp_#t~mem4=|v_cstrncmp_#t~mem4_1|, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_4, #length=|v_#length_14|} AuxVars[] AssignedVars[cstrncmp_#t~mem4] [2018-04-12 01:00:57,802 DEBUG L338 ransitionTransformer]: formula has changed [2018-04-12 01:00:57,802 DEBUG L339 ransitionTransformer]: old formula: [2018-04-12 01:00:57,802 DEBUG L340 ransitionTransformer]: (and (= 1 (select |v_#valid_21| v_cstrncmp_~s2.base_5)) (<= (+ v_cstrncmp_~s2.offset_4 1) (select |v_#length_14| v_cstrncmp_~s2.base_5)) (<= 0 v_cstrncmp_~s2.offset_4) (= |v_cstrncmp_#t~mem4_1| (select (select |v_#memory_int_7| v_cstrncmp_~s2.base_5) v_cstrncmp_~s2.offset_4))) [2018-04-12 01:00:57,802 DEBUG L341 ransitionTransformer]: new formula: [2018-04-12 01:00:57,802 DEBUG L342 ransitionTransformer]: (and (= 1 (select |v_#valid_21| v_cstrncmp_~s2.base_5)) (<= (+ v_cstrncmp_~s2.offset_4 1) (select |v_#length_14| v_cstrncmp_~s2.base_5)) (<= 0 v_cstrncmp_~s2.offset_4) (= |v_cstrncmp_#t~mem4_1| (select (select |v_#memory_int_part_locs_33_locs_65_6| v_cstrncmp_~s2.base_5) v_cstrncmp_~s2.offset_4))) [2018-04-12 01:00:57,803 DEBUG L346 ransitionTransformer]: invars have changed [2018-04-12 01:00:57,803 DEBUG L347 ransitionTransformer]: old invars: [2018-04-12 01:00:57,803 DEBUG L348 ransitionTransformer]: {cstrncmp_~s2.base=v_cstrncmp_~s2.base_5, #valid=|v_#valid_21|, #memory_int=|v_#memory_int_7|, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_4, #length=|v_#length_14|} [2018-04-12 01:00:57,803 DEBUG L349 ransitionTransformer]: new invars: [2018-04-12 01:00:57,803 DEBUG L350 ransitionTransformer]: {cstrncmp_~s2.base=v_cstrncmp_~s2.base_5, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_4, #length=|v_#length_14|, #memory_int_part_locs_33_locs_65=|v_#memory_int_part_locs_33_locs_65_6|, #valid=|v_#valid_21|} [2018-04-12 01:00:57,803 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,803 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,803 DEBUG L356 ransitionTransformer]: {cstrncmp_~s2.base=v_cstrncmp_~s2.base_5, #valid=|v_#valid_21|, cstrncmp_#t~mem4=|v_cstrncmp_#t~mem4_1|, #memory_int=|v_#memory_int_7|, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_4, #length=|v_#length_14|} [2018-04-12 01:00:57,804 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,804 DEBUG L358 ransitionTransformer]: {cstrncmp_~s2.base=v_cstrncmp_~s2.base_5, #memory_int_part_locs_33_locs_65=|v_#memory_int_part_locs_33_locs_65_6|, #valid=|v_#valid_21|, cstrncmp_#t~mem4=|v_cstrncmp_#t~mem4_1|, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_4, #length=|v_#length_14|} [2018-04-12 01:00:57,804 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,804 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,804 DEBUG L331 ransitionTransformer]: Formula: (not (= 1 (select |v_#valid_22| v_cstrncmp_~s2.base_6))) InVars {cstrncmp_~s2.base=v_cstrncmp_~s2.base_6, #valid=|v_#valid_22|} OutVars{cstrncmp_~s2.base=v_cstrncmp_~s2.base_6, #valid=|v_#valid_22|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,804 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,805 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,805 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,805 DEBUG L331 ransitionTransformer]: Formula: (or (not (<= 0 v_cstrncmp_~s2.offset_5)) (not (<= (+ v_cstrncmp_~s2.offset_5 1) (select |v_#length_15| v_cstrncmp_~s2.base_7)))) InVars {cstrncmp_~s2.base=v_cstrncmp_~s2.base_7, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_5, #length=|v_#length_15|} OutVars{cstrncmp_~s2.base=v_cstrncmp_~s2.base_7, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_5, #length=|v_#length_15|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,805 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,805 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,805 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,806 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,806 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,806 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,806 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~mem4=|v_cstrncmp_#t~mem4_3|} [2018-04-12 01:00:57,806 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,806 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,806 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,806 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,806 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,806 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,806 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,806 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~mem4=|v_cstrncmp_#t~mem4_4|} [2018-04-12 01:00:57,807 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,807 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,807 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,807 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,807 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,807 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,807 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,808 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~mem11=|v_cstrncmp_#t~mem11_3|} [2018-04-12 01:00:57,808 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,808 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,808 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,808 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,808 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse0 (= |v_cstrncmp_#t~mem4_2| |v_cstrncmp_#t~mem3_2|))) (or (and (not .cse0) (not |v_cstrncmp_#t~short5_3|)) (and |v_cstrncmp_#t~short5_3| .cse0))) InVars {cstrncmp_#t~mem4=|v_cstrncmp_#t~mem4_2|, cstrncmp_#t~mem3=|v_cstrncmp_#t~mem3_2|} OutVars{cstrncmp_#t~mem4=|v_cstrncmp_#t~mem4_2|, cstrncmp_#t~short5=|v_cstrncmp_#t~short5_3|, cstrncmp_#t~mem3=|v_cstrncmp_#t~mem3_2|} AuxVars[] AssignedVars[cstrncmp_#t~short5] [2018-04-12 01:00:57,809 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,809 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,809 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,809 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,809 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,809 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,809 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~short5=|v_cstrncmp_#t~short5_6|} [2018-04-12 01:00:57,810 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,810 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,810 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,810 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,810 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,810 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,810 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,810 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~short5=|v_cstrncmp_#t~short5_8|} [2018-04-12 01:00:57,811 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,811 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,811 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,811 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,811 DEBUG L331 ransitionTransformer]: Formula: (< (mod v_cstrncmp_~uc1~0_2 256) (mod v_cstrncmp_~uc2~0_2 256)) InVars {cstrncmp_~uc1~0=v_cstrncmp_~uc1~0_2, cstrncmp_~uc2~0=v_cstrncmp_~uc2~0_2} OutVars{cstrncmp_~uc1~0=v_cstrncmp_~uc1~0_2, cstrncmp_~uc2~0=v_cstrncmp_~uc2~0_2} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,812 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,812 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,812 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,812 DEBUG L331 ransitionTransformer]: Formula: (not (< (mod v_cstrncmp_~uc1~0_3 256) (mod v_cstrncmp_~uc2~0_3 256))) InVars {cstrncmp_~uc1~0=v_cstrncmp_~uc1~0_3, cstrncmp_~uc2~0=v_cstrncmp_~uc2~0_3} OutVars{cstrncmp_~uc1~0=v_cstrncmp_~uc1~0_3, cstrncmp_~uc2~0=v_cstrncmp_~uc2~0_3} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,812 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,812 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,813 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,813 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,813 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,813 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,813 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~mem3=|v_cstrncmp_#t~mem3_3|} [2018-04-12 01:00:57,813 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,813 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,813 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,814 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,814 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,814 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,814 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,814 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~mem3=|v_cstrncmp_#t~mem3_4|} [2018-04-12 01:00:57,814 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,814 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,814 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,814 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,814 DEBUG L331 ransitionTransformer]: Formula: (= |v_cstrncmp_#t~ite12_1| (- 1)) InVars {} OutVars{cstrncmp_#t~ite12=|v_cstrncmp_#t~ite12_1|} AuxVars[] AssignedVars[cstrncmp_#t~ite12] [2018-04-12 01:00:57,815 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,815 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,815 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,815 DEBUG L331 ransitionTransformer]: Formula: (= |v_cstrncmp_#t~ite12_2| (ite (< (mod v_cstrncmp_~uc2~0_4 256) (mod v_cstrncmp_~uc1~0_4 256)) 1 0)) InVars {cstrncmp_~uc1~0=v_cstrncmp_~uc1~0_4, cstrncmp_~uc2~0=v_cstrncmp_~uc2~0_4} OutVars{cstrncmp_~uc1~0=v_cstrncmp_~uc1~0_4, cstrncmp_#t~ite12=|v_cstrncmp_#t~ite12_2|, cstrncmp_~uc2~0=v_cstrncmp_~uc2~0_4} AuxVars[] AssignedVars[cstrncmp_#t~ite12] [2018-04-12 01:00:57,815 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,815 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,815 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,815 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,815 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,815 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,815 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~post2=|v_cstrncmp_#t~post2_4|} [2018-04-12 01:00:57,815 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,816 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,816 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,816 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,816 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,816 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,816 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,816 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~post2=|v_cstrncmp_#t~post2_5|} [2018-04-12 01:00:57,816 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,816 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,816 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,816 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,817 DEBUG L331 ransitionTransformer]: Formula: (= |v_cstrncmp_#res_1| |v_cstrncmp_#t~ite12_3|) InVars {cstrncmp_#t~ite12=|v_cstrncmp_#t~ite12_3|} OutVars{cstrncmp_#res=|v_cstrncmp_#res_1|, cstrncmp_#t~ite12=|v_cstrncmp_#t~ite12_3|} AuxVars[] AssignedVars[cstrncmp_#res] [2018-04-12 01:00:57,817 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,817 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,817 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,817 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse0 (= 0 v_cstrncmp_~n_6))) (or (and .cse0 |v_cstrncmp_#t~short7_1|) (and (not |v_cstrncmp_#t~short7_1|) (not .cse0)))) InVars {cstrncmp_~n=v_cstrncmp_~n_6} OutVars{cstrncmp_#t~short7=|v_cstrncmp_#t~short7_1|, cstrncmp_~n=v_cstrncmp_~n_6} AuxVars[] AssignedVars[cstrncmp_#t~short7] [2018-04-12 01:00:57,817 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,817 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,817 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,817 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,817 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,818 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,818 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~ite12=|v_cstrncmp_#t~ite12_4|} [2018-04-12 01:00:57,818 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,818 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,818 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,818 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,818 DEBUG L331 ransitionTransformer]: Formula: |v_cstrncmp_#t~short7_2| InVars {cstrncmp_#t~short7=|v_cstrncmp_#t~short7_2|} OutVars{cstrncmp_#t~short7=|v_cstrncmp_#t~short7_2|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,818 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,818 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,818 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,818 DEBUG L331 ransitionTransformer]: Formula: (not |v_cstrncmp_#t~short7_3|) InVars {cstrncmp_#t~short7=|v_cstrncmp_#t~short7_3|} OutVars{cstrncmp_#t~short7=|v_cstrncmp_#t~short7_3|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,818 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,819 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,819 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,819 DEBUG L331 ransitionTransformer]: Formula: |v_cstrncmp_#t~short7_5| InVars {cstrncmp_#t~short7=|v_cstrncmp_#t~short7_5|} OutVars{cstrncmp_#t~short7=|v_cstrncmp_#t~short7_5|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,819 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,819 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,819 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,819 DEBUG L331 ransitionTransformer]: Formula: (not |v_cstrncmp_#t~short7_7|) InVars {cstrncmp_#t~short7=|v_cstrncmp_#t~short7_7|} OutVars{cstrncmp_#t~short7=|v_cstrncmp_#t~short7_7|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,819 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,819 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,820 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,820 DEBUG L331 ransitionTransformer]: Formula: (and (<= 0 v_cstrncmp_~s1.offset_5) (= (select |v_#valid_23| v_cstrncmp_~s1.base_6) 1) (= |v_cstrncmp_#t~mem6_1| (select (select |v_#memory_int_part_locs_32_locs_65_7| v_cstrncmp_~s1.base_6) v_cstrncmp_~s1.offset_5)) (<= (+ v_cstrncmp_~s1.offset_5 1) (select |v_#length_16| v_cstrncmp_~s1.base_6))) InVars {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_5, cstrncmp_~s1.base=v_cstrncmp_~s1.base_6, #length=|v_#length_16|, #memory_int_part_locs_32_locs_65=|v_#memory_int_part_locs_32_locs_65_7|, #valid=|v_#valid_23|} OutVars{cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_5, cstrncmp_~s1.base=v_cstrncmp_~s1.base_6, #valid=|v_#valid_23|, cstrncmp_#t~mem6=|v_cstrncmp_#t~mem6_1|, #length=|v_#length_16|, #memory_int_part_locs_32_locs_65=|v_#memory_int_part_locs_32_locs_65_7|} AuxVars[] AssignedVars[cstrncmp_#t~mem6] [2018-04-12 01:00:57,820 DEBUG L338 ransitionTransformer]: formula has changed [2018-04-12 01:00:57,820 DEBUG L339 ransitionTransformer]: old formula: [2018-04-12 01:00:57,820 DEBUG L340 ransitionTransformer]: (and (<= 0 v_cstrncmp_~s1.offset_5) (= (select |v_#valid_23| v_cstrncmp_~s1.base_6) 1) (= |v_cstrncmp_#t~mem6_1| (select (select |v_#memory_int_8| v_cstrncmp_~s1.base_6) v_cstrncmp_~s1.offset_5)) (<= (+ v_cstrncmp_~s1.offset_5 1) (select |v_#length_16| v_cstrncmp_~s1.base_6))) [2018-04-12 01:00:57,820 DEBUG L341 ransitionTransformer]: new formula: [2018-04-12 01:00:57,820 DEBUG L342 ransitionTransformer]: (and (<= 0 v_cstrncmp_~s1.offset_5) (= (select |v_#valid_23| v_cstrncmp_~s1.base_6) 1) (= |v_cstrncmp_#t~mem6_1| (select (select |v_#memory_int_part_locs_32_locs_65_7| v_cstrncmp_~s1.base_6) v_cstrncmp_~s1.offset_5)) (<= (+ v_cstrncmp_~s1.offset_5 1) (select |v_#length_16| v_cstrncmp_~s1.base_6))) [2018-04-12 01:00:57,821 DEBUG L346 ransitionTransformer]: invars have changed [2018-04-12 01:00:57,821 DEBUG L347 ransitionTransformer]: old invars: [2018-04-12 01:00:57,821 DEBUG L348 ransitionTransformer]: {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_5, cstrncmp_~s1.base=v_cstrncmp_~s1.base_6, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_8|, #length=|v_#length_16|} [2018-04-12 01:00:57,821 DEBUG L349 ransitionTransformer]: new invars: [2018-04-12 01:00:57,821 DEBUG L350 ransitionTransformer]: {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_5, cstrncmp_~s1.base=v_cstrncmp_~s1.base_6, #length=|v_#length_16|, #memory_int_part_locs_32_locs_65=|v_#memory_int_part_locs_32_locs_65_7|, #valid=|v_#valid_23|} [2018-04-12 01:00:57,821 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,821 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,821 DEBUG L356 ransitionTransformer]: {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_5, cstrncmp_~s1.base=v_cstrncmp_~s1.base_6, #valid=|v_#valid_23|, #memory_int=|v_#memory_int_8|, cstrncmp_#t~mem6=|v_cstrncmp_#t~mem6_1|, #length=|v_#length_16|} [2018-04-12 01:00:57,821 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,821 DEBUG L358 ransitionTransformer]: {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_5, cstrncmp_~s1.base=v_cstrncmp_~s1.base_6, #valid=|v_#valid_23|, cstrncmp_#t~mem6=|v_cstrncmp_#t~mem6_1|, #length=|v_#length_16|, #memory_int_part_locs_32_locs_65=|v_#memory_int_part_locs_32_locs_65_7|} [2018-04-12 01:00:57,821 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,821 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,822 DEBUG L331 ransitionTransformer]: Formula: (not (= (select |v_#valid_24| v_cstrncmp_~s1.base_7) 1)) InVars {cstrncmp_~s1.base=v_cstrncmp_~s1.base_7, #valid=|v_#valid_24|} OutVars{cstrncmp_~s1.base=v_cstrncmp_~s1.base_7, #valid=|v_#valid_24|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,822 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,822 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,822 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,822 DEBUG L331 ransitionTransformer]: Formula: (or (not (<= 0 v_cstrncmp_~s1.offset_6)) (not (<= (+ v_cstrncmp_~s1.offset_6 1) (select |v_#length_17| v_cstrncmp_~s1.base_8)))) InVars {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_6, cstrncmp_~s1.base=v_cstrncmp_~s1.base_8, #length=|v_#length_17|} OutVars{cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_6, cstrncmp_~s1.base=v_cstrncmp_~s1.base_8, #length=|v_#length_17|} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,822 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,822 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,822 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,822 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,822 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,823 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,823 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~mem6=|v_cstrncmp_#t~mem6_3|} [2018-04-12 01:00:57,823 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,823 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,823 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,823 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,823 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,823 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,823 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,823 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~mem6=|v_cstrncmp_#t~mem6_4|} [2018-04-12 01:00:57,823 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,823 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,824 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,824 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,824 DEBUG L331 ransitionTransformer]: Formula: (let ((.cse0 (= 0 |v_cstrncmp_#t~mem6_2|))) (or (and |v_cstrncmp_#t~short7_4| .cse0) (and (not |v_cstrncmp_#t~short7_4|) (not .cse0)))) InVars {cstrncmp_#t~mem6=|v_cstrncmp_#t~mem6_2|} OutVars{cstrncmp_#t~short7=|v_cstrncmp_#t~short7_4|, cstrncmp_#t~mem6=|v_cstrncmp_#t~mem6_2|} AuxVars[] AssignedVars[cstrncmp_#t~short7] [2018-04-12 01:00:57,824 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,824 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,824 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,824 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,824 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,824 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,824 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~short7=|v_cstrncmp_#t~short7_6|} [2018-04-12 01:00:57,824 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,825 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,825 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,825 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,825 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,825 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,825 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,825 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~short7=|v_cstrncmp_#t~short7_8|} [2018-04-12 01:00:57,825 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,825 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,825 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,825 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,826 DEBUG L331 ransitionTransformer]: Formula: (= |v_cstrncmp_#res_3| 0) InVars {} OutVars{cstrncmp_#res=|v_cstrncmp_#res_3|} AuxVars[] AssignedVars[cstrncmp_#res] [2018-04-12 01:00:57,826 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,826 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,826 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,826 DEBUG L331 ransitionTransformer]: Formula: (and (= |v_cstrncmp_#t~post8.base_1| v_cstrncmp_~s1.base_9) (= |v_cstrncmp_#t~post8.offset_1| v_cstrncmp_~s1.offset_7)) InVars {cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_7, cstrncmp_~s1.base=v_cstrncmp_~s1.base_9} OutVars{cstrncmp_#t~post8.base=|v_cstrncmp_#t~post8.base_1|, cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_7, cstrncmp_~s1.base=v_cstrncmp_~s1.base_9, cstrncmp_#t~post8.offset=|v_cstrncmp_#t~post8.offset_1|} AuxVars[] AssignedVars[cstrncmp_#t~post8.base, cstrncmp_#t~post8.offset] [2018-04-12 01:00:57,826 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,826 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,826 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,827 DEBUG L331 ransitionTransformer]: Formula: (and (= v_cstrncmp_~s1.offset_8 (+ |v_cstrncmp_#t~post8.offset_2| 1)) (= v_cstrncmp_~s1.base_10 |v_cstrncmp_#t~post8.base_2|)) InVars {cstrncmp_#t~post8.base=|v_cstrncmp_#t~post8.base_2|, cstrncmp_#t~post8.offset=|v_cstrncmp_#t~post8.offset_2|} OutVars{cstrncmp_#t~post8.base=|v_cstrncmp_#t~post8.base_2|, cstrncmp_~s1.offset=v_cstrncmp_~s1.offset_8, cstrncmp_~s1.base=v_cstrncmp_~s1.base_10, cstrncmp_#t~post8.offset=|v_cstrncmp_#t~post8.offset_2|} AuxVars[] AssignedVars[cstrncmp_~s1.offset, cstrncmp_~s1.base] [2018-04-12 01:00:57,827 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,827 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,827 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,827 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,827 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,827 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,827 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~post8.base=|v_cstrncmp_#t~post8.base_3|, cstrncmp_#t~post8.offset=|v_cstrncmp_#t~post8.offset_3|} [2018-04-12 01:00:57,828 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,828 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,828 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,828 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,828 DEBUG L331 ransitionTransformer]: Formula: (and (= |v_cstrncmp_#t~post9.base_1| v_cstrncmp_~s2.base_8) (= |v_cstrncmp_#t~post9.offset_1| v_cstrncmp_~s2.offset_6)) InVars {cstrncmp_~s2.base=v_cstrncmp_~s2.base_8, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_6} OutVars{cstrncmp_~s2.base=v_cstrncmp_~s2.base_8, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_6, cstrncmp_#t~post9.base=|v_cstrncmp_#t~post9.base_1|, cstrncmp_#t~post9.offset=|v_cstrncmp_#t~post9.offset_1|} AuxVars[] AssignedVars[cstrncmp_#t~post9.base, cstrncmp_#t~post9.offset] [2018-04-12 01:00:57,828 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,829 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,829 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,829 DEBUG L331 ransitionTransformer]: Formula: (and (= v_cstrncmp_~s2.offset_7 (+ |v_cstrncmp_#t~post9.offset_2| 1)) (= v_cstrncmp_~s2.base_9 |v_cstrncmp_#t~post9.base_2|)) InVars {cstrncmp_#t~post9.base=|v_cstrncmp_#t~post9.base_2|, cstrncmp_#t~post9.offset=|v_cstrncmp_#t~post9.offset_2|} OutVars{cstrncmp_~s2.base=v_cstrncmp_~s2.base_9, cstrncmp_~s2.offset=v_cstrncmp_~s2.offset_7, cstrncmp_#t~post9.base=|v_cstrncmp_#t~post9.base_2|, cstrncmp_#t~post9.offset=|v_cstrncmp_#t~post9.offset_2|} AuxVars[] AssignedVars[cstrncmp_~s2.base, cstrncmp_~s2.offset] [2018-04-12 01:00:57,829 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,829 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,829 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,830 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,830 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,830 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,830 DEBUG L356 ransitionTransformer]: {cstrncmp_#t~post9.base=|v_cstrncmp_#t~post9.base_3|, cstrncmp_#t~post9.offset=|v_cstrncmp_#t~post9.offset_3|} [2018-04-12 01:00:57,830 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,830 DEBUG L358 ransitionTransformer]: {} [2018-04-12 01:00:57,830 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,830 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,831 DEBUG L331 ransitionTransformer]: Formula: true InVars {} OutVars{} AuxVars[] AssignedVars[] [2018-04-12 01:00:57,831 DEBUG L334 ransitionTransformer]: transformula unchanged [2018-04-12 01:00:57,831 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,831 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,831 DEBUG L331 ransitionTransformer]: Formula: (= |v_main_#t~ret18_5| |v_cstrncmp_#resOutParam_1|) InVars {cstrncmp_#res=|v_cstrncmp_#resOutParam_1|} OutVars{main_#t~ret18=|v_main_#t~ret18_5|, cstrncmp_#res=|v_cstrncmp_#resOutParam_1|} AuxVars[] AssignedVars[main_#t~ret18] [2018-04-12 01:00:57,831 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,832 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,832 DEBUG L356 ransitionTransformer]: {main_#t~ret18=|v_main_#t~ret18_5|} [2018-04-12 01:00:57,832 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,832 DEBUG L358 ransitionTransformer]: {main_#t~ret18=|v_main_#t~ret18_5|, cstrncmp_#res=|v_cstrncmp_#resOutParam_1|} [2018-04-12 01:00:57,832 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,832 DEBUG L330 ransitionTransformer]: transformed transition [2018-04-12 01:00:57,832 DEBUG L331 ransitionTransformer]: Formula: (= |v_ULTIMATE.start_#t~ret19_2| |v_main_#resOutParam_1|) InVars {main_#res=|v_main_#resOutParam_1|} OutVars{ULTIMATE.start_#t~ret19=|v_ULTIMATE.start_#t~ret19_2|, main_#res=|v_main_#resOutParam_1|} AuxVars[] AssignedVars[ULTIMATE.start_#t~ret19] [2018-04-12 01:00:57,833 DEBUG L354 ransitionTransformer]: outvars have changed [2018-04-12 01:00:57,833 DEBUG L355 ransitionTransformer]: old outvars: [2018-04-12 01:00:57,833 DEBUG L356 ransitionTransformer]: {ULTIMATE.start_#t~ret19=|v_ULTIMATE.start_#t~ret19_2|} [2018-04-12 01:00:57,833 DEBUG L357 ransitionTransformer]: new outvars: [2018-04-12 01:00:57,833 DEBUG L358 ransitionTransformer]: {ULTIMATE.start_#t~ret19=|v_ULTIMATE.start_#t~ret19_2|, main_#res=|v_main_#resOutParam_1|} [2018-04-12 01:00:57,833 DEBUG L360 ransitionTransformer]: [2018-04-12 01:00:57,834 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 112 non ball SCCs. Number of states in SCCs 112. [2018-04-12 01:00:57,852 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 12.04 01:00:57 BasicIcfg [2018-04-12 01:00:57,852 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2018-04-12 01:00:57,853 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-12 01:00:57,853 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-12 01:00:57,856 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-12 01:00:57,856 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 12.04 12:59:09" (1/4) ... [2018-04-12 01:00:57,857 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1bea9143 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 01:00:57, skipping insertion in model container [2018-04-12 01:00:57,857 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 12.04 12:59:10" (2/4) ... [2018-04-12 01:00:57,857 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1bea9143 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 12.04 01:00:57, skipping insertion in model container [2018-04-12 01:00:57,857 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 12.04 12:59:10" (3/4) ... [2018-04-12 01:00:57,858 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1bea9143 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 12.04 01:00:57, skipping insertion in model container [2018-04-12 01:00:57,858 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 12.04 01:00:57" (4/4) ... [2018-04-12 01:00:57,859 INFO L107 eAbstractionObserver]: Analyzing ICFG memPartitionedIcfg [2018-04-12 01:00:57,868 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-12 01:00:57,877 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 15 error locations. [2018-04-12 01:00:57,918 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-12 01:00:57,919 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-12 01:00:57,919 INFO L370 AbstractCegarLoop]: Hoare is true [2018-04-12 01:00:57,919 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-12 01:00:57,919 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-12 01:00:57,919 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-12 01:00:57,919 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-12 01:00:57,919 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-12 01:00:57,919 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-12 01:00:57,920 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-12 01:00:57,933 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states. [2018-04-12 01:00:57,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-04-12 01:00:57,939 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 01:00:57,940 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 01:00:57,940 INFO L408 AbstractCegarLoop]: === Iteration 1 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation]=== [2018-04-12 01:00:57,943 INFO L82 PathProgramCache]: Analyzing trace with hash 1340785366, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 01:00:57,955 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 01:00:57,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 01:00:57,994 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 01:00:58,031 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 01:00:58,032 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 01:00:58,037 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 01:00:58,037 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-12 01:00:58,058 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-12 01:00:58,059 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 01:00:58,063 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-12 01:00:58,063 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:11 [2018-04-12 01:00:58,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:00:58,070 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 01:00:58,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:00:58,124 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 01:00:58,124 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [] total 3 [2018-04-12 01:00:58,126 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 01:00:58,133 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 01:00:58,133 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 01:00:58,135 INFO L87 Difference]: Start difference. First operand 104 states. Second operand 4 states. [2018-04-12 01:00:58,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 01:00:58,221 INFO L93 Difference]: Finished difference Result 134 states and 142 transitions. [2018-04-12 01:00:58,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 01:00:58,223 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2018-04-12 01:00:58,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 01:00:58,232 INFO L225 Difference]: With dead ends: 134 [2018-04-12 01:00:58,232 INFO L226 Difference]: Without dead ends: 100 [2018-04-12 01:00:58,236 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 33 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 01:00:58,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states. [2018-04-12 01:00:58,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 100. [2018-04-12 01:00:58,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 100 states. [2018-04-12 01:00:58,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 107 transitions. [2018-04-12 01:00:58,270 INFO L78 Accepts]: Start accepts. Automaton has 100 states and 107 transitions. Word has length 19 [2018-04-12 01:00:58,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 01:00:58,270 INFO L459 AbstractCegarLoop]: Abstraction has 100 states and 107 transitions. [2018-04-12 01:00:58,270 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 01:00:58,270 INFO L276 IsEmpty]: Start isEmpty. Operand 100 states and 107 transitions. [2018-04-12 01:00:58,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-04-12 01:00:58,271 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 01:00:58,271 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 01:00:58,271 INFO L408 AbstractCegarLoop]: === Iteration 2 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation]=== [2018-04-12 01:00:58,271 INFO L82 PathProgramCache]: Analyzing trace with hash 1340785367, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 01:00:58,280 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 01:00:58,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 01:00:58,295 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 01:00:58,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 01:00:58,308 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 01:00:58,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 01:00:58,319 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 01:00:58,327 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 01:00:58,327 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:19, output treesize:17 [2018-04-12 01:00:58,376 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 01:00:58,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 01:00:58,378 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 01:00:58,392 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 01:00:58,393 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 01:00:58,393 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-12 01:00:58,393 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 01:00:58,401 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 01:00:58,402 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:28, output treesize:12 [2018-04-12 01:00:58,412 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:00:58,412 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 01:00:58,526 INFO L267 ElimStorePlain]: Start of recursive call 1: End of recursive call: and 1 xjuncts. [2018-04-12 01:00:58,527 INFO L202 ElimStorePlain]: Needed 1 recursive calls to eliminate 5 variables, input treesize:25, output treesize:3 [2018-04-12 01:00:58,534 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:00:58,564 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 01:00:58,564 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [] total 8 [2018-04-12 01:00:58,565 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-12 01:00:58,566 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-12 01:00:58,566 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2018-04-12 01:00:58,566 INFO L87 Difference]: Start difference. First operand 100 states and 107 transitions. Second operand 9 states. [2018-04-12 01:00:58,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 01:00:58,758 INFO L93 Difference]: Finished difference Result 100 states and 107 transitions. [2018-04-12 01:00:58,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 01:00:58,759 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 19 [2018-04-12 01:00:58,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 01:00:58,760 INFO L225 Difference]: With dead ends: 100 [2018-04-12 01:00:58,760 INFO L226 Difference]: Without dead ends: 99 [2018-04-12 01:00:58,761 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 30 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=58, Unknown=0, NotChecked=0, Total=90 [2018-04-12 01:00:58,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-04-12 01:00:58,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2018-04-12 01:00:58,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2018-04-12 01:00:58,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 106 transitions. [2018-04-12 01:00:58,770 INFO L78 Accepts]: Start accepts. Automaton has 99 states and 106 transitions. Word has length 19 [2018-04-12 01:00:58,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 01:00:58,770 INFO L459 AbstractCegarLoop]: Abstraction has 99 states and 106 transitions. [2018-04-12 01:00:58,770 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-12 01:00:58,770 INFO L276 IsEmpty]: Start isEmpty. Operand 99 states and 106 transitions. [2018-04-12 01:00:58,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-04-12 01:00:58,771 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 01:00:58,771 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 01:00:58,771 INFO L408 AbstractCegarLoop]: === Iteration 3 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation]=== [2018-04-12 01:00:58,771 INFO L82 PathProgramCache]: Analyzing trace with hash -1385326394, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 01:00:58,777 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 01:00:58,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 01:00:58,791 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 01:00:58,797 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 01:00:58,797 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 01:00:58,805 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 01:00:58,805 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-12 01:00:58,829 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:00:58,829 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 01:00:58,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:00:58,859 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 01:00:58,859 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [] total 3 [2018-04-12 01:00:58,860 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-12 01:00:58,860 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-12 01:00:58,860 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-12 01:00:58,860 INFO L87 Difference]: Start difference. First operand 99 states and 106 transitions. Second operand 4 states. [2018-04-12 01:00:58,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 01:00:58,895 INFO L93 Difference]: Finished difference Result 99 states and 106 transitions. [2018-04-12 01:00:58,895 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-04-12 01:00:58,895 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2018-04-12 01:00:58,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 01:00:58,896 INFO L225 Difference]: With dead ends: 99 [2018-04-12 01:00:58,896 INFO L226 Difference]: Without dead ends: 98 [2018-04-12 01:00:58,897 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 37 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-12 01:00:58,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-04-12 01:00:58,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 98. [2018-04-12 01:00:58,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-04-12 01:00:58,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 105 transitions. [2018-04-12 01:00:58,902 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 105 transitions. Word has length 20 [2018-04-12 01:00:58,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 01:00:58,902 INFO L459 AbstractCegarLoop]: Abstraction has 98 states and 105 transitions. [2018-04-12 01:00:58,902 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-12 01:00:58,902 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 105 transitions. [2018-04-12 01:00:58,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-04-12 01:00:58,903 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 01:00:58,903 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 01:00:58,903 INFO L408 AbstractCegarLoop]: === Iteration 4 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation]=== [2018-04-12 01:00:58,903 INFO L82 PathProgramCache]: Analyzing trace with hash -1385326393, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 01:00:58,909 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 01:00:58,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 01:00:58,921 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 01:00:58,927 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-12 01:00:58,927 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 01:00:58,930 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 01:00:58,931 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:13, output treesize:12 [2018-04-12 01:00:58,949 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:00:58,949 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 01:00:58,968 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:00:58,991 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 01:00:58,991 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [] total 6 [2018-04-12 01:00:58,991 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-12 01:00:58,991 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-12 01:00:58,991 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-04-12 01:00:58,991 INFO L87 Difference]: Start difference. First operand 98 states and 105 transitions. Second operand 7 states. [2018-04-12 01:00:59,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 01:00:59,095 INFO L93 Difference]: Finished difference Result 98 states and 105 transitions. [2018-04-12 01:00:59,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 01:00:59,095 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 20 [2018-04-12 01:00:59,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 01:00:59,096 INFO L225 Difference]: With dead ends: 98 [2018-04-12 01:00:59,096 INFO L226 Difference]: Without dead ends: 97 [2018-04-12 01:00:59,096 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-04-12 01:00:59,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-04-12 01:00:59,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 97. [2018-04-12 01:00:59,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-04-12 01:00:59,102 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 104 transitions. [2018-04-12 01:00:59,102 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 104 transitions. Word has length 20 [2018-04-12 01:00:59,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 01:00:59,102 INFO L459 AbstractCegarLoop]: Abstraction has 97 states and 104 transitions. [2018-04-12 01:00:59,102 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-12 01:00:59,102 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 104 transitions. [2018-04-12 01:00:59,103 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-04-12 01:00:59,103 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 01:00:59,103 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 01:00:59,103 INFO L408 AbstractCegarLoop]: === Iteration 5 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation]=== [2018-04-12 01:00:59,103 INFO L82 PathProgramCache]: Analyzing trace with hash 926570169, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 01:00:59,111 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 01:00:59,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 01:00:59,133 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 01:00:59,159 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:00:59,159 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 01:00:59,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:00:59,197 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 01:00:59,197 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [] total 4 [2018-04-12 01:00:59,197 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 01:00:59,198 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 01:00:59,198 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 01:00:59,198 INFO L87 Difference]: Start difference. First operand 97 states and 104 transitions. Second operand 5 states. [2018-04-12 01:00:59,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 01:00:59,263 INFO L93 Difference]: Finished difference Result 132 states and 143 transitions. [2018-04-12 01:00:59,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 01:00:59,263 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2018-04-12 01:00:59,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 01:00:59,266 INFO L225 Difference]: With dead ends: 132 [2018-04-12 01:00:59,266 INFO L226 Difference]: Without dead ends: 129 [2018-04-12 01:00:59,267 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 64 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 01:00:59,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-04-12 01:00:59,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 116. [2018-04-12 01:00:59,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-04-12 01:00:59,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 129 transitions. [2018-04-12 01:00:59,276 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 129 transitions. Word has length 34 [2018-04-12 01:00:59,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 01:00:59,276 INFO L459 AbstractCegarLoop]: Abstraction has 116 states and 129 transitions. [2018-04-12 01:00:59,276 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 01:00:59,277 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 129 transitions. [2018-04-12 01:00:59,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-04-12 01:00:59,277 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 01:00:59,278 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 01:00:59,278 INFO L408 AbstractCegarLoop]: === Iteration 6 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation]=== [2018-04-12 01:00:59,278 INFO L82 PathProgramCache]: Analyzing trace with hash 926570170, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 01:00:59,284 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 01:00:59,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 01:00:59,298 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 01:00:59,334 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:00:59,334 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 01:00:59,343 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2018-04-12 01:00:59,344 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 01:00:59,350 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 10 [2018-04-12 01:00:59,351 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 01:00:59,354 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 01:00:59,354 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:7 [2018-04-12 01:00:59,364 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:00:59,384 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 01:00:59,384 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7, 7] imperfect sequences [] total 7 [2018-04-12 01:00:59,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 01:00:59,384 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 01:00:59,384 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-04-12 01:00:59,385 INFO L87 Difference]: Start difference. First operand 116 states and 129 transitions. Second operand 8 states. [2018-04-12 01:00:59,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 01:00:59,468 INFO L93 Difference]: Finished difference Result 129 states and 140 transitions. [2018-04-12 01:00:59,468 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 01:00:59,468 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 34 [2018-04-12 01:00:59,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 01:00:59,469 INFO L225 Difference]: With dead ends: 129 [2018-04-12 01:00:59,469 INFO L226 Difference]: Without dead ends: 126 [2018-04-12 01:00:59,470 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 59 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2018-04-12 01:00:59,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-04-12 01:00:59,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 116. [2018-04-12 01:00:59,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-04-12 01:00:59,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 126 transitions. [2018-04-12 01:00:59,479 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 126 transitions. Word has length 34 [2018-04-12 01:00:59,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 01:00:59,480 INFO L459 AbstractCegarLoop]: Abstraction has 116 states and 126 transitions. [2018-04-12 01:00:59,480 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 01:00:59,480 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 126 transitions. [2018-04-12 01:00:59,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-12 01:00:59,481 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 01:00:59,481 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 01:00:59,481 INFO L408 AbstractCegarLoop]: === Iteration 7 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation]=== [2018-04-12 01:00:59,481 INFO L82 PathProgramCache]: Analyzing trace with hash -1341095568, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 01:00:59,488 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 01:00:59,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 01:00:59,506 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 01:00:59,517 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:00:59,517 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 01:00:59,522 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:00:59,541 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 01:00:59,541 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [] total 4 [2018-04-12 01:00:59,541 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-12 01:00:59,541 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-12 01:00:59,541 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-12 01:00:59,542 INFO L87 Difference]: Start difference. First operand 116 states and 126 transitions. Second operand 5 states. [2018-04-12 01:00:59,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 01:00:59,589 INFO L93 Difference]: Finished difference Result 138 states and 149 transitions. [2018-04-12 01:00:59,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-12 01:00:59,589 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 35 [2018-04-12 01:00:59,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 01:00:59,590 INFO L225 Difference]: With dead ends: 138 [2018-04-12 01:00:59,590 INFO L226 Difference]: Without dead ends: 136 [2018-04-12 01:00:59,591 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 66 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-12 01:00:59,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-04-12 01:00:59,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 120. [2018-04-12 01:00:59,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-04-12 01:00:59,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 132 transitions. [2018-04-12 01:00:59,595 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 132 transitions. Word has length 35 [2018-04-12 01:00:59,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 01:00:59,596 INFO L459 AbstractCegarLoop]: Abstraction has 120 states and 132 transitions. [2018-04-12 01:00:59,596 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-12 01:00:59,596 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 132 transitions. [2018-04-12 01:00:59,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-04-12 01:00:59,597 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 01:00:59,597 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 01:00:59,597 INFO L408 AbstractCegarLoop]: === Iteration 8 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation]=== [2018-04-12 01:00:59,597 INFO L82 PathProgramCache]: Analyzing trace with hash -1341095567, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 01:00:59,605 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 01:00:59,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 01:00:59,625 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 01:00:59,679 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:00:59,679 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 01:00:59,687 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 10 [2018-04-12 01:00:59,687 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-12 01:00:59,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2018-04-12 01:00:59,696 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 01:00:59,699 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-12 01:00:59,699 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:29, output treesize:7 [2018-04-12 01:00:59,710 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:00:59,730 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 01:00:59,730 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7, 7] imperfect sequences [] total 7 [2018-04-12 01:00:59,731 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-12 01:00:59,731 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-12 01:00:59,731 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-04-12 01:00:59,731 INFO L87 Difference]: Start difference. First operand 120 states and 132 transitions. Second operand 8 states. [2018-04-12 01:00:59,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 01:00:59,845 INFO L93 Difference]: Finished difference Result 136 states and 147 transitions. [2018-04-12 01:00:59,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-12 01:00:59,845 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 35 [2018-04-12 01:00:59,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 01:00:59,846 INFO L225 Difference]: With dead ends: 136 [2018-04-12 01:00:59,846 INFO L226 Difference]: Without dead ends: 134 [2018-04-12 01:00:59,847 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 61 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2018-04-12 01:00:59,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-04-12 01:00:59,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 120. [2018-04-12 01:00:59,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-04-12 01:00:59,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 130 transitions. [2018-04-12 01:00:59,854 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 130 transitions. Word has length 35 [2018-04-12 01:00:59,854 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 01:00:59,854 INFO L459 AbstractCegarLoop]: Abstraction has 120 states and 130 transitions. [2018-04-12 01:00:59,854 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-12 01:00:59,855 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 130 transitions. [2018-04-12 01:00:59,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-04-12 01:00:59,855 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 01:00:59,855 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 01:00:59,856 INFO L408 AbstractCegarLoop]: === Iteration 9 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation]=== [2018-04-12 01:00:59,856 INFO L82 PathProgramCache]: Analyzing trace with hash -1288732786, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 01:00:59,865 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 01:00:59,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 01:00:59,883 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 01:00:59,918 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 01:00:59,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-04-12 01:00:59,921 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 01:00:59,922 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-12 01:00:59,922 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 01:00:59,927 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 01:00:59,931 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 01:00:59,931 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:23, output treesize:15 [2018-04-12 01:00:59,962 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_#t~malloc15.base| Int)) (let ((.cse0 (store |c_old(#valid)| |main_#t~malloc15.base| 1))) (and (= 0 (select .cse0 |c_main_#t~malloc16.base|)) (= (select |c_old(#valid)| |main_#t~malloc15.base|) 0) (= |c_#valid| (store (store .cse0 |c_main_#t~malloc16.base| 1) |main_#t~malloc15.base| 0))))) is different from true [2018-04-12 01:00:59,969 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_#t~malloc16.base| Int) (|main_#t~malloc15.base| Int)) (let ((.cse0 (store |c_old(#valid)| |main_#t~malloc15.base| 1))) (and (= 0 (select .cse0 |main_#t~malloc16.base|)) (= (select |c_old(#valid)| |main_#t~malloc15.base|) 0) (= |c_#valid| (store (store (store .cse0 |main_#t~malloc16.base| 1) |main_#t~malloc15.base| 0) |main_#t~malloc16.base| 0))))) is different from true [2018-04-12 01:00:59,980 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:00:59,980 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 01:01:00,004 WARN L1011 $PredicateComparison]: unable to prove that (forall ((|v_main_#t~malloc16.base_16| Int)) (or (not (= 0 (select |c_#valid| |v_main_#t~malloc16.base_16|))) (= (store (store (store |c_#valid| |v_main_#t~malloc16.base_16| 1) |c_main_#t~malloc15.base| 0) |v_main_#t~malloc16.base_16| 0) |c_old(#valid)|))) is different from false [2018-04-12 01:01:00,019 WARN L1011 $PredicateComparison]: unable to prove that (forall ((|v_main_#t~malloc16.base_16| Int) (|v_main_#t~malloc15.base_15| Int)) (let ((.cse0 (store |c_#valid| |v_main_#t~malloc15.base_15| 1))) (or (= |c_old(#valid)| (store (store (store .cse0 |v_main_#t~malloc16.base_16| 1) |v_main_#t~malloc15.base_15| 0) |v_main_#t~malloc16.base_16| 0)) (not (= 0 (select |c_#valid| |v_main_#t~malloc15.base_15|))) (not (= (select .cse0 |v_main_#t~malloc16.base_16|) 0))))) is different from false [2018-04-12 01:01:00,054 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:01:00,074 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 01:01:00,074 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7, 6] imperfect sequences [] total 11 [2018-04-12 01:01:00,074 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-12 01:01:00,074 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-12 01:01:00,074 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=45, Unknown=4, NotChecked=60, Total=132 [2018-04-12 01:01:00,074 INFO L87 Difference]: Start difference. First operand 120 states and 130 transitions. Second operand 12 states. [2018-04-12 01:01:00,085 WARN L1011 $PredicateComparison]: unable to prove that (and (forall ((|v_main_#t~malloc16.base_16| Int) (|v_main_#t~malloc15.base_15| Int)) (let ((.cse0 (store |c_#valid| |v_main_#t~malloc15.base_15| 1))) (or (= |c_old(#valid)| (store (store (store .cse0 |v_main_#t~malloc16.base_16| 1) |v_main_#t~malloc15.base_15| 0) |v_main_#t~malloc16.base_16| 0)) (not (= 0 (select |c_#valid| |v_main_#t~malloc15.base_15|))) (not (= (select .cse0 |v_main_#t~malloc16.base_16|) 0))))) (= |c_#valid| |c_old(#valid)|)) is different from false [2018-04-12 01:01:00,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 01:01:00,540 INFO L93 Difference]: Finished difference Result 225 states and 244 transitions. [2018-04-12 01:01:00,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-12 01:01:00,540 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 40 [2018-04-12 01:01:00,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 01:01:00,542 INFO L225 Difference]: With dead ends: 225 [2018-04-12 01:01:00,542 INFO L226 Difference]: Without dead ends: 194 [2018-04-12 01:01:00,543 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 69 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=86, Unknown=6, NotChecked=110, Total=240 [2018-04-12 01:01:00,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-04-12 01:01:00,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 184. [2018-04-12 01:01:00,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-04-12 01:01:00,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 209 transitions. [2018-04-12 01:01:00,550 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 209 transitions. Word has length 40 [2018-04-12 01:01:00,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 01:01:00,550 INFO L459 AbstractCegarLoop]: Abstraction has 184 states and 209 transitions. [2018-04-12 01:01:00,551 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-12 01:01:00,551 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 209 transitions. [2018-04-12 01:01:00,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-04-12 01:01:00,552 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 01:01:00,552 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 01:01:00,552 INFO L408 AbstractCegarLoop]: === Iteration 10 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation]=== [2018-04-12 01:01:00,552 INFO L82 PathProgramCache]: Analyzing trace with hash -1087327552, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 01:01:00,561 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 01:01:00,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 01:01:00,579 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 01:01:00,638 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 01:01:00,639 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-04-12 01:01:00,642 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 15 [2018-04-12 01:01:00,643 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 01:01:00,647 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 01:01:00,651 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 01:01:00,651 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:23, output treesize:15 [2018-04-12 01:01:00,713 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_#t~malloc15.base| Int)) (let ((.cse0 (store |c_old(#valid)| |main_#t~malloc15.base| 1))) (and (= 0 (select .cse0 |c_main_#t~malloc16.base|)) (= (select |c_old(#valid)| |main_#t~malloc15.base|) 0) (= |c_#valid| (store (store .cse0 |c_main_#t~malloc16.base| 1) |main_#t~malloc15.base| 0))))) is different from true [2018-04-12 01:01:00,717 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_#t~malloc16.base| Int) (|main_#t~malloc15.base| Int)) (let ((.cse0 (store |c_old(#valid)| |main_#t~malloc15.base| 1))) (and (= 0 (select .cse0 |main_#t~malloc16.base|)) (= (select |c_old(#valid)| |main_#t~malloc15.base|) 0) (= |c_#valid| (store (store (store .cse0 |main_#t~malloc16.base| 1) |main_#t~malloc15.base| 0) |main_#t~malloc16.base| 0))))) is different from true [2018-04-12 01:01:00,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:01:00,722 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 01:01:00,765 WARN L1011 $PredicateComparison]: unable to prove that (forall ((|v_main_#t~malloc16.base_17| Int)) (or (not (= 0 (select |c_#valid| |v_main_#t~malloc16.base_17|))) (= |c_old(#valid)| (store (store (store |c_#valid| |v_main_#t~malloc16.base_17| 1) |c_main_#t~malloc15.base| 0) |v_main_#t~malloc16.base_17| 0)))) is different from false [2018-04-12 01:01:00,769 WARN L1011 $PredicateComparison]: unable to prove that (forall ((|v_main_#t~malloc16.base_17| Int) (|v_main_#t~malloc15.base_16| Int)) (let ((.cse0 (store |c_#valid| |v_main_#t~malloc15.base_16| 1))) (or (not (= (select |c_#valid| |v_main_#t~malloc15.base_16|) 0)) (not (= (select .cse0 |v_main_#t~malloc16.base_17|) 0)) (= |c_old(#valid)| (store (store (store .cse0 |v_main_#t~malloc16.base_17| 1) |v_main_#t~malloc15.base_16| 0) |v_main_#t~malloc16.base_17| 0))))) is different from false [2018-04-12 01:01:00,784 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:01:00,804 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 01:01:00,804 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7, 6] imperfect sequences [] total 11 [2018-04-12 01:01:00,804 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-12 01:01:00,804 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-12 01:01:00,804 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=45, Unknown=4, NotChecked=60, Total=132 [2018-04-12 01:01:00,805 INFO L87 Difference]: Start difference. First operand 184 states and 209 transitions. Second operand 12 states. [2018-04-12 01:01:00,815 WARN L1011 $PredicateComparison]: unable to prove that (and (= |c_#valid| |c_old(#valid)|) (forall ((|v_main_#t~malloc16.base_17| Int) (|v_main_#t~malloc15.base_16| Int)) (let ((.cse0 (store |c_#valid| |v_main_#t~malloc15.base_16| 1))) (or (not (= (select |c_#valid| |v_main_#t~malloc15.base_16|) 0)) (not (= (select .cse0 |v_main_#t~malloc16.base_17|) 0)) (= |c_old(#valid)| (store (store (store .cse0 |v_main_#t~malloc16.base_17| 1) |v_main_#t~malloc15.base_16| 0) |v_main_#t~malloc16.base_17| 0)))))) is different from false [2018-04-12 01:01:01,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 01:01:01,199 INFO L93 Difference]: Finished difference Result 288 states and 321 transitions. [2018-04-12 01:01:01,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-12 01:01:01,200 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 41 [2018-04-12 01:01:01,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 01:01:01,201 INFO L225 Difference]: With dead ends: 288 [2018-04-12 01:01:01,201 INFO L226 Difference]: Without dead ends: 257 [2018-04-12 01:01:01,201 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 71 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=38, Invalid=86, Unknown=6, NotChecked=110, Total=240 [2018-04-12 01:01:01,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2018-04-12 01:01:01,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 183. [2018-04-12 01:01:01,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-04-12 01:01:01,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 207 transitions. [2018-04-12 01:01:01,209 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 207 transitions. Word has length 41 [2018-04-12 01:01:01,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 01:01:01,209 INFO L459 AbstractCegarLoop]: Abstraction has 183 states and 207 transitions. [2018-04-12 01:01:01,209 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-12 01:01:01,209 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 207 transitions. [2018-04-12 01:01:01,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-04-12 01:01:01,211 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 01:01:01,211 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 01:01:01,211 INFO L408 AbstractCegarLoop]: === Iteration 11 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation]=== [2018-04-12 01:01:01,211 INFO L82 PathProgramCache]: Analyzing trace with hash 312651617, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 01:01:01,221 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 01:01:01,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 01:01:01,241 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 01:01:01,265 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 01:01:01,265 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-04-12 01:01:01,268 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 15 [2018-04-12 01:01:01,269 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 01:01:01,273 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 01:01:01,277 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 01:01:01,277 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:23, output treesize:15 [2018-04-12 01:01:01,301 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_#t~malloc15.base| Int)) (let ((.cse0 (store |c_old(#valid)| |main_#t~malloc15.base| 1))) (and (= 0 (select .cse0 |c_main_#t~malloc16.base|)) (= (select |c_old(#valid)| |main_#t~malloc15.base|) 0) (= |c_#valid| (store (store .cse0 |c_main_#t~malloc16.base| 1) |main_#t~malloc15.base| 0))))) is different from true [2018-04-12 01:01:01,306 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_#t~malloc16.base| Int) (|main_#t~malloc15.base| Int)) (let ((.cse0 (store |c_old(#valid)| |main_#t~malloc15.base| 1))) (and (= 0 (select .cse0 |main_#t~malloc16.base|)) (= (select |c_old(#valid)| |main_#t~malloc15.base|) 0) (= |c_#valid| (store (store (store .cse0 |main_#t~malloc16.base| 1) |main_#t~malloc15.base| 0) |main_#t~malloc16.base| 0))))) is different from true [2018-04-12 01:01:01,311 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:01:01,311 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 01:01:01,372 WARN L1011 $PredicateComparison]: unable to prove that (forall ((|v_main_#t~malloc16.base_18| Int)) (or (= |c_old(#valid)| (store (store (store |c_#valid| |v_main_#t~malloc16.base_18| 1) |c_main_#t~malloc15.base| 0) |v_main_#t~malloc16.base_18| 0)) (not (= 0 (select |c_#valid| |v_main_#t~malloc16.base_18|))))) is different from false [2018-04-12 01:01:01,376 WARN L1011 $PredicateComparison]: unable to prove that (forall ((|v_main_#t~malloc16.base_18| Int) (|v_main_#t~malloc15.base_17| Int)) (let ((.cse0 (store |c_#valid| |v_main_#t~malloc15.base_17| 1))) (or (not (= 0 (select |c_#valid| |v_main_#t~malloc15.base_17|))) (= (store (store (store .cse0 |v_main_#t~malloc16.base_18| 1) |v_main_#t~malloc15.base_17| 0) |v_main_#t~malloc16.base_18| 0) |c_old(#valid)|) (not (= (select .cse0 |v_main_#t~malloc16.base_18|) 0))))) is different from false [2018-04-12 01:01:01,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:01:01,419 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 01:01:01,420 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7, 6] imperfect sequences [] total 11 [2018-04-12 01:01:01,420 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-12 01:01:01,420 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-12 01:01:01,420 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=45, Unknown=4, NotChecked=60, Total=132 [2018-04-12 01:01:01,420 INFO L87 Difference]: Start difference. First operand 183 states and 207 transitions. Second operand 12 states. [2018-04-12 01:01:01,430 WARN L1011 $PredicateComparison]: unable to prove that (and (= |c_#valid| |c_old(#valid)|) (forall ((|v_main_#t~malloc16.base_18| Int) (|v_main_#t~malloc15.base_17| Int)) (let ((.cse0 (store |c_#valid| |v_main_#t~malloc15.base_17| 1))) (or (not (= 0 (select |c_#valid| |v_main_#t~malloc15.base_17|))) (= (store (store (store .cse0 |v_main_#t~malloc16.base_18| 1) |v_main_#t~malloc15.base_17| 0) |v_main_#t~malloc16.base_18| 0) |c_old(#valid)|) (not (= (select .cse0 |v_main_#t~malloc16.base_18|) 0)))))) is different from false [2018-04-12 01:01:01,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 01:01:01,859 INFO L93 Difference]: Finished difference Result 289 states and 322 transitions. [2018-04-12 01:01:01,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-12 01:01:01,859 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 41 [2018-04-12 01:01:01,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 01:01:01,860 INFO L225 Difference]: With dead ends: 289 [2018-04-12 01:01:01,860 INFO L226 Difference]: Without dead ends: 258 [2018-04-12 01:01:01,861 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 71 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=86, Unknown=6, NotChecked=110, Total=240 [2018-04-12 01:01:01,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 258 states. [2018-04-12 01:01:01,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 258 to 185. [2018-04-12 01:01:01,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-04-12 01:01:01,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 210 transitions. [2018-04-12 01:01:01,869 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 210 transitions. Word has length 41 [2018-04-12 01:01:01,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 01:01:01,869 INFO L459 AbstractCegarLoop]: Abstraction has 185 states and 210 transitions. [2018-04-12 01:01:01,870 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-12 01:01:01,870 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 210 transitions. [2018-04-12 01:01:01,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-04-12 01:01:01,870 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 01:01:01,871 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 01:01:01,871 INFO L408 AbstractCegarLoop]: === Iteration 12 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation]=== [2018-04-12 01:01:01,871 INFO L82 PathProgramCache]: Analyzing trace with hash -2033720721, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 01:01:01,879 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 01:01:01,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 01:01:01,894 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 01:01:01,935 INFO L700 Elim1Store]: detected not equals via solver [2018-04-12 01:01:01,936 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-04-12 01:01:01,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 15 [2018-04-12 01:01:01,938 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-12 01:01:01,941 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-12 01:01:01,944 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-12 01:01:01,944 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:23, output treesize:15 [2018-04-12 01:01:01,964 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_#t~malloc15.base| Int)) (let ((.cse0 (store |c_old(#valid)| |main_#t~malloc15.base| 1))) (and (= 0 (select .cse0 |c_main_#t~malloc16.base|)) (= (select |c_old(#valid)| |main_#t~malloc15.base|) 0) (= |c_#valid| (store (store .cse0 |c_main_#t~malloc16.base| 1) |main_#t~malloc15.base| 0))))) is different from true [2018-04-12 01:01:01,968 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|main_#t~malloc16.base| Int) (|main_#t~malloc15.base| Int)) (let ((.cse0 (store |c_old(#valid)| |main_#t~malloc15.base| 1))) (and (= 0 (select .cse0 |main_#t~malloc16.base|)) (= (select |c_old(#valid)| |main_#t~malloc15.base|) 0) (= |c_#valid| (store (store (store .cse0 |main_#t~malloc16.base| 1) |main_#t~malloc15.base| 0) |main_#t~malloc16.base| 0))))) is different from true [2018-04-12 01:01:01,972 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:01:01,973 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 01:01:01,989 WARN L1011 $PredicateComparison]: unable to prove that (forall ((|v_main_#t~malloc16.base_19| Int)) (or (= (store (store (store |c_#valid| |v_main_#t~malloc16.base_19| 1) |c_main_#t~malloc15.base| 0) |v_main_#t~malloc16.base_19| 0) |c_old(#valid)|) (not (= 0 (select |c_#valid| |v_main_#t~malloc16.base_19|))))) is different from false [2018-04-12 01:01:01,992 WARN L1011 $PredicateComparison]: unable to prove that (forall ((|v_main_#t~malloc16.base_19| Int) (|v_main_#t~malloc15.base_18| Int)) (let ((.cse0 (store |c_#valid| |v_main_#t~malloc15.base_18| 1))) (or (not (= (select .cse0 |v_main_#t~malloc16.base_19|) 0)) (= |c_old(#valid)| (store (store (store .cse0 |v_main_#t~malloc16.base_19| 1) |v_main_#t~malloc15.base_18| 0) |v_main_#t~malloc16.base_19| 0)) (not (= 0 (select |c_#valid| |v_main_#t~malloc15.base_18|)))))) is different from false [2018-04-12 01:01:02,005 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:01:02,024 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 01:01:02,024 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7, 6] imperfect sequences [] total 11 [2018-04-12 01:01:02,024 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-12 01:01:02,024 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-12 01:01:02,024 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=45, Unknown=4, NotChecked=60, Total=132 [2018-04-12 01:01:02,025 INFO L87 Difference]: Start difference. First operand 185 states and 210 transitions. Second operand 12 states. [2018-04-12 01:01:02,034 WARN L1011 $PredicateComparison]: unable to prove that (and (= |c_#valid| |c_old(#valid)|) (forall ((|v_main_#t~malloc16.base_19| Int) (|v_main_#t~malloc15.base_18| Int)) (let ((.cse0 (store |c_#valid| |v_main_#t~malloc15.base_18| 1))) (or (not (= (select .cse0 |v_main_#t~malloc16.base_19|) 0)) (= |c_old(#valid)| (store (store (store .cse0 |v_main_#t~malloc16.base_19| 1) |v_main_#t~malloc15.base_18| 0) |v_main_#t~malloc16.base_19| 0)) (not (= 0 (select |c_#valid| |v_main_#t~malloc15.base_18|))))))) is different from false [2018-04-12 01:01:02,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 01:01:02,433 INFO L93 Difference]: Finished difference Result 195 states and 210 transitions. [2018-04-12 01:01:02,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-12 01:01:02,461 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 42 [2018-04-12 01:01:02,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 01:01:02,462 INFO L225 Difference]: With dead ends: 195 [2018-04-12 01:01:02,462 INFO L226 Difference]: Without dead ends: 164 [2018-04-12 01:01:02,463 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 73 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 5 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=38, Invalid=86, Unknown=6, NotChecked=110, Total=240 [2018-04-12 01:01:02,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-04-12 01:01:02,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 89. [2018-04-12 01:01:02,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-04-12 01:01:02,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 95 transitions. [2018-04-12 01:01:02,470 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 95 transitions. Word has length 42 [2018-04-12 01:01:02,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 01:01:02,471 INFO L459 AbstractCegarLoop]: Abstraction has 89 states and 95 transitions. [2018-04-12 01:01:02,471 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-12 01:01:02,471 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 95 transitions. [2018-04-12 01:01:02,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-04-12 01:01:02,471 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 01:01:02,471 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 01:01:02,472 INFO L408 AbstractCegarLoop]: === Iteration 13 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation]=== [2018-04-12 01:01:02,472 INFO L82 PathProgramCache]: Analyzing trace with hash 2026632715, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 01:01:02,479 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 01:01:02,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 01:01:02,501 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 01:01:02,537 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:01:02,537 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 01:01:02,546 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:01:02,565 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 01:01:02,566 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [] total 3 [2018-04-12 01:01:02,566 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-12 01:01:02,566 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-12 01:01:02,566 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 01:01:02,566 INFO L87 Difference]: Start difference. First operand 89 states and 95 transitions. Second operand 3 states. [2018-04-12 01:01:02,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 01:01:02,579 INFO L93 Difference]: Finished difference Result 133 states and 141 transitions. [2018-04-12 01:01:02,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-12 01:01:02,579 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2018-04-12 01:01:02,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 01:01:02,580 INFO L225 Difference]: With dead ends: 133 [2018-04-12 01:01:02,580 INFO L226 Difference]: Without dead ends: 80 [2018-04-12 01:01:02,580 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 108 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 01:01:02,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-04-12 01:01:02,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 80. [2018-04-12 01:01:02,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-04-12 01:01:02,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 83 transitions. [2018-04-12 01:01:02,586 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 83 transitions. Word has length 55 [2018-04-12 01:01:02,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 01:01:02,587 INFO L459 AbstractCegarLoop]: Abstraction has 80 states and 83 transitions. [2018-04-12 01:01:02,587 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-12 01:01:02,587 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 83 transitions. [2018-04-12 01:01:02,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-04-12 01:01:02,588 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 01:01:02,588 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 01:01:02,588 INFO L408 AbstractCegarLoop]: === Iteration 14 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation]=== [2018-04-12 01:01:02,588 INFO L82 PathProgramCache]: Analyzing trace with hash -2052521697, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 01:01:02,594 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 01:01:02,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 01:01:02,610 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 01:01:02,615 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:01:02,615 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 01:01:02,620 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-12 01:01:02,639 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 01:01:02,640 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3, 3] imperfect sequences [] total 3 [2018-04-12 01:01:02,640 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-12 01:01:02,640 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-12 01:01:02,640 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 01:01:02,640 INFO L87 Difference]: Start difference. First operand 80 states and 83 transitions. Second operand 3 states. [2018-04-12 01:01:02,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 01:01:02,647 INFO L93 Difference]: Finished difference Result 124 states and 128 transitions. [2018-04-12 01:01:02,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-12 01:01:02,647 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 58 [2018-04-12 01:01:02,648 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 01:01:02,648 INFO L225 Difference]: With dead ends: 124 [2018-04-12 01:01:02,648 INFO L226 Difference]: Without dead ends: 80 [2018-04-12 01:01:02,648 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 114 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-12 01:01:02,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-04-12 01:01:02,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 80. [2018-04-12 01:01:02,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-04-12 01:01:02,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 82 transitions. [2018-04-12 01:01:02,654 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 82 transitions. Word has length 58 [2018-04-12 01:01:02,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 01:01:02,654 INFO L459 AbstractCegarLoop]: Abstraction has 80 states and 82 transitions. [2018-04-12 01:01:02,654 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-12 01:01:02,654 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 82 transitions. [2018-04-12 01:01:02,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-12 01:01:02,655 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 01:01:02,655 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 01:01:02,655 INFO L408 AbstractCegarLoop]: === Iteration 15 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation]=== [2018-04-12 01:01:02,655 INFO L82 PathProgramCache]: Analyzing trace with hash -1337027335, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 01:01:02,660 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 01:01:02,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 01:01:02,678 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 01:01:02,694 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-04-12 01:01:02,694 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-04-12 01:01:02,700 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-04-12 01:01:02,720 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 0 imperfect interpolant sequences. [2018-04-12 01:01:02,720 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [] total 5 [2018-04-12 01:01:02,720 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-12 01:01:02,720 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-12 01:01:02,720 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-12 01:01:02,720 INFO L87 Difference]: Start difference. First operand 80 states and 82 transitions. Second operand 6 states. [2018-04-12 01:01:02,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-12 01:01:02,784 INFO L93 Difference]: Finished difference Result 94 states and 96 transitions. [2018-04-12 01:01:02,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-12 01:01:02,784 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2018-04-12 01:01:02,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-12 01:01:02,785 INFO L225 Difference]: With dead ends: 94 [2018-04-12 01:01:02,785 INFO L226 Difference]: Without dead ends: 92 [2018-04-12 01:01:02,785 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-04-12 01:01:02,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2018-04-12 01:01:02,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 78. [2018-04-12 01:01:02,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78 states. [2018-04-12 01:01:02,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78 states to 78 states and 80 transitions. [2018-04-12 01:01:02,793 INFO L78 Accepts]: Start accepts. Automaton has 78 states and 80 transitions. Word has length 60 [2018-04-12 01:01:02,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-12 01:01:02,793 INFO L459 AbstractCegarLoop]: Abstraction has 78 states and 80 transitions. [2018-04-12 01:01:02,793 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-12 01:01:02,793 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 80 transitions. [2018-04-12 01:01:02,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-04-12 01:01:02,794 INFO L347 BasicCegarLoop]: Found error trace [2018-04-12 01:01:02,794 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-12 01:01:02,794 INFO L408 AbstractCegarLoop]: === Iteration 16 === [mainErr3RequiresViolation, mainErr1RequiresViolation, mainErr2RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr0RequiresViolation, cstrncmpErr1RequiresViolation, cstrncmpErr6RequiresViolation, cstrncmpErr5RequiresViolation, cstrncmpErr0RequiresViolation, cstrncmpErr7RequiresViolation, cstrncmpErr4RequiresViolation, cstrncmpErr8RequiresViolation, cstrncmpErr9RequiresViolation, cstrncmpErr2RequiresViolation, cstrncmpErr3RequiresViolation]=== [2018-04-12 01:01:02,794 INFO L82 PathProgramCache]: Analyzing trace with hash -1337027334, now seen corresponding path program 1 times No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-04-12 01:01:02,800 INFO L68 tionRefinementEngine]: Using refinement strategy FixedRefinementStrategy [2018-04-12 01:01:02,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-12 01:01:02,822 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-12 01:01:02,838 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2018-04-12 01:01:02,840 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-12 01:01:02,842 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.AssertionError: var is still there: v_arrayElimArr_5 term size 6 at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:225) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:270) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:243) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:445) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeStrongestPostconditionSequence(IterativePredicateTransformer.java:198) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:283) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:237) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:185) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.FixedRefinementStrategy.getTraceCheck(FixedRefinementStrategy.java:131) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:231) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:205) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:69) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:408) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:417) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:363) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:304) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:150) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:118) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:119) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:324) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.runToolchainDefault(DefaultToolchainJob.java:221) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.BasicToolchainJob.run(BasicToolchainJob.java:134) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-04-12 01:01:02,845 INFO L168 Benchmark]: Toolchain (without parser) took 113092.62 ms. Allocated memory was 299.9 MB in the beginning and 1.4 GB in the end (delta: 1.1 GB). Free memory was 236.6 MB in the beginning and 1.1 GB in the end (delta: -872.4 MB). Peak memory consumption was 254.3 MB. Max. memory is 5.3 GB. [2018-04-12 01:01:02,846 INFO L168 Benchmark]: CDTParser took 0.25 ms. Allocated memory is still 299.9 MB. Free memory is still 261.1 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-12 01:01:02,846 INFO L168 Benchmark]: CACSL2BoogieTranslator took 342.85 ms. Allocated memory is still 299.9 MB. Free memory was 236.6 MB in the beginning and 212.7 MB in the end (delta: 23.9 MB). Peak memory consumption was 23.9 MB. Max. memory is 5.3 GB. [2018-04-12 01:01:02,846 INFO L168 Benchmark]: Boogie Preprocessor took 51.91 ms. Allocated memory is still 299.9 MB. Free memory was 212.7 MB in the beginning and 208.7 MB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 5.3 GB. [2018-04-12 01:01:02,846 INFO L168 Benchmark]: RCFGBuilder took 534.49 ms. Allocated memory was 299.9 MB in the beginning and 457.2 MB in the end (delta: 157.3 MB). Free memory was 208.7 MB in the beginning and 389.1 MB in the end (delta: -180.4 MB). Peak memory consumption was 20.1 MB. Max. memory is 5.3 GB. [2018-04-12 01:01:02,847 INFO L168 Benchmark]: IcfgTransformer took 107167.22 ms. Allocated memory was 457.2 MB in the beginning and 1.4 GB in the end (delta: 940.6 MB). Free memory was 389.1 MB in the beginning and 529.8 MB in the end (delta: -140.7 MB). Peak memory consumption was 799.9 MB. Max. memory is 5.3 GB. [2018-04-12 01:01:02,847 INFO L168 Benchmark]: TraceAbstraction took 4991.54 ms. Allocated memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 28.8 MB). Free memory was 529.8 MB in the beginning and 1.1 GB in the end (delta: -579.2 MB). There was no memory consumed. Max. memory is 5.3 GB. [2018-04-12 01:01:02,848 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25 ms. Allocated memory is still 299.9 MB. Free memory is still 261.1 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 342.85 ms. Allocated memory is still 299.9 MB. Free memory was 236.6 MB in the beginning and 212.7 MB in the end (delta: 23.9 MB). Peak memory consumption was 23.9 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 51.91 ms. Allocated memory is still 299.9 MB. Free memory was 212.7 MB in the beginning and 208.7 MB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 534.49 ms. Allocated memory was 299.9 MB in the beginning and 457.2 MB in the end (delta: 157.3 MB). Free memory was 208.7 MB in the beginning and 389.1 MB in the end (delta: -180.4 MB). Peak memory consumption was 20.1 MB. Max. memory is 5.3 GB. * IcfgTransformer took 107167.22 ms. Allocated memory was 457.2 MB in the beginning and 1.4 GB in the end (delta: 940.6 MB). Free memory was 389.1 MB in the beginning and 529.8 MB in the end (delta: -140.7 MB). Peak memory consumption was 799.9 MB. Max. memory is 5.3 GB. * TraceAbstraction took 4991.54 ms. Allocated memory was 1.4 GB in the beginning and 1.4 GB in the end (delta: 28.8 MB). Free memory was 529.8 MB in the beginning and 1.1 GB in the end (delta: -579.2 MB). There was no memory consumed. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 97 LocStat_MAX_WEQGRAPH_SIZE : 7 LocStat_MAX_SIZEOF_WEQEDGELABEL : 2 LocStat_NO_SUPPORTING_EQUALITIES : 1624 LocStat_NO_SUPPORTING_DISEQUALITIES : 437 LocStat_NO_DISJUNCTIONS : -194 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 119 TransStat_MAX_WEQGRAPH_SIZE : 4 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 126 TransStat_NO_SUPPORTING_DISEQUALITIES : 16 TransStat_NO_DISJUNCTIONS : 129 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 10901.24 RENAME_VARIABLES(MILLISECONDS) : 626.87 UNFREEZE(MILLISECONDS) : 0.00 CONJOIN(MILLISECONDS) : 11021.58 PROJECTAWAY(MILLISECONDS) : 61471.26 ADD_WEAK_EQUALITY(MILLISECONDS) : 7.39 DISJOIN(MILLISECONDS) : 1291.57 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 653.97 ADD_EQUALITY(MILLISECONDS) : 10.06 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.00 ADD_DISEQUALITY(MILLISECONDS) : 0.50 #CONJOIN_DISJUNCTIVE : 658 #RENAME_VARIABLES : 1386 #UNFREEZE : 0 #CONJOIN : 862 #PROJECTAWAY : 856 #ADD_WEAK_EQUALITY : 15 #DISJOIN : 290 #RENAME_VARIABLES_DISJUNCTIVE : 1329 #ADD_EQUALITY : 128 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 14 - StatisticsResult: WeqCcManagerStatistics FREEZE(MILLISECONDS) : 63349.96 ADDNODE(MILLISECONDS) : 0.00 MEET(MILLISECONDS) : 11008.10 FILTERREDUNDANT(MILLISECONDS) : 0.00 REPORTWEQ(MILLISECONDS) : 7.19 JOIN(MILLISECONDS) : 1275.88 RENAMEVARS(MILLISECONDS) : 613.82 FLATTENLABELS(MILLISECONDS) : 0.00 COPY(MILLISECONDS) : 0.00 ISSTRONGERTHAN(MILLISECONDS) : 29275.43 ISLABELSTRONGERTHAN(MILLISECONDS) : 5307.82 ISWEQGRAPHSTRONGERTHAN(MILLISECONDS) : 345.81 UNFREEZE(MILLISECONDS) : 292.76 REPORTCONTAINS(MILLISECONDS) : 0.35 PROJECTAWAY(MILLISECONDS) : 61223.76 MEETEDGELABELS(MILLISECONDS) : 1480.64 REPORTEQUALITY(MILLISECONDS) : 1163.48 ADDALLNODES(MILLISECONDS) : 724.91 REPORTDISEQUALITY(MILLISECONDS) : 5.35 WEQGRAPHJOIN(MILLISECONDS) : 1115.86 #FREEZE : 5919 #ADDNODE : 0 #MEET : 587 #FILTERREDUNDANT : 0 #REPORTWEQ : 15 #JOIN : 290 #RENAMEVARS : 1386 #FLATTENLABELS : 0 #COPY : 0 #ISSTRONGERTHAN : 1471 #ISLABELSTRONGERTHAN : 539260 #ISWEQGRAPHSTRONGERTHAN : 477 #UNFREEZE : 4039 #REPORTCONTAINS : 49 #PROJECTAWAY : 2066 #MEETEDGELABELS : 8212 #REPORTEQUALITY : 10172 #ADDALLNODES : 587 #REPORTDISEQUALITY : 2414 #WEQGRAPHJOIN : 290 - StatisticsResult: CcManagerStatistics ADDNODE(MILLISECONDS) : 0.00 MEET(MILLISECONDS) : 19337.79 REPORT_EQUALITY(MILLISECONDS) : 7386.85 FILTERREDUNDANT(MILLISECONDS) : 57540.41 ADD_ALL_ELEMENTS(MILLISECONDS) : 16090.80 JOIN(MILLISECONDS) : 108.95 ALIGN_ELEMENTS(MILLISECONDS) : 32833.96 COPY(MILLISECONDS) : 0.00 REPORT_DISEQUALITY(MILLISECONDS) : 867.94 UNFREEZE(MILLISECONDS) : 0.00 OVERALL(MILLISECONDS) : 63797.26 REPORTCONTAINS(MILLISECONDS) : 26.61 IS_STRONGER_THAN_NO_CACHING(MILLISECONDS) : 41843.56 REMOVE(MILLISECONDS) : 0.00 IS_STRONGER_THAN_W_CACHING(MILLISECONDS) : 0.00 PROJECT_TO_ELEMENTS(MILLISECONDS) : 4018.12 #ADDNODE : 0 #MEET : 53943 #REPORT_EQUALITY : 988600 #FILTERREDUNDANT : 1136985 #ADD_ALL_ELEMENTS : 836766 #JOIN : 290 #ALIGN_ELEMENTS : 390364 #COPY : 0 #REPORT_DISEQUALITY : 245617 #UNFREEZE : 0 #OVERALL : 5155509 #REPORTCONTAINS : 2110 #IS_STRONGER_THAN_NO_CACHING : 1449654 #REMOVE : 0 #IS_STRONGER_THAN_W_CACHING : 0 #PROJECT_TO_ELEMENTS : 51180 * Results from de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation: - StatisticsResult: HeapSeparatorStatistics #COUNT_NEW_ARRAY_VARS_[#memory_int] : 3 COUNT_ARRAY_WRITES_for_[#memory_int]_at_dim_0 : 3 COUNT_BLOCKS_for_[#memory_int]_at_dim_0 : 3 COUNT_ARRAY_WRITES_for_[#memory_int]_at_dim_1 : 2 COUNT_BLOCKS_for_[#memory_int]_at_dim_1 : 1 COUNT_ARRAY_READS for [#memory_int] : 7 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: AssertionError: var is still there: v_arrayElimArr_5 term size 6 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: AssertionError: var is still there: v_arrayElimArr_5 term size 6: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:452) RESULT: Ultimate could not prove your program: Toolchain returned no result. Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cstrncmp-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-Benchmark-0-2018-04-12_01-01-02-857.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cstrncmp-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-VPDomainBenchmark-0-2018-04-12_01-01-02-857.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cstrncmp-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-BenchmarkWithCounters-0-2018-04-12_01-01-02-857.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cstrncmp-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-BenchmarkWithCounters-1-2018-04-12_01-01-02-857.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cstrncmp-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-BenchmarkWithCounters-2-2018-04-12_01-01-02-857.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/cstrncmp-alloca_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Fixed_noBitfields+AI_EQ_SS.epf_AutomizerCTransformed.xml/Csv-HeapSeparatorBenchmark-0-2018-04-12_01-01-02-857.csv Received shutdown request...