./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/loop-acceleration/array_4.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 551b0097 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/loop-acceleration/array_4.i -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e8c27e61ac5d5a22c0e00a5dbac1b872460567877a501387ed9d5bda89096498 --- Real Ultimate output --- This is Ultimate 0.3.0-?-551b009-m [2025-01-10 07:33:14,444 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-01-10 07:33:14,525 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-01-10 07:33:14,530 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-01-10 07:33:14,531 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-01-10 07:33:14,558 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-01-10 07:33:14,559 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-01-10 07:33:14,559 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-01-10 07:33:14,560 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-01-10 07:33:14,560 INFO L153 SettingsManager]: * Use memory slicer=true [2025-01-10 07:33:14,561 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-01-10 07:33:14,561 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-01-10 07:33:14,561 INFO L153 SettingsManager]: * Use SBE=true [2025-01-10 07:33:14,562 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-01-10 07:33:14,562 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-01-10 07:33:14,562 INFO L153 SettingsManager]: * Use old map elimination=false [2025-01-10 07:33:14,562 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-01-10 07:33:14,562 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-01-10 07:33:14,562 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-01-10 07:33:14,562 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-01-10 07:33:14,563 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-01-10 07:33:14,563 INFO L153 SettingsManager]: * sizeof long=4 [2025-01-10 07:33:14,563 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-01-10 07:33:14,563 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-01-10 07:33:14,563 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-01-10 07:33:14,563 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-01-10 07:33:14,563 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-01-10 07:33:14,563 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-01-10 07:33:14,564 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-01-10 07:33:14,564 INFO L153 SettingsManager]: * sizeof long double=12 [2025-01-10 07:33:14,564 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-01-10 07:33:14,564 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-01-10 07:33:14,565 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-01-10 07:33:14,565 INFO L153 SettingsManager]: * Use constant arrays=true [2025-01-10 07:33:14,565 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2025-01-10 07:33:14,565 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-01-10 07:33:14,565 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-01-10 07:33:14,565 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-01-10 07:33:14,565 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-01-10 07:33:14,566 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e8c27e61ac5d5a22c0e00a5dbac1b872460567877a501387ed9d5bda89096498 [2025-01-10 07:33:14,851 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-01-10 07:33:14,859 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-01-10 07:33:14,862 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-01-10 07:33:14,863 INFO L270 PluginConnector]: Initializing CDTParser... [2025-01-10 07:33:14,864 INFO L274 PluginConnector]: CDTParser initialized [2025-01-10 07:33:14,865 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/loop-acceleration/array_4.i [2025-01-10 07:33:16,138 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/4a2926b9c/650d647512c64c05bf3dc0a9c107cfb4/FLAGc3782e8cd [2025-01-10 07:33:16,447 INFO L384 CDTParser]: Found 1 translation units. [2025-01-10 07:33:16,448 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/loop-acceleration/array_4.i [2025-01-10 07:33:16,457 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/4a2926b9c/650d647512c64c05bf3dc0a9c107cfb4/FLAGc3782e8cd [2025-01-10 07:33:16,477 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/4a2926b9c/650d647512c64c05bf3dc0a9c107cfb4 [2025-01-10 07:33:16,479 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-01-10 07:33:16,481 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-01-10 07:33:16,483 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-01-10 07:33:16,483 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-01-10 07:33:16,488 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-01-10 07:33:16,489 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.01 07:33:16" (1/1) ... [2025-01-10 07:33:16,490 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@635713e5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:33:16, skipping insertion in model container [2025-01-10 07:33:16,490 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.01 07:33:16" (1/1) ... [2025-01-10 07:33:16,504 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-01-10 07:33:16,647 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-10 07:33:16,663 INFO L200 MainTranslator]: Completed pre-run [2025-01-10 07:33:16,676 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-10 07:33:16,690 INFO L204 MainTranslator]: Completed translation [2025-01-10 07:33:16,692 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:33:16 WrapperNode [2025-01-10 07:33:16,693 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-01-10 07:33:16,694 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-01-10 07:33:16,694 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-01-10 07:33:16,694 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-01-10 07:33:16,699 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:33:16" (1/1) ... [2025-01-10 07:33:16,705 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:33:16" (1/1) ... [2025-01-10 07:33:16,721 INFO L138 Inliner]: procedures = 16, calls = 13, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 40 [2025-01-10 07:33:16,722 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-01-10 07:33:16,723 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-01-10 07:33:16,723 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-01-10 07:33:16,724 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-01-10 07:33:16,730 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:33:16" (1/1) ... [2025-01-10 07:33:16,730 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:33:16" (1/1) ... [2025-01-10 07:33:16,732 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:33:16" (1/1) ... [2025-01-10 07:33:16,748 INFO L175 MemorySlicer]: Split 5 memory accesses to 2 slices as follows [2, 3]. 60 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0]. The 2 writes are split as follows [0, 2]. [2025-01-10 07:33:16,749 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:33:16" (1/1) ... [2025-01-10 07:33:16,750 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:33:16" (1/1) ... [2025-01-10 07:33:16,753 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:33:16" (1/1) ... [2025-01-10 07:33:16,754 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:33:16" (1/1) ... [2025-01-10 07:33:16,759 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:33:16" (1/1) ... [2025-01-10 07:33:16,759 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:33:16" (1/1) ... [2025-01-10 07:33:16,760 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:33:16" (1/1) ... [2025-01-10 07:33:16,765 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-01-10 07:33:16,766 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2025-01-10 07:33:16,766 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2025-01-10 07:33:16,766 INFO L274 PluginConnector]: RCFGBuilder initialized [2025-01-10 07:33:16,767 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:33:16" (1/1) ... [2025-01-10 07:33:16,774 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 07:33:16,785 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:33:16,802 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-01-10 07:33:16,808 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-01-10 07:33:16,833 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-01-10 07:33:16,833 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-01-10 07:33:16,833 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2025-01-10 07:33:16,834 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-01-10 07:33:16,834 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-01-10 07:33:16,834 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-01-10 07:33:16,834 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-01-10 07:33:16,834 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-01-10 07:33:16,834 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-01-10 07:33:16,834 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-01-10 07:33:16,834 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-01-10 07:33:16,899 INFO L234 CfgBuilder]: Building ICFG [2025-01-10 07:33:16,901 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2025-01-10 07:33:17,023 INFO L? ?]: Removed 6 outVars from TransFormulas that were not future-live. [2025-01-10 07:33:17,023 INFO L283 CfgBuilder]: Performing block encoding [2025-01-10 07:33:17,035 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-01-10 07:33:17,036 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2025-01-10 07:33:17,036 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 07:33:17 BoogieIcfgContainer [2025-01-10 07:33:17,037 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2025-01-10 07:33:17,038 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-01-10 07:33:17,038 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-01-10 07:33:17,043 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-01-10 07:33:17,044 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:33:17,044 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 10.01 07:33:16" (1/3) ... [2025-01-10 07:33:17,046 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@298bb36d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.01 07:33:17, skipping insertion in model container [2025-01-10 07:33:17,048 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:33:17,048 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:33:16" (2/3) ... [2025-01-10 07:33:17,048 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@298bb36d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.01 07:33:17, skipping insertion in model container [2025-01-10 07:33:17,048 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:33:17,048 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 07:33:17" (3/3) ... [2025-01-10 07:33:17,050 INFO L363 chiAutomizerObserver]: Analyzing ICFG array_4.i [2025-01-10 07:33:17,109 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-01-10 07:33:17,109 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-01-10 07:33:17,110 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-01-10 07:33:17,110 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-01-10 07:33:17,110 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-01-10 07:33:17,110 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-01-10 07:33:17,111 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-01-10 07:33:17,111 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-01-10 07:33:17,115 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 15 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:33:17,128 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-01-10 07:33:17,129 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:33:17,129 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:33:17,133 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:33:17,133 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-01-10 07:33:17,134 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-01-10 07:33:17,134 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 15 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:33:17,136 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-01-10 07:33:17,137 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:33:17,137 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:33:17,137 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:33:17,137 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-01-10 07:33:17,144 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" [2025-01-10 07:33:17,145 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" [2025-01-10 07:33:17,149 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:33:17,149 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2025-01-10 07:33:17,156 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:33:17,157 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [517498179] [2025-01-10 07:33:17,157 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:33:17,158 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:33:17,220 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:33:17,238 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:33:17,239 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:17,239 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:17,240 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:33:17,245 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:33:17,250 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:33:17,251 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:17,251 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:17,266 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:33:17,270 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:33:17,270 INFO L85 PathProgramCache]: Analyzing trace with hash 37, now seen corresponding path program 1 times [2025-01-10 07:33:17,270 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:33:17,270 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [636325578] [2025-01-10 07:33:17,271 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:33:17,271 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:33:17,279 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:33:17,285 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:33:17,288 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:17,289 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:17,289 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:33:17,291 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:33:17,297 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:33:17,297 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:17,297 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:17,298 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:33:17,300 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:33:17,300 INFO L85 PathProgramCache]: Analyzing trace with hash 29859, now seen corresponding path program 1 times [2025-01-10 07:33:17,300 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:33:17,300 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1937033113] [2025-01-10 07:33:17,301 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:33:17,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:33:17,308 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:33:17,321 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:33:17,321 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:17,321 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:17,321 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:33:17,325 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:33:17,332 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:33:17,333 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:17,333 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:17,335 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:33:17,707 INFO L204 LassoAnalysis]: Preferences: [2025-01-10 07:33:17,708 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-01-10 07:33:17,710 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-01-10 07:33:17,711 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-01-10 07:33:17,711 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-01-10 07:33:17,711 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 07:33:17,711 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-01-10 07:33:17,711 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-01-10 07:33:17,712 INFO L132 ssoRankerPreferences]: Filename of dumped script: array_4.i_Iteration1_Lasso [2025-01-10 07:33:17,712 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-01-10 07:33:17,713 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-01-10 07:33:17,726 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-01-10 07:33:17,735 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-01-10 07:33:17,930 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-01-10 07:33:17,943 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-01-10 07:33:17,946 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-01-10 07:33:17,949 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-01-10 07:33:17,952 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-01-10 07:33:18,168 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-01-10 07:33:18,171 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-01-10 07:33:18,173 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 07:33:18,173 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:33:18,176 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-01-10 07:33:18,178 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-01-10 07:33:18,179 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-01-10 07:33:18,193 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-01-10 07:33:18,193 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-01-10 07:33:18,194 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-01-10 07:33:18,194 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-01-10 07:33:18,194 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-01-10 07:33:18,198 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-01-10 07:33:18,199 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-01-10 07:33:18,201 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-01-10 07:33:18,210 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2025-01-10 07:33:18,211 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 07:33:18,211 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:33:18,213 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-01-10 07:33:18,216 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-01-10 07:33:18,217 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-01-10 07:33:18,227 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-01-10 07:33:18,227 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-01-10 07:33:18,227 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-01-10 07:33:18,227 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-01-10 07:33:18,231 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-01-10 07:33:18,231 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-01-10 07:33:18,236 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-01-10 07:33:18,243 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2025-01-10 07:33:18,244 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 07:33:18,244 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:33:18,246 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-01-10 07:33:18,250 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-01-10 07:33:18,251 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-01-10 07:33:18,261 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-01-10 07:33:18,261 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-01-10 07:33:18,261 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-01-10 07:33:18,262 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-01-10 07:33:18,267 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-01-10 07:33:18,267 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-01-10 07:33:18,276 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-01-10 07:33:18,300 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2025-01-10 07:33:18,304 INFO L444 ModelExtractionUtils]: 0 out of 13 variables were initially zero. Simplification set additionally 10 variables to zero. [2025-01-10 07:33:18,306 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 07:33:18,306 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:33:18,310 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-01-10 07:33:18,311 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-01-10 07:33:18,312 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-01-10 07:33:18,330 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-01-10 07:33:18,331 INFO L474 LassoAnalysis]: Proved termination. [2025-01-10 07:33:18,331 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1, v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1) = -8*ULTIMATE.start_main_~i~0#1 + 2045*v_rep(select #length ULTIMATE.start_main_~#A~0#1.base)_1 Supporting invariants [] [2025-01-10 07:33:18,339 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2025-01-10 07:33:18,360 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2025-01-10 07:33:18,371 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2025-01-10 07:33:18,371 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2025-01-10 07:33:18,389 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:33:18,397 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:33:18,401 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:33:18,402 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:18,402 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:33:18,403 INFO L256 TraceCheckSpWp]: Trace formula consists of 31 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-01-10 07:33:18,404 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:33:18,415 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-01-10 07:33:18,417 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-01-10 07:33:18,417 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:18,417 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:33:18,418 INFO L256 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-01-10 07:33:18,418 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:33:18,422 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:18,447 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2025-01-10 07:33:18,449 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 15 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:33:18,481 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 15 states, 14 states have (on average 1.3571428571428572) internal successors, (19), 14 states have internal predecessors, (19), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 17 states and 23 transitions. Complement of second has 3 states. [2025-01-10 07:33:18,484 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 2 states 1 stem states 0 non-accepting loop states 1 accepting loop states [2025-01-10 07:33:18,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:33:18,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 3 transitions. [2025-01-10 07:33:18,496 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 2 letters. Loop has 1 letters. [2025-01-10 07:33:18,497 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-01-10 07:33:18,497 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 3 letters. Loop has 1 letters. [2025-01-10 07:33:18,497 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-01-10 07:33:18,497 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 2 letters. Loop has 2 letters. [2025-01-10 07:33:18,498 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-01-10 07:33:18,498 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17 states and 23 transitions. [2025-01-10 07:33:18,500 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2025-01-10 07:33:18,502 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17 states to 8 states and 10 transitions. [2025-01-10 07:33:18,504 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2025-01-10 07:33:18,505 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-01-10 07:33:18,505 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8 states and 10 transitions. [2025-01-10 07:33:18,506 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:33:18,506 INFO L218 hiAutomatonCegarLoop]: Abstraction has 8 states and 10 transitions. [2025-01-10 07:33:18,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8 states and 10 transitions. [2025-01-10 07:33:18,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8 to 7. [2025-01-10 07:33:18,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.2857142857142858) internal successors, (9), 6 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:33:18,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 9 transitions. [2025-01-10 07:33:18,526 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7 states and 9 transitions. [2025-01-10 07:33:18,526 INFO L432 stractBuchiCegarLoop]: Abstraction has 7 states and 9 transitions. [2025-01-10 07:33:18,526 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-01-10 07:33:18,526 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 9 transitions. [2025-01-10 07:33:18,526 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2025-01-10 07:33:18,526 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:33:18,527 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:33:18,527 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-01-10 07:33:18,527 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-01-10 07:33:18,527 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume !(main_~i~0#1 < 1023);call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0;" [2025-01-10 07:33:18,527 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" [2025-01-10 07:33:18,528 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:33:18,528 INFO L85 PathProgramCache]: Analyzing trace with hash 29861, now seen corresponding path program 1 times [2025-01-10 07:33:18,528 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:33:18,528 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2092806462] [2025-01-10 07:33:18,528 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:33:18,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:33:18,537 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:33:18,541 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:33:18,542 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:18,542 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:33:18,600 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:18,600 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:33:18,601 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2092806462] [2025-01-10 07:33:18,601 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2092806462] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:33:18,601 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:33:18,601 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-01-10 07:33:18,601 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [222653033] [2025-01-10 07:33:18,602 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:33:18,603 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:33:18,604 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:33:18,604 INFO L85 PathProgramCache]: Analyzing trace with hash 41807, now seen corresponding path program 1 times [2025-01-10 07:33:18,605 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:33:18,605 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1095812401] [2025-01-10 07:33:18,605 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:33:18,605 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:33:18,610 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:33:18,613 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:33:18,614 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:18,614 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:18,614 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:33:18,615 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:33:18,617 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:33:18,617 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:18,617 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:18,619 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:33:18,664 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:33:18,665 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:33:18,666 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:33:18,667 INFO L87 Difference]: Start difference. First operand 7 states and 9 transitions. cyclomatic complexity: 4 Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:33:18,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:33:18,681 INFO L93 Difference]: Finished difference Result 10 states and 11 transitions. [2025-01-10 07:33:18,681 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10 states and 11 transitions. [2025-01-10 07:33:18,681 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2025-01-10 07:33:18,681 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10 states to 10 states and 11 transitions. [2025-01-10 07:33:18,682 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-01-10 07:33:18,682 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-01-10 07:33:18,682 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 11 transitions. [2025-01-10 07:33:18,682 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:33:18,682 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2025-01-10 07:33:18,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 11 transitions. [2025-01-10 07:33:18,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 7. [2025-01-10 07:33:18,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 1.1428571428571428) internal successors, (8), 6 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:33:18,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 8 transitions. [2025-01-10 07:33:18,683 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7 states and 8 transitions. [2025-01-10 07:33:18,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:33:18,685 INFO L432 stractBuchiCegarLoop]: Abstraction has 7 states and 8 transitions. [2025-01-10 07:33:18,686 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-01-10 07:33:18,686 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 8 transitions. [2025-01-10 07:33:18,686 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2025-01-10 07:33:18,686 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:33:18,686 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:33:18,687 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2025-01-10 07:33:18,687 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-01-10 07:33:18,687 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1023);call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0;" [2025-01-10 07:33:18,687 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" [2025-01-10 07:33:18,687 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:33:18,687 INFO L85 PathProgramCache]: Analyzing trace with hash 925637, now seen corresponding path program 1 times [2025-01-10 07:33:18,687 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:33:18,687 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [406707192] [2025-01-10 07:33:18,687 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:33:18,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:33:18,694 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-01-10 07:33:18,699 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-01-10 07:33:18,700 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:18,700 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:33:18,760 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:18,760 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:33:18,760 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [406707192] [2025-01-10 07:33:18,761 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [406707192] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:33:18,761 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [349815235] [2025-01-10 07:33:18,761 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:33:18,761 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:33:18,761 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:33:18,763 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:33:18,766 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-01-10 07:33:18,803 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-01-10 07:33:18,813 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-01-10 07:33:18,813 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:18,813 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:33:18,813 INFO L256 TraceCheckSpWp]: Trace formula consists of 53 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-01-10 07:33:18,814 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:33:18,828 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:18,828 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:33:18,846 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:18,846 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [349815235] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:33:18,846 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:33:18,846 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2025-01-10 07:33:18,847 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1110101375] [2025-01-10 07:33:18,847 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:33:18,847 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:33:18,847 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:33:18,847 INFO L85 PathProgramCache]: Analyzing trace with hash 41807, now seen corresponding path program 2 times [2025-01-10 07:33:18,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:33:18,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [884738030] [2025-01-10 07:33:18,847 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:33:18,848 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:33:18,854 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:33:18,856 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:33:18,857 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:33:18,857 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:18,857 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:33:18,858 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:33:18,861 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:33:18,863 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:18,863 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:18,864 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:33:18,902 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:33:18,902 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-01-10 07:33:18,902 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2025-01-10 07:33:18,902 INFO L87 Difference]: Start difference. First operand 7 states and 8 transitions. cyclomatic complexity: 3 Second operand has 7 states, 6 states have (on average 1.5) internal successors, (9), 7 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:33:18,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:33:18,934 INFO L93 Difference]: Finished difference Result 22 states and 23 transitions. [2025-01-10 07:33:18,934 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 22 states and 23 transitions. [2025-01-10 07:33:18,934 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2025-01-10 07:33:18,935 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 22 states to 22 states and 23 transitions. [2025-01-10 07:33:18,935 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2025-01-10 07:33:18,935 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2025-01-10 07:33:18,935 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 23 transitions. [2025-01-10 07:33:18,935 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:33:18,935 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22 states and 23 transitions. [2025-01-10 07:33:18,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 23 transitions. [2025-01-10 07:33:18,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 10. [2025-01-10 07:33:18,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.1) internal successors, (11), 9 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:33:18,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 11 transitions. [2025-01-10 07:33:18,938 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 11 transitions. [2025-01-10 07:33:18,939 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-01-10 07:33:18,939 INFO L432 stractBuchiCegarLoop]: Abstraction has 10 states and 11 transitions. [2025-01-10 07:33:18,940 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-01-10 07:33:18,940 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 11 transitions. [2025-01-10 07:33:18,940 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2025-01-10 07:33:18,940 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:33:18,940 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:33:18,940 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 1, 1, 1] [2025-01-10 07:33:18,940 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-01-10 07:33:18,940 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1023);call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0;" [2025-01-10 07:33:18,941 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" [2025-01-10 07:33:18,941 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:33:18,941 INFO L85 PathProgramCache]: Analyzing trace with hash 1805794469, now seen corresponding path program 2 times [2025-01-10 07:33:18,941 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:33:18,941 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [291222779] [2025-01-10 07:33:18,941 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:33:18,941 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:33:18,951 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 7 statements into 2 equivalence classes. [2025-01-10 07:33:18,965 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 7 of 7 statements. [2025-01-10 07:33:18,965 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-01-10 07:33:18,965 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:33:19,064 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:19,064 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:33:19,064 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [291222779] [2025-01-10 07:33:19,065 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [291222779] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:33:19,065 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [595277171] [2025-01-10 07:33:19,065 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:33:19,065 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:33:19,065 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:33:19,089 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:33:19,090 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-01-10 07:33:19,128 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 7 statements into 2 equivalence classes. [2025-01-10 07:33:19,145 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 7 of 7 statements. [2025-01-10 07:33:19,145 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-01-10 07:33:19,145 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:33:19,146 INFO L256 TraceCheckSpWp]: Trace formula consists of 86 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-01-10 07:33:19,147 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:33:19,173 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:19,173 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:33:19,235 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2025-01-10 07:33:19,280 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:19,285 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [595277171] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:33:19,285 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:33:19,285 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2025-01-10 07:33:19,285 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1527431181] [2025-01-10 07:33:19,285 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:33:19,285 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:33:19,285 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:33:19,286 INFO L85 PathProgramCache]: Analyzing trace with hash 41807, now seen corresponding path program 3 times [2025-01-10 07:33:19,286 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:33:19,286 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [555787954] [2025-01-10 07:33:19,286 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:33:19,286 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:33:19,289 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:33:19,290 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:33:19,294 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-01-10 07:33:19,295 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:19,295 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:33:19,296 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:33:19,298 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:33:19,298 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:19,298 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:19,299 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:33:19,337 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:33:19,338 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-01-10 07:33:19,338 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2025-01-10 07:33:19,338 INFO L87 Difference]: Start difference. First operand 10 states and 11 transitions. cyclomatic complexity: 3 Second operand has 13 states, 12 states have (on average 1.25) internal successors, (15), 13 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:33:19,398 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:33:19,398 INFO L93 Difference]: Finished difference Result 46 states and 47 transitions. [2025-01-10 07:33:19,398 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 46 states and 47 transitions. [2025-01-10 07:33:19,401 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2025-01-10 07:33:19,402 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 46 states to 46 states and 47 transitions. [2025-01-10 07:33:19,402 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36 [2025-01-10 07:33:19,402 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 36 [2025-01-10 07:33:19,402 INFO L73 IsDeterministic]: Start isDeterministic. Operand 46 states and 47 transitions. [2025-01-10 07:33:19,402 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:33:19,402 INFO L218 hiAutomatonCegarLoop]: Abstraction has 46 states and 47 transitions. [2025-01-10 07:33:19,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states and 47 transitions. [2025-01-10 07:33:19,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 16. [2025-01-10 07:33:19,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.0625) internal successors, (17), 15 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:33:19,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 17 transitions. [2025-01-10 07:33:19,404 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 17 transitions. [2025-01-10 07:33:19,406 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-01-10 07:33:19,408 INFO L432 stractBuchiCegarLoop]: Abstraction has 16 states and 17 transitions. [2025-01-10 07:33:19,408 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-01-10 07:33:19,408 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 17 transitions. [2025-01-10 07:33:19,409 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2025-01-10 07:33:19,409 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:33:19,409 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:33:19,409 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 1, 1, 1] [2025-01-10 07:33:19,409 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-01-10 07:33:19,409 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1023);call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0;" [2025-01-10 07:33:19,409 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" [2025-01-10 07:33:19,409 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:33:19,410 INFO L85 PathProgramCache]: Analyzing trace with hash 1496410277, now seen corresponding path program 3 times [2025-01-10 07:33:19,410 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:33:19,410 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1560428311] [2025-01-10 07:33:19,410 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:33:19,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:33:19,422 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 13 statements into 6 equivalence classes. [2025-01-10 07:33:19,455 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 13 of 13 statements. [2025-01-10 07:33:19,456 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-01-10 07:33:19,456 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:33:19,705 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:19,705 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:33:19,705 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1560428311] [2025-01-10 07:33:19,705 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1560428311] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:33:19,705 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1429113922] [2025-01-10 07:33:19,705 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:33:19,706 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:33:19,706 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:33:19,709 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:33:19,711 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2025-01-10 07:33:19,756 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 13 statements into 6 equivalence classes. [2025-01-10 07:33:19,821 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 13 of 13 statements. [2025-01-10 07:33:19,821 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-01-10 07:33:19,821 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:33:19,823 INFO L256 TraceCheckSpWp]: Trace formula consists of 152 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-01-10 07:33:19,824 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:33:19,863 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:19,863 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:33:20,098 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:20,098 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1429113922] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:33:20,098 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:33:20,098 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 24 [2025-01-10 07:33:20,098 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1945492505] [2025-01-10 07:33:20,098 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:33:20,099 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:33:20,099 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:33:20,099 INFO L85 PathProgramCache]: Analyzing trace with hash 41807, now seen corresponding path program 4 times [2025-01-10 07:33:20,099 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:33:20,099 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [502159570] [2025-01-10 07:33:20,099 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:33:20,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:33:20,102 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 3 statements into 2 equivalence classes. [2025-01-10 07:33:20,103 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:33:20,103 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:33:20,103 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:20,103 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:33:20,104 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:33:20,105 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:33:20,105 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:20,105 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:20,106 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:33:20,152 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:33:20,153 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-01-10 07:33:20,154 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2025-01-10 07:33:20,154 INFO L87 Difference]: Start difference. First operand 16 states and 17 transitions. cyclomatic complexity: 3 Second operand has 25 states, 24 states have (on average 1.125) internal successors, (27), 25 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:33:20,300 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:33:20,300 INFO L93 Difference]: Finished difference Result 94 states and 95 transitions. [2025-01-10 07:33:20,300 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 94 states and 95 transitions. [2025-01-10 07:33:20,302 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2025-01-10 07:33:20,303 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 94 states to 94 states and 95 transitions. [2025-01-10 07:33:20,303 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 72 [2025-01-10 07:33:20,304 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 72 [2025-01-10 07:33:20,304 INFO L73 IsDeterministic]: Start isDeterministic. Operand 94 states and 95 transitions. [2025-01-10 07:33:20,304 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:33:20,304 INFO L218 hiAutomatonCegarLoop]: Abstraction has 94 states and 95 transitions. [2025-01-10 07:33:20,305 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states and 95 transitions. [2025-01-10 07:33:20,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 28. [2025-01-10 07:33:20,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.0357142857142858) internal successors, (29), 27 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:33:20,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 29 transitions. [2025-01-10 07:33:20,309 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 29 transitions. [2025-01-10 07:33:20,310 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-01-10 07:33:20,310 INFO L432 stractBuchiCegarLoop]: Abstraction has 28 states and 29 transitions. [2025-01-10 07:33:20,311 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-01-10 07:33:20,311 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 29 transitions. [2025-01-10 07:33:20,312 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2025-01-10 07:33:20,312 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:33:20,312 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:33:20,312 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 1, 1, 1] [2025-01-10 07:33:20,314 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-01-10 07:33:20,314 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1023);call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0;" [2025-01-10 07:33:20,315 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" [2025-01-10 07:33:20,315 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:33:20,315 INFO L85 PathProgramCache]: Analyzing trace with hash -975388507, now seen corresponding path program 4 times [2025-01-10 07:33:20,315 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:33:20,315 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871415427] [2025-01-10 07:33:20,315 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:33:20,315 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:33:20,339 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 25 statements into 2 equivalence classes. [2025-01-10 07:33:20,358 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 25 of 25 statements. [2025-01-10 07:33:20,358 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:33:20,359 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:33:20,909 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:20,909 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:33:20,909 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [871415427] [2025-01-10 07:33:20,909 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [871415427] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:33:20,909 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1104888235] [2025-01-10 07:33:20,910 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:33:20,910 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:33:20,910 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:33:20,913 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:33:20,914 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-01-10 07:33:20,976 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 25 statements into 2 equivalence classes. [2025-01-10 07:33:21,009 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 25 of 25 statements. [2025-01-10 07:33:21,009 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:33:21,009 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:33:21,011 INFO L256 TraceCheckSpWp]: Trace formula consists of 284 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-01-10 07:33:21,013 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:33:21,072 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:21,072 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:33:21,880 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:21,881 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1104888235] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:33:21,881 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:33:21,881 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 48 [2025-01-10 07:33:21,881 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [401503829] [2025-01-10 07:33:21,881 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:33:21,881 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:33:21,881 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:33:21,881 INFO L85 PathProgramCache]: Analyzing trace with hash 41807, now seen corresponding path program 5 times [2025-01-10 07:33:21,882 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:33:21,882 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1996017954] [2025-01-10 07:33:21,882 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 07:33:21,882 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:33:21,887 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:33:21,888 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:33:21,888 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:33:21,889 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:21,889 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:33:21,889 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:33:21,890 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:33:21,890 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:21,890 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:21,891 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:33:21,925 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:33:21,925 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2025-01-10 07:33:21,927 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2025-01-10 07:33:21,927 INFO L87 Difference]: Start difference. First operand 28 states and 29 transitions. cyclomatic complexity: 3 Second operand has 49 states, 48 states have (on average 1.0625) internal successors, (51), 49 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:33:22,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:33:22,266 INFO L93 Difference]: Finished difference Result 190 states and 191 transitions. [2025-01-10 07:33:22,266 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 190 states and 191 transitions. [2025-01-10 07:33:22,269 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2025-01-10 07:33:22,272 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 190 states to 190 states and 191 transitions. [2025-01-10 07:33:22,272 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 144 [2025-01-10 07:33:22,272 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 144 [2025-01-10 07:33:22,272 INFO L73 IsDeterministic]: Start isDeterministic. Operand 190 states and 191 transitions. [2025-01-10 07:33:22,273 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:33:22,273 INFO L218 hiAutomatonCegarLoop]: Abstraction has 190 states and 191 transitions. [2025-01-10 07:33:22,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states and 191 transitions. [2025-01-10 07:33:22,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 52. [2025-01-10 07:33:22,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 52 states have (on average 1.0192307692307692) internal successors, (53), 51 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:33:22,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 53 transitions. [2025-01-10 07:33:22,277 INFO L240 hiAutomatonCegarLoop]: Abstraction has 52 states and 53 transitions. [2025-01-10 07:33:22,278 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2025-01-10 07:33:22,278 INFO L432 stractBuchiCegarLoop]: Abstraction has 52 states and 53 transitions. [2025-01-10 07:33:22,278 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-01-10 07:33:22,278 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 52 states and 53 transitions. [2025-01-10 07:33:22,279 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2025-01-10 07:33:22,279 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:33:22,279 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:33:22,280 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 1, 1, 1] [2025-01-10 07:33:22,280 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-01-10 07:33:22,281 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1023);call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0;" [2025-01-10 07:33:22,281 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" [2025-01-10 07:33:22,281 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:33:22,281 INFO L85 PathProgramCache]: Analyzing trace with hash 174551205, now seen corresponding path program 5 times [2025-01-10 07:33:22,281 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:33:22,282 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1483447472] [2025-01-10 07:33:22,282 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 07:33:22,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:33:22,307 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 49 statements into 24 equivalence classes. [2025-01-10 07:33:22,403 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) and asserted 49 of 49 statements. [2025-01-10 07:33:22,403 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2025-01-10 07:33:22,403 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:33:24,313 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:24,313 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:33:24,313 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1483447472] [2025-01-10 07:33:24,313 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1483447472] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:33:24,314 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [955169688] [2025-01-10 07:33:24,314 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 07:33:24,314 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:33:24,314 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:33:24,320 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:33:24,321 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-01-10 07:33:24,402 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 49 statements into 24 equivalence classes. [2025-01-10 07:33:36,228 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) and asserted 49 of 49 statements. [2025-01-10 07:33:36,228 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2025-01-10 07:33:36,228 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:33:36,243 INFO L256 TraceCheckSpWp]: Trace formula consists of 548 conjuncts, 48 conjuncts are in the unsatisfiable core [2025-01-10 07:33:36,246 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-01-10 07:33:36,350 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:36,350 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-01-10 07:33:38,766 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:38,767 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [955169688] provided 0 perfect and 2 imperfect interpolant sequences [2025-01-10 07:33:38,767 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-01-10 07:33:38,767 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 95 [2025-01-10 07:33:38,767 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1692677820] [2025-01-10 07:33:38,767 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-01-10 07:33:38,767 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-01-10 07:33:38,768 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:33:38,768 INFO L85 PathProgramCache]: Analyzing trace with hash 41807, now seen corresponding path program 6 times [2025-01-10 07:33:38,768 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:33:38,768 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [698049475] [2025-01-10 07:33:38,768 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 07:33:38,768 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:33:38,771 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:33:38,773 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:33:38,773 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-01-10 07:33:38,773 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:38,773 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:33:38,773 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-01-10 07:33:38,774 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-01-10 07:33:38,774 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:33:38,774 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:33:38,775 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:33:38,808 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:33:38,809 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2025-01-10 07:33:38,814 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2025-01-10 07:33:38,815 INFO L87 Difference]: Start difference. First operand 52 states and 53 transitions. cyclomatic complexity: 3 Second operand has 96 states, 95 states have (on average 1.0210526315789474) internal successors, (97), 96 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:33:40,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:33:40,038 INFO L93 Difference]: Finished difference Result 382 states and 383 transitions. [2025-01-10 07:33:40,038 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 382 states and 383 transitions. [2025-01-10 07:33:40,042 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2025-01-10 07:33:40,044 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 382 states to 382 states and 383 transitions. [2025-01-10 07:33:40,044 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 288 [2025-01-10 07:33:40,044 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 288 [2025-01-10 07:33:40,044 INFO L73 IsDeterministic]: Start isDeterministic. Operand 382 states and 383 transitions. [2025-01-10 07:33:40,046 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:33:40,046 INFO L218 hiAutomatonCegarLoop]: Abstraction has 382 states and 383 transitions. [2025-01-10 07:33:40,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 382 states and 383 transitions. [2025-01-10 07:33:40,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 382 to 100. [2025-01-10 07:33:40,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 100 states, 100 states have (on average 1.01) internal successors, (101), 99 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:33:40,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 100 states to 100 states and 101 transitions. [2025-01-10 07:33:40,051 INFO L240 hiAutomatonCegarLoop]: Abstraction has 100 states and 101 transitions. [2025-01-10 07:33:40,053 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2025-01-10 07:33:40,054 INFO L432 stractBuchiCegarLoop]: Abstraction has 100 states and 101 transitions. [2025-01-10 07:33:40,054 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-01-10 07:33:40,054 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 100 states and 101 transitions. [2025-01-10 07:33:40,055 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 3 [2025-01-10 07:33:40,055 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:33:40,055 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:33:40,057 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 1, 1, 1] [2025-01-10 07:33:40,057 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-01-10 07:33:40,057 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(10, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~mem3#1, main_#t~post4#1, main_~#A~0#1.base, main_~#A~0#1.offset, main_~i~0#1;call main_~#A~0#1.base, main_~#A~0#1.offset := #Ultimate.allocOnStack(4096);havoc main_~i~0#1;main_~i~0#1 := 0;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume main_~i~0#1 < 1023;havoc main_#t~nondet1#1;call write~int#1(main_#t~nondet1#1, main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume !(main_~i~0#1 < 1023);call write~int#1(0, main_~#A~0#1.base, 4092 + main_~#A~0#1.offset, 4);main_~i~0#1 := 0;" [2025-01-10 07:33:40,059 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem3#1 := read~int#1(main_~#A~0#1.base, main_~#A~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != main_#t~mem3#1;havoc main_#t~mem3#1;" "main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;" [2025-01-10 07:33:40,059 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:33:40,059 INFO L85 PathProgramCache]: Analyzing trace with hash -397619035, now seen corresponding path program 6 times [2025-01-10 07:33:40,060 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:33:40,060 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2046108507] [2025-01-10 07:33:40,060 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 07:33:40,060 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:33:40,118 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 97 statements into 48 equivalence classes. [2025-01-10 07:33:40,319 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 48 check-sat command(s) and asserted 97 of 97 statements. [2025-01-10 07:33:40,319 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 48 check-sat command(s) [2025-01-10 07:33:40,319 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:33:45,750 INFO L134 CoverageAnalysis]: Checked inductivity of 4465 backedges. 0 proven. 4465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:33:45,750 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:33:45,750 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2046108507] [2025-01-10 07:33:45,750 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2046108507] provided 0 perfect and 1 imperfect interpolant sequences [2025-01-10 07:33:45,750 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [302329817] [2025-01-10 07:33:45,750 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 07:33:45,750 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-01-10 07:33:45,751 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:33:45,752 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-01-10 07:33:45,753 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-01-10 07:33:45,890 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 97 statements into 48 equivalence classes.